| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | x86: Remove "%!" before ret | H.J. Lu | 2021-11-17 | 1 | -1/+1 |
| * | i386: Fix non-robust split condition in define_insn_and_split | Kewen Lin | 2021-11-17 | 1 | -10/+10 |
| * | x86_64: Avoid rorx rotation instructions with -Os. | Roger Sayle | 2021-11-16 | 1 | -6/+16 |
| * | x86_64: Improved implementation of TImode rotations. | Roger Sayle | 2021-11-02 | 1 | -2/+18 |
| * | AVX512FP16: Optimize _Float16 reciprocal for div and sqrt | Hongyu Wang | 2021-10-28 | 1 | -1/+43 |
| * | i386: Improve workaround for PR82524 LRA limitation [PR85730] | Uros Bizjak | 2021-10-12 | 1 | -55/+147 |
| * | Refine movhfcc. | liuhongt | 2021-10-09 | 1 | -1/+33 |
| * | i386: Eliminate sign extension after logic operation [PR89954] | Uros Bizjak | 2021-09-30 | 1 | -0/+34 |
| * | AVX512FP16: Support basic 64/32bit vector type and operation. | Hongyu Wang | 2021-09-28 | 1 | -2/+3 |
| * | AVX512FP16: Add fix(uns)?_truncmn2 for HF scalar and vector modes | Hongyu Wang | 2021-09-23 | 1 | -0/+29 |
| * | AVX512FP16: Add expander for smin/maxhf3. | Hongyu Wang | 2021-09-23 | 1 | -0/+11 |
| * | AVX512FP16: Add expander for rint/nearbyinthf2. | liuhongt | 2021-09-23 | 1 | -0/+22 |
| * | Support 64bit fma/fms/fnma/fnms under avx512vl. | liuhongt | 2021-09-22 | 1 | -1/+3 |
| * | AVX512FP16: Add expander for cstorehf4. | liuhongt | 2021-09-22 | 1 | -0/+15 |
| * | AVX512FP16: Add expander for ceil/floor/trunc/roundeven. | liuhongt | 2021-09-22 | 1 | -3/+15 |
| * | AVX512FP16: Add expander for sqrthf2. | liuhongt | 2021-09-22 | 1 | -0/+13 |
| * | AVX512FP16: Add scalar/vector bitwise operations, including | H.J. Lu | 2021-09-18 | 1 | -7/+31 |
| * | x86: Add TARGET_SSE_PARTIAL_REG_[FP_]CONVERTS_DEPENDENCY | H.J. Lu | 2021-09-17 | 1 | -3/+6 |
| * | [i386] Remove UNSPEC_{COPYSIGN,XORSIGN}. | liuhongt | 2021-09-13 | 1 | -2/+0 |
| * | AVX512FP16: Add vcmpph/vcmpsh/vcomish/vucomish. | liuhongt | 2021-09-10 | 1 | -1/+4 |
| * | Remove copysign post_reload splitter for scalar modes. | liuhongt | 2021-09-10 | 1 | -44/+0 |
| * | i386: Fix up xorsign for AVX [PR89984] | Jakub Jelinek | 2021-09-08 | 1 | -14/+0 |
| * | i386: Fix up @xorsign<mode>3_1 [PR102224] | Jakub Jelinek | 2021-09-08 | 1 | -6/+12 |
| * | AVX512FP16: Support vector init/broadcast/set/extract for FP16. | liuhongt | 2021-09-08 | 1 | -6/+7 |
| * | AVX512FP16: Initial support for AVX512FP16 feature and scalar _Float16 instru... | Guo, Xuepeng | 2021-09-08 | 1 | -17/+155 |
| * | x86: Add non-destructive source to @xorsign<mode>3_1 | H.J. Lu | 2021-09-06 | 1 | -5/+6 |
| * | Enable _Float16 type for TARGET_SSE2 and above. | liuhongt | 2021-09-02 | 1 | -4/+114 |
| * | [i386] Call force_reg unconditionally. | Uros Bizjak | 2021-08-26 | 1 | -10/+5 |
| * | [i386] Set all_regs to true in the call to replace_rtx [PR102057] | Uros Bizjak | 2021-08-26 | 1 | -4/+4 |
| * | Fix ICE. | liuhongt | 2021-08-16 | 1 | -3/+1 |
| * | [i386] Introduce scalar version of avx512f_vmscalef. | Uros Bizjak | 2021-08-12 | 1 | -8/+19 |
| * | Extend ldexp{s,d}f3 to vscalefs{s,d} when TARGET_AVX512F and TARGET_SSE_MATH. | liuhongt | 2021-08-11 | 1 | -8/+26 |
| * | i386: Fix conditional move reg-to-reg move elimination peepholes [PR101797] | Uros Bizjak | 2021-08-06 | 1 | -2/+2 |
| * | Refine predicate of peephole2 to general_reg_operand. [PR target/101743] | liuhongt | 2021-08-04 | 1 | -6/+6 |
| * | i386: Improve SImode constant - __builtin_clzll for -mno-lzcnt | H.J. Lu | 2021-08-01 | 1 | -1/+16 |
| * | i386: Improve extensions of __builtin_clz and constant - __builtin_clz for -m... | Jakub Jelinek | 2021-07-31 | 1 | -5/+205 |
| * | Decrement followed by cmov improvements. | Roger Sayle | 2021-07-30 | 1 | -0/+87 |
| * | Support logic shift left/right for avx512 mask type. | liuhongt | 2021-07-22 | 1 | -24/+138 |
| * | Improvement to signed division of integer constant on x86_64. | Roger Sayle | 2021-07-09 | 1 | -1/+26 |
| * | i386: Fix *udivmodsi4_pow2_zext_? patterns | Uros Bizjak | 2021-07-09 | 1 | -3/+3 |
| * | i386: Add integer nabs instructions [PR101044] | Uros Bizjak | 2021-07-01 | 1 | -0/+72 |
| * | i386: Add pack/unpack patterns for 64bit vectors [PR89021] | Uros Bizjak | 2021-06-24 | 1 | -0/+3 |
| * | i386: Add PPERM two-operand 64bit vector permutation [PR89021] | Uros Bizjak | 2021-06-23 | 1 | -0/+1 |
| * | i386: Prevent unwanted combine from LZCNT to BSR [PR101175] | Uros Bizjak | 2021-06-23 | 1 | -21/+15 |
| * | i386: Use xor to write zero to memory with -Os even for more than 4 stores [P... | Jakub Jelinek | 2021-06-22 | 1 | -14/+73 |
| * | Disparage slightly the mask register alternative for bitwise operations. | liuhongt | 2021-06-21 | 1 | -10/+10 |
| * | PR target/11877: Use xor to write zero to memory with -Os | Roger Sayle | 2021-06-21 | 1 | -0/+36 |
| * | [PATCH] PR rtl-optimization/46235: Improved use of bt for bit tests on x86_64. | Roger Sayle | 2021-06-16 | 1 | -0/+94 |
| * | x86: Replace ix86_red_zone_size with ix86_red_zone_used | H.J. Lu | 2021-06-13 | 1 | -4/+4 |
| * | i386: Add V8QI and other 64bit vector permutations [PR89021] | Peter Bergner | 2021-06-10 | 1 | -0/+1 |
