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* Support 128-bit constant store in 64-bit STVH.J. Lu2016-08-081-0/+19
* Update i386 piecewise move and storeH.J. Lu2016-08-081-3/+16
* Add TARGET_GEN_MEMSET_VALUEH.J. Lu2016-08-081-0/+53
* Convert V1TImode register to TImode in debug insnhjl2016-08-011-0/+6
* PR c/7652mpolacek2016-07-291-0/+2
* merge adjust_cost and adjust_cost_2 target hookstbsaunde2016-07-281-2/+3
* 2016-07-15 Richard Biener <rguenther@suse.de>rguenth2016-07-151-4/+1
* Don't convert TImode in debug insnhjl2016-07-111-0/+3
* gcc/kyukhin2016-07-041-0/+77
* PR middle-end/71626jakub2016-06-281-10/+22
* * config/i386/i386.c (ix86_spill_class): Disable condition touros2016-06-261-2/+0
* PR target/70902uros2016-06-261-1/+7
* i386: Access external function via GOT slot for -fno-plthjl2016-06-231-15/+36
* PR target/67400uros2016-06-221-0/+37
* * config/i386/i386.c (ix86_expand_move): Simplify SYMBOL_REF handling.uros2016-06-221-29/+41
* gcc:edlinger2016-06-221-1/+6
* [AVX-512ER] vrsqrt28ps auto generationiverbin2016-06-211-0/+18
* [AVX-512ER] vrcp28ps auto generationiverbin2016-06-211-2/+13
* Convert V1TImode register to TImode in debug insnhjl2016-06-211-1/+37
* PR target/71559jakub2016-06-201-5/+21
* * config/i386/driver-i386.c (host_detect_local_cpu): Seturos2016-06-161-2/+32
* * Partially revert my previous commit.uros2016-06-131-31/+10
* * config/i386/i386-builtin-types.def (INT_FTYPE_FLOAT128):uros2016-06-131-10/+31
* * config/i386/i386.c (ix86_init_builtins): Calculateuros2016-06-121-22/+22
* PR target/71241uros2016-06-121-4/+43
* * config/i386/i386.h (enum ix86_enitity): Add X86_DIRFLAG.uros2016-06-061-10/+55
* PR target/71389uros2016-06-051-2/+2
* Implement x86 interrupt attributehjl2016-06-031-12/+343
* PR target/70738uros2016-05-251-12/+39
* AVX-512F: Add vectorizer support builtinsiverbin2016-05-251-3/+51
* * config/i386/i386.c (ix86_preferred_reload_class): Useuros2016-05-241-4/+5
* * config/i386/i386.h (IS_STACK_MODE): Enable foruros2016-05-231-15/+13
* Revert:uros2016-05-221-4/+1
* * gcc/config/i386/i386.c (ix86_rtx_costs) <case CONST_DOUBLE>:uros2016-05-201-36/+33
* Add -mgeneral-regs-only optionhjl2016-05-201-1/+4
* Fix patterns to enable sse-14.c to compile with -masm=intel.kyukhin2016-05-181-0/+4
* gcc/ienkovich2016-05-171-1/+7
* * config/i386/i386.c (ix86_compute_frame_layout, ix86_expand_prologue,jakub2016-05-131-13/+10
* Fix SEGV in ix86_in_large_data_p (PR target/71080)ro2016-05-131-0/+3
* * builtins.c (expand_builtin_memcmp): Do not emit the call here.ebotcazou2016-05-131-3/+3
* * config/i386/i386.c (legitimize_pic_address): Useuros2016-05-111-12/+2
* gcc/ienkovich2016-05-111-7/+0
* * config/i386/i386.c (legitimize_pic_address): Merge 64-bit and 32-bituros2016-05-101-74/+46
* gcc/ienkovich2016-05-101-6/+64
* PR target/70873uros2016-05-051-0/+20
* PR target/70858jakub2016-04-281-7/+7
* * config/i386/i386.c (ix86_spill_class): Enable for TARGET_SSE2 whenuros2016-04-271-2/+5
* Extend STV pass to 64-bit modehjl2016-04-271-37/+351
* Support .largecomm with Solaris as (PR target/61821)ro2016-04-261-3/+11
* Support .lbss etc. sections with Solaris as (PR target/59407)ro2016-04-261-2/+8
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