| Commit message (Collapse) | Author | Age | Files | Lines |
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PR target/67929
* config/arm/arm.c (vfp3_const_double_for_bits): Rewrite.
* config/arm/constraints.md (Dp): Update callsite.
* config/arm/predicates.md (const_double_vcvt_power_of_two): Likewise.
* gcc.target/arm/pr67929_1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@229436 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@219188 138bc75d-0d04-0410-961f-82ee72b054a4
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(t2_binop0, arith_shift_insn): New code attributes.
* arm/predicates.md (shift_nomul_operator): New predicate.
* arm/arm.md (insn_enabled): Delete.
(enabled): Remove insn_enabled test.
(*arith_shiftsi): Delete. Replace with ...
(*<arith_shift_insn>_multsi): ... new pattern.
(*<arith_shift_insn>_shiftsi): ... new pattern.
* config/arm/arm.c (arm_print_operand): Handle operand format 'b'.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@211050 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/arm/predicates.md (call_insn_operand): Add long_call check.
* config/arm/arm.md (sibcall, sibcall_value): Force the address to
reg for long_call.
* config/arm/arm.c (arm_function_ok_for_sibcall): Remove long_call
restriction.
gcc/testsuite
* gcc.target/arm/tail-long-call.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209808 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/predicates.md (const_int_I_operand): New predicate.
(const_int_M_operand): Similarly.
* config/arm/arm.md (insv_zero): Use const_int_M_operand instead of
const_int_operand.
(insv_t2, extv_reg, extzv_t2): Likewise.
(load_multiple_with_writeback): Similarly for const_int_I_operand.
(pop_multiple_with_writeback_and_return): Likewise.
(vfp_pop_multiple_with_writeback): Likewise
PR target/60657
* gcc.target/arm/pr60657.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209085 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206289 138bc75d-0d04-0410-961f-82ee72b054a4
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2013-12-24 Renlin Li <Renlin.Li@arm.com>
* config/arm/arm-protos.h (vfp_const_double_for_bits): Declare.
* config/arm/constraints.md (Dp): Define new constraint.
* config/arm/predicates.md (const_double_vcvt_power_of_two): Define
new predicate.
* config/arm/arm.c (arm_print_operand): Add print for new fucntion.
(vfp3_const_double_for_bits): New function.
* config/arm/vfp.md (combine_vcvtf2i): Define new instruction.
gcc/testsuite/
2013-12-24 Renlin Li <Renlin.Li@arm.com>
* gcc.target/arm/fixed_float_conversion.c: New test case.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206195 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206126 138bc75d-0d04-0410-961f-82ee72b054a4
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PR target/59142
gcc/
* arm/predicates.md (arm_hard_general_register_operand): New
predicate.
(arm_hard_register_operand): Remove.
* config/arm/arm-ldmstm.ml: Use arm_hard_general_register_operand
for all patterns.
* config/arm/ldmstm.md: Regenerate.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206124 138bc75d-0d04-0410-961f-82ee72b054a4
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PR target/59142
* config/arm/predicates.md (vfp_hard_register_operand): New predicate.
* config/arm/arm.md (vfp_pop_multiple_with_writeback): Use
vfp_hard_register_operand.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206123 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/predicates.md (shiftable_operator_strict_it):
New predicate.
* config/arm/thumb2.md (thumb_andsi_not_shiftsi_si):
Disable cond_exec version for arm_restrict_it.
(thumb2_smaxsi3): Convert to generate cond_exec.
(thumb2_sminsi3): Likewise.
(thumb32_umaxsi3): Likewise.
(thumb2_uminsi3): Likewise.
(thumb2_abssi2): Adjust constraints for arm_restrict_it.
(thumb2_neg_abssi2): Likewise.
(thumb2_mov_scc): Add alternative for 16-bit encoding.
(thumb2_movsicc_insn): Adjust alternatives.
(thumb2_mov_negscc): Disable for arm_restrict_it.
(thumb2_mov_negscc_strict_it): New pattern.
(thumb2_mov_notscc_strict_it): New pattern.
(thumb2_mov_notscc): Disable for arm_restrict_it.
(thumb2_ior_scc): Likewise.
(thumb2_ior_scc_strict_it): New pattern.
(thumb2_cond_move): Adjust for arm_restrict_it.
(thumb2_cond_arith): Disable for arm_restrict_it.
(thumb2_cond_arith_strict_it): New pattern.
(thumb2_cond_sub): Adjust for arm_restrict_it.
(thumb2_movcond): Likewise.
(thumb2_extendqisi_v6): Disable cond_exec variant for arm_restrict_it.
(thumb2_zero_extendhisi2_v6): Likewise.
(thumb2_zero_extendqisi2_v6): Likewise.
(orsi_notsi_si): Likewise.
(orsi_not_shiftsi_si): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201122 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/predicates.md (arm_cond_move_operator): New predicate.
* config/arm/arm.md (movsfcc): Use arm_cond_move_operator predicate.
(movdfcc): Likewise.
* config/arm/vfp.md (*thumb2_movsf_vfp):
Disable predication for arm_restrict_it.
(*thumb2_movsfcc_vfp): Disable for arm_restrict_it.
(*thumb2_movdfcc_vfp): Likewise.
(*abssf2_vfp, *absdf2_vfp, *negsf2_vfp, *negdf2_vfp,*addsf3_vfp,
*adddf3_vfp, *subsf3_vfp, *subdf3_vfpc, *divsf3_vfp,*divdf3_vfp,
*mulsf3_vfp, *muldf3_vfp, *mulsf3negsf_vfp, *muldf3negdf_vfp,
*mulsf3addsf_vfp, *muldf3adddf_vfp, *mulsf3subsf_vfp,
*muldf3subdf_vfp, *mulsf3negsfaddsf_vfp, *fmuldf3negdfadddf_vfp,
*mulsf3negsfsubsf_vfp, *muldf3negdfsubdf_vfp, *fma<SDF:mode>4,
*fmsub<SDF:mode>4, *fnmsub<SDF:mode>4, *fnmadd<SDF:mode>4,
*extendsfdf2_vfp, *truncdfsf2_vfp, *extendhfsf2, *truncsfhf2,
*truncsisf2_vfp, *truncsidf2_vfp, fixuns_truncsfsi2, fixuns_truncdfsi2,
*floatsisf2_vfp, *floatsidf2_vfp, floatunssisf2, floatunssidf2,
*sqrtsf2_vfp, *sqrtdf2_vfp, *cmpsf_vfp, *cmpsf_trap_vfp, *cmpdf_vfp,
*cmpdf_trap_vfp, <vrint_pattern><SDF:mode>2):
Disable predication for arm_restrict_it.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200510 138bc75d-0d04-0410-961f-82ee72b054a4
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Permit virtual register pre-reload if !strict.
(coproc_secondary_reload_class): Adjust for neon_vector_mem_operand
change.
* config/arm/arm-protos.h (neon_vector_mem_operand): Adjust
prototype.
* config/arm/neon.md (movmisalign<mode>): Use
neon_perm_struct_or_reg_operand instead of
neon_struct_or_register_operand.
(*movmisalign<mode>_neon_load, *movmisalign<mode>_neon_store): Use
neon_permissive_struct_operand instead of neon_struct_operand.
* config/arm/constraints.md (Un, Um, Us): Adjust calls to
neon_vector_mem_operand.
* config/arm/predicates.md (neon_struct_operand): Adjust call to
neon_vector_mem_operand.
(neon_permissive_struct_operand): New.
(neon_struct_or_register_operand): Rename to...
(neon_perm_struct_or_reg_operand): This. Adjust call to
neon_vector_mem_operand.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@200172 138bc75d-0d04-0410-961f-82ee72b054a4
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2013-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/56315
* config/arm/arm.md (*xordi3_insn): Change to insn_and_split.
(xordi3): Change operand 2 constraint to arm_xordi_operand.
* config/arm/arm.c (const_ok_for_dimode_op): Handle XOR.
* config/arm/constraints.md (Dg): New constraint.
* config/arm/neon.md (xordi3_neon): Remove.
(neon_veor<mode>): Generate xordi3 instead of xordi3_neon.
* config/arm/predicates.md (arm_xordi_operand): New predicate.
gcc/testsuite
2013-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/56315
* gcc.target/arm/xordi3-opt.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199814 138bc75d-0d04-0410-961f-82ee72b054a4
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2013-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/56315
* config/arm/arm.c (const_ok_for_dimode_op): Handle IOR.
* config/arm/arm.md (*iordi3_insn): Change to insn_and_split.
* config/arm/neon.md (iordi3_neon): Remove.
(neon_vorr<mode>): Generate iordi3 instead of iordi3_neon.
* config/arm/predicates.md (imm_for_neon_logic_operand):
Move to earlier in the file.
(neon_logic_op2): Likewise.
(arm_iordi_operand_neon): New predicate.
gcc/testsuite/
2013-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/56315
* gcc.target/arm/iordi3-opt.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199527 138bc75d-0d04-0410-961f-82ee72b054a4
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2013-05-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/19599
* config/arm/predicates.md (call_insn_operand): New predicate.
* config/arm/constraints.md ("Cs", "Ss"): New constraints.
* config/arm/arm.md (*call_insn, *call_value_insn): Match only
if insn is not a tail call.
(*sibcall_insn, *sibcall_value_insn): Adjust for tailcalling through
registers.
* config/arm/arm.h (enum reg_class): New caller save register class.
(REG_CLASS_NAMES): Likewise.
(REG_CLASS_CONTENTS): Likewise.
* config/arm/arm.c (arm_function_ok_for_sibcall): Allow tailcalling
without decls.
2013-05-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/19599
* gcc.target/arm/pr40887.c: Adjust testcase.
* gcc.target/arm/pr19599.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@198928 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/arm.c (const_ok_for_dimode_op): Handle AND case.
* config/arm/arm.md (*anddi3_insn): Change to insn_and_split.
* config/arm/constraints.md (De): New constraint.
* config/arm/neon.md (anddi3_neon): Delete.
(neon_vand<mode>): Expand to standard anddi3 pattern.
* config/arm/predicates.md (imm_for_neon_inv_logic_operand):
Move earlier in the file.
(neon_inv_logic_op2): Likewise.
(arm_anddi_operand_neon): New predicate.
testsuite:
* gcc.target/arm/anddi3-opt.c: New test.
* gcc.target/arm/anddi3-opt2.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@197965 138bc75d-0d04-0410-961f-82ee72b054a4
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2013-03-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.md (f_sels, f_seld): New types.
(*cmov<mode>): New pattern.
* config/arm/predicates.md (arm_vsel_comparison_operator): New
predicate.
gcc/testsuite/
2013-03-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/arm/vseleqdf.c: New test.
* gcc.target/arm/vseleqsf.c: Likewise.
* gcc.target/arm/vselgedf.c: Likewise.
* gcc.target/arm/vselgesf.c: Likewise.
* gcc.target/arm/vselgtdf.c: Likewise.
* gcc.target/arm/vselgtsf.c: Likewise.
* gcc.target/arm/vselledf.c: Likewise.
* gcc.target/arm/vsellesf.c: Likewise.
* gcc.target/arm/vselltdf.c: Likewise.
* gcc.target/arm/vselltsf.c: Likewise.
* gcc.target/arm/vselnedf.c: Likewise.
* gcc.target/arm/vselnesf.c: Likewise.
* gcc.target/arm/vselvcdf.c: Likewise.
* gcc.target/arm/vselvcsf.c: Likewise.
* gcc.target/arm/vselvsdf.c: Likewise.
* gcc.target/arm/vselvssf.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@197052 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@195098 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@194903 138bc75d-0d04-0410-961f-82ee72b054a4
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Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm-protos.h (offset_ok_for_ldrd_strd): New
declaration.
(operands_ok_ldrd_strd): Likewise.
* config/arm/arm.c (offset_ok_for_ldrd_strd): New function.
(operands_ok_ldrd_strd): Likewise.
* config/arm/arm.md (thumb2_ldrd, thumb2_ldrd_base): New patterns.
(thumb2_ldrd_base_neg): Likewise.
(thumb2_strd, thumb2_strd_base, thumb_strd_base_neg): Likewise.
* predicates.md (ldrd_strd_offset_operand): New predicate.
* config/arm/constraints.md (Do): New constraint.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@192678 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/arm.c (arm_rtx_costs_1): Handle vec_extract and vec_set
patterns.
* config/arm/arm.md ("vec_set<mode>_internal"): Support memory source
operands, implemented via vld1 instruction.
("vec_extract<mode>"): Support memory destination operands, implemented
via vst1 instruction.
("neon_vst1_lane<mode>"): Use UNSPEC_VST1_LANE instead of vec_select.
* config/arm/predicates.md ("neon_lane_number"): Remove.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@191400 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/arm.c: Use CONST_INT_P, CONST_DOUBLE_P, REG_P, MEM_P,
LABEL_P, JUMP_P, CALL_P, NOTE_P, BARRIER_P consistently.
* config/arm/arm.h: Use REG_P, MEM_P consistently.
* config/arm/arm.md: Use CONST_INT_P, REG_P, MEM_P, CONST_DOUBLE_P
consistently.
* config/arm/neon.md: Use REG_P consistently.
* config/arm/predicates.md: Use CONST_INT_P, REG_P, MEM_P
consistently.
* config/arm/thumb2.md: Use CONST_INT_P, REG_P consistently.
* config/arm/vec-common.md: Use REG_P consistently.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@191034 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/arm-protos.h (const_ok_for_dimode_op): New prototype.
* config/arm/arm.c (const_ok_for_dimode_op): New function.
* config/arm/constraints.md (Dd): New constraint.
* config/arm/predicates.md (arm_adddi_operand): New predicate.
* config/arm/arm.md (adddi3): Extend it to handle constants.
(arm_adddi3): Likewise.
(addsi3_carryin_<optab>): Extend it to handle sbc case.
(addsi3_carryin_alt2_<optab>): Likewise.
* config/arm/neon.md (adddi3_neon): Extend it to handle constants.
* gcc.target/arm/pr53447-1.c: New testcase.
* gcc.target/arm/pr53447-2.c: New testcase.
* gcc.target/arm/pr53447-3.c: New testcase.
* gcc.target/arm/pr53447-4.c: New testcase.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@189102 138bc75d-0d04-0410-961f-82ee72b054a4
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and a new function that emits RTL for this pattern. This function is a
helper for epilogue extension. It is used by a later patch.
gcc/
2012-06-18 Ian Bolton <ian.bolton@arm.com>
Sameera Deshpande <sameera.deshpande@arm.com>
Greta Yorsh <greta.yorsh@arm.com>
* config/arm/arm.md (vfp_pop_multiple_with_writeback) New
define_insn.
* config/arm/predicates.md (pop_multiple_fp) New special predicate.
* config/arm/arm.c (arm_emit_vfp_multi_reg_pop): New function.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@188740 138bc75d-0d04-0410-961f-82ee72b054a4
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registers.
The patterns can handle pop multiple with writeback and return (loading into
PC directly).
To handle return, the patterns use a new special predicate
pop_multiple_return, that uses ldm_stm_operation_p function from a previous
patch. To output assembly, the patterns use a new function
arm_output_multireg_pop.
This patch also adds a new function arm_emit_multi_reg_pop
that emits RTL that matches the new pop patterns for integer registers.
This is a helper function for epilogue expansion. It is used by a later
patch.
2012-06-18 Ian Bolton <ian.bolton@arm.com>
Sameera Deshpande <sameera.deshpande@arm.com>
Greta Yorsh <greta.yorsh@arm.com>
* config/arm/arm.md (load_multiple_with_writeback) New define_insn.
(load_multiple, pop_multiple_with_writeback_and_return) Likewise.
(pop_multiple_with_return, ldr_with_return) Likewise.
* config/arm/predicates.md (pop_multiple_return) New special predicate.
* config/arm/arm-protos.h (arm_output_multireg_pop) New declaration.
* config/arm/arm.c (arm_output_multireg_pop) New function.
(arm_emit_multi_reg_pop): New function.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@188739 138bc75d-0d04-0410-961f-82ee72b054a4
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(subsf3, subdf3): Likewise.
(mulsf3, muldf3): Likewise.
(difsf3, divdf3): Likewise.
(movsfcc, movdfcc): Likewise.
* predicates.md (f_register_operand): Delete.
(arm_float_rhs_operand): Delete.
(arm_float_add_operand): Delete.
(arm_float_compare_operand): Use s_register_operand when
there's no VFP.
(cirrus_register_operand): Delete.
(cirrus_fp_register): Delete.
(cirrus_shift_const): Delete.
(cmpdi_operand): Remove Maverick support.
* constraints.md (f, v, H): Delete constraints.
(G): Update documentation.
* arm.c (fp_consts_inited): Convert to bool.
(strings_fp): Delete.
(values_fp): Delete.
(value_fp0): New variable.
(init_fp_table): Simplify logic.
(arm_const_double_rtx): Likewise.
(fp_immediate_constant): Likewise.
(fp_const_from_val): Likewise.
(neg_const_double_rtx_ok_for_fpa): Delete.
* doc/md.texi (ARM constraints): Update documentation.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@188662 138bc75d-0d04-0410-961f-82ee72b054a4
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(arm_arch_iwmmxt2): New variable.
(arm_option_override): Enable use of iWMMXt with VFP.
Disable use of iWMMXt with NEON. Disable use of iWMMXt under
Thumb mode. Set arm_arch_iwmmxt2.
(arm_expand_binop_builtin): Accept VOIDmode op.
(enum arm_builtins): Revise built-in fcode.
(IWMMXT2_BUILTIN): New define.
(IWMMXT2_BUILTIN2): Likewise.
(iwmmx2_mbuiltin): Likewise.
(builtin_description bdesc_2arg): Revise built in declaration.
(builtin_description bdesc_1arg): Likewise.
(arm_init_iwmmxt_builtins): Revise built in initialization.
(arm_expand_builtin): Revise built in expansion.
(arm_output_iwmmxt_shift_immediate): New function.
(arm_output_iwmmxt_tinsr): Likewise.
* config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Declare.
(arm_output_iwmmxt_tinsr): Likewise.
* config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant.
(iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete.
(rorv4hi3, rorv2si3, rordi3): Likewise.
(rorv4hi3_di, rorv2si3_di, rordi3_di): Likewise.
(ashrv4hi3_di, ashrv2si3_di, ashrdi3_di): Likewise.
(lshrv4hi3_di, lshrv2si3_di, lshrdi3_di): Likewise.
(ashlv4hi3_di, ashlv2si3_di, ashldi3_di): Likewise.
(iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi): Likewise
(*iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Likewise.
(tbcstv8qi, tbcstv4hi, tbsctv2si): New pattern.
(iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): Likewise.
(*and<mode>3_iwmmxt, *ior<mode>3_iwmmxt, *xor<mode>3_iwmmxt): Likewise.
(ror<mode>3, ror<mode>3_di): Likewise.
(ashr<mode>3_di, lshr<mode>3_di, ashl<mode>3_di): Likewise.
(ashli<mode>3_iwmmxt, iwmmxt_waligni, iwmmxt_walignr): Likewise.
(iwmmxt_walignr0, iwmmxt_walignr1): Likewise.
(iwmmxt_walignr2, iwmmxt_walignr3): Likewise.
(iwmmxt_setwcgr0, iwmmxt_setwcgr1): Likewise.
(iwmmxt_setwcgr2, iwmmxt_setwcgr3): Likewise.
(iwmmxt_getwcgr0, iwmmxt_getwcgr1): Likewise.
(iwmmxt_getwcgr2, iwmmxt_getwcgr3): Likewise.
(All instruction patterns): Add wtype attribute.
(*iwmmxt_arm_movdi, *iwmmxt_movsi_insn): iWMMXt coexist with vfp.
(iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3): Revise the pattern.
(iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3): Likewise.
(ashr<mode>3_iwmmxt, ashl<mode>3_iwmmxt, lshr<mode>3_iwmmxt): Likewise.
(iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw):Likewise.
(eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3): Likewise.
(gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3): Likewise.
(iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilh): Likewise.
(iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh): Likewise.
(iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh): Likewise.
(iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh): Likewise.
(iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh): Likewise.
(iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu): Likewise.
(iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Likewise.
(iwmmxt2.md): Include.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __IWMMXT2__.
(TARGET_IWMMXT2): New define.
(TARGET_REALLY_IWMMXT2): Likewise.
(arm_arch_iwmmxt2): Declare.
* config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt intrinsics.
Use __IWMMXT2__ to enable iWMMXt2 intrinsics.
Use C name-mangling for intrinsics.
(__v8qi): Redefine.
(_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise.
(_mm_sad_pu16, _mm_align_si64, _mm_setwcx, _mm_getwcx): Likewise.
(_m_from_int): Likewise.
(_mm_sada_pu8, _mm_sada_pu16): New intrinsic.
(_mm_alignr0_si64, _mm_alignr1_si64, _mm_alignr2_si64): Likewise.
(_mm_alignr3_si64, _mm_tandcb, _mm_tandch, _mm_tandcw): Likewise.
(_mm_textrcb, _mm_textrch, _mm_textrcw, _mm_torcb): Likewise.
(_mm_torch, _mm_torcw, _mm_tbcst_pi8, _mm_tbcst_pi16): Likewise.
(_mm_tbcst_pi32): Likewise.
(_mm_abs_pi8, _mm_abs_pi16, _mm_abs_pi32): New iWMMXt2 intrinsic.
(_mm_addsubhx_pi16, _mm_absdiff_pu8, _mm_absdiff_pu16): Likewise.
(_mm_absdiff_pu32, _mm_addc_pu16, _mm_addc_pu32): Likewise.
(_mm_avg4_pu8, _mm_avg4r_pu8, _mm_maddx_pi16, _mm_maddx_pu16): Likewise.
(_mm_msub_pi16, _mm_msub_pu16, _mm_mulhi_pi32): Likewise.
(_mm_mulhi_pu32, _mm_mulhir_pi16, _mm_mulhir_pi32): Likewise.
(_mm_mulhir_pu16, _mm_mulhir_pu32, _mm_mullo_pi32): Likewise.
(_mm_qmulm_pi16, _mm_qmulm_pi32, _mm_qmulmr_pi16): Likewise.
(_mm_qmulmr_pi32, _mm_subaddhx_pi16, _mm_addbhusl_pu8): Likewise.
(_mm_addbhusm_pu8, _mm_qmiabb_pi32, _mm_qmiabbn_pi32): Likewise.
(_mm_qmiabt_pi32, _mm_qmiabtn_pi32, _mm_qmiatb_pi32): Likewise.
(_mm_qmiatbn_pi32, _mm_qmiatt_pi32, _mm_qmiattn_pi32): Likewise.
(_mm_wmiabb_si64, _mm_wmiabbn_si64, _mm_wmiabt_si64): Likewise.
(_mm_wmiabtn_si64, _mm_wmiatb_si64, _mm_wmiatbn_si64): Likewise.
(_mm_wmiatt_si64, _mm_wmiattn_si64, _mm_wmiawbb_si64): Likewise.
(_mm_wmiawbbn_si64, _mm_wmiawbt_si64, _mm_wmiawbtn_si64): Likewise.
(_mm_wmiawtb_si64, _mm_wmiawtbn_si64, _mm_wmiawtt_si64): Likewise.
(_mm_wmiawttn_si64, _mm_merge_si64): Likewise.
(_mm_torvscb, _mm_torvsch, _mm_torvscw): Likewise.
(_m_to_int): New define.
* config/arm/arm-cores.def (iwmmxt2): Add FL_IWMMXT2.
* config/arm/arm-arches.def (iwmmxt2): Likewise.
* config/arm/t-arm (MD_INCLUDES): Add marvell-f-iwmmxt.md and
iwmmxt2.md.
* config/arm/arm.md (marvell-f-iwmmxt.md): Include.
(arch): Add "iwmmxt2".
(arch_enabled): Handle "iwmmxt2".
(wtype): New attribute.
(UNSPEC_WMADDS, UNSPEC_WMADDU): Delete.
(UNSPEC_WALIGNI): New unspec.
* config/arm/predicates.md (imm_or_reg_operand): New predicate.
* config/arm/iterators.md (VMMX2): New mode_iterator.
* config/arm/marvell-f-iwmmxt.md: New file.
* config/arm/iwmmxt2.md: New file.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@188497 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/arm.c (neon_valid_immediate): Allow const_int.
(arm_print_operand): Add 'x' format.
* config/arm/constraints.md (Dn): Allow const_int.
* config/arm/neon.md (neon_mov<mode>): Use VDX to allow DImode.
Use 'x' format to print constants.
* config/arm/predicates.md (imm_for_neon_mov_operand): Allow const_int.
* config/arm/vfp.md (movdi_vfp): Disable for const_int when neon
is enabled.
(movdi_vfp_cortexa8): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@186983 138bc75d-0d04-0410-961f-82ee72b054a4
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Sameera Deshpande <sameera.deshpande at arm.com>
Greta Yorsh <greta.yorsh at arm.com>
* config/arm/arm-protos.h (ldm_stm_operation_p): New parameters.
* config/arm/arm.c (ldm_stm_operation_p): New parameters.
* config/arm/predicates.md (load_multiple_operation): Add arguments.
(store_multiple_operation): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@186981 138bc75d-0d04-0410-961f-82ee72b054a4
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Sameera Deshpande <sameera.deshpande at arm.com>
Greta Yorsh <greta.yorsh at arm.com>
* config/arm/arm-protos.h (ldm_stm_operation_p): New declaration.
* config/arm/arm.c (ldm_stm_operation_p): New function.
* config/arm/predicates.md (load_multiple_operation): Update predicate.
(store_multiple_operation): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@186980 138bc75d-0d04-0410-961f-82ee72b054a4
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* arm/neon.md (neon_vceq<mode>, neon_vcge<mode>): Use
reg_or_zero_operand predicate.
(neon_vcle<mode>, neon_vclt<mode>): Use zero_operand predicate.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@185573 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/arm.c (arm_sat_operator_match): New function.
* config/arm/arm-protos.h (arm_sat_operator_match): Add prototype.
* config/arm/arm.md ("insn" attribute): Add "sat" value.
("SAT", "SATrev"): New code iterators.
("SATlo", "SAThi"): New code iterator attributes.
("*satsi_<SAT:code>"): New pattern.
("*satsi_<SAT:code>_shift"): Likewise.
* config/arm/arm-fixed.md ("arm_ssatsihi_shift"): Add "insn"
and "shift" attributes.
("arm_usatsihi"): Add "insn" attribute.
* config/arm/predicates.md (sat_shift_operator): Allow multiplication
by powers of two. Do not allow shift by 32.
gcc/testsuite/
* gcc.target/arm/sat-1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@184803 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/arm.c (arm_gen_compare_reg): Add scratch argument;
use it if reload_completed.
(arm_legitimize_sync_memory, arm_emit, arm_insn_count, arm_count,
arm_output_asm_insn, arm_process_output_memory_barrier,
arm_output_memory_barrier, arm_ldrex_suffix, arm_output_ldrex,
arm_output_strex, arm_output_it, arm_output_op2, arm_output_op3,
arm_output_sync_loop, arm_get_sync_operand, FETCH_SYNC_OPERAND,
arm_process_output_sync_insn, arm_output_sync_insn,
arm_sync_loop_insns, arm_call_generator, arm_expand_sync): Remove.
(arm_pre_atomic_barrier, arm_post_atomic_barrier): New.
(arm_emit_load_exclusive, arm_emit_store_exclusive): New.
(emit_unlikely_jump): New.
(arm_expand_compare_and_swap, arm_split_compare_and_swap): New.
(arm_split_atomic_op): New.
* config/arm/arm-protos.h: Update.
* config/arm/arm.h (enum arm_sync_generator_tag): Remove.
(struct arm_sync_generator): Remove.
* config/arm/arm.md (VUNSPEC_SYNC_COMPARE_AND_SWAP, VUNSPEC_SYNC_LOCK,
VUNSPEC_SYNC_OP, VUNSPEC_SYNC_NEW_OP, VUNSPEC_SYNC_OLD_OP): Remove.
(VUNSPEC_ATOMIC_CAS, VUNSPEC_ATOMIC_XCHG, VUNSPEC_ATOMIC_OP): New.
(VUNSPEC_LL, VUNSPEC_SC): New.
(sync_result, sync_memory, sync_required_value, sync_new_value,
sync_t1, sync_t2, sync_release_barrier, sync_op): Remove.
(attr length): Don't use arm_sync_loop_insns.
(cbranch_cc, cstore_cc): Update call to arm_gen_compare_reg.
(movsfcc, movdfcc): Likewise.
* config/arm/constraints.md (Ua): New.
* config/arm/prediates.md (mem_noofs_operand): New.
(sync_compare_and_swap<QHSD>, sync_lock_test_and_set<QHSD>): Remove.
(sync_clobber, sync_t2_reqd): Remove.
(sync_<syncop><QHSD>, sync_nand<QHSD>): Remove.
(sync_new_<syncop><QHSD>, sync_new_nand<QHSD>): Remove.
(sync_old_<syncop><QHSD>, sync_old_nand<QHSD>): Remove.
(arm_sync_compare_and_swap<SIDI>): Remove.
(arm_sync_compare_and_swap<NARROW>): Remove.
(arm_sync_lock_test_and_set<SIDI>): Remove.
(arm_sync_lock_test_and_set<NARROW>): Remove.
(arm_sync_new_<syncop><SIDI>): Remove.
(arm_sync_new_<syncop><NARROW>): Remove.
(arm_sync_new_nand<SIDI>): Remove.
(arm_sync_new_nand<NARROW>): Remove.
(arm_sync_old_<syncop><SIDI>): Remove.
(arm_sync_old_<syncop><NARROW>): Remove.
(arm_sync_old_nand<SIDI>): Remove.
(arm_sync_old_nand<NARROW>): Remove.
(*memory_barrier): Merge arm_output_memory_barrier.
(atomic_compare_and_swap<QHSD>): New.
(atomic_compare_and_swap<NARROW>_1): New.
(atomic_compare_and_swap<SIDI>_1): New.
(atomic_exchange<QHSD>): New.
(cas_cmp_operand, cas_cmp_str): New.
(atomic_op_operand, atomic_op_str): New.
(atomic_<syncop><QHSD>, atomic_nand<QHSD>): New.
(atomic_fetch_<syncop><QHSD>, atomic_fetch_nand<QHSD>): New.
(atomic_<syncop>_fetch<QHSD>, atomic_nand_fetch<QHSD>): New.
(arm_load_exclusive<NARROW>): New.
(arm_load_exclusivesi, arm_load_exclusivedi): New.
(arm_store_exclusive<QHSD>): New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@183050 138bc75d-0d04-0410-961f-82ee72b054a4
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2011-12-05 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
* config/arm/arm.c (vfp3_const_double_for_fract_bits): Define.
* config/arm/arm-protos.h (vfp3_const_double_for_fract_bits): Declare.
* config/arm/constraints.md ("Dt"): New constraint.
* config/arm/predicates.md (const_double_vcvt_power_of_two_reciprocal):
New.
* config/arm/vfp.md (*arm_combine_vcvt_f32_s32): New.
(*arm_combine_vcvt_f32_u32): New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182005 138bc75d-0d04-0410-961f-82ee72b054a4
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vec_widen_sshiftl_hi, vec_widen_sshiftl_lo): Document.
* tree-pretty-print.c (dump_generic_node): Handle WIDEN_LSHIFT_EXPR,
VEC_WIDEN_LSHIFT_HI_EXPR and VEC_WIDEN_LSHIFT_LO_EXPR.
(op_code_prio): Likewise.
(op_symbol_code): Handle WIDEN_LSHIFT_EXPR.
* optabs.c (optab_for_tree_code): Handle
VEC_WIDEN_LSHIFT_HI_EXPR and VEC_WIDEN_LSHIFT_LO_EXPR.
(init-optabs): Initialize optab codes for vec_widen_u/sshiftl_hi/lo.
* optabs.h (enum optab_index): Add OTI_vec_widen_u/sshiftl_hi/lo.
* genopinit.c (optabs): Initialize the new optabs.
* expr.c (expand_expr_real_2): Handle
VEC_WIDEN_LSHIFT_HI_EXPR and VEC_WIDEN_LSHIFT_LO_EXPR.
* gimple-pretty-print.c (dump_binary_rhs): Likewise.
* tree-vectorizer.h (NUM_PATTERNS): Increase to 8.
* tree.def (WIDEN_LSHIFT_EXPR, VEC_WIDEN_LSHIFT_HI_EXPR,
VEC_WIDEN_LSHIFT_LO_EXPR): New.
* cfgexpand.c (expand_debug_expr): Handle new tree codes.
* tree-vect-patterns.c (vect_vect_recog_func_ptrs): Add
vect_recog_widen_shift_pattern.
(vect_handle_widen_mult_by_const): Rename...
(vect_handle_widen_op_by_const): ...to this. Handle shifts.
Add a new argument, update documentation.
(vect_recog_widen_mult_pattern): Assume that only second
operand can be constant. Update call to
vect_handle_widen_op_by_const.
(vect_recog_over_widening_pattern): Fix typo.
(vect_recog_widen_shift_pattern): New.
* tree-vect-stmts.c (vectorizable_type_promotion): Handle
widening shifts.
(supportable_widening_operation): Likewise.
* tree-inline.c (estimate_operator_cost): Handle new tree codes.
* tree-vect-generic.c (expand_vector_operations_1): Likewise.
* tree-cfg.c (verify_gimple_assign_binary): Likewise.
* config/arm/neon.md (neon_vec_<US>shiftl_<mode>): New.
(vec_widen_<US>shiftl_lo_<mode>, neon_vec_<US>shiftl_hi_<mode>,
vec_widen_<US>shiftl_hi_<mode>, neon_vec_<US>shift_left_<mode>):
Likewise.
* config/arm/predicates.md (const_neon_scalar_shift_amount_operand):
New.
* config/arm/iterators.md (V_innermode): New.
* tree-vect-slp.c (vect_build_slp_tree): Require same shift operand
for widening shift.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180128 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/arm/predicates.md (shift_amount_operand): Remove constant
range check.
(shift_operator): Check range of constants for all shift operators.
gcc/testsuite/
* gcc.dg/pr50193-1.c: New file.
* gcc.target/arm/shiftable.c: New file.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179661 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179378 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/predicates.md (expandable_comparison_operator): New
predicate, extracted from...
(arm_comparison_operator): ...here.
* config/arm/arm.md (cbranchsi4, cbranchsf4, cbranchdf4, cbranchdi4)
(cstoresi4, cstoresf4, cstoredf4, cstoredi4, movsicc, movsfcc)
(movdfcc): Use expandable_comparison_operator.
gcc/testsuite/
* gcc.target/arm/cmp-1.c: New test.
* gcc.target/arm/cmp-2.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179082 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/arm/predicates.md (shift_amount_operand): Check constant
shift count is in range.
(const_shift_operand): Remove.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@178966 138bc75d-0d04-0410-961f-82ee72b054a4
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PR target/49030
* config/arm/arm-protos.h (maybe_get_arm_condition_code): Declare.
* config/arm/arm.c (maybe_get_arm_condition_code): New function,
reusing the old code from get_arm_condition_code. Return ARM_NV
for invalid comparison codes.
(get_arm_condition_code): Redefine in terms of
maybe_get_arm_condition_code.
* config/arm/predicates.md (arm_comparison_operator): Use
maybe_get_arm_condition_code.
gcc/testsuite/
PR target/49030
* gcc.dg/torture/pr49030.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@178636 138bc75d-0d04-0410-961f-82ee72b054a4
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* configure.ac (fixed-point): Add ARM support.
* configure: Regenerate.
* config/arm/arm.c (arm_fixed_mode_set): New struct.
(arm_set_fixed_optab_libfunc): New.
(arm_set_fixed_conv_libfunc): New.
(arm_init_libfuncs): Initialise fixed-point helper libfuncs with
ARM-specific names.
(aapcs_libcall_value): Return sub-word-size fixed-point libcall
return values in SImode.
(arm_return_in_msb): Return fixed-point types in the msb.
(arm_pad_reg_upwards, arm_pad_arg_upwards): Pad fixed-point types
upwards.
(arm_scalar_mode_supported_p): Support fixed-point modes.
(arm_vector_mode_supported_p): Support vector fixed-point modes.
* config/arm/arm.h (SHORT_FRACT_TYPE_SIZE, FRACT_TYPE_SIZE)
(LONG_FRACT_TYPE_SIZE, LONG_LONG_FRACT_TYPE_SIZE)
(SHORT_ACCUM_TYPE_SIZE, ACCUM_TYPE_SIZE, LONG_ACCUM_TYPE_SIZE)
(LONG_LONG_ACCUM_TYPE_SIZE, MAX_FIXED_MODE_SIZE): Define.
* config/arm/iterators.md (FIXED, ADDSUB, UQADDSUB, QADDSUB, QMUL):
New mode iterators.
(qaddsub_suf): New mode attribute.
* config/arm/arm-modes.def (FRACT, UFRACT, ACCUM, UACCUM): Declare
vector modes.
* config/arm/predicates.md (sat_shift_operator): New predicate.
* config/arm/arm-fixed.md: New.
* config/arm/arm.md: Include arm-fixed.md.
* config/arm/t-arm (MD_INCLUDES): Add arm-fixed.md.
libgcc/
* config.host (arm*-*-linux*, arm*-*-uclinux*, arm*-*-eabi*)
(arm*-*-symbianelf*): Add t-fixedpoint-gnu-prefix makefile fragment.
* config/arm/bpabi-lib.h (LIBGCC2_FIXEDBIT_GNU_PREFIX): Define.
gcc/testsuite/
* gcc.target/arm/fixed-point-exec.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@177025 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/predicates.md (neon_struct_operand): Make a normal
predicate.
(neon_struct_or_register_operand): New predicate.
* config/arm/neon.md (movmisalign<mode>): Replace predicates
with neon_struct_or_register_operand.
(*movmisalign<mode>_neon_store, *movmisalign<mode>_neon_load): Use
neon_struct_operand instead of memory_operand.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@176204 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/arm.c (arm_output_function_prologue): Don't call
thumb1_output_function_prologue.
(arm_expand_prologue): Avoid dead store.
(number_of_first_bit_set): Use ctz_hwi.
(thumb1_emit_multi_reg_push): New.
(thumb1_expand_prologue): Merge thumb1_output_function_prologue
to emit the entire prologue as rtl.
(thumb1_output_interwork): Split out from
thumb1_output_function_prologue.
(thumb1_output_function_prologue): Remove.
(arm_attr_length_push_multi): Handle thumb1.
* config/arm/arm.md (VUNSPEC_THUMB1_INTERWORK): New.
(prologue_thumb1_interwork): New.
(*push_multi): Allow thumb1; use push_mult_memory_operand.
* config/arm/predicates.md (push_mult_memory_operand): New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@175605 138bc75d-0d04-0410-961f-82ee72b054a4
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2011-06-24 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
PR target/49335
* config/arm/predicates.md (add_operator): New.
* config/arm/arm.md ("*arith_shiftsi"): Fix for SP reg usage
in Thumb2.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@175375 138bc75d-0d04-0410-961f-82ee72b054a4
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Dmitry Melnik <dm@ispras.ru>
* config/arm/arm.c (neon_immediate_valid_for_shift): New function.
(neon_output_shift_immediate): Ditto.
* config/arm/arm-protos.h (neon_immediate_valid_for_shift): New
prototype.
(neon_output_shift_immediate): Ditto.
* config/arm/neon.md (vashl<mode>3): Modified constraint.
(vashr<mode>3_imm): New insn pattern.
(vlshr<mode>3_imm): Ditto.
(vashr<mode>3): Modified constraint.
(vlshr<mode>3): Ditto.
* config/arm/predicates.md (imm_for_neon_lshift_operand): New
predicate.
(imm_for_neon_rshift_operand): Ditto.
(imm_lshift_or_reg_neon): Ditto.
(imm_rshift_or_reg_neon): Ditto.
* optabs.c (init_optabs): Init optab codes for vashl, vashr, vlshr.
testsuite:
* gcc.target/arm/neon-vshr-imm-1.c: New testcase.
* gcc.target/arm/neon-vshl-imm-1.c: New testcase.
* gcc.target/arm/neon-vlshr-imm-1.c: New testcase.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@175293 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/arm.c (arm_print_operand): Use MEM_SIZE to get the
size of a '%A' memory reference.
(T_DREG, T_QREG): New neon_builtin_type_bits.
(arm_init_neon_builtins): Assert that the load and store operands
are neon_struct_operands.
(locate_neon_builtin_icode): Provide the neon_builtin_type_bits.
(NEON_ARG_MEMORY): New builtin_arg.
(neon_dereference_pointer): New function.
(arm_expand_neon_args): Add a neon_builtin_type_bits argument.
Handle NEON_ARG_MEMORY.
(arm_expand_neon_builtin): Update after above interface changes.
Use NEON_ARG_MEMORY for loads and stores.
* config/arm/predicates.md (neon_struct_operand): New predicate.
* config/arm/iterators.md (V_two_elem): Tweak formatting.
(V_three_elem): Use BLKmode for accesses that have no associated mode.
(V_four_elem): Tweak formatting.
* config/arm/neon.md (neon_vld1<mode>, neon_vld1_dup<mode>)
(neon_vst1_lane<mode>, neon_vst1<mode>, neon_vld2<mode>)
(neon_vld2_lane<mode>, neon_vld2_dup<mode>, neon_vst2<mode>)
(neon_vst2_lane<mode>, neon_vld3<mode>, neon_vld3_lane<mode>)
(neon_vld3_dup<mode>, neon_vst3<mode>, neon_vst3_lane<mode>)
(neon_vld4<mode>, neon_vld4_lane<mode>, neon_vld4_dup<mode>)
(neon_vst4<mode>): Replace pointer operand with a memory operand.
Use %A in the output template.
(neon_vld3qa<mode>, neon_vld3qb<mode>, neon_vst3qa<mode>)
(neon_vst3qb<mode>, neon_vld4qa<mode>, neon_vld4qb<mode>)
(neon_vst4qa<mode>, neon_vst4qb<mode>): Likewise, but halve
the width of the memory access. Remove post-increment.
* config/arm/neon-testgen.ml: Allow addresses to have an alignment.
gcc/testsuite/
* gcc.target/arm/neon-vld3-1.c: New test.
* gcc.target/arm/neon-vst3-1.c: New test.
* gcc.target/arm/neon/v*.c: Regenerate.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@172314 138bc75d-0d04-0410-961f-82ee72b054a4
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PR target/47553
* config/arm/predicates.md (neon_lane_number): Accept 0..15.
gcc/testsuite/
PR target/47553
* gcc.target/arm/neon-vld-1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@171344 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@168438 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/predicates.md ("vfp_register_operand"): Return true for
VFP_D0_D7_REGS classes.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@167334 138bc75d-0d04-0410-961f-82ee72b054a4
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