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* [ARM] PR target/79911: Invalid vec_select argumentsktkachov2017-03-131-24/+26
* [ARM] Implement support for ACLE Coprocessor CDP intrinsicsavieira2017-01-061-16/+16
* Update copyright years.jakub2017-01-011-1/+1
* gcc/tnfchris2016-11-011-0/+11
* With -fpu=neon DI mode shifts are expanded after reload. DI mode registers can wilco2016-10-251-22/+26
* [PATCH 9/17][ARM] Add NEON FP16 arithmetic instructions.mwahab2016-09-231-7/+452
* [PATCH 6/17][ARM] Add data processing intrinsics for float16_t.mwahab2016-09-231-37/+78
* [ARM][4/4] Simplify checks for CONST_INT_P and comparison against 1/0ktkachov2016-05-241-2/+2
* [ARM][2/4] Replace casts of 1 to HOST_WIDE_INT by HOST_WIDE_INT_1 and HOST_WI...ktkachov2016-05-241-1/+1
* 2016-04-25 Michael Collison <michael.collison@linaro.org>collison2016-04-251-3/+120
* * cgraph.c: Spelling fixes - behaviour -> behavior andjakub2016-02-111-1/+1
* [ARM] Remove neon_reinterpret, use castsalalaw012016-02-041-100/+0
* 2016-01-26 Christophe Lyon <christophe.lyon@linaro.org>clyon2016-01-261-9/+55
* Update copyright years.jakub2016-01-041-1/+1
* 2015-12-23 David Sherwood <david.sherwood@arm.com>davids2015-12-231-0/+11
* [ARM] Add patterns for new instructionsmwahab2015-12-161-0/+45
* [ARM] remove unused variablecbaylis2015-11-121-6/+0
* [ARM] PR63870 Remove error for invalid lane numberscbaylis2015-11-111-40/+8
* [ARM] PR63870 Mark lane indices of vldN/vstN with appropriate qualifiercbaylis2015-11-111-23/+59
* [PATCH][ARM]Add earlyclobber modifier for neon_(vtrn, vuzp, vzip)<mode>_insn rtxrenlin2015-10-091-6/+6
* [ARM] Remaining intrinsicsalalaw012015-09-081-45/+45
* * config/arm/arm.c (neon_element_bits): Replace call todavids2015-08-171-6/+6
* 2015-08-04 Christophe Lyon <christophe.lyon@linaro.org>clyon2015-08-041-1/+16
* [ARM] PR/63870 Add qualifier to check lane bounds in expandalalaw012015-07-271-36/+5
* [ARM]Remove vec_shr and vec_shr optabsalalaw012015-04-291-65/+0
* [ARM][trivial] Use uppercase for code iterator namesktkachov2015-04-241-5/+5
* [ARM] Rewrite vc<cond> NEON patterns to use RTL operations rather than UNSPECsktkachov2015-04-231-99/+105
* Update copyright years.jakub2015-01-051-1/+1
* [ARM Refactor Builtins: 1/8] Remove arm_neon.h's "Magic Words"jgreenhalgh2014-11-181-465/+428
* [ARM] Migrate to new reduc_[us](min|max)_scal_optabalalaw012014-11-041-32/+37
* [ARM] Migrate to new reduc_plus_scal_optabalalaw012014-11-041-20/+23
* gcc/ada/rsandifo2014-10-291-2/+2
* [ARM] Fix insn type of movmisalign neon load pattern.ktkachov2014-09-181-1/+1
* [ARM] Enable auto-vectorization for copysignfjiwang2014-09-091-0/+27
* [2/2] Vectorise lroundf, lfloorf, lceilf using the new ARMv8-A vcvt* instruct...ktkachov2014-09-021-0/+11
* PR target/61948cbaylis2014-07-311-2/+6
* gcc/rsandifo2014-05-281-1/+1
* [ARM] Vectorise bswap* in aarch32.ktkachov2014-05-271-0/+8
* [ARM] Remove builtins for vzup, vuzp, vtrn and cleanup.ktkachov2014-05-131-33/+0
* Neon intrinsics TLC - remove dead code.ramana2014-05-081-67/+12
* [ARM] Legitimize addresses for movmisalign<mode> for Neon.ramana2014-03-031-0/+11
* Update copyright years in gcc/rsandifo2014-01-021-1/+1
* 2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>ktkachov2013-12-191-5/+15
* [ARM] [Neon types 3/10] Update Current type attributes to new Neon Types.jgreenhalgh2013-10-151-585/+332
* [AArch64, AArch32][Insn classification refactoring 6/N] Remove "neon_type" at...jgreenhalgh2013-09-051-238/+237
* ChangeLog:xguo2013-08-091-5/+29
* 2013-08-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>ktkachov2013-08-081-5/+5
* PR target/57431rearnsha2013-08-081-12/+13
* * config/arm/arm.md (attribute "insn"): Delete.sofiane2013-07-221-4/+2
* * config/arm/arm.md (attribute "type"): Rename "simple_alu_imm" tosofiane2013-07-181-2/+2
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