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generated reload insns per insn is achieved (90))
gcc/
2015-05-06 Yvan Roux <yvan.roux@linaro.org>
PR target/64208
* config/arm/iwmmxt.md ("*iwmmxt_arm_movdi"): Cleanup redundant
alternatives.
gcc/testsuite/
2015-05-06 Yvan Roux <yvan.roux@linaro.org>
PR target/64208
* gcc.target/arm/pr64208.c: New test.
From-SVN: r222853
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From-SVN: r219188
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From-SVN: r206289
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gcc/
* config/arm/types.md (type): Rename fcpys to fmov.
* config/arm/vfp.md
(*arm_movsi_vfp): Rename type fcpys as fmov.
(*thumb2_movsi_vfp): Likewise
(*movhf_vfp_neon): Likewise
(*movhf_vfp): Likewise
(*movsf_vfp): Likewise
(*thumb2_movsf_vfp): Likewise
(*movsfcc_vfp): Likewise
(*thumb2_movsfcc_vfp): Likewise
* config/aarch64/aarch64-simd.md
(move_lo_quad_<mode>): Replace type mov_reg with fmovs.
* config/aarch64/aarch64.md
(*movsi_aarch64): Replace type mov_reg with fmovs.
(*movdi_aarch64): Likewise
(*movsf_aarch64): Likewise
(*movdf_aarch64): Likewise
* config/arm/arm.c
(cortexa7_older_only): Rename TYPE_FCPYS to TYPE_FMOV.
* config/arm/iwmmxt.md
(*iwmmxt_movsi_insn): Rename type fcpys as fmov.
* config/arm/arm1020e.md: Update with new attributes.
* config/arm/cortex-a15-neon.md: Update with new attributes.
* config/arm/cortex-a5.md: Update with new attributes.
* config/arm/cortex-a53.md: Update with new attributes.
* config/arm/cortex-a7.md: Update with new attributes.
* config/arm/cortex-a8-neon.md: Update with new attributes.
* config/arm/cortex-a9.md: Update with new attributes.
* config/arm/cortex-m4-fpu.md: Update with new attributes.
* config/arm/cortex-r4f.md: Update with new attributes.
* config/arm/marvell-pj4.md: Update with new attributes.
* config/arm/vfp11.md: Update with new attributes.
From-SVN: r202331
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attribute
gcc/
* config/aarch64/aarch64.md: Rename r_2_f and f_2_r where appropriate.
* config/arm/arm.md (attribute "neon_type"): Delete. Move attribute
values to config/arm/types.md. Update patterns where appropriate.
* config/arm/types.md (type): Add Neon types.
* config/arm/neon.md: Remove "neon_type" attribute,
use "type" attribute everywhere appropriate.
* doc/md.texi: Change references to neon_type to refer to type.
* config/arm/vfp.md: Update patterns for attribute changes.
* config/arm/arm.c (cortexa7_older_only): Update for attribute change.
* config/arm/arm1020e.md: Update for attribute change.
* config/arm/cortex-a15-neon.md: Update for attribute change.
* config/arm/cortex-a15.md: Update for attribute change.
* config/arm/cortex-a5.md: Update for attribute change.
* config/arm/cortex-a53.md: Update for attribute change.
* config/arm/cortex-a7.md: Update for attribute change.
* config/arm/cortex-a8-neon.md: Update for attribute change.
* config/arm/cortex-a8.md: Update for attribute change.
* config/arm/cortex-a9-neon.md: Update for attribute change.
* config/arm/cortex-a9.md: Update for attribute change.
* config/arm/cortex-m4-fpu.md: Update for attribute change.
* config/arm/cortex-r4f.md: Update for attribute change.
* config/arm/iterators.md: Update comment referring to neon_type.
* config/arm/iwmmxt.md: Update for attribute change.
* config/arm/marvell-pj4.md: Update for attribute change.
* config/arm/neon-schedgen.ml (emit_insn_reservations): Update for
attribute change.
* config/arm/vfp11.md: Update for attribute change.
Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
From-SVN: r202272
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* arm.md (attribute "wtype"): Delete. Move attribute values from here
to ...
(attribute "type"): ... here, and prefix with "wmmx_".
(attribute "core_cycles"): Update for attribute changes.
* iwmmxt.md (tbcstv8qi): Update for attribute changes.
(tbcstv4hi): Likewise.
(tbcstv2si): Likewise.
(iwmmxt_iordi3): Likewise.
(iwmmxt_xordi3): Likewise.
(iwmmxt_anddi3): Likewise.
(iwmmxt_nanddi3): Likewise.
(iwmmxt_arm_movdi): Likewise.
(iwmmxt_movsi_insn): Likewise.
(mov<mode>_internal): Likewise.
(and<mode>3_iwmmxt): Likewise.
(ior<mode>3_iwmmxt): Likewise.
(xor<mode>3_iwmmxt): Likewise.
(add<mode>3_iwmmxt): Likewise.
(ssaddv8qi3): Likewise.
(ssaddv4hi3): Likewise.
(ssaddv2si3): Likewise.
(usaddv8qi3): Likewise.
(usaddv4hi3): Likewise.
(usaddv2si3): Likewise.
(sub<mode>3_iwmmxt): Likewise.
(sssubv8qi3): Likewise.
(sssubv4hi3): Likewise.
(sssubv2si3): Likewise.
(ussubv8qi3): Likewise.
(ussubv4hi3): Likewise.
(ussubv2si3): Likewise.
(mulv4hi3_iwmmxt): Likewise.
(smulv4hi3_highpart): Likewise.
(umulv4hi3_highpart): Likewise.
(iwmmxt_wmacs): Likewise.
(iwmmxt_wmacsz): Likewise.
(iwmmxt_wmacu): Likewise.
(iwmmxt_wmacuz): Likewise.
(iwmmxt_clrdi): Likewise.
(iwmmxt_clrv8qi): Likewise.
(iwmmxt_clr4hi): Likewise.
(iwmmxt_clr2si): Likewise.
(iwmmxt_uavgrndv8qi3): Likewise.
(iwmmxt_uavgrndv4hi3): Likewise.
(iwmmxt_uavgv8qi3): Likewise.
(iwmmxt_uavgv4hi3): Likewise.
(iwmmxt_tinsrb): Likewise.
(iwmmxt_tinsrh): Likewise.
(iwmmxt_tinsrw): Likewise.
(iwmmxt_textrmub): Likewise.
(iwmmxt_textrmsb): Likewise.
(iwmmxt_textrmuh): Likewise.
(iwmmxt_textrmsh): Likewise.
(iwmmxt_textrmw): Likewise.
(iwmxxt_wshufh): Likewise.
(eqv8qi3): Likewise.
(eqv4hi3): Likewise.
(eqv2si3): Likewise.
(gtuv8qi3): Likewise.
(gtuv4hi3): Likewise.
(gtuv2si3): Likewise.
(gtv8qi3): Likewise.
(gtv4hi3): Likewise.
(gtv2si3): Likewise.
(smax<mode>3_iwmmxt): Likewise.
(umax<mode>3_iwmmxt): Likewise.
(smin<mode>3_iwmmxt): Likewise.
(umin<mode>3_iwmmxt): Likewise.
(iwmmxt_wpackhss): Likewise.
(iwmmxt_wpackwss): Likewise.
(iwmmxt_wpackdss): Likewise.
(iwmmxt_wpackhus): Likewise.
(iwmmxt_wpackwus): Likewise.
(iwmmxt_wpackdus): Likewise.
(iwmmxt_wunpckihb): Likewise.
(iwmmxt_wunpckihh): Likewise.
(iwmmxt_wunpckihw): Likewise.
(iwmmxt_wunpckilb): Likewise.
(iwmmxt_wunpckilh): Likewise.
(iwmmxt_wunpckilw): Likewise.
(iwmmxt_wunpckehub): Likewise.
(iwmmxt_wunpckehuh): Likewise.
(iwmmxt_wunpckehuw): Likewise.
(iwmmxt_wunpckehsb): Likewise.
(iwmmxt_wunpckehsh): Likewise.
(iwmmxt_wunpckehsw): Likewise.
(iwmmxt_wunpckelub): Likewise.
(iwmmxt_wunpckeluh): Likewise.
(iwmmxt_wunpckeluw): Likewise.
(iwmmxt_wunpckelsb): Likewise.
(iwmmxt_wunpckelsh): Likewise.
(iwmmxt_wunpckelsw): Likewise.
(ror<mode>3): Likewise.
(ashr<mode>3_iwmmxt): Likewise.
(lshr<mode>3_iwmmxt): Likewise.
(ashl<mode>3_iwmmxt): Likewise.
(ror<mode>3_di): Likewise.
(ashr<mode>3_di): Likewise.
(lshr<mode>3_di): Likewise.
(ashl<mode>3_di): Likewise.
(iwmmxt_wmadds): Likewise.
(iwmmxt_wmaddu): Likewise.
(iwmmxt_tmia): Likewise.
(iwmmxt_tmiaph): Likewise.
(iwmmxt_tmiabb): Likewise.
(iwmmxt_tmiatb): Likewise.
(iwmmxt_tmiabt): Likewise.
(iwmmxt_tmiatt): Likewise.
(iwmmxt_tmovmskb): Likewise.
(iwmmxt_tmovmskh): Likewise.
(iwmmxt_tmovmskw): Likewise.
(iwmmxt_waccb): Likewise.
(iwmmxt_wacch): Likewise.
(iwmmxt_waccw): Likewise.
(iwmmxt_waligni): Likewise.
(iwmmxt_walignr): Likewise.
(iwmmxt_walignr0): Likewise.
(iwmmxt_walignr1): Likewise.
(iwmmxt_walignr2): Likewise.
(iwmmxt_walignr3): Likewise.
(iwmmxt_wsadb): Likewise.
(iwmmxt_wsadh): Likewise.
(iwmmxt_wsadbz): Likewise.
(iwmmxt_wsadhz): Likewise.
* iwmmxt2.md (iwmmxt_wabs<mode>3): Update for attribute changes.
(iwmmxt_wabsdiffb): Likewise.
(iwmmxt_wabsdiffh): Likewise.
(iwmmxt_wabsdiffw): Likewise.
(iwmmxt_waddsubhx): Likewise
(iwmmxt_wsubaddhx): Likewise.
(addc<mode>3): Likewise.
(iwmmxt_avg4): Likewise.
(iwmmxt_avg4r): Likewise.
(iwmmxt_wmaddsx): Likewise.
(iwmmxt_wmaddux): Likewise.
(iwmmxt_wmaddsn): Likewise.
(iwmmxt_wmaddun): Likewise.
(iwmmxt_wmulwsm): Likewise.
(iwmmxt_wmulwum): Likewise.
(iwmmxt_wmulsmr): Likewise.
(iwmmxt_wmulumr): Likewise.
(iwmmxt_wmulwsmr): Likewise.
(iwmmxt_wmulwumr): Likewise.
(iwmmxt_wmulwl): Likewise.
(iwmmxt_wqmulm): Likewise.
(iwmmxt_wqmulwm): Likewise.
(iwmmxt_wqmulmr): Likewise.
(iwmmxt_wqmulwmr): Likewise.
(iwmmxt_waddbhusm): Likewise.
(iwmmxt_waddbhusl): Likewise.
(iwmmxt_wqmiabb): Likewise.
(iwmmxt_wqmiabt): Likewise.
(iwmmxt_wqmiatb): Likewise.
(iwmmxt_wqmiatt): Likewise.
(iwmmxt_wqmiabbn): Likewise.
(iwmmxt_wqmiabtn): Likewise.
(iwmmxt_wqmiatbn): Likewise.
(iwmmxt_wqmiattn): Likewise.
(iwmmxt_wmiabb): Likewise.
(iwmmxt_wmiabt): Likewise.
(iwmmxt_wmiatb): Likewise.
(iwmmxt_wmiatt): Likewise.
(iwmmxt_wmiabbn): Likewise.
(iwmmxt_wmiabtn): Likewise.
(iwmmxt_wmiatbn): Likewise.
(iwmmxt_wmiattn): Likewise.
(iwmmxt_wmiawbb): Likewise.
(iwmmxt_wmiawbt): Likewise.
(iwmmxt_wmiawtb): Likewise.
(iwmmxt_wmiawtt): Likewise.
(iwmmxt_wmiawbbn): Likewise.
(iwmmxt_wmiawbtn): Likewise.
(iwmmxt_wmiawtbn): Likewise.
(iwmmxt_wmiawttn): Likewise.
(iwmmxt_wmerge): Likewise.
(iwmmxt_tandc<mode>3): Likewise.
(iwmmxt_torc<mode>3): Likewise.
(iwmmxt_torvsc<mode>3): Likewise.
(iwmmxt_textrc<mode>3): Likewise.
* marvell-f-iwmmxt.md (wmmxt_shift): Update for attribute changes.
(wmmxt_pack): Likewise.
(wmmxt_mult_c1): Likewise.
(wmmxt_mult_c2): Likewise.
(wmmxt_alu_c1): Likewise.
(wmmxt_alu_c2): Likewise.
(wmmxt_alu_c3): Likewise.
(wmmxt_transfer_c1): Likewise.
(wmmxt_transfer_c2): Likewise.
(wmmxt_transfer_c3): Likewise.
(marvell_f_iwmmxt_wstr): Likewise.
(marvell_f_iwmmxt_wldr): Likewise.
From-SVN: r200576
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From-SVN: r197104
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From-SVN: r195098
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From-SVN: r194903
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* config/arm/arm.c (FL_IWMMXT2): New define.
(arm_arch_iwmmxt2): New variable.
(arm_option_override): Enable use of iWMMXt with VFP.
Disable use of iWMMXt with NEON. Disable use of iWMMXt under
Thumb mode. Set arm_arch_iwmmxt2.
(arm_expand_binop_builtin): Accept VOIDmode op.
(enum arm_builtins): Revise built-in fcode.
(IWMMXT2_BUILTIN): New define.
(IWMMXT2_BUILTIN2): Likewise.
(iwmmx2_mbuiltin): Likewise.
(builtin_description bdesc_2arg): Revise built in declaration.
(builtin_description bdesc_1arg): Likewise.
(arm_init_iwmmxt_builtins): Revise built in initialization.
(arm_expand_builtin): Revise built in expansion.
(arm_output_iwmmxt_shift_immediate): New function.
(arm_output_iwmmxt_tinsr): Likewise.
* config/arm/arm-protos.h (arm_output_iwmmxt_shift_immediate): Declare.
(arm_output_iwmmxt_tinsr): Likewise.
* config/arm/iwmmxt.md (WCGR0, WCGR1, WCGR2, WCGR3): New constant.
(iwmmxt_psadbw, iwmmxt_walign, iwmmxt_tmrc, iwmmxt_tmcr): Delete.
(rorv4hi3, rorv2si3, rordi3): Likewise.
(rorv4hi3_di, rorv2si3_di, rordi3_di): Likewise.
(ashrv4hi3_di, ashrv2si3_di, ashrdi3_di): Likewise.
(lshrv4hi3_di, lshrv2si3_di, lshrdi3_di): Likewise.
(ashlv4hi3_di, ashlv2si3_di, ashldi3_di): Likewise.
(iwmmxt_tbcstqi, iwmmxt_tbcsthi, iwmmxt_tbcstsi): Likewise
(*iwmmxt_clrv8qi, *iwmmxt_clrv4hi, *iwmmxt_clrv2si): Likewise.
(tbcstv8qi, tbcstv4hi, tbsctv2si): New pattern.
(iwmmxt_clrv8qi, iwmmxt_clrv4hi, iwmmxt_clrv2si): Likewise.
(*and<mode>3_iwmmxt, *ior<mode>3_iwmmxt, *xor<mode>3_iwmmxt): Likewise.
(ror<mode>3, ror<mode>3_di): Likewise.
(ashr<mode>3_di, lshr<mode>3_di, ashl<mode>3_di): Likewise.
(ashli<mode>3_iwmmxt, iwmmxt_waligni, iwmmxt_walignr): Likewise.
(iwmmxt_walignr0, iwmmxt_walignr1): Likewise.
(iwmmxt_walignr2, iwmmxt_walignr3): Likewise.
(iwmmxt_setwcgr0, iwmmxt_setwcgr1): Likewise.
(iwmmxt_setwcgr2, iwmmxt_setwcgr3): Likewise.
(iwmmxt_getwcgr0, iwmmxt_getwcgr1): Likewise.
(iwmmxt_getwcgr2, iwmmxt_getwcgr3): Likewise.
(All instruction patterns): Add wtype attribute.
(*iwmmxt_arm_movdi, *iwmmxt_movsi_insn): iWMMXt coexist with vfp.
(iwmmxt_uavgrndv8qi3, iwmmxt_uavgrndv4hi3): Revise the pattern.
(iwmmxt_uavgv8qi3, iwmmxt_uavgv4hi3): Likewise.
(ashr<mode>3_iwmmxt, ashl<mode>3_iwmmxt, lshr<mode>3_iwmmxt): Likewise.
(iwmmxt_tinsrb, iwmmxt_tinsrh, iwmmxt_tinsrw):Likewise.
(eqv8qi3, eqv4hi3, eqv2si3, gtuv8qi3): Likewise.
(gtuv4hi3, gtuv2si3, gtv8qi3, gtv4hi3, gtv2si3): Likewise.
(iwmmxt_wunpckihh, iwmmxt_wunpckihw, iwmmxt_wunpckilh): Likewise.
(iwmmxt_wunpckilw, iwmmxt_wunpckehub, iwmmxt_wunpckehuh): Likewise.
(iwmmxt_wunpckehuw, iwmmxt_wunpckehsb, iwmmxt_wunpckehsh): Likewise.
(iwmmxt_wunpckehsw, iwmmxt_wunpckelub, iwmmxt_wunpckeluh): Likewise.
(iwmmxt_wunpckeluw, iwmmxt_wunpckelsb, iwmmxt_wunpckelsh): Likewise.
(iwmmxt_wunpckelsw, iwmmxt_wmadds, iwmmxt_wmaddu): Likewise.
(iwmmxt_wsadb, iwmmxt_wsadh, iwmmxt_wsadbz, iwmmxt_wsadhz): Likewise.
(iwmmxt2.md): Include.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __IWMMXT2__.
(TARGET_IWMMXT2): New define.
(TARGET_REALLY_IWMMXT2): Likewise.
(arm_arch_iwmmxt2): Declare.
* config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt intrinsics.
Use __IWMMXT2__ to enable iWMMXt2 intrinsics.
Use C name-mangling for intrinsics.
(__v8qi): Redefine.
(_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise.
(_mm_sad_pu16, _mm_align_si64, _mm_setwcx, _mm_getwcx): Likewise.
(_m_from_int): Likewise.
(_mm_sada_pu8, _mm_sada_pu16): New intrinsic.
(_mm_alignr0_si64, _mm_alignr1_si64, _mm_alignr2_si64): Likewise.
(_mm_alignr3_si64, _mm_tandcb, _mm_tandch, _mm_tandcw): Likewise.
(_mm_textrcb, _mm_textrch, _mm_textrcw, _mm_torcb): Likewise.
(_mm_torch, _mm_torcw, _mm_tbcst_pi8, _mm_tbcst_pi16): Likewise.
(_mm_tbcst_pi32): Likewise.
(_mm_abs_pi8, _mm_abs_pi16, _mm_abs_pi32): New iWMMXt2 intrinsic.
(_mm_addsubhx_pi16, _mm_absdiff_pu8, _mm_absdiff_pu16): Likewise.
(_mm_absdiff_pu32, _mm_addc_pu16, _mm_addc_pu32): Likewise.
(_mm_avg4_pu8, _mm_avg4r_pu8, _mm_maddx_pi16, _mm_maddx_pu16): Likewise.
(_mm_msub_pi16, _mm_msub_pu16, _mm_mulhi_pi32): Likewise.
(_mm_mulhi_pu32, _mm_mulhir_pi16, _mm_mulhir_pi32): Likewise.
(_mm_mulhir_pu16, _mm_mulhir_pu32, _mm_mullo_pi32): Likewise.
(_mm_qmulm_pi16, _mm_qmulm_pi32, _mm_qmulmr_pi16): Likewise.
(_mm_qmulmr_pi32, _mm_subaddhx_pi16, _mm_addbhusl_pu8): Likewise.
(_mm_addbhusm_pu8, _mm_qmiabb_pi32, _mm_qmiabbn_pi32): Likewise.
(_mm_qmiabt_pi32, _mm_qmiabtn_pi32, _mm_qmiatb_pi32): Likewise.
(_mm_qmiatbn_pi32, _mm_qmiatt_pi32, _mm_qmiattn_pi32): Likewise.
(_mm_wmiabb_si64, _mm_wmiabbn_si64, _mm_wmiabt_si64): Likewise.
(_mm_wmiabtn_si64, _mm_wmiatb_si64, _mm_wmiatbn_si64): Likewise.
(_mm_wmiatt_si64, _mm_wmiattn_si64, _mm_wmiawbb_si64): Likewise.
(_mm_wmiawbbn_si64, _mm_wmiawbt_si64, _mm_wmiawbtn_si64): Likewise.
(_mm_wmiawtb_si64, _mm_wmiawtbn_si64, _mm_wmiawtt_si64): Likewise.
(_mm_wmiawttn_si64, _mm_merge_si64): Likewise.
(_mm_torvscb, _mm_torvsch, _mm_torvscw): Likewise.
(_m_to_int): New define.
* config/arm/arm-cores.def (iwmmxt2): Add FL_IWMMXT2.
* config/arm/arm-arches.def (iwmmxt2): Likewise.
* config/arm/t-arm (MD_INCLUDES): Add marvell-f-iwmmxt.md and
iwmmxt2.md.
* config/arm/arm.md (marvell-f-iwmmxt.md): Include.
(arch): Add "iwmmxt2".
(arch_enabled): Handle "iwmmxt2".
(wtype): New attribute.
(UNSPEC_WMADDS, UNSPEC_WMADDU): Delete.
(UNSPEC_WALIGNI): New unspec.
* config/arm/predicates.md (imm_or_reg_operand): New predicate.
* config/arm/iterators.md (VMMX2): New mode_iterator.
* config/arm/marvell-f-iwmmxt.md: New file.
* config/arm/iwmmxt2.md: New file.
From-SVN: r188497
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code base for ARM)
2011-08-15 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
PR target/50022
* config/arm/arm.c (output_move_double): Add 2 parameters
to count the number of insns emitted and whether to emit or not.
Use the flag to decide when to emit and count number of instructions
that will be emitted.
Handle case where output_move_double might be called for calculating
lengths with an invalid constant.
(arm_count_output_move_double_insns): Define.
* config/arm/arm-protos.h (arm_count_output_move_double_insns): Declare.
(output_move_double): Adjust prototype.
* config/arm/vfp.md ("*movdi_vfp"): Adjust call to
output_move_double.
("*movdi_vfp_cortexa8"): Likewise and add attribute
for ce_count.
* config/arm/arm.md ("*arm_movdi"): Adjust call to output_move_double.
("*movdf_soft_insn"): Likewise.
* config/arm/cirrus.md ("*cirrus_arm_movdi"): Likewise.
("*cirrus_thumb2_movdi"): Likewise.
("*thumb2_cirrus_movdf_hard_insn"): Likewise.
("*cirrus_movdf_hard_insn"): Likewise.
* config/arm/neon.md (*neon_mov<mode> VD): Likewise.
* config/arm/iwmmxt.md ("*iwmmxt_arm_movdi"): Likewise.
("mov<mode>_internal VMMX"): Likewise.
* config/arm/fpa.md (*movdf_fpa, *thumb2_movdf_fpa): Likewise.
From-SVN: r177759
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* config/alpha/alpha.md (umk_mismatch_args): Don't put a mode on set.
* config/fr30/fr30.md: Likweise
(movsi_push): Likewise.
(movsi_pop): Likewise.
(enter_func): Likewise.
* config/moxie/moxie.md (movsi_push): Likewise.
(movsi_pop): Likewise.
From-SVN: r168817
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From-SVN: r168438
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2010-08-09 Sofiane Naci <sofiane.naci@arm.com>
* config/arm/iterators.md: New file.
* config/arm/arm.md: Include iterators.md.
(QHSI): Move to new file.
(LTUGEU, cnb, optab, ior_xor): Likewise.
* config/arm/iwmmxt.md (VMMX): Move to new file.
(VSHFT, MMX_char): Likewise.
* config/arm/neon.md (VD): Move to new file.
(VDX, VDI, VQ, VQX, VQI, VQXMOV, VSTRUCT, VTAB, V_TAB_n, VW): Likewise.
(VN, VDQ, VDQW, VDQIW, VCVTF, VCVTI, VMD, VMQ, VMDQ, VMDI): Likewise.
(VMDQI, VX, VE, V64, V32, V_CVTTO, V_elem, V_ext, V_two_elem): Likewise.
(V_three_elem, V_four_elem, V_req, V_widen, V_narrow, V_HALF): Likewise.
(V_half,V_DOUBLE, V_double, V_double_width, V_cmp_result): Likewise.
(V_if_elem, V_s_elem, V_u_elem, V_uf_sclr, V_sz_elem, VD_dup): Likewise.
(V_PAIR, vqh_ops, vqhs_ops, VQH_mnem, VQH_sign, V_suf64): Likewise.
(scalar_mul_constraint,Is_float_mode, Scalar_mul_8_16): Likewise.
(Is_d_reg, V_mode_nunits): Likewise.
* config/arm/vec-common.md (VALL): Move to new file.
(VALLW, VINT, VINTW): Likewise.
From-SVN: r163058
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From-SVN: r144324
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* config/arm/iwmmxt.md (movv8qi_internal, movv4hi_internal,
movv2si_internal): Combine into mov<mode>_internal.
(movv2si_internal_2): Remove.
From-SVN: r138844
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* config/arm/iwmmxt.md (movv8qi_internal, movv4hi_internal,
movv2si_internal): Add mem = reg alternative.
From-SVN: r138146
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2008-02-26 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (thumb_set_frame_pointer): Ensure SP is first
operand for Thumb-2.
* config/arm/arm.h (reg_class): Add CORE_REGS.
(REG_CLASS_NAMES, REG_CLASS_CONTENTS): Ditto.
(BASE_REG_CLASS): Use CORE_REGS.
(PREFERRED_RELOAD_CLASS): Add STACK_REG.
(REGNO_MODE_OK_FOR_REG_BASE_P): Use REGNO_MODE_OK_FOR_BASE_P.
(REGNO_OK_FOR_INDEX_P): Exclude SP.
(ARM_REG_OK_FOR_INDEX_P): Always define. Use
ARM_REGNO_OK_FOR_INDEX_P.
(ARM_PRINT_OPERAND_ADDRESS): Swap operands for [reg, sp].
* config/arm/arm.md (arm_addsi3, thumb1_addsi3, arm_subsi3_insn,
arm_movsi_insn, thumb1_movsi_insni, stack_tie): Add "k" alternatives.
(ldm/stm peepholes): Ditto.
* config/arm/thumb2.md (thumb2_movdi): Add "k" alternatives.
* config/arm/vfp.md (arm_movsi_vfp, thumb2_movsi_vfp): Ditto.
* config/arm/iwmmxt.md (iwmmxt_movsi_insn): Ditto.
* config/arm/constraints.md: Enable "k" constraint on ARM.
From-SVN: r132687
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* doc/md.texi (Iterators): Renamed from Macros. All contents
changed to reflect rename of respectively define_code_macro and
define_mode_macro to define_code_iterator and define_mode_iterator.
(Mode Iterators, Code Iterators): Similar.
* read-rtl.c (struct iterator_group, struct iterator_traverse_data)
(uses_mode_iterator_p, apply_mode_iterator, uses_code_iterator_p)
(apply_iterator_to_string, uses_iterator_p, apply_iterator_traverse)
(initialize_iterators, find_iterator, check_code_iterator)
(map_attr_string, apply_mode_maps, apply_iterator_to_rtx, add_mapping)
(read_mapping, read_rtx_1): Similar.
* config/alpha/sync.md, config/alpha/alpha.md, config/frv/frv.md,
config/s390/s390.md, config/m32c/blkmov.md, config/m32c/m32c.md,
config/spu/spu.md, config/sparc/sparc.md, config/sparc/sync.md,
config/i386/i386.md, config/i386/mmx.md, config/i386/sse.md,
config/i386/sync.md, config/crx/crx.md, config/xtensa/xtensa.md,
config/cris/cris.c, config/cris/cris.md, config/ia64/sync.md,
config/ia64/div.md, config/ia64/vect.md, config/ia64/ia64.md,
config/m68k/m68k.md, config/rs6000/spe.md, config/rs6000/altivec.md,
config/rs6000/sync.md, config/rs6000/rs6000.md,
config/arm/vec-common.md, config/arm/neon.md, config/arm/iwmmxt.md,
config/arm/arm.md, config/mips/mips-dsp.md, config/mips/mips.md,
config/vax/vax.md, config/bfin/bfin.md: Similar.
From-SVN: r127715
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General Public License...
* config/host-hpux.c: Change copyright header to refer to version 3 of the GNU
General Public License and to point readers at the COPYING3 file and the FSF's
license web page.
* config/alpha/predicates.md, config/alpha/vms-ld.c,
config/alpha/linux.h, config/alpha/alpha.opt,
config/alpha/linux-elf.h, config/alpha/vms.h, config/alpha/elf.h,
config/alpha/vms-unwind.h, config/alpha/ev4.md,
config/alpha/ev6.md, config/alpha/alpha.c, config/alpha/vms-cc.c,
config/alpha/alpha.h, config/alpha/sync.md,
config/alpha/openbsd.h, config/alpha/alpha.md,
config/alpha/alpha-modes.def, config/alpha/ev5.md,
config/alpha/alpha-protos.h, config/alpha/freebsd.h,
config/alpha/osf5.h, config/alpha/netbsd.h, config/alpha/vms64.h,
config/alpha/constraints.md, config/alpha/osf.h,
config/alpha/xm-vms.h, config/alpha/unicosmk.h, config/linux.h,
config/frv/predicates.md, config/frv/frv.h, config/frv/linux.h,
config/frv/frv.md, config/frv/frv.opt, config/frv/frv-modes.def,
config/frv/frv-asm.h, config/frv/frv-protos.h,
config/frv/frv-abi.h, config/frv/frv.c, config/s390/tpf.h,
config/s390/s390.c, config/s390/predicates.md, config/s390/s390.h,
config/s390/linux.h, config/s390/tpf.md, config/s390/tpf.opt,
config/s390/2064.md, config/s390/2084.md, config/s390/s390.md,
config/s390/s390.opt, config/s390/s390-modes.def,
config/s390/fixdfdi.h, config/s390/constraints.md,
config/s390/s390-protos.h, config/s390/s390x.h, config/elfos.h,
config/dbxcoff.h, config/m32c/predicates.md, config/m32c/cond.md,
config/m32c/m32c.c, config/m32c/minmax.md, config/m32c/blkmov.md,
config/m32c/m32c-pragma.c, config/m32c/m32c.h,
config/m32c/prologue.md, config/m32c/m32c.abi,
config/m32c/muldiv.md, config/m32c/bitops.md, config/m32c/mov.md,
config/m32c/addsub.md, config/m32c/m32c.md, config/m32c/m32c.opt,
config/m32c/t-m32c, config/m32c/m32c-modes.def,
config/m32c/jump.md, config/m32c/shift.md,
config/m32c/m32c-protos.h, config/libgloss.h,
config/spu/spu-protos.h, config/spu/predicates.md,
config/spu/spu-builtins.h, config/spu/spu.c,
config/spu/spu-builtins.def, config/spu/spu-builtins.md,
config/spu/spu.h, config/spu/spu-elf.h, config/spu/constraints.md,
config/spu/spu.md, config/spu/spu-c.c, config/spu/spu.opt,
config/spu/spu-modes.def, config/spu/t-spu-elf, config/interix.h,
config/sparc/hypersparc.md, config/sparc/predicates.md,
config/sparc/linux.h, config/sparc/sp64-elf.h,
config/sparc/supersparc.md, config/sparc/cypress.md,
config/sparc/openbsd1-64.h, config/sparc/openbsd64.h,
config/sparc/niagara.md, config/sparc/sparc.md,
config/sparc/long-double-switch.opt, config/sparc/ultra3.md,
config/sparc/sparc.opt, config/sparc/sync.md,
config/sparc/sp-elf.h, config/sparc/sparc-protos.h,
config/sparc/ultra1_2.md, config/sparc/biarch64.h,
config/sparc/sparc.c, config/sparc/little-endian.opt,
config/sparc/sysv4-only.h, config/sparc/sparc.h,
config/sparc/linux64.h, config/sparc/freebsd.h,
config/sparc/sol2.h, config/sparc/rtemself.h,
config/sparc/netbsd-elf.h, config/sparc/vxworks.h,
config/sparc/sparc-modes.def, config/sparc/sparclet.md,
config/sparc/sysv4.h, config/vx-common.h, config/netbsd-aout.h,
config/flat.h, config/m32r/m32r.md, config/m32r/predicates.md,
config/m32r/little.h, config/m32r/m32r.c, config/m32r/m32r.opt,
config/m32r/linux.h, config/m32r/constraints.md,
config/m32r/m32r.h, config/m32r/m32r-protos.h, config/vxworks.opt,
config/darwin-c.c, config/darwin.opt, config/i386/i386.h,
config/i386/cygming.h, config/i386/linux.h, config/i386/cygwin.h,
config/i386/i386.md, config/i386/netware-crt0.c,
config/i386/sco5.h, config/i386/mmx.md, config/i386/vx-common.h,
config/i386/kaos-i386.h, config/i386/winnt-stubs.c,
config/i386/netbsd64.h, config/i386/djgpp.h, config/i386/gas.h,
config/i386/sol2.h, config/i386/constraints.md,
config/i386/netware-libgcc.c, config/i386/sysv5.h,
config/i386/predicates.md, config/i386/geode.md,
config/i386/x86-64.h, config/i386/kfreebsd-gnu.h,
config/i386/freebsd64.h, config/i386/vxworksae.h,
config/i386/pentium.md, config/i386/lynx.h, config/i386/i386elf.h,
config/i386/rtemself.h, config/i386/netbsd-elf.h,
config/i386/ppro.md, config/i386/k6.md, config/i386/netware.c,
config/i386/netware.h, config/i386/i386-modes.def,
config/i386/sysv4-cpp.h, config/i386/i386-interix.h,
config/i386/cygwin1.c, config/i386/djgpp.opt, config/i386/uwin.h,
config/i386/unix.h, config/i386/ptx4-i.h, config/i386/xm-djgpp.h,
config/i386/att.h, config/i386/winnt.c, config/i386/beos-elf.h,
config/i386/sol2-10.h, config/i386/darwin64.h, config/i386/sse.md,
config/i386/i386.opt, config/i386/bsd.h, config/i386/cygming.opt,
config/i386/xm-mingw32.h, config/i386/linux64.h,
config/i386/openbsdelf.h, config/i386/xm-cygwin.h,
config/i386/sco5.opt, config/i386/darwin.h, config/i386/mingw32.h,
config/i386/winnt-cxx.c, config/i386/i386-interix3.h,
config/i386/nwld.c, config/i386/nwld.h, config/i386/host-cygwin.c,
config/i386/cygwin2.c, config/i386/i386-protos.h,
config/i386/sync.md, config/i386/openbsd.h,
config/i386/host-mingw32.c, config/i386/i386-aout.h,
config/i386/nto.h, config/i386/biarch64.h,
config/i386/i386-coff.h, config/i386/freebsd.h,
config/i386/driver-i386.c, config/i386/knetbsd-gnu.h,
config/i386/host-i386-darwin.c, config/i386/vxworks.h,
config/i386/crtdll.h, config/i386/i386.c, config/i386/sysv4.h,
config/darwin-protos.h, config/linux.opt, config/sol2.c,
config/sol2.h, config/sh/symbian.c, config/sh/sh-protos.h,
config/sh/linux.h, config/sh/elf.h, config/sh/superh.h,
config/sh/sh4.md, config/sh/coff.h, config/sh/newlib.h,
config/sh/embed-elf.h, config/sh/symbian-pre.h, config/sh/rtems.h,
config/sh/kaos-sh.h, config/sh/sh4a.md, config/sh/constraints.md,
config/sh/sh64.h, config/sh/sh.opt, config/sh/symbian-post.h,
config/sh/sh-c.c, config/sh/predicates.md, config/sh/sh.c,
config/sh/sh.h, config/sh/shmedia.md, config/sh/sh-modes.def,
config/sh/little.h, config/sh/sh1.md, config/sh/sh4-300.md,
config/sh/superh64.h, config/sh/rtemself.h,
config/sh/netbsd-elf.h, config/sh/sh.md, config/sh/vxworks.h,
config/usegas.h, config/svr3.h, config/pdp11/pdp11-protos.h,
config/pdp11/2bsd.h, config/pdp11/pdp11.md, config/pdp11/pdp11.c,
config/pdp11/pdp11.opt, config/pdp11/pdp11-modes.def,
config/pdp11/pdp11.h, config/avr/rtems.h, config/avr/avr-protos.h,
config/avr/predicates.md, config/avr/constraints.md,
config/avr/avr.md, config/avr/avr.c, config/avr/avr.opt,
config/avr/avr.h, config/sol2-protos.h, config/dbxelf.h,
config/lynx.opt, config/crx/crx.h, config/crx/crx-protos.h,
config/crx/crx.md, config/crx/crx.c, config/crx/crx.opt,
config/c4x/c4x-c.c, config/c4x/c4x.c, config/c4x/c4x.opt,
config/c4x/c4x-modes.def, config/c4x/rtems.h,
config/c4x/predicates.md, config/c4x/c4x.h,
config/c4x/c4x-protos.h, config/c4x/c4x.md, config/kfreebsd-gnu.h,
config/xtensa/predicates.md, config/xtensa/xtensa.c,
config/xtensa/linux.h, config/xtensa/xtensa.h,
config/xtensa/elf.h, config/xtensa/xtensa.md,
config/xtensa/xtensa.opt, config/xtensa/constraints.md,
config/xtensa/xtensa-protos.h, config/dbx.h,
config/stormy16/predicates.md, config/stormy16/stormy16.md,
config/stormy16/stormy16.c, config/stormy16/stormy16.opt,
config/stormy16/stormy16.h, config/stormy16/stormy16-protos.h,
config/host-solaris.c, config/fr30/fr30.h,
config/fr30/predicates.md, config/fr30/fr30-protos.h,
config/fr30/fr30.md, config/fr30/fr30.c, config/fr30/fr30.opt,
config/vxworksae.h, config/sol2-c.c, config/lynx.h,
config/m68hc11/m68hc11-protos.h, config/m68hc11/predicates.md,
config/m68hc11/m68hc11.md, config/m68hc11/m68hc11.c,
config/m68hc11/m68hc11.opt, config/m68hc11/m68hc11.h,
config/m68hc11/m68hc12.h, config/openbsd-oldgas.h,
config/host-linux.c, config/interix3.h, config/cris/cris.c,
config/cris/predicates.md, config/cris/linux.h,
config/cris/cris.h, config/cris/aout.h, config/cris/cris.md,
config/cris/linux.opt, config/cris/cris.opt, config/cris/elf.opt,
config/cris/aout.opt, config/cris/cris-protos.h,
config/vxworks-dummy.h, config/netbsd.h, config/netbsd-elf.h,
config/iq2000/iq2000.h, config/iq2000/predicates.md,
config/iq2000/iq2000-protos.h, config/iq2000/iq2000.md,
config/iq2000/iq2000.c, config/iq2000/iq2000.opt,
config/host-darwin.c, config/mt/mt.md, config/mt/mt.c,
config/mt/mt.opt, config/mt/t-mt, config/mt/mt.h,
config/mt/mt-protos.h, config/svr4.h, config/host-darwin.h,
config/chorus.h, config/mn10300/mn10300.c,
config/mn10300/mn10300.opt, config/mn10300/predicates.md,
config/mn10300/mn10300.h, config/mn10300/linux.h,
config/mn10300/constraints.md, config/mn10300/mn10300-protos.h,
config/mn10300/mn10300.md, config/ia64/predicates.md,
config/ia64/itanium1.md, config/ia64/unwind-ia64.h,
config/ia64/ia64-c.c, config/ia64/sync.md, config/ia64/ia64.c,
config/ia64/itanium2.md, config/ia64/ia64.h, config/ia64/vect.md,
config/ia64/freebsd.h, config/ia64/ia64.md,
config/ia64/ia64-modes.def, config/ia64/constraints.md,
config/ia64/hpux.h, config/ia64/ia64-protos.h, config/windiss.h,
config/gofast.h, config/rtems.h, config/sol2-10.h,
config/m68k/predicates.md, config/m68k/m68k.md,
config/m68k/linux.h, config/m68k/m68k-modes.def,
config/m68k/print-sysroot-suffix.sh, config/m68k/m68k-protos.h,
config/m68k/coff.h, config/m68k/m68k-none.h, config/m68k/ieee.opt,
config/m68k/openbsd.h, config/m68k/m68k-aout.h,
config/m68k/m68k.opt, config/m68k/m68020-elf.h,
config/m68k/m68kelf.h, config/m68k/m68k-devices.def,
config/m68k/uclinux-oldabi.h, config/m68k/m68k.c,
config/m68k/constraints.md, config/m68k/rtemself.h,
config/m68k/netbsd-elf.h, config/m68k/m68k.h,
config/m68k/uclinux.h, config/rs6000/power4.md,
config/rs6000/host-darwin.c, config/rs6000/6xx.md,
config/rs6000/linux.h, config/rs6000/eabi.h,
config/rs6000/aix41.opt, config/rs6000/xcoff.h,
config/rs6000/secureplt.h, config/rs6000/linuxspe.h,
config/rs6000/eabialtivec.h, config/rs6000/8540.md,
config/rs6000/darwin8.h, config/rs6000/kaos-ppc.h,
config/rs6000/windiss.h, config/rs6000/603.md,
config/rs6000/aix41.h, config/rs6000/cell.md,
config/rs6000/mpc.md, config/rs6000/aix43.h, config/rs6000/beos.h,
config/rs6000/gnu.h, config/rs6000/rtems.h, config/rs6000/aix.opt,
config/rs6000/darwin.md, config/rs6000/darwin64.h,
config/rs6000/default64.h, config/rs6000/7xx.md,
config/rs6000/darwin.opt, config/rs6000/spe.md,
config/rs6000/rs6000.opt, config/rs6000/rs6000-c.c,
config/rs6000/rios2.md, config/rs6000/linuxaltivec.h,
config/rs6000/7450.md, config/rs6000/linux64.h,
config/rs6000/constraints.md, config/rs6000/440.md,
config/rs6000/darwin.h, config/rs6000/host-ppc64-darwin.c,
config/rs6000/rs6000.c, config/rs6000/aix52.h,
config/rs6000/rs6000.h, config/rs6000/power6.md,
config/rs6000/predicates.md, config/rs6000/altivec.md,
config/rs6000/aix64.opt, config/rs6000/rios1.md,
config/rs6000/rs6000-modes.def, config/rs6000/rs64.md,
config/rs6000/eabisim.h, config/rs6000/sysv4le.h,
config/rs6000/darwin7.h, config/rs6000/dfp.md,
config/rs6000/linux64.opt, config/rs6000/sync.md,
config/rs6000/vxworksae.h, config/rs6000/power5.md,
config/rs6000/lynx.h, config/rs6000/biarch64.h,
config/rs6000/rs6000.md, config/rs6000/sysv4.opt,
config/rs6000/eabispe.h, config/rs6000/e500.h,
config/rs6000/freebsd.h, config/rs6000/rs6000-protos.h,
config/rs6000/netbsd.h, config/rs6000/e500-double.h,
config/rs6000/aix.h, config/rs6000/vxworks.h,
config/rs6000/40x.md, config/rs6000/aix51.h,
config/rs6000/sysv4.h, config/arc/arc-protos.h, config/arc/arc.md,
config/arc/arc.c, config/arc/arc.opt, config/arc/arc-modes.def,
config/arc/arc.h, config/mcore/mcore-elf.h,
config/mcore/mcore-protos.h, config/mcore/predicates.md,
config/mcore/mcore.md, config/mcore/mcore.c,
config/mcore/mcore.opt, config/mcore/mcore.h,
config/mcore/mcore-pe.h, config/darwin.c, config/freebsd-nthr.h,
config/score/predicates.md, config/score/score-version.h,
config/score/score-protos.h, config/score/misc.md,
config/score/elf.h, config/score/score.c, config/score/mac.md,
config/score/score7.md, config/score/score.h,
config/score/score-conv.h, config/score/score-mdaux.c,
config/score/score.md, config/score/score.opt,
config/score/score-modes.def, config/score/score-mdaux.h,
config/score/mul-div.S, config/arm/uclinux-elf.h,
config/arm/semi.h, config/arm/ecos-elf.h, config/arm/arm1020e.md,
config/arm/symbian.h, config/arm/linux-elf.h,
config/arm/arm1026ejs.md, config/arm/arm1136jfs.md,
config/arm/elf.h, config/arm/aout.h, config/arm/arm.c,
config/arm/thumb2.md, config/arm/vec-common.md, config/arm/coff.h,
config/arm/strongarm-pe.h, config/arm/arm.h,
config/arm/cortex-a8-neon.md, config/arm/semiaof.h,
config/arm/cortex-a8.md, config/arm/uclinux-eabi.h,
config/arm/arm-modes.def, config/arm/linux-eabi.h,
config/arm/rtems-elf.h, config/arm/neon-schedgen.ml,
config/arm/arm-cores.def, config/arm/arm-protos.h,
config/arm/vfp.md, config/arm/aof.h, config/arm/linux-gas.h,
config/arm/wince-pe.h, config/arm/neon.md,
config/arm/constraints.md, config/arm/neon.ml,
config/arm/xscale-elf.h, config/arm/strongarm-coff.h,
config/arm/arm.opt, config/arm/arm926ejs.md,
config/arm/predicates.md, config/arm/iwmmxt.md,
config/arm/arm_neon.h, config/arm/unknown-elf.h,
config/arm/kaos-arm.h, config/arm/bpabi.h, config/arm/pe.opt,
config/arm/neon-testgen.ml, config/arm/arm.md,
config/arm/xscale-coff.h, config/arm/pe.c,
config/arm/arm-generic.md, config/arm/pe.h,
config/arm/kaos-strongarm.h, config/arm/freebsd.h,
config/arm/neon-docgen.ml, config/arm/netbsd.h, config/arm/fpa.md,
config/arm/strongarm-elf.h, config/arm/cirrus.md,
config/arm/netbsd-elf.h, config/arm/vxworks.h,
config/arm/neon-gen.ml, config/kaos.h, config/darwin-driver.c,
config/pa/predicates.md, config/pa/pa64-hpux.h,
config/pa/pa-hpux.opt, config/pa/som.h, config/pa/pa-hpux1010.opt,
config/pa/pa-hpux1111.opt, config/pa/pa-pro-end.h,
config/pa/elf.h, config/pa/fptr.c, config/pa/pa64-linux.h,
config/pa/pa.md, config/pa/pa.opt, config/pa/pa-hpux.h,
config/pa/pa-hpux10.h, config/pa/pa-hpux11.h,
config/pa/pa-hpux1010.h, config/pa/pa-protos.h,
config/pa/pa-osf.h, config/pa/pa-hpux1111.h, config/pa/pa-64.h,
config/pa/milli64.S, config/pa/pa.c, config/pa/pa-linux.h,
config/pa/pa.h, config/pa/pa32-linux.h, config/pa/pa64-hpux.opt,
config/pa/pa64-regs.h, config/pa/pa-modes.def,
config/pa/constraints.md, config/darwin9.h, config/mips/4100.md,
config/mips/linux.h, config/mips/elfoabi.h, config/mips/elf.h,
config/mips/sdb.h, config/mips/windiss.h, config/mips/rtems.h,
config/mips/3000.md, config/mips/iris5.h, config/mips/5000.md,
config/mips/7000.md, config/mips/9000.md, config/mips/4600.md,
config/mips/linux64.h, config/mips/elforion.h,
config/mips/constraints.md, config/mips/generic.md,
config/mips/predicates.md, config/mips/4300.md,
config/mips/mips-ps-3d.md, config/mips/iris.h, config/mips/24k.md,
config/mips/mips.md, config/mips/mips.opt, config/mips/4k.md,
config/mips/5k.md, config/mips/vr4120-div.S,
config/mips/openbsd.h, config/mips/iris6.h, config/mips/4000.md,
config/mips/mips-protos.h, config/mips/6000.md,
config/mips/mips.c, config/mips/mips.h, config/mips/r3900.h,
config/mips/74k.md, config/mips/netbsd.h, config/mips/vxworks.h,
config/mips/mips-modes.def, config/mips/vr.h,
config/soft-fp/t-softfp, config/openbsd.h, config/ptx4.h,
config/freebsd-spec.h, config/vax/vax.c, config/vax/openbsd.h,
config/vax/vax.h, config/vax/elf.h, config/vax/vax.md,
config/vax/bsd.h, config/vax/vax.opt, config/vax/vax-modes.def,
config/vax/openbsd1.h, config/vax/netbsd.h,
config/vax/vax-protos.h, config/vax/netbsd-elf.h,
config/vax/vaxv.h, config/vax/ultrix.h, config/freebsd.h,
config/h8300/rtems.h, config/h8300/predicates.md,
config/h8300/h8300.c, config/h8300/h8300.h, config/h8300/elf.h,
config/h8300/h8300.md, config/h8300/h8300.opt,
config/h8300/coff.h, config/h8300/h8300-protos.h,
config/v850/v850.md, config/v850/predicates.md,
config/v850/v850-c.c, config/v850/v850.c, config/v850/v850.opt,
config/v850/v850.h, config/v850/v850-protos.h, config/vxworks.c,
config/knetbsd-gnu.h, config/sol2-6.h, config/vxworks.h,
config/mmix/mmix.h, config/mmix/predicates.md,
config/mmix/mmix-protos.h, config/mmix/mmix.md,
config/mmix/mmix.c, config/mmix/mmix.opt,
config/mmix/mmix-modes.def, config/bfin/bfin.opt,
config/bfin/rtems.h, config/bfin/bfin-modes.def,
config/bfin/predicates.md, config/bfin/bfin-protos.h,
config/bfin/bfin.c, config/bfin/bfin.h, config/bfin/bfin.md: Likewise.
From-SVN: r127157
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gcc/
* Makefile.in (TEXI_GCC_FILES): Add arm-neon-intrinsics.texi.
* config.gcc (arm*-*-*): Add arm_neon.h to extra headers.
(with_fpu): Allow --with-fpu=neon.
* config/arm/aof.h (ADDITIONAL_REGISTER_NAMES): Add Q0-Q15.
* config/arm/aout.h (ADDITIONAL_REGISTER_NAMES): Add Q0-Q15.
* config/arm/arm-modes.def (EI, OI, CI, XI): New modes.
* config/arm/arm-protos.h (neon_immediate_valid_for_move)
(neon_immediate_valid_for_logic, neon_output_logic_immediate)
(neon_pairwise_reduce, neon_expand_vector_init, neon_reinterpret)
(neon_emit_pair_result_insn, neon_disambiguate_copy)
(neon_vector_mem_operand, neon_struct_mem_operand, output_move_quad)
(output_move_neon): Add prototypes.
* config/arm/arm.c (FL_NEON): New flag for NEON processor capability.
(all_fpus): Add FPUTYPE_NEON.
(fp_model_for_fpu): Add NEON field.
(arm_return_in_memory): Return vectors <= 16 bytes in ARM registers.
(arm_arg_partial_bytes): Allow NEON vectors to be passed partially
in registers.
(arm_legitimate_address_p): Don't support fancy addressing for NEON
structure moves.
(thumb2_legitimate_address_p): Likewise.
(neon_valid_immediate): Recognize and prepare constants suitable for
NEON instructions.
(neon_immediate_valid_for_move): New function. Recognize and prepare
immediates for NEON move instructions.
(neon_immediate_valid_for_logic): New function. Recognize and
prepare immediates for NEON logic instructions.
(neon_output_logic_immediate): New function. Create asm string
suitable for outputting immediate logic instructions.
(neon_pairwise_reduce): New function. Implement reduction using
pairwise operations.
(neon_expand_vector_init): New function. Expand a (possibly
non-constant) vector initialization.
(neon_vector_mem_operand): New function. Memory operands supported
for quad-word loads/stores to/from ARM or NEON registers. Don't
allow base+offset addressing for core regs.
(neon_struct_mem_operand): New function. Valid mems for NEON
structure moves.
(coproc_secondary_reload_class): Enable NEON registers to be loaded
from neon_vector_mem_operand addresses without a secondary register.
(add_minipool_forward_ref): Handle >8-byte minipool entries.
(add_minipool_backward_ref): Likewise.
(dump_minipool): Likewise.
(push_minipool_fix): Likewise.
(output_move_quad): New function. Output quad-word moves, loads and
stores using ARM registers.
(output_move_vfp): Add support for vectors in VFP (NEON) D
registers.
(output_move_neon): Output a NEON load/store to/from a quadword
register.
(arm_print_operand): Implement new codes:
- 'c' for unadorned integers (without a # sign).
- 'J', 'K' for reg+2/reg+3, reg+3/reg+2 in little/big-endian
mode.
- 'e', 'f' for the low and high D parts of a NEON Q register.
- 'q' outputs a NEON Q register.
- 'h' outputs ranges of D registers for VLDM/VSTM etc.
- 'T' prints NEON opcode features from a coded bitmask.
- 'F' is similar to T, but signed/unsigned codes both print as
'i'.
- 't' is similar to T, but 'u' is printed instead of 'p'.
- 'O' prints 'r' if NEON instruction should perform rounding (as
specified by bitmask), else prints nothing.
- '#' is a punctuation character to stop operand numbers from
running together with following digits in the assembler
strings for instructions (when using mode attributes).
(arm_assemble_integer): Handle extra NEON vector modes. Permute
constant vectors in big-endian mode, where necessary.
(arm_hard_regno_mode_ok): Allow vectors in VFP/NEON registers.
Handle EI, OI, CI, XI modes.
(ashlv4hi3, ashlv2si3, lshrv4hi3, lshrv2si3, ashrv4hi3)
(ashrv2si3): Rename IWMMXT2_BUILTINs to...
(ashlv4hi3_iwmmxt, ashlv2si3_iwmmxt, lshrv4hi3_iwmmxt)
(lshrv2si3_iwmmxt, ashrv4hi3_iwmmxt, ashrv2si3_iwmmxt): New names.
(neon_builtin_type_bits): Add enumeration, one bit for each vector
type.
(v8qi_UP, v4hi_UP, v2si_UP, v2sf_UP, di_UP, v16qi_UP, v8hi_UP)
(v4si_UP, v4sf_UP, v2di_UP, ti_UP, ei_UP, oi_UP, UP): Define macros
to turn v8qi, etc. into bits defined above.
(neon_itype): New enumeration. Classifications of NEON builtins.
(neon_builtin_datum): Define struct. Contains information about
a single builtin (with multiple modes).
(CF): Define helper macro for...
(VAR1...VAR10): Define builtins with a type, name and 1-10 different
modes.
(neon_builtin_data): New array. Define information about builtins
for use during initialization/expansion.
(arm_init_neon_builtins): New function.
(arm_init_builtins): Call arm_init_neon_builtins if TARGET_NEON is
true.
(neon_builtin_compare): New function.
(locate_neon_builtin_icode): New function. Find an insn code for a
builtin given a function code for that builtin. Also return type of
builtin (NEON_BINOP, NEON_UNOP etc.).
(builtin_arg): New enumeration. Types of arguments for builtins.
(arm_expand_neon_args): New function. Expand a generic NEON builtin.
Takes a variable argument list of builtin_arg types, terminated by
NEON_ARG_STOP.
(arm_expand_neon_builtin): New function. Expand a NEON builtin.
(neon_reinterpret): New function. Expand NEON reinterpret intrinsic.
(neon_emit_pair_result_insn): New function. Support returning pairs
of vectors via a pointer.
(neon_disambiguate_copy): New function. Set up operands for a
multi-word copy such that registers do not get clobbered.
(arm_expand_builtin): Call arm_expand_neon_builtin if fcode >=
ARM_BUILTIN_NEON_BASE.
(arm_file_start): Set float-abi attribute for NEON.
(arm_vector_mode_supported_p): Enable NEON vector modes.
(arm_mangle_map_entry): New.
(arm_mangle_map): New.
(arm_mangle_vector_type): New.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_NEON__
when appropriate.
(TARGET_NEON): New macro. Target supports NEON.
(fputype): Add FPUTYPE_NEON.
(UNITS_PER_SIMD_WORD): Define. Allow quad-word registers to be used
for vectorization based on command-line arg.
(NEON_REGNO_OK_FOR_NREGS): Define.
(VALID_NEON_DREG_MODE, VALID_NEON_QREG_MODE)
(VALID_NEON_STRUCT_MODE): Define.
(PRINT_OPERAND_PUNCT_VALID_P): '#' is valid punctuation.
(arm_builtins): Add ARM_BUILTIN_NEON_BASE.
* config/arm/arm.md (VUNSPEC_POOL_16): Insert constant for unspec.
(consttable_16): Add pattern for outputting 16-byte minipool
entries.
(movv2si, movv4hi, movv8qi): Remove blank expanders (redefined in
vec-common.md).
(vec-common.md, neon.md): Include md files.
* config/arm/arm.opt (mvectorize-with-neon-quad): Add option.
* config/arm/constraints.md (constraint "Dn", "Dl", "DL"): Define.
(memory_constraint "Ut", "Un", "Us"): Define.
* config/arm/iwmmxt.md (VMMX, VSHFT): New mode macros.
(MMX_char): New mode attribute.
(addv8qi3, addv4hi3, addv2si3): Remove. Replace with...
(*add<mode>3_iwmmxt): New insn pattern.
(subv8qi3, subv4hi3, subv2si3): Remove. Replace with...
(*sub<mode>3_iwmmxt): New insn pattern.
(mulv4hi3): Rename to...
(*mulv4hi3_iwmmxt): This.
(smaxv8qi3, smaxv4hi3, smaxv2si3, umaxv8qi3, umaxv4hi3)
(umaxv2si3, sminv8qi3, sminv4hi3, sminv2si3, uminv8qi3)
(uminv4hi3, uminv2si3): Remove. Replace with...
(*smax<mode>3_iwmmxt, *umax<mode>3_iwmmxt, *smin<mode>3_iwmmxt)
(*umin<mode>3_iwmmxt): These.
(ashrv4hi3, ashrv2si3, ashrdi3_iwmmxt): Replace with...
(ashr<mode>3_iwmmxt): This new pattern.
(lshrv4hi3, lshrv2si3, lshrdi3_iwmmxt): Replace with...
(lshr<mode>3_iwmmxt): This new pattern.
(ashlv4hi3, ashlv2si3, ashldi3_iwmmxt): Replace with...
(ashl<mode>3_iwmmxt): This new pattern.
* config/arm/neon-docgen.ml: New file. Generate documentation for
intrinsics.
* config/arm/neon-gen.ml: New file. Generate arm_neon.h header.
* config/arm/arm_neon.h: New (autogenerated).
* config/arm/neon-testgen.ml: New file. Generate NEON tests
automatically.
* config/arm/neon.md: New file. Define NEON instructions.
* config/arm/neon.ml: New file. Abstract description of NEON
instructions, used to generate arm_neon.h header, documentation and tests.
* config/arm/t-arm (MD_INCLUDES): Add vec-common.md, neon.md.
* vec-common.md: New file. Shared parts for iWMMXt and NEON vector
support.
* doc/extend.texi (ARM Built-in Functions): Rename and remove
extraneous comma.
(ARM NEON Intrinsics): New subsection.
* doc/arm-neon-intrinsics.texi: New (autogenerated).
gcc/testsuite/
* gcc.dg/vect/vect.exp: Check is-effective-target arm_neon_hw.
* gcc.dg/vect/tree-vect.h: Check for NEON SIMD support.
* lib/gcc-dg.exp (cleanup-saved-temps): Fix comment.
* lib/target-supports.exp (check_effective_target_arm_neon_ok)
(check_effective_target_arm_neon_hw): New.
* gcc.target/arm/neon/neon.exp: New file.
* gcc.target/arm/neon/polytypes.c: New file.
* gcc.target/arm/neon/v*.c (1870 files): New (autogenerated).
Co-Authored-By: Joseph Myers <joseph@codesourcery.com>
Co-Authored-By: Mark Shinwell <shinwell@codesourcery.com>
Co-Authored-By: Paul Brook <paul@codesourcery.com>
From-SVN: r126911
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2007-01-03 Paul Brook <paul@codesourcery.com>
Merge from sourcerygxx-4_1.
gcc/
* config/arm/thumb2.md: New file.
* config/arm/elf.h (JUMP_TABLES_IN_TEXT_SECTION): Return True for
Thumb-2.
* config/arm/coff.h (JUMP_TABLES_IN_TEXT_SECTION): Ditto.
* config/arm/aout.h (ASM_OUTPUT_ADDR_VEC_ELT): Add !Thumb-2 assertion.
(ASM_OUTPUT_ADDR_DIFF_ELT): Output Thumb-2 jump tables.
* config/arm/aof.h (ASM_OUTPUT_ADDR_DIFF_ELT): Output Thumb-2 jump
tables.
(ASM_OUTPUT_ADDR_VEC_ELT): Add !Thumb-2 assertion.
* config/arm/ieee754-df.S: Use macros for Thumb-2/Unified asm
comptibility.
* config/arm/ieee754-sf.S: Ditto.
* config/arm/arm.c (thumb_base_register_rtx_p): Rename...
(thumb1_base_register_rtx_p): ... to this.
(thumb_index_register_rtx_p): Rename...
(thumb1_index_register_rtx_p): ... to this.
(thumb_output_function_prologue): Rename...
(thumb1_output_function_prologue): ... to this.
(thumb_legitimate_address_p): Rename...
(thumb1_legitimate_address_p): ... to this.
(thumb_rtx_costs): Rename...
(thumb1_rtx_costs): ... to this.
(thumb_compute_save_reg_mask): Rename...
(thumb1_compute_save_reg_mask): ... to this.
(thumb_final_prescan_insn): Rename...
(thumb1_final_prescan_insn): ... to this.
(thumb_expand_epilogue): Rename...
(thumb1_expand_epilogue): ... to this.
(arm_unwind_emit_stm): Rename...
(arm_unwind_emit_sequence): ... to this.
(thumb2_legitimate_index_p, thumb2_legitimate_address_p,
thumb1_compute_save_reg_mask, arm_dwarf_handle_frame_unspec,
thumb2_index_mul_operand, output_move_vfp, arm_shift_nmem,
arm_save_coproc_regs, thumb_set_frame_pointer, arm_print_condition,
thumb2_final_prescan_insn, thumb2_asm_output_opcode, arm_output_shift,
thumb2_output_casesi): New functions.
(TARGET_DWARF_HANDLE_FRAME_UNSPEC): Define.
(FL_THUMB2, FL_NOTM, FL_DIV, FL_FOR_ARCH6T2, FL_FOR_ARCH7,
FL_FOR_ARCH7A, FL_FOR_ARCH7R, FL_FOR_ARCH7M, ARM_LSL_NAME,
THUMB2_WORK_REGS): Define.
(arm_arch_notm, arm_arch_thumb2, arm_arch_hwdiv, arm_condexec_count,
arm_condexec_mask, arm_condexec_masklen)): New variables.
(all_architectures): Add armv6t2, armv7, armv7a, armv7r and armv7m.
(arm_override_options): Check new CPU capabilities.
Set new architecture flag variables.
(arm_isr_value): Handle v7m interrupt functions.
(user_return_insn): Return 0 for v7m interrupt functions. Handle
Thumb-2.
(const_ok_for_arm): Handle Thumb-2 constants.
(arm_gen_constant): Ditto. Use movw when available.
(arm_function_ok_for_sibcall): Return false for v7m interrupt
functions.
(legitimize_pic_address, arm_call_tls_get_addr): Handle Thumb-2.
(thumb_find_work_register, arm_load_pic_register,
legitimize_tls_address, arm_address_cost, load_multiple_sequence,
emit_ldm_seq, emit_stm_seq, arm_select_cc_mode, get_jump_table_size,
print_multi_reg, output_mov_long_double_fpa_from_arm,
output_mov_long_double_arm_from_fpa, output_mov_double_fpa_from_arm,
output_mov_double_fpa_from_arm, output_move_double,
arm_compute_save_reg_mask, arm_compute_save_reg0_reg12_mask,
output_return_instruction, arm_output_function_prologue,
arm_output_epilogue, arm_get_frame_offsets, arm_regno_class,
arm_output_mi_thunk, thumb_set_return_address): Ditto.
(arm_expand_prologue): Handle Thumb-2. Use arm_save_coproc_regs.
(arm_coproc_mem_operand): Allow POST_INC/PRE_DEC.
(arithmetic_instr, shift_op): Use arm_shift_nmem.
(arm_print_operand): Use arm_print_condition. Handle '(', ')', '.',
'!' and 'L'.
(arm_final_prescan_insn): Use extract_constrain_insn_cached.
(thumb_expand_prologue): Use thumb_set_frame_pointer.
(arm_file_start): Output directive for unified syntax.
(arm_unwind_emit_set): Handle stack alignment instruction.
* config/arm/lib1funcs.asm: Remove default for __ARM_ARCH__.
Add v6t2, v7, v7a, v7r and v7m.
(RETLDM): Add Thumb-2 code.
(do_it, shift1, do_push, do_pop, COND, THUMB_SYNTAX): New macros.
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __thumb2__.
(TARGET_THUMB1, TARGET_32BIT, TARGET_THUMB2, TARGET_DSP_MULTIPLY,
TARGET_INT_SIMD, TARGET_UNIFIED_ASM, ARM_FT_STACKALIGN, IS_STACKALIGN,
THUMB2_TRAMPOLINE_TEMPLATE, TRAMPOLINE_ADJUST_ADDRESS,
ASM_OUTPUT_OPCODE, THUMB2_GO_IF_LEGITIMATE_ADDRESS,
THUMB2_LEGITIMIZE_ADDRESS, CASE_VECTOR_PC_RELATIVE,
CASE_VECTOR_SHORTEN_MODE, ADDR_VEC_ALIGN, ASM_OUTPUT_CASE_END,
ADJUST_INSN_LENGTH): Define.
(TARGET_REALLY_IWMMXT, TARGET_IWMMXT_ABI, CONDITIONAL_REGISTER_USAGE,
STATIC_CHAIN_REGNUM, HARD_REGNO_NREGS, INDEX_REG_CLASS,
BASE_REG_CLASS, MODE_BASE_REG_CLASS, SMALL_REGISTER_CLASSES,
PREFERRED_RELOAD_CLASS, SECONDARY_OUTPUT_RELOAD_CLASS,
SECONDARY_INPUT_RELOAD_CLASS, LIBCALL_VALUE, FUNCTION_VALUE_REGNO_P,
TRAMPOLINE_SIZE, INITIALIZE_TRAMPOLINE, HAVE_PRE_INCREMENT,
HAVE_POST_DECREMENT, HAVE_PRE_DECREMENT, HAVE_PRE_MODIFY_DISP,
HAVE_POST_MODIFY_DISP, HAVE_PRE_MODIFY_REG, HAVE_POST_MODIFY_REG,
REGNO_MODE_OK_FOR_BASE_P, LEGITIMATE_CONSTANT_P,
REG_MODE_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P, GO_IF_LEGITIMATE_ADDRESS,
LEGITIMIZE_ADDRESS, THUMB2_LEGITIMIZE_ADDRESS,
GO_IF_MODE_DEPENDENT_ADDRESS, MEMORY_MOVE_COST, BRANCH_COST,
ASM_APP_OFF, ASM_OUTPUT_CASE_LABEL, ARM_DECLARE_FUNCTION_NAME,
FINAL_PRESCAN_INSN, PRINT_OPERAND_PUNCT_VALID_P,
PRINT_OPERAND_ADDRESS): Adjust for Thumb-2.
(arm_arch_notm, arm_arch_thumb2, arm_arch_hwdiv): New declarations.
* config/arm/arm-cores.def: Add arm1156t2-s, cortex-a8, cortex-r4 and
cortex-m3.
* config/arm/arm-tune.md: Regenerate.
* config/arm/arm-protos.h: Update prototypes.
* config/arm/vfp.md: Enable patterns for Thumb-2.
(arm_movsi_vfp): Add movw alternative. Use output_move_vfp.
(arm_movdi_vfp, movsf_vfp, movdf_vfp): Use output_move_vfp.
(thumb2_movsi_vfp, thumb2_movdi_vfp, thumb2_movsf_vfp,
thumb2_movdf_vfp, thumb2_movsfcc_vfp, thumb2_movdfcc_vfp): New.
* config/arm/libunwind.S: Add Thumb-2 code.
* config/arm/constraints.md: Update include Thumb-2.
* config/arm/ieee754-sf.S: Add Thumb-2/Unified asm support.
* config/arm/ieee754-df.S: Ditto.
* config/arm/bpabi.S: Ditto.
* config/arm/t-arm (MD_INCLUDES): Add thumb2.md.
* config/arm/predicates.md (low_register_operand,
low_reg_or_int_operand, thumb_16bit_operator): New.
(thumb_cmp_operand, thumb_cmpneg_operand): Rename...
(thumb1_cmp_operand, thumb1_cmpneg_operand): ... to this.
* config/arm/t-arm-elf: Add armv7 multilib.
* config/arm/arm.md: Update patterns for Thumb-2 and Unified asm.
Include thumb2.md.
(UNSPEC_STACK_ALIGN, ce_count): New.
(arm_incscc, arm_decscc, arm_umaxsi3, arm_uminsi3,
arm_zero_extendsidi2, arm_zero_extendqidi2): New
insns/expanders.
* config/arm/fpa.md: Update patterns for Thumb-2 and Unified asm.
(thumb2_movsf_fpa, thumb2_movdf_fpa, thumb2_movxf_fpa,
thumb2_movsfcc_fpa, thumb2_movdfcc_fpa): New insns.
* config/arm/cirrus.md: Update patterns for Thumb-2 and Unified asm.
(cirrus_thumb2_movdi, cirrus_thumb2_movsi_insn,
thumb2_cirrus_movsf_hard_insn, thumb2_cirrus_movdf_hard_insn): New
insns.
* doc/extend.texi: Document ARMv7-M interrupt functions.
* doc/invoke.texi: Document Thumb-2 new cores+architectures.
From-SVN: r120408
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* config/arm/arm.h (FUNCTION_ARG_ADVANCE): Only adjust
iwmmxt_nregs if TARGET_IWMMXT_ABI.
* config/arm/iwmmxt.md (movv8qi_internal, movv4hi_internal,
movv2si_internal): Support moves between core registers.
From-SVN: r118825
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2006-01-20 Paul Brook <paul@codesourcery.com>
Merge from csl-arm-branch.
2005-09-21 Kazu Hirata <kazu@codesourcery.com>
* config/arm/arm.md (movdi): Force operands[1] to a register
if we have a non-register source.
(*arm_movdi, *movdf_soft_insn): Require that one of the
operands be a register.
* config/arm/iwmmxt.md (*iwmmxt_arm_movdi): Likewise.
* config/arm/vfp.md (*arm_movdi_vfp, *movdf_vfp): Likewise.
From-SVN: r110048
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From-SVN: r101314
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gen_lowpart and gen_highpart_mode.
* arm.c (arm_const_double_inline_cost): Handle any constant by
using gen_lowpart and gen_highpart_mode.
(note_invalid_constants): All constants in an RTX with a constraint
that permits memory are now pushed to the constant pool.
(output_move_double): Delete code to handle reg to reg and
constant to reg moves.
(const_double_needs_minipool, output_mov_immediate): Delete.
* arm.h (EXTRA_CONSTRAINT_STR_ARM): All 'D' variants now handle
CONST_INT and CONST_VECTOR.
* arm.md (ANY64): New mode macro.
(arm_movdi): Split reg-reg and const-reg moves. Simplify constraints.
(movdf_soft_insn): Split reg-reg and const-reg moves.
(split patterns for 64-bit constant and register moves): New.
* cirrus.md (cirrus_arm_movdi): Split reg-reg and const-reg moves.
(cirrus_movdf_hard_insn): Likewise.
* fpa.md (movdf_fpa): Likewise.
* iwmmxt.md (iwmmxt_arm_movdi): Likewise.
(movv8qi_internal, movv4hi_internal, movv2si_internal): Fix
constraints.
(movv2si_internal_2): Likewise.
* vfp.md (arm_movdi_vfp): Split reg-reg and const-reg moves.
(movdf_vfp): Likewise.
* arm-protos.h (output_mov_immediate): Delete prototype.
From-SVN: r97778
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* c-opts.c, expmed.c, gengtype.c, tree-complex.c,
config/arm/iwmmxt.md, config/avr/avr.c, config/s390/s390.h:
Update copyright.
From-SVN: r94154
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2005-01-22 Paul Brook <paul@codesourcery.com>
* config/arm/arm.md: Use "Uy" constraint for wcgr load/stores.
[[Split portion of a mixed commit.]]
From-SVN: r94080.2
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* config/arm/arm-protots.h (vfp_mem_operand): Rename ...
(arm_coproc_mem_operand): ... To this.
* config/arm/arm.c (arm_legitimate_address_p): Allow ldrd modes.
(arm_legitimate_index_p): Ditto.
(vfp_mem_operand): Rename ...
(arm_coproc_mem_operand): ... To this. Handle writeback modes.
(vfp_secondary_reload_class): Use it.
(output_move_double): Use doubleword load/store instructions.
(arm_hard_regno_mode_ok): Only allow even reg pairs for ldrd.
* config/arm/arm.h (TARGET_LDRD): Define.
(EXTRA_CONSTRAINT_STR_ARM): Add 'Uy'.
* config/gcc/arm/arm.md (arm_movdi): Allow all valid memory operands.
New splitter for invalid doubleword loads.
* config/arm/iwmmxt.md (iwmmxt_arm_movdi): Use Uy constraint.
* config/arm/vfp.md (arm_movdi_vfp): Allow all valid memory operands.
* doc/md.texi: Document Uy constraint.
From-SVN: r81543
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gcc/
* alloc-pool.h, c-convert.c, c-lang.c, c-tree.h,
caller-save.c, df.h, genconfig.c, global.c, lcm.c,
ra-rewrite.c, ra.c, regclass.c, regs.h, resource.c,
sched-rgn.c, config/arm/aof.h, config/arm/cirrus.md,
config/arm/fpa.md, config/arm/iwmmxt.md,
config/arm/netbsd-elf.h, config/arm/netbsd.h,
config/m68hc11/m68hc11.md, config/mips/iris5.h,
config/mn10300/mn10300.md, config/rs6000/altivec.md,
config/sparc/netbsd-elf.h: Update copyright.
cp/
* error.c, search.c: Update copyright.
java/
* typeck.c: Update copyright.
From-SVN: r77265
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Merge from csl-arm-branch.
2004-01-30 Paul Brook <paul@codesourcery.com>
* aof.h (REGISTER_NAMES): Add vfp reg names
(ADDITIONAL_REGISTER_NAMES): Ditto.
* aout.h (REGISTER_NAMES): Ditto.
(ADDITIONAL_REGISTER_NAMES): Ditto.
* arm-protos.h: Update/Add Prototypes.
* arm.c (init_fp_table): Rename from init_fpa_table. Update users.
Only allow 0.0 for VFP.
(fp_consts_inited): Rename from fpa_consts_inited. Update users.
(values_fp): Rename from values_fpa. Update Users.
(arm_const_double_rtx): Rename from const_double_rtx_ok_for_fpa.
Update users. Only check valid constants for this hardware.
(arm_float_rhs_operand): Rename from fpa_rhs_operand. Update Users.
Only allow consts for FPA.
(arm_float_add_operand): Rename from fpa_add_operand. Update users.
Only allow consts for FPA.
(use_return_insn): Check for saved VFP regs.
(arm_legitimate_address_p): Handle VFP DFmode addressing.
(arm_legitimize_address): Ditto.
(arm_general_register_operand): New function.
(vfp_mem_operand): New function.
(vfp_compare_operand): New function.
(vfp_secondary_reload_class): New function.
(arm_float_compare_operand): New function.
(vfp_print_multi): New function.
(vfp_output_fstmx): New function.
(vfp_emit_fstm): New function.
(arm_output_epilogue): Output VPF reg restore code.
(arm_expand_prologue): Output VFP reg save code.
(arm_print_operand): Add 'P'.
(arm_hard_regno_mode_ok): Return modes for VFP regs.
(arm_regno_class): Return classes for VFP regs.
(arm_compute_initial_elimination_offset): Include space for VFP regs.
(arm_get_frame_size): Ditto.
* arm.h (FIXED_REGISTERS): Add VFP regs.
(CALL_USED_REGISTERS): Ditto.
(CONDITIONAL_REGISTER_USAGE): Enable VFP regs.
(FIRST_VFP_REGNUM): Define.
(LAST_VFP_REGNUM): Define.
(IS_VFP_REGNUM): Define.
(FIRST_PSEUDO_REGISTER): Include VFP regs.
(HARD_REGNO_NREGS): Handle VFP regs.
(REG_ALLOC_ORDER): Add VFP regs.
(enum reg_class): Add VFP_REGS.
(REG_CLASS_NAMES): Ditto.
(REG_CLASS_CONTENTS): Ditto.
(CANNOT_CHANGE_MODE_CLASS) Handle VFP Regs.
(REG_CLASS_FROM_LETTER): Add 'w'.
(EXTRA_CONSTRAINT_ARM): Add 'U'.
(EXTRA_MEMORY_CONSTRAINT): Define.
(SECONDARY_OUTPUT_RELOAD_CLASS): Handle VFP regs.
(SECONDARY_INPUT_RELOAD_CLASS): Ditto.
(REGISTER_MOVE_COST): Ditto.
(PREDICATE_CODES): Add arm_general_register_operand,
arm_float_compare_operand and vfp_compare_operand.
* arm.md (various): Rename as above.
(divsf3): Enable when TARGET_VFP.
(divdf3): Ditto.
(movdfcc): Ditto.
(sqrtsf2): Ditto.
(sqrtdf2): Ditto.
(arm_movdi): Disable when TARGET_VFP.
(arm_movsi_insn): Ditto.
(movsi): Only split with general regs.
(cmpsf): Use arm_float_compare_operand.
(push_fp_multi): Restrict to TARGET_FPA.
(vfp.md): Include.
* vfp.md: New file.
* fpa.md (various): Rename as above.
* doc/md.texi: Document ARM w and U constraints.
2004-01-15 Paul Brook <paul@codesourcery.com>
* config.gcc: Add with_fpu. Allow with-float=softfp.
* config/arm/arm.c (arm_override_options): Rename *-s to *s.
Break out of loop when we find a float-abi. Fix typo.
* config/arm/arm.h (OPTION_DEFAULT_SPECS): Add "fpu".
Set -mfloat-abi=.
* doc/install.texi: Document --with-fpu.
2003-01-14 Paul Brook <paul@codesourcery.com>
* config.gcc (with_arch): Add armv6.
* config/arm/arm.h: Rename TARGET_CPU_*_s to TARGET_CPU_*s.
* config/arm/arm.c (arm_overrride_options): Ditto.
2004-01-08 Richard Earnshaw <rearnsha@arm.com>
* arm.c (FL_ARCH3M): Renamed from FL_FAST_MULT.
(FL_ARCH6): Renamed from FL_ARCH6J.
(arm_arch3m): Renamed from arm_fast_multiply.
(arm_arch6): Renamed from arm_arch6j.
* arm.h: Update all uses of above.
* arm-cores.def: Likewise.
* arm.md: Likewise.
* arm.h (CPP_CPU_ARCH_SPEC): Emit __ARM_ARCH_6J__ define for armV6j,
not arm6j. Add entry for arch armv6.
2004-01-07 Richard Earnshaw <rearnsha@arm.com>
* arm.c (arm_emit_extendsi): Delete.
* arm-protos.h (arm_emit_extendsi): Delete.
* arm.md (zero_extendhisi2): Also handle zero-extension of
non-subregs.
(zero_extendqisi2, extendhisi2, extendqisi2): Likewise.
(thumb_zero_extendhisi2): Only match if not v6.
(arm_zero_extendhisi2, thumb_zero_extendqisi2, arm_zero_extendqisi2)
(thumb_extendhisi2, arm_extendhisi2, arm_extendqisi)
(thumb_extendqisi2): Likewise.
(thumb_zero_extendhisi2_v6, arm_zero_extendhisi2_v6): New patterns.
(thumb_zero_extendqisi2_v6, arm_zero_extendqisi2_v6): New patterns.
(thumb_extendhisi2_insn_v6, arm_extendhisi2_v6): New patterns.
(thumb_extendqisi2_v6, arm_extendqisi_v6): New patterns.
(arm_zero_extendhisi2_reg, arm_zero_extendqisi2_reg): Delete.
(arm_extendhisi2_reg, arm_extendqisi2_reg): Delete.
(arm_zero_extendhisi2addsi): Remove subreg. Add attributes.
(arm_zero_extendqisi2addsi, arm_extendhisi2addsi): Likewise.
(arm_extendqisi2addsi): Likewise.
2003-12-31 Mark Mitchell <mark@codesourcery.com>
Revert this change:
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
* config/arm/arm.h (THUMB_LEGTITIMIZE_RELOAD_ADDRESS): Reload REG
+ REG addressing modes.
2003-12-30 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (THUMB_LEGITIMATE_CONSTANT_P): Accept
CONSTANT_P_RTX.
2003-30-12 Paul Brook <paul@codesourcery.com>
* longlong.h: protect arm inlines with !defined (__thumb__)
2003-30-12 Paul Brook <paul@codesourcery.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Always define __arm__.
2003-12-30 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Fix typo in previous
change.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* builtins.c (expand_builtin_apply_args_1): Add pretend args size
to the virtual incoming args pointer for downward stacks.
2003-12-29 Paul Brook <paul@codesourcery.com>
* config/arm/arm-cores.def: Add cost function.
* config/arm/arm.c (arm_*_rtx_costs): New functions.
(arm_rtx_costs): Remove
(struct processors): Add rtx_costs field.
(all_cores, all_architectures): Ditto.
(arm_override_options): Set targetm.rtx_costs.
(thumb_rtx_costs): New function.
(arm_rtx_costs_1): Remove cases handled elsewhere.
* config/arm/arm.h (processor_type): Add COSTS parameter.
2003-12-29 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm.md (generic_sched): arm926 has its own scheduler.
(arm926ejs.md): Include it.
* config/arm/arm926ejs.md: New pipeline description.
2003-12-24 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_arch6j): New variable.
(arm_override_options): Set it.
(arm_emit_extendsi): New function.
* config/arm/arm-protos.h (arm_emit_extendsi): Add prototype.
* config/arm/arm.h (arm_arch6j): Declare.
* config/arm/arm.md: Add sign/zero extend insns.
2003-12-23 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (all_architectures): Add armv6.
* doc/invoke.texi: Document it.
2003-12-19 Paul Brook <paul@codesourcery.com>
* config/arm/arm.md: Add load1 and load_byte "type" attrs. Modify
insn patterns to match.
* config/arm/arm-generic.md: Ditto.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/amm/iwmmxt.md: Ditto.
* config/arm/arm1026ejs.md: Ditto.
* config/arm/arm1135jfs.md: Ditto. Add insn_reservation and bypasses
for 11_loadb.
2003-12-18 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_alu_shift_value_dep): Declare.
* config/arm/arm.c (arm_adjust_cost): Check shift cost for
TYPE_ALU_SHIFT and TYPE_ALU_SHIFT_REG.
(arm_no_early_store_addr_dep, arm_no_early_alu_shift_dep,
arm_no_early_mul_dep): Correctly deal with conditional execution,
parallels and single shift operations.
(arm_no_early_alu_shift_value_dep): Define.
* arm.md (attr type): Replace 'normal' with 'alu',
'alu_shift' and 'alu_shift_reg'.
(attr core_cycles): Adjust.
(*addsi3_carryin_shift, andsi_not_shiftsi_si, *arm_shiftsi3,
*shiftsi3_compare0, *notsi_shiftsi, *notsi_shiftsi_compare0,
*not_shiftsi_compare0_scratch, *cmpsi_shiftsi, *cmpsi_shiftsi_swp,
*cmpsi_neg_shiftsi, *arith_shiftsi, *arith_shiftsi_compare0,
*arith_shiftsi_compare0_scratch, *sub_shiftsi,
*sub_shiftsi_compare0, *sub_shiftsi_compare0_scratch,
*if_shift_move, *if_move_shift, *if_shift_shift): Set type
attribute appropriately.
* config/arm/arm1026ejs.md (alu_op): Adjust.
(alu_shift_op, alu_shift_reg_op): New.
* config/arm/arm1136.md: Add better bypasses for early
registers. Remove load[234] and store[234] bypasses.
(11_alu_op): Adjust.
(11_alu_shift_op, 11_alu_shift_reg_op): New.
2003-12-15 Nathan Sidwell <nathan@codesourcery.com>
* config/arm/arm-protos.h (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Declare.
* config/arm/arm.c (arm_no_early_store_addr_dep,
arm_no_early_alu_shift_dep, arm_no_early_mul_dep): Define.
* config/arm/arm1026ejs.md: Add load-store bypass.
* config/arm/arm1136jfs.md (11_alu_op): Take 2 cycles.
Add bypasses between instructions.
2003-12-10 Paul Brook <paul@codesourcery.com>
* config/arm/arm.c (arm_fpu_model): New variable.
(arm_fload_abi): New variable.
(target_fpe_name): Rename from target_fp_name.
(target_fpu_name): New variable.
(arm_is_cirrus): Remove.
(fpu_desc): New struct.
(all_fpus): Define.
(pf_model_for_fpu): Define.
(all_loat_abis): Define.
(arm_override_options): Set fp arch flags based on -mfpu=
and -float-abi=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(*): Use new TARGET_* flags.
* config/arm/arm.h (TARGET_ANY_HARD_FLOAT): Remove.
(TARGET_HARD_FLOAT): No longer implies TARGET_FPA.
(TARGET_SOFT_FLOAT): Ditto.
(TARGET_SOFT_FLOAT_ABI): New.
(TARGET_MAVERICK): Rename from TARGET_CIRRUS. No longer implies
TARGET_HARD_FLOAT.
(TARGET_VFP): No longer implies TARGET_HARD_FLOAT.
(TARGET_OPTIONS): Add -mfpu=.
(FIRST_FPA_REGNUM): Rename from FIRST_ARM_FP_REGNUM.
(LAST_FPA_REGNUM): Rename from LAST_ARM_FP_REGNUM.
(arm_pf_model): Define.
(arm_float_abi_type): Define.
(fputype): Add FPUTYPE_VFP. Change SOFT_FPA->NONE
* config/arm/arm.md: Use new TARGET_* flags.
* config/arm/cirrus.md: Ditto.
* config/arm/fpa.md: Ditto.
* config/arm/elf.h (ASM_SPEC): Pass -mfloat-abi= and -mfpu=.
* config/arm/semi.h (ASM_SPEC): Ditto.
* config/arm/netbsd-elf.h (SUBTARGET_ASM_FLOAT_SPEC): Specify vfp.
(FPUTYPE_DEFAULT): Set to VFP.
* doc/invoke.texi: Document -mfpu= and -mfloat-abi=.
2003-11-22 Phil Edwards <phil@codesourcery.com>
PR target/12476
* config/arm/arm.c (arm_output_mi_thunk): In Thumb mode, use
'bx' instead of 'b' to avoid branch range restrictions. Output
the thunk immediately before the thunked-to function.
* config/arm/arm.h (ARM_DECLARE_FUNCTION_NAME): Do not emit
.thumb_func if a thunk is being generated. Emit .code 16 along
with .thumb_func if a thunk is not being generated.
2003-11-15 Nicolas Pitre <nico@cam.org>
* config/arm/arm.md (ashldi3, arm_ashldi3_1bit, ashrdi3,
arm_ashrdi3_1bit, lshrdi3, arm_lshrdi3_1bit): New patterns.
* config/arm/iwmmxt.md (ashrdi3_iwmmxt): Renamed from ashrdi3.
(lshrdi3_iwmmxt): Renamed from lshrdi3.
* config/arm/arm.c (IWMMXT_BUILTIN2): Renamed argument accordingly.
2003-11-12 Steve Woodford <scw@wasabisystems.com>
Ian Lance Taylor <ian@wasabisystems.com>
* config/arm/lib1funcs.asm (ARM_DIV_BODY, ARM_MOD_BODY): Add new
code for __ARM_ARCH__ >= 5 && ! defined (__OPTIMIZE_SIZE__).
2003-11-05 Phil Edwards <phil@codesourcery.com>
* config/arm/arm.md (insn): Add new V6 instruction names.
(generic_sched): New attr.
* config/arm/arm-generic.md: Use generic_sched here.
* config/arm/arm1026ejs.md: Do not model fetch/issue/decode
stages of pipeline. Adjust latency counts accordingly.
* config/arm/arm1136jfs.md: New file.
2003-10-28 Mark Mitchell <mark@codesourcery.com>
* config/arm/arm.h (processor_type): New enumeration type.
(CPP_ARCH_DEFAULT_SPEC): Set appropriately for ARM 926EJ-S,
ARM1026EJ-S, ARM1136J-S, and ARM1136JF-S processor cores.
(CPP_CPU_ARCH_SPEC): Likewise.
* config/arm/arm.c (arm_tune): New variable.
(all_cores): Use cores.def.
(all_architectures): Add representative processor.
(arm_override_options): Restructure way in which tuning
information is deduced.
* arm.md: Update "insn" and "type" attributes throughout.
(insn): New attribute.
(type): Compute "mult" from "insn" attribute. Add load2,
load3, load4 alternatives.
(arm automaton): Move to arm-generic.md.
* config/arm/arm-cores.def: New file.
* config/arm/arm-generic.md: Likewise.
* config/arm/arm1026ejs.md: Likewise.
From-SVN: r77171
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* config/arm/iwmmxt.md (cond_iwmmxt_movsi_insn): New pattern.
* config/arm/arm.md: For splits which rely on conditional moves,
remove ! TARGET_IWMMXT condition.
From-SVN: r72456
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* builtins.c: Follow spelling conventions.
* cgraph.c: Likewise.
* cpplex.c: Likewise.
* config/arm/arm.c: Likewise.
* config/arm/iwmmxt.md: Likewise.
* config/c4x/c4x-modes.def: Likewise.
* config/c4x/c4x.c: Likewise.
* config/c4x/c4x.h: Likewise.
* config/c4x/c4x.md: Likewise.
* config/i386/i386-interix.h: Likewise.
* config/mips/mips.h: Likewise.
From-SVN: r68648
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* config.gcc: Add an extra_header for ARM targets.
Support configuring with --with-cpu=iwmmxt.
* doc/invoke.texi: Document new value for -mcpu= ARM switch.
* config/arm/aof.h (REGISTER_NAMES): Add iwmmxt register
names. Fix formatting.
* config/arm/aout.h (REGISTER_NAMES): Add iwmmxt register
names.
* config/arm/arm-protos.h (arm_emit_vector_const): New
prototype.
(arm_output_load_gr): New prototype.
* config/arm/arm.c (extra_reg_names1): Delete.
(TARGET_INIT_BUILTINS, TARGET_EXPAND_BUILTIN, FL_IWMMXT,
* arch_is_iwmmxt): Define.
(all_cores, all_architecture): Add entry for iwmmxt.
(arm_override_options): Add support for iwmmxt.
(use_return_insn, arm_function_arg, arm_legitimate_index_p,
arm_print_value, arm_rtx_costs_1, output_move_double,
arm_compute_save_reg_mask, arm_output_epilogue,
arm_get_frame_size, arm_expand_prologue, arm_print_operand,
arm_assemble_integer, arm_hard_regno_ok, arm_regno_class):
Likewise.
(arm_init_cumulative_args): Count iwmmxt registers.
(arm_function_ok_for_sibcall): Return false of sibcall_blocked
has been set.
(struct minipool_node): Add fix_size field.
(add_minipool_forward_ref): Add support for 8-byte aligning of
the pool.
(add_minipool_backward_ref, add_minipool_offsets,
dump_minipool, push_minipool_fix): Likewise.
(struct builtin_description): New struct.
(builtin_description): New array of iwmmxt builtin functions.
(arm_init_iwmmxt_builtins): New function.
(arm_init_builtins): New function.
(safe_vector_operand): New function.
(arm_expand_binop_builtin): New function.
(arm_expand_unop_builtin): New function.
(arm_expand_builtin): New function.
(arm_emit_vector_const): New function.
(arm_output_load_gr): New function.
* config/arm/arm.h (TARGET_CPU_iwmmxt, TARGET_IWMMXT,
TARGET_REALLY_IWMMXT, arm_arch_iwmmxt, IWMMXT_ALIGNMENT,
TYPE_NEEDS_IWMMXT_ALIGNMENT, ADJUST_FIELD_ALIGN,
DATA_ALIGNMENT, LOCAL_ALIGNMENT, VECTOR_MODE_SUPPORTED_P): Define.
(BIGGEST_ALIGNMENT): Set to 64 if ATPCS support is enabled.
(CPP_CPU_ARCH_SPEC): Add entries for iwmmxt.
(FIXED_REGISTERS, CALL_USED_REGISTERS, REG_ALLOC_ORDER,
reg_class, REG_CLASS_NAMES, REG_CLASS_CONTENTS,
REG_CLASS_FOR_LETTER): Add iwmmxt registers.
(SUBTARGET_CONDITIONAL_REGISTER_USAGE): Disable iwmmxt
registers unless the iwmmxt target is selected.
(FIRST_IWMMXT_GR_REGNUM, LAST_IWMMXT_GR_REGNUM,
FIRST_IWMMXT_REGNUM, LAST_IWMMXT_REGNUM, IS_IWMMXT_REGNUM,
IS_IWMMXT_GR_REGNUM): Define.
(FIRST_PSEUDO_REGISTER): Bump to 63.
(struct machine_function): Add sibcall_blocked field.
(Struct CUMULATIVE_ARGS): Add iwmmxt_nregs, named_count and
nargs fields.
(enum arm_builtins): New enum list.
* config/arm/arm.md (UNSPEC_WSHUFH, UNSPEC_WACC,
UNSPEC_TMOVMSK, UNSPEC_WSAD, UNSPEC_WSADZ, UNSPEC_WMACS,
UNSPEC_WMACU, UNSPEC_WMACSZ, UNSPEC_WMACUZ, UNSPEC_CLRDI,
UNSPEC_WMADDS, UNSPEC_WMADDU): New unspecs.
(VUNSPEC_TMRC, VUNSPEC_TMCR, VUNSPEC_ALIGN8, VUNSPEC_WCMP_EQ,
VUNSPEC_WCMP_GTU, VUNSPEC_WCMP_GT): New vunspecs.
(movv2si, movv4hi, movv8qi): New expands for vector moves.
Include iwmmxt.md.
* config/arm/t-xscale-elf (MULTILIB_OPITONS): Add iwmmxt
multilib.
(MULTILIB_DIRNAMES, MULTILIB_REDUNDANT_DIRS): Likewise.
* config/arm/mmintrin.h: New ARM specific header file.
* config/arm/iwmmx.md: New iWMMXt specific machine patterns.
From-SVN: r68157
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