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* aarch64-simd.md (aarch64_ld1x2<VQ:mode>): New.Kugan Vivekanandarajah2017-12-273-1/+389
* t-aarch64-linux (MULTILIB_OSDIRNAMES): Fix triplet for ilp32.Steve Ellcey2017-12-211-1/+1
* t-aarch64-linux (MULTILIB_OSDIRNAMES): Handle multi-arch for ilp32.Andrew Pinski2017-12-211-1/+1
* [patch AArch64] Do not perform a vector splat for vector initialisation if it...James Greenhalgh2017-12-211-3/+45
* [AArch64] Tweak aarch64_classify_address interfaceRichard Sandiford2017-12-214-31/+45
* poly_int: IN_TARGET_CODERichard Sandiford2017-12-165-0/+10
* [PATCH PR81228][AARCH64]Fix ICE by adding LTGT in vec_cmp<mode><v_int_equiv>Sudakshina Das2017-12-142-1/+11
* [AArch64] Specify fp16 support for Cortex-A55 and Cortex-A75Kyrylo Tkachov2017-12-141-3/+3
* aarch64.c (aarch64_print_operand): Don't start output_operand_lossage first a...Jakub Jelinek2017-12-111-3/+3
* [AArch64] Fix ICEs in aarch64_print_operandRichard Sandiford2017-12-071-27/+27
* thunderx2-t99.md (thunderx2t99_branch): Add trap to reservation.Steve Ellcey2017-12-051-3/+24
* [AArch64] Fix some define_insn_and_split conditionsRichard Sandiford2017-12-051-5/+5
* [AArch64] Fix address printing on ILP32Wilco Dijkstra2017-12-012-13/+14
* [AArch64] Fix ICE due to store_pair_lanesWilco Dijkstra2017-11-292-7/+54
* [Patch AArch64] Fixup floating point division with -march=armv8-a+nosimdRamana Radhakrishnan2017-11-282-1/+4
* Replace REDUC_*_EXPRs with internal functions.Richard Sandiford2017-11-222-8/+11
* aarch64-simd.md (fnma<mode>4): Move neg operator to canonical location.Steve Ellcey2017-11-171-3/+2
* re PR target/81356 (__builtin_strcpy is not good for copying an empty string ...Steve Ellcey2017-11-171-20/+0
* [AArch64] Adjust tuning parameters for FalkorLuis Machado2017-11-171-2/+2
* [Patch AArch64] Stop generating BSL for simple integer codeJames Greenhalgh2017-11-141-14/+108
* [AArch64] More aarch64_endian_lane_rtxRichard Sandiford2017-11-131-10/+8
* [AArch64] Add STP pattern to store a vec_concat of two 64-bit registersKyrylo Tkachov2017-11-083-0/+28
* vec_merge + vec_duplicate + vec_concat simplificationKyrylo Tkachov2017-11-082-0/+21
* Simplify vec_merge of vec_duplicate with const_vectorKyrylo Tkachov2017-11-082-5/+8
* [AArch64] Simplify aarch64_can_eliminateWilco Dijkstra2017-11-081-17/+5
* [AArch64] Remove aarch64_frame_pointer_requiredWilco Dijkstra2017-11-081-29/+8
* [AArch64] Use aarch64_reg_or_imm instead of nonmemory_operandRichard Sandiford2017-11-071-3/+3
* [AArch64] Pass number of units to aarch64_expand_vec_perm(_const)Richard Sandiford2017-11-063-11/+15
* [AArch64] Pass number of units to aarch64_simd_vect_par_cnst_halfRichard Sandiford2017-11-063-39/+40
* [AArch64] Pass number of units to aarch64_reverse_maskRichard Sandiford2017-11-063-11/+13
* [AArch64] Add an endian_lane_rtx helper routineRichard Sandiford2017-11-066-66/+80
* Improve aarch64_legitimate_constant_pWilco Dijkstra2017-11-031-30/+28
* re PR c++/82768 (ICE in synthesize_implicit_template_parm, at cp/parser.c:39338)Wilco Dijkstra2017-11-031-9/+1
* Set default sched pressure algorithmWilco Dijkstra2017-11-031-0/+5
* [aarch64] Add Qualcomm saphira CPU support.Siddhesh Poyarekar2017-11-033-1/+34
* re PR target/79868 (aarch64: diagnostic "malformed target %s value" not trans...Steve Ellcey2017-11-023-56/+38
* Define MALLOC_ABI_ALIGNMENTWilco Dijkstra2017-11-021-0/+3
* [AArch64] Minor rtx costs tweakRichard Sandiford2017-11-011-6/+4
* [AArch64] Rename the internal "Upl" constraintRichard Sandiford2017-11-012-3/+3
* [AArch64] Move code aroundRichard Sandiford2017-11-011-82/+81
* [AArch64] Generate permute patterns using rtx buildersRichard Sandiford2017-11-013-217/+42
* Add gen_(const_)vec_duplicate helpersRichard Sandiford2017-11-011-13/+5
* Wrong type-attribute for stp and strDominik Infuehr2017-10-301-5/+5
* aarch64.md (<optab>_trunc><vf><GPI:mode>2): New pattern.Michael Collison2017-10-272-5/+38
* Introduce emit_frame_chainWilco Dijkstra2017-10-262-12/+16
* Simplify frame layout for stack probingWilco Dijkstra2017-10-261-16/+10
* Improve addressing of TI/TFmodeWilco Dijkstra2017-10-261-4/+8
* re PR target/81800 (On aarch64 ilp32 lrint should not be inlined as two instr...Tamar Christina2017-10-261-1/+3
* PR60580: Fix frame pointer option magicWilco Dijkstra2017-10-241-24/+18
* Convert STARTING_FRAME_OFFSET to a hookRichard Sandiford2017-10-231-2/+0
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