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path: root/gcc/config/aarch64/aarch64-protos.h
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* [AArch64] Generalize code alignmentjiwang2014-12-181-1/+3
* 2014-12-11 Andrew Pinski <apinski@cavium.com>pinskia2014-12-111-0/+1
* * config/aarch64/aarch64-protos.h (aarch64_function_profiler): Removefyang2014-12-101-1/+0
* [AArch64] Add TARGET_SCHED_REASSOCIATION_WIDTHjiwang2014-12-091-0/+3
* [AArch64]load store pair optimization using sched_fusion pass.mshawcroft2014-12-051-0/+5
* [AArch64][1/5] Implement TARGET_SCHED_MACRO_FUSION_PAIR_Pktkachov2014-11-241-0/+1
* PR target/63870cbaylis2014-11-201-1/+1
* 2014-11-20 Tejas Belagod <tejas.belagod@arm.com>belagod2014-11-201-1/+1
* 2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org>zqchen2014-11-171-0/+1
* [AArch64] Restructure arm_neon.h vector types.belagod2014-11-051-0/+1
* gcc/ada/rsandifo2014-10-291-30/+30
* [AArch64] Implement workaround for ARM Cortex-A53 erratum 835769ktkachov2014-10-101-0/+2
* [AArch64] Tighten predicates on SIMD shift intrinsicsjgreenhalgh2014-09-251-1/+0
* [AArch64] Enable shrink wrapping.mshawcroft2014-09-231-0/+1
* [AArch64] Simplify vreinterpret for float64x1_t using casts.alalaw012014-09-111-3/+0
* recog_memoized works on an rtx_insn *dmalcolm2014-09-091-1/+1
* [PATCH AArch64 1/2] Improve codegen of vector compares inc. tst instructionalalaw012014-09-051-0/+1
* [AArch64] Use CC_Z and CC_NZ with csinc and similar instructions.ktkachov2014-09-021-0/+1
* [AArch64][2/2] Add constrain to address offset in storewb_pair/loadwb_pair insnsjiwang2014-08-011-0/+1
* [AArch64_be] Fix vec_select hi/lo mask confusions.jgreenhalgh2014-07-311-0/+2
* Fix aarch64_emit_call_insn return typevries2014-06-191-1/+1
* -fuse-caller-save - Enable for AArch64vries2014-06-181-0/+1
* [AArch64] Implement movmem for the benefit of inline memcpyjgreenhalgh2014-06-061-0/+1
* 2014-05-23 Kugan Vivekanandarajah <kuganv@linaro.org>kugan2014-05-221-0/+1
* [AArch64 costs 1/18] Refactor aarch64_address_costs.jgreenhalgh2014-05-161-0/+13
* Implement HARD_REGNO_CALLER_SAVE_MODE for AArch64ibolton2014-05-131-0/+2
* [AArch64] Relax modes_tieable_p and cannot_change_mode_classjgreenhalgh2014-04-281-0/+2
* [AArch64] Relax CANNOT_CHANGE_MODE_CLASSbelagod2014-01-201-0/+3
* 2014-01-14 Andrew Pinski <apinski@cavium.com>pinskia2014-01-141-0/+1
* Update copyright years in gcc/rsandifo2014-01-021-1/+1
* [AArch64 1/3 big.LITTLE] Driver rewriting of big.LITTLE names.jgreenhalgh2013-12-181-0/+2
* * config/aarch64/aarch64.c: Include aarch-cost-tables.h.ktkachov2013-11-141-20/+1
* [AArch64] -mcmodel=tiny -fPIC GOT support.mshawcroft2013-07-151-0/+12
* 2013-07-12 Tejas Belagod <tejas.belagod@arm.com>belagod2013-07-121-3/+0
* 2013-07-04 Tejas Belagod <tejas.belagod@arm.com>belagod2013-07-041-0/+23
* [AArch64] Update comment w.r.t SYMBOL_TINY_ABSOLUTE address model.mshawcroft2013-06-281-0/+7
* [AArch64] Remove aarch64_symbolic_constant_p.mshawcroft2013-06-281-2/+2
* * config/aarch64/aarch64-simd.md (aarch64_combine<mode>): convert to split.sofiane2013-06-121-0/+2
* AArch64 - Improve MOVI handling (5/5)ibolton2013-06-041-0/+1
* AArch64 - Improve MOVI handling (4/5)ibolton2013-06-041-2/+1
* AArch64 - Improve MOVI handling (3/5)ibolton2013-06-041-2/+2
* AArch64 - Improve MOVI handling (2/5)ibolton2013-06-041-0/+2
* [AArch64] Implement support for --mcmodel=tinymshawcroft2013-05-291-0/+1
* [AArch64] Refactor aarch64_mov_operand predicate.mshawcroft2013-05-231-0/+2
* gcc/sofiane2013-05-071-0/+2
* [AArch64] Make vabs<q>_f<32, 64> a tree/gimple intrinsic.jgreenhalgh2013-04-251-0/+1
* [AArch64] Implement TARGET_GIMPLE_FOLD_BUILTIN for aarch64 backend.jgreenhalgh2013-04-251-0/+1
* * config/aarch64/aarch64.md (*mov<mode>_aarch64): Add alternatives forsofiane2013-04-021-0/+1
* Update copyright years in gcc/rsandifo2013-01-101-1/+1
* 2013-01-08 Tejas Belagod <tejas.belagod@arm.com>belagod2013-01-081-0/+1
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