| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [AArch64] Force __builtin_aarch64_fp[sc]r argument into a REG | rsandifo | 2015-09-25 | 1 | -1/+1 |
| * | switch from gimple to gimple* | tbsaunde | 2015-09-20 | 1 | -2/+2 |
| * | [AArch64 array_mode 4/8] Remove EImode | alalaw01 | 2015-09-15 | 1 | -8/+0 |
| * | [AArch64] vld{2,3,4}{,_lane,_dup}, vcombine, vcreate | alalaw01 | 2015-09-08 | 1 | -0/+9 |
| * | [AArch64] Add support for float16x{4,8}_t vectors/builtins | alalaw01 | 2015-09-08 | 1 | -0/+6 |
| * | [AArch64] Fix FAIL: gcc.target/aarch64/target_attr_crypto_ice_1.c (internal c... | ktkachov | 2015-09-01 | 1 | -25/+0 |
| * | [AArch64][11/14] Re-layout SIMD builtin types on builtin expansion | ktkachov | 2015-08-04 | 1 | -3/+36 |
| * | [AArch64] Add basic FP16 support | alalaw01 | 2015-07-29 | 1 | -0/+9 |
| * | gcc/ChangeLog: | cbaylis | 2015-07-22 | 1 | -5/+25 |
| * | 2015-07-10 Andrew MacLeod <amacleod@redhat.com> | amacleod | 2015-07-10 | 1 | -1/+1 |
| * | 2015-07-07 Andrew MacLeod <amacleod@redhat.com> | amacleod | 2015-07-08 | 1 | -11/+6 |
| * | 2015-06-17 Andrew MacLeod <amacleod@redhat.com> | amacleod | 2015-06-17 | 1 | -2/+0 |
| * | 2015-06-08 Andrew MacLeod <amacleod@redhat.com> | amacleod | 2015-06-08 | 1 | -7/+0 |
| * | 2015-06-04 Andrew MacLeod <amacleod@redhat.com> | amacleod | 2015-06-04 | 1 | -5/+0 |
| * | 2015-04-01 Max Ostapenko <m.ostapenko@partner.samsung.com> | chefmax | 2015-04-01 | 1 | -1/+1 |
| * | Fix bug 64893: ICE with vget_lane_u32 with C++ front-end | pinskia | 2015-02-11 | 1 | -7/+18 |
| * | 2015-10-15 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> | prathamesh3492 | 2015-01-15 | 1 | -4/+14 |
| * | 2015-01-09 Michael Collison <michael.collison@linaro.org> | prathamesh3492 | 2015-01-09 | 1 | -3/+10 |
| * | Update copyright years. | jakub | 2015-01-05 | 1 | -1/+1 |
| * | [AArch64]Improve error message for non-constant immediates | alalaw01 | 2014-12-09 | 1 | -2/+2 |
| * | [AArch64] Fix ICE on non-constant indices to __builtin_aarch64_im_lane_boundsi | alalaw01 | 2014-12-09 | 1 | -8/+28 |
| * | gcc/testsuite/: | alalaw01 | 2014-12-09 | 1 | -4/+2 |
| * | * config/sparc/sparc.c (sparc_atomic_assign_expand_fenv): | jakub | 2014-12-02 | 1 | -3/+3 |
| * | * config/alpha/alpha.c (alpha_gimple_fold_builtin): Use | jakub | 2014-12-02 | 1 | -15/+6 |
| * | [AArch64]Tidy up aarch64_simd_expand_args | alalaw01 | 2014-11-24 | 1 | -74/+52 |
| * | [AArch64] Add vector pattern for __builtin_ctz | jiwang | 2014-11-21 | 1 | -0/+8 |
| * | PR target/63870 | cbaylis | 2014-11-20 | 1 | -1/+1 |
| * | gcc/: | alalaw01 | 2014-11-17 | 1 | -1/+0 |
| * | Add bounds checking to vqdm*_lane intrinsics via a qualifier that also flips ... | alalaw01 | 2014-11-12 | 1 | -12/+34 |
| * | 2014-11-11 Andrew Pinski <apinski@cavium.com> | pinskia | 2014-11-11 | 1 | -0/+1 |
| * | [AArch64] Restructure arm_neon.h vector types. | belagod | 2014-11-05 | 1 | -215/+296 |
| * | 2014-11-01 Andrew MacLeod <amacleod@redhat,com> | amacleod | 2014-11-01 | 1 | -0/+1 |
| * | gcc/ada/ | rsandifo | 2014-10-29 | 1 | -16/+16 |
| * | [AArch64] Restore gimple_folding of reduction intrinsics | alalaw01 | 2014-10-27 | 1 | -21/+9 |
| * | 2014-10-27 Andrew MacLeod <amacleod@redhat.com> | amacleod | 2014-10-27 | 1 | -0/+14 |
| * | [AArch64] Temporarily remove aarch64_gimple_fold_builtin code for reduction o... | alalaw01 | 2014-10-27 | 1 | -0/+4 |
| * | [PATCH 1/2] [AARCH64,NEON] Add patterns + builtins for vld[234](q?)_lane_* in... | cbaylis | 2014-10-24 | 1 | -0/+5 |
| * | [AArch64] Auto-generate the "BUILTIN_" macros for aarch64-builtins.c | jgreenhalgh | 2014-09-22 | 1 | -119/+1 |
| * | [AArch64] Simplify vreinterpret for float64x1_t using casts. | alalaw01 | 2014-09-11 | 1 | -38/+0 |
| * | [AArch64] PR 61749: Do not ICE in lane intrinsics when passed non-constant la... | ktkachov | 2014-09-09 | 1 | -7/+11 |
| * | [Obvious] Remove unused aarch64_types_cmtst_qualifiers, was breaking bootstrap. | alalaw01 | 2014-09-08 | 1 | -5/+0 |
| * | [PATCH AArch64 2/2] Remove vector compare/tst __builtins | alalaw01 | 2014-09-05 | 1 | -16/+0 |
| * | [PATCH AArch64 1/2] Improve codegen of vector compares inc. tst instruction | alalaw01 | 2014-09-05 | 1 | -1/+6 |
| * | [PATCH][AArch64] Tidy: remove unused qualifier_const_pointer | alalaw01 | 2014-09-05 | 1 | -3/+1 |
| * | [PATCH AArch64] Remove varargs from aarch64_simd_expand_args | alalaw01 | 2014-09-05 | 1 | -13/+3 |
| * | remove pointer-set.[ch] | tbsaunde | 2014-08-07 | 1 | -1/+0 |
| * | [AArch64] Some aarch64-builtins.c cleanup. | jgreenhalgh | 2014-08-05 | 1 | -70/+29 |
| * | [AArch64_be] Don't fold reduction intrinsics. | jgreenhalgh | 2014-07-31 | 1 | -0/+14 |
| * | PR/60825 Make {int,uint}64x1_t in arm_neon.h a proper vector type | alalaw01 | 2014-06-23 | 1 | -1/+3 |
| * | PR/60825 Make float64x1_t in arm_neon.h a proper vector type | alalaw01 | 2014-06-23 | 1 | -23/+24 |
