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path: root/gcc/config/aarch64/aarch64-builtins.c
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* [AArch64] Handle HFAs of float16 types properlyjgreenhalgh2016-08-121-8/+21
* [PATCH] Do not set structural equality on polynomial typesjgreenhalgh2016-01-261-4/+6
* [AArch64] Remove TODO (redundant type conversions) in arm_neon.hjiwang2016-01-151-0/+4
* Update copyright years.jakub2016-01-041-1/+1
* Add an rsqrt_optab and IFN_RSQRT internal functionrsandifo2015-12-031-22/+12
* [AARCH64] Adding constant folding for __builtin_fmulx* with scalar 32 and 64 ...jgreenhalgh2015-11-231-2/+49
* Make builtin_vectorized_function take a combined_fnrsandifo2015-11-171-108/+99
* 2015-11-06 Benedikt Huber <benedikt.huber@theobroma-systems.com>ptomsich2015-11-061-0/+115
* 2015-10-16 Andrew MacLeod <amacleod@redhat.com>amacleod2015-10-161-26/+6
* Fix PR c/65345 for AArch64 ramana2015-10-061-5/+5
* [AArch64] Force __builtin_aarch64_fp[sc]r argument into a REGrsandifo2015-09-251-1/+1
* switch from gimple to gimple*tbsaunde2015-09-201-2/+2
* [AArch64 array_mode 4/8] Remove EImodealalaw012015-09-151-8/+0
* [AArch64] vld{2,3,4}{,_lane,_dup}, vcombine, vcreatealalaw012015-09-081-0/+9
* [AArch64] Add support for float16x{4,8}_t vectors/builtinsalalaw012015-09-081-0/+6
* [AArch64] Fix FAIL: gcc.target/aarch64/target_attr_crypto_ice_1.c (internal c...ktkachov2015-09-011-25/+0
* [AArch64][11/14] Re-layout SIMD builtin types on builtin expansionktkachov2015-08-041-3/+36
* [AArch64] Add basic FP16 supportalalaw012015-07-291-0/+9
* gcc/ChangeLog:cbaylis2015-07-221-5/+25
* 2015-07-10 Andrew MacLeod <amacleod@redhat.com>amacleod2015-07-101-1/+1
* 2015-07-07 Andrew MacLeod <amacleod@redhat.com>amacleod2015-07-081-11/+6
* 2015-06-17 Andrew MacLeod <amacleod@redhat.com>amacleod2015-06-171-2/+0
* 2015-06-08 Andrew MacLeod <amacleod@redhat.com>amacleod2015-06-081-7/+0
* 2015-06-04 Andrew MacLeod <amacleod@redhat.com>amacleod2015-06-041-5/+0
* 2015-04-01 Max Ostapenko <m.ostapenko@partner.samsung.com>chefmax2015-04-011-1/+1
* Fix bug 64893: ICE with vget_lane_u32 with C++ front-endpinskia2015-02-111-7/+18
* 2015-10-15 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>prathamesh34922015-01-151-4/+14
* 2015-01-09 Michael Collison <michael.collison@linaro.org>prathamesh34922015-01-091-3/+10
* Update copyright years.jakub2015-01-051-1/+1
* [AArch64]Improve error message for non-constant immediatesalalaw012014-12-091-2/+2
* [AArch64] Fix ICE on non-constant indices to __builtin_aarch64_im_lane_boundsialalaw012014-12-091-8/+28
* gcc/testsuite/:alalaw012014-12-091-4/+2
* * config/sparc/sparc.c (sparc_atomic_assign_expand_fenv):jakub2014-12-021-3/+3
* * config/alpha/alpha.c (alpha_gimple_fold_builtin): Usejakub2014-12-021-15/+6
* [AArch64]Tidy up aarch64_simd_expand_argsalalaw012014-11-241-74/+52
* [AArch64] Add vector pattern for __builtin_ctzjiwang2014-11-211-0/+8
* PR target/63870cbaylis2014-11-201-1/+1
* gcc/:alalaw012014-11-171-1/+0
* Add bounds checking to vqdm*_lane intrinsics via a qualifier that also flips ...alalaw012014-11-121-12/+34
* 2014-11-11 Andrew Pinski <apinski@cavium.com>pinskia2014-11-111-0/+1
* [AArch64] Restructure arm_neon.h vector types.belagod2014-11-051-215/+296
* 2014-11-01 Andrew MacLeod <amacleod@redhat,com>amacleod2014-11-011-0/+1
* gcc/ada/rsandifo2014-10-291-16/+16
* [AArch64] Restore gimple_folding of reduction intrinsicsalalaw012014-10-271-21/+9
* 2014-10-27 Andrew MacLeod <amacleod@redhat.com>amacleod2014-10-271-0/+14
* [AArch64] Temporarily remove aarch64_gimple_fold_builtin code for reduction o...alalaw012014-10-271-0/+4
* [PATCH 1/2] [AARCH64,NEON] Add patterns + builtins for vld[234](q?)_lane_* in...cbaylis2014-10-241-0/+5
* [AArch64] Auto-generate the "BUILTIN_" macros for aarch64-builtins.cjgreenhalgh2014-09-221-119/+1
* [AArch64] Simplify vreinterpret for float64x1_t using casts.alalaw012014-09-111-38/+0
* [AArch64] PR 61749: Do not ICE in lane intrinsics when passed non-constant la...ktkachov2014-09-091-7/+11
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