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gcc/
* config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238082 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
(FL_FOR_ARCH8M_MAIN): Likewise.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
armv8-m.main+dsp to BE8_LINK_SPEC.
* config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
(enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
* config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
Baseline and Mainline.
(arm_option_override_internal): Also disable arm_restrict_it when
!arm_arch_notm. Update comment for -munaligned-access to also cover
ARMv8-M Baseline.
(arm_file_start): Increase buffer size for printing architecture name.
* doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
and armv8-m.main+dsp.
(mno-unaligned-access): Clarify that this is disabled by default for
ARMv8-M Baseline architectures as well.
gcc/testsuite/
* lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
ARMv8-M Mainline architectures.
libgcc/
* config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238081 138bc75d-0d04-0410-961f-82ee72b054a4
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libgcc/
* config/arm/lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later
and ARMv5t* rather than for a fixed list of architectures.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238080 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
decide whether to prevent some libgcc routines being included for some
multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
link between this condition and the one in
libgcc/config/arm/lib1func.S.
gcc/testsuite/
* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
libgcc/
* config/arm/bpabi-v6m.S: Clarify what architectures is the
implementation suitable for.
* config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
for all Thumb-1 only targets.
(NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
(THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__.
(EQUIV): Likewise.
(ARM_FUNC_ALIAS): Likewise.
(umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
version.
(modsi3): Likewise.
(clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
(clzdi2): Likewise.
(ctzsi2): Likewise.
(L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
__ARM_ARCH_6M__ in guard for checking whether it is defined.
(final includes): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__ and add comment to indicate the connection between
this condition and the one in gcc/config/arm/elf.h.
* config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
__ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
* config/arm/t-softfp: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238079 138bc75d-0d04-0410-961f-82ee72b054a4
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* tree-ssa-pre.c: Include alias.h.
(compute_avail): If we have multiple VN_REFERENCEs with the
same hashtable entry adjust that to make it a valid replacement
for all of them with respect to alignment and aliasing
when doing insertion.
* tree-ssa-sccvn.h (vn_reference_operands_for_lookup): Declare.
* tree-ssa-sccvn.c (vn_reference_operands_for_lookup): New function.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238078 138bc75d-0d04-0410-961f-82ee72b054a4
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Similar to PR70098, which is about integers in floating point registers,
we can have the completely analogous problem with vector registers as well
now that we allow integers in vector registers. So, this patch solves it
in the same way. This only works for targets with direct move.
To recap: register allocation can decide to put an integer mode value in
a floating point or vector register. If that register is used in a bd*z
instruction, which is a jump instruction, reload can not do an output
reload on it (it does not do output reloads on any jump insns), so the
float or vector register will remain, and we have to allow it here or
recog will ICE. Later on we will split this to valid instructions,
including a move from that fp/vec register to an int register; it is this
move that will still fail (PR70098) if we do not have direct move enabled.
PR target/70098
PR target/71763
* config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
*ctr<mode>_internal5, *ctr<mode>_internal6): Add *wi to the output
constraint.
gcc/testsuite/
PR target/70098
PR target/71763
* gcc.target/powerpc/pr71763.c: New file.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238076 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238073 138bc75d-0d04-0410-961f-82ee72b054a4
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The last target to use this was i386-interix, so since that is gone we
don't need this anymore.
libgcc/ChangeLog:
2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* libgcc2.c (SYMBOL__MAIN): Remove checks for
CTOR_LISTS_DEFINED_EXTERNALLY.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238067 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/ChangeLog:
2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* var-tracking.c (struct adjust_mem_data): Make side_effects a vector.
(adjust_mems): Adjust.
(adjust_insn): Likewise.
(prepare_call_arguments): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238066 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/ChangeLog:
2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* gcse.c (struct ls_expr): Make stores field a vector.
(ldst_entry): Adjust.
(free_ldst_entry): Likewise.
(print_ldst_list): Likewise.
(compute_ld_motion_mems): Likewise.
(update_ld_motion_stores): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238065 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/ChangeLog:
2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* gcse.c (struct ls_expr): Remove loads field.
(ldst_entry): Adjust.
(free_ldst_entry): Likewise.
(print_ldst_list): Likewise.
(compute_ld_motion_mems): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238064 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/ChangeLog:
2016-07-06 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* store-motion.c (struct st_expr): Make antic_stores a vector.
(st_expr_entry): Adjust.
(free_st_expr_entry): Likewise.
(print_store_motion_mems): Likewise.
(find_moveable_store): Likewise.
(compute_store_table): Likewise.
(remove_reachable_equiv_notes): Likewise.
(replace_store_insn): Likewise.
(build_store_vectors): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238063 138bc75d-0d04-0410-961f-82ee72b054a4
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* include/Makefile.am: Add any and c++17_warning.h to exported headers.
* include/Makefile.in: Likewise.
* include/std/any: New.
* testsuite/20_util/any/assign/1.cc: Likewise.
* testsuite/20_util/any/assign/2.cc: Likewise.
* testsuite/20_util/any/assign/self.cc: Likewise.
* testsuite/20_util/any/cons/1.cc: Likewise.
* testsuite/20_util/any/cons/2.cc: Likewise.
* testsuite/20_util/any/cons/aligned.cc: Likewise.
* testsuite/20_util/any/cons/nontrivial.cc: Likewise.
* testsuite/20_util/any/misc/any_cast.cc: Likewise.
* testsuite/20_util/any/misc/any_cast_neg.cc: Likewise.
* testsuite/20_util/any/misc/any_cast_no_rtti.cc: Likewise.
* testsuite/20_util/any/misc/swap.cc: Likewise.
* testsuite/20_util/any/modifiers/1.cc: Likewise.
* testsuite/20_util/any/observers/type.cc: Likewise.
* testsuite/20_util/any/typedefs.cc: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238061 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238058 138bc75d-0d04-0410-961f-82ee72b054a4
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Adds notes to function parameters which summarize the escape of that
parameter with respect to the function's scope.
Reviewed-on: https://go-review.googlesource.com/18443
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238057 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/arm/driver-arm.c (arm_cpu_table): Add entries for cortex-a32,
cortex-a35, cortex-a53, cortex-a57, cortex-a72, cortex-a73.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238056 138bc75d-0d04-0410-961f-82ee72b054a4
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2016-07-06 Yuri Rumyantsev <ysrumyan@gmail.com>
PR tree-optimization/71518
* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Adjust
misalign also for outer loops with negative step.
gcc/testsuite/
2016-07-06 Yuri Rumyantsev <ysrumyan@gmail.com>
PR tree-optimization/71518
* gcc.dg/pr71518.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238055 138bc75d-0d04-0410-961f-82ee72b054a4
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* sem_ch6.adb (Check_Inline_Pragma): if the subprogram has no spec
then move its aspects to the internally built subprogram spec.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238052 138bc75d-0d04-0410-961f-82ee72b054a4
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* sem_ch6.adb (Analyze_Expression_Function): Mark body of
expression function as ghost if needed when created.
* sem_prag.adb (Analyze_Pragma.Process_Inline.Set_Inline_Flags):
Remove special case.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238051 138bc75d-0d04-0410-961f-82ee72b054a4
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* lib.adb (Check_Same_Extended_Unit): Complete previous change.
* sem_intr.adb (Errint): New parameter Relaxed. Refine previous
change to only disable errors selectively.
* sem_util.adb: minor style fix in object declaration
2016-07-06 Yannick Moy <moy@adacore.com>
* sem_warn.adb (Check_Infinite_Loop_Warning.Find_Var): Special case a
call to a volatile function, so that it does not lead to a warning in
that case.
2016-07-06 Hristian Kirtchev <kirtchev@adacore.com>
* sem_ch12.adb, sem_ch4.adb, sem_ch6.adb: Minor reformatting.
2016-07-06 Hristian Kirtchev <kirtchev@adacore.com>
* gnat1drv.adb: Code clean up. Do not emit any
code generation errors when the unit is ignored Ghost.
2016-07-06 Ed Schonberg <schonberg@adacore.com>
* sem_eval.adb (Check_Non_Static_Context): If the expression
is a real literal of a floating point type that is part of a
larger expression and is not a static expression, transform it
into a machine number now so that the rest of the computation,
even if other components are static, is not evaluated with
extra precision.
2016-07-06 Javier Miranda <miranda@adacore.com>
* sem_ch13.adb (Freeze_Entity_Checks): Undo previous patch and move the
needed functionality to Analyze_Freeze_Generic_Entity.
(Analyze_Freeze_Generic_Entity): If the entity is not already frozen
and has delayed aspects then analyze them.
2016-07-06 Yannick Moy <moy@adacore.com>
* sem_prag.adb (Analyze_Pragma.Process_Inline.Set_Inline_Flags):
Special case for unanalyzed body entity of ghost expression function.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238050 138bc75d-0d04-0410-961f-82ee72b054a4
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implicit conversions.
* include/experimental/optional (__is_optional_impl, __is_optional):
New.
(optional()): Make constexpr and default.
(optional(_Up&&), optional(const optional<_Up>&),
optional(optional<_Up>&& __t): New.
(operator=(_Up&&)): Constrain.
(operator=(const optional<_Up>&), operator=(optional<_Up>&&)): New.
* testsuite/experimental/optional/cons/value.cc:
Add tests for the functionality added by LWG 2451.
* testsuite/experimental/optional/cons/value_neg.cc: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238049 138bc75d-0d04-0410-961f-82ee72b054a4
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resulting in performance gains across a wide range of benchmarks.
gcc/
* config/arm/cortex-a53.md: Use final_presence_set for in-order.
(cortex_a53_shift): Add mov_shift.
(cortex_a53_shift_reg): Add new reservation for register shifts.
(cortex_a53_alu): Remove bfm.
(cortex_a53_alu_shift): Add bfm, remove mov_shift.
(cortex_a53_alu_extr): Add new reservation for EXTR.
(bypasses): Improve bypass modelling.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238048 138bc75d-0d04-0410-961f-82ee72b054a4
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* sem_ch7.adb (Analyze_Package_Specification): Insert its
freezing nodes after the last declaration. Needed to ensure
that global entities referenced in aspects of frozen types are
properly handled.
* freeze.adb (Freeze_Entity): Minor code reorganization to ensure
that freezing nodes of generic packages are handled.
* sem_ch13.adb (Freeze_Entity_Checks): Handle N_Freeze_Generic nodes.
* sem_ch12.adb (Save_References_In_Identifier): Handle selected
components which denote a named number that is constant folded
in the analyzed copy of the tree.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238047 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/testsuite/
* gcc.target/arm/vst1Q_laneu64-1.c (foo): Use unsigned char*.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238046 138bc75d-0d04-0410-961f-82ee72b054a4
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* exp_aggr.adb Remove with and use clauses for Exp_Ch11 and Inline.
(Initialize_Array_Component): Protect the initialization
statements in an abort defer / undefer block when the associated
component is controlled.
(Initialize_Record_Component): Protect the initialization statements
in an abort defer / undefer block when the associated component is
controlled.
(Process_Transient_Component_Completion): Use Build_Abort_Undefer_Block
to create an abort defer / undefer block.
* exp_ch3.adb Remove with and use clauses for Exp_ch11 and Inline.
(Default_Initialize_Object): Use Build_Abort_Undefer_Block to
create an abort defer / undefer block.
* exp_ch5.adb (Expand_N_Assignment_Statement): Mark an abort
defer / undefer block as such.
* exp_ch9.adb (Find_Enclosing_Context): Do not consider an abort
defer / undefer block as a suitable context for an activation
chain or a master.
* exp_util.adb Add with and use clauses for Exp_Ch11.
(Build_Abort_Undefer_Block): New routine.
* exp_util.ads (Build_Abort_Undefer_Block): New routine.
* sinfo.adb (Is_Abort_Block): New routine.
(Set_Is_Abort_Block): New routine.
* sinfo.ads New attribute Is_Abort_Block along with occurrences
in nodes.
(Is_Abort_Block): New routine along with pragma Inline.
(Set_Is_Abort_Block): New routine along with pragma Inline.
2016-07-06 Justin Squirek <squirek@adacore.com>
* sem_ch4.adb (Analyze_One_Call): Add a conditional to handle
disambiguation.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238045 138bc75d-0d04-0410-961f-82ee72b054a4
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* einfo.adb Flag252 is now used as Is_Finalized_Transient. Flag295
is now used as Is_Ignored_Transient.
(Is_Finalized_Transient): New routine.
(Is_Ignored_Transient): New routine.
(Is_Processed_Transient): Removed.
(Set_Is_Finalized_Transient): New routine.
(Set_Is_Ignored_Transient): New routine.
(Set_Is_Processed_Transient): Removed.
(Write_Entity_Flags): Output Flag252 and Flag295.
* einfo.ads: New attributes Is_Finalized_Transient
and Is_Ignored_Transient along with occurrences in
entities. Remove attribute Is_Processed_Transient.
(Is_Finalized_Transient): New routine along with pragma Inline.
(Is_Ignored_Transient): New routine along with pragma Inline.
(Is_Processed_Transient): Removed along with pragma Inline.
(Set_Is_Finalized_Transient): New routine along with pragma Inline.
(Set_Is_Ignored_Transient): New routine along with pragma Inline.
(Set_Is_Processed_Transient): Removed along with pragma Inline.
* exp_aggr.adb Add with and use clauses for Exp_Ch11 and Inline.
(Build_Record_Aggr_Code): Change the handling
of controlled record components.
(Ctrl_Init_Expression): Removed.
(Gen_Assign): Add new formal parameter In_Loop
along with comment on usage. Remove local variables Stmt and
Stmt_Expr. Change the handling of controlled array components.
(Gen_Loop): Update the call to Gen_Assign.
(Gen_While): Update the call to Gen_Assign.
(Initialize_Array_Component): New routine.
(Initialize_Ctrl_Array_Component): New routine.
(Initialize_Ctrl_Record_Component): New routine.
(Initialize_Record_Component): New routine.
(Process_Transient_Component): New routine.
(Process_Transient_Component_Completion): New routine.
* exp_ch4.adb (Process_Transient_In_Expression): New routine.
(Process_Transient_Object): Removed. Replace all existing calls
to this routine with calls to Process_Transient_In_Expression.
* exp_ch6.adb (Expand_Ctrl_Function_Call): Remove local constant
Is_Elem_Ref. Update the comment on ignoring transients.
* exp_ch7.adb (Process_Declarations): Do not process ignored
or finalized transient objects.
(Process_Transient_In_Scope): New routine.
(Process_Transients_In_Scope): New routine.
(Process_Transient_Objects): Removed. Replace all existing calls
to this routine with calls to Process_Transients_In_Scope.
* exp_util.adb (Build_Transient_Object_Statements): New routine.
(Is_Finalizable_Transient): Do not consider a transient object
which has been finalized.
(Requires_Cleanup_Actions): Do not consider ignored or finalized
transient objects.
* exp_util.ads (Build_Transient_Object_Statements): New routine.
* sem_aggr.adb: Major code clean up.
* sem_res.adb: Update documentation.
2016-07-06 Ed Schonberg <schonberg@adacore.com>
* sem_ch3.adb (Analyze_Subtype_Declaration): For generated
subtypes, such as actual subtypes of unconstrained formals,
inherit predicate functions, if any, from the parent type rather
than creating redundant new ones.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238044 138bc75d-0d04-0410-961f-82ee72b054a4
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* exp_attr.adb, sem_attr.adb, sem_ch13.adb: Minor reformatting.
2016-07-06 Arnaud Charlet <charlet@adacore.com>
* lib.adb (Check_Same_Extended_Unit): Prevent looping forever.
* gnatbind.adb: Disable some consistency checks in codepeer mode,
which are not needed.
2016-07-06 Ed Schonberg <schonberg@adacore.com>
* sem_ch12.adb (Check_Fixed_Point_Actual): Add a warning when
a formal fixed point type is instantiated with a type that has
a user-defined arithmetic operations, but the generic has no
corresponding formal functions. This is worth a warning because
of the special semantics of fixed-point operators.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238043 138bc75d-0d04-0410-961f-82ee72b054a4
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* sem_attr.adb (Analyze_Attribute): Allow any expression of
discrete type.
* exp_attr.adb (Expand_N_Attribute_Reference): Change the
constant-folding code to correctly handle cases newly allowed
by Analyze_Attribute.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238042 138bc75d-0d04-0410-961f-82ee72b054a4
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This patch fixes a problem with fmerge-all-constants and the progmem
attribute.
gcc/
PR target/50739
* config/avr/avr.c (avr_asm_select_section): Strip off
SECTION_DECLARED from flags when calling get_section.
testsuite/
PR target/50739
* gcc.target/avr/pr50739.c: New test
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238041 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238040 138bc75d-0d04-0410-961f-82ee72b054a4
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This patch uses the vect_memory_access_type from patch 6 to represent
the effect of a negative contiguous stride or a zero stride. The latter
is valid only for loads.
Tested on aarch64-linux-gnu and x86_64-linux-gnu.
gcc/
* tree-vectorizer.h (vect_memory_access_type): Add
VMAT_INVARIANT, VMAT_CONTIGUOUS_DOWN and VMAT_CONTIGUOUS_REVERSED.
* tree-vect-stmts.c (compare_step_with_zero): New function.
(perm_mask_for_reverse): Move further up file.
(get_group_load_store_type): Stick to VMAT_ELEMENTWISE if the
step is negative.
(get_negative_load_store_type): New function.
(get_load_store_type): Call it. Add an ncopies argument.
(vectorizable_mask_load_store): Update call accordingly and
remove tests for negative steps.
(vectorizable_store, vectorizable_load): Likewise. Handle new
memory_access_types.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238039 138bc75d-0d04-0410-961f-82ee72b054a4
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This is the main patch in the series. It adds a new enum and routines
for classifying a vector load or store implementation.
Originally there were three motivations:
(1) Reduce cut-&-paste
(2) Make the chosen vectorisation strategy more obvious. At the
moment this is derived implicitly from various other bits of
state (GROUPED, STRIDED, SLP, etc.)
(3) Decouple the vectorisation strategy from those other bits of state,
so that there can be a choice of implementation for a given scalar
statement. The specific problem here is that we class:
for (...)
{
... = a[i * x];
... = a[i * x + 1];
}
as "strided and grouped" but:
for (...)
{
... = a[i * 7];
... = a[i * 7 + 1];
}
as "non-strided and grouped". Before the patch, "strided and
grouped" loads would always try to use separate scalar loads
while "non-strided and grouped" loads would always try to use
load-and-permute. But load-and-permute is never supported for
a group size of 7, so the effect was that the first loop was
vectorisable and the second wasn't. It seemed odd that not
knowing x (but accepting it could be 7) would allow more
optimisation opportunities than knowing x is 7.
Unfortunately, it looks like we underestimate the cost of separate
scalar accesses on at least aarch64, so I've disabled (3) for now;
see the "if" statement at the end of get_load_store_type. I think
the patch still does (1) and (2), so that's the justification for
it in its current form. It also means that (3) is now simply a
case of removing the FIXME code, once the cost model problems have
been sorted out. (I did wonder about adding a --param, but that
seems overkill. I hope to get back to this during GCC 7 stage 1.)
Tested on aarch64-linux-gnu and x86_64-linux-gnu.
gcc/
* tree-vectorizer.h (vect_memory_access_type): New enum.
(_stmt_vec_info): Add a memory_access_type field.
(STMT_VINFO_MEMORY_ACCESS_TYPE): New macro.
(vect_model_store_cost): Take an access type instead of a boolean.
(vect_model_load_cost): Likewise.
* tree-vect-slp.c (vect_analyze_slp_cost_1): Update calls to
vect_model_store_cost and vect_model_load_cost.
* tree-vect-stmts.c (vec_load_store_type): New enum.
(vect_model_store_cost): Take an access type instead of a
store_lanes_p boolean. Simplify tests.
(vect_model_load_cost): Likewise, but for load_lanes_p.
(get_group_load_store_type, get_load_store_type): New functions.
(vectorizable_store): Use get_load_store_type. Record the access
type in STMT_VINFO_MEMORY_ACCESS_TYPE.
(vectorizable_load): Likewise.
(vectorizable_mask_load_store): Likewise. Replace is_store
variable with vls_type.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238038 138bc75d-0d04-0410-961f-82ee72b054a4
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This patch moves the fix for PR65518 to the code that checks whether
load-and-permute operations are supported. If the group size is
greater than the vectorisation factor, it would still be possible
to fall back to elementwise loads (as for strided groups) rather
than fail vectorisation entirely.
Tested on aarch64-linux-gnu and x86_64-linux-gnu.
gcc/
* tree-vectorizer.h (vect_grouped_load_supported): Add a
single_element_p parameter.
* tree-vect-data-refs.c (vect_grouped_load_supported): Likewise.
Check the PR65518 case here rather than in vectorizable_load.
* tree-vect-loop.c (vect_analyze_loop_2): Update call accordignly.
* tree-vect-stmts.c (vectorizable_load): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238037 138bc75d-0d04-0410-961f-82ee72b054a4
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This patch just refactors the gather/scatter support so that all
information is in a single structure, rather than separate variables.
This reduces the number of arguments to a function added in patch 6.
Tested on aarch64-linux-gnu and x86_64-linux-gnu.
gcc/
* tree-vectorizer.h (gather_scatter_info): New structure.
(vect_check_gather_scatter): Return a bool rather than a decl.
Replace return-by-pointer arguments with a single
gather_scatter_info *.
* tree-vect-data-refs.c (vect_check_gather_scatter): Likewise.
(vect_analyze_data_refs): Update call accordingly.
* tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized): Likewise.
(vectorizable_mask_load_store): Likewise. Also record the
offset dt and vectype in the gather_scatter_info.
(vectorizable_store): Likewise.
(vectorizable_load): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238036 138bc75d-0d04-0410-961f-82ee72b054a4
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vect_model_store_cost had:
/* Costs of the stores. */
if (STMT_VINFO_STRIDED_P (stmt_info)
&& !STMT_VINFO_GROUPED_ACCESS (stmt_info))
{
/* N scalar stores plus extracting the elements. */
inside_cost += record_stmt_cost (body_cost_vec,
ncopies * TYPE_VECTOR_SUBPARTS (vectype),
scalar_store, stmt_info, 0, vect_body);
But non-SLP strided groups also use individual scalar stores rather than
vector stores, so I think we should skip this only for SLP groups.
The same applies to vect_model_load_cost.
Tested on aarch64-linux-gnu and x86_64-linux-gnu.
gcc/
* tree-vect-stmts.c (vect_model_store_cost): For non-SLP
strided groups, use the cost of N scalar accesses instead
of ncopies vector accesses.
(vect_model_load_cost): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238035 138bc75d-0d04-0410-961f-82ee72b054a4
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Add a bit more commentary and try to make the structure more obvious.
The horrendous:
if (grouped_access_p
&& represents_group_p
&& !store_lanes_p
&& !STMT_VINFO_STRIDED_P (stmt_info)
&& !slp_node)
checks go away in patch 6.
Tested on aarch64-linux-gnu and x86_64-linux-gnu.
gcc/
* tree-vect-stmts.c (vect_cost_group_size): Delete.
(vect_model_store_cost): Avoid calling it. Use first_stmt_p
variable to indicate when once-per-group costs are being used.
(vect_model_load_cost): Likewise. Fix comment and misindented code.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238034 138bc75d-0d04-0410-961f-82ee72b054a4
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I recently relaxed the peeling-for-gaps conditions for LD3 but
kept them as-is for load-and-permute. I don't think the conditions
are needed for load-and-permute either though. No current load-and-
permute should load outside the group, so if there is no gap at the end,
the final vector element loaded will correspond to an element loaded
by the original scalar loop.
The patch for PR68559 (a missed optimisation PR) increased the peeled
cases from "exact_log2 (groupsize) == -1" to "vf % group_size == 0", so
before that fix, we didn't peel for gaps if there was no gap at the end
of the group and if the group size was a power of 2.
The only current non-power-of-2 load-and-permute size is 3, which
doesn't require loading more than 3 vectors.
The testcase is based on gcc.dg/vect/pr49038.c.
Tested on aarch64-linux-gnu and x86_64-linux-gnu.
gcc/
* tree-vect-stmts.c (vectorizable_load): Remove unnecessary
peeling-for-gaps condition.
gcc/testsuite/
* gcc.dg/vect/group-no-gaps-1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238033 138bc75d-0d04-0410-961f-82ee72b054a4
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The fallback routine in the S/390 vecinit expander did not check
whether each of the initializer elements is a proper general_operand.
Since revision r236582 the expander is invoked also with e.g. symbol
refs with an odd addend resulting in invalid insns.
Fixed by forcing the element into a register in such cases.
gcc/ChangeLog:
2016-07-06 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/s390.c (s390_expand_vec_init): Force initializer
element to register if it doesn't match general_operand.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238032 138bc75d-0d04-0410-961f-82ee72b054a4
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I have a Skylake system with MPX in the CPU, but MPX is disabled
in the kernel configuration.
This makes all the MPX tests fail because they assume if MPX
is in CPUID it works
Check the output of XGETBV too to detect non MPX kernels.
gcc/testsuite/:
2016-07-05 Andi Kleen <ak@linux.intel.com>
* gcc.target/i386/mpx/mpx-check.h: Check XGETBV output
if kernel supports MPX.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238031 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238029 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc.c-torture/compile/pr69102.c: Require fpic support.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238023 138bc75d-0d04-0410-961f-82ee72b054a4
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any_cast doesn't work with rvalue reference targets and cannot
move with a value target.
* include/experimental/any (any(_ValueType&&)): Constrain and
add an overload that doesn't forward.
(any_cast(any&&)): Constrain and add an overload that moves.
* testsuite/experimental/any/misc/any_cast.cc: Add tests for
the functionality added by LWG 2509.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238022 138bc75d-0d04-0410-961f-82ee72b054a4
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PR c++/71214
* c-cppbuiltin.c (c_cpp_builtins): Define __cpp_rvalue_references.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238017 138bc75d-0d04-0410-961f-82ee72b054a4
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2016-07-05 Michael Meissner <meissner@linux.vnet.ibm.com>
Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000-protos.h (rs6000_split_signbit): New
prototype.
* config/rs6000/rs6000.c (rs6000_split_signbit): New function.
* config/rs6000/rs6000.md (UNSPEC_SIGNBIT): New constant.
(SIGNBIT): New mode iterator.
(Fsignbit): New mode attribute.
(signbit<mode>2): Change operand1 to match FLOAT128 instead of
IBM128; dispatch to gen_signbit{kf,tf}2_dm for __float128
when direct moves are available.
(signbit<mode>2_dm): New define_insn_and_split).
(signbit<mode>2_dm2): New define_insn.
[gcc/testsuite]
2016-07-05 Michael Meissner <meissner@linux.vnet.ibm.com>
Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/signbit-1.c: New test.
* gcc.target/powerpc/signbit-2.c: New test.
* gcc.target/powerpc/signbit-3.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238016 138bc75d-0d04-0410-961f-82ee72b054a4
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mismatched source modes
PR rtl-optimization/71594
* ifcvt.c (noce_convert_multiple_sets): Wrap new_val or old_val
into subregs of appropriate mode before trying to emit a conditional
move.
* gcc.dg/torture/pr71594.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238013 138bc75d-0d04-0410-961f-82ee72b054a4
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(simple_iv): Use it.
* gcc.dg/tree-ssa/scev-14.c: new testcase.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238012 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238011 138bc75d-0d04-0410-961f-82ee72b054a4
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* lra-constraints.c (process_alt_operands): Don't add spilling cost for
"offmemok".
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238010 138bc75d-0d04-0410-961f-82ee72b054a4
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IV can overflow.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238009 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/cp/ChangeLog:
PR c++/62314
* parser.c (cp_parser_class_specifier_1): When reporting
missing semicolons, use a fixit-hint to suggest insertion
of a semicolon immediately after the closing brace,
offsetting the reported column accordingly.
gcc/testsuite/ChangeLog:
PR c++/62314
* gcc/testsuite/g++.dg/parse/error5.C: Update column
number of missing semicolon error.
* g++.dg/pr62314-2.C: New test case.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@238008 138bc75d-0d04-0410-961f-82ee72b054a4
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