diff options
Diffstat (limited to 'libgcc/config')
85 files changed, 6853 insertions, 77 deletions
diff --git a/libgcc/config/alpha/t-vms b/libgcc/config/alpha/t-vms new file mode 100644 index 00000000000..21d6d71df15 --- /dev/null +++ b/libgcc/config/alpha/t-vms @@ -0,0 +1,7 @@ +# This object must be linked with in order to make the executable debuggable. +# vms-ld handles it automatically when passed -g. +vms-dwarf2.o: $(srcdir)/config/alpha/vms-dwarf2.S + $(gcc_compile) -c -x assembler-with-cpp $< + +vms-dwarf2eh.o: $(srcdir)/config/alpha/vms-dwarf2eh.S + $(gcc_compile) -c -x assembler-with-cpp $< diff --git a/libgcc/config/alpha/vms-dwarf2.S b/libgcc/config/alpha/vms-dwarf2.S new file mode 100644 index 00000000000..531c7aa9984 --- /dev/null +++ b/libgcc/config/alpha/vms-dwarf2.S @@ -0,0 +1,77 @@ +/* VMS dwarf2 section sequentializer. + Copyright (C) 2001, 2009 Free Software Foundation, Inc. + Contributed by Douglas B. Rupp (rupp@gnat.com). + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* Linking with this file forces Dwarf2 debug sections to be + sequentially loaded by the VMS linker, enabling GDB to read them. */ + +.section .debug_abbrev,NOWRT + .align 0 + .globl $dwarf2.debug_abbrev +$dwarf2.debug_abbrev: + +.section .debug_aranges,NOWRT + .align 0 + .globl $dwarf2.debug_aranges +$dwarf2.debug_aranges: + +.section .debug_frame,NOWRT + .align 0 + .globl $dwarf2.debug_frame +$dwarf2.debug_frame: + +.section .debug_info,NOWRT + .align 0 + .globl $dwarf2.debug_info +$dwarf2.debug_info: + +.section .debug_line,NOWRT + .align 0 + .globl $dwarf2.debug_line +$dwarf2.debug_line: + +.section .debug_loc,NOWRT + .align 0 + .globl $dwarf2.debug_loc +$dwarf2.debug_loc: + +.section .debug_macinfo,NOWRT + .align 0 + .globl $dwarf2.debug_macinfo +$dwarf2.debug_macinfo: + +.section .debug_pubnames,NOWRT + .align 0 + .globl $dwarf2.debug_pubnames +$dwarf2.debug_pubnames: + +.section .debug_str,NOWRT + .align 0 + .globl $dwarf2.debug_str +$dwarf2.debug_str: + +.section .debug_zzzzzz,NOWRT + .align 0 + .globl $dwarf2.debug_zzzzzz +$dwarf2.debug_zzzzzz: diff --git a/libgcc/config/alpha/vms-dwarf2eh.S b/libgcc/config/alpha/vms-dwarf2eh.S new file mode 100644 index 00000000000..e0eaf9d3741 --- /dev/null +++ b/libgcc/config/alpha/vms-dwarf2eh.S @@ -0,0 +1,30 @@ +/* VMS dwarf2 exception handling section sequentializer. + Copyright (C) 2002, 2009 Free Software Foundation, Inc. + Contributed by Douglas B. Rupp (rupp@gnat.com). + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* Linking with this file forces the Dwarf2 EH section to be + individually loaded by the VMS linker an the unwinder to read it. */ + +.section .eh_frame,NOWRT + .align 0 diff --git a/libgcc/config/arm/crti.S b/libgcc/config/arm/crti.S new file mode 100644 index 00000000000..50915f9e31f --- /dev/null +++ b/libgcc/config/arm/crti.S @@ -0,0 +1,86 @@ +# Copyright (C) 2001, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. +# Written By Nick Clifton +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +/* An executable stack is *not* required for these functions. */ +#if defined(__ELF__) && defined(__linux__) +.section .note.GNU-stack,"",%progbits +.previous +#endif + +# This file just make a stack frame for the contents of the .fini and +# .init sections. Users may put any desired instructions in those +# sections. + +#ifdef __ELF__ +#define TYPE(x) .type x,function +#else +#define TYPE(x) +#endif +#ifdef __ARM_EABI__ +/* Some attributes that are common to all routines in this file. */ + /* Tag_ABI_align_needed: This code does not require 8-byte + alignment from the caller. */ + /* .eabi_attribute 24, 0 -- default setting. */ + /* Tag_ABI_align_preserved: This code preserves 8-byte + alignment in any callee. */ + .eabi_attribute 25, 1 +#endif /* __ARM_EABI__ */ + + # Note - this macro is complemented by the FUNC_END macro + # in crtn.S. If you change this macro you must also change + # that macro match. +.macro FUNC_START +#ifdef __thumb__ + .thumb + + push {r3, r4, r5, r6, r7, lr} +#else + .arm + # Create a stack frame and save any call-preserved registers + mov ip, sp + stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, lr, pc} + sub fp, ip, #4 +#endif +.endm + + .section ".init" + .align 2 + .global _init +#ifdef __thumb__ + .thumb_func +#endif + TYPE(_init) +_init: + FUNC_START + + + .section ".fini" + .align 2 + .global _fini +#ifdef __thumb__ + .thumb_func +#endif + TYPE(_fini) +_fini: + FUNC_START + +# end of crti.S diff --git a/libgcc/config/arm/crtn.S b/libgcc/config/arm/crtn.S new file mode 100644 index 00000000000..8c5f22572f7 --- /dev/null +++ b/libgcc/config/arm/crtn.S @@ -0,0 +1,83 @@ +# Copyright (C) 2001, 2004, 2008, 2009, 2010, 2011 +# Free Software Foundation, Inc. +# Written By Nick Clifton +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +/* An executable stack is *not* required for these functions. */ +#if defined(__ELF__) && defined(__linux__) +.section .note.GNU-stack,"",%progbits +.previous +#endif + +#ifdef __ARM_EABI__ +/* Some attributes that are common to all routines in this file. */ + /* Tag_ABI_align_needed: This code does not require 8-byte + alignment from the caller. */ + /* .eabi_attribute 24, 0 -- default setting. */ + /* Tag_ABI_align_preserved: This code preserves 8-byte + alignment in any callee. */ + .eabi_attribute 25, 1 +#endif /* __ARM_EABI__ */ + +# This file just makes sure that the .fini and .init sections do in +# fact return. Users may put any desired instructions in those sections. +# This file is the last thing linked into any executable. + + # Note - this macro is complemented by the FUNC_START macro + # in crti.S. If you change this macro you must also change + # that macro match. + # + # Note - we do not try any fancy optimizations of the return + # sequences here, it is just not worth it. Instead keep things + # simple. Restore all the save resgisters, including the link + # register and then perform the correct function return instruction. + # We also save/restore r3 to ensure stack alignment. +.macro FUNC_END +#ifdef __thumb__ + .thumb + + pop {r3, r4, r5, r6, r7} + pop {r3} + mov lr, r3 +#else + .arm + + sub sp, fp, #40 + ldmfd sp, {r4, r5, r6, r7, r8, r9, sl, fp, sp, lr} +#endif + +#if defined __THUMB_INTERWORK__ || defined __thumb__ + bx lr +#else + mov pc, lr +#endif +.endm + + + .section ".init" + ;; + FUNC_END + + .section ".fini" + ;; + FUNC_END + +# end of crtn.S diff --git a/libgcc/config/bfin/crti.S b/libgcc/config/bfin/crti.S new file mode 100644 index 00000000000..b6f20fc9e6b --- /dev/null +++ b/libgcc/config/bfin/crti.S @@ -0,0 +1,59 @@ +/* Specialized code needed to support construction and destruction of + file-scope objects in C++ and Java code, and to support exception handling. + Copyright (C) 2005, 2008, 2009 Free Software Foundation, Inc. + Contributed by Analog Devices. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* + * This file just supplies function prologues for the .init and .fini + * sections. It is linked in before crtbegin.o. + */ + + .ident "GNU C crti.o" + + .section .init + .globl __init + .type __init,@function +__init: +#if defined __ID_SHARED_LIB__ + [--SP] = P5; +#elif defined __BFIN_FDPIC__ + [--SP] = P3; +#endif + LINK 12; +#if defined __ID_SHARED_LIB__ + P5 = [P5 + _current_shared_library_p5_offset_] +#endif + .section .fini + .globl __fini + .type __fini,@function +__fini: +#if defined __ID_SHARED_LIB__ + [--SP] = P5; +#elif defined __BFIN_FDPIC__ + [--SP] = P3; +#endif + LINK 12; +#if defined __ID_SHARED_LIB__ + P5 = [P5 + _current_shared_library_p5_offset_] +#endif diff --git a/libgcc/config/bfin/crtlibid.S b/libgcc/config/bfin/crtlibid.S new file mode 100644 index 00000000000..beab8093810 --- /dev/null +++ b/libgcc/config/bfin/crtlibid.S @@ -0,0 +1,29 @@ +/* Provide a weak definition of the library ID, for the benefit of certain + configure scripts. + Copyright (C) 2005, 2008, 2009 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + + .ident "GNU C crtlibid.o" + +.weak _current_shared_library_p5_offset_ +.set _current_shared_library_p5_offset_, 0 diff --git a/libgcc/config/bfin/crtn.S b/libgcc/config/bfin/crtn.S new file mode 100644 index 00000000000..7fcd27bfade --- /dev/null +++ b/libgcc/config/bfin/crtn.S @@ -0,0 +1,50 @@ +/* Specialized code needed to support construction and destruction of + file-scope objects in C++ and Java code, and to support exception handling. + Copyright (C) 2005, 2008, 2009 Free Software Foundation, Inc. + Contributed by Analog Devices. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* + * This file supplies function epilogues for the .init and .fini sections. + * It is linked in after all other files. + */ + + .ident "GNU C crtn.o" + + .section .init + unlink; +#if defined __ID_SHARED_LIB__ + P5 = [SP++]; +#elif defined __BFIN_FDPIC__ + P3 = [SP++]; +#endif + rts; + + .section .fini + unlink; +#if defined __ID_SHARED_LIB__ + P5 = [SP++]; +#elif defined __BFIN_FDPIC__ + P3 = [SP++]; +#endif + rts; diff --git a/libgcc/config/bfin/t-crtlibid b/libgcc/config/bfin/t-crtlibid new file mode 100644 index 00000000000..b0c93e71eb9 --- /dev/null +++ b/libgcc/config/bfin/t-crtlibid @@ -0,0 +1,3 @@ +# Assemble startup files. +crtlibid.o: $(srcdir)/config/bfin/crtlibid.S + $(gcc_compile) -c -x assembler-with-cpp $< diff --git a/libgcc/config/bfin/t-crtstuff b/libgcc/config/bfin/t-crtstuff new file mode 100644 index 00000000000..7b343e25406 --- /dev/null +++ b/libgcc/config/bfin/t-crtstuff @@ -0,0 +1 @@ +CRTSTUFF_T_CFLAGS = -fpic diff --git a/libgcc/config/c6x/crti.S b/libgcc/config/c6x/crti.S new file mode 100644 index 00000000000..8fe35c1f121 --- /dev/null +++ b/libgcc/config/c6x/crti.S @@ -0,0 +1,39 @@ +/* Copyright 2010, 2011 Free Software Foundation, Inc. + Contributed by Bernd Schmidt <bernds@codesourcery.com>. + +This file is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This file is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* + * This file just supplies function prologues for the .init and .fini + * sections. It is linked in before crtbegin.o. + */ + + .section .init + .globl _init + .type _init,@function +_init: + add .l2 -8, B15, B15 + stw .d2t2 B3,*+B15(4) + .section .fini + .globl _fini + .type _fini,@function +_fini: + add .l2 -8, B15, B15 + stw .d2t2 B3,*+B15(4) diff --git a/libgcc/config/c6x/crtn.S b/libgcc/config/c6x/crtn.S new file mode 100644 index 00000000000..5900a4b14c4 --- /dev/null +++ b/libgcc/config/c6x/crtn.S @@ -0,0 +1,41 @@ +/* Copyright 2010, 2011 Free Software Foundation, Inc. + Contributed by Bernd Schmidt <bernds@codesourcery.com>. + +This file is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This file is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* + * This file supplies function epilogues for the .init and .fini sections. + * It is linked in after all other files. + */ + + .section .init + ldw .d2t2 *+B15(4), B3 + add .d2 B15, 8, B15 + nop 3 + ret .s2 B3 + nop 5 + + .section .fini + ldw .d2t2 *+B15(4), B3 + add .d2 B15, 8, B15 + nop 3 + ret .s2 B3 + nop 5 + diff --git a/libgcc/config/c6x/t-elf b/libgcc/config/c6x/t-elf index 89b68969ae8..99d0cd2d5ca 100644 --- a/libgcc/config/c6x/t-elf +++ b/libgcc/config/c6x/t-elf @@ -1 +1,15 @@ +# Cannot use default rules due to $(CRTSTUFF_T_CFLAGS). +CUSTOM_CRTIN = yes + +# Assemble startup files. +crti.o: $(srcdir)/config/c6x/crti.S + $(crt_compile) -c $(CRTSTUFF_T_CFLAGS) $< + +crtn.o: $(srcdir)/config/c6x/crtn.S + $(crt_compile) -c $(CRTSTUFF_T_CFLAGS) $< + +# Avoid failures when the user's GOT becomes too large. +CRTSTUFF_T_CFLAGS = -msdata=none +CRTSTUFF_T_CFLAGS_S = -msdata=none + SHLIB_MAPFILES += $(srcdir)/config/c6x/libgcc-eabi.ver diff --git a/libgcc/config/c6x/t-uclinux b/libgcc/config/c6x/t-uclinux new file mode 100644 index 00000000000..15fb9a1afc1 --- /dev/null +++ b/libgcc/config/c6x/t-uclinux @@ -0,0 +1 @@ +CRTSTUFF_T_CFLAGS += -fPIC diff --git a/libgcc/config/cris/t-elfmulti b/libgcc/config/cris/t-elfmulti new file mode 100644 index 00000000000..3bb8ecf66c4 --- /dev/null +++ b/libgcc/config/cris/t-elfmulti @@ -0,0 +1 @@ +CRTSTUFF_T_CFLAGS = -moverride-best-lib-options diff --git a/libgcc/config/cris/t-linux b/libgcc/config/cris/t-linux index 8c7f4d44249..26555fd5072 100644 --- a/libgcc/config/cris/t-linux +++ b/libgcc/config/cris/t-linux @@ -1,2 +1,4 @@ +CRTSTUFF_T_CFLAGS_S = $(HOST_LIBGCC2_CFLAGS) + # Override t-linux default. SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/cris/libgcc-glibc.ver diff --git a/libgcc/config/fr30/crti.S b/libgcc/config/fr30/crti.S new file mode 100644 index 00000000000..4ce61231bd7 --- /dev/null +++ b/libgcc/config/fr30/crti.S @@ -0,0 +1,61 @@ +# crti.s for ELF + +# Copyright (C) 1992, 1998, 1999, 2008, 2009 Free Software Foundation, Inc. +# Written By David Vinayak Henkel-Wallace, June 1992 +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +# This file just make a stack frame for the contents of the .fini and +# .init sections. Users may put any desired instructions in those +# sections. + + .section ".init" + .global _init + .type _init,#function + .align 4 +_init: + st rp, @-r15 + enter #4 + + # These nops are here to align the end of this code with a 16 byte + # boundary. The linker will start inserting code into the .init + # section at such a boundary. + + nop + nop + nop + nop + nop + nop + + + .section ".fini" + .global _fini + .type _fini,#function + .align 4 +_fini: + st rp, @-r15 + enter #4 + nop + nop + nop + nop + nop + nop diff --git a/libgcc/config/fr30/crtn.S b/libgcc/config/fr30/crtn.S new file mode 100644 index 00000000000..c62d37b6671 --- /dev/null +++ b/libgcc/config/fr30/crtn.S @@ -0,0 +1,44 @@ +# crtn.S for ELF + +# Copyright (C) 1992, 1999, 2008, 2009, 2011 Free Software Foundation, Inc. +# Written By David Vinayak Henkel-Wallace, June 1992 +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +# This file just makes sure that the .fini and .init sections do in +# fact return. Users may put any desired instructions in those sections. +# This file is the last thing linked into any executable. + + .section ".init" + .align 4 + + leave + ld @r15+,rp + ret + + + .section ".fini" + .align 4 + + leave + ld @r15+,rp + ret + +# Th-th-th-that is all folks! diff --git a/libgcc/config/frv/frvbegin.c b/libgcc/config/frv/frvbegin.c new file mode 100644 index 00000000000..23cbf1ecc93 --- /dev/null +++ b/libgcc/config/frv/frvbegin.c @@ -0,0 +1,157 @@ +/* Frv initialization file linked before all user modules + Copyright (C) 1999, 2000, 2003, 2004, 2009 Free Software Foundation, Inc. + Contributed by Red Hat, Inc. + + This file is part of GCC. + + GCC is free software ; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY ; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. + + This file was originally taken from the file crtstuff.c in the + main compiler directory, and simplified. */ + +#include "defaults.h" +#include <stddef.h> +#include "../libgcc/unwind-dw2-fde.h" +#include "gbl-ctors.h" + +/* Declare a pointer to void function type. */ +#define STATIC static + +#ifdef __FRV_UNDERSCORE__ +#define UNDERSCORE "_" +#else +#define UNDERSCORE "" +#endif + +#define INIT_SECTION_NEG_ONE(SECTION, FLAGS, NAME) \ +__asm__ (".section " SECTION "," FLAGS "\n\t" \ + ".globl " UNDERSCORE NAME "\n\t" \ + ".type " UNDERSCORE NAME ",@object\n\t" \ + ".p2align 2\n" \ + UNDERSCORE NAME ":\n\t" \ + ".word -1\n\t" \ + ".previous") + +#define INIT_SECTION(SECTION, FLAGS, NAME) \ +__asm__ (".section " SECTION "," FLAGS "\n\t" \ + ".globl " UNDERSCORE NAME "\n\t" \ + ".type " UNDERSCORE NAME ",@object\n\t" \ + ".p2align 2\n" \ + UNDERSCORE NAME ":\n\t" \ + ".previous") + +/* Beginning of .ctor/.dtor sections that provides a list of constructors and + destructors to run. */ + +INIT_SECTION_NEG_ONE (".ctors", "\"aw\"", "__CTOR_LIST__"); +INIT_SECTION_NEG_ONE (".dtors", "\"aw\"", "__DTOR_LIST__"); + +/* Beginning of .eh_frame section that provides all of the exception handling + tables. */ + +INIT_SECTION (".eh_frame", "\"aw\"", "__EH_FRAME_BEGIN__"); + +#if ! __FRV_FDPIC__ +/* In FDPIC, the linker itself generates this. */ +/* Beginning of .rofixup section that provides a list of pointers that we + need to adjust. */ + +INIT_SECTION (".rofixup", "\"a\"", "__ROFIXUP_LIST__"); +#endif /* __FRV_FDPIC__ */ + +extern void __frv_register_eh(void) __attribute__((__constructor__)); +extern void __frv_deregister_eh(void) __attribute__((__destructor__)); + +extern func_ptr __EH_FRAME_BEGIN__[]; + +/* Register the exception handling table as the first constructor. */ +void +__frv_register_eh (void) +{ + static struct object object; + if (__register_frame_info) + __register_frame_info (__EH_FRAME_BEGIN__, &object); +} + +/* Note, do not declare __{,de}register_frame_info weak as it seems + to interfere with the pic support. */ + +/* Unregister the exception handling table as a deconstructor. */ +void +__frv_deregister_eh (void) +{ + static int completed = 0; + + if (completed) + return; + + if (__deregister_frame_info) + __deregister_frame_info (__EH_FRAME_BEGIN__); + + completed = 1; +} + +/* Run the global destructors. */ +void +__do_global_dtors (void) +{ + static func_ptr *p = __DTOR_LIST__ + 1; + while (*p) + { + p++; + (*(p-1)) (); + } +} + +/* Run the global constructors. */ +void +__do_global_ctors (void) +{ + unsigned long nptrs = (unsigned long) __CTOR_LIST__[0]; + unsigned i; + + if (nptrs == (unsigned long)-1) + for (nptrs = 0; __CTOR_LIST__[nptrs + 1] != 0; nptrs++); + + for (i = nptrs; i >= 1; i--) + __CTOR_LIST__[i] (); + + atexit (__do_global_dtors); +} + +/* Subroutine called automatically by `main'. + Compiling a global function named `main' + produces an automatic call to this function at the beginning. + + For many systems, this routine calls __do_global_ctors. + For systems which support a .init section we use the .init section + to run __do_global_ctors, so we need not do anything here. */ + +void +__main (void) +{ + /* Support recursive calls to `main': run initializers just once. */ + static int initialized; + if (! initialized) + { + initialized = 1; + __do_global_ctors (); + } +} diff --git a/libgcc/config/frv/frvend.c b/libgcc/config/frv/frvend.c new file mode 100644 index 00000000000..0bb07b56b4a --- /dev/null +++ b/libgcc/config/frv/frvend.c @@ -0,0 +1,70 @@ +/* Frv initialization file linked after all user modules + Copyright (C) 1999, 2000, 2003, 2004, 2009 Free Software Foundation, Inc. + Contributed by Red Hat, Inc. + + This file is part of GCC. + + GCC is free software ; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY ; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +#include "defaults.h" +#include <stddef.h> +#include "../libgcc/unwind-dw2-fde.h" + +#ifdef __FRV_UNDERSCORE__ +#define UNDERSCORE "_" +#else +#define UNDERSCORE "" +#endif + +#define FINI_SECTION_ZERO(SECTION, FLAGS, NAME) \ +__asm__ (".section " SECTION "," FLAGS "\n\t" \ + ".globl " UNDERSCORE NAME "\n\t" \ + ".type " UNDERSCORE NAME ",@object\n\t" \ + ".p2align 2\n" \ + UNDERSCORE NAME ":\n\t" \ + ".word 0\n\t" \ + ".previous") + +#define FINI_SECTION(SECTION, FLAGS, NAME) \ +__asm__ (".section " SECTION "," FLAGS "\n\t" \ + ".globl " UNDERSCORE NAME "\n\t" \ + ".type " UNDERSCORE NAME ",@object\n\t" \ + ".p2align 2\n" \ + UNDERSCORE NAME ":\n\t" \ + ".previous") + +/* End of .ctor/.dtor sections that provides a list of constructors and + destructors to run. */ + +FINI_SECTION_ZERO (".ctors", "\"aw\"", "__CTOR_END__"); +FINI_SECTION_ZERO (".dtors", "\"aw\"", "__DTOR_END__"); + +/* End of .eh_frame section that provides all of the exception handling + tables. */ + +FINI_SECTION_ZERO (".eh_frame", "\"aw\"", "__FRAME_END__"); + +#if ! __FRV_FDPIC__ +/* In FDPIC, the linker itself generates this. */ +/* End of .rofixup section that provides a list of pointers that we + need to adjust. */ + +FINI_SECTION (".rofixup", "\"a\"", "__ROFIXUP_END__"); +#endif /* __FRV_FDPIC__ */ diff --git a/libgcc/config/frv/t-frv b/libgcc/config/frv/t-frv new file mode 100644 index 00000000000..b364a5a25b9 --- /dev/null +++ b/libgcc/config/frv/t-frv @@ -0,0 +1,9 @@ +# Compile two additional files that are linked with every program +# linked using GCC on systems using COFF or ELF, for the sake of C++ +# constructors. + +frvbegin$(objext): $(srcdir)/config/frv/frvbegin.c + $(gcc_compile) -c $< + +frvend$(objext): $(srcdir)/config/frv/frvend.c + $(gcc_compile) -c $< diff --git a/libgcc/config/frv/t-linux b/libgcc/config/frv/t-linux index dbab5a4205f..2b4fe3f94e8 100644 --- a/libgcc/config/frv/t-linux +++ b/libgcc/config/frv/t-linux @@ -1 +1,3 @@ +CRTSTUFF_T_CFLAGS = -fPIC + SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/frv/libgcc-glibc.ver diff --git a/libgcc/config/h8300/crti.S b/libgcc/config/h8300/crti.S new file mode 100644 index 00000000000..f58c3aac9dd --- /dev/null +++ b/libgcc/config/h8300/crti.S @@ -0,0 +1,63 @@ +/* Copyright (C) 2001, 2002, 2009, 2011 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* The code in sections .init and .fini is supposed to be a single + regular function. The function in .init is called directly from + start in crt0.S. The function in .fini is atexit()ed in crt0.S + too. + + crti.S contributes the prologue of a function to these sections, + and crtn.S comes up the epilogue. STARTFILE_SPEC should list + crti.o before any other object files that might add code to .init + or .fini sections, and ENDFILE_SPEC should list crtn.o after any + such object files. */ + +#ifdef __H8300H__ +#ifdef __NORMAL_MODE__ + .h8300hn +#else + .h8300h +#endif +#endif + +#ifdef __H8300S__ +#ifdef __NORMAL_MODE__ + .h8300sn +#else + .h8300s +#endif +#endif +#ifdef __H8300SX__ +#ifdef __NORMAL_MODE__ + .h8300sxn +#else + .h8300sx +#endif +#endif + + .section .init, "ax", @progbits + .global __init +__init: + .section .fini, "ax", @progbits + .global __fini +__fini: diff --git a/libgcc/config/h8300/crtn.S b/libgcc/config/h8300/crtn.S new file mode 100644 index 00000000000..7a591694563 --- /dev/null +++ b/libgcc/config/h8300/crtn.S @@ -0,0 +1,53 @@ +/* Copyright (C) 2001, 2009, 2011 Free Software Foundation, Inc. + This file was adapted from glibc sources. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* See an explanation about .init and .fini in crti.S. */ + +#ifdef __H8300H__ +#ifdef __NORMAL_MODE__ + .h8300hn +#else + .h8300h +#endif +#endif + +#ifdef __H8300S__ +#ifdef __NORMAL_MODE__ + .h8300sn +#else + .h8300s +#endif +#endif +#ifdef __H8300SX__ +#ifdef __NORMAL_MODE__ + .h8300sxn +#else + .h8300sx +#endif +#endif + .section .init, "ax", @progbits + rts + + .section .fini, "ax", @progbits + rts diff --git a/libgcc/config/i386/cygming-crtbegin.c b/libgcc/config/i386/cygming-crtbegin.c new file mode 100644 index 00000000000..fc36cce257d --- /dev/null +++ b/libgcc/config/i386/cygming-crtbegin.c @@ -0,0 +1,135 @@ +/* crtbegin object for windows32 targets. + Copyright (C) 2007, 2009, 2010 Free Software Foundation, Inc. + + Contributed by Danny Smith <dannysmith@users.sourceforge.net> + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* Target machine header files require this define. */ +#define IN_LIBGCC2 + +#include "auto-host.h" +#include "tconfig.h" +#include "tsystem.h" +#include "coretypes.h" +#include "tm.h" +#include "unwind-dw2-fde.h" + +#define WIN32_LEAN_AND_MEAN +#include <windows.h> + +#ifndef LIBGCC_SONAME +#define LIBGCC_SONAME "libgcc_s.dll" +#endif + +#ifndef LIBGCJ_SONAME +#define LIBGCJ_SONAME "libgcj_s.dll" +#endif + + +/* Make the declarations weak. This is critical for + _Jv_RegisterClasses because it lives in libgcj.a */ +extern void __register_frame_info (const void *, struct object *) + TARGET_ATTRIBUTE_WEAK; +extern void *__deregister_frame_info (const void *) + TARGET_ATTRIBUTE_WEAK; +extern void _Jv_RegisterClasses (const void *) TARGET_ATTRIBUTE_WEAK; + +#if defined(HAVE_LD_RO_RW_SECTION_MIXING) +# define EH_FRAME_SECTION_CONST const +#else +# define EH_FRAME_SECTION_CONST +#endif + +/* Stick a label at the beginning of the frame unwind info so we can + register/deregister it with the exception handling library code. */ +#if DWARF2_UNWIND_INFO +static EH_FRAME_SECTION_CONST char __EH_FRAME_BEGIN__[] + __attribute__((used, section(EH_FRAME_SECTION_NAME), aligned(4))) + = { }; + +static struct object obj; +#endif + +#if TARGET_USE_JCR_SECTION +static void *__JCR_LIST__[] + __attribute__ ((used, section(JCR_SECTION_NAME), aligned(4))) + = { }; +#endif + +/* Pull in references from libgcc.a(unwind-dw2-fde.o) in the + startfile. These are referenced by a ctor and dtor in crtend.o. */ +extern void __gcc_register_frame (void); +extern void __gcc_deregister_frame (void); + +void +__gcc_register_frame (void) +{ +#if DWARF2_UNWIND_INFO +/* Weak undefined symbols won't be pulled in from dlls; hence + we first test if the dll is already loaded and, if so, + get the symbol's address at run-time. If the dll is not loaded, + fallback to weak linkage to static archive. */ + + void (*register_frame_fn) (const void *, struct object *); + HANDLE h = GetModuleHandle (LIBGCC_SONAME); + if (h) + register_frame_fn = (void (*) (const void *, struct object *)) + GetProcAddress (h, "__register_frame_info"); + else + register_frame_fn = __register_frame_info; + if (register_frame_fn) + register_frame_fn (__EH_FRAME_BEGIN__, &obj); +#endif + +#if TARGET_USE_JCR_SECTION + if (__JCR_LIST__[0]) + { + void (*register_class_fn) (const void *); + HANDLE h = GetModuleHandle (LIBGCJ_SONAME); + if (h) + register_class_fn = (void (*) (const void *)) + GetProcAddress (h, "_Jv_RegisterClasses"); + else + register_class_fn = _Jv_RegisterClasses; + + if (register_class_fn) + register_class_fn (__JCR_LIST__); + } +#endif +} + +void +__gcc_deregister_frame (void) +{ +#if DWARF2_UNWIND_INFO + void * (*deregister_frame_fn) (const void *); + HANDLE h = GetModuleHandle (LIBGCC_SONAME); + if (h) + deregister_frame_fn = (void* (*) (const void *)) + GetProcAddress (h, "__deregister_frame_info"); + else + deregister_frame_fn = __deregister_frame_info; + if (deregister_frame_fn) + deregister_frame_fn (__EH_FRAME_BEGIN__); +#endif +} diff --git a/libgcc/config/i386/cygming-crtend.c b/libgcc/config/i386/cygming-crtend.c new file mode 100644 index 00000000000..8545420b271 --- /dev/null +++ b/libgcc/config/i386/cygming-crtend.c @@ -0,0 +1,88 @@ +/* crtend object for windows32 targets. + Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc. + + Contributed by Danny Smith <dannysmith@users.sourceforge.net> + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* Target machine header files require this define. */ +#define IN_LIBGCC2 + +/* auto-host.h is needed by cygming.h for HAVE_GAS_WEAK and here + for HAVE_LD_RO_RW_SECTION_MIXING. */ +#include "auto-host.h" +#include "tconfig.h" +#include "tsystem.h" +#include "coretypes.h" +#include "tm.h" +#include "unwind-dw2-fde.h" + +#if defined(HAVE_LD_RO_RW_SECTION_MIXING) +# define EH_FRAME_SECTION_CONST const +#else +# define EH_FRAME_SECTION_CONST +#endif + +#if DWARF2_UNWIND_INFO +/* Terminate the frame unwind info section with a 0 as a sentinel; + this would be the 'length' field in a real FDE. */ + +static EH_FRAME_SECTION_CONST int __FRAME_END__[] + __attribute__ ((used, section(EH_FRAME_SECTION_NAME), + aligned(4))) + = { 0 }; +#endif + +#if TARGET_USE_JCR_SECTION +/* Null terminate the .jcr section array. */ +static void *__JCR_END__[1] + __attribute__ ((used, section(JCR_SECTION_NAME), + aligned(sizeof(void *)))) + = { 0 }; +#endif + +extern void __gcc_register_frame (void); +extern void __gcc_deregister_frame (void); + +static void register_frame_ctor (void) __attribute__ ((constructor (0))); + +static void +register_frame_ctor (void) +{ + __gcc_register_frame (); +#if DEFAULT_USE_CXA_ATEXIT + /* If we use the __cxa_atexit method to register C++ dtors + at object construction, also use atexit to register eh frame + info cleanup. */ + atexit (__gcc_deregister_frame); +#endif +} + +#if !DEFAULT_USE_CXA_ATEXIT +static void deregister_frame_dtor (void) __attribute__ ((destructor (0))); + +static void +deregister_frame_dtor (void) +{ + __gcc_deregister_frame (); +} +#endif diff --git a/libgcc/config/i386/t-cygming b/libgcc/config/i386/t-cygming index 048cadbd5a1..ad63bbbefd8 100644 --- a/libgcc/config/i386/t-cygming +++ b/libgcc/config/i386/t-cygming @@ -1,11 +1,9 @@ CUSTOM_CRTSTUFF = yes -crtbegin.o: $(gcc_srcdir)/config/i386/cygming-crtbegin.c - $(crt_compile) -fno-omit-frame-pointer -c \ - $(gcc_srcdir)/config/i386/cygming-crtbegin.c +crtbegin.o: $(srcdir)/config/i386/cygming-crtbegin.c + $(crt_compile) -fno-omit-frame-pointer -c $< # We intentionally use a implementation-reserved init priority of 0, # so allow the warning. -crtend.o: $(gcc_srcdir)/config/i386/cygming-crtend.c - $(crt_compile) -fno-omit-frame-pointer -Wno-error -c \ - $(gcc_srcdir)/config/i386/cygming-crtend.c +crtend.o: $(srcdir)/config/i386/cygming-crtend.c + $(crt_compile) -fno-omit-frame-pointer -Wno-error -c $< diff --git a/libgcc/config/i386/t-nto b/libgcc/config/i386/t-nto new file mode 100644 index 00000000000..0efb5b18adc --- /dev/null +++ b/libgcc/config/i386/t-nto @@ -0,0 +1 @@ +CRTSTUFF_T_CFLAGS = -fno-omit-frame-pointer -fPIC diff --git a/libgcc/config/ia64/crtbegin.S b/libgcc/config/ia64/crtbegin.S new file mode 100644 index 00000000000..638489990d5 --- /dev/null +++ b/libgcc/config/ia64/crtbegin.S @@ -0,0 +1,254 @@ +/* Copyright (C) 2000, 2001, 2003, 2005, 2009 Free Software Foundation, Inc. + Contributed by Jes Sorensen, <Jes.Sorensen@cern.ch> + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +#include "auto-host.h" + +.section .ctors,"aw","progbits" + .align 8 +__CTOR_LIST__: + data8 -1 + +.section .dtors,"aw","progbits" + .align 8 +__DTOR_LIST__: + data8 -1 + +.section .jcr,"aw","progbits" + .align 8 +__JCR_LIST__: + +.section .sdata + .type dtor_ptr,@object + .size dtor_ptr,8 +dtor_ptr: + data8 @gprel(__DTOR_LIST__ + 8) + + /* A handle for __cxa_finalize to manage c++ local destructors. */ + .global __dso_handle + .type __dso_handle,@object + .size __dso_handle,8 +#ifdef SHARED + .section .data +__dso_handle: + data8 __dso_handle +#else + .section .bss + .align 8 +__dso_handle: + .skip 8 +#endif + .hidden __dso_handle + + +#ifdef HAVE_INITFINI_ARRAY + +.section .fini_array, "a" + data8 @fptr(__do_global_dtors_aux) + +.section .init_array, "a" + data8 @fptr(__do_jv_register_classes) + data8 @fptr(__do_global_ctors_aux) + +#else /* !HAVE_INITFINI_ARRAY */ +/* + * Fragment of the ELF _fini routine that invokes our dtor cleanup. + * + * We make the call by indirection, because in large programs the + * .fini and .init sections are not in range of the destination, and + * we cannot allow the linker to insert a stub at the end of this + * fragment of the _fini function. Further, Itanium does not implement + * the long branch instructions, and we do not wish every program to + * trap to the kernel for emulation. + * + * Note that we require __do_global_dtors_aux to preserve the GP, + * so that the next fragment in .fini gets the right value. + */ +.section .fini,"ax","progbits" + { .mlx + movl r2 = @pcrel(__do_global_dtors_aux - 16) + } + { .mii + mov r3 = ip + ;; + add r2 = r2, r3 + ;; + } + { .mib + nop 0 + mov b6 = r2 + br.call.sptk.many b0 = b6 + } + +/* Likewise for _init. */ + +.section .init,"ax","progbits" + { .mlx + movl r2 = @pcrel(__do_jv_register_classes - 16) + } + { .mii + mov r3 = ip + ;; + add r2 = r2, r3 + ;; + } + { .mib + nop 0 + mov b6 = r2 + br.call.sptk.many b0 = b6 + } +#endif /* !HAVE_INITFINI_ARRAY */ + +.section .text + .align 32 + .proc __do_global_dtors_aux +__do_global_dtors_aux: + .prologue +#ifndef SHARED + .save ar.pfs, r35 + alloc loc3 = ar.pfs, 0, 4, 1, 0 + addl loc0 = @gprel(dtor_ptr), gp + .save rp, loc1 + mov loc1 = rp + .body + + mov loc2 = gp + nop 0 + br.sptk.many .entry +#else + /* + if (__cxa_finalize) + __cxa_finalize(__dso_handle) + */ + .save ar.pfs, r35 + alloc loc3 = ar.pfs, 0, 4, 1, 0 + addl loc0 = @gprel(dtor_ptr), gp + addl r16 = @ltoff(@fptr(__cxa_finalize)), gp + ;; + + ld8 r16 = [r16] + ;; + addl out0 = @ltoff(__dso_handle), gp + cmp.ne p7, p0 = r0, r16 + ;; + + ld8 out0 = [out0] +(p7) ld8 r18 = [r16], 8 + .save rp, loc1 + mov loc1 = rp + .body + ;; + + mov loc2 = gp +(p7) ld8 gp = [r16] +(p7) mov b6 = r18 + + nop 0 + nop 0 +(p7) br.call.sptk.many rp = b6 + ;; + + nop 0 + nop 0 + br.sptk.many .entry +#endif + /* + do { + dtor_ptr++; + (*(dtor_ptr-1)) (); + } while (dtor_ptr); + */ +.loop: + st8 [loc0] = r15 // update dtor_ptr (in memory) + ld8 r17 = [r16], 8 // r17 <- dtor's entry-point + nop 0 + ;; + + ld8 gp = [r16] // gp <- dtor's gp + mov b6 = r17 + br.call.sptk.many rp = b6 + +.entry: ld8 r15 = [loc0] // r15 <- dtor_ptr (gp-relative) + ;; + add r16 = r15, loc2 // r16 <- dtor_ptr (absolute) + adds r15 = 8, r15 + ;; + + ld8 r16 = [r16] // r16 <- pointer to dtor's fdesc + mov rp = loc1 + mov ar.pfs = loc3 + ;; + + cmp.ne p6, p0 = r0, r16 +(p6) br.cond.sptk.few .loop + br.ret.sptk.many rp + .endp __do_global_dtors_aux + + .align 32 + .proc __do_jv_register_classes +__do_jv_register_classes: + .prologue + .save ar.pfs, r33 + alloc loc1 = ar.pfs, 0, 3, 1, 0 + movl out0 = @gprel(__JCR_LIST__) + ;; + + addl r14 = @ltoff(@fptr(_Jv_RegisterClasses)), gp + add out0 = out0, gp + .save rp, loc0 + mov loc0 = rp + .body + ;; + + ld8 r14 = [r14] + ld8 r15 = [out0] + cmp.ne p6, p0 = r0, r0 + ;; + + cmp.eq.or p6, p0 = r0, r14 + cmp.eq.or p6, p0 = r0, r15 +(p6) br.ret.sptk.many rp + + ld8 r15 = [r14], 8 + ;; + nop 0 + mov b6 = r15 + + mov loc2 = gp + ld8 gp = [r14] + br.call.sptk.many rp = b6 + ;; + + mov gp = loc2 + mov rp = loc0 + mov ar.pfs = loc1 + + nop 0 + nop 0 + br.ret.sptk.many rp + .endp __do_jv_register_classes + +#ifdef SHARED +.weak __cxa_finalize +#endif +.weak _Jv_RegisterClasses diff --git a/libgcc/config/ia64/crtend.S b/libgcc/config/ia64/crtend.S new file mode 100644 index 00000000000..a904af9cfd9 --- /dev/null +++ b/libgcc/config/ia64/crtend.S @@ -0,0 +1,121 @@ +/* Copyright (C) 2000, 2001, 2003, 2005, 2009 Free Software Foundation, Inc. + Contributed by Jes Sorensen, <Jes.Sorensen@cern.ch> + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +#include "auto-host.h" + +.section .ctors,"aw","progbits" + .align 8 +__CTOR_END__: + data8 0 + +.section .dtors,"aw","progbits" + .align 8 +__DTOR_END__: + data8 0 + +.section .jcr,"aw","progbits" + .align 8 +__JCR_END__: + data8 0 + +#ifdef HAVE_INITFINI_ARRAY + .global __do_global_ctors_aux + .hidden __do_global_ctors_aux +#else /* !HAVE_INITFINI_ARRAY */ +/* + * Fragment of the ELF _init routine that invokes our dtor cleanup. + * + * We make the call by indirection, because in large programs the + * .fini and .init sections are not in range of the destination, and + * we cannot allow the linker to insert a stub at the end of this + * fragment of the _fini function. Further, Itanium does not implement + * the long branch instructions, and we do not wish every program to + * trap to the kernel for emulation. + * + * Note that we require __do_global_ctors_aux to preserve the GP, + * so that the next fragment in .fini gets the right value. + */ +.section .init,"ax","progbits" + { .mlx + movl r2 = @pcrel(__do_global_ctors_aux - 16) + } + { .mii + mov r3 = ip + ;; + add r2 = r2, r3 + ;; + } + { .mib + mov b6 = r2 + br.call.sptk.many b0 = b6 + ;; + } +#endif /* !HAVE_INITFINI_ARRAY */ + +.text + .align 32 + .proc __do_global_ctors_aux +__do_global_ctors_aux: + .prologue + /* + for (loc0 = __CTOR_END__-1; *p != -1; --p) + (*p) (); + */ + .save ar.pfs, r34 + alloc loc2 = ar.pfs, 0, 5, 0, 0 + movl loc0 = @gprel(__CTOR_END__ - 8) + ;; + + add loc0 = loc0, gp + ;; + ld8 loc3 = [loc0], -8 + .save rp, loc1 + mov loc1 = rp + .body + ;; + + cmp.eq p6, p0 = -1, loc3 + mov loc4 = gp +(p6) br.cond.spnt.few .exit + +.loop: ld8 r15 = [loc3], 8 + ;; + ld8 gp = [loc3] + mov b6 = r15 + + ld8 loc3 = [loc0], -8 + nop 0 + br.call.sptk.many rp = b6 + ;; + + cmp.ne p6, p0 = -1, loc3 + nop 0 +(p6) br.cond.sptk.few .loop + +.exit: mov gp = loc3 + mov rp = loc1 + mov ar.pfs = loc2 + + br.ret.sptk.many rp + .endp __do_global_ctors_aux diff --git a/libgcc/config/ia64/crti.S b/libgcc/config/ia64/crti.S new file mode 100644 index 00000000000..c15ff662bbe --- /dev/null +++ b/libgcc/config/ia64/crti.S @@ -0,0 +1,53 @@ +# Copyright (C) 2000, 2001, 2008, 2009, 2011 Free Software Foundation, Inc. +# Written By Timothy Wall +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +# This file just make a stack frame for the contents of the .fini and +# .init sections. Users may put any desired instructions in those +# sections. + + .section ".init" + .align 16 + .global _init +_init: + .prologue 14, 33 + .save ar.pfs, r34 + alloc r34 = ar.pfs, 0, 4, 0, 0 + .vframe r35 + mov r35 = r12 + .save rp, r33 + mov r33 = b0 + .body + + .section ".fini" + .align 16 + .global _fini +_fini: + .prologue 14, 33 + .save ar.pfs, r34 + alloc r34 = ar.pfs, 0, 4, 0, 0 + .vframe r35 + mov r35 = r12 + .save rp, r33 + mov r33 = b0 + .body + +# end of crti.S diff --git a/libgcc/config/ia64/crtn.S b/libgcc/config/ia64/crtn.S new file mode 100644 index 00000000000..d44abbea3c7 --- /dev/null +++ b/libgcc/config/ia64/crtn.S @@ -0,0 +1,43 @@ +# Copyright (C) 2000, 2001, 2008, 2009, 2011 Free Software Foundation, Inc. +# Written By Timothy Wall +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +# This file just makes sure that the .fini and .init sections do in +# fact return. Users may put any desired instructions in those sections. +# This file is the last thing linked into any executable. + + .section ".init" + ;; + mov ar.pfs = r34 + mov b0 = r33 + .restore sp + mov r12 = r35 + br.ret.sptk.many b0 + + .section ".fini" + ;; + mov ar.pfs = r34 + mov b0 = r33 + .restore sp + mov r12 = r35 + br.ret.sptk.many b0 + +# end of crtn.S diff --git a/libgcc/config/ia64/t-ia64 b/libgcc/config/ia64/t-ia64 index 55bb8c11630..59cf3aa75f4 100644 --- a/libgcc/config/ia64/t-ia64 +++ b/libgcc/config/ia64/t-ia64 @@ -1,17 +1,15 @@ CUSTOM_CRTSTUFF = yes # Assemble startup files. -crtbegin.o: $(gcc_srcdir)/config/ia64/crtbegin.asm - $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \ - -o $@ $(gcc_srcdir)/config/ia64/crtbegin.asm -crtend.o: $(gcc_srcdir)/config/ia64/crtend.asm - $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \ - -o $@ $(gcc_srcdir)/config/ia64/crtend.asm -crtbeginS.o: $(gcc_srcdir)/config/ia64/crtbegin.asm - $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \ - -o $@ -DSHARED $(gcc_srcdir)/config/ia64/crtbegin.asm -crtendS.o: $(gcc_srcdir)/config/ia64/crtend.asm - $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \ - -o $@ -DSHARED $(gcc_srcdir)/config/ia64/crtend.asm +# FIXME: -I$(gcc_objdir) is necessary to find auto-host.h. Really? +crtbegin.o: $(srcdir)/config/ia64/crtbegin.S + $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp $< +crtend.o: $(srcdir)/config/ia64/crtend.S + $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp $< +crtbeginS.o: $(srcdir)/config/ia64/crtbegin.S + $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \ -o $@ -DSHARED $< +crtendS.o: $(srcdir)/config/ia64/crtend.S + $(CC) $(compile_deps) -I. -I$(gcc_objdir) -c -x assembler-with-cpp \ + -o $@ -DSHARED $< SHLIB_MAPFILES += $(srcdir)/config/ia64/libgcc-ia64.ver diff --git a/libgcc/config/ia64/t-vms b/libgcc/config/ia64/t-vms index 9bc933adfe0..140c748b771 100644 --- a/libgcc/config/ia64/t-vms +++ b/libgcc/config/ia64/t-vms @@ -1 +1,7 @@ +CRTSTUFF_T_CFLAGS = -O0 +CRTSTUFF_T_CFLAGS_S = -O0 + +crtinitS.o: $(srcdir)/config/ia64/vms-crtinit.S + $(gcc_compile) -c -x assembler-with-cpp $< + LIB2ADDEH += $(srcdir)/config/ia64/fde-vms.c diff --git a/libgcc/config/ia64/vms-crtinit.S b/libgcc/config/ia64/vms-crtinit.S new file mode 100644 index 00000000000..322b2927347 --- /dev/null +++ b/libgcc/config/ia64/vms-crtinit.S @@ -0,0 +1,24 @@ +/* Copyright (C) 2009 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + + .global LIB$INITIALIZE# diff --git a/libgcc/config/lm32/t-elf b/libgcc/config/lm32/t-elf index 679f00711e7..b1ee8f2a253 100644 --- a/libgcc/config/lm32/t-elf +++ b/libgcc/config/lm32/t-elf @@ -1,12 +1,2 @@ -# Assemble startup files. - -$(T)crti.o: $(srcdir)/config/lm32/crti.S $(GCC_PASSES) - $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \ - -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/lm32/crti.S - -$(T)crtn.o: $(srcdir)/config/lm32/crtn.S $(GCC_PASSES) - $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \ - -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/lm32/crtn.S - CRTSTUFF_T_CFLAGS = -G 0 -msign-extend-enabled HOST_LIBGCC2_CFLAGS = -G 0 -msign-extend-enabled diff --git a/libgcc/config/m32r/initfini.c b/libgcc/config/m32r/initfini.c new file mode 100644 index 00000000000..6e7d58614c7 --- /dev/null +++ b/libgcc/config/m32r/initfini.c @@ -0,0 +1,168 @@ +/* .init/.fini section handling + C++ global constructor/destructor handling. + This file is based on crtstuff.c, sol2-crti.asm, sol2-crtn.asm. + + Copyright (C) 1996, 1997, 1998, 2006, 2009 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +/* Declare a pointer to void function type. */ +typedef void (*func_ptr) (void); + +#ifdef CRT_INIT + +/* NOTE: In order to be able to support SVR4 shared libraries, we arrange + to have one set of symbols { __CTOR_LIST__, __DTOR_LIST__, __CTOR_END__, + __DTOR_END__ } per root executable and also one set of these symbols + per shared library. So in any given whole process image, we may have + multiple definitions of each of these symbols. In order to prevent + these definitions from conflicting with one another, and in order to + ensure that the proper lists are used for the initialization/finalization + of each individual shared library (respectively), we give these symbols + only internal (i.e. `static') linkage, and we also make it a point to + refer to only the __CTOR_END__ symbol in crtfini.o and the __DTOR_LIST__ + symbol in crtinit.o, where they are defined. */ + +static func_ptr __CTOR_LIST__[1] + __attribute__ ((used, section (".ctors"))) + = { (func_ptr) (-1) }; + +static func_ptr __DTOR_LIST__[1] + __attribute__ ((used, section (".dtors"))) + = { (func_ptr) (-1) }; + +/* Run all the global destructors on exit from the program. */ + +/* Some systems place the number of pointers in the first word of the + table. On SVR4 however, that word is -1. In all cases, the table is + null-terminated. On SVR4, we start from the beginning of the list and + invoke each per-compilation-unit destructor routine in order + until we find that null. + + Note that this function MUST be static. There will be one of these + functions in each root executable and one in each shared library, but + although they all have the same code, each one is unique in that it + refers to one particular associated `__DTOR_LIST__' which belongs to the + same particular root executable or shared library file. */ + +static void __do_global_dtors (void) +asm ("__do_global_dtors") __attribute__ ((used, section (".text"))); + +static void +__do_global_dtors (void) +{ + func_ptr *p; + + for (p = __DTOR_LIST__ + 1; *p; p++) + (*p) (); +} + +/* .init section start. + This must appear at the start of the .init section. */ + +asm ("\n\ + .section .init,\"ax\",@progbits\n\ + .balign 4\n\ + .global __init\n\ +__init:\n\ + push fp\n\ + push lr\n\ + mv fp,sp\n\ + seth r0, #shigh(__fini)\n\ + add3 r0, r0, #low(__fini)\n\ + bl atexit\n\ + .fillinsn\n\ +"); + +/* .fini section start. + This must appear at the start of the .init section. */ + +asm ("\n\ + .section .fini,\"ax\",@progbits\n\ + .balign 4\n\ + .global __fini\n\ +__fini:\n\ + push fp\n\ + push lr\n\ + mv fp,sp\n\ + bl __do_global_dtors\n\ + .fillinsn\n\ +"); + +#endif /* CRT_INIT */ + +#ifdef CRT_FINI + +/* Put a word containing zero at the end of each of our two lists of function + addresses. Note that the words defined here go into the .ctors and .dtors + sections of the crtend.o file, and since that file is always linked in + last, these words naturally end up at the very ends of the two lists + contained in these two sections. */ + +static func_ptr __CTOR_END__[1] + __attribute__ ((used, section (".ctors"))) + = { (func_ptr) 0 }; + +static func_ptr __DTOR_END__[1] + __attribute__ ((used, section (".dtors"))) + = { (func_ptr) 0 }; + +/* Run all global constructors for the program. + Note that they are run in reverse order. */ + +static void __do_global_ctors (void) +asm ("__do_global_ctors") __attribute__ ((used, section (".text"))); + +static void +__do_global_ctors (void) +{ + func_ptr *p; + + for (p = __CTOR_END__ - 1; *p != (func_ptr) -1; p--) + (*p) (); +} + +/* .init section end. + This must live at the end of the .init section. */ + +asm ("\n\ + .section .init,\"ax\",@progbits\n\ + bl __do_global_ctors\n\ + mv sp,fp\n\ + pop lr\n\ + pop fp\n\ + jmp lr\n\ + .fillinsn\n\ +"); + +/* .fini section end. + This must live at the end of the .fini section. */ + +asm ("\n\ + .section .fini,\"ax\",@progbits\n\ + mv sp,fp\n\ + pop lr\n\ + pop fp\n\ + jmp lr\n\ + .fillinsn\n\ +"); + +#endif /* CRT_FINI */ diff --git a/libgcc/config/m32r/t-m32r b/libgcc/config/m32r/t-m32r new file mode 100644 index 00000000000..acc07586a1f --- /dev/null +++ b/libgcc/config/m32r/t-m32r @@ -0,0 +1,19 @@ +# We need to use -fpic when we are using gcc to compile the routines in +# initfini.c. This is only really needed when we are going to use gcc/g++ +# to produce a shared library, but since we don't know ahead of time when +# we will be doing that, we just always use -fpic when compiling the +# routines in initfini.c. +# -fpic currently isn't supported for the m32r. +# FIXME: No longer true. Empty CRTSTUFF_T_CFLAGS is the default. +CRTSTUFF_T_CFLAGS = + +# .init/.fini section routines +crtinit.o: $(srcdir)/config/m32r/initfini.c + $(crt_compile) $(CRTSTUFF_T_CFLAGS) -DCRT_INIT \ + -finhibit-size-directive -fno-inline-functions -g0 \ + -mmodel=medium -c $< + +crtfini.o: $(srcdir)/config/m32r/initfini.c + $(crt_compile) $(CRTSTUFF_T_CFLAGS) -DCRT_FINI \ + -finhibit-size-directive -fno-inline-functions -g0 \ + -mmodel=medium -c $< diff --git a/libgcc/config/m68k/crti.S b/libgcc/config/m68k/crti.S new file mode 100644 index 00000000000..12fb59f4130 --- /dev/null +++ b/libgcc/config/m68k/crti.S @@ -0,0 +1,44 @@ +/* Specialized code needed to support construction and destruction of + file-scope objects in C++ and Java code, and to support exception handling. + Copyright (C) 1999, 2008, 2009 Free Software Foundation, Inc. + Contributed by Charles-Antoine Gauthier (charles.gauthier@iit.nrc.ca). + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* + * This file just supplies function prologues for the .init and .fini + * sections. It is linked in before crtbegin.o. + */ + + .ident "GNU C crti.o" + + .section .init + .globl _init + .type _init,@function +_init: + linkw %fp,#0 + + .section .fini + .globl _fini + .type _fini,@function +_fini: + linkw %fp,#0 diff --git a/libgcc/config/m68k/crtn.S b/libgcc/config/m68k/crtn.S new file mode 100644 index 00000000000..b7d70f02ed5 --- /dev/null +++ b/libgcc/config/m68k/crtn.S @@ -0,0 +1,40 @@ +/* Specialized code needed to support construction and destruction of + file-scope objects in C++ and Java code, and to support exception handling. + Copyright (C) 1999, 2008, 2009 Free Software Foundation, Inc. + Contributed by Charles-Antoine Gauthier (charles.gauthier@iit.nrc.ca). + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* + * This file supplies function epilogues for the .init and .fini sections. + * It is linked in after all other files. + */ + + .ident "GNU C crtn.o" + + .section .init + unlk %fp + rts + + .section .fini + unlk %fp + rts diff --git a/libgcc/config/mcore/crti.S b/libgcc/config/mcore/crti.S new file mode 100644 index 00000000000..467e944fb37 --- /dev/null +++ b/libgcc/config/mcore/crti.S @@ -0,0 +1,63 @@ +# crti.S for ELF based systems + +# Copyright (C) 1992, 1998, 1999, 2008, 2009, 2011 +# Free Software Foundation, Inc. +# Written By David Vinayak Henkel-Wallace, June 1992 +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + + +# This file just makes a stack frame for the contents of the .fini and +# .init sections. Users may put any desired instructions in those +# sections. + + .section ".init" + .global _init + .type _init,@function + .align 4 +_init: + subi r0, 16 + st.w r15, (r0, 12) + + # These nops are here to align the end of this code with a 16 byte + # boundary. The linker will start inserting code into the .init + # section at such a boundary. + + nop + nop + nop + nop + nop + nop + + + .section ".fini" + .global _fini + .type _fini,@function + .align 4 +_fini: + subi r0, 16 + st.w r15, (r0, 12) + nop + nop + nop + nop + nop + nop diff --git a/libgcc/config/mcore/crtn.S b/libgcc/config/mcore/crtn.S new file mode 100644 index 00000000000..85f75b1d42f --- /dev/null +++ b/libgcc/config/mcore/crtn.S @@ -0,0 +1,45 @@ +# crtn.S for ELF based systems + +# Copyright (C) 1992, 1999, 2000, 2008, 2009, 2011 +# Free Software Foundation, Inc. +# Written By David Vinayak Henkel-Wallace, June 1992 +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +# This file just makes sure that the .fini and .init sections do in +# fact return. Users may put any desired instructions in those sections. +# This file is the last thing linked into any executable. + + .section ".init" + .align 4 + + ldw r15,(r0, 12) + addi r0,16 + jmp r15 + + .section ".fini" + .align 4 + + ldw r15, (r0, 12) + addi r0,16 + jmp r15 + +# Th-th-th-that is all folks! + diff --git a/libgcc/config/mep/t-mep b/libgcc/config/mep/t-mep new file mode 100644 index 00000000000..36e6f5dc771 --- /dev/null +++ b/libgcc/config/mep/t-mep @@ -0,0 +1,2 @@ +# Use -O0 instead of -O2 so we don't get complex relocations +CRTSTUFF_CFLAGS += -O0 diff --git a/libgcc/config/microblaze/crti.S b/libgcc/config/microblaze/crti.S new file mode 100644 index 00000000000..3944443b437 --- /dev/null +++ b/libgcc/config/microblaze/crti.S @@ -0,0 +1,39 @@ +/* crti.s for __init, __fini + This file supplies the prologue for __init and __fini routines + + Copyright 2009, 2010 Free Software Foundation, Inc. + + Contributed by Michael Eager <eager@eagercon.com>. + + This file is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 3, or (at your option) any + later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + + .section .init, "ax" + .global __init + .align 2 +__init: + addik r1, r1, -8 + sw r15, r0, r1 + + .section .fini, "ax" + .global __fini + .align 2 +__fini: + addik r1, r1, -8 + sw r15, r0, r1 diff --git a/libgcc/config/microblaze/crtn.S b/libgcc/config/microblaze/crtn.S new file mode 100644 index 00000000000..7970dee1c93 --- /dev/null +++ b/libgcc/config/microblaze/crtn.S @@ -0,0 +1,35 @@ +/* crtn.s for __init, __fini + This file supplies the epilogue for __init and __fini routines + + Copyright 2009, 2010 Free Software Foundation, Inc. + + Contributed by Michael Eager <eager@eagercon.com>. + + This file is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 3, or (at your option) any + later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + + .section .init, "ax" + lw r15, r0, r1 + rtsd r15, 8 + addik r1, r1, 8 + + .section .fini, "ax" + lw r15, r0, r1 + rtsd r15, 8 + addik r1, r1, 8 diff --git a/libgcc/config/microblaze/t-microblaze b/libgcc/config/microblaze/t-microblaze index 85fc8d39d8a..ec17bb88c6a 100644 --- a/libgcc/config/microblaze/t-microblaze +++ b/libgcc/config/microblaze/t-microblaze @@ -8,5 +8,3 @@ LIB2ADD += \ $(srcdir)/config/microblaze/udivsi3.asm \ $(srcdir)/config/microblaze/umodsi3.asm \ $(srcdir)/config/microblaze/divsi3_table.c - -MULTILIB_OPTIONS = mxl-barrel-shift mno-xl-soft-mul mxl-multiply-high diff --git a/libgcc/config/mips/crti.S b/libgcc/config/mips/crti.S new file mode 100644 index 00000000000..ac04271c598 --- /dev/null +++ b/libgcc/config/mips/crti.S @@ -0,0 +1,49 @@ +/* Copyright (C) 2001, 2002 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* 4 slots for argument spill area. 1 for cpreturn, 1 for stack. + Return spill offset of 40 and 20. Aligned to 16 bytes for n32. */ + + .section .init,"ax",@progbits + .globl _init + .type _init,@function +_init: +#ifdef __mips64 + daddu $sp,$sp,-48 + sd $31,40($sp) +#else + addu $sp,$sp,-32 + sw $31,20($sp) +#endif + + .section .fini,"ax",@progbits + .globl _fini + .type _fini,@function +_fini: +#ifdef __mips64 + daddu $sp,$sp,-48 + sd $31,40($sp) +#else + addu $sp,$sp,-32 + sw $31,20($sp) +#endif diff --git a/libgcc/config/mips/crtn.S b/libgcc/config/mips/crtn.S new file mode 100644 index 00000000000..03a6b68c9cf --- /dev/null +++ b/libgcc/config/mips/crtn.S @@ -0,0 +1,52 @@ +/* Copyright (C) 2001, 2002 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* 4 slots for argument spill area. 1 for cpreturn, 1 for stack. + Return spill offset of 40 and 20. Aligned to 16 bytes for n32. */ + +#ifdef __mips16 +#define RA $7 +#else +#define RA $31 +#endif + + .section .init,"ax",@progbits +#ifdef __mips64 + ld RA,40($sp) + daddu $sp,$sp,48 +#else + lw RA,20($sp) + addu $sp,$sp,32 +#endif + j RA + + .section .fini,"ax",@progbits +#ifdef __mips64 + ld RA,40($sp) + daddu $sp,$sp,48 +#else + lw RA,20($sp) + addu $sp,$sp,32 +#endif + j RA + diff --git a/libgcc/config/mips/t-crtstuff b/libgcc/config/mips/t-crtstuff new file mode 100644 index 00000000000..d8ab43be2ae --- /dev/null +++ b/libgcc/config/mips/t-crtstuff @@ -0,0 +1,2 @@ +# Don't let CTOR_LIST end up in sdata section. +CRTSTUFF_T_CFLAGS = -G 0 diff --git a/libgcc/config/mmix/crti.S b/libgcc/config/mmix/crti.S new file mode 100644 index 00000000000..69858046975 --- /dev/null +++ b/libgcc/config/mmix/crti.S @@ -0,0 +1,116 @@ +/* Copyright (C) 2001, 2002, 2011 Free Software Foundation, Inc. + Contributed by Hans-Peter Nilsson <hp@bitrange.com> + +This file is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This file is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +% This is the crt0 equivalent for mmix-knuth-mmixware, for setting up +% things for compiler-generated assembly-code and for setting up things +% between where the simulator calls and main, and shutting things down on +% the way back. There's an actual crt0.o elsewhere, but that's a dummy. + +% This file and the GCC output are supposed to be *reasonably* +% mmixal-compatible to enable people to re-use output with Knuth's mmixal. +% However, forward references are used more freely: we are using the +% binutils tools. Users of mmixal beware; you will sometimes have to +% re-order things or use temporary variables. + +% Users of mmixal will want to set up 8H and 9H to be .text and .data +% respectively, so the compiler can switch between them pretending they're +% segments. + +% This little treasure is here so the 32 lowest address bits of user data +% will not be zero. Because of truncation, that would cause testcase +% gcc.c-torture/execute/980701-1.c to incorrectly fail. + + .data ! mmixal:= 8H LOC Data_Segment + .p2align 3 + LOC @+(8-@)@7 + OCTA 2009 + + .text ! mmixal:= 9H LOC 8B; LOC #100 + .global Main + +% The __Stack_start symbol is provided by the link script. +stackpp OCTA __Stack_start + +% "Main" is the magic symbol the simulator jumps to. We want to go +% on to "main". +% We need to set rG explicitly to avoid hard-to-debug situations. +Main SETL $255,32 + PUT rG,$255 + +% Initialize the stack pointer. It is supposedly made a global +% zero-initialized (allowed to change) register in crtn.S; we use the +% explicit number. + GETA $255,stackpp + LDOU $254,$255,0 + +% Make sure we get more than one mem, to simplify counting cycles. + LDBU $255,$1,0 + LDBU $255,$1,1 + + PUSHJ $2,_init + +#ifdef __MMIX_ABI_GNU__ +% Copy argc and argv from their initial position to argument registers +% where necessary. + SET $231,$0 + SET $232,$1 +#else +% For the mmixware ABI, we need to move arguments. The return value will +% appear in $0. + SET $2,$1 + SET $1,$0 +#endif + + PUSHJ $0,main + JMP exit + +% Provide the first part of _init and _fini. Save the return address on the +% register stack. We eventually ignore the return address of these +% PUSHJ:s, so it doesn't matter that whether .init and .fini code calls +% functions or where they store rJ. We shouldn't get there, so die +% (TRAP Halt) if that happens. + + .section .init,"ax",@progbits + .global _init +_init: + GET $0,:rJ + PUSHJ $1,0F + SETL $255,255 + TRAP 0,0,0 +0H IS @ + +% Register _fini to be executed as the last atexit function. +#ifdef __MMIX_ABI_GNU__ + GETA $231,_fini +#else + GETA $1,_fini +#endif + PUSHJ $0,atexit + + .section .fini,"ax",@progbits + .global _fini +_fini: + GET $0,:rJ + PUSHJ $1,0F + SETL $255,255 + TRAP 0,0,0 +0H IS @ diff --git a/libgcc/config/mmix/crtn.S b/libgcc/config/mmix/crtn.S new file mode 100644 index 00000000000..c109e54db01 --- /dev/null +++ b/libgcc/config/mmix/crtn.S @@ -0,0 +1,87 @@ +/* Copyright (C) 2001, 2002, 2009 Free Software Foundation, Inc. + Contributed by Hans-Peter Nilsson <hp@bitrange.com> + +This file is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This file is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +% This must be the last file on the link-line, allocating global registers +% from the top. + +% Register $254 is the stack-pointer. +sp GREG + +% Register $253 is frame-pointer. It's not supposed to be used in most +% functions. +fp GREG + +% $252 is the static chain register; nested functions receive the +% context of the surrounding function through a pointer passed in this +% register. +static_chain GREG +struct_value_reg GREG + +% These registers are used to pass state at an exceptional return (C++). +eh_state_3 GREG +eh_state_2 GREG +eh_state_1 GREG +eh_state_0 GREG + +#ifdef __MMIX_ABI_GNU__ + +% Allocate global registers used by the GNU ABI. +gnu_parm_reg_16 GREG +gnu_parm_reg_15 GREG +gnu_parm_reg_14 GREG +gnu_parm_reg_13 GREG +gnu_parm_reg_12 GREG +gnu_parm_reg_11 GREG +gnu_parm_reg_10 GREG +gnu_parm_reg_9 GREG +gnu_parm_reg_8 GREG +gnu_parm_reg_7 GREG +gnu_parm_reg_6 GREG +gnu_parm_reg_5 GREG +gnu_parm_reg_4 GREG +gnu_parm_reg_3 GREG +gnu_parm_reg_2 GREG +gnu_parm_reg_1 GREG + +#endif /* __MMIX_ABI_GNU__ */ + +% Provide last part of _init and _fini. + +% The return address is stored in the topmost stored register in the +% register-stack. We ignore the current value in rJ. It is probably +% garbage because each fragment of _init and _fini may have their own idea +% of the current stack frame, if they're cut out from a "real" function +% like in gcc/crtstuff.c. + + .section .init,"ax",@progbits + GETA $255,0F + PUT rJ,$255 + POP 0,0 +0H PUT rJ,$0 + POP 0,0 + + .section .fini,"ax",@progbits + GETA $255,0F + PUT rJ,$255 + POP 0,0 +0H PUT rJ,$0 + POP 0,0 diff --git a/libgcc/config/mmix/t-mmix b/libgcc/config/mmix/t-mmix index 9d66737e256..6793b3c5b9c 100644 --- a/libgcc/config/mmix/t-mmix +++ b/libgcc/config/mmix/t-mmix @@ -1,14 +1,20 @@ +# We need to turn off some assumptions on normality for code in crtstuff.c +# and crt{i,n}.S, specifically about execution not continuing past the +# end of the section in the file being compiled. Thus we must stop the +# assembler from generating stubbable PUSHJ relocs, because that will add +# stubs at the end of the current section when necessary. +CRTSTUFF_T_CFLAGS = -Wa,--no-stubs + # Don't use global registers in libraries. # FIXME: Not applied at "root" level, so disabled at the moment to stop # incorrect comparisons with -mabi=gnu. #MULTILIB_EXTRA_OPTS = mno-base-addresses -$(T)crti.o: $(gcc_srcdir)/config/mmix/crti.asm $(GCC_PASSES) - $(crt_compile) $(INCLUDES) \ - $(CRTSTUFF_T_CFLAGS) -c -x assembler-with-cpp \ - $(gcc_srcdir)/config/mmix/crti.asm +# Cannot use default rules due to $(CRTSTUFF_T_CFLAGS). +CUSTOM_CRTIN = yes + +crti.o: $(srcdir)/config/mmix/crti.S + $(crt_compile) $(CRTSTUFF_T_CFLAGS) -c $< -$(T)crtn.o: $(gcc_srcdir)/config/mmix/crtn.asm $(GCC_PASSES) - $(crt_compile) $(INCLUDES) \ - $(CRTSTUFF_T_CFLAGS) -c -x assembler-with-cpp \ - $(gcc_srcdir)/config/mmix/crtn.asm +crtn.o: $(srcdir)/config/mmix/crtn.S + $(crt_compile) $(CRTSTUFF_T_CFLAGS) -c $< diff --git a/libgcc/config/moxie/crti.asm b/libgcc/config/moxie/crti.S index f44582799a3..c59d3ecf0ef 100644 --- a/libgcc/config/moxie/crti.asm +++ b/libgcc/config/moxie/crti.S @@ -1,6 +1,6 @@ -# crti.asm for moxie +# crti.S for moxie # -# Copyright (C) 2009 Free Software Foundation +# Copyright (C) 2009, 2011 Free Software Foundation # # This file is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the @@ -25,7 +25,7 @@ # .init sections. Users may put any desired instructions in those # sections. - .file "crti.asm" + .file "crti.S" .section ".init" .global _init diff --git a/libgcc/config/moxie/crtn.asm b/libgcc/config/moxie/crtn.S index 3ac9d31eed8..4455237a602 100644 --- a/libgcc/config/moxie/crtn.asm +++ b/libgcc/config/moxie/crtn.S @@ -1,6 +1,6 @@ -# crtn.asm for moxie +# crtn.S for moxie # -# Copyright (C) 2009 Free Software Foundation +# Copyright (C) 2009, 2011 Free Software Foundation # # This file is free software; you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the @@ -25,7 +25,7 @@ # fact return. Users may put any desired instructions in those sections. # This file is the last thing linked into any executable. - .file "crtn.asm" + .file "crtn.S" .section ".init" ret diff --git a/libgcc/config/moxie/t-moxie b/libgcc/config/moxie/t-moxie deleted file mode 100644 index 6e62aec2224..00000000000 --- a/libgcc/config/moxie/t-moxie +++ /dev/null @@ -1,9 +0,0 @@ -# Assemble startup files. - -$(T)crti.o: $(srcdir)/config/moxie/crti.asm $(GCC_PASSES) - $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \ - -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/moxie/crti.asm - -$(T)crtn.o: $(srcdir)/config/moxie/crtn.asm $(GCC_PASSES) - $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \ - -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/moxie/crtn.asm diff --git a/libgcc/config/pa/stublib.c b/libgcc/config/pa/stublib.c new file mode 100644 index 00000000000..d3cf559c8ab --- /dev/null +++ b/libgcc/config/pa/stublib.c @@ -0,0 +1,97 @@ +/* Stub functions. + Copyright (C) 2006, 2009, 2010 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +#ifdef L_register_frame_info +struct object; +void __register_frame_info (const void * __attribute__((unused)), + struct object * __attribute__((unused))); +void +__register_frame_info (const void *p, struct object *ob) +{ +} +#endif + +#ifdef L_deregister_frame_info +void *__deregister_frame_info (const void * __attribute__((unused))); +void * +__deregister_frame_info (const void *p) +{ + return (void *)0; +} +#endif + +#ifdef L_cxa_finalize +void __cxa_finalize (void * __attribute__((unused))); +void +__cxa_finalize (void *p) +{ +} +#endif + +#ifdef L_Jv_RegisterClasses +void _Jv_RegisterClasses (void * __attribute__((unused))); +void +_Jv_RegisterClasses (void *p) +{ +} +#endif + +#ifdef L_pthread_default_stacksize_np +int pthread_default_stacksize_np (unsigned long __attribute__((unused)), + unsigned long *); +int +pthread_default_stacksize_np (unsigned long new, unsigned long *old) +{ + if (old) + *old = 0; + return 0; +} +#endif + +#ifdef L_pthread_mutex_lock +int pthread_mutex_lock (void); +int +pthread_mutex_lock (void) +{ + return 0; +} +#endif + +#ifdef L_pthread_mutex_unlock +int pthread_mutex_unlock (void); +int +pthread_mutex_unlock (void) +{ + return 0; +} +#endif + +#ifdef L_pthread_once +int pthread_once (void); +int +pthread_once (void) +{ + return 0; +} +#endif diff --git a/libgcc/config/pa/t-stublib b/libgcc/config/pa/t-stublib new file mode 100644 index 00000000000..017998ff689 --- /dev/null +++ b/libgcc/config/pa/t-stublib @@ -0,0 +1,21 @@ +LIBGCCSTUB_OBJS = pthread_default_stacksize_np-stub.o \ + pthread_mutex_lock-stub.o \ + pthread_mutex_unlock-stub.o \ + pthread_once-stub.o + +pthread_default_stacksize_np-stub.o: $(srcdir)/config/pa/stublib.c + $(gcc_compile) -c -O2 -DL_pthread_default_stacksize_np $< + +pthread_mutex_lock-stub.o: $(srcdir)/config/pa/stublib.c + $(gcc_compile) -c -O2 -DL_pthread_mutex_lock $< + +pthread_mutex_unlock-stub.o: $(srcdir)/config/pa/stublib.c + $(gcc_compile) -c -O2 -DL_pthread_mutex_unlock $< + +pthread_once-stub.o: $(srcdir)/config/pa/stublib.c + $(gcc_compile) -c -O2 -DL_pthread_once $< + +libgcc_stub.a: $(LIBGCCSTUB_OBJS) + -rm -rf $@ + $(AR) rc $@ $< + $(RANLIB) $@ diff --git a/libgcc/config/pa/t-stublib64 b/libgcc/config/pa/t-stublib64 new file mode 100644 index 00000000000..5d0d9682abf --- /dev/null +++ b/libgcc/config/pa/t-stublib64 @@ -0,0 +1,13 @@ +LIBGCCSTUB_OBJS += rfi-stub.o dfi-stub.o jvrc-stub.o cxaf-stub.o + +rfi-stub.o: $(srcdir)/config/pa/stublib.c + $(gcc_compile) -c -O2 -DL_register_frame_info $< + +dfi-stub.o: $(srcdir)/config/pa/stublib.c + $(gcc_compile) -c -O2 -DL_deregister_frame_info $< + +cxaf-stub.o: $(srcdir)/config/pa/stublib.c + $(gcc_compile) -c -O2 -DL_cxa_finalize $< + +jvrc-stub.o: $(srcdir)/config/pa/stublib.c + $(gcc_compile) -c -O2 -DL_Jv_RegisterClasses $< diff --git a/libgcc/config/rs6000/eabi-ci.S b/libgcc/config/rs6000/eabi-ci.S new file mode 100644 index 00000000000..696f33d394f --- /dev/null +++ b/libgcc/config/rs6000/eabi-ci.S @@ -0,0 +1,113 @@ +/* crti.s for eabi + Copyright (C) 1996, 2000, 2008, 2009 Free Software Foundation, Inc. + Written By Michael Meissner + +This file is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This file is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* This file just supplies labeled starting points for the .got* and other + special sections. It is linked in first before other modules. */ + + .ident "GNU C crti.s" + +#include <ppc-asm.h> + +#ifndef __powerpc64__ + .section ".got","aw" + .globl __GOT_START__ + .type __GOT_START__,@object +__GOT_START__: + + .section ".got1","aw" + .globl __GOT1_START__ + .type __GOT1_START__,@object +__GOT1_START__: + + .section ".got2","aw" + .globl __GOT2_START__ + .type __GOT2_START__,@object +__GOT2_START__: + + .section ".fixup","aw" + .globl __FIXUP_START__ + .type __FIXUP_START__,@object +__FIXUP_START__: + + .section ".ctors","aw" + .globl __CTOR_LIST__ + .type __CTOR_LIST__,@object +__CTOR_LIST__: + + .section ".dtors","aw" + .globl __DTOR_LIST__ + .type __DTOR_LIST__,@object +__DTOR_LIST__: + + .section ".sdata","aw" + .globl __SDATA_START__ + .type __SDATA_START__,@object + .weak _SDA_BASE_ + .type _SDA_BASE_,@object +__SDATA_START__: +_SDA_BASE_: + + .section ".sbss","aw",@nobits + .globl __SBSS_START__ + .type __SBSS_START__,@object +__SBSS_START__: + + .section ".sdata2","a" + .weak _SDA2_BASE_ + .type _SDA2_BASE_,@object + .globl __SDATA2_START__ + .type __SDATA2_START__,@object +__SDATA2_START__: +_SDA2_BASE_: + + .section ".sbss2","a" + .globl __SBSS2_START__ + .type __SBSS2_START__,@object +__SBSS2_START__: + + .section ".gcc_except_table","aw" + .globl __EXCEPT_START__ + .type __EXCEPT_START__,@object +__EXCEPT_START__: + + .section ".eh_frame","aw" + .globl __EH_FRAME_BEGIN__ + .type __EH_FRAME_BEGIN__,@object +__EH_FRAME_BEGIN__: + +/* Head of __init function used for static constructors. */ + .section ".init","ax" + .align 2 +FUNC_START(__init) + stwu 1,-16(1) + mflr 0 + stw 0,20(1) + +/* Head of __fini function used for static destructors. */ + .section ".fini","ax" + .align 2 +FUNC_START(__fini) + stwu 1,-16(1) + mflr 0 + stw 0,20(1) +#endif diff --git a/libgcc/config/rs6000/eabi-cn.S b/libgcc/config/rs6000/eabi-cn.S new file mode 100644 index 00000000000..68774097c7c --- /dev/null +++ b/libgcc/config/rs6000/eabi-cn.S @@ -0,0 +1,104 @@ +/* crtn.s for eabi + Copyright (C) 1996, 2000, 2007, 2008, 2009 Free Software Foundation, Inc. + Written By Michael Meissner + +This file is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This file is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* This file just supplies labeled ending points for the .got* and other + special sections. It is linked in last after other modules. */ + + .ident "GNU C crtn.s" + +#ifndef __powerpc64__ + .section ".got","aw" + .globl __GOT_END__ + .type __GOT_END__,@object +__GOT_END__: + + .section ".got1","aw" + .globl __GOT1_END__ + .type __GOT1_END__,@object +__GOT1_END__: + + .section ".got2","aw" + .globl __GOT2_END__ + .type __GOT2_END__,@object +__GOT2_END__: + + .section ".fixup","aw" + .globl __FIXUP_END__ + .type __FIXUP_END__,@object +__FIXUP_END__: + + .section ".ctors","aw" + .globl __CTOR_END__ + .type __CTOR_END__,@object +__CTOR_END__: + + .section ".dtors","aw" + .weak __DTOR_END__ + .type __DTOR_END__,@object +__DTOR_END__: + + .section ".sdata","aw" + .globl __SDATA_END__ + .type __SDATA_END__,@object +__SDATA_END__: + + .section ".sbss","aw",@nobits + .globl __SBSS_END__ + .type __SBSS_END__,@object +__SBSS_END__: + + .section ".sdata2","a" + .globl __SDATA2_END__ + .type __SDATA2_END__,@object +__SDATA2_END__: + + .section ".sbss2","a" + .globl __SBSS2_END__ + .type __SBSS2_END__,@object +__SBSS2_END__: + + .section ".gcc_except_table","aw" + .globl __EXCEPT_END__ + .type __EXCEPT_END__,@object +__EXCEPT_END__: + + .section ".eh_frame","aw" + .globl __EH_FRAME_END__ + .type __EH_FRAME_END__,@object +__EH_FRAME_END__: + .long 0 + +/* Tail of __init function used for static constructors. */ + .section ".init","ax" + lwz 0,20(1) + mtlr 0 + addi 1,1,16 + blr + +/* Tail of __fini function used for static destructors. */ + .section ".fini","ax" + lwz 0,20(1) + mtlr 0 + addi 1,1,16 + blr +#endif diff --git a/libgcc/config/rs6000/sol-ci.S b/libgcc/config/rs6000/sol-ci.S new file mode 100644 index 00000000000..7c2fbae9747 --- /dev/null +++ b/libgcc/config/rs6000/sol-ci.S @@ -0,0 +1,94 @@ +# crti.s for sysv4 + +# Copyright (C) 1996, 2008, 2009 Free Software Foundation, Inc. +# Written By Michael Meissner +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +# This file just supplies labeled starting points for the .got* and other +# special sections. It is linked in first before other modules. + + .ident "GNU C scrti.s" + +#ifndef __powerpc64__ +# Start of .text + .section ".text" + .globl _ex_text0 +_ex_text0: + +# Exception range + .section ".exception_ranges","aw" + .globl _ex_range0 +_ex_range0: + +# List of C++ constructors + .section ".ctors","aw" + .globl __CTOR_LIST__ + .type __CTOR_LIST__,@object +__CTOR_LIST__: + +# List of C++ destructors + .section ".dtors","aw" + .globl __DTOR_LIST__ + .type __DTOR_LIST__,@object +__DTOR_LIST__: + +# Head of _init function used for static constructors + .section ".init","ax" + .align 2 + .globl _init + .type _init,@function +_init: stwu %r1,-16(%r1) + mflr %r0 + stw %r31,12(%r1) + stw %r0,16(%r1) + + bl _GLOBAL_OFFSET_TABLE_-4 # get the GOT address + mflr %r31 + +# lwz %r3,_ex_shared0@got(%r31) +# lwz %r4,-8(%r3) # _ex_register or 0 +# cmpi %cr0,%r4,0 +# beq .Lno_reg +# mtlr %r4 +# blrl +#.Lno_reg: + +# Head of _fini function used for static destructors + .section ".fini","ax" + .align 2 + .globl _fini + .type _fini,@function +_fini: stwu %r1,-16(%r1) + mflr %r0 + stw %r31,12(%r1) + stw %r0,16(%r1) + + bl _GLOBAL_OFFSET_TABLE_-4 # get the GOT address + mflr %r31 + +# _environ and its evil twin environ, pointing to the environment + .section ".sdata","aw" + .align 2 + .globl _environ + .space 4 + .weak environ + .set environ,_environ +#endif diff --git a/libgcc/config/rs6000/sol-cn.S b/libgcc/config/rs6000/sol-cn.S new file mode 100644 index 00000000000..4aeacaf2cff --- /dev/null +++ b/libgcc/config/rs6000/sol-cn.S @@ -0,0 +1,72 @@ +# crtn.s for sysv4 + +# Copyright (C) 1996, 2007, 2008, 2009 Free Software Foundation, Inc. +# Written By Michael Meissner +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +# This file just supplies labeled ending points for the .got* and other +# special sections. It is linked in last after other modules. + + .ident "GNU C scrtn.s" + +#ifndef __powerpc64__ +# Default versions of exception handling register/deregister + .weak _ex_register + .weak _ex_deregister + .set _ex_register,0 + .set _ex_deregister,0 + +# End list of C++ constructors + .section ".ctors","aw" + .globl __CTOR_END__ + .type __CTOR_END__,@object +__CTOR_END__: + +# End list of C++ destructors + .section ".dtors","aw" + .weak __DTOR_END__ + .type __DTOR_END__,@object +__DTOR_END__: + + .section ".text" + .globl _ex_text1 +_ex_text1: + + .section ".exception_ranges","aw" + .globl _ex_range1 +_ex_range1: + +# Tail of _init used for static constructors + .section ".init","ax" + lwz %r0,16(%r1) + lwz %r31,12(%r1) + mtlr %r0 + addi %r1,%r1,16 + blr + +# Tail of _fini used for static destructors + .section ".fini","ax" + lwz %r0,16(%r1) + lwz %r31,12(%r1) + mtlr %r0 + addi %r1,%r1,16 + blr +#endif diff --git a/libgcc/config/rs6000/t-crtstuff b/libgcc/config/rs6000/t-crtstuff new file mode 100644 index 00000000000..7422d383754 --- /dev/null +++ b/libgcc/config/rs6000/t-crtstuff @@ -0,0 +1,3 @@ +# If .sdata is enabled __CTOR_{LIST,END}__ go into .sdata instead of +# .ctors. +CRTSTUFF_T_CFLAGS = -msdata=none diff --git a/libgcc/config/rs6000/t-ppccomm b/libgcc/config/rs6000/t-ppccomm index f75bee22737..174ccde2c3f 100644 --- a/libgcc/config/rs6000/t-ppccomm +++ b/libgcc/config/rs6000/t-ppccomm @@ -17,26 +17,10 @@ LIB2ADD_ST += crtsavfpr.S crtresfpr.S \ e500crtsavg64gpr.S \ e500crtsavg64gprctr.S -EXTRA_PARTS += crtbegin$(objext) crtend$(objext) \ - crtbeginS$(objext) crtendS$(objext) crtbeginT$(objext) \ - ecrti$(objext) ecrtn$(objext) ncrti$(objext) ncrtn$(objext) - # We build {e,n}crti.o and {e,n}crtn.o, which serve to add begin and # end labels to all of the special sections used when we link using gcc. # Assemble startup files. -ecrti.S: $(gcc_srcdir)/config/rs6000/eabi-ci.asm - cat $(gcc_srcdir)/config/rs6000/eabi-ci.asm >ecrti.S - -ecrtn.S: $(gcc_srcdir)/config/rs6000/eabi-cn.asm - cat $(gcc_srcdir)/config/rs6000/eabi-cn.asm >ecrtn.S - -ncrti.S: $(gcc_srcdir)/config/rs6000/sol-ci.asm - cat $(gcc_srcdir)/config/rs6000/sol-ci.asm >ncrti.S - -ncrtn.S: $(gcc_srcdir)/config/rs6000/sol-cn.asm - cat $(gcc_srcdir)/config/rs6000/sol-cn.asm >ncrtn.S - crtsavfpr.S: $(gcc_srcdir)/config/rs6000/crtsavfpr.asm cat $(gcc_srcdir)/config/rs6000/crtsavfpr.asm >crtsavfpr.S @@ -94,14 +78,14 @@ e500crtsavg64gpr.S: $(gcc_srcdir)/config/rs6000/e500crtsavg64gpr.asm e500crtsavg64gprctr.S: $(gcc_srcdir)/config/rs6000/e500crtsavg64gprctr.asm cat $(gcc_srcdir)/config/rs6000/e500crtsavg64gprctr.asm >e500crtsavg64gprctr.S -ecrti$(objext): ecrti.S +ecrti$(objext): $(srcdir)/config/rs6000/eabi-ci.S $(crt_compile) -c ecrti.S -ecrtn$(objext): ecrtn.S +ecrtn$(objext): $(srcdir)/config/rs6000/eabi-cn.S $(crt_compile) -c ecrtn.S -ncrti$(objext): ncrti.S +ncrti$(objext): $(srcdir)/config/rs6000/sol-ci.S $(crt_compile) -c ncrti.S -ncrtn$(objext): ncrtn.S +ncrtn$(objext): $(srcdir)/config/rs6000/sol-cn.S $(crt_compile) -c ncrtn.S diff --git a/libgcc/config/score/crti.S b/libgcc/config/score/crti.S new file mode 100644 index 00000000000..8e7c78b978b --- /dev/null +++ b/libgcc/config/score/crti.S @@ -0,0 +1,131 @@ +# crti.S for Sunplus S+CORE +# +# Copyright (C) 2005, 2009, 2010, 2011 Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +# This file makes a stack frame for the contents of the .init and +# .fini sections. +.extern _stack + +#ifndef __pic__ +.section .init, "ax", @progbits + .weak _start + .ent _start + .frame r0, 0, r3, 0 + .mask 0x00000000, 0 +_start: + la r28, _gp + la r8, __bss_start + la r9, __bss_end__ + sub! r9, r8 + srli! r9, 2 + addi r9, -1 + mtsr r9, sr0 + li r9, 0 +1: + sw r9, [r8]+, 4 + bcnz 1b + la r0, _stack + jl _init + la r4, _end + jl _init_argv + jl exit + .end _start + + .weak _init_argv + .ent + .frame r0, 0, r3, 0 + .mask 0x00000000, 0 +_init_argv: + ldiu! r4, 0 + ldiu! r5, 0 + j main + .end _init_argv + + .globl _init + .type _init, %function +_init: + addi r0, -32 + sw r3, [r0, 20] + + .section .fini, "ax", @progbits + .globl _fini + .type _fini, %function +_fini: + addi r0, -32 + sw r3, [r0, 20] +#else +.section .init, "ax", @progbits + .set pic + .weak _start + .ent _start + .frame r0, 0, r3, 0 + .mask 0x00000000, 0 +_start: + mv r29, r3 + bl 0f +0: + .cpload r3 + mv r3, r29 + la r8, __bss_start + la r9, __bss_end__ + sub! r9, r8 + srli! r9, 2 + addi r9, -1 + mtsr r9, sr0 + li r9, 0 +1: + sw r9, [r8]+, 4 + bcnz 1b + la r0, _stack + bl _init + la r4, _end + la r29, _init_argv + brl r29 + la r29, exit + brl r29 + .end _start + + .weak _init_argv + .ent _init_argv + .frame r0, 0, r3, 0 + .mask 0x00000000, 0 +_init_argv: + ldiu! r4, 0 + ldiu! r5, 0 + la r29, main + brl r29 + .end _init_argv + + .globl _init + .type _init, %function +_init: + addi r0, -32 + sw r3, [r0, 20] + + .section .fini, "ax", @progbits + .globl _fini + .type _fini, %function +_fini: + addi r0, -32 + sw r3, [r0, 20] + +#endif diff --git a/libgcc/config/score/crtn.S b/libgcc/config/score/crtn.S new file mode 100644 index 00000000000..adf4eb08400 --- /dev/null +++ b/libgcc/config/score/crtn.S @@ -0,0 +1,50 @@ +# crtn.S for Sunplus S+CORE + +# Copyright (C) 2005, 2009, 2010, 2011 Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the +# Free Software Foundation; either version 3, or (at your option) any +# later version. +# +# This file is distributed in the hope that it will be useful, but +# WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# General Public License for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +# This file makes sure that the .init and .fini sections do in +# fact return. + +#ifndef __pic__ +.section .init, "ax", @progbits + lw r3, [r0, 20] + addi r0, 32 + br r3 + +.section .fini, "ax", @progbits + lw r3, [r0, 20] + addi r0, 32 + br r3 +#else + .set pic +.section .init, "ax", @progbits + lw r3, [r0, 20] + addi r0, 32 + br r3 + + .set pic +.section .fini, "ax", @progbits + lw r3, [r0, 20] + addi r0, 32 + br r3 +#endif + diff --git a/libgcc/config/sh/crt1.S b/libgcc/config/sh/crt1.S new file mode 100644 index 00000000000..ce09a09458f --- /dev/null +++ b/libgcc/config/sh/crt1.S @@ -0,0 +1,1369 @@ +/* Copyright (C) 2000, 2001, 2003, 2004, 2005, 2006, 2009, 2011 + Free Software Foundation, Inc. + This file was pretty much copied from newlib. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + + +#ifdef MMU_SUPPORT + /* Section used for exception/timer interrupt stack area */ + .section .data.vbr.stack,"aw" + .align 4 + .global __ST_VBR +__ST_VBR: + .zero 1024 * 2 /* ; 2k for VBR handlers */ +/* Label at the highest stack address where the stack grows from */ +__timer_stack: +#endif /* MMU_SUPPORT */ + + /* ;---------------------------------------- + Normal newlib crt1.S */ + +#ifdef __SH5__ + .section .data,"aw" + .global ___data +___data: + + .section .rodata,"a" + .global ___rodata +___rodata: + +#define ICCR_BASE 0x01600000 +#define OCCR_BASE 0x01e00000 +#define MMUIR_BASE 0x00000000 +#define MMUDR_BASE 0x00800000 + +#define PTE_ENABLED 1 +#define PTE_DISABLED 0 + +#define PTE_SHARED (1 << 1) +#define PTE_NOT_SHARED 0 + +#define PTE_CB_UNCACHEABLE 0 +#define PTE_CB_DEVICE 1 +#define PTE_CB_CACHEABLE_WB 2 +#define PTE_CB_CACHEABLE_WT 3 + +#define PTE_SZ_4KB (0 << 3) +#define PTE_SZ_64KB (1 << 3) +#define PTE_SZ_1MB (2 << 3) +#define PTE_SZ_512MB (3 << 3) + +#define PTE_PRR (1 << 6) +#define PTE_PRX (1 << 7) +#define PTE_PRW (1 << 8) +#define PTE_PRU (1 << 9) + +#define SR_MMU_BIT 31 +#define SR_BL_BIT 28 + +#define ALIGN_4KB (0xfff) +#define ALIGN_1MB (0xfffff) +#define ALIGN_512MB (0x1fffffff) + +#define DYNACON_BASE 0x0f000000 +#define DM_CB_DLINK_BASE 0x0c000000 +#define DM_DB_DLINK_BASE 0x0b000000 + +#define FEMI_AREA_0 0x00000000 +#define FEMI_AREA_1 0x04000000 +#define FEMI_AREA_2 0x05000000 +#define FEMI_AREA_3 0x06000000 +#define FEMI_AREA_4 0x07000000 +#define FEMI_CB 0x08000000 + +#define EMI_BASE 0X80000000 + +#define DMA_BASE 0X0e000000 + +#define CPU_BASE 0X0d000000 + +#define PERIPH_BASE 0X09000000 +#define DMAC_BASE 0x0e000000 +#define INTC_BASE 0x0a000000 +#define CPRC_BASE 0x0a010000 +#define TMU_BASE 0x0a020000 +#define SCIF_BASE 0x0a030000 +#define RTC_BASE 0x0a040000 + + + +#define LOAD_CONST32(val, reg) \ + movi ((val) >> 16) & 65535, reg; \ + shori (val) & 65535, reg + +#define LOAD_PTEH_VAL(sym, align, bits, scratch_reg, reg) \ + LOAD_ADDR (sym, reg); \ + LOAD_CONST32 ((align), scratch_reg); \ + andc reg, scratch_reg, reg; \ + LOAD_CONST32 ((bits), scratch_reg); \ + or reg, scratch_reg, reg + +#define LOAD_PTEL_VAL(sym, align, bits, scratch_reg, reg) \ + LOAD_ADDR (sym, reg); \ + LOAD_CONST32 ((align), scratch_reg); \ + andc reg, scratch_reg, reg; \ + LOAD_CONST32 ((bits), scratch_reg); \ + or reg, scratch_reg, reg + +#define SET_PTE(pte_addr_reg, pteh_val_reg, ptel_val_reg) \ + putcfg pte_addr_reg, 0, r63; \ + putcfg pte_addr_reg, 1, ptel_val_reg; \ + putcfg pte_addr_reg, 0, pteh_val_reg + +#if __SH5__ == 64 + .section .text,"ax" +#define LOAD_ADDR(sym, reg) \ + movi (sym >> 48) & 65535, reg; \ + shori (sym >> 32) & 65535, reg; \ + shori (sym >> 16) & 65535, reg; \ + shori sym & 65535, reg +#else + .mode SHmedia + .section .text..SHmedia32,"ax" +#define LOAD_ADDR(sym, reg) \ + movi (sym >> 16) & 65535, reg; \ + shori sym & 65535, reg +#endif + .global start +start: + LOAD_ADDR (_stack, r15) + +#ifdef MMU_SUPPORT + ! Set up the VM using the MMU and caches + + ! .vm_ep is first instruction to execute + ! after VM initialization + pt/l .vm_ep, tr1 + + ! Configure instruction cache (ICCR) + movi 3, r2 + movi 0, r3 + LOAD_ADDR (ICCR_BASE, r1) + putcfg r1, 0, r2 + putcfg r1, 1, r3 + + ! movi 7, r2 ! write through + ! Configure operand cache (OCCR) + LOAD_ADDR (OCCR_BASE, r1) + putcfg r1, 0, r2 + putcfg r1, 1, r3 + + ! Disable all PTE translations + LOAD_ADDR (MMUIR_BASE, r1) + LOAD_ADDR (MMUDR_BASE, r2) + movi 64, r3 + pt/l .disable_ptes_loop, tr0 +.disable_ptes_loop: + putcfg r1, 0, r63 + putcfg r2, 0, r63 + addi r1, 16, r1 + addi r2, 16, r2 + addi r3, -1, r3 + bgt r3, r63, tr0 + + LOAD_ADDR (MMUIR_BASE, r1) + + ! FEMI instruction mappings + ! Area 0 - 1Mb cacheable at 0x00000000 + ! Area 1 - None + ! Area 2 - 1Mb cacheable at 0x05000000 + ! - 1Mb cacheable at 0x05100000 + ! Area 3 - None + ! Area 4 - None + + ! Map a 1Mb page for instructions at 0x00000000 + LOAD_PTEH_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRX | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 1Mb page for instructions at 0x05000000 + addi r1, 16, r1 + LOAD_PTEH_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRX | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 1Mb page for instructions at 0x05100000 + addi r1, 16, r1 + LOAD_PTEH_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRX | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 512M page for instructions at EMI base + addi r1, 16, r1 + LOAD_PTEH_VAL (EMI_BASE, ALIGN_512MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (EMI_BASE, ALIGN_512MB, PTE_CB_CACHEABLE_WB | PTE_SZ_512MB | PTE_PRX | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 4K page for instructions at DM_DB_DLINK_BASE + addi r1, 16, r1 + LOAD_PTEH_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_CB_CACHEABLE_WB | PTE_SZ_4KB | PTE_PRX | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + LOAD_ADDR (MMUDR_BASE, r1) + + ! FEMI data mappings + ! Area 0 - 1Mb cacheable at 0x00000000 + ! Area 1 - 1Mb device at 0x04000000 + ! Area 2 - 1Mb cacheable at 0x05000000 + ! - 1Mb cacheable at 0x05100000 + ! Area 3 - None + ! Area 4 - None + ! CB - 1Mb device at 0x08000000 + + ! Map a 1Mb page for data at 0x00000000 + LOAD_PTEH_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (FEMI_AREA_0, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 1Mb page for data at 0x04000000 + addi r1, 16, r1 + LOAD_PTEH_VAL (FEMI_AREA_1, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (FEMI_AREA_1, ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 1Mb page for data at 0x05000000 + addi r1, 16, r1 + LOAD_PTEH_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (FEMI_AREA_2, ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 1Mb page for data at 0x05100000 + addi r1, 16, r1 + LOAD_PTEH_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL ((FEMI_AREA_2+0x100000), ALIGN_1MB, PTE_CB_CACHEABLE_WB | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 4K page for registers at 0x08000000 + addi r1, 16, r1 + LOAD_PTEH_VAL (FEMI_CB, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (FEMI_CB, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 512M page for data at EMI + addi r1, 16, r1 + LOAD_PTEH_VAL (EMI_BASE, ALIGN_512MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (EMI_BASE, ALIGN_512MB, PTE_CB_CACHEABLE_WB | PTE_SZ_512MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 4K page for DYNACON at DYNACON_BASE + addi r1, 16, r1 + LOAD_PTEH_VAL (DYNACON_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (DYNACON_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 4K page for instructions at DM_DB_DLINK_BASE + addi r1, 16, r1 + LOAD_PTEH_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (DM_DB_DLINK_BASE, ALIGN_4KB, PTE_CB_CACHEABLE_WB | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 4K page for data at DM_DB_DLINK_BASE+0x1000 + addi r1, 16, r1 + LOAD_PTEH_VAL ((DM_DB_DLINK_BASE+0x1000), ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL ((DM_DB_DLINK_BASE+0x1000), ALIGN_4KB, PTE_CB_UNCACHEABLE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 4K page for stack DM_DB_DLINK_BASE+0x2000 + addi r1, 16, r1 + LOAD_PTEH_VAL ((DM_DB_DLINK_BASE+0x2000), ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL ((DM_DB_DLINK_BASE+0x2000), ALIGN_4KB, PTE_CB_CACHEABLE_WB | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK + ! 0x0c000000 - 0x0c0fffff + addi r1, 16, r1 + LOAD_PTEH_VAL (DM_CB_DLINK_BASE, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (DM_CB_DLINK_BASE, ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK + ! 0x0c100000 - 0x0c1fffff + addi r1, 16, r1 + LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x100000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK + ! 0x0c200000 - 0x0c2fffff + addi r1, 16, r1 + LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x200000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x200000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK + ! 0x0c400000 - 0x0c4fffff + addi r1, 16, r1 + LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x400000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x400000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 1M page for DM_CB_BASE2 at DM_CB_DLINK + ! 0x0c800000 - 0x0c8fffff + addi r1, 16, r1 + LOAD_PTEH_VAL ((DM_CB_DLINK_BASE+0x800000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL ((DM_CB_DLINK_BASE+0x800000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map a 4K page for DMA control registers + addi r1, 16, r1 + LOAD_PTEH_VAL (DMA_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (DMA_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map lots of 4K pages for peripherals + + ! /* peripheral */ + addi r1, 16, r1 + LOAD_PTEH_VAL (PERIPH_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (PERIPH_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + ! /* dmac */ + addi r1, 16, r1 + LOAD_PTEH_VAL (DMAC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (DMAC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + ! /* intc */ + addi r1, 16, r1 + LOAD_PTEH_VAL (INTC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (INTC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + ! /* rtc */ + addi r1, 16, r1 + LOAD_PTEH_VAL (RTC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (RTC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + ! /* dmac */ + addi r1, 16, r1 + LOAD_PTEH_VAL (TMU_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (TMU_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + ! /* scif */ + addi r1, 16, r1 + LOAD_PTEH_VAL (SCIF_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (SCIF_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + ! /* cprc */ + addi r1, 16, r1 + LOAD_PTEH_VAL (CPRC_BASE, ALIGN_4KB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (CPRC_BASE, ALIGN_4KB, PTE_CB_DEVICE | PTE_SZ_4KB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Map CPU WPC registers + addi r1, 16, r1 + LOAD_PTEH_VAL (CPU_BASE, ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL (CPU_BASE, ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + addi r1, 16, r1 + + LOAD_PTEH_VAL ((CPU_BASE+0x100000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL ((CPU_BASE+0x100000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + addi r1, 16, r1 + LOAD_PTEH_VAL ((CPU_BASE+0x200000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL ((CPU_BASE+0x200000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + addi r1, 16, r1 + LOAD_PTEH_VAL ((CPU_BASE+0x400000), ALIGN_1MB, PTE_ENABLED | PTE_NOT_SHARED, r25, r2) + LOAD_PTEL_VAL ((CPU_BASE+0x400000), ALIGN_1MB, PTE_CB_DEVICE | PTE_SZ_1MB | PTE_PRR | PTE_PRW | PTE_PRU, r25, r3) + SET_PTE (r1, r2, r3) + + ! Switch over to virtual addressing and enabled cache + getcon sr, r1 + movi 1, r2 + shlli r2, SR_BL_BIT, r2 + or r1, r2, r1 + putcon r1, ssr + getcon sr, r1 + movi 1, r2 + shlli r2, SR_MMU_BIT, r2 + or r1, r2, r1 + putcon r1, ssr + gettr tr1, r1 + putcon r1, spc + synco + rte + + ! VM entry point. From now on, we are in VM mode. +.vm_ep: + + ! Install the trap handler, by seeding vbr with the + ! correct value, and by assigning sr.bl = 0. + + LOAD_ADDR (vbr_start, r1) + putcon r1, vbr + movi ~(1<<28), r1 + getcon sr, r2 + and r1, r2, r2 + putcon r2, sr +#endif /* MMU_SUPPORT */ + + pt/l .Lzero_bss_loop, tr0 + pt/l _init, tr5 + pt/l ___setup_argv_and_call_main, tr6 + pt/l _exit, tr7 + + ! zero out bss + LOAD_ADDR (_edata, r0) + LOAD_ADDR (_end, r1) +.Lzero_bss_loop: + stx.q r0, r63, r63 + addi r0, 8, r0 + bgt/l r1, r0, tr0 + + LOAD_ADDR (___data, r26) + LOAD_ADDR (___rodata, r27) + +#ifdef __SH_FPU_ANY__ + getcon sr, r0 + ! enable the FP unit, by resetting SR.FD + ! also zero out SR.FR, SR.SZ and SR.PR, as mandated by the ABI + movi 0, r1 + shori 0xf000, r1 + andc r0, r1, r0 + putcon r0, sr +#if __SH5__ == 32 + pt/l ___set_fpscr, tr0 + movi 0, r4 + blink tr0, r18 +#endif +#endif + + ! arrange for exit to call fini + pt/l _atexit, tr1 + LOAD_ADDR (_fini, r2) + blink tr1, r18 + + ! call init + blink tr5, r18 + + ! call the mainline + blink tr6, r18 + + ! call exit + blink tr7, r18 + ! We should never return from _exit but in case we do we would enter the + ! the following tight loop. This avoids executing any data that might follow. +limbo: + pt/l limbo, tr0 + blink tr0, r63 + +#ifdef MMU_SUPPORT + ! All these traps are handled in the same place. + .balign 256 +vbr_start: + pt/l handler, tr0 ! tr0 trashed. + blink tr0, r63 + .balign 256 +vbr_100: + pt/l handler, tr0 ! tr0 trashed. + blink tr0, r63 +vbr_100_end: + .balign 256 +vbr_200: + pt/l handler, tr0 ! tr0 trashed. + blink tr0, r63 + .balign 256 +vbr_300: + pt/l handler, tr0 ! tr0 trashed. + blink tr0, r63 + .balign 256 +vbr_400: ! Should be at vbr+0x400 +handler: + /* If the trap handler is there call it */ + LOAD_ADDR (__superh_trap_handler, r2) + pta chandler,tr2 + beq r2, r63, tr2 /* If zero, ie not present branch around to chandler */ + /* Now call the trap handler with as much of the context unchanged as possible. + Move trapping address into R18 to make it look like the trap point */ + getcon spc, r18 + pt/l __superh_trap_handler, tr0 + blink tr0, r7 +chandler: + getcon spc, r62 + getcon expevt, r2 + pt/l _exit, tr0 + blink tr0, r63 + + /* Simulated trap handler */ + .section .text..SHmedia32,"ax" +gcc2_compiled.: + .section .debug_abbrev +.Ldebug_abbrev0: + .section .text..SHmedia32 +.Ltext0: + .section .debug_info +.Ldebug_info0: + .section .debug_line +.Ldebug_line0: + .section .text..SHmedia32,"ax" + .align 5 + .global __superh_trap_handler + .type __superh_trap_handler,@function +__superh_trap_handler: +.LFB1: + ptabs r18, tr0 + addi.l r15, -8, r15 + st.l r15, 4, r14 + addi.l r15, -8, r15 + add.l r15, r63, r14 + st.l r14, 0, r2 + ptabs r7, tr0 + addi.l r14, 8, r14 + add.l r14, r63, r15 + ld.l r15, 4, r14 + addi.l r15, 8, r15 + blink tr0, r63 +.LFE1: +.Lfe1: + .size __superh_trap_handler,.Lfe1-__superh_trap_handler + + .section .text..SHmedia32 +.Letext0: + + .section .debug_info + .ualong 0xa7 + .uaword 0x2 + .ualong .Ldebug_abbrev0 + .byte 0x4 + .byte 0x1 + .ualong .Ldebug_line0 + .ualong .Letext0 + .ualong .Ltext0 + .string "trap_handler.c" + + .string "xxxxxxxxxxxxxxxxxxxxxxxxxxxx" + + .string "GNU C 2.97-sh5-010522" + + .byte 0x1 + .byte 0x2 + .ualong 0x9a + .byte 0x1 + .string "_superh_trap_handler" + + .byte 0x1 + .byte 0x2 + .byte 0x1 + .ualong .LFB1 + .ualong .LFE1 + .byte 0x1 + .byte 0x5e + .byte 0x3 + .string "trap_reason" + + .byte 0x1 + .byte 0x1 + .ualong 0x9a + .byte 0x2 + .byte 0x91 + .byte 0x0 + .byte 0x0 + .byte 0x4 + .string "unsigned int" + + .byte 0x4 + .byte 0x7 + .byte 0x0 + + .section .debug_abbrev + .byte 0x1 + .byte 0x11 + .byte 0x1 + .byte 0x10 + .byte 0x6 + .byte 0x12 + .byte 0x1 + .byte 0x11 + .byte 0x1 + .byte 0x3 + .byte 0x8 + .byte 0x1b + .byte 0x8 + .byte 0x25 + .byte 0x8 + .byte 0x13 + .byte 0xb + .byte 0,0 + .byte 0x2 + .byte 0x2e + .byte 0x1 + .byte 0x1 + .byte 0x13 + .byte 0x3f + .byte 0xc + .byte 0x3 + .byte 0x8 + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x27 + .byte 0xc + .byte 0x11 + .byte 0x1 + .byte 0x12 + .byte 0x1 + .byte 0x40 + .byte 0xa + .byte 0,0 + .byte 0x3 + .byte 0x5 + .byte 0x0 + .byte 0x3 + .byte 0x8 + .byte 0x3a + .byte 0xb + .byte 0x3b + .byte 0xb + .byte 0x49 + .byte 0x13 + .byte 0x2 + .byte 0xa + .byte 0,0 + .byte 0x4 + .byte 0x24 + .byte 0x0 + .byte 0x3 + .byte 0x8 + .byte 0xb + .byte 0xb + .byte 0x3e + .byte 0xb + .byte 0,0 + .byte 0 + + .section .debug_pubnames + .ualong 0x27 + .uaword 0x2 + .ualong .Ldebug_info0 + .ualong 0xab + .ualong 0x5b + .string "_superh_trap_handler" + + .ualong 0x0 + + .section .debug_aranges + .ualong 0x1c + .uaword 0x2 + .ualong .Ldebug_info0 + .byte 0x4 + .byte 0x0 + .uaword 0x0,0 + .ualong .Ltext0 + .ualong .Letext0-.Ltext0 + .ualong 0x0 + .ualong 0x0 + .ident "GCC: (GNU) 2.97-sh5-010522" +#endif /* MMU_SUPPORT */ +#else /* ! __SH5__ */ + + ! make a place to keep any previous value of the vbr register + ! this will only have a value if it has been set by redboot (for example) + .section .bss +old_vbr: + .long 0 +#ifdef PROFILE +profiling_enabled: + .long 0 +#endif + + + .section .text + .global start + .import ___rtos_profiler_start_timer + .weak ___rtos_profiler_start_timer +start: + mov.l stack_k,r15 + +#if defined (__SH3__) || (defined (__SH_FPU_ANY__) && ! defined (__SH2A__)) || defined (__SH4_NOFPU__) +#define VBR_SETUP + ! before zeroing the bss ... + ! if the vbr is already set to vbr_start then the program has been restarted + ! (i.e. it is not the first time the program has been run since reset) + ! reset the vbr to its old value before old_vbr (in bss) is wiped + ! this ensures that the later code does not create a circular vbr chain + stc vbr, r1 + mov.l vbr_start_k, r2 + cmp/eq r1, r2 + bf 0f + ! reset the old vbr value + mov.l old_vbr_k, r1 + mov.l @r1, r2 + ldc r2, vbr +0: +#endif /* VBR_SETUP */ + + ! zero out bss + mov.l edata_k,r0 + mov.l end_k,r1 + mov #0,r2 +start_l: + mov.l r2,@r0 + add #4,r0 + cmp/ge r0,r1 + bt start_l + +#if defined (__SH_FPU_ANY__) + mov.l set_fpscr_k, r1 + mov #4,r4 + jsr @r1 + shll16 r4 ! Set DN bit (flush denormal inputs to zero) + lds r3,fpscr ! Switch to default precision +#endif /* defined (__SH_FPU_ANY__) */ + +#ifdef VBR_SETUP + ! save the existing contents of the vbr + ! there will only be a prior value when using something like redboot + ! otherwise it will be zero + stc vbr, r1 + mov.l old_vbr_k, r2 + mov.l r1, @r2 + ! setup vbr + mov.l vbr_start_k, r1 + ldc r1,vbr +#endif /* VBR_SETUP */ + + ! if an rtos is exporting a timer start fn, + ! then pick up an SR which does not enable ints + ! (the rtos will take care of this) + mov.l rtos_start_fn, r0 + mov.l sr_initial_bare, r1 + tst r0, r0 + bt set_sr + + mov.l sr_initial_rtos, r1 + +set_sr: + ! Set status register (sr) + ldc r1, sr + + ! arrange for exit to call fini + mov.l atexit_k,r0 + mov.l fini_k,r4 + jsr @r0 + nop + +#ifdef PROFILE + ! arrange for exit to call _mcleanup (via stop_profiling) + mova stop_profiling,r0 + mov.l atexit_k,r1 + jsr @r1 + mov r0, r4 + + ! Call profiler startup code + mov.l monstartup_k, r0 + mov.l start_k, r4 + mov.l etext_k, r5 + jsr @r0 + nop + + ! enable profiling trap + ! until now any trap 33s will have been ignored + ! This means that all library functions called before this point + ! (directly or indirectly) may have the profiling trap at the start. + ! Therefore, only mcount itself may not have the extra header. + mov.l profiling_enabled_k2, r0 + mov #1, r1 + mov.l r1, @r0 +#endif /* PROFILE */ + + ! call init + mov.l init_k,r0 + jsr @r0 + nop + + ! call the mainline + mov.l main_k,r0 + jsr @r0 + nop + + ! call exit + mov r0,r4 + mov.l exit_k,r0 + jsr @r0 + nop + + .balign 4 +#ifdef PROFILE +stop_profiling: + # stop mcount counting + mov.l profiling_enabled_k2, r0 + mov #0, r1 + mov.l r1, @r0 + + # call mcleanup + mov.l mcleanup_k, r0 + jmp @r0 + nop + + .balign 4 +mcleanup_k: + .long __mcleanup +monstartup_k: + .long ___monstartup +profiling_enabled_k2: + .long profiling_enabled +start_k: + .long _start +etext_k: + .long __etext +#endif /* PROFILE */ + + .align 2 +#if defined (__SH_FPU_ANY__) +set_fpscr_k: + .long ___set_fpscr +#endif /* defined (__SH_FPU_ANY__) */ + +stack_k: + .long _stack +edata_k: + .long _edata +end_k: + .long _end +main_k: + .long ___setup_argv_and_call_main +exit_k: + .long _exit +atexit_k: + .long _atexit +init_k: + .long _init +fini_k: + .long _fini +#ifdef VBR_SETUP +old_vbr_k: + .long old_vbr +vbr_start_k: + .long vbr_start +#endif /* VBR_SETUP */ + +sr_initial_rtos: + ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work. + ! Whether profiling or not, keep interrupts masked, + ! the RTOS will enable these if required. + .long 0x600000f1 + +rtos_start_fn: + .long ___rtos_profiler_start_timer + +#ifdef PROFILE +sr_initial_bare: + ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work. + ! For bare machine, we need to enable interrupts to get profiling working + .long 0x60000001 +#else + +sr_initial_bare: + ! Privileged mode RB 1 BL 0. Keep BL 0 to allow default trap handlers to work. + ! Keep interrupts disabled - the application will enable as required. + .long 0x600000f1 +#endif + + ! supplied for backward compatibility only, in case of linking + ! code whose main() was compiled with an older version of GCC. + .global ___main +___main: + rts + nop +#ifdef VBR_SETUP +! Exception handlers + .section .text.vbr, "ax" +vbr_start: + + .org 0x100 +vbr_100: +#ifdef PROFILE + ! Note on register usage. + ! we use r0..r3 as scratch in this code. If we are here due to a trapa for profiling + ! then this is OK as we are just before executing any function code. + ! The other r4..r7 we save explicityl on the stack + ! Remaining registers are saved by normal ABI conventions and we assert we do not + ! use floating point registers. + mov.l expevt_k1, r1 + mov.l @r1, r1 + mov.l event_mask, r0 + and r0,r1 + mov.l trapcode_k, r2 + cmp/eq r1,r2 + bt 1f + bra handler_100 ! if not a trapa, go to default handler + nop +1: + mov.l trapa_k, r0 + mov.l @r0, r0 + shlr2 r0 ! trapa code is shifted by 2. + cmp/eq #33, r0 + bt 2f + bra handler_100 + nop +2: + + ! If here then it looks like we have trap #33 + ! Now we need to call mcount with the following convention + ! Save and restore r4..r7 + mov.l r4,@-r15 + mov.l r5,@-r15 + mov.l r6,@-r15 + mov.l r7,@-r15 + sts.l pr,@-r15 + + ! r4 is frompc. + ! r5 is selfpc + ! r0 is the branch back address. + ! The code sequence emitted by gcc for the profiling trap is + ! .align 2 + ! trapa #33 + ! .align 2 + ! .long lab Where lab is planted by the compiler. This is the address + ! of a datum that needs to be incremented. + sts pr, r4 ! frompc + stc spc, r5 ! selfpc + mov #2, r2 + not r2, r2 ! pattern to align to 4 + and r2, r5 ! r5 now has aligned address +! add #4, r5 ! r5 now has address of address + mov r5, r2 ! Remember it. +! mov.l @r5, r5 ! r5 has value of lable (lab in above example) + add #8, r2 + ldc r2, spc ! our return address avoiding address word + + ! only call mcount if profiling is enabled + mov.l profiling_enabled_k, r0 + mov.l @r0, r0 + cmp/eq #0, r0 + bt 3f + ! call mcount + mov.l mcount_k, r2 + jsr @r2 + nop +3: + lds.l @r15+,pr + mov.l @r15+,r7 + mov.l @r15+,r6 + mov.l @r15+,r5 + mov.l @r15+,r4 + rte + nop + .balign 4 +event_mask: + .long 0xfff +trapcode_k: + .long 0x160 +expevt_k1: + .long 0xff000024 ! Address of expevt +trapa_k: + .long 0xff000020 +mcount_k: + .long __call_mcount +profiling_enabled_k: + .long profiling_enabled +#endif + ! Non profiling case. +handler_100: + mov.l 2f, r0 ! load the old vbr setting (if any) + mov.l @r0, r0 + cmp/eq #0, r0 + bf 1f + ! no previous vbr - jump to own generic handler + bra handler + nop +1: ! there was a previous handler - chain them + add #0x7f, r0 ! 0x7f + add #0x7f, r0 ! 0xfe + add #0x2, r0 ! add 0x100 without corrupting another register + jmp @r0 + nop + .balign 4 +2: + .long old_vbr + + .org 0x400 +vbr_400: ! Should be at vbr+0x400 + mov.l 2f, r0 ! load the old vbr setting (if any) + mov.l @r0, r0 + cmp/eq #0, r0 + ! no previous vbr - jump to own generic handler + bt handler + ! there was a previous handler - chain them + rotcr r0 + rotcr r0 + add #0x7f, r0 ! 0x1fc + add #0x7f, r0 ! 0x3f8 + add #0x02, r0 ! 0x400 + rotcl r0 + rotcl r0 ! Add 0x400 without corrupting another register + jmp @r0 + nop + .balign 4 +2: + .long old_vbr +handler: + /* If the trap handler is there call it */ + mov.l superh_trap_handler_k, r0 + cmp/eq #0, r0 ! True if zero. + bf 3f + bra chandler + nop +3: + ! Here handler available, call it. + /* Now call the trap handler with as much of the context unchanged as possible. + Move trapping address into PR to make it look like the trap point */ + stc spc, r1 + lds r1, pr + mov.l expevt_k, r4 + mov.l @r4, r4 ! r4 is value of expevt, first parameter. + mov r1, r5 ! Remember trapping pc. + mov r1, r6 ! Remember trapping pc. + mov.l chandler_k, r1 + mov.l superh_trap_handler_k, r2 + ! jmp to trap handler to avoid disturbing pr. + jmp @r2 + nop + + .org 0x600 +vbr_600: +#ifdef PROFILE + ! Should be at vbr+0x600 + ! Now we are in the land of interrupts so need to save more state. + ! Save register state + mov.l interrupt_stack_k, r15 ! r15 has been saved to sgr. + mov.l r0,@-r15 + mov.l r1,@-r15 + mov.l r2,@-r15 + mov.l r3,@-r15 + mov.l r4,@-r15 + mov.l r5,@-r15 + mov.l r6,@-r15 + mov.l r7,@-r15 + sts.l pr,@-r15 + sts.l mach,@-r15 + sts.l macl,@-r15 +#if defined(__SH_FPU_ANY__) + ! Save fpul and fpscr, save fr0-fr7 in 64 bit mode + ! and set the pervading precision for the timer_handler + mov #0,r0 + sts.l fpul,@-r15 + sts.l fpscr,@-r15 + lds r0,fpscr ! Clear fpscr + fmov fr0,@-r15 + fmov fr1,@-r15 + fmov fr2,@-r15 + fmov fr3,@-r15 + mov.l pervading_precision_k,r0 + fmov fr4,@-r15 + fmov fr5,@-r15 + mov.l @r0,r0 + fmov fr6,@-r15 + fmov fr7,@-r15 + lds r0,fpscr +#endif /* __SH_FPU_ANY__ */ + ! Pass interrupted pc to timer_handler as first parameter (r4). + stc spc, r4 + mov.l timer_handler_k, r0 + jsr @r0 + nop +#if defined(__SH_FPU_ANY__) + mov #0,r0 + lds r0,fpscr ! Clear the fpscr + fmov @r15+,fr7 + fmov @r15+,fr6 + fmov @r15+,fr5 + fmov @r15+,fr4 + fmov @r15+,fr3 + fmov @r15+,fr2 + fmov @r15+,fr1 + fmov @r15+,fr0 + lds.l @r15+,fpscr + lds.l @r15+,fpul +#endif /* __SH_FPU_ANY__ */ + lds.l @r15+,macl + lds.l @r15+,mach + lds.l @r15+,pr + mov.l @r15+,r7 + mov.l @r15+,r6 + mov.l @r15+,r5 + mov.l @r15+,r4 + mov.l @r15+,r3 + mov.l @r15+,r2 + mov.l @r15+,r1 + mov.l @r15+,r0 + stc sgr, r15 ! Restore r15, destroyed by this sequence. + rte + nop +#if defined(__SH_FPU_ANY__) + .balign 4 +pervading_precision_k: +#define CONCAT1(A,B) A##B +#define CONCAT(A,B) CONCAT1(A,B) + .long CONCAT(__USER_LABEL_PREFIX__,__fpscr_values)+4 +#endif +#else + mov.l 2f, r0 ! Load the old vbr setting (if any). + mov.l @r0, r0 + cmp/eq #0, r0 + ! no previous vbr - jump to own handler + bt chandler + ! there was a previous handler - chain them + rotcr r0 + rotcr r0 + add #0x7f, r0 ! 0x1fc + add #0x7f, r0 ! 0x3f8 + add #0x7f, r0 ! 0x5f4 + add #0x03, r0 ! 0x600 + rotcl r0 + rotcl r0 ! Add 0x600 without corrupting another register + jmp @r0 + nop + .balign 4 +2: + .long old_vbr +#endif /* PROFILE code */ +chandler: + mov.l expevt_k, r4 + mov.l @r4, r4 ! r4 is value of expevt hence making this the return code + mov.l handler_exit_k,r0 + jsr @r0 + nop + ! We should never return from _exit but in case we do we would enter the + ! the following tight loop +limbo: + bra limbo + nop + .balign 4 +#ifdef PROFILE +interrupt_stack_k: + .long __timer_stack ! The high end of the stack +timer_handler_k: + .long __profil_counter +#endif +expevt_k: + .long 0xff000024 ! Address of expevt +chandler_k: + .long chandler +superh_trap_handler_k: + .long __superh_trap_handler +handler_exit_k: + .long _exit + .align 2 +! Simulated compile of trap handler. + .section .debug_abbrev,"",@progbits +.Ldebug_abbrev0: + .section .debug_info,"",@progbits +.Ldebug_info0: + .section .debug_line,"",@progbits +.Ldebug_line0: + .text +.Ltext0: + .align 5 + .type __superh_trap_handler,@function +__superh_trap_handler: +.LFB1: + mov.l r14,@-r15 +.LCFI0: + add #-4,r15 +.LCFI1: + mov r15,r14 +.LCFI2: + mov.l r4,@r14 + lds r1, pr + add #4,r14 + mov r14,r15 + mov.l @r15+,r14 + rts + nop +.LFE1: +.Lfe1: + .size __superh_trap_handler,.Lfe1-__superh_trap_handler + .section .debug_frame,"",@progbits +.Lframe0: + .ualong .LECIE0-.LSCIE0 +.LSCIE0: + .ualong 0xffffffff + .byte 0x1 + .string "" + .uleb128 0x1 + .sleb128 -4 + .byte 0x11 + .byte 0xc + .uleb128 0xf + .uleb128 0x0 + .align 2 +.LECIE0: +.LSFDE0: + .ualong .LEFDE0-.LASFDE0 +.LASFDE0: + .ualong .Lframe0 + .ualong .LFB1 + .ualong .LFE1-.LFB1 + .byte 0x4 + .ualong .LCFI0-.LFB1 + .byte 0xe + .uleb128 0x4 + .byte 0x4 + .ualong .LCFI1-.LCFI0 + .byte 0xe + .uleb128 0x8 + .byte 0x8e + .uleb128 0x1 + .byte 0x4 + .ualong .LCFI2-.LCFI1 + .byte 0xd + .uleb128 0xe + .align 2 +.LEFDE0: + .text +.Letext0: + .section .debug_info + .ualong 0xb3 + .uaword 0x2 + .ualong .Ldebug_abbrev0 + .byte 0x4 + .uleb128 0x1 + .ualong .Ldebug_line0 + .ualong .Letext0 + .ualong .Ltext0 + .string "trap_handler.c" + .string "xxxxxxxxxxxxxxxxxxxxxxxxxxxx" + .string "GNU C 3.2 20020529 (experimental)" + .byte 0x1 + .uleb128 0x2 + .ualong 0xa6 + .byte 0x1 + .string "_superh_trap_handler" + .byte 0x1 + .byte 0x2 + .byte 0x1 + .ualong .LFB1 + .ualong .LFE1 + .byte 0x1 + .byte 0x5e + .uleb128 0x3 + .string "trap_reason" + .byte 0x1 + .byte 0x1 + .ualong 0xa6 + .byte 0x2 + .byte 0x91 + .sleb128 0 + .byte 0x0 + .uleb128 0x4 + .string "unsigned int" + .byte 0x4 + .byte 0x7 + .byte 0x0 + .section .debug_abbrev + .uleb128 0x1 + .uleb128 0x11 + .byte 0x1 + .uleb128 0x10 + .uleb128 0x6 + .uleb128 0x12 + .uleb128 0x1 + .uleb128 0x11 + .uleb128 0x1 + .uleb128 0x3 + .uleb128 0x8 + .uleb128 0x1b + .uleb128 0x8 + .uleb128 0x25 + .uleb128 0x8 + .uleb128 0x13 + .uleb128 0xb + .byte 0x0 + .byte 0x0 + .uleb128 0x2 + .uleb128 0x2e + .byte 0x1 + .uleb128 0x1 + .uleb128 0x13 + .uleb128 0x3f + .uleb128 0xc + .uleb128 0x3 + .uleb128 0x8 + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0xb + .uleb128 0x27 + .uleb128 0xc + .uleb128 0x11 + .uleb128 0x1 + .uleb128 0x12 + .uleb128 0x1 + .uleb128 0x40 + .uleb128 0xa + .byte 0x0 + .byte 0x0 + .uleb128 0x3 + .uleb128 0x5 + .byte 0x0 + .uleb128 0x3 + .uleb128 0x8 + .uleb128 0x3a + .uleb128 0xb + .uleb128 0x3b + .uleb128 0xb + .uleb128 0x49 + .uleb128 0x13 + .uleb128 0x2 + .uleb128 0xa + .byte 0x0 + .byte 0x0 + .uleb128 0x4 + .uleb128 0x24 + .byte 0x0 + .uleb128 0x3 + .uleb128 0x8 + .uleb128 0xb + .uleb128 0xb + .uleb128 0x3e + .uleb128 0xb + .byte 0x0 + .byte 0x0 + .byte 0x0 + .section .debug_pubnames,"",@progbits + .ualong 0x27 + .uaword 0x2 + .ualong .Ldebug_info0 + .ualong 0xb7 + .ualong 0x67 + .string "_superh_trap_handler" + .ualong 0x0 + .section .debug_aranges,"",@progbits + .ualong 0x1c + .uaword 0x2 + .ualong .Ldebug_info0 + .byte 0x4 + .byte 0x0 + .uaword 0x0 + .uaword 0x0 + .ualong .Ltext0 + .ualong .Letext0-.Ltext0 + .ualong 0x0 + .ualong 0x0 +#endif /* VBR_SETUP */ +#endif /* ! __SH5__ */ diff --git a/libgcc/config/sh/crti.S b/libgcc/config/sh/crti.S new file mode 100644 index 00000000000..a8e4f8bed22 --- /dev/null +++ b/libgcc/config/sh/crti.S @@ -0,0 +1,125 @@ +/* Copyright (C) 2000, 2001, 2009, 2011 Free Software Foundation, Inc. + This file was adapted from glibc sources. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + + +/* The code in sections .init and .fini is supposed to be a single + regular function. The function in .init is called directly from + start in crt1.S. The function in .fini is atexit()ed in crt1.S + too. + + crti.S contributes the prologue of a function to these sections, + and crtn.S comes up the epilogue. STARTFILE_SPEC should list + crti.o before any other object files that might add code to .init + or .fini sections, and ENDFILE_SPEC should list crtn.o after any + such object files. */ + + .section .init +/* The alignment below can't be smaller, otherwise the mova below + breaks. Yes, we might align just the label, but then we'd be + exchanging an alignment here for one there, since the code fragment + below ensures 4-byte alignment on __ELF__. */ +#ifdef __ELF__ + .p2align 2 +#else + .p2align 1 +#endif + .global _init +_init: +#if __SHMEDIA__ + addi r15, -16, r15 + st.q r15, 8, r14 + st.q r15, 0, r18 + add r15, r63, r14 +#elif __SH5__ && ! __SHMEDIA__ + mov r15,r0 + add #-8,r15 + mov.l r14,@-r0 + sts.l pr,@-r0 + mov r15,r14 + nop +#else +#ifdef __ELF__ + mov.l r12,@-r15 + mova 0f,r0 + mov.l 0f,r12 +#endif + mov.l r14,@-r15 +#ifdef __ELF__ + add r0,r12 +#endif + sts.l pr,@-r15 +#ifdef __ELF__ + bra 1f +#endif + mov r15,r14 +#ifdef __ELF__ +0: .long _GLOBAL_OFFSET_TABLE_ +1: +#endif +#endif /* __SHMEDIA__ */ + + .section .fini +/* The alignment below can't be smaller, otherwise the mova below + breaks. Yes, we might align just the label, but then we'd be + exchanging an alignment here for one there, since the code fragment + below ensures 4-byte alignment on __ELF__. */ +#ifdef __ELF__ + .p2align 2 +#else + .p2align 1 +#endif + .global _fini +_fini: +#if __SHMEDIA__ + addi r15, -16, r15 + st.q r15, 8, r14 + st.q r15, 0, r18 + add r15, r63, r14 +#elif __SH5__ && ! __SHMEDIA__ + mov r15,r0 + add #-8,r15 + mov.l r14,@-r0 + sts.l pr,@-r0 + mov r15,r14 + nop +#else +#ifdef __ELF__ + mov.l r12,@-r15 + mova 0f,r0 + mov.l 0f,r12 +#endif + mov.l r14,@-r15 +#ifdef __ELF__ + add r0,r12 +#endif + sts.l pr,@-r15 +#ifdef __ELF__ + bra 1f +#endif + mov r15,r14 +#ifdef __ELF__ +0: .long _GLOBAL_OFFSET_TABLE_ +1: +#endif +#endif /* __SHMEDIA__ */ diff --git a/libgcc/config/sh/crtn.S b/libgcc/config/sh/crtn.S new file mode 100644 index 00000000000..d2f58c01b1b --- /dev/null +++ b/libgcc/config/sh/crtn.S @@ -0,0 +1,77 @@ +/* Copyright (C) 2000, 2001, 2009, 2011 Free Software Foundation, Inc. + This file was adapted from glibc sources. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* See an explanation about .init and .fini in crti.S. */ + + .section .init +#if __SHMEDIA__ + add r14, r63, r15 + ld.q r15, 0, r18 + ptabs r18, tr0 + ld.q r15, 8, r14 + addi r15, 16, r15 + blink tr0, r63 +#elif __SH5__ && ! __SHMEDIA__ + mov r14,r15 + lds.l @r14+,pr + mov.l @r14,r14 + rts + add #8,r15 +#else + mov r14,r15 + lds.l @r15+,pr + mov.l @r15+,r14 + rts +#ifdef __ELF__ + mov.l @r15+,r12 +#else + nop +#endif +#endif /* __SHMEDIA__ */ + + .section .fini +#if __SHMEDIA__ + add r14, r63, r15 + ld.q r15, 0, r18 + ptabs r18, tr0 + ld.q r15, 8, r14 + addi r15, 16, r15 + blink tr0, r63 +#elif __SH5__ && ! __SHMEDIA__ + mov r14,r15 + lds.l @r14+,pr + mov.l @r14,r14 + rts + add #8,r15 +#else + mov r14,r15 + lds.l @r15+,pr + mov.l @r15+,r14 + rts +#ifdef __ELF__ + mov.l @r15+,r12 +#else + nop +#endif +#endif /* __SHMEDIA__ */ diff --git a/libgcc/config/sh/lib1funcs-4-300.S b/libgcc/config/sh/lib1funcs-4-300.S new file mode 100644 index 00000000000..b131877f121 --- /dev/null +++ b/libgcc/config/sh/lib1funcs-4-300.S @@ -0,0 +1,936 @@ +/* Copyright (C) 2004, 2006, 2009 Free Software Foundation, Inc. + +This file is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This file is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + + +/* libgcc routines for the STMicroelectronics ST40-300 CPU. + Contributed by J"orn Rennecke joern.rennecke@st.com. */ + +#include "lib1funcs.h" + +#if !__SHMEDIA__ +#ifdef L_div_table +#if defined (__SH3__) || defined (__SH3E__) || defined (__SH4__) || defined (__SH4_SINGLE__) || defined (__SH4_SINGLE_ONLY__) || defined (__SH4_NOFPU__) +/* This code used shld, thus is not suitable for SH1 / SH2. */ + +/* Signed / unsigned division without use of FPU, optimized for SH4-300. + Uses a lookup table for divisors in the range -128 .. +127, and + div1 with case distinction for larger divisors in three more ranges. + The code is lumped together with the table to allow the use of mova. */ +#ifdef __LITTLE_ENDIAN__ +#define L_LSB 0 +#define L_LSWMSB 1 +#define L_MSWLSB 2 +#else +#define L_LSB 3 +#define L_LSWMSB 2 +#define L_MSWLSB 1 +#endif + + .global GLOBAL(udivsi3_i4i) + .global GLOBAL(sdivsi3_i4i) + FUNC(GLOBAL(udivsi3_i4i)) + FUNC(GLOBAL(sdivsi3_i4i)) + + .balign 4 +LOCAL(div_ge8m): ! 10 cycles up to here + rotcr r1 ! signed shift must use original sign from r4 + div0s r5,r4 + mov #24,r7 + shld r7,r6 + shad r0,r1 + rotcl r6 + div1 r5,r1 + swap.w r5,r0 ! detect -0x80000000 : 0x800000 + rotcl r6 + swap.w r4,r7 + div1 r5,r1 + swap.b r7,r7 + rotcl r6 + or r7,r0 + div1 r5,r1 + swap.w r0,r7 + rotcl r6 + or r7,r0 + div1 r5,r1 + add #-0x80,r0 + rotcl r6 + extu.w r0,r0 + div1 r5,r1 + neg r0,r0 + rotcl r6 + swap.w r0,r0 + div1 r5,r1 + mov.l @r15+,r7 + and r6,r0 + rotcl r6 + div1 r5,r1 + shll2 r0 + rotcl r6 + exts.b r0,r0 + div1 r5,r1 + swap.w r0,r0 + exts.w r0,r1 + exts.b r6,r0 + mov.l @r15+,r6 + rotcl r0 + rts + sub r1,r0 + ! 31 cycles up to here + + .balign 4 +LOCAL(udiv_ge64k): ! 3 cycles up to here + mov r4,r0 + shlr8 r0 + div0u + cmp/hi r0,r5 + bt LOCAL(udiv_r8) + mov.l r5,@-r15 + shll8 r5 + ! 7 cycles up to here + .rept 8 + div1 r5,r0 + .endr + extu.b r4,r1 ! 15 cycles up to here + extu.b r0,r6 + xor r1,r0 + xor r6,r0 + swap.b r6,r6 + .rept 8 + div1 r5,r0 + .endr ! 25 cycles up to here + extu.b r0,r0 + mov.l @r15+,r5 + or r6,r0 + mov.l @r15+,r6 + rts + rotcl r0 ! 28 cycles up to here + + .balign 4 +LOCAL(udiv_r8): ! 6 cycles up to here + mov.l r4,@-r15 + shll16 r4 + shll8 r4 + ! + shll r4 + mov r0,r1 + div1 r5,r1 + mov r4,r0 + rotcl r0 + mov.l @r15+,r4 + div1 r5,r1 + ! 12 cycles up to here + .rept 6 + rotcl r0; div1 r5,r1 + .endr + mov.l @r15+,r6 ! 24 cycles up to here + rts + rotcl r0 + + .balign 4 +LOCAL(div_ge32k): ! 6 cycles up to here + mov.l r7,@-r15 + swap.w r5,r6 + exts.b r6,r7 + exts.w r6,r6 + cmp/eq r6,r7 + extu.b r1,r6 + bf/s LOCAL(div_ge8m) + cmp/hi r1,r4 ! copy sign bit of r4 into T + rotcr r1 ! signed shift must use original sign from r4 + div0s r5,r4 + shad r0,r1 + shll8 r5 + div1 r5,r1 + mov r5,r7 ! detect r4 == 0x80000000 && r5 == 0x8000(00) + div1 r5,r1 + shlr8 r7 + div1 r5,r1 + swap.w r4,r0 + div1 r5,r1 + swap.b r0,r0 + div1 r5,r1 + or r0,r7 + div1 r5,r1 + add #-80,r7 + div1 r5,r1 + swap.w r7,r0 + div1 r5,r1 + or r0,r7 + extu.b r1,r0 + xor r6,r1 + xor r0,r1 + exts.b r0,r0 + div1 r5,r1 + extu.w r7,r7 + div1 r5,r1 + neg r7,r7 ! upper 16 bit of r7 == 0 if r4 == 0x80000000 && r5 == 0x8000 + div1 r5,r1 + and r0,r7 + div1 r5,r1 + swap.w r7,r7 ! 26 cycles up to here. + div1 r5,r1 + shll8 r0 + div1 r5,r1 + exts.w r7,r7 + div1 r5,r1 + add r0,r0 + div1 r5,r1 + sub r7,r0 + extu.b r1,r1 + mov.l @r15+,r7 + rotcl r1 + mov.l @r15+,r6 + add r1,r0 + mov #-8,r1 + rts + shad r1,r5 ! 34 cycles up to here + + .balign 4 +GLOBAL(udivsi3_i4i): + mov.l r6,@-r15 + extu.w r5,r6 + cmp/eq r5,r6 + mov #0x7f,r0 + bf LOCAL(udiv_ge64k) + cmp/hi r0,r5 + bf LOCAL(udiv_le128) + mov r4,r1 + shlr8 r1 + div0u + shlr r1 + shll16 r6 + div1 r6,r1 + extu.b r4,r0 ! 7 cycles up to here + .rept 8 + div1 r6,r1 + .endr ! 15 cycles up to here + xor r1,r0 ! xor dividend with result lsb + .rept 6 + div1 r6,r1 + .endr + mov.l r7,@-r15 ! 21 cycles up to here + div1 r6,r1 + extu.b r0,r7 + div1 r6,r1 + shll8 r7 + extu.w r1,r0 + xor r7,r1 ! replace lsb of result with lsb of dividend + div1 r6,r1 + mov #0,r7 + div1 r6,r1 + ! + div1 r6,r1 + bra LOCAL(div_end) + div1 r6,r1 ! 28 cycles up to here + + /* This is link-compatible with a GLOBAL(sdivsi3) call, + but we effectively clobber only r1, macl and mach */ + /* Because negative quotients are calculated as one's complements, + -0x80000000 divided by the smallest positive number of a number + range (0x80, 0x8000, 0x800000) causes saturation in the one's + complement representation, and we have to suppress the + one's -> two's complement adjustment. Since positive numbers + don't get such an adjustment, it's OK to also compute one's -> two's + complement adjustment suppression for a dividend of 0. */ + .balign 4 +GLOBAL(sdivsi3_i4i): + mov.l r6,@-r15 + exts.b r5,r6 + cmp/eq r5,r6 + mov #-1,r1 + bt/s LOCAL(div_le128) + cmp/pz r4 + addc r4,r1 + exts.w r5,r6 + cmp/eq r5,r6 + mov #-7,r0 + bf/s LOCAL(div_ge32k) + cmp/hi r1,r4 ! copy sign bit of r4 into T + rotcr r1 + shll16 r6 ! 7 cycles up to here + shad r0,r1 + div0s r5,r4 + div1 r6,r1 + mov.l r7,@-r15 + div1 r6,r1 + mov r4,r0 ! re-compute adjusted dividend + div1 r6,r1 + mov #-31,r7 + div1 r6,r1 + shad r7,r0 + div1 r6,r1 + add r4,r0 ! adjusted dividend + div1 r6,r1 + mov.l r8,@-r15 + div1 r6,r1 + swap.w r4,r8 ! detect special case r4 = 0x80000000, r5 = 0x80 + div1 r6,r1 + swap.b r8,r8 + xor r1,r0 ! xor dividend with result lsb + div1 r6,r1 + div1 r6,r1 + or r5,r8 + div1 r6,r1 + add #-0x80,r8 ! r8 is 0 iff there is a match + div1 r6,r1 + swap.w r8,r7 ! or upper 16 bits... + div1 r6,r1 + or r7,r8 !...into lower 16 bits + div1 r6,r1 + extu.w r8,r8 + div1 r6,r1 + extu.b r0,r7 + div1 r6,r1 + shll8 r7 + exts.w r1,r0 + xor r7,r1 ! replace lsb of result with lsb of dividend + div1 r6,r1 + neg r8,r8 ! upper 16 bits of r8 are now 0xffff iff we want end adjm. + div1 r6,r1 + and r0,r8 + div1 r6,r1 + swap.w r8,r7 + div1 r6,r1 + mov.l @r15+,r8 ! 58 insns, 29 cycles up to here +LOCAL(div_end): + div1 r6,r1 + shll8 r0 + div1 r6,r1 + exts.w r7,r7 + div1 r6,r1 + add r0,r0 + div1 r6,r1 + sub r7,r0 + extu.b r1,r1 + mov.l @r15+,r7 + rotcl r1 + mov.l @r15+,r6 + rts + add r1,r0 + + .balign 4 +LOCAL(udiv_le128): ! 4 cycles up to here (or 7 for mispredict) + mova LOCAL(div_table_inv),r0 + shll2 r6 + mov.l @(r0,r6),r1 + mova LOCAL(div_table_clz),r0 + lds r4,mach + ! + ! + ! + tst r1,r1 + ! + bt 0f + dmulu.l r1,r4 +0: mov.b @(r0,r5),r1 + clrt + ! + ! + sts mach,r0 + addc r4,r0 + rotcr r0 + mov.l @r15+,r6 + rts + shld r1,r0 + + .balign 4 +LOCAL(div_le128): ! 3 cycles up to here (or 6 for mispredict) + mova LOCAL(div_table_inv),r0 + shll2 r6 + mov.l @(r0,r6),r1 + mova LOCAL(div_table_clz),r0 + neg r4,r6 + bf 0f + mov r4,r6 +0: lds r6,mach + tst r1,r1 + bt 0f + dmulu.l r1,r6 +0: div0s r4,r5 + mov.b @(r0,r5),r1 + bt/s LOCAL(le128_neg) + clrt + ! + sts mach,r0 + addc r6,r0 + rotcr r0 + mov.l @r15+,r6 + rts + shld r1,r0 + +/* Could trap divide by zero for the cost of one cycle more mispredict penalty: +... + dmulu.l r1,r6 +0: div0s r4,r5 + bt/s LOCAL(le128_neg) + tst r5,r5 + bt LOCAL(div_by_zero) + mov.b @(r0,r5),r1 + sts mach,r0 + addc r6,r0 +... +LOCAL(div_by_zero): + trapa # + .balign 4 +LOCAL(le128_neg): + bt LOCAL(div_by_zero) + mov.b @(r0,r5),r1 + sts mach,r0 + addc r6,r0 +... */ + + .balign 4 +LOCAL(le128_neg): + sts mach,r0 + addc r6,r0 + rotcr r0 + mov.l @r15+,r6 + shad r1,r0 + rts + neg r0,r0 + ENDFUNC(GLOBAL(udivsi3_i4i)) + ENDFUNC(GLOBAL(sdivsi3_i4i)) + +/* This table has been generated by divtab-sh4.c. */ + .balign 4 + .byte -7 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -3 + .byte -3 + .byte -3 + .byte -3 + .byte -3 + .byte -3 + .byte -3 + .byte -3 + .byte -2 + .byte -2 + .byte -2 + .byte -2 + .byte -1 + .byte -1 + .byte 0 +LOCAL(div_table_clz): + .byte 0 + .byte 0 + .byte -1 + .byte -1 + .byte -2 + .byte -2 + .byte -2 + .byte -2 + .byte -3 + .byte -3 + .byte -3 + .byte -3 + .byte -3 + .byte -3 + .byte -3 + .byte -3 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -4 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -5 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 + .byte -6 +/* 1/-128 .. 1/127, normalized. There is an implicit leading 1 in bit 32, + or in bit 33 for powers of two. */ + .balign 4 + .long 0x0 + .long 0x2040811 + .long 0x4104105 + .long 0x624DD30 + .long 0x8421085 + .long 0xA6810A7 + .long 0xC9714FC + .long 0xECF56BF + .long 0x11111112 + .long 0x135C8114 + .long 0x15B1E5F8 + .long 0x18118119 + .long 0x1A7B9612 + .long 0x1CF06ADB + .long 0x1F7047DD + .long 0x21FB7813 + .long 0x24924925 + .long 0x27350B89 + .long 0x29E4129F + .long 0x2C9FB4D9 + .long 0x2F684BDB + .long 0x323E34A3 + .long 0x3521CFB3 + .long 0x38138139 + .long 0x3B13B13C + .long 0x3E22CBCF + .long 0x41414142 + .long 0x446F8657 + .long 0x47AE147B + .long 0x4AFD6A06 + .long 0x4E5E0A73 + .long 0x51D07EAF + .long 0x55555556 + .long 0x58ED2309 + .long 0x5C9882BA + .long 0x60581606 + .long 0x642C8591 + .long 0x68168169 + .long 0x6C16C16D + .long 0x702E05C1 + .long 0x745D1746 + .long 0x78A4C818 + .long 0x7D05F418 + .long 0x81818182 + .long 0x86186187 + .long 0x8ACB90F7 + .long 0x8F9C18FA + .long 0x948B0FCE + .long 0x9999999A + .long 0x9EC8E952 + .long 0xA41A41A5 + .long 0xA98EF607 + .long 0xAF286BCB + .long 0xB4E81B4F + .long 0xBACF914D + .long 0xC0E07039 + .long 0xC71C71C8 + .long 0xCD856891 + .long 0xD41D41D5 + .long 0xDAE6076C + .long 0xE1E1E1E2 + .long 0xE9131AC0 + .long 0xF07C1F08 + .long 0xF81F81F9 + .long 0x0 + .long 0x4104105 + .long 0x8421085 + .long 0xC9714FC + .long 0x11111112 + .long 0x15B1E5F8 + .long 0x1A7B9612 + .long 0x1F7047DD + .long 0x24924925 + .long 0x29E4129F + .long 0x2F684BDB + .long 0x3521CFB3 + .long 0x3B13B13C + .long 0x41414142 + .long 0x47AE147B + .long 0x4E5E0A73 + .long 0x55555556 + .long 0x5C9882BA + .long 0x642C8591 + .long 0x6C16C16D + .long 0x745D1746 + .long 0x7D05F418 + .long 0x86186187 + .long 0x8F9C18FA + .long 0x9999999A + .long 0xA41A41A5 + .long 0xAF286BCB + .long 0xBACF914D + .long 0xC71C71C8 + .long 0xD41D41D5 + .long 0xE1E1E1E2 + .long 0xF07C1F08 + .long 0x0 + .long 0x8421085 + .long 0x11111112 + .long 0x1A7B9612 + .long 0x24924925 + .long 0x2F684BDB + .long 0x3B13B13C + .long 0x47AE147B + .long 0x55555556 + .long 0x642C8591 + .long 0x745D1746 + .long 0x86186187 + .long 0x9999999A + .long 0xAF286BCB + .long 0xC71C71C8 + .long 0xE1E1E1E2 + .long 0x0 + .long 0x11111112 + .long 0x24924925 + .long 0x3B13B13C + .long 0x55555556 + .long 0x745D1746 + .long 0x9999999A + .long 0xC71C71C8 + .long 0x0 + .long 0x24924925 + .long 0x55555556 + .long 0x9999999A + .long 0x0 + .long 0x55555556 + .long 0x0 + .long 0x0 +LOCAL(div_table_inv): + .long 0x0 + .long 0x0 + .long 0x0 + .long 0x55555556 + .long 0x0 + .long 0x9999999A + .long 0x55555556 + .long 0x24924925 + .long 0x0 + .long 0xC71C71C8 + .long 0x9999999A + .long 0x745D1746 + .long 0x55555556 + .long 0x3B13B13C + .long 0x24924925 + .long 0x11111112 + .long 0x0 + .long 0xE1E1E1E2 + .long 0xC71C71C8 + .long 0xAF286BCB + .long 0x9999999A + .long 0x86186187 + .long 0x745D1746 + .long 0x642C8591 + .long 0x55555556 + .long 0x47AE147B + .long 0x3B13B13C + .long 0x2F684BDB + .long 0x24924925 + .long 0x1A7B9612 + .long 0x11111112 + .long 0x8421085 + .long 0x0 + .long 0xF07C1F08 + .long 0xE1E1E1E2 + .long 0xD41D41D5 + .long 0xC71C71C8 + .long 0xBACF914D + .long 0xAF286BCB + .long 0xA41A41A5 + .long 0x9999999A + .long 0x8F9C18FA + .long 0x86186187 + .long 0x7D05F418 + .long 0x745D1746 + .long 0x6C16C16D + .long 0x642C8591 + .long 0x5C9882BA + .long 0x55555556 + .long 0x4E5E0A73 + .long 0x47AE147B + .long 0x41414142 + .long 0x3B13B13C + .long 0x3521CFB3 + .long 0x2F684BDB + .long 0x29E4129F + .long 0x24924925 + .long 0x1F7047DD + .long 0x1A7B9612 + .long 0x15B1E5F8 + .long 0x11111112 + .long 0xC9714FC + .long 0x8421085 + .long 0x4104105 + .long 0x0 + .long 0xF81F81F9 + .long 0xF07C1F08 + .long 0xE9131AC0 + .long 0xE1E1E1E2 + .long 0xDAE6076C + .long 0xD41D41D5 + .long 0xCD856891 + .long 0xC71C71C8 + .long 0xC0E07039 + .long 0xBACF914D + .long 0xB4E81B4F + .long 0xAF286BCB + .long 0xA98EF607 + .long 0xA41A41A5 + .long 0x9EC8E952 + .long 0x9999999A + .long 0x948B0FCE + .long 0x8F9C18FA + .long 0x8ACB90F7 + .long 0x86186187 + .long 0x81818182 + .long 0x7D05F418 + .long 0x78A4C818 + .long 0x745D1746 + .long 0x702E05C1 + .long 0x6C16C16D + .long 0x68168169 + .long 0x642C8591 + .long 0x60581606 + .long 0x5C9882BA + .long 0x58ED2309 + .long 0x55555556 + .long 0x51D07EAF + .long 0x4E5E0A73 + .long 0x4AFD6A06 + .long 0x47AE147B + .long 0x446F8657 + .long 0x41414142 + .long 0x3E22CBCF + .long 0x3B13B13C + .long 0x38138139 + .long 0x3521CFB3 + .long 0x323E34A3 + .long 0x2F684BDB + .long 0x2C9FB4D9 + .long 0x29E4129F + .long 0x27350B89 + .long 0x24924925 + .long 0x21FB7813 + .long 0x1F7047DD + .long 0x1CF06ADB + .long 0x1A7B9612 + .long 0x18118119 + .long 0x15B1E5F8 + .long 0x135C8114 + .long 0x11111112 + .long 0xECF56BF + .long 0xC9714FC + .long 0xA6810A7 + .long 0x8421085 + .long 0x624DD30 + .long 0x4104105 + .long 0x2040811 + /* maximum error: 0.987342 scaled: 0.921875*/ + +#endif /* SH3 / SH4 */ + +#endif /* L_div_table */ +#endif /* !__SHMEDIA__ */ diff --git a/libgcc/config/sh/lib1funcs-Os-4-200.S b/libgcc/config/sh/lib1funcs-Os-4-200.S new file mode 100644 index 00000000000..aae57ccd36c --- /dev/null +++ b/libgcc/config/sh/lib1funcs-Os-4-200.S @@ -0,0 +1,322 @@ +/* Copyright (C) 2006, 2009 Free Software Foundation, Inc. + +This file is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This file is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +/* Moderately Space-optimized libgcc routines for the Renesas SH / + STMicroelectronics ST40 CPUs. + Contributed by J"orn Rennecke joern.rennecke@st.com. */ + +#include "lib1funcs.h" + +#if !__SHMEDIA__ +#ifdef L_udivsi3_i4i + +/* 88 bytes; sh4-200 cycle counts: + divisor >= 2G: 11 cycles + dividend < 2G: 48 cycles + dividend >= 2G: divisor != 1: 54 cycles + dividend >= 2G, divisor == 1: 22 cycles */ +#if defined (__SH_FPU_DOUBLE__) || defined (__SH4_SINGLE_ONLY__) +!! args in r4 and r5, result in r0, clobber r1 + + .global GLOBAL(udivsi3_i4i) + FUNC(GLOBAL(udivsi3_i4i)) +GLOBAL(udivsi3_i4i): + mova L1,r0 + cmp/pz r5 + sts fpscr,r1 + lds.l @r0+,fpscr + sts.l fpul,@-r15 + bf LOCAL(huge_divisor) + mov.l r1,@-r15 + lds r4,fpul + cmp/pz r4 +#ifdef FMOVD_WORKS + fmov.d dr0,@-r15 + float fpul,dr0 + fmov.d dr2,@-r15 + bt LOCAL(dividend_adjusted) + mov #1,r1 + fmov.d @r0,dr2 + cmp/eq r1,r5 + bt LOCAL(div_by_1) + fadd dr2,dr0 +LOCAL(dividend_adjusted): + lds r5,fpul + float fpul,dr2 + fdiv dr2,dr0 +LOCAL(div_by_1): + fmov.d @r15+,dr2 + ftrc dr0,fpul + fmov.d @r15+,dr0 +#else /* !FMOVD_WORKS */ + fmov.s DR01,@-r15 + mov #1,r1 + fmov.s DR00,@-r15 + float fpul,dr0 + fmov.s DR21,@-r15 + bt/s LOCAL(dividend_adjusted) + fmov.s DR20,@-r15 + cmp/eq r1,r5 + bt LOCAL(div_by_1) + fmov.s @r0+,DR20 + fmov.s @r0,DR21 + fadd dr2,dr0 +LOCAL(dividend_adjusted): + lds r5,fpul + float fpul,dr2 + fdiv dr2,dr0 +LOCAL(div_by_1): + fmov.s @r15+,DR20 + fmov.s @r15+,DR21 + ftrc dr0,fpul + fmov.s @r15+,DR00 + fmov.s @r15+,DR01 +#endif /* !FMOVD_WORKS */ + lds.l @r15+,fpscr + sts fpul,r0 + rts + lds.l @r15+,fpul + +#ifdef FMOVD_WORKS + .p2align 3 ! make double below 8 byte aligned. +#endif +LOCAL(huge_divisor): + lds r1,fpscr + add #4,r15 + cmp/hs r5,r4 + rts + movt r0 + + .p2align 2 +L1: +#ifndef FMOVD_WORKS + .long 0x80000 +#else + .long 0x180000 +#endif + .double 4294967296 + + ENDFUNC(GLOBAL(udivsi3_i4i)) +#elif !defined (__sh1__) /* !__SH_FPU_DOUBLE__ */ + +#if 0 +/* With 36 bytes, the following would probably be the most compact + implementation, but with 139 cycles on an sh4-200, it is extremely slow. */ +GLOBAL(udivsi3_i4i): + mov.l r2,@-r15 + mov #0,r1 + div0u + mov r1,r2 + mov.l r3,@-r15 + mov r1,r3 + sett + mov r4,r0 +LOCAL(loop): + rotcr r2 + ; + bt/s LOCAL(end) + cmp/gt r2,r3 + rotcl r0 + bra LOCAL(loop) + div1 r5,r1 +LOCAL(end): + rotcl r0 + mov.l @r15+,r3 + rts + mov.l @r15+,r2 +#endif /* 0 */ + +/* Size: 186 bytes jointly for udivsi3_i4i and sdivsi3_i4i + sh4-200 run times: + udiv small divisor: 55 cycles + udiv large divisor: 52 cycles + sdiv small divisor, positive result: 59 cycles + sdiv large divisor, positive result: 56 cycles + sdiv small divisor, negative result: 65 cycles (*) + sdiv large divisor, negative result: 62 cycles (*) + (*): r2 is restored in the rts delay slot and has a lingering latency + of two more cycles. */ + .balign 4 + .global GLOBAL(udivsi3_i4i) + FUNC(GLOBAL(udivsi3_i4i)) + FUNC(GLOBAL(sdivsi3_i4i)) +GLOBAL(udivsi3_i4i): + sts pr,r1 + mov.l r4,@-r15 + extu.w r5,r0 + cmp/eq r5,r0 + swap.w r4,r0 + shlr16 r4 + bf/s LOCAL(large_divisor) + div0u + mov.l r5,@-r15 + shll16 r5 +LOCAL(sdiv_small_divisor): + div1 r5,r4 + bsr LOCAL(div6) + div1 r5,r4 + div1 r5,r4 + bsr LOCAL(div6) + div1 r5,r4 + xtrct r4,r0 + xtrct r0,r4 + bsr LOCAL(div7) + swap.w r4,r4 + div1 r5,r4 + bsr LOCAL(div7) + div1 r5,r4 + xtrct r4,r0 + mov.l @r15+,r5 + swap.w r0,r0 + mov.l @r15+,r4 + jmp @r1 + rotcl r0 +LOCAL(div7): + div1 r5,r4 +LOCAL(div6): + div1 r5,r4; div1 r5,r4; div1 r5,r4 + div1 r5,r4; div1 r5,r4; rts; div1 r5,r4 + +LOCAL(divx3): + rotcl r0 + div1 r5,r4 + rotcl r0 + div1 r5,r4 + rotcl r0 + rts + div1 r5,r4 + +LOCAL(large_divisor): + mov.l r5,@-r15 +LOCAL(sdiv_large_divisor): + xor r4,r0 + .rept 4 + rotcl r0 + bsr LOCAL(divx3) + div1 r5,r4 + .endr + mov.l @r15+,r5 + mov.l @r15+,r4 + jmp @r1 + rotcl r0 + ENDFUNC(GLOBAL(udivsi3_i4i)) + + .global GLOBAL(sdivsi3_i4i) +GLOBAL(sdivsi3_i4i): + mov.l r4,@-r15 + cmp/pz r5 + mov.l r5,@-r15 + bt/s LOCAL(pos_divisor) + cmp/pz r4 + neg r5,r5 + extu.w r5,r0 + bt/s LOCAL(neg_result) + cmp/eq r5,r0 + neg r4,r4 +LOCAL(pos_result): + swap.w r4,r0 + bra LOCAL(sdiv_check_divisor) + sts pr,r1 +LOCAL(pos_divisor): + extu.w r5,r0 + bt/s LOCAL(pos_result) + cmp/eq r5,r0 + neg r4,r4 +LOCAL(neg_result): + mova LOCAL(negate_result),r0 + ; + mov r0,r1 + swap.w r4,r0 + lds r2,macl + sts pr,r2 +LOCAL(sdiv_check_divisor): + shlr16 r4 + bf/s LOCAL(sdiv_large_divisor) + div0u + bra LOCAL(sdiv_small_divisor) + shll16 r5 + .balign 4 +LOCAL(negate_result): + neg r0,r0 + jmp @r2 + sts macl,r2 + ENDFUNC(GLOBAL(sdivsi3_i4i)) +#endif /* !__SH_FPU_DOUBLE__ */ +#endif /* L_udivsi3_i4i */ + +#ifdef L_sdivsi3_i4i +#if defined (__SH_FPU_DOUBLE__) || defined (__SH4_SINGLE_ONLY__) +/* 48 bytes, 45 cycles on sh4-200 */ +!! args in r4 and r5, result in r0, clobber r1 + + .global GLOBAL(sdivsi3_i4i) + FUNC(GLOBAL(sdivsi3_i4i)) +GLOBAL(sdivsi3_i4i): + sts.l fpscr,@-r15 + sts fpul,r1 + mova L1,r0 + lds.l @r0+,fpscr + lds r4,fpul +#ifdef FMOVD_WORKS + fmov.d dr0,@-r15 + float fpul,dr0 + lds r5,fpul + fmov.d dr2,@-r15 +#else + fmov.s DR01,@-r15 + fmov.s DR00,@-r15 + float fpul,dr0 + lds r5,fpul + fmov.s DR21,@-r15 + fmov.s DR20,@-r15 +#endif + float fpul,dr2 + fdiv dr2,dr0 +#ifdef FMOVD_WORKS + fmov.d @r15+,dr2 +#else + fmov.s @r15+,DR20 + fmov.s @r15+,DR21 +#endif + ftrc dr0,fpul +#ifdef FMOVD_WORKS + fmov.d @r15+,dr0 +#else + fmov.s @r15+,DR00 + fmov.s @r15+,DR01 +#endif + lds.l @r15+,fpscr + sts fpul,r0 + rts + lds r1,fpul + + .p2align 2 +L1: +#ifndef FMOVD_WORKS + .long 0x80000 +#else + .long 0x180000 +#endif + + ENDFUNC(GLOBAL(sdivsi3_i4i)) +#endif /* __SH_FPU_DOUBLE__ */ +#endif /* L_sdivsi3_i4i */ +#endif /* !__SHMEDIA__ */ diff --git a/libgcc/config/sh/t-sh b/libgcc/config/sh/t-sh new file mode 100644 index 00000000000..ab4d98089b1 --- /dev/null +++ b/libgcc/config/sh/t-sh @@ -0,0 +1,53 @@ +# Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004, 2006, 2008, 2009, 2011 Free Software Foundation, Inc. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + +crt1.o: $(srcdir)/config/sh/crt1.S + $(gcc_compile) -c $< + +ic_invalidate_array_4-100.o: $(gcc_srcdir)/config/sh/lib1funcs.asm + $(gcc_compile) -c -DL_ic_invalidate_array -DWAYS=1 -DWAY_SIZE=0x2000 $< +libic_invalidate_array_4-100.a: ic_invalidate_array_4-100.o + $(AR_CREATE_FOR_TARGET) $@ $< + +ic_invalidate_array_4-200.o: $(gcc_srcdir)/config/sh/lib1funcs.asm + $(gcc_compile) -c -DL_ic_invalidate_array -DWAYS=2 -DWAY_SIZE=0x2000 $< +libic_invalidate_array_4-200.a: ic_invalidate_array_4-200.o + $(AR_CREATE_FOR_TARGET) $@ $< + +ic_invalidate_array_4a.o: $(gcc_srcdir)/config/sh/lib1funcs.asm + $(gcc_compile) -c -DL_ic_invalidate_array -D__FORCE_SH4A__ $< +libic_invalidate_array_4a.a: ic_invalidate_array_4a.o + $(AR_CREATE_FOR_TARGET) $@ $< + +sdivsi3_i4i-Os-4-200.o: $(srcdir)/config/sh/lib1funcs-Os-4-200.S + $(gcc_compile) -c -DL_sdivsi3_i4i $< +udivsi3_i4i-Os-4-200.o: $(srcdir)/config/sh/lib1funcs-Os-4-200.S + $(gcc_compile) -c -DL_udivsi3_i4i $< +unwind-dw2-Os-4-200.o: $(gcc_srcdir)/unwind-dw2.c + $(gcc_compile) $(LIBGCC2_CFLAGS) $(vis_hide) -fexceptions -Os -c $< + +OBJS_Os_4_200=sdivsi3_i4i-Os-4-200.o udivsi3_i4i-Os-4-200.o unwind-dw2-Os-4-200.o +libgcc-Os-4-200.a: $(OBJS_Os_4_200) + $(AR_CREATE_FOR_TARGET) $@ $(OBJS_Os_4_200) + +div_table-4-300.o: $(srcdir)/config/sh/lib1funcs-4-300.S + $(gcc_compile) -c -DL_div_table $< + +libgcc-4-300.a: div_table-4-300.o + $(AR_CREATE_FOR_TARGET) $@ div_table-4-300.o diff --git a/libgcc/config/sh/t-superh b/libgcc/config/sh/t-superh new file mode 100644 index 00000000000..b87aa5a3167 --- /dev/null +++ b/libgcc/config/sh/t-superh @@ -0,0 +1,11 @@ +# Compile crt1-mmu.o as crt1.o with -DMMU_SUPPORT +crt1-mmu.o: $(srcdir)/config/sh/crt1.S + $(gcc_compile) -c -DMMU_SUPPORT $< + +# Compile gcrt1-mmu.o as crt1-mmu.o with -DPROFILE +gcrt1-mmu.o: $(srcdir)/config/sh/crt1.S + $(gcc_compile) -c -DPROFILE -DMMU_SUPPORT $< + +# For sh4-400: Compile gcrt1.o as crt1.o with -DPROFILE +gcrt1.o: $(srcdir)/config/sh/crt1.S + $(gcc_compile) -c -DPROFILE $< diff --git a/libgcc/config/sparc/t-linux64 b/libgcc/config/sparc/t-linux64 new file mode 100644 index 00000000000..ca4a8929163 --- /dev/null +++ b/libgcc/config/sparc/t-linux64 @@ -0,0 +1,2 @@ +CRTSTUFF_T_CFLAGS = `if test x$$($(CC) -print-multi-os-directory) \ + = x../lib64; then echo -mcmodel=medany; fi` diff --git a/libgcc/config/spu/cache.S b/libgcc/config/spu/cache.S new file mode 100644 index 00000000000..9ffb6a0d194 --- /dev/null +++ b/libgcc/config/spu/cache.S @@ -0,0 +1,43 @@ +/* Copyright (C) 2008, 2009 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + + .data + .p2align 7 + .global __cache +__cache: + .rept __CACHE_SIZE__ * 8 + .fill 128 + .endr + + .p2align 7 + .global __cache_tag_array +__cache_tag_array: + .rept __CACHE_SIZE__ * 2 + .long 1, 1, 1, 1 + .fill 128-16 + .endr +__end_cache_tag_array: + + .globl __cache_tag_array_size + .set __cache_tag_array_size, __end_cache_tag_array-__cache_tag_array + diff --git a/libgcc/config/spu/cachemgr.c b/libgcc/config/spu/cachemgr.c new file mode 100644 index 00000000000..e7abd5e62db --- /dev/null +++ b/libgcc/config/spu/cachemgr.c @@ -0,0 +1,438 @@ +/* Copyright (C) 2008, 2009 Free Software Foundation, Inc. + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify it under +the terms of the GNU General Public License as published by the Free +Software Foundation; either version 3, or (at your option) any later +version. + +GCC is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +<http://www.gnu.org/licenses/>. */ + +#include <spu_mfcio.h> +#include <spu_internals.h> +#include <spu_intrinsics.h> +#include <spu_cache.h> + +extern unsigned long long __ea_local_store; +extern char __cache_tag_array_size; + +#define LINE_SIZE 128 +#define TAG_MASK (LINE_SIZE - 1) + +#define WAYS 4 +#define SET_MASK ((int) &__cache_tag_array_size - LINE_SIZE) + +#define CACHE_LINES ((int) &__cache_tag_array_size / \ + sizeof (struct __cache_tag_array) * WAYS) + +struct __cache_tag_array +{ + unsigned int tag_lo[WAYS]; + unsigned int tag_hi[WAYS]; + void *base[WAYS]; + int reserved[WAYS]; + vector unsigned short dirty_bits[WAYS]; +}; + +extern struct __cache_tag_array __cache_tag_array[]; +extern char __cache[]; + +/* In order to make the code seem a little cleaner, and to avoid having + 64/32 bit ifdefs all over the place, we use macros. */ + +#ifdef __EA64__ +typedef unsigned long long addr; + +#define CHECK_TAG(_entry, _way, _tag) \ + ((_entry)->tag_lo[(_way)] == ((_tag) & 0xFFFFFFFF) \ + && (_entry)->tag_hi[(_way)] == ((_tag) >> 32)) + +#define GET_TAG(_entry, _way) \ + ((unsigned long long)(_entry)->tag_hi[(_way)] << 32 \ + | (unsigned long long)(_entry)->tag_lo[(_way)]) + +#define SET_TAG(_entry, _way, _tag) \ + (_entry)->tag_lo[(_way)] = (_tag) & 0xFFFFFFFF; \ + (_entry)->tag_hi[(_way)] = (_tag) >> 32 + +#else /*__EA32__*/ +typedef unsigned long addr; + +#define CHECK_TAG(_entry, _way, _tag) \ + ((_entry)->tag_lo[(_way)] == (_tag)) + +#define GET_TAG(_entry, _way) \ + ((_entry)->tag_lo[(_way)]) + +#define SET_TAG(_entry, _way, _tag) \ + (_entry)->tag_lo[(_way)] = (_tag) + +#endif + +/* In GET_ENTRY, we cast away the high 32 bits, + as the tag is only in the low 32. */ + +#define GET_ENTRY(_addr) \ + ((struct __cache_tag_array *) \ + si_to_uint (si_a (si_and (si_from_uint ((unsigned int) (addr) (_addr)), \ + si_from_uint (SET_MASK)), \ + si_from_uint ((unsigned int) __cache_tag_array)))) + +#define GET_CACHE_LINE(_addr, _way) \ + ((void *) (__cache + ((_addr) & SET_MASK) * WAYS) + ((_way) * LINE_SIZE)); + +#define CHECK_DIRTY(_vec) (si_to_uint (si_orx ((qword) (_vec)))) +#define SET_EMPTY(_entry, _way) ((_entry)->tag_lo[(_way)] = 1) +#define CHECK_EMPTY(_entry, _way) ((_entry)->tag_lo[(_way)] == 1) + +#define LS_FLAG 0x80000000 +#define SET_IS_LS(_entry, _way) ((_entry)->reserved[(_way)] |= LS_FLAG) +#define CHECK_IS_LS(_entry, _way) ((_entry)->reserved[(_way)] & LS_FLAG) +#define GET_LRU(_entry, _way) ((_entry)->reserved[(_way)] & ~LS_FLAG) + +static int dma_tag = 32; + +static void +__cache_evict_entry (struct __cache_tag_array *entry, int way) +{ + addr tag = GET_TAG (entry, way); + + if (CHECK_DIRTY (entry->dirty_bits[way]) && !CHECK_IS_LS (entry, way)) + { +#ifdef NONATOMIC + /* Non-atomic writes. */ + unsigned int oldmask, mach_stat; + char *line = ((void *) 0); + + /* Enter critical section. */ + mach_stat = spu_readch (SPU_RdMachStat); + spu_idisable (); + + /* Issue DMA request. */ + line = GET_CACHE_LINE (entry->tag_lo[way], way); + mfc_put (line, tag, LINE_SIZE, dma_tag, 0, 0); + + /* Wait for DMA completion. */ + oldmask = mfc_read_tag_mask (); + mfc_write_tag_mask (1 << dma_tag); + mfc_read_tag_status_all (); + mfc_write_tag_mask (oldmask); + + /* Leave critical section. */ + if (__builtin_expect (mach_stat & 1, 0)) + spu_ienable (); +#else + /* Allocate a buffer large enough that we know it has 128 bytes + that are 128 byte aligned (for DMA). */ + + char buffer[LINE_SIZE + 127]; + qword *buf_ptr = (qword *) (((unsigned int) (buffer) + 127) & ~127); + qword *line = GET_CACHE_LINE (entry->tag_lo[way], way); + qword bits; + unsigned int mach_stat; + + /* Enter critical section. */ + mach_stat = spu_readch (SPU_RdMachStat); + spu_idisable (); + + do + { + /* We atomically read the current memory into a buffer + modify the dirty bytes in the buffer, and write it + back. If writeback fails, loop and try again. */ + + mfc_getllar (buf_ptr, tag, 0, 0); + mfc_read_atomic_status (); + + /* The method we're using to write 16 dirty bytes into + the buffer at a time uses fsmb which in turn uses + the least significant 16 bits of word 0, so we + load the bits and rotate so that the first bit of + the bitmap is in the first bit that fsmb will use. */ + + bits = (qword) entry->dirty_bits[way]; + bits = si_rotqbyi (bits, -2); + + /* Si_fsmb creates the mask of dirty bytes. + Use selb to nab the appropriate bits. */ + buf_ptr[0] = si_selb (buf_ptr[0], line[0], si_fsmb (bits)); + + /* Rotate to next 16 byte section of cache. */ + bits = si_rotqbyi (bits, 2); + + buf_ptr[1] = si_selb (buf_ptr[1], line[1], si_fsmb (bits)); + bits = si_rotqbyi (bits, 2); + buf_ptr[2] = si_selb (buf_ptr[2], line[2], si_fsmb (bits)); + bits = si_rotqbyi (bits, 2); + buf_ptr[3] = si_selb (buf_ptr[3], line[3], si_fsmb (bits)); + bits = si_rotqbyi (bits, 2); + buf_ptr[4] = si_selb (buf_ptr[4], line[4], si_fsmb (bits)); + bits = si_rotqbyi (bits, 2); + buf_ptr[5] = si_selb (buf_ptr[5], line[5], si_fsmb (bits)); + bits = si_rotqbyi (bits, 2); + buf_ptr[6] = si_selb (buf_ptr[6], line[6], si_fsmb (bits)); + bits = si_rotqbyi (bits, 2); + buf_ptr[7] = si_selb (buf_ptr[7], line[7], si_fsmb (bits)); + bits = si_rotqbyi (bits, 2); + + mfc_putllc (buf_ptr, tag, 0, 0); + } + while (mfc_read_atomic_status ()); + + /* Leave critical section. */ + if (__builtin_expect (mach_stat & 1, 0)) + spu_ienable (); +#endif + } + + /* In any case, marking the lo tag with 1 which denotes empty. */ + SET_EMPTY (entry, way); + entry->dirty_bits[way] = (vector unsigned short) si_from_uint (0); +} + +void +__cache_evict (__ea void *ea) +{ + addr tag = (addr) ea & ~TAG_MASK; + struct __cache_tag_array *entry = GET_ENTRY (ea); + int i = 0; + + /* Cycles through all the possible ways an address could be at + and evicts the way if found. */ + + for (i = 0; i < WAYS; i++) + if (CHECK_TAG (entry, i, tag)) + __cache_evict_entry (entry, i); +} + +static void * +__cache_fill (int way, addr tag) +{ + unsigned int oldmask, mach_stat; + char *line = ((void *) 0); + + /* Reserve our DMA tag. */ + if (dma_tag == 32) + dma_tag = mfc_tag_reserve (); + + /* Enter critical section. */ + mach_stat = spu_readch (SPU_RdMachStat); + spu_idisable (); + + /* Issue DMA request. */ + line = GET_CACHE_LINE (tag, way); + mfc_get (line, tag, LINE_SIZE, dma_tag, 0, 0); + + /* Wait for DMA completion. */ + oldmask = mfc_read_tag_mask (); + mfc_write_tag_mask (1 << dma_tag); + mfc_read_tag_status_all (); + mfc_write_tag_mask (oldmask); + + /* Leave critical section. */ + if (__builtin_expect (mach_stat & 1, 0)) + spu_ienable (); + + return (void *) line; +} + +static void +__cache_miss (__ea void *ea, struct __cache_tag_array *entry, int way) +{ + + addr tag = (addr) ea & ~TAG_MASK; + unsigned int lru = 0; + int i = 0; + int idx = 0; + + /* If way > 4, then there are no empty slots, so we must evict + the least recently used entry. */ + if (way >= 4) + { + for (i = 0; i < WAYS; i++) + { + if (GET_LRU (entry, i) > lru) + { + lru = GET_LRU (entry, i); + idx = i; + } + } + __cache_evict_entry (entry, idx); + way = idx; + } + + /* Set the empty entry's tag and fill it's cache line. */ + + SET_TAG (entry, way, tag); + entry->reserved[way] = 0; + + /* Check if the address is just an effective address within the + SPU's local store. */ + + /* Because the LS is not 256k aligned, we can't do a nice and mask + here to compare, so we must check the whole range. */ + + if ((addr) ea >= (addr) __ea_local_store + && (addr) ea < (addr) (__ea_local_store + 0x40000)) + { + SET_IS_LS (entry, way); + entry->base[way] = + (void *) ((unsigned int) ((addr) ea - + (addr) __ea_local_store) & ~0x7f); + } + else + { + entry->base[way] = __cache_fill (way, tag); + } +} + +void * +__cache_fetch_dirty (__ea void *ea, int n_bytes_dirty) +{ +#ifdef __EA64__ + unsigned int tag_hi; + qword etag_hi; +#endif + unsigned int tag_lo; + struct __cache_tag_array *entry; + + qword etag_lo; + qword equal; + qword bit_mask; + qword way; + + /* This first chunk, we merely fill the pointer and tag. */ + + entry = GET_ENTRY (ea); + +#ifndef __EA64__ + tag_lo = + si_to_uint (si_andc + (si_shufb + (si_from_uint ((addr) ea), si_from_uint (0), + si_from_uint (0x00010203)), si_from_uint (TAG_MASK))); +#else + tag_lo = + si_to_uint (si_andc + (si_shufb + (si_from_ullong ((addr) ea), si_from_uint (0), + si_from_uint (0x04050607)), si_from_uint (TAG_MASK))); + + tag_hi = + si_to_uint (si_shufb + (si_from_ullong ((addr) ea), si_from_uint (0), + si_from_uint (0x00010203))); +#endif + + /* Increment LRU in reserved bytes. */ + si_stqd (si_ai (si_lqd (si_from_ptr (entry), 48), 1), + si_from_ptr (entry), 48); + +missreturn: + /* Check if the entry's lo_tag is equal to the address' lo_tag. */ + etag_lo = si_lqd (si_from_ptr (entry), 0); + equal = si_ceq (etag_lo, si_from_uint (tag_lo)); +#ifdef __EA64__ + /* And the high tag too. */ + etag_hi = si_lqd (si_from_ptr (entry), 16); + equal = si_and (equal, (si_ceq (etag_hi, si_from_uint (tag_hi)))); +#endif + + if ((si_to_uint (si_orx (equal)) == 0)) + goto misshandler; + + if (n_bytes_dirty) + { + /* way = 0x40,0x50,0x60,0x70 for each way, which is also the + offset of the appropriate dirty bits. */ + way = si_shli (si_clz (si_gbb (equal)), 2); + + /* To create the bit_mask, we set it to all 1s (uint -1), then we + shift it over (128 - n_bytes_dirty) times. */ + + bit_mask = si_from_uint (-1); + + bit_mask = + si_shlqby (bit_mask, si_from_uint ((LINE_SIZE - n_bytes_dirty) / 8)); + + bit_mask = + si_shlqbi (bit_mask, si_from_uint ((LINE_SIZE - n_bytes_dirty) % 8)); + + /* Rotate it around to the correct offset. */ + bit_mask = + si_rotqby (bit_mask, + si_from_uint (-1 * ((addr) ea & TAG_MASK) / 8)); + + bit_mask = + si_rotqbi (bit_mask, + si_from_uint (-1 * ((addr) ea & TAG_MASK) % 8)); + + /* Update the dirty bits. */ + si_stqx (si_or (si_lqx (si_from_ptr (entry), way), bit_mask), + si_from_ptr (entry), way); + }; + + /* We've definitely found the right entry, set LRU (reserved) to 0 + maintaining the LS flag (MSB). */ + + si_stqd (si_andc + (si_lqd (si_from_ptr (entry), 48), + si_and (equal, si_from_uint (~(LS_FLAG)))), + si_from_ptr (entry), 48); + + return (void *) + si_to_uint (si_a + (si_orx + (si_and (si_lqd (si_from_ptr (entry), 32), equal)), + si_from_uint (((unsigned int) (addr) ea) & TAG_MASK))); + +misshandler: + equal = si_ceqi (etag_lo, 1); + __cache_miss (ea, entry, (si_to_uint (si_clz (si_gbb (equal))) - 16) >> 2); + goto missreturn; +} + +void * +__cache_fetch (__ea void *ea) +{ + return __cache_fetch_dirty (ea, 0); +} + +void +__cache_touch (__ea void *ea __attribute__ ((unused))) +{ + /* NO-OP for now. */ +} + +void __cache_flush (void) __attribute__ ((destructor)); +void +__cache_flush (void) +{ + struct __cache_tag_array *entry = __cache_tag_array; + unsigned int i; + int j; + + /* Cycle through each cache entry and evict all used ways. */ + + for (i = 0; i < CACHE_LINES / WAYS; i++) + { + for (j = 0; j < WAYS; j++) + if (!CHECK_EMPTY (entry, j)) + __cache_evict_entry (entry, j); + + entry++; + } +} diff --git a/libgcc/config/spu/t-elf b/libgcc/config/spu/t-elf index 7094da526bb..130d5610297 100644 --- a/libgcc/config/spu/t-elf +++ b/libgcc/config/spu/t-elf @@ -1,3 +1,35 @@ +# Don't let CTOR_LIST end up in sdata section. +# FIXME: This is the default. +CRTSTUFF_T_CFLAGS = + +# Neither gcc or newlib seem to have a standard way to generate multiple +# crt*.o files. So we don't use the standard crt0.o name anymore. + +cachemgr.o: $(srcdir)/config/spu/cachemgr.c + $(gcc_compile) -c $< + +# Specialised rule to add a -D flag. +cachemgr_nonatomic.o: $(srcdir)/config/spu/cachemgr.c + $(gcc_compile) -DNONATOMIC -c $< + +libgcc_%.a: %.o + $(AR_FOR_TARGET) -rcs $@ $< + +cache8k.o: $(srcdir)/config/spu/cache.S + $(gcc_compile) -D__CACHE_SIZE__=8 -c $< + +cache16k.o: $(srcdir)/config/spu/cache.S + $(gcc_compile) -D__CACHE_SIZE__=16 -c $< + +cache32k.o: $(srcdir)/config/spu/cache.S + $(gcc_compile) -D__CACHE_SIZE__=32 -c $< + +cache64k.o: $(srcdir)/config/spu/cache.S + $(gcc_compile) -D__CACHE_SIZE__=64 -c $< + +cache128k.o: $(srcdir)/config/spu/cache.S + $(gcc_compile) -D__CACHE_SIZE__=128 -c $< + # We provide our own version of __divdf3 that performs better and has # better support for non-default rounding modes. DPBIT_FUNCS := $(filter-out _div_df, $(DPBIT_FUNCS)) diff --git a/libgcc/config/t-crtin b/libgcc/config/t-crtin deleted file mode 100644 index b30e0d52e2f..00000000000 --- a/libgcc/config/t-crtin +++ /dev/null @@ -1,4 +0,0 @@ -crti.o: $(srcdir)/config/$(cpu_type)/sol2-ci.S - $(crt_compile) -c $< -crtn.o: $(srcdir)/config/$(cpu_type)/sol2-cn.S - $(crt_compile) -c $< diff --git a/libgcc/config/t-crtstuff-pic b/libgcc/config/t-crtstuff-pic new file mode 100644 index 00000000000..55e5fc1015e --- /dev/null +++ b/libgcc/config/t-crtstuff-pic @@ -0,0 +1,2 @@ +# Compile crtbeginS.o and crtendS.o with pic. +CRTSTUFF_T_CFLAGS_S = $(CRTSTUFF_T_CFLAGS) -fPIC diff --git a/libgcc/config/t-sol2 b/libgcc/config/t-sol2 index bfb8f3b5cc2..ab34a753378 100644 --- a/libgcc/config/t-sol2 +++ b/libgcc/config/t-sol2 @@ -20,10 +20,16 @@ gmon.o: $(srcdir)/config/gmon-sol2.c $(gcc_compile) -c $< +CUSTOM_CRTIN = yes + # Assemble startup files. crt1.o: $(srcdir)/config/$(cpu_type)/sol2-c1.S $(crt_compile) -c $< gcrt1.o: $(srcdir)/config/$(cpu_type)/sol2-c1.S $(crt_compile) -c -DGCRT1 $< +crti.o: $(srcdir)/config/$(cpu_type)/sol2-ci.S + $(crt_compile) -c $< +crtn.o: $(srcdir)/config/$(cpu_type)/sol2-cn.S + $(crt_compile) -c $< HOST_LIBGCC2_CFLAGS = -fPIC diff --git a/libgcc/config/vms/t-vms b/libgcc/config/vms/t-vms new file mode 100644 index 00000000000..93d8255dcb0 --- /dev/null +++ b/libgcc/config/vms/t-vms @@ -0,0 +1,6 @@ +# Assemble startup files. +vcrt0.o: $(srcdir)/config/vms/vms-ucrt0.c + $(gcc_compile) -c $< + +pcrt0.o: $(srcdir)/config/vms/vms-ucrt0.c + $(gcc_compile) -c -DCRT0_POSIX_EXIT $< diff --git a/libgcc/config/vms/vms-ucrt0.c b/libgcc/config/vms/vms-ucrt0.c new file mode 100644 index 00000000000..344b59520e0 --- /dev/null +++ b/libgcc/config/vms/vms-ucrt0.c @@ -0,0 +1,127 @@ +/* VMS crt0 returning Unix style condition codes. + Copyright (C) 2001, 2009, 2010 Free Software Foundation, Inc. + Contributed by Douglas B. Rupp (rupp@gnat.com). + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +#include <stdlib.h> + +/* Lots of cheat to handle 32bits/64bits pointer conversions. + We use 'long long' for 64 bits pointers and 'int' for 32 bits pointers. */ + +extern void decc$main (void *arg1, void *arg2, void *arg3, + void *image_file_desc, void *arg5, void *arg6, + int *, int *, int *); +extern int main (int, char **, char **); +extern int _malloc32 (int); + +#ifdef __ia64__ +#define MAIN_ASM_NAME asm ("ELF$TFRADR") +#else +#define MAIN_ASM_NAME +#endif + +int __main (void *arg1, void *arg2, void *arg3, + void *image_file_desc, void *arg5, void *arg6) MAIN_ASM_NAME; + +/* From errnodef.h, but we need to emulate the globalval. */ +extern int C$_EXIT1; + +/* From stsdef.h */ +#define STS$V_MSG_NO 0x03 +#define STS$M_INHIB_MSG 0x10000000 + +/* From ssdef.h */ +#define SS$_NORMAL 1 + +int +__main (void *arg1, void *arg2, void *arg3, + void *image_file_desc, void *arg5, void *arg6) +{ + int argc; + int argv; + int envp; + int status; + int i; + long long *long_argv; + long long *long_envp; + + /* The argv and envp arrays are 32 bits pointers to 32 bits pointers. */ + decc$main (arg1, arg2, arg3, image_file_desc, + arg5, arg6, &argc, &argv, &envp); + + if (sizeof (void *) == 8) + { + /* Reallocate argv and envp with 64 bit pointers. */ + long_argv = (long long *) + (long long) _malloc32 (sizeof (long long) * (argc + 1)); + + for (i = 0; i < argc; i++) + long_argv[i] = ((int *) (long long) argv)[i]; + + long_argv[argc] = 0; + + for (i = 0; ((int *) (long long) envp)[i]; i++) + ; + long_envp = (long long *) + (long long) _malloc32 (sizeof (long long) * (i + 1)); + + for (i = 0; ((int *) (long long) envp)[i]; i++) + long_envp[i] = ((int *) (long long) envp)[i]; + + long_envp[i] = 0; + } + else + { + long_argv = (long long *) argv; + long_envp = (long long *) envp; + } + status = main (argc, (char **)long_argv, (char **)long_envp); + +#ifdef CRT0_POSIX_EXIT + /* Map into a range of 0 - 255. */ + status = status & 255; + + if (status > 0) + { + int save_status = status; + + status = (long) &C$_EXIT1 + ((status - 1) << STS$V_MSG_NO); + + /* An exit failure status requires a "severe" error. All status values + are defined in errno with a successful (1) severity but can be + changed to an error (2) severity by adding 1. In addition for + compatibility with UNIX exit() routines we inhibit a run-time error + message from being generated on exit(1). */ + + if (save_status == 1) + { + status++; + status |= STS$M_INHIB_MSG; + } + } + else + status = SS$_NORMAL; +#endif /* CRT0_POSIX_EXIT */ + + return status; +} diff --git a/libgcc/config/xtensa/crti.S b/libgcc/config/xtensa/crti.S new file mode 100644 index 00000000000..cbe91b0e748 --- /dev/null +++ b/libgcc/config/xtensa/crti.S @@ -0,0 +1,51 @@ +# Start .init and .fini sections. +# Copyright (C) 2003, 2009 Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + +# This file just makes a stack frame for the contents of the .fini and +# .init sections. Users may put any desired instructions in those +# sections. + +#include "xtensa-config.h" + + .section .init + .globl _init + .type _init,@function + .align 4 +_init: +#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__ + entry sp, 64 +#else + addi sp, sp, -32 + s32i a0, sp, 0 +#endif + + .section .fini + .globl _fini + .type _fini,@function + .align 4 +_fini: +#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__ + entry sp, 64 +#else + addi sp, sp, -32 + s32i a0, sp, 0 +#endif diff --git a/libgcc/config/xtensa/crtn.S b/libgcc/config/xtensa/crtn.S new file mode 100644 index 00000000000..413cfa0ac10 --- /dev/null +++ b/libgcc/config/xtensa/crtn.S @@ -0,0 +1,46 @@ +# End of .init and .fini sections. +# Copyright (C) 2003, 2009 Free Software Foundation, Inc. +# +# This file is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, but WITHOUT ANY +# WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +# for more details. +# +# Under Section 7 of GPL version 3, you are granted additional +# permissions described in the GCC Runtime Library Exception, version +# 3.1, as published by the Free Software Foundation. +# +# You should have received a copy of the GNU General Public License and +# a copy of the GCC Runtime Library Exception along with this program; +# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +# <http://www.gnu.org/licenses/>. + + +# This file just makes sure that the .fini and .init sections do in +# fact return. Users may put any desired instructions in those sections. +# This file is the last thing linked into any executable. + +#include "xtensa-config.h" + + .section .init +#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__ + retw +#else + l32i a0, sp, 0 + addi sp, sp, 32 + ret +#endif + + .section .fini +#if XCHAL_HAVE_WINDOWED && !__XTENSA_CALL0_ABI__ + retw +#else + l32i a0, sp, 0 + addi sp, sp, 32 + ret +#endif diff --git a/libgcc/config/xtensa/t-elf b/libgcc/config/xtensa/t-elf new file mode 100644 index 00000000000..dffcbc8b9d2 --- /dev/null +++ b/libgcc/config/xtensa/t-elf @@ -0,0 +1,3 @@ +# Build CRT files and libgcc with the "longcalls" option +CRTSTUFF_T_CFLAGS += -mlongcalls +CRTSTUFF_T_CFLAGS_S += -mlongcalls |