diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 9653 | ||||
| -rw-r--r-- | gcc/cgraph.c | 12 |
2 files changed, 9663 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2e3dc27e2f1..bc69bd54516 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2015-01-18 Jan Hubicka <hubicka@ucw.cz> + + * cgraph.c (cgraph_node::dump): Dump profile flags. + 2015-01-18 Oleg Endo <olegendo@gcc.gnu.org> PR target/64652 @@ -7,9 +11,11 @@ 2015-01-18 Jan Hubicka <hubicka@ucw.cz> * ipa-reference.c (set_reference_optimization_summary, - ipa_reference_get_not_written_global): Do nothing if ipa-reference is disabled. + ipa_reference_get_not_written_global): Do nothing if ipa-reference is + disabled. (ignore_module_statics): New static var. - (propagate_bits): If ipa-reference is disabled, do not look into local properties. + (propagate_bits): If ipa-reference is disabled, do not look into local + properties. (analyze_function): Disable analysis when ipa_reference is disabled. (generate_summary): Do not dump when reference is disabled; collect vars accessed from functions with ipa-reference disabled. @@ -1927,6 +1933,9649 @@ 2015-01-09 Michael Collison <michael.collison@linaro.org> + PR tree-optimization/64322 + * tree-vrp.c (extract_range_from_binary_expr_1): Attempt to derive + range for RSHIFT_EXPR even if vr0 range is not VR_RANGE or is symbolic. + +2014-12-17 Tobias Burnus <burnus@net-b.de> + + PR fortran/54687 + * flag-types.h (gfc_init_local_real, gfc_fcoarray, + gfc_convert): New enums; moved from fortran/. + +2014-12-16 Jan Hubicka <hubicka@ucw.cz> + + PR lto/64043 + +2014-12-16 Jan Hubicka <hubicka@ucw.cz> + + * fibonacci_heap.h (min): Return m_data instead of non-existing data. + +2014-12-16 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline-analysis.c (will_be_nonconstant_predicate): Consider + return values of const calls as constants. + (estimate_function_body_sizes): Expect calls to have false predicates. + +2014-12-16 Jan Hubicka <hubicka@ucw.cz> + + * hwint.c (abs_hwi, absu_hwi): Move to ... + * hwint.h (abs_hwi, absu_hwi): ... here; make inline. + +2014-12-16 Marek Polacek <polacek@redhat.com> + + PR middle-end/64309 + * match.pd: Add ((1 << A) & 1) != 0 -> A == 0 and + ((1 << A) & 1) == 0 -> A != 0. + +2014-12-16 Richard Biener <rguenther@suse.de> + + * genmatch.c (parser::parser): Initialize capture_ids. + (parser::parse_pattern): Properly allocate capture_ids before + using them. Set capture_ids to zero when its lifetime is + supposed to finish. + (parser::parse_simplify): Allocate capture_ids only if + required. + +2014-12-16 Michael Haubenwallner <michael.haubenwallner@ssi-schaefer.com> + + * sreal.c: Include math.h later. + +2014-12-16 Felix Yang <felix.yang@huawei.com> + + PR rtl-optimization/64240 + * ddg.c (mark_mem_use): Check *iter instead of *x. + +2014-12-16 Martin Liska <mliska@suse.cz> + + PR ipa/64278 + * sreal.c (sreal::operator*): Replace std::abs with absu_hwi. + +2014-12-16 Igor Zamyatin <igor.zamyatin@intel.com> + + * config/i386/i386.c (ix86_address_cost): Add explicit restriction + to RTL level for the check for PIC register. + +2014-12-16 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/gnu-user.h (TARGET_CAN_SPLIT_STACK): Move from here ... + * config/i386/gnu-user64.h (TARGET_CAN_SPLIT_STACK): ... and here ... + * config/i386/gnu-user-common.h (TARGET_CAN_SPLIT_STACK): ... to here. + +2014-12-16 Chung-Ju Wu <jasonwucj@gmail.com> + + PR target/64217 + * config/nds32/nds32.md (casesi_internal): Add '=r' for clobber + register constraint. + +2014-12-15 DJ Delorie <dj@redhat.com> + + * config/rl78/rl78.h: Remove SHORT_IMMEDIATES_SIGN_EXTEND. + +2014-12-15 Jan Hubicka <hubicka@ucw.cz> + + PR lto/64043 + * tree-streamer.c (preload_common_nodes): Skip preloading + of main_identifier_node, pid_type and optimization/option nodes. + +2014-12-15 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/63397 + * ira-int.h (ira_overall_cost, ira_reg_cost, ira_mem_cost): Use + int64_t. + (ira_load_cost, ira_store_cost, ira_shuffle_cost): Ditto. + * ira.c (ira_overall_cost, ira_overall_cost_before): Ditto. + (ira_reg_cost, ira_mem_cost): Ditto. + (ira_load_cost, ira_store_cost, ira_shuffle_cost): Ditto. + (calculate_allocation_cost, do_reload): Use the right + format for int64_t values. + +2014-12-15 Jan Hubicka <hubicka@ucw.cz> + + * sreal.h (to_double): New method. + (shift): Do not ICE on 0. + * sreal.c: Include math.h + (sreal::to_double): New. + +2014-12-15 Jakub Jelinek <jakub@redhat.com> + + PR rtl-optimization/64316 + * simplify-rtx.c (simplify_relational_operation_1): For + (eq/ne (and x y) x) and (eq/ne (and x y) y) optimizations use + CONST0_RTX instead of const0_rtx. + +2014-12-15 Vladimir Makarov <vmakarov@redhat.com> + + PR target/62642 + * ira.c (rtx_moveable_p): Prevent UNSPEC_VOLATILE moves. + +2014-12-15 Vladimir Makarov <vmakarov@redhat.com> + + * ira-int.h (ira_prohibited_class_mode_regs): Remove. + (struct target_ira_int): Move x_ira_prohibited_class_mode_regs to + ... + * ira.h (struct target_ira): ... here. + (ira_prohibited_class_mode_regs): Define. + * lra-constraints.c (process_alt_operands): Add one more condition + to refuse alternative when reload pseudo of given class can not + hold value of given mode. + +2014-12-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/64312 + * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Use + vuse_ssa_val as callback to walk_non_aliased_vuses. + (vn_reference_lookup): Likewise. + +2014-12-15 Segher Boessenkool <segher@kernel.crashing.org> + + * gcc/config/rs6000/rs6000.md (*add>mode>3_imm_dot, + *add<mode>3_imm_dot2): Change the constraint for the second + alternative for operand 1 from "r" to "b". + +2014-12-15 Richard Biener <rguenther@suse.de> + + * vec.h (vec::safe_grow): Guard against a grow to zero size. + +2014-12-15 Richard Biener <rguenther@suse.de> + + PR middle-end/64295 + * match.pd (X / CST -> X * (1 / CST): Use const_binop instead of + fold_binary to compute the constant to multiply with. + +2014-12-15 Richard Biener <rguenther@suse.de> + + PR middle-end/64246 + * cfgloop.c (mark_loop_for_removal): Make safe against multiple + invocations on the same loop. + +2014-12-15 Marek Polacek <polacek@redhat.com> + + PR middle-end/64292 + * fold-const.c (negate_expr_p): Add INTEGRAL_TYPE_P check. + +2014-12-15 Renlin Li <renlin.li@arm.com> + + * config/aarch64/aarch64.h (CLZ_DEFINED_VALUE_AT_ZERO): Return 2. + (CTZ_DEFINED_VALUE_AT_ZERO): Update to support more modes. + +2014-12-15 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/64265 + * tsan.c (instrument_func_entry): Insert __tsan_func_entry + call on edge from entry block to single succ instead + of after labels of single succ of entry block. + +2014-12-15 Richard Biener <rguenther@suse.de> + + PR tree-optimization/64284 + * tree-ssa-threadupdate.c (duplicate_seme_region): Mark + the loop for removal if we copied the loop header. + +2014-12-14 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/61602 + * cgraph.h (ipa_discover_readonly_nonaddressable_vars): Return bool. + * ipa.c (set_writeonly_bit): Track if reference was removed. + (ipa_discover_readonly_nonaddressable_vars): Return true if any + references was removed. + * ipa-reference.c (propagate): Return TODO_remove_functions if + reference was removed. + +2014-12-14 Jan Hubicka <hubicka@ucw.cz> + + * ipa.c (process_references): Fix conditoinal on flag_optimize + +2014-12-14 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/61558 + * symtab.c (symbol_table::insert_to_assembler_name_hash + symbol_table::unlink_from_assembler_name_hash): Do not ICE when + DECL_ASSEMBLER_NAME is NULL. + +2014-12-14 Jan Hubicka <hubicka@ucw.cz> + + * cgraphunit.c (analyze_functions): Always analyze targets of aliases. + +2014-12-14 Jan Hubicka <hubicka@ucw.cz> + + PR lto/64043 + * tree.c (virtual_method_call_p): Return false when OTR type has + no BINFO. + +2014-12-14 Jan Hubicka <hubicka@ucw.cz> + + * cgraphunit.c (analyze_functions): Do not analyze extern inline + funtions when not optimizing; skip comdat locals. + +2014-12-14 H.J. Lu <hongjiu.lu@intel.com> + + PR rtl-optimization/64037 + * combine.c (setup_incoming_promotions): Pass the argument + before any promotions happen to promote_function_mode. + +2014-12-12 Thomas Schwinge <thomas@codesourcery.com> + + * config/nvptx/nvptx.h (ASM_OUTPUT_ALIGN): Define as a C statment. + +2014-12-12 Vladimir Makarov <vmakarov@redhat.com> + + PR target/64110 + * lra-constraints.c (process_alt_operands): Refuse alternative + when reload pseudo of given class can not hold value of given + mode. + +2014-12-12 Thomas Schwinge <thomas@codesourcery.com> + + * gimple-walk.c (walk_gimple_op) <GIMPLE_OMP_FOR>: Also check + intermediate walk_tree results for for_incr. + <GIMPLE_OMP_TARGET>: Walk child_fn and data_arg, too. + <GIMPLE_OMP_CRITICAL, GIMPLE_OMP_ATOMIC_STORE>: Pretty printing. + +2014-12-12 Richard Sandiford <richard.sandiford@arm.com> + + PR middle-end/64182 + * wide-int.h (wi::div_round, wi::mod_round): Fix rounding of tied + cases. + * double-int.c (div_and_round_double): Fix handling of unsigned + cases. Use same rounding approach as wide-int.h. + +2014-12-12 Marek Polacek <polacek@redhat.com> + + PR middle-end/64274 + * fold-const.c (fold_binary_loc): Add ANY_INTEGRAL_TYPE_P check. + +2014-12-12 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/64269 + * tree-ssa-forwprop.c (simplify_builtin_call): Bail out if + len2 or diff are too large. + +2014-12-12 Richard Biener <rguenther@suse.de> + + PR middle-end/64280 + * tree-cfg.c (replace_uses_by): Guard assert properly. + +2014-12-12 Anthony Green <green@moxielogic.com> + + * config/moxie/moxie.md: Add use of zex instruction. + +2014-12-12 Marc Glisse <marc.glisse@inria.fr> + + * real.h (HONOR_SNANS, HONOR_INFINITIES, HONOR_SIGNED_ZEROS, + HONOR_SIGN_DEPENDENT_ROUNDING): Replace macros with 3 overloaded + declarations. + * real.c (HONOR_NANS): Fix indentation. + (HONOR_SNANS, HONOR_INFINITIES, HONOR_SIGNED_ZEROS, + HONOR_SIGN_DEPENDENT_ROUNDING): Define three overloads. + * builtins.c (fold_builtin_cproj, fold_builtin_signbit, + fold_builtin_fmin_fmax, fold_builtin_classify): Simplify argument + of HONOR_*. + * fold-const.c (operand_equal_p, fold_comparison, fold_binary_loc): + Likewise. + * gimple-fold.c (gimple_val_nonnegative_real_p): Likewise. + * ifcvt.c (noce_try_move, noce_try_minmax, noce_try_abs): Likewise. + * omp-low.c (omp_reduction_init): Likewise. + * rtlanal.c (may_trap_p_1): Likewise. + * simplify-rtx.c (simplify_const_relational_operation): Likewise. + * tree-ssa-dom.c (record_equality, record_edge_info): Likewise. + * tree-ssa-phiopt.c (value_replacement, abs_replacement): Likewise. + * tree-ssa-reassoc.c (eliminate_using_constants): Likewise. + * tree-ssa-uncprop.c (associate_equivalences_with_edges): Likewise. + +2014-12-12 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline.c (ipa_inline): Fix condition on when + TODO_remove_unreachable_functions is needed. + +2014-12-12 Jan Hubicka <hubicka@ucw.cz> + + * ipa-devirt.c (possible_polymorphic_call_targets): Return early + if otr_type has no BINFO. + +2014-12-12 Zhenqiang Chen <zhenqiang.chen@arm.com> + + PR rtl-optimization/63917 + * ifcvt.c (cc_in_cond): New function. + (end_ifcvt_sequence): Make sure new generated insns do not clobber CC. + (noce_process_if_block, check_cond_move_block): Check CC references. + +2014-12-11 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/aarch64-protos.h (tune_params): Add align field. + * config/aarch64/aarch64.c (generic_tunings): Specify align. + (cortexa53_tunings): Likewise. + (cortexa57_tunings): Likewise. + (thunderx_tunings): Likewise. + (aarch64_override_options): Set align_loops, align_jumps, + align_functions based on what the tuning struct. + +2014-12-11 Eric Botcazou <ebotcazou@adacore.com> + + * doc/md.texi (Insn Lengths): Fix description of (pc). + +2014-12-11 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/61324 + * passes.c (execute_todo): Update call of remove_unreachable_nodes. + * ipa-chkp.c (chkp_produce_thunks): Use TODO_remove_functions. + * cgraphunit.c (symbol_table::process_new_functions): Add + IPA_SSA_AFTER_INLINING. + (ipa_passes): Update call of remove_unreachable_nodes. + (symbol_table::compile): Remove call of remove_unreachable_nodes. + * ipa-inline.c (inline_small_functions): Do not ICE with + -flto-partition=none + (ipa_inline): Update symtab->state; fix formatting + update call of remove_unreachable_nodes. + * passes.c (execute_todo): Update call of remove_unreachable_nodes. + * cgraphclones.c (symbol_table::materialize_all_clones): Likewise. + * cgraph.h (enum symtab_state): Add IPA_SSA_AFTER_INLINING. + (remove_unreachable_nodes): Update. + * ipa.c (process_references): Keep external references only + when optimizing. + (walk_polymorphic_call_targets): Keep possible polymorphic call + target only when devirtualizing. + (symbol_table::remove_unreachable_nodes): Remove BEFORE_INLINING_P + parameter. + (ipa_single_use): Update comment. + * ipa-pure-const.c (cdtor_p): New function. + (propagate_pure_const): Track if some cdtor was turned pure/const. + (execute): Return TODO_remove_functions if needed. + * ipa-comdats.c (ipa_comdats): Update comment. + +2014-12-11 Aldy Hernandez <aldyh@redhat.com> + + * dwarf2out.c (gen_lexical_block_die): Remove unused `depth' + parameter. + (gen_inlined_subroutine_die): Same. + (gen_block_die): Same. + (decls_for_scope): Same. + +2014-12-11 Renlin Li <renlin.li@arm.com> + + * config/aarch64/aarch64-cores.def: Change all AARCH64_FL_FPSIMD to + AARCH64_FL_FOR_ARCH8. + * config/aarch64/aarch64.c (all_cores): Use FLAGS from + aarch64-cores.def file only. + +2014-12-11 Manuel López-Ibáñez <manu@gcc.gnu.org> + + PR fortran/44054 + * diagnostic.c (diagnostic_action_after_output): Make it extern. + Take diagnostic_t argument instead of diagnostic_info. Count also + DK_WERROR towards max_errors. + (diagnostic_report_diagnostic): Update call according to the above. + (error_recursion): Likewise. + * diagnostic.h (diagnostic_action_after_output): Declare. + * pretty-print.c (pp_formatted_text_data): Delete. + (pp_append_r): Call output_buffer_append_r. + (pp_formatted_text): Call output_buffer_formatted_text. + (pp_last_position_in_text): Call output_buffer_last_position_in_text. + * pretty-print.h (output_buffer_formatted_text): New. + (output_buffer_append_r): New. + (output_buffer_last_position_in_text): New. + +2014-12-11 Kyrylo Tkachov kyrylo.tkachov@arm.com + + * config/aarch64/aarch64.c (aarch64_parse_extension): Update error + message to say +no only when removing extension. + +2014-12-11 Andrew MacLeod <amacleod@redhat.com> + + * config/tilepro/gen-mul-tables.cc: Add insn-codes.h to include list + for generator file. Add comment indicating it is a generated file. + * config/tilepro/mul-tables.c: Update generated file. + * config/tilegx/mul-tables.c: Likewise. + +2014-12-11 Segher Boessenkool <segher@kernel.crashing.org> + + * combine.c (try_combine): Do not allow combining a PARALLEL I2 + with a register move I3 if that I2 is an asm. + +2014-12-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm_neon.h (vrndqn_f32): Rename to... + (vrndnq_f32): ... this. + (vrndqa_f32): Rename to... + (vrndaq_f32): ... this. + (vrndqp_f32): Rename to... + (vrndpq_f32): ... this. + (vrndqm_f32): Rename to... + (vrndmq_f32): ... this. + (vrndx_f32): New intrinsic. + (vrndxq_f32): Likewise. + +2014-12-11 Marek Polacek <polacek@redhat.com> + + * fold-const.c (fold_negate_expr): Add ANY_INTEGRAL_TYPE_P check. + (extract_muldiv_1): Likewise. + (maybe_canonicalize_comparison_1): Likewise. + (fold_comparison): Likewise. + (tree_binary_nonnegative_warnv_p): Likewise. + (tree_binary_nonzero_warnv_p): Likewise. + * gimple-ssa-strength-reduction.c (legal_cast_p_1): Likewise. + * tree-scalar-evolution.c (simple_iv): Likewise. + (scev_const_prop): Likewise. + * tree-ssa-loop-niter.c (expand_simple_operations): Likewise. + * tree-vect-generic.c (expand_vector_operation): Likewise. + * tree.h (ANY_INTEGRAL_TYPE_CHECK): Define. + (ANY_INTEGRAL_TYPE_P): Define. + (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED, TYPE_OVERFLOW_TRAPS): + Add ANY_INTEGRAL_TYPE_CHECK. + (any_integral_type_check): New function. + +2014-12-11 Tobias Burnus <burnus@net-b.de> + Manuel López-Ibáñez <manu@gcc.gnu.org> + + * error.c (gfc_get_terminal_width): Renamed from + get_terminal_width and use same-named common function. + (gfc_error_init_1): Update call. + +2014-12-10 Aldy Hernandez <aldyh@redhat.com> + + * gdbhooks.py (class DWDieRefPrinter): New class. + (build_pretty_printer): Register dw_die_ref's. + +2014-12-10 Ilya Tocar <ilya.tocar@intel.com> + + * config.gcc: Support "knl". + * config/i386/driver-i386.c (host_detect_local_cpu): Detect "knl". + * config/i386/i386-c.c (ix86_target_macros_internal): Handle + PROCESSOR_KNL. + * config/i386/i386.c (m_KNL): Define. + (processor_target_table): Add "knl". + (PTA_KNL): Define. + (ix86_issue_rate): Add PROCESSOR_KNL. + (ix86_adjust_cost): Ditto. + (ia32_multipass_dfa_lookahead): Ditto. + (get_builtin_code_for_version): Handle "knl". + (fold_builtin_cpu): Ditto. + * config/i386/i386.h (TARGET_KNL): Define. + (processor_type): Add PROCESSOR_KNL. + * config/i386/i386.md (attr "cpu"): Add knl. + * config/i386/x86-tune.def: Add m_KNL. + +2014-12-10 Jan Hubicka <hubicka@ucw.cz> + + * doc/invoke.texi: (-devirtualize-at-ltrans): Document. + * lto-cgraph.c (lto_output_varpool_node): Mark initializer as removed + when it is not streamed to the given ltrans. + (compute_ltrans_boundary): Make code adding all polymorphic + call targets conditional with !flag_wpa || flag_ltrans_devirtualize. + * common.opt (fdevirtualize-at-ltrans): New flag. + +2014-12-10 Ilya Verbin <ilya.verbin@intel.com> + + * varpool.c (varpool_node::get_create): Force output of vars with + "omp declare target" attribute. + +2014-12-10 Marc Glisse <marc.glisse@inria.fr> + + * real.h (HONOR_NANS): Replace macro with 3 overloaded declarations. + * real.c: Include rtl.h and options.h. + (HONOR_NANS): Define three overloads. + * builtins.c (fold_builtin_classify, fold_builtin_unordered_cmp): + Simplify argument of HONOR_NANS. + * fold-const.c (combine_comparisons, fold_truth_not_expr, + fold_cond_expr_with_comparison, merge_truthop_with_opposite_arm, + fold_comparison, fold_binary_loc): Likewise. + * ifcvt.c (noce_try_move, noce_try_minmax): Likewise. + * ipa-inline-analysis.c (add_clause, + set_cond_stmt_execution_predicate): Likewise. + * match.pd: Likewise. + * rtlanal.c (may_trap_p_1): Likewise. + * simplify-rtx.c (simplify_const_relational_operation): Likewise. + * tree-if-conv.c (parse_predicate): Likewise. + * tree-ssa-ccp.c (valid_lattice_transition): Likewise. + * tree-ssa-ifcombine.c (ifcombine_ifandif): Likewise. + * tree-ssa-phiopt.c (minmax_replacement, neg_replacement): Likewise. + * tree-ssa-reassoc.c (eliminate_using_constants): Likewise. + * tree-ssa-tail-merge.c (gimple_equal_p): Likewise. + +2014-12-10 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/62021 + * omp-low.c (simd_clone_adjust_return_type): Use + vector of pointer_sized_int_node types instead vector of pointer + types. + (simd_clone_adjust_argument_types): Likewise. + +2014-12-10 Jakub Jelinek <jakub@redhat.com> + Evgeny Stupachenko <evstupac@gmail.com> + + PR target/64252 + * config/i386/i386.c (expand_vec_perm_pblendv): If not testing_p, + set dcopy.target to a new pseudo. + +2014-12-10 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (*add<mode>3): Remove condition. + +2014-12-10 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/40x.md (ppc403-compare): Remove "compare". + config/rs6000/440.md (ppc440-compare): Remove "compare". + config/rs6000/476.md (ppc476-compare): Remove "compare". + config/rs6000/601.md (ppc601-compare): Remove "compare". + config/rs6000/603.md (ppc603-compare): Remove "compare". + config/rs6000/6xx.md (ppc604-compare): Remove "compare". + config/rs6000/7450.md (ppc7450-compare): Remove "compare". + config/rs6000/7xx.md (ppc750-compare): Remove "compare". + config/rs6000/8540.md (ppc8540_su): Remove "compare". + config/rs6000/cell.md (cell-fast-cmp, cell-cmp-microcoded): Remove + "compare". + config/rs6000/e300c2c3.md (ppce300c3_cmp): Remove "compare". + config/rs6000/e500mc.md (e500mc_su): Remove "compare". + config/rs6000/e500mc64.md (e500mc64_su2): Remove "compare". + config/rs6000/e5500.md (e5500_sfx2): Remove "compare". + config/rs6000/e6500.md (e6500_sfx2): Remove "compare". + config/rs6000/mpc.md (mpccore-compare): Remove "compare". + config/rs6000/power4.md (power4-compare): Remove "compare". + config/rs6000/power5.md (power5-compare): Remove "compare". + config/rs6000/power6.md (power6-compare): Remove "compare". + config/rs6000/power7.md (power7-compare): Remove "compare". + config/rs6000/power8.md (power8-compare): Remove "compare". Update + comment. + config/rs6000/rs6000.c (rs6000_adjust_cost) <TYPE_COMPARE>: Remove + (three times). + (is_cracked_insn): Remove TYPE_COMPARE case. + (insn_must_be_first_in_group) <TYPE_COMPARE>: Remove (twice). + config/rs6000/rs6000.md (type): Remove "compare". + (cell_micro): Remove "compare". + config/rs6000/rs64.md (rs64a-compare): Remove "compare". + +2014-12-10 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (*anddi3_2rld_dot, *anddi3_rld_dot2): + Change type from "compare" to "two". + +2014-12-10 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/64180 + * config/rs6000/predicates.md (unsigned_comparison_operator): New. + (signed_comparison_operator): New. + * config/rs6000/rs6000-protos.h (rs6000_emit_eqne): Declare. + * config/rs6000/rs6000.c (rs6000_emit_eqne): New function. + (rs6000_emit_sCOND): Remove ISEL test (move it to the expander). + * config/rs6000/rs6000.md (add<mode>3 for SDI): Expand DImode + add to addc,adde directly, if !TARGET_POWERPC64. + (sub<mode>3 for SDI): Expand DImode sub to subfc,subfe directly, + if !TARGET_POWERPC64. + (neg<mode>2): Delete expander. + (*neg<mode>2): Rename to "neg<mode>2". + (addti3, subti3): Delete. + (addti3, subti3): New expanders. + (*adddi3_noppc64, *subdi3_noppc64, *negdi2_noppc64): Delete. + (cstore<mode>4_unsigned): New expander. + (cstore<mode>4): Allow GPR as output (not just SI). Rewrite. + (cstore<mode>4 for FP): Remove superfluous quotes. + (*eq<mode>, *eq<mode>_compare, *plus_eqsi and splitter, + *compare_plus_eqsi and splitter, *plus_eqsi_compare and splitter, + *neg_eq0<mode>, *neg_eq<mode>, *ne0_<mode>, plus_ne0_<mode>, + compare_plus_ne0_<mode> and splitter, *compare_plus_ne0_<mode>_1 and + splitter, *plus_ne0_<mode>_compare and splitter, *leu<mode>, + *leu<mode>_compare and splitter, *plus_leu<mode>, *neg_leu<mode>, + *and_neg_leu<mode>, *ltu<mode>, *ltu<mode>_compare, *plus_ltu<mode>, + *plus_ltu<mode>_1, *plus_ltu<mode>compare, *neg_ltu<mode>, *geu<mode>, + *geu<mode>_compare and splitter, *plus_geu<mode>, *neg_geu<mode>, + *and_neg_geu<mode>, *plus_gt0<mode>, *gtu<mode>, *gtu<mode>_compare, + *plus_gtu<mode>, *plus_gtu<mode>_1, *plus_gtu<mode>_compare, + *neg_gtu<mode>, 12 anonymous insns, and 12 anonymous splitters): + Delete. + (eq<mode>3, ne<mode>3): New. + (*neg_eq_<mode>, *neg_ne_<mode>): New. + (*plus_eq_<mode>, *plus_ne_<mode>): New. + (*minus_eq_<mode>, *minus_ne_<mode>): New. + +2014-12-10 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/64180 + * config/rs6000/predicates.md (adde_operand): New. + * config/rs6000/rs6000.md (add<mode>3_carry): New. + (*add<mode>3_imm_carry_pos): New. + (*add<mode>3_imm_carry_0): New. + (*add<mode>3_imm_carry_m1): New. + (*add<mode>3_imm_carry_neg): New. + (add<mode>3_carry_in): New. + (*add<mode>3_carry_in_internal): New. + (add<mode>3_carry_in_0): New. + (add<mode>3_carry_in_m1): New. + (subf<mode>3_carry): New. + (*subf<mode>3_imm_carry_0): New. + (*subf<mode>3_imm_carry_m1): New. + (subf<mode>3_carry_in): New. + (*subf<mode>3_carry_in_internal): New. + (subf<mode>3_carry_in_0): New. + (subf<mode>3_carry_in_m1): New. + (subf<mode>3_carry_in_xx): New. + +2014-12-10 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/64180 + * config/rs6000/rs6000.md (*add<mode>3_internal1): Rename to + "*add<mode>3". + (*add<mode>3_internal2, *add<mode>3_internal3, and (their splitters): + Delete. + (*add<mode>3_dot, *add<mode>3_dot2): New. + (*add<mode>3_imm_dot, *add<mode>3_imm_dot2): New. + +2014-12-10 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/64180 + * config/rs6000/rs6000.md (*add<mode>3_internal1): Remove addic + alternative. + +2014-12-10 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/64180 + * config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2, + *ctr<mode>_internal5, *ctr<mode>_internal6): Change "r" alternatives + to "b". Increase length. + (splitters for these): Split to cmp+addi instead of addic. + +2014-12-10 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/64180 + * config/rs6000/darwin.md (macho_low_si): Remove "r" alternative. + (macho_low_di): Ditto. + * config/rs6000/rs6000.md (*largetoc_low): Ditto. + (tocref<mode>): Ditto. + (elf_low): Ditto. + * config/rs6000/spe.md (mov_si<mode>_e500_subreg0_elf_low_be): Ditto. + (mov_si<mode>_e500_subreg0_elf_low_le): Ditto. + (mov_si<mode>_e500_subreg4_elf_low_be): Ditto. Reformat condition. + (mov_si<mode>_e500_subreg4_elf_low_le): Ditto. + +2014-12-10 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/64180 + * config/rs6000/rs6000.c (TARGET_MD_ASM_CLOBBERS): Define. + (rs6000_md_asm_clobbers): New function. + +2014-12-10 Felix Yang <felix.yang@huawei.com> + + * config/aarch64/aarch64-protos.h (aarch64_function_profiler): Remove + declaration of removed function. + +2014-12-10 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-im.c + (move_computations_dom_walker::before_dom_children): Clear + SSA_NAME_RANGE_INFO on moved stmts. + +2014-12-10 Martin Liska <mliska@suse.cz> + + * sreal.c (sreal::shift_right): New implementation + for int64_t as m_sig. + (sreal::normalize): Likewise. + (sreal::to_int): Likewise. + (sreal::operator+): Likewise. + (sreal::operator-): Likewise. + (sreal::operator*): Likewise. + (sreal::operator/): Likewise. + (sreal::signedless_minus): Removed. + (sreal::signedless_plus): Removed. + (sreal::debug): const keyword is added. + * sreal.h (sreal::operator<): New implementation + for int64_t as m_sig. + * ipa-inline.c (recursive_inlining): LONG_MIN is replaced + with sreal::min (). + +2014-12-10 Martin Liska <mliska@suse.cz> + + * gimple-iterator.h (gsi_start_bb_nondebug): New function. + * ipa-icf-gimple.c (func_checker::compare_bb): Correct iteration + replaces loop based on precomputed number of non-debug statements. + +2014-12-08 Alexander Ivchenko <alexander.ivchenko@intel.com> + + * config/linux.c (linux_has_ifunc_p): Remove. + * config/linux.h (TARGET_HAS_IFUNC_P): Use default version. + +2014-12-10 Mantas Mikaitis <mantas.mikaitis@arm.com> + + * contrib/check_GNU_style.sh (col): Got rid of cut operation + from the pipe chain and instead added cut inside awk command. + +2014-12-10 Richard Biener <rguenther@suse.de> + + PR tree-optimization/64191 + * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Do not + mark clobbers as necessary. + (eliminate_unnecessary_stmts): Keep clobbers live if we can. + +2014-12-10 Jakub Jelinek <jakub@redhat.com> + + PR target/63594 + * config/i386/sse.md (vec_dupv4sf): Move after + <mask_codefor><avx512>_vec_dup_gpr<mode><mask_name> pattern. + (*vec_dupv4si, *vec_dupv2di): Likewise. + (<mask_codefor><avx512>_vec_dup_mem<mode><mask_name>): Merge into ... + (<mask_codefor><avx512>_vec_dup_gpr<mode><mask_name>): ... this + pattern. + (*vec_dup<mode> AVX2_VEC_DUP_MODE splitter): Disable for + TARGET_AVX512VL (for QI/HI scalar modes only if TARGET_AVX512BW + is set too). + * config/i386/i386.c (enum ix86_builtins): Remove + IX86_BUILTIN_PBROADCASTQ256_MEM_MASK, + IX86_BUILTIN_PBROADCASTQ128_MEM_MASK and + IX86_BUILTIN_PBROADCASTQ512_MEM. + (bdesc_args): Use __builtin_ia32_pbroadcastq512_gpr_mask, + __builtin_ia32_pbroadcastq256_gpr_mask and + __builtin_ia32_pbroadcastq128_gpr_mask instead of *_mem_mask + regardless of OPTION_MASK_ISA_64BIT. + * config/i386/avx512fintrin.h (_mm512_set1_epi64, + _mm512_mask_set1_epi64, _mm512_maskz_set1_epi64): Use *_gpr_mask + builtins regardless of whether TARGET_64BIT is defined or not. + * config/i386/avx512vlintrin.h (_mm256_mask_set1_epi64, + _mm256_maskz_set1_epi64, _mm_mask_set1_epi64, _mm_maskz_set1_epi64): + Likewise. + + * config/i386/sse.md (*mov<mode>_internal, *avx512f_gatherdi<mode>_2): + Use <MODE_SIZE> instead of GET_MODE_SIZE (<MODE>mode). + +2014-12-10 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/53513 + * doc/extend.texi (__builtin_sh_set_fpscr): Fix typo. + +2014-12-10 Marek Polacek <polacek@redhat.com> + + PR tree-optimization/61686 + * tree-ssa-reassoc.c (range_entry_cmp): Use q->high instead of + p->high. + +2014-12-10 Kito Cheng <kito@0xlab.org> + + * doc/libgcc.texi: Update text to match implementation in + libgcc/libgcc2.c + +2014-12-09 Trevor Saunders <tsaunders@mozilla.com> + + * plugin.c, plugin.def, ggc.h, ggc-common.c, gengtype.h, gengtype.c, + gengtype-state.c, gengtype-parse.c, gentype-lex.l, gcc-plugin.h, + doc/plugins.texi, doc/gty.texi: Remove support for if_marked and + param_is. + +2014-12-10 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/53513 + * doc/extend.texi (__builtin_sh_get_fpscr, __builtin_sh_get_fpscr): + Document it. + +2014-12-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR middle-end/64225 + * tree-ssa-reassoc.c (acceptable_pow_call): Disable transformation + for BUILT_IN_POW when flag_errno_math is present. + +2014-12-09 Ilya Verbin <ilya.verbin@intel.com> + + * lto-wrapper.c (compile_offload_image): Start processing in_argv + from 0 instead of 1. + (run_gcc): Put offload objects into offload_argv, put LTO objects and + possible preceding arguments into lto_argv. + Pass offload_argv to compile_images_for_offload_targets instead of argv. + Use lto_argv for LTO recompilation instead of argv. + +2014-12-09 Michael Haubenwallner <michael.haubenwallner@ssi-schaefer.com> + + * doc/install.texi: Describe --with-aix-soname option. + +2014-12-09 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_get_lanedi): Remove. + +2014-12-09 Alan Lawrence <alan.lawrence@arm.com> + + PR target/63870 + * config/aarch64/aarch64-simd-builtins.def (be_checked_get_lane): + Delete. + * config/aarch64/aarch64-simd.md (aarch64_be_checked_get_lane<mode\>): + Delete. + * config/aarch64/arm_neon.h (aarch64_vget_lane_any): Use GCC + vector extensions, __aarch64_lane, __builtin_aarch64_im_lane_boundsi. + (__aarch64_vget_lane_f32, __aarch64_vget_lane_f64, + __aarch64_vget_lane_p8, __aarch64_vget_lane_p16, + __aarch64_vget_lane_s8, __aarch64_vget_lane_s16, + __aarch64_vget_lane_s32, __aarch64_vget_lane_s64, + __aarch64_vget_lane_u8, __aarch64_vget_lane_u16, + __aarch64_vget_lane_u32, __aarch64_vget_lane_u64, + __aarch64_vgetq_lane_f32, __aarch64_vgetq_lane_f64, + __aarch64_vgetq_lane_p8, __aarch64_vgetq_lane_p16, + __aarch64_vgetq_lane_s8, __aarch64_vgetq_lane_s16, + __aarch64_vgetq_lane_s32, __aarch64_vgetq_lane_s64, + __aarch64_vgetq_lane_u8, __aarch64_vgetq_lane_u16, + __aarch64_vgetq_lane_u32, __aarch64_vgetq_lane_u64): Delete. + (__aarch64_vdup_lane_any): Use __aarch64_vget_lane_any, remove + 'q2' argument. + (__aarch64_vdup_lane_f32, __aarch64_vdup_lane_f64, + __aarch64_vdup_lane_p8, __aarch64_vdup_lane_p16, + __aarch64_vdup_lane_s8, __aarch64_vdup_lane_s16, + __aarch64_vdup_lane_s32, __aarch64_vdup_lane_s64, + __aarch64_vdup_lane_u8, __aarch64_vdup_lane_u16, + __aarch64_vdup_lane_u32, __aarch64_vdup_lane_u64, + __aarch64_vdup_laneq_f32, __aarch64_vdup_laneq_f64, + __aarch64_vdup_laneq_p8, __aarch64_vdup_laneq_p16, + __aarch64_vdup_laneq_s8, __aarch64_vdup_laneq_s16, + __aarch64_vdup_laneq_s32, __aarch64_vdup_laneq_s64, + __aarch64_vdup_laneq_u8, __aarch64_vdup_laneq_u16, + __aarch64_vdup_laneq_u32, __aarch64_vdup_laneq_u64): Remove argument + to __aarch64_vdup_lane_any. + (vget_lane_f32, vget_lane_f64, vget_lane_p8, vget_lane_p16, + vget_lane_s8, vget_lane_s16, vget_lane_s32, vget_lane_s64, + vget_lane_u8, vget_lane_u16, vget_lane_u32, vget_lane_u64, + vgetq_lane_f32, vgetq_lane_f64, vgetq_lane_p8, vgetq_lane_p16, + vgetq_lane_s8, vgetq_lane_s16, vgetq_lane_s32, vgetq_lane_s64, + vgetq_lane_u8, vgetq_lane_u16, vgetq_lane_u32, vgetq_lane_u64, + vdupb_lane_p8, vdupb_lane_s8, vdupb_lane_u8, vduph_lane_p16, + vduph_lane_s16, vduph_lane_u16, vdups_lane_f32, vdups_lane_s32, + vdups_lane_u32, vdupb_laneq_p8, vdupb_laneq_s8, vdupb_laneq_u8, + vduph_laneq_p16, vduph_laneq_s16, vduph_laneq_u16, vdups_laneq_f32, + vdups_laneq_s32, vdups_laneq_u32, vdupd_laneq_f64, vdupd_laneq_s64, + vdupd_laneq_u64, vfmas_lane_f32, vfma_laneq_f64, vfmad_laneq_f64, + vfmas_laneq_f32, vfmss_lane_f32, vfms_laneq_f64, vfmsd_laneq_f64, + vfmss_laneq_f32, vmla_lane_f32, vmla_lane_s16, vmla_lane_s32, + vmla_lane_u16, vmla_lane_u32, vmla_laneq_f32, vmla_laneq_s16, + vmla_laneq_s32, vmla_laneq_u16, vmla_laneq_u32, vmlaq_lane_f32, + vmlaq_lane_s16, vmlaq_lane_s32, vmlaq_lane_u16, vmlaq_lane_u32, + vmlaq_laneq_f32, vmlaq_laneq_s16, vmlaq_laneq_s32, vmlaq_laneq_u16, + vmlaq_laneq_u32, vmls_lane_f32, vmls_lane_s16, vmls_lane_s32, + vmls_lane_u16, vmls_lane_u32, vmls_laneq_f32, vmls_laneq_s16, + vmls_laneq_s32, vmls_laneq_u16, vmls_laneq_u32, vmlsq_lane_f32, + vmlsq_lane_s16, vmlsq_lane_s32, vmlsq_lane_u16, vmlsq_lane_u32, + vmlsq_laneq_f32, vmlsq_laneq_s16, vmlsq_laneq_s32, vmlsq_laneq_u16, + vmlsq_laneq_u32, vmul_lane_f32, vmul_lane_s16, vmul_lane_s32, + vmul_lane_u16, vmul_lane_u32, vmuld_lane_f64, vmuld_laneq_f64, + vmuls_lane_f32, vmuls_laneq_f32, vmul_laneq_f32, vmul_laneq_f64, + vmul_laneq_s16, vmul_laneq_s32, vmul_laneq_u16, vmul_laneq_u32, + vmulq_lane_f32, vmulq_lane_s16, vmulq_lane_s32, vmulq_lane_u16, + vmulq_lane_u32, vmulq_laneq_f32, vmulq_laneq_f64, vmulq_laneq_s16, + vmulq_laneq_s32, vmulq_laneq_u16, vmulq_laneq_u32) : Use + __aarch64_vget_lane_any. + +2014-12-09 Alan Lawrence <alan.lawrence@arm.com> + + PR target/63870 + * gcc/config/aarch64-builtins.c (aarch64_simd_expand_args): Update error + message for SIMD_ARG_CONSTANT. + +2014-12-09 Alan Lawrence <alan.lawrence@arm.com> + + PR target/63870 + * config/aarch64/aarch64-builtins.c (aarch64_types_binopv_qualifiers, + TYPES_BINOPV): Delete. + (enum aarch64_builtins): Add AARCH64_BUILTIN_SIMD_LANE_CHECK and + AARCH64_SIMD_PATTERN_START. + (aarch64_init_simd_builtins): Register + __builtin_aarch64_im_lane_boundsi; use AARCH64_SIMD_PATTERN_START. + (aarch64_simd_expand_builtin): Handle AARCH64_BUILTIN_LANE_CHECK; use + AARCH64_SIMD_PATTERN_START. + + * config/aarch64/aarch64-simd.md (aarch64_im_lane_boundsi): Delete. + * config/aarch64/aarch64-simd-builtins.def (im_lane_bound): Delete. + + * config/aarch64/arm_neon.h (__AARCH64_LANE_CHECK): New. + (__aarch64_vget_lane_f64, __aarch64_vget_lane_s64, + __aarch64_vget_lane_u64, __aarch64_vset_lane_any, vdupd_lane_f64, + vdupd_lane_s64, vdupd_lane_u64, vext_f32, vext_f64, vext_p8, vext_p16, + vext_s8, vext_s16, vext_s32, vext_s64, vext_u8, vext_u16, vext_u32, + vext_u64, vextq_f32, vextq_f64, vextq_p8, vextq_p16, vextq_s8, + vextq_s16, vextq_s32, vextq_s64, vextq_u8, vextq_u16, vextq_u32, + vextq_u64, vmulq_lane_f64): Use __AARCH64_LANE_CHECK. + +2014-12-09 Alan Lawrence <alan.lawrence@arm.com> + + PR target/63950 + * config/aarch64/arm_neon.h (__AARCH64_NUM_LANES, __aarch64_lane *2): + New. + (aarch64_vset_lane_any): Redefine using previous, same for BE + LE. + (vset_lane_f32, vset_lane_f64, vset_lane_p8, vset_lane_p16, + vset_lane_s8, vset_lane_s16, vset_lane_s32, vset_lane_s64, + vset_lane_u8, vset_lane_u16, vset_lane_u32, vset_lane_u64): Remove + number of lanes. + (vld1_lane_f32, vld1_lane_f64, vld1_lane_p8, vld1_lane_p16, + vld1_lane_s8, vld1_lane_s16, vld1_lane_s32, vld1_lane_s64, + vld1_lane_u8, vld1_lane_u16, vld1_lane_u32, vld1_lane_u64): Call + __aarch64_vset_lane_any rather than vset_lane_xxx. + +2014-12-09 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/aarch64.md (absdi2): Remove scratch operand by + earlyclobbering result operand. + + * config/aarch64/aarch64-builtins.c (aarch64_types_unop_qualifiers): + Remove final qualifier_internal. + (aarch64_fold_builtin): Stop folding abs builtins, except on floats. + +2014-12-09 Wilco Dijkstra <wilco.dijkstra@arm.com> + + * gcc/config/aarch64/aarch64-protos.h (tune-params): Add reasociation + tuning parameters. + * gcc/config/aarch64/aarch64.c (TARGET_SCHED_REASSOCIATION_WIDTH): + Define. + (aarch64_reassociation_width): New function. + (generic_tunings): Add reassociation tuning parameters. + (cortexa53_tunings): Likewise. + (cortexa57_tunings): Likewise. + (thunderx_tunings): Likewise. + +2014-12-09 Andrew Pinski <apinski@cavium.com> + Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (AARCH64_FUSE_CMP_BRANCH): New define. + (thunderx_tunings): Add AARCH64_FUSE_CMP_BRANCH to fuseable_ops. + (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_CMP_BRANCH. + +2014-12-09 David Malcolm <dmalcolm@redhat.com> + + PR jit/64166 + * dumpfile.c (gcc::dump_manager::get_dump_file_info_by_switch): + New function. + (gcc::dump_manager::get_dump_file_name): Split out bulk of + implementation into a new overloaded variant taking a + dump_file_info *. + * dumpfile.h (gcc::dump_manager::get_dump_file_info_by_switch): + New function. + (gcc::dump_manager::get_dump_file_name): New overloaded variant of + this function, taking a dump_file_info *. + +2014-12-09 Uros Bizjak <ubizjak@gmail.com> + + PR bootstrap/64213 + Revert: + 2014-11-28 H.J. Lu <hongjiu.lu@intel.com> + + PR rtl-optimization/64037 + * combine.c (setup_incoming_promotions): Pass the argument + before any promotions happen to promote_function_mode. + +2014-12-09 Richard Biener <rguenther@suse.de> + + PR tree-optimization/64193 + * tree-ssa-alias.c (walk_non_aliased_vuses): Add valueize parameter + and valueize the VUSE before looking up the def stmt. + * tree-ssa-alias.h (walk_non_aliased_vuses): Adjust prototype. + * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Pass vn_valueize + to walk_non_aliased_vuses. + (vn_reference_lookup): Likewise. + * tree-ssa-dom.c (lookup_avail_expr): Pass NULL as valueize + callback to walk_non_aliased_vuses. + +2014-12-09 Richard Biener <rguenther@suse.de> + + PR middle-end/64199 + * fold-const.c (fold_binary_loc): Use TREE_OVERFLOW_P. + +2014-12-09 Richard Biener <rguenther@suse.de> + + PR tree-optimization/64191 + * tree-vect-stmts.c (vect_stmt_relevant_p): Clobbers are + not relevant (nor are their uses). + +2014-12-09 Ilya Enkovich <ilya.enkovich@intel.com> + + * lto/lto-partition.c (privatize_symbol_name): Correctly + privatize instrumentation clones. + +2014-12-09 Ilya Enkovich <ilya.enkovich@intel.com> + + * lto-cgraph.c (input_cgraph_1): Don't break existing + instrumentation clone references. + * lto/lto-symtab.c (lto_cgraph_replace_node): Redirect + instrumented_version references appropriately. + +2014-12-09 Ilya Enkovich <ilya.enkovich@intel.com> + + PR bootstrap/63995 + * tree-chkp.c (chkp_make_static_bounds): Share bounds var + between nodes sharing assembler name. + +2014-12-08 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/64204 + * config/rs6000/rs6000.c (rs6000_emit_move): Do not split TFmode + constant moves if -mupper-regs-df. + + * config/rs6000/rs6000.md (mov<mode>_64bit_dm): Optimize moving + 0.0L to TFmode. + (movtd_64bit_nodm): Likewise. + (mov<mode>_32bit, FMOVE128 case): Likewise. + +2014-12-08 Sandra Loosemore <sandra@codesourcery.com> + + * simplify-rtx.c (simplify_relational_operation_1): Handle + simplification identities for BICS patterns. + +2014-12-08 Trevor Saunders <tsaunders@mozilla.com> + + * config/nvptx/nvptx.c: Convert htabs to hash_table. + +2014-12-08 David Edelsohn <dje.gcc@gmail.com> + + PR target/64226 + * config/rs6000/rs6000.c (rs6000_secondary_reload_inner) + [SYMBOL_REF]: Do not explicitly call create_TOC_reference for + TARGET_TOC. Always use rs6000_emit_move. + +2014-12-08 Mark Wielaard <mjw@redhat.com> + + PR debug/60782 + * dwarf2out.c (modified_type_die): Handle TYPE_QUAL_ATOMIC. + +2014-11-15 David Wohlferd <dw@LimeGreenSocks.com> + + PR target/61692 + * cfgexpand.c (expand_asm_operands): Count all inline asm params. + +2014-12-08 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * cgraph.h (xstrdup_for_dump): New function. + * cgraph.c (cgraph_node::get_create): Replace use of xstrdup + within fprintf with xstrdup_for_dump. + (cgraph_edge::make_speculative): Likewise. + (cgraph_edge::resolve_speculation): Likewise. + (cgraph_edge::redirect_call_stmt_to_callee): Likewise. + (cgraph_node::dump): Likewise. + * cgraphclones.c (symbol_table::materialize_all_clones): Likewise. + * ipa-cp.c (perhaps_add_new_callers): Likewise. + * ipa-inline.c (report_inline_failed_reason): Likewise. + (want_early_inline_function_p): Likewise. + (edge_badness): Likewise. + (update_edge_key): Likewise. + (flatten_function): Likewise. + (inline_always_inline_functions): Likewise. + * ipa-profile.c (ipa_profile): Likewise. + * ipa-prop.c (ipa_print_node_jump_functions): Likewise. + (ipa_make_edge_direct_to_target): Likewise. + (remove_described_reference): Likewise. + (propagate_controlled_uses): Likewise. + * ipa-utils.c (ipa_merge_profiles): Likewise. + +2014-12-08 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR ipa/64049 + * ipa-polymorphic-call.c + (pa_polymorphic_call_context::ipa_polymorphic_call): Allow RESULT_DECL. + +2014-12-08 Alex Velenko <Alex.Velenko@arm.com> + + * config/aarch64/aarch64.md (and_one_cmpl<mode>3_compare0_no_reuse): + New define_insn. + * (and_one_cmpl_<SHIFT:optab><mode>3_compare0_no_reuse): + Likewise. + +2014-12-08 Felix Yang <felix.yang@huawei.com> + Haijian Zhang <z.zhanghaijian@huawei.com> + Jiji Jiang <jiangjiji@huawei.com> + Pengfei Sui <suipengfei@huawei.com> + + * config/aarch64/arm_neon.h (vrecpe_u32, vrecpeq_u32): Rewrite using + builtin functions. + (vfma_f32, vfmaq_f32, vfmaq_f64, vfma_n_f32, vfmaq_n_f32, vfmaq_n_f64, + vfms_f32, vfmsq_f32, vfmsq_f64): Likewise. + (vhsub_s8, vhsub_u8, vhsub_s16, vhsub_u16, vhsub_s32, vhsub_u32, + vhsubq_s8, vhsubq_u8, vhsubq_s16, vhsubq_u16, vhsubq_s32, vhsubq_u32, + vsubhn_s16, vsubhn_u16, vsubhn_s32, vsubhn_u32, vsubhn_s64, vsubhn_u66, + vrsubhn_s16, vrsubhn_u16, vrsubhn_s32, vrsubhn_u32, vrsubhn_s64, + vrsubhn_u64, vsubhn_high_s16, vsubhn_high_u16, vsubhn_high_s32, + vsubhn_high_u32, vsubhn_high_s64, vsubhn_high_u64, vrsubhn_high_s16, + vrsubhn_high_u16, vrsubhn_high_s32, vrsubhn_high_u32, vrsubhn_high_s64, + vrsubhn_high_u64): Likewise. + * config/aarch64/iterators.md (VDQ_SI): New mode iterator. + * config/aarch64/aarch64.md (define_c_enum "unspec"): Add UNSPEC_URECPE. + * config/aarch64/aarch64-simd.md (aarch64_urecpe<mode>): New pattern. + * config/aarch64/aarch64-simd-builtins.def (shsub, uhsub, subhn, rsubhn, + subhn2, rsubhn2, urecpe): New builtins. + +2014-12-08 Ilya Tocar <ilya.tocar@intel.com> + + * config/i386/i386.c (ix86_expand_vec_perm_vpermi2): Handle v64qi. + * config/i386/sse.md (VEC_PERM_AVX2): Add v64qi. + +2014-12-08 Ilya Tocar <ilya.tocar@intel.com> + + * config/i386/i386.c (expand_vec_perm_broadcast_1): Handle v64qi. + (expand_vec_perm_vpermi2_vpshub2): New. + (ix86_expand_vec_perm_const_1): Use it. + (ix86_vectorize_vec_perm_const_ok): Handle v64qi. + * config/i386/sse.md (VEC_PERM_CONST): Add v64qi. + +2014-12-08 Ilya Enkovich <ilya.enkovich@intel.com> + + * tree-chkp.c (chkp_build_returned_bound): Don't predict + return bounds for strchr calls. + +2014-12-08 Ilya Enkovich <ilya.enkovich@intel.com> + + * tree-chkp.c (chkp_call_returns_bounds_p): New. + (chkp_build_returned_bound): Use zero bounds as + returned by calls not returning bounds. + +2014-12-08 Richard Biener <rguenther@suse.de> + + * builtins.c (fold_builtin_0): Remove unused ignore parameter. + (fold_builtin_1): Likewise. + (fold_builtin_3): Likewise. + (fold_builtin_varargs): Likewise. + (fold_builtin_2): Likewise. Do not fold stpcpy here. + (fold_builtin_n): Adjust. + (fold_builtin_stpcpy): Move to gimple-fold.c. + (gimple_fold_builtin_stpcpy): Moved and gimplified from builtins.c. + (gimple_fold_builtin): Fold stpcpy here. + +2014-12-07 Trevor Saunders <tsaunders@mozilla.com> + + * symtab.c (symtab_node::verify): Check for section attribute before + asserting something isn't in a section and a comdat group. + +2014-12-07 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/50751 + * config/sh/sh.md (extendqihi2): Allow only for TARGET_SH1. + +2014-12-07 Eric Botcazou <ebotcazou@adacore.com> + + * compare-elim.c: Fix head comment. + (conforming_compare): Remove redundant test. + (can_eliminate_compare): New function extracted from... + (before_dom_children): ...here. Use it, replace direct uses of + flag_non_call_exceptions and tidy up. + (maybe_select_cc_mode): Tidy up. + +2014-12-07 Felix Yang <felix.yang@huawei.com> + Shanyao Chen <chenshanyao@huawei.com> + + * config/aarch64/aarch64-simd.md (clrsb<mode>2, popcount<mode>2): New + patterns. + * config/aarch64/aarch64-simd-builtins.def (clrsb, popcount): New + builtins. + * config/aarch64/arm_neon.h (vcls_s8, vcls_s16, vcls_s32, vclsq_s8, + vclsq_s16, vclsq_s32, vcnt_p8, vcnt_s8, vcnt_u8, vcntq_p8, vcntq_s8, + vcntq_u8): Rewrite using builtin functions. + +2014-12-07 Jan Hubicka <hubicka@ucw.cz> + + * symtab.c (symtab_node::equal_address_to): New function. + * cgraph.h (symtab_node::equal_address_to): Declare. + * fold-const.c (fold_comparison, fold_binary_loc): Use it. + * c-family/c-common.c: Refuse weaks for symbols that can not change + visibility. + +2014-12-07 Jonathan Wakely <jwakely@redhat.com> + + * doc/invoke.texi (Warning Options): Fix spelling and grammar. + +2014-12-06 James Greenhalgh <james.greenhalgh@arm.com> + Sebastian Pop <s.pop@samsung.com> + Brian Rzycki <b.rzycki@samsung.com> + + PR tree-optimization/54742 + * params.def (max-fsm-thread-path-insns, max-fsm-thread-length, + max-fsm-thread-paths): New. + + * doc/invoke.texi (max-fsm-thread-path-insns, max-fsm-thread-length, + max-fsm-thread-paths): Documented. + + * tree-cfg.c (split_edge_bb_loc): Export. + * tree-cfg.h (split_edge_bb_loc): Declared extern. + + * tree-ssa-threadedge.c (simplify_control_stmt_condition): Restore the + original value of cond when simplification fails. + (fsm_find_thread_path): New. + (fsm_find_control_statement_thread_paths): New. + (thread_through_normal_block): Call find_control_statement_thread_paths. + + * tree-ssa-threadupdate.c (dump_jump_thread_path): Pretty print + EDGE_FSM_THREAD. + (verify_seme): New. + (duplicate_seme_region): New. + (thread_through_all_blocks): Generate code for EDGE_FSM_THREAD edges + calling duplicate_seme_region. + + * tree-ssa-threadupdate.h (jump_thread_edge_type): Add EDGE_FSM_THREAD. + +2014-12-06 H.J. Lu <hongjiu.lu@intel.com> + + PR target/64200 + * config/i386/i386.c (decide_alg): Don't assert "alg != libcall" + for TARGET_INLINE_STRINGOPS_DYNAMICALLY. + +2014-12-05 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/64170 + * sanopt.c (maybe_optimize_asan_check_ifn): If base_checks is + non-NULL, call maybe_get_dominating_check on it even if g is + non-NULL. + +2014-12-05 Jeff Law <law@redhat.com> + + * doc/md.texi: Note problems using function calls to determine + insn lengths and point readers to a potential workaround. + +2014-12-05 Andreas Schwab <schwab@linux-m68k.org> + + * combine.c (is_parallel_of_n_reg_sets) + (can_split_parallel_of_n_reg_sets): Only define if !HAVE_cc0. + +2014-12-05 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/aarch64-simd-builtins.def (bswap): Use CF2 rather + than CF10 so 2 is appended on the code. + * config/aarch64/aarch64-simd.md (bswap<mode>): Rename to ... + (bswap<mode>2): This so it matches for the optabs. + +2014-12-05 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * regrename.c (find_best_rename_reg): Rename to ... + (find_rename_reg): This. Also add a parameter to skip tick check. + * regrename.h: Likewise. + * config/c6x/c6x.c (try_rename_operands): Adapt to above renaming. + +2014-12-05 Martin Jambor <mjambor@suse.cz> + + PR ipa/64192 + * ipa-prop.c (ipa_compute_jump_functions_for_edge): Convert alignment + from bits to bytes after checking they are byte-aligned. + +2014-12-05 Renlin Li <renlin.li@arm.com> + + * config/aarch64/aarch64-opts.h (AARCH64_CORE): Rename IDENT to SCHED. + * config/aarch64/aarch64.h (AARCH64_CORE): Likewise. + * config/aarch64/aarch64.c (AARCH64_CORE): Rename X to IDENT, + IDENT to SCHED. + +2014-12-05 Bin Cheng <bin.cheng@arm.com> + + * config/aarch64/aarch64.md (load_pair<mode>): Split to + load_pairsi, load_pairdi, load_pairsf and load_pairdf. + (load_pairsi, load_pairdi, load_pairsf, load_pairdf): Split + from load_pair<mode>. New alternative to support int/fp + registers in fp/int mode patterns. + (store_pair<mode>:): Split to store_pairsi, store_pairdi, + store_pairsf and store_pairdi. + (store_pairsi, store_pairdi, store_pairsf, store_pairdf): Split + from store_pair<mode>. New alternative to support int/fp + registers in fp/int mode patterns. + (*load_pair_extendsidi2_aarch64): New pattern. + (*load_pair_zero_extendsidi2_aarch64): New pattern. + (aarch64-ldpstp.md): Include. + * config/aarch64/aarch64-ldpstp.md: New file. + * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp): + New. + (extract_base_offset_in_addr): New. + (aarch64_operands_ok_for_ldpstp): New. + (aarch64_operands_adjust_ok_for_ldpstp): New. + * config/aarch64/aarch64.c (enum sched_fusion_type): New enum. + (TARGET_SCHED_FUSION_PRIORITY): New hook. + (fusion_load_store): New functon. + (extract_base_offset_in_addr): New function. + (aarch64_gen_adjusted_ldpstp): New function. + (aarch64_sched_fusion_priority): New function. + (aarch64_operands_ok_for_ldpstp): New function. + (aarch64_operands_adjust_ok_for_ldpstp): New function. + +2014-12-05 Olivier Hainque <hainque@adacore.com> + + * defaults.h: (DWARF_REG_TO_UNWIND_COLUMN): Define default. + * dwarf2cfi.c (init_one_dwarf_reg_size): Honor + DWARF_REG_TO_UNWIND_COLUMN. + +2014-12-05 Olivier Hainque <hainque@adacore.com> + + * dwarf2cfi.c (init_one_dwarf_reg_size): New helper, processing + one particular reg for expand_builtin_init_dwarf_reg_sizes. + (expand_builtin_init_dwarf_reg_sizes): Rework to use helper and + account for dwarf register spans. + +2014-12-05 Ilya Enkovich <ilya.enkovich@intel.com> + + PR target/64003 + * config/i386/i386.md (*jcc_1_bnd): New. + (*jcc_2_bnd): New. + (jump_bnd): New. + (*jcc_1): Remove bnd prefix. + (*jcc_2): Likewise. + (jump): Likewise. + +2014-12-05 Renlin Li <renlin.li@arm.com> + + * config/aarch64/aarch64.c (aarch64_parse_cpu): Don't define + selected_tune. + (aarch64_override_options): Use selected_cpu's tuning. + +2014-12-05 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/xcoff.h (ASM_OUTPUT_ALIGNED_LOCAL): Append + alignment to section name. Increase default alignment to word. + +2014-12-05 Martin Jambor <mjambor@suse.cz> + + * cgraph.h (cgraph_node): New method expand_all_artificial_thunks. + (cgraph_edge): New method redirect_callee_duplicating_thunks. + * cgraphclones.c (duplicate_thunk_for_node): Donot expand newly + created thunks. + (redirect_edge_duplicating_thunks): Turned into edge method + redirect_callee_duplicating_thunks. + (cgraph_node::expand_all_artificial_thunks): New method. + (create_clone): Call expand_all_artificial_thunks. + * ipa-cp.c (perhaps_add_new_callers): Call + redirect_callee_duplicating_thunks instead of redirect_callee. + Also call expand_all_artificial_thunks. + +2014-12-05 Ilya Enkovich <ilya.enkovich@intel.com> + + PR target/64056 + * doc/sourcebuild.texi: Add mempcpy and stpcpy for Effective-Target + Keywords. + +2014-12-05 Manuel López-Ibáñez <manu@gcc.gnu.org> + + * diagnostic.h (diagnostic_expand_location): New inline function. + * diagnostic.c (diagnostic_build_prefix): Use it. + (diagnostic_show_locus): Likewise. + +2014-12-04 H.J. Lu <hongjiu.lu@intel.com> + + PR bootstrap/64189 + * configure.ac (HAVE_LD_PIE_COPYRELOC): Always define. + * configure: Regenerated. + +2014-12-04 Manuel López-Ibáñez <manu@gcc.gnu.org> + + * diagnostic.c (diagnostic_color_init): New. + * diagnostic.h: Declare. + * gcc.c (driver::global_initializations): Use it. + (driver_handle_option): Handle -fdiagnostics-color_. + * toplev.c: Do not include diagnostic-color.h. + (process_options): Do not initialize color diagnostics here. + * common.opt (fdiagnostics-color=): Add Driver. + * opts-global.c (init_options_once): Initialize color here. + * opts.c (common_handle_option): Use diagnostics_color_init. + * diagnostic-color.h: Fix comment. + +2014-12-04 David Malcolm <dmalcolm@redhat.com> + + * tree-pretty-print.c (INDENT): Rename "buffer" to "pp". + (NIY): Likewise. + (buffer): Rename this variable to... + (tree_pp): ...this. + + (do_niy): Rename param from "buffer" to "pp". + (dump_decl_name): Likewise. + (dump_function_name): Likewise. + (dump_function_declaration): Likewise. + (dump_array_domain): Likewise. + (dump_omp_clause): Likewise. + (dump_omp_clauses): Likewise. + (dump_location): Likewise. + (dump_block_node): Likewise. + (dump_generic_node): Likewise. + (print_declaration): Likewise. + (print_struct_decl): Likewise. + (print_call_name): Likewise. + (pretty_print_string): Likewise. + (newline_and_indent): Likewise. + + (print_generic_decl): Update for renaming of "buffer" to + "tree_pp". + (print_generic_stmt): Likewise. + (print_generic_stmt_indented): Likewise. + (print_generic_expr): Likewise. + (maybe_init_pretty_print): Likewise. + +2014-12-04 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * tree-pretty-print.c: Eliminate include of <new>. + (buffer): Convert this variable from a pretty_printer to a + pretty_printer *. + (initialized): Eliminate this variable in favor of the NULL-ness + of "buffer". + (print_generic_decl): Update for "buffer" becoming a pointer. + (print_generic_stmt): Likewise. + (print_generic_stmt_indented): Likewise. + (print_generic_expr): Likewise. + (maybe_init_pretty_print): Likewise, allocating "buffer" on the + heap and using its non-NULL-ness to ensure idempotency. + +2014-12-04 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * ipa-prop.c (ipa_register_cgraph_hooks): Guard insertion of + ipa_add_new_function on function_insertion_hook_holder being + non-NULL. + * ipa-reference.c (ipa_reference_c_finalize): Remove + node_removal_hook_holder and node_duplication_hook_holder if + they've been added to symtab. + * toplev.c (toplev::finalize): Call ipa_reference_c_finalize + before cgraph_c_finalize so that the former can access "symtab". + +2014-12-04 David Malcolm <dmalcolm@redhat.com> + + * doc/cfg.texi (GIMPLE statement iterators): Add note about + gphi_iterator, and use one in the example. + * doc/gimple.texi (Tuple specific accessors): Add missing + GIMPLE_GOTO section and menu item. + (gimple_build_asm, gimple gimple_build_assign_with_ops) + gimple_call_mark_uninlinable, gimple_call_cannot_inline_p): Remove + description of removed functions. + (gimple_build_assign, gimple_build_bind, gimple_build_call, + gimple_build_call_from_tree, gimple_build_call_vec, + gimple_build_catch, gimple_build_cond, + gimple_build_cond_from_tree, gimple_build_debug_bind, + gimple_build_eh_filter, gimple_build_label, gimple_build_goto, + gimple_build_omp_atomic_load, gimple_build_omp_atomic_store, + gimple_build_omp_continue, gimple_build_omp_critical, + gimple_build_omp_for, gimple_build_omp_parallel, + gimple_build_omp_sections, gimple_build_omp_single, + gimple_build_return, gimple_build_resx, gimple_build_switch, + gimple_build_try): Update return type within description to + reflect changes in gimple.h to using gimple subclasses. + (gimple_build_asm_vec): Update return type, params and + description. + (gimple_asm_ninputs): Update param. + (gimple_asm_noutputs, gimple_asm_nclobbers, gimple_asm_input_op + gimple_asm_set_input_op, gimple_asm_output_op + gimple_asm_set_output_op, gimple_asm_clobber_op, + gimple_asm_set_clobber_op, gimple_asm_string, + gimple_asm_volatile_p, gimple_asm_set_volatile, gimple_bind_vars, + gimple_bind_set_vars, gimple_bind_append_vars, gimple_bind_body, + gimple_bind_set_body, gimple_bind_add_stmt, gimple_bind_add_seq, + gimple_bind_block, gimple_bind_set_block, gimple_call_set_fn, + gimple_call_return_type, gimple_call_set_chain, + gimple_call_set_tail, gimple_call_tail_p, + gimple_call_copy_skip_args, gimple_catch_types, + gimple_catch_types_ptr, gimple_catch_handler, + gimple_catch_set_types, gimple_catch_set_handler, + gimple_cond_set_code, gimple_cond_set_lhs, gimple_cond_set_rhs, + gimple_cond_true_label, gimple_cond_set_true_label, + gimple_cond_set_false_label, gimple_cond_false_label, + gimple_cond_make_false, gimple_cond_make_true, + gimple_eh_filter_set_types, gimple_eh_filter_set_failure, + gimple_eh_must_not_throw_fndecl, + gimple_eh_must_not_throw_set_fndecl, gimple_label_label, + gimple_label_set_label, gimple_goto_set_dest, + gimple_omp_atomic_load_set_lhs, gimple_omp_atomic_load_lhs, + gimple_omp_atomic_load_set_rhs, gimple_omp_atomic_load_rhs, + gimple_omp_atomic_store_set_val, gimple_omp_atomic_store_val, + gimple_omp_continue_control_def, + gimple_omp_continue_control_def_ptr, + gimple_omp_continue_set_control_def, + gimple_omp_continue_control_use, + gimple_omp_continue_control_use_ptr, + gimple_omp_continue_set_control_use, gimple_omp_critical_name, + gimple_omp_critical_name_ptr, gimple_omp_critical_set_name, + gimple_omp_parallel_clauses_ptr, gimple_omp_parallel_set_clauses, + gimple_omp_parallel_child_fn, gimple_omp_parallel_child_fn_ptr, + gimple_omp_parallel_set_child_fn, gimple_omp_parallel_data_arg, + gimple_omp_parallel_data_arg_ptr, + gimple_omp_parallel_set_data_arg, gimple_omp_single_set_clauses, + gimple_phi_set_result, gimple_phi_set_arg, gimple_resx_region, + gimple_resx_set_region, gimple_return_retval, + gimple_return_set_retval, gimple_switch_num_labels, + gimple_switch_set_num_labels, gimple_switch_index, + gimple_switch_set_index, gimple_switch_label, + gimple_switch_set_label, gimple_switch_default_label, + gimple_switch_set_default_label, gimple_try_set_eval, + gimple_try_set_cleanup): Update initial param within description + to reflect changes in gimple.h to using gimple subclasses. + (Adding a new GIMPLE statement code): Update to reflect gimple + statement subclassing. + +2014-12-04 Sriraman Tallam <tmsriram@google.com> + H.J. Lu <hongjiu.lu@intel.com> + + * configure.ac (HAVE_LD_PIE_COPYRELOC): Defined to 1 if + Linux/x86-64 linker supports PIE with copy reloc. + * config.in: Regenerated. + * configure: Likewise. + + * config/i386/i386.c (legitimate_pic_address_disp_p): Allow + pc-relative address for undefined, non-weak, non-function + symbol reference in 64-bit PIE if linker supports PIE with + copy reloc. + + * doc/sourcebuild.texi: Document pie_copyreloc target. + +2014-12-04 Marek Polacek <polacek@redhat.com> + + PR middle-end/56917 + * fold-const.c (fold_unary_loc): Perform the negation in A's type + when transforming ~ (A - 1) or ~ (A + -1) to -A. + +2014-12-04 Tobias Burnus <burnus@net-b.de> + + * Makefile.in: Remove CLOOGLIB and CLOOGINC. + +2014-12-04 Richard Biener <rguenther@suse.de> + + * doc/match-and-simplify.texi: Update for recent changes. + +2014-12-04 Martin Jambor <mjambor@suse.cz> + + * ipa-prop.h (ipa_alignment): New type. + (ipa_jump_func): New field alignment. + (ipcp_transformation_summary) New type. + (ipcp_grow_transformations_if_necessary): Declare. + (ipa_node_agg_replacements): Removed. + (ipcp_transformations): Declare. + (ipcp_get_transformation_summary): New function. + (ipa_get_agg_replacements_for_node): Use it. + * ipa-cp.c (ipcp_param_lattices): New field alignment. + (print_all_lattices): Also print alignment. + (alignment_bottom_p): New function. + (set_alignment_to_bottom): Likewise. + (set_all_contains_variable): Also set alignment to bottom. + (initialize_node_lattices): Likewise. + (propagate_alignment_accross_jump_function): New function. + (propagate_constants_accross_call): Call it. + (ipcp_store_alignment_results): New function. + (ipcp_driver): Call it. + * ipa-prop.c (ipa_node_agg_replacements): Removed. + (ipcp_transformations): New. + (ipa_print_node_jump_functions_for_edge): Also print alignment. + (ipa_set_jf_unknown): New function. + (detect_type_change_from_memory_writes): Use ipa_set_jf_unknown. + (ipa_compute_jump_functions_for_edge): Also calculate alignment. + (update_jump_functions_after_inlining): Use ipa_set_jf_unknown. + (ipcp_grow_transformations_if_necessary): New function. + (ipa_set_node_agg_value_chain): Use ipcp_transformations. + (ipa_node_removal_hook): Likewise. + (ipa_node_duplication_hook): Also duplicate alignment results. + (ipa_write_jump_function): Also stream alignments. + (ipa_read_jump_function): Use ipa_set_jf_unknown, also stream + alignments. + (write_agg_replacement_chain): Renamed to + write_ipcp_transformation_info, also stream alignments. + (read_agg_replacement_chain): Renamed to + read_ipcp_transformation_info, also stream alignments. + (ipa_prop_write_all_agg_replacement): Renamed to + ipcp_write_transformation_summaries. Stream always. + (ipa_prop_read_all_agg_replacement): Renamed to + ipcp_read_transformation_summaries. + (ipcp_update_alignments): New function. + (ipcp_transform_function): Call it, free also alignments. + +2014-12-04 Richard Biener <rguenther@suse.de> + + * gimple-fold.c (replace_stmt_with_simplification): Properly + fail when maybe_push_res_to_seq fails. + +2014-12-04 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> + + * config/aarch64/aarch64.md (define_insn "prefetch"): New. + +2014-12-04 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> + + * doc/install.texi: Remove mentions of cloog and ppl. + * doc/invoke.texi: Likewise + +2014-12-04 Jakub Jelinek <jakub@redhat.com> + + PR c++/56493 + * convert.c (convert_to_real, convert_to_expr, convert_to_complex): + Handle COMPOUND_EXPR. + +2014-12-04 Richard Biener <rguenther@suse.de> + + * builtins.c (target_newline): Export. + (target_percent_s_newline): Likewise. + (fold_builtin_1): Do not fold printf functions here. + (fold_builtin_2): Likewise. + (fold_builtin_3): Likewise, do not fold strncat. + (fold_builtin_strncat): Move to gimple-fold.c. + (fold_builtin_printf): Likewise. + * builtins.h (target_newline): Declare. + (target_percent_s_newline): Likewise. + * gimple-fold.c (gimple_fold_builtin_strncat): Move from + builtins.c and gimplify. + (gimple_fold_builtin_printf): Likewise. + (gimple_fold_builtin): Fold strncat, printf, printf_unlocked, + vprintf, printf_chk and vprintf_chk here. + +2014-12-03 David Edelsohn <dje.gcc@gmail.com> + + * config/rs6000/rs6000.md (floatsidf2_internal): Use std::swap. + (floatunssidf2_internal): Same. + * config/rs6000/rs6000.c (rs6000_emit_vector_compare): Same. + (rs6000_emit_int_cmove): Same. + (rs6000_sched_reorder): Same. + (altivec_expand_vec_perm_const): Same. + (rs6000_expand_vec_perm_const_1): Same. + +2014-12-03 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + PR rtl-optimization/64010 + * reload.c (push_reload): Before reusing a register contained + in an operand as input reload register, ensure that it is not + used in CALL_INSN_FUNCTION_USAGE. + +2014-12-03 Ulrich Drepper <drepper@gmail.com> + + * Makefile.in: Use $(LN_S) instead of $(LN) -s and remove file first + if it exists. + +2014-12-03 Jakub Jelinek <jakub@redhat.com> + + * expmed.c (expand_mult): Use std::swap. + + PR c/59708 + * expmed.c (expand_widening_mult): Return const0_rtx if + coeff is 0. + + * doc/gimple.texi (gimple_build_assign_with_ops): Remove. + (gimple_build_assign): Document the new overloads. + +2014-12-03 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/64019 + * config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Do + not create LO_SUM address for constant addresses if the type can + go in Altivec registers. + +2014-12-03 Manuel López-Ibáñez <manu@gcc.gnu.org> + + PR fortran/44054 + * pretty-print.c (output_buffer::output_buffer): Init flush_p to true. + (pp_flush): Flush only if flush_p. + (pp_really_flush): New. + * pretty-print.h (struct output_buffer): Add flush_p. + (pp_really_flush): Declare. + +2014-12-03 Jakub Jelinek <jakub@redhat.com> + + * Makefile.in (ALL_HOST_BACKEND_OBJS): Add $(GENGTYPE_OBJS), + gcc-ar.o, gcc-nm.o and gcc-ranlib.o. + (GENGTYPE_OBJS): New. + (gengtype-lex.o, gengtype-parse.o, gengtype-state.o, gengtype.o): + Remove explicit dependencies. + (CFLAGS-gengtype-lex.o, CFLAGS-gengtype-parse.o, + CFLAGS-gengtype-state.o, CFLAGS-gengtype.o): Add -DHOST_GENERATOR_FILE + instead of -DGENERATOR_FILE. + (CFLAGS-errors.o): New. + * gengtype.c: Instead of testing GENERATOR_FILE define, test + HOST_GENERATOR_FILE. If defined, include config.h and define + GENERATOR_FILE afterwards, otherwise include bconfig.h. + * gengtype-parse.c: Likewise. + * gengtype-state.c: Likewise. + * gengtype-lex.l: Likewise. + * errors.c: Likewise. + +2014-12-03 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/epiphany/epiphany.c (epiphany_override_options): + If TARGET_SOFT_CMPSF is not enabled, set flag_finite_math_only. + * config/epiphany/epiphany.md (mov<mode>cc): Don't use + reverse_condition_maybe_unordered if flag_finite_math_only is set. + +2014-12-03 Andrew Stubbs <ams@codesourcery.com> + + Revert: + + 2014-09-17 Andrew Stubbs <ams@codesourcery.com> + * config/arm/arm.c (arm_option_override): Reject -mfpu=neon + when architecture is older than ARMv7. + +2014-12-03 Richard Biener <rguenther@suse.de> + + * builtins.c (target_percent_c): Export. + (fold_builtin_fprintf): Move to gimple-fold.c. + (fold_builtin_2): Do not fold fprintf functions. + (fold_builtin_3): Likewise. + (fold_builtin_4): Remove. + (fold_builtin_n): Do not call fold_builtin_4. + * builtins.h (target_percent_c): Declare. + * gimple-fold.c (gimple_fold_builtin_fprintf): Move from + builtins.c and gimplify. + (gimple_fold_builtin): Fold fprintf, fprintf_unlocked, vfprintf, + fprintf_chk and vfprintf_chk here. + +2014-12-03 Martin Jambor <mjambor@suse.cz> + + PR ipa/64153 + * ipa-inline-analysis.c (evaluate_conditions_for_known_args): Check + type sizes before view_converting. + +2014-12-03 H.J. Lu <hongjiu.lu@intel.com> + + PR rtl-optimization/64151 + PR rtl-optimization/64156 + * ira-costs.c (scan_one_insn): Revert r218266. + +2014-12-03 Richard Biener <rguenther@suse.de> + + * builtins.c (fold_builtin_fpclassify): Change to take + array of arguments instead of CALL_EXPR tree. + (MAX_ARGS_TO_FOLD_BUILTIN): Remove. + (fold_builtin_n): Dispatch to fold_builtin_varargs. + (fold_call_expr): Always use fold_builtin_n. + (fold_builtin_call_array): Change to not build the unfolded call, + always use fold_builtin_n. + (fold_builtin_varargs): Change to take array of arguments instead + of CALL_EXPR tree. + (fold_call_stmt): Always use fold_builtin_n. + * tree.c (build_call_expr_loc_array): Use fold_build_call_array_loc. + * fold-const.c (fold_build_call_array_loc): Build the call + if fold_builtin_call_array returned NULL_TREE. + * gimple-fold.c (gimple_fold_stmt_to_constant_1): Do not build + a CALL_EXPR and use fold_builtin_call_array instead of + fold_call_expr. + +2014-12-03 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>, orn<mode>3, + bic<mode>3, add<mode>3, sub<mode>3, neg<mode>2, abs<mode>2, and<mode>3, + ior<mode>3, xor<mode>3, one_cmpl<mode>2, + aarch64_simd_lshr<mode> ,arch64_simd_ashr<mode>, + aarch64_simd_imm_shl<mode>, aarch64_simd_reg_sshl<mode>, + aarch64_simd_reg_shl<mode>_unsigned, aarch64_simd_reg_shr<mode>_signed, + ashl<mode>3, lshr<mode>3, ashr<mode>3, vashl<mode>3, + reduc_plus_scal_<mode>, aarch64_vcond_internal<mode><mode>, + vcondu<mode><mode>, aarch64_cm<optab><mode>, aarch64_cmtst<mode>): + Change VDQ to VDQ_I. + + (mul<mode>3): Change VDQM to VDQ_BHSI. + (aarch64_simd_vec_set<mode>,vashr<mode>3, vlshr<mode>3, vec_set<mode>, + aarch64_mla<mode>, aarch64_mls<mode>, <su><maxmin><mode>3, + aarch64_<sur>h<addsub><mode>): Change VQ_S to VDQ_BHSI. + + (*aarch64_<su>mlal<mode>, *aarch64_<su>mlsl<mode>, + aarch64_<ANY_EXTEND:su><ADDSUB:optab>l<mode>, + aarch64_<ANY_EXTEND:su><ADDSUB:optab>w<mode>, aarch64_<sur>shll_n<mode>): + Change VDW to VD_BHSI. + (*aarch64_combinez<mode>, *aarch64_combinez_be<mode>): + Change VDIC to VD_BHSI. + + * config/aarch64/aarch64-simd-builtins.def (saddl, uaddl, ssubl, usubl, + saddw, uaddw, ssubw, usubw, shadd, uhadd, srhadd, urhadd, sshll_n, + ushll_n): Change BUILTIN_VDW to BUILTIN_VD_BHSI. + + * config/aarch64/iterators.md (SDQ_I, VDQ, VQ_S, VSDQ_I_BHSI, VDQM, VDW, + VDIC, VDQQHS): Remove. + (Vwtype): Update comment (changing VDW to VD_BHSI). + +2014-12-03 Richard Biener <rguenther@suse.de> + + PR middle-end/14541 + * builtins.c (fold_builtin_logarithm): Implement simplifications ... + * match.pd: ... here as patterns. + +2014-12-03 Prachi Godbole <prachi.godbole@imgtec.com> + + * config/mips/p5600.md (define_automaton, define_cpu_unit): Replace + p5600_agen_pipe and p5600_alu_pipe with p5600_agen_alq_pipe. + (p5600_int_arith_1, p5600_int_arith_2, p5600_int_arith_4): Change + reservation order. + +2014-12-03 Tom de Vries <tom@codesourcery.com> + + PR rtl-optimization/63957 + * doc/invoke.texi: Replace -fuse-caller-save with -fipa-ra. + * final.c (rest_of_handle_final): Replace flag_use_caller_save with + flag_ipa_ra. + (get_call_reg_set_usage): Same. + * lra-assigns.c (lra_assign): Same. + * lra-constraints.c (need_for_call_save_p): Same. + * lra-lives.c (process_bb_lives): Same. + * lra.c (lra): Same. + * calls.c (expand_call): Same. + (emit_library_call_value_1): Same. + * config/arm/arm.c (arm_option_override): Same. + * opts.c (default_options_table): Replace OPT_fuse_caller_save with + OPT_fipa_ra. + * target.def (call_fusage_contains_non_callee_clobbers): Replace + fuse-caller-save with fipa-ra. + * doc/tm.texi (TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS): Same. + * common.opt: Same. + +2014-12-03 Yury Gribov <y.gribov@samsung.com> + + * sanopt.c (maybe_get_single_definition): New function. + (maybe_get_dominating_check): Ditto. + (can_remove_asan_check): Ditto. + (struct tree_map_traits): New struct. + (struct sanopt_ctx): Use custom traits for asan_check_map. + (maybe_optimize_ubsan_null_ifn): Move code to + maybe_get_dominating_check. + (maybe_optimize_asan_check_ifn): Move code and take non-SSA expressions + into account when optimizing. + (sanopt_optimize_walker): Optimize ASan checks even when + recovering. + +2014-12-03 Ilya Enkovich <ilya.enkovich@intel.com> + + * config/i386/constraints.md (Yr): New. + * config/i386/i386.h (reg_class): Add NO_REX_SSE_REGS. + (REG_CLASS_NAMES): Likewise. + (REG_CLASS_CONTENTS): Likewise. + * config/i386/sse.md (*vec_concatv2sf_sse4_1): Add alternatives + which use only NO_REX_SSE_REGS. + (vec_set<mode>_0): Likewise. + (*vec_setv4sf_sse4_1): Likewise. + (sse4_1_insertps): Likewise. + (*sse4_1_extractps): Likewise. + (*sse4_1_mulv2siv2di3<mask_name>): Likewise. + (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise. + (*sse4_1_<code><mode>3<mask_name>): Likewise. + (*sse4_1_<code><mode>3): Likewise. + (*sse4_1_eqv2di3): Likewise. + (sse4_2_gtv2di3): Likewise. + (*vec_extractv4si): Likewise. + (*vec_concatv2si_sse4_1): Likewise. + (vec_concatv2di): Likewise. + (<sse4_1>_blend<ssemodesuffix><avxsizesuffix>): Likewise. + (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>): Likewise. + (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise. + (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise. + (<sse4_1_avx2>_mpsadbw): Likewise. + (<sse4_1_avx2>packusdw<mask_name>): Likewise. + (<sse4_1_avx2>_pblendvb): Likewise. + (sse4_1_pblendw): Likewise. + (sse4_1_phminposuw): Likewise. + (sse4_1_<code>v8qiv8hi2<mask_name>): Likewise. + (sse4_1_<code>v4qiv4si2<mask_name>): Likewise. + (sse4_1_<code>v4hiv4si2<mask_name>): Likewise. + (sse4_1_<code>v2qiv2di2<mask_name>): Likewise. + (sse4_1_<code>v2hiv2di2<mask_name>): Likewise. + (sse4_1_<code>v2siv2di2<mask_name>): Likewise. + (sse4_1_ptest): Likewise. + (<sse4_1>_round<ssemodesuffix><avxsizesuffix>): Likewise. + (sse4_1_round<ssescalarmodesuffix>): Likewise. + * config/i386/subst.md (mask_prefix4): New. + * config/i386/x86-tune.def (X86_TUNE_AVOID_4BYTE_PREFIXES): New. + +2014-12-03 Segher Boessenkool <segher@kernel.crashing.org> + + PR rtl-optimization/52714 + * combine.c (try_combine): Allow combining two insns into two + new insns if at least one of those is a noop. + +2014-12-03 Bin Cheng <bin.cheng@arm.com> + + * target.def (fusion_priority): Wrap code with @smallexample. + * doc/tm.texi: Regenerated. + +2014-12-03 Manuel López-Ibáñez <manu@gcc.gnu.org> + + * diagnostic.c (diagnostic_show_locus): Honor override_column when + placing the caret. + +2014-12-02 Dmitry Vyukov <dvyukov@google.com> + + * asan.c: (asan_finish_file): Use default priority for constructors + in kernel mode. + +2014-12-02 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + PR target/64115 + * config/rs6000/rs6000.c (rs6000_delegitimize_address): Remove + invalid UNSPEC_TOCREL sanity check under ENABLE_CHECKING. + +2014-12-02 H.J. Lu <hongjiu.lu@intel.com> + + PR target/64108 + * config/i386/i386.c (decide_alg): Stop only if there aren't + any usable algorithms. + +2014-12-02 Tom de Vries <tom@codesourcery.com> + + PR rtl-optimization/63718 + * config/arm/arm.c (arm_option_override): Disable fuse-caller-save for + Thumb1. + +2014-12-02 Richard Biener <rguenther@suse.de> + + * match.pd: When combining divisions exclude the degenerate + case involving INT_MIN from overflow handling. + +2014-12-02 Wilco Dijkstra <wilco.dijkstra@arm.com> + + * ira-costs.c (scan_one_insn): Improve spill cost adjustment. + +2014-12-02 Martin Jambor <mjambor@suse.cz> + + PR ipa/63814 + * ipa-cp.c (same_node_or_its_all_contexts_clone_p): New function. + (cgraph_edge_brings_value_p): New parameter dest, use + same_node_or_its_all_contexts_clone_p and check availability. + (cgraph_edge_brings_value_p): Likewise. + (get_info_about_necessary_edges): New parameter dest, pass it to + cgraph_edge_brings_value_p. Update caller. + (gather_edges_for_value): Likewise. + (perhaps_add_new_callers): Use cgraph_edge_brings_value_p to check + both the destination and availability. + +2014-12-02 Uros Bizjak <ubizjak@gmail.com> + + PR target/64113 + * config/alpha/alpha.md (call_value_osf_tlsgd): Do not split insn + using post-reload splitter. Use peephole2 pass instead. + (call_value_osf_tlsldm): Ditto. + (TLS_CALL): New int iterator. + (tls): New int attribute. + (call_value_osf_<tls>): Merge insn pattern from call_value_osf_tlsgd + and call_value_tlsldm using TLS_CALL int iterator. + +2014-12-02 Richard Biener <rguenther@suse.de> + Prathamesh Kulkarni <bilbotheelffriend@gmail.com> + + * genmatch.c: Include hash-set.h. + (fatal_at): Add source_location overload. + (parser::record_operlist): New method. + (parser::push_simplify): Likewise. + (parser::oper_lists_set): New member. + (parser::oper_lists): Likewise. + (parser::parse_operation): Record seen operator list references. + (parser::parse_c_expr): Likewise. + (parser::parse_simplify): Init oper_lists_set and oper_lists + and use push_simplify. + (parser::parser): Init oper_lists_set and oper_lists. + +2014-12-02 Richard Biener <rguenther@suse.de> + + * match.pd: Restrict division combining to trunc_div and + exact_div. + +2014-12-02 Jakub Jelinek <jakub@redhat.com> + + * config/sparc/sparc.c (sparc_atomic_assign_expand_fenv): + Remove NULL last argument from create_tmp_var calls. + * config/mips/mips.c (mips_atomic_assign_expand_fenv): Likewise. + * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Likewise. + * config/i386/i386.c (add_condition_to_bb, + ix86_atomic_assign_expand_fenv): Likewise. + * config/mep/mep.c (mep_gimplify_va_arg_expr): Likewise. + * config/xtensa/xtensa.c (xtensa_gimplify_va_arg_expr): Likewise. + * config/aarch64/aarch64-builtins.c + (aarch64_atomic_assign_expand_fenv): Likewise. + * config/stormy16/stormy16.c (xstormy16_gimplify_va_arg_expr): + Likewise. + * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Likewise. + * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Likewise. + * config/sh/sh.c (sh_gimplify_va_arg_expr): Likewise. + + * config/alpha/alpha.c (alpha_gimple_fold_builtin): Use + gimple_build_assign instead of gimple_build_assign_with_ops and swap + the order of first two arguments. + * config/aarch64/aarch64-builtins.c (aarch64_gimple_fold_builtin): + Likewise. Remove last NULL_TREE argument. + +2014-12-01 Segher Boessenkool <segher@kernel.crashing.org> + + PR rtl-optimization/59278 + * combine (reg_dead_at_p): Consider REG_UNUSED notes. + +2014-12-01 Segher Boessenkool <segher@kernel.crashing.org> + + * combine.c (try_combine): Use is_parallel_of_n_reg_sets some more. + +2014-12-01 Segher Boessenkool <segher@kernel.crashing.org> + + * combine.c (is_parallel_of_n_reg_sets): New function. + (can_split_parallel_of_n_reg_sets): New function. + (try_combine): If I2 is a PARALLEL of two SETs, split it into + two insns if possible. + +2014-12-01 Tobias Burnus <burnus@net-b.de> + Jack Howarth <howarth@bromo.med.uc.edu> + + PR middle-end/64017 + * configure.ac (ac_has_isl_schedule_constraints_compute_schedule): + New check. + * doc/install.texi (ISL): Permit ISL 0.14. + * graphite-optimize-isl.c (getScheduleForBandList, optimize_isl): + Conditionally use ISL 0.13+ functions. + * graphite-interchange.c: Make 'extern "C"' conditional. + * graphite-isl-ast-to-gimple.c: Ditto. + * graphite-poly.c: Ditto. + * graphite-sese-to-poly.c: Ditto. + * config.in: Regenerate. + * gcc/configure: Regenerate. + +2014-12-01 Segher Boessenkool <segher@kernel.crashing.org> + + * combine.c (distribute_links): Handle multiple SETs. + +2014-12-01 Segher Boessenkool <segher@kernel.crashing.org> + + * combine.c (struct insn_link): New field `regno'. + (alloc_insn_link): New parameter `regno'. Use it. + (find_single_use): Check the new field. + (can_combine_def_p, can_combine_use_p): New functions. Split + off from ... + (create_log_links): ... here. Correct data type of `regno'. + Adjust call to alloc_insn_link. + (adjust_for_new_dest): Find regno, use it in call to + alloc_insn_link. + (try_combine): Check reg_used_between_p when combining a PARALLEL + as earlier insn. Adjust call to alloc_insn_link. + (distribute_links): Check the new field. + +2014-12-01 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * real.c (real_from_string): Add missing mpfr_clear. + +2014-12-01 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * tree-ssa-math-opts.c (execute_cse_sincos_1): Fix a missing + release of stmts by converting it to an auto_vec. + +2014-12-01 Richard Biener <rguenther@suse.de> + + * Makefile.in (gimple-match.o-warn): Use -Wno-unused instead of + -Wno-unused-variable and -Wno-unused-but-set-variable to restore + bootstrap with old GCC. + (generic-match.o-warn): Likewise. + +2014-12-01 Richard Biener <rguenther@suse.de> + + * fold-const.c (const_binop): Handle POINTER_PLUS_EXPR. + Properly handle FIXED_CST shifts by INTEGER_CST. + (const_binop): Move COMPLEX_EXPR, VEC_PACK_TRUNC_EXPR, + VEC_PACK_FIX_TRUNC_EXPR, VEC_WIDEN_MULT_LO_EXPR, + VEC_WIDEN_MULT_HI_EXPR, VEC_WIDEN_MULT_EVEN_EXPR and + VEC_WIDEN_MULT_ODD_EXPR handling here from ... + (fold_binary_loc): ... here. Call const_binop overload + with result type. + +2014-12-01 Marek Polacek <polacek@redhat.com> + Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/64121 + * ubsan.c (instrument_object_size): Stop searching if the base + occurs in abnormal phi. + +2014-12-01 Marek Polacek <polacek@redhat.com> + + PR sanitizer/63956 + * ubsan.c (is_ubsan_builtin_p): Check also built-in class. + +2014-12-01 Jakub Jelinek <jakub@redhat.com> + + * gimple.h (gimple_build_assign_stat): Remove prototype. + (gimple_build_assign): Remove define. Add overload prototypes + with tree lhs and either a tree rhs, or enum tree_code and + 1, 2 or 3 tree operands. + * gimple.c (gimple_build_assign_stat): Renamed to... + (gimple_build_assign): ... this. Add overloads with + enum tree_code and 1, 2 or 3 tree operands. + (gimple_build_assign_with_ops): Remove 1 and 2 operand overloads. + Rename the 3 operand overload to ... + (gimple_build_assign_1): ... this. Make it static inline. + * tree-ssa-strlen.c (get_string_length): Use gimple_build_assign + instead of gimple_build_assign_with_ops, swap the order of first + two arguments and adjust formatting where necessary. + * tree-vect-slp.c (vect_get_constant_vectors, + vect_create_mask_and_perm): Likewise. + * tree-ssa-forwprop.c (simplify_rotate): Likewise. + * asan.c (build_shadow_mem_access, maybe_create_ssa_name, + maybe_cast_to_ptrmode, asan_expand_check_ifn): Likewise. + * tsan.c (instrument_builtin_call): Likewise. + * tree-chkp.c (chkp_compute_bounds_for_assignment, + chkp_generate_extern_var_bounds): Likewise. + * tree-loop-distribution.c (generate_memset_builtin): Likewise. + * tree-ssa-loop-im.c (rewrite_reciprocal): Likewise. + * gimple-builder.c (build_assign, build_type_cast): Likewise. + * tree-vect-loop-manip.c (vect_create_cond_for_align_checks): Likewise. + * value-prof.c (gimple_divmod_fixed_value, gimple_mod_pow2, + gimple_mod_subtract): Likewise. + * gimple-match-head.c (maybe_push_res_to_seq): Likewise. + * tree-vect-patterns.c (vect_recog_dot_prod_pattern, + vect_recog_sad_pattern, vect_handle_widen_op_by_const, + vect_recog_widen_mult_pattern, vect_recog_pow_pattern, + vect_recog_widen_sum_pattern, vect_operation_fits_smaller_type, + vect_recog_over_widening_pattern, vect_recog_widen_shift_pattern, + vect_recog_rotate_pattern, vect_recog_vector_vector_shift_pattern, + vect_recog_divmod_pattern, vect_recog_mixed_size_cond_pattern, + adjust_bool_pattern_cast, adjust_bool_pattern, + vect_recog_bool_pattern): Likewise. + * gimple-ssa-strength-reduction.c (create_add_on_incoming_edge, + insert_initializers, introduce_cast_before_cand, + replace_one_candidate): Likewise. + * tree-ssa-math-opts.c (insert_reciprocals, powi_as_mults_1, + powi_as_mults, build_and_insert_binop, build_and_insert_cast, + pass_cse_sincos::execute, bswap_replace, convert_mult_to_fma): + Likewise. + * tree-tailcall.c (adjust_return_value_with_ops, + update_accumulator_with_ops): Likewise. + * tree-predcom.c (reassociate_to_the_same_stmt): Likewise. + * tree-ssa-reassoc.c (build_and_add_sum, + optimize_range_tests_to_bit_test, update_ops, + maybe_optimize_range_tests, rewrite_expr_tree, linearize_expr, + negate_value, repropagate_negates, attempt_builtin_powi, + reassociate_bb): Likewise. + * tree-vect-loop.c (vect_is_simple_reduction_1, + get_initial_def_for_induction, vect_create_epilog_for_reduction): + Likewise. + * ipa-split.c (split_function): Likewise. + * tree-ssa-phiopt.c (conditional_replacement, minmax_replacement, + abs_replacement, neg_replacement): Likewise. + * tree-profile.c (gimple_gen_edge_profiler): Likewise. + * tree-vrp.c (simplify_truth_ops_using_ranges, + simplify_float_conversion_using_ranges, + simplify_internal_call_using_ranges): Likewise. + * gimple-fold.c (rewrite_to_defined_overflow, gimple_build): Likewise. + * tree-vect-generic.c (expand_vector_divmod, + optimize_vector_constructor): Likewise. + * ubsan.c (ubsan_expand_null_ifn, ubsan_expand_objsize_ifn, + instrument_bool_enum_load): Likewise. + * tree-ssa-loop-manip.c (create_iv): Likewise. + * omp-low.c (lower_rec_input_clauses, expand_omp_for_generic, + expand_omp_for_static_nochunk, expand_omp_for_static_chunk, + expand_cilk_for, simd_clone_adjust): Likewise. + * trans-mem.c (expand_transaction): Likewise. + * tree-vect-data-refs.c (bump_vector_ptr, vect_permute_store_chain, + vect_setup_realignment, vect_permute_load_chain, + vect_shift_permute_load_chain): Likewise. + * tree-vect-stmts.c (vect_init_vector, vectorizable_mask_load_store, + vectorizable_simd_clone_call, vect_gen_widened_results_half, + vect_create_vectorized_demotion_stmts, vectorizable_conversion, + vectorizable_shift, vectorizable_operation, vectorizable_store, + permute_vec_elements, vectorizable_load): Likewise. + +2014-12-01 Richard Biener <rguenther@suse.de> + + PR middle-end/64111 + * tree.c (int_cst_hasher::hash): Use TYPE_UID instead of + htab_hash_pointer to not break PCH. + +2014-12-01 Richard Biener <rguenther@suse.de> + + PR tree-optimization/15346 + * Makefile.in (gimple-match.o-warn): Remove -Wno-unused-parameter, + add -Wno-unused-but-set-variable. + * match.pd: Combine two successive divisions. + +2014-12-01 Richard Biener <rguenther@suse.de> + + PR middle-end/64126 + * match.pd: Allow conversions in ~A + 1 -> -A, add -A - 1 -> ~A + and -1 - A -> ~A. + * fold-const.c (fold_binary_loc): Remove transforms here. + +2014-12-01 Maciej W. Rozycki <macro@codesourcery.com> + + * config/mips/mips.c (mips16_build_call_stub): Move the save of + the return address in $18 ahead of passing arguments to FPRs. + +2014-12-01 Ilya Enkovich <ilya.enkovich@intel.com> + + PR target/64055 + * tree-chkp.c (chkp_find_bound_slots_1): Allow non constant + values in array domain. + +2014-12-01 Yuri Rumyantsev <ysrumyan@gmail.com> + + PR tree-optimization/63941 + * tree-if-conv.c (add_to_predicate_list): Delete wrong assertion that + DOM_BB has non-true predicate, conditionally set non-true predicate + for BB. + +2014-12-01 Martin Jambor <mjambor@suse.cz> + + PR ipa/63551 + * ipa-inline-analysis.c (evaluate_conditions_for_known_args): Convert + value of the argument to the type of the value in the condition. + +2014-12-01 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/63986 + PR target/51244 + * config/sh/sh.c (sh_unspec_insn_p, + sh_insn_operands_modified_between_p): New functions. + (sh_split_movrt_negc_to_movt_xor): Do not delete insn if its operands + are modified or if it has side effects, may trap or is volatile. + +2014-11-29 Jakub Jelinek <jakub@redhat.com> + + * gimple-expr.h (create_tmp_var_raw, create_tmp_var, + create_tmp_reg): Add default NULL value to last argument. + * tree-ssanames.h (make_ssa_name, copy_ssa_name): Likewise. + * gimple-low.c (lower_builtin_posix_memalign): Remove NULL + last argument from create_tmp_var_raw, create_tmp_var, + create_tmp_reg, make_ssa_name and copy_ssa_name calls. + * tree-ssa-strlen.c (get_string_length): Likewise. + * tree-emutls.c (gen_emutls_addr, lower_emutls_1): Likewise. + * tree-ssa-phiprop.c (phiprop_insert_phi): Likewise. + * tree-vect-slp.c (vect_get_constant_vectors): Likewise. + * ipa-prop.c (ipa_modify_call_arguments): Likewise. + * tree-ssa-forwprop.c (simplify_rotate): Likewise. + * tree-ssa-ccp.c (fold_builtin_alloca_with_align): Likewise. + * asan.c (build_shadow_mem_access, maybe_create_ssa_name, + maybe_cast_to_ptrmode, asan_expand_check_ifn): Likewise. + * tsan.c (instrument_expr, instrument_builtin_call, + instrument_func_entry): Likewise. + * varpool.c (add_new_static_var): Likewise. + * tree-loop-distribution.c (generate_memset_builtin): Likewise. + * gimplify.c (internal_get_tmp_var, gimplify_return_expr, + gimplify_modify_expr_to_memcpy, gimplify_modify_expr_to_memset, + gimplify_init_ctor_eval_range, gimplify_init_constructor, + gimplify_omp_atomic, gimplify_expr): Likewise. + * gimple-builder.c (build_assign, build_type_cast): Likewise. + * tree-vect-loop-manip.c (slpeel_update_phi_nodes_for_guard1, + slpeel_update_phi_nodes_for_guard2, slpeel_tree_peel_loop_to_edge, + vect_loop_versioning): Likewise. + * tree-if-conv.c (version_loop_for_if_conversion): Likewise. + * gimple-match-head.c (maybe_push_res_to_seq): Likewise. + * tree-vect-patterns.c (vect_handle_widen_op_by_const, + vect_recog_widen_mult_pattern, vect_operation_fits_smaller_type, + vect_recog_over_widening_pattern): Likewise. + * tree-sra.c (build_ref_for_offset, create_access_replacement): + Likewise. + * tree-cfg.c (make_blocks): Likewise. + * tree-eh.c (lower_eh_constructs_2, lower_resx, lower_eh_dispatch): + Likewise. + * tree-ssa-propagate.c (update_call_from_tree): Likewise. + * tree-complex.c (get_component_ssa_name, expand_complex_div_wide): + Likewise. + * tree-ssa-math-opts.c (build_and_insert_cast): Likewise. + * tree-tailcall.c (update_accumulator_with_ops): Likewise. + * tree-predcom.c (initialize_root_vars, initialize_root_vars_lm, + execute_load_motion, reassociate_to_the_same_stmt): Likewise. + * tree-ssa-reassoc.c (build_and_add_sum, + optimize_range_tests_to_bit_test, update_ops, + maybe_optimize_range_tests, rewrite_expr_tree, linearize_expr, + negate_value, repropagate_negates): Likewise. + * tree-vect-loop.c (vect_is_simple_reduction_1, + vect_create_epilog_for_reduction): Likewise. + * ipa-split.c (split_function): Likewise. + * tree-inline.c (remap_ssa_name, setup_one_parameter, + declare_return_variable, tree_function_versioning): Likewise. + * tree-cfgcleanup.c (fixup_noreturn_call): Likewise. + * cfgexpand.c (update_alias_info_with_stack_vars, expand_used_vars): + Likewise. + * tree-ssa-phiopt.c (conditional_replacement, abs_replacement, + neg_replacement): Likewise. + * gimplify-me.c (force_gimple_operand_1, gimple_regimplify_operands): + Likewise. + * tree-vrp.c (simplify_truth_ops_using_ranges, + simplify_float_conversion_using_ranges, + simplify_internal_call_using_ranges): Likewise. + * tree-switch-conversion.c (emit_case_bit_tests, + build_one_array, build_arrays, gen_def_assigns): Likewise. + * gimple-fold.c (gimple_fold_builtin_memory_op, + gimple_fold_builtin_strcat, gimple_fold_call, gimple_build): Likewise. + * tree-vect-generic.c (expand_vector_divmod, + optimize_vector_constructor): Likewise. + * ubsan.c (ubsan_encode_value, ubsan_expand_null_ifn, + ubsan_expand_objsize_ifn, instrument_si_overflow, + instrument_bool_enum_load, instrument_nonnull_arg): Likewise. + * tree-outof-ssa.c (insert_backedge_copies): Likewise. + * tree-ssa-loop-manip.c (create_iv, + tree_transform_and_unroll_loop): Likewise. + * omp-low.c (scan_omp_parallel, lower_rec_simd_input_clauses, + lower_rec_input_clauses, lower_lastprivate_clauses, + expand_parallel_call, expand_omp_for_static_chunk, + expand_omp_atomic_pipeline, expand_omp_target, + maybe_add_implicit_barrier_cancel, lower_omp_single_simple, + lower_omp_critical, lower_omp_for, task_copyfn_copy_decl, + lower_depend_clauses, lower_omp_target, lower_omp_1, + ipa_simd_modify_stmt_ops, simd_clone_adjust): Likewise. + * tree-parloops.c (take_address_of, create_phi_for_local_result, + create_call_for_reduction_1, separate_decls_in_region, + create_parallel_loop): Likewise. + * graphite-sese-to-poly.c (rewrite_cross_bb_scalar_dependence, + handle_scalar_deps_crossing_scop_limits): Likewise. + * trans-mem.c (lower_transaction, build_tm_load, build_tm_store, + expand_assign_tm, expand_call_tm, expand_transaction, + ipa_tm_insert_gettmclone_call): Likewise. + * tree-vect-data-refs.c (bump_vector_ptr, vect_setup_realignment): + Likewise. + * tree-vect-stmts.c (vect_init_vector, vectorizable_mask_load_store, + vectorizable_call, vectorizable_simd_clone_call, + vectorizable_conversion, vectorizable_store, permute_vec_elements, + vectorizable_load): Likewise. + +2014-11-29 Tobias Burnus <burnus@net-b.de> + Manuel López-Ibáñez <manu@gcc.gnu.org> + + * opt-functions.awk (lang_enabled_by): Support || for + enabled-by. + * optc-gen.awk: Ditto. + * doc/options.texi (LangEnabledBy, EnabledBy): Document the + || syntax. + +2014-11-28 Mike Stump <mikestump@comcast.net> + + * bitmap.c (bitmap_ior): Zap current as it could be deleted. + (bitmap_ior_and_compl): Likewise. + +2014-11-28 Vladimir Makarov <vmakarov@redhat.com> + + PR target/64061 + * lra.c (lra_substitute_pseudo): Ignore constant with int mode for + subreg. + +2014-11-28 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/64093 + * config/rs6000/rs6000.md (and<mode>3): Don't generate + and<mode>3_imm unless rs6000_gen_cell_microcode is true. + +2014-11-28 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/64087 + * lra-lives.c (process_bb_lives): Add debug output. + (lra_create_live_ranges): Don't remove dead insn on the second + call of lra_create_live_ranges_1. + +2014-11-28 H.J. Lu <hongjiu.lu@intel.com> + + PR rtl-optimization/64037 + * combine.c (setup_incoming_promotions): Pass the argument + before any promotions happen to promote_function_mode. + +2014-11-28 Evgeny Stupachenko <evstupac@gmail.com> + + * tree-vect-data-refs.c (vect_transform_grouped_load): Limit shift + permutations to loads group of size 3. + +2014-11-28 Jiong Wang <jiong.wang@arm.com> + + * config/arm/arm.md (copysignsf3): New pattern. + (copysigndf3): Likewise. + +2014-11-28 Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + + * omp-low.c (lower_omp_critical): Mark critical sections + inside target functions as offloadable. + +2014-11-28 Ilya Verbin <ilya.verbin@intel.com> + + * lto-wrapper.c (run_gcc): Set have_lto and have_offload if at least one + file contains sections with LTO and offload IR, respectively. + +2014-11-28 Ilya Verbin <ilya.verbin@intel.com> + + * cgraphunit.c (ipa_passes): Handle flag_generate_offload. + (symbol_table::compile): Set flag_generate_offload if there is something + to offload. + * common.opt (flag_generate_offload): New Variable declaration. + * dwarf2out.c (dwarf2out_finish): Handle flag_generate_offload. + * ipa-inline-analysis.c (inline_generate_summary): Do not skip if + flag_generate_offload is set. + * lto-streamer.c (gate_lto_out): Handle flag_generate_offload. + * passes.c (ipa_write_summaries): Do not skip if flag_generate_offload + is set. + * toplev.c (compile_file): Emit LTO marker if offload info has been + previously emitted. Do not emit lto_slim marker if + flag_generate_offload is without flag_generate_lto. + * tree.c (free_lang_data): Do not skip if flag_generate_offload is set. + +2014-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm-cores.def (cortex-a17.cortex-a7): New entry. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Regenerate. + * config/arm/bpabi.h (BE8_LINK_SPEC): Add mcpu=cortex-a17.cortex-a7. + * config/arm/t-aprofile: Add cortex-a17.cortex-a7 entry to + MULTILIB_MATCHES. + +2014-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (generic_sched): Specify cortexa17 in 'no' list. + Include cortex-a17.md. + * config/arm/arm.c (arm_issue_rate): Specify 2 for cortexa17. + * config/arm/arm-cores.def (cortex-a17): New entry. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Regenerate. + * config/arm/bpabi.h (BE8_LINK_SPEC): Specify mcpu=cortex-a17. + * config/arm/cortex-a17.md: New file. + * config/arm/cortex-a17-neon.md: New file. + * config/arm/driver-arm.c (arm_cpu_table): Add entry for cortex-a17. + * config/arm/t-aprofile: Add cortex-a17 entries to MULTILIB_MATCHES. + +2014-11-28 Richard Biener <rguenther@suse.de> + + PR middle-end/64084 + * genmatch.c (dt_node::gen_kids_1): New function, split out + from dt_node::gen_kids. + (decision_tree::cmp_node): DT_TRUE are generally not equal. + (decision_tree::find_node): Treat DT_TRUE as barrier for + node CSE on the same level. + (dt_node::append_node): Do not keep DT_TRUE last. + (dt_node::gen_kids): Emit code after each DT_TRUE node seen. + +2014-11-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/arm/t-aprofile (MULTILIB_MATCHES): New entry for + -march=armv8-a+crc. + +2014-11-27 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.md (preferred_for_size): New attribute + (*pushxf): Split Yx*r constraints to r,*r. Use preferred_for_size + attribute to conditionally disable alternative 1. + (*pushdf): Split Yd*r constraints to r,*r. Use preferred_for_size + and prefered_for_speed attributes to conditionally disable + alternative 1. + (*movxf_internal): Split Yx*r constraints to r,*r. Use + preferred_for_size attribute to conditionally disable + alternatives 3 and 4. + (*movdf_internal): Split Yd*r constraints to r,*r. Use + preferred_for_size and prefered_for_speed attributes to conditionally + disable alternatives 3 and 4. + * config/i386/constraints.md (Yd, Yx): Remove register constraints. + +2014-11-27 Eric Botcazou <ebotcazou@adacore.com> + + * dwarf2out.c (set_block_origin_self): Skip nested functions. + +2014-11-27 H.J. Lu <hongjiu.lu@intel.com> + + PR target/63833 + * config/i386/i386.h (REAL_PIC_OFFSET_TABLE_REGNUM): Use + R15_REG for 64-bit. + * config/i386/rdos64.h (REAL_PIC_OFFSET_TABLE_REGNUM): Removed. + +2014-11-27 Martin Liska <mliska@suse.cz> + David Malcolm <dmalcolm@redhat.com> + + * ipa-icf.c (sem_function::equals_private): int* is replaced with + auto_vec. + (sem_function::bb_dict_test): Likewise. + * ipa-icf.h: Likewise. + +2014-11-27 Richard Biener <rguenther@suse.de> + + PR middle-end/64088 + * fold-const.c (const_unop): Re-instantiate missing condition + before calling fold_abs_const. + + PR tree-optimization/64088 + * tree-ssa-tail-merge.c (update_debug_stmt): After resetting + the stmt break from the loop over use operands. + +2014-11-27 Ilya Tocar <ilya.tocar@intel.com> + + * config/i386/cpuid.h (bit_MPX, bit_BNDREGS, bit_BNDCSR): + Define. + * config/i386/i386.c (get_builtin_code_for_version): Add avx512f. + (fold_builtin_cpu): Ditto. + * doc/extend.texi: Documment it. + +2014-11-27 Jakub Jelinek <jakub@redhat.com> + + PR middle-end/64067 + * expr.c (expand_expr_addr_expr_1) <case COMPOUND_LITERAL_EXPR>: + Handle it by returning address of COMPOUND_LITERAL_EXPR_DECL + not only if modifier is EXPAND_INITIALIZER, but whenever + COMPOUND_LITERAL_EXPR_DECL is non-NULL and TREE_STATIC. + + PR tree-optimization/64024 + * tree-vectorizer.h (struct _stmt_vec_info): Remove simd_clone_fndecl + field. Add simd_clone_info field. + (STMT_VINFO_SIMD_CLONE_FNDECL): Remove. + (STMT_VINFO_SIMD_CLONE_INFO): Define. + * tree-vect-stmts.c (vectorizable_simd_clone_call): Adjust for + STMT_VINFO_SIMD_CLONE_FNDECL becoming first element of + STMT_VINFO_SIMD_CLONE_INFO vector. For linear arguments, remember + base and linear_step from analysis phase and use it during transform + phase, biased by the difference between LOOP_VINFO_NITERS{_UNCHANGED,} + multiplied by linear_step. + (free_stmt_vec_info): Release STMT_VINFO_SIMD_CLONE_INFO. + + PR lto/64025 + * alias.c (find_base_term): Use std::swap. Prefer tmp2 + if it is CONSTANT_P other than CONST_INT. + +2014-11-27 Thomas Preud'homme <thomas.preudhomme@arm.com> + + PR target/59593 + * config/arm/arm.c (dump_minipool): dispatch to consttable pattern + based on mode size. + * config/arm/arm.md (consttable_1): Move from config/arm/thumb1.md and + make it TARGET_EITHER. + (consttable_2): Move from config/arm/thumb1.md, make it TARGET_EITHER + and move HFmode handling from consttable_4 to it. + (consttable_4): Move HFmode handling to consttable_2 pattern. + * config/arm/thumb1.md (consttable_1): Move to config/arm/arm.md. + (consttable_2): Ditto. + +2014-11-27 Richard Biener <rguenther@suse.de> + + * tree-ssa-sccvn.c (try_to_simplify): Allow + gimple_fold_stmt_to_constant_1 to follow SSA edges. + +2014-11-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/64083 + * tree-ssa-threadupdate.c (thread_through_all_blocks): Do not + forcibly mark loop for removal the wrong way. + +2014-11-27 Richard Biener <rguenther@suse.de> + + PR middle-end/63704 + * alias.c (mems_in_disjoint_alias_sets_p): Remove assert + and instead return false when !fstrict-aliasing. + +2014-11-27 Richard Biener <rguenther@suse.de> + + PR tree-optimization/61634 + * tree-vect-slp.c: Include gimple-walk.h. + (vect_detect_hybrid_slp_stmts): Rewrite to propagate hybrid + down the SLP tree for one scalar statement. + (vect_detect_hybrid_slp_1): New walker function. + (vect_detect_hybrid_slp_2): Likewise. + (vect_detect_hybrid_slp): Properly handle pattern statements + in a pre-scan over all loop stmts. + +2014-11-27 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + Revert: + 2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org> + * config/aarch64/aarch64.c (aarch64_code_to_ccmode, + aarch64_convert_mode, aarch64_gen_ccmp_first, + aarch64_gen_ccmp_next): New functions. + (TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): Define. + +2014-11-26 Jakub Jelinek <jakub@redhat.com> + + * gcc.c (SANITIZER_SPEC): Don't error on -fsanitize=thread + without -pie or -shared, error on -fsanitize=thread -static instead. + +2014-11-26 Bernd Edlinger <bernd.edlinger@hotmail.de> + + PR ipa/61190 + * cgraph.h (symtab_node::call_for_symbol_and_aliases): Fix comment. + (cgraph_node::function_or_virtual_thunk_symbol): New function. + (cgraph_node::call_for_symbol_and_aliases): Fix comment. + (cgraph_node::call_for_symbol_thunks_and_aliases): Adjust comment. + Add new optional parameter exclude_virtual_thunks. + * cgraph.c (cgraph_node::call_for_symbol_thunks_and_aliases): Add new + optional parameter exclude_virtual_thunks. + (cgraph_node::set_const_flag): Don't propagate to virtual thunks. + (cgraph_node::set_pure_flag): Likewise. + (cgraph_node::function_symbol): Simplified. + (cgraph_node::function_or_virtual_thunk_symbol): New function. + * ipa-pure-const.c (analyze_function): For virtual thunks set + pure_const_state to IPA_NEITHER. + (propagate_pure_const): Use function_or_virtual_thunk_symbol. + +2014-11-26 Richard Biener <rguenther@suse.de> + + PR middle-end/63738 + * tree-data-ref.c (split_constant_offset_1): Do not follow + SSA edges for SSA names with SSA_NAME_OCCURS_IN_ABNORMAL_PHI. + +2014-11-26 Richard Biener <rguenther@suse.de> + + * fold-const.h (const_unop): Declare. + (const_binop): Likewise. + * fold-const.c (const_binop): Export overload that expects + a type parameter and dispatches to fold_relational_const as well. + Check both operand kinds for guarding the transforms. + (const_unop): New function, with constant folding from fold_unary_loc. + (fold_unary_loc): Dispatch to const_unop for tcc_constant operand. + Remove constant folding done there from the simplifications. + (fold_binary_loc): Check for constants using CONSTANT_CLASS_P. + (fold_negate_expr): Remove dead code from the REAL_CST case. + Avoid building garbage in the COMPLEX_CST case. + * gimple-match-head.c (gimple_resimplify1): Dispatch to + const_unop. + (gimple_resimplify2): Dispatch to const_binop. + (gimple_simplify): Likewise. + +2014-11-26 Ilya Enkovich <ilya.enkovich@intel.com> + + PR bootstrap/63995 + * tree-chkp-opt.c (chkp_reduce_bounds_lifetime): Ignore + debug statement when searching for a new position for + bounds load/creation statement. + +2014-11-26 Marek Polacek <polacek@redhat.com> + + PR sanitizer/63788 + * asan.c (initialize_sanitizer_builtins): Add BT_FN_SIZE_CONST_PTR_INT + var. Conditionally build BUILT_IN_OBJECT_SIZE decl. + (ATTR_PURE_NOTHROW_LEAF_LIST): Define. + +2014-11-26 Ilya Enkovich <ilya.enkovich@intel.com> + + PR lto/64075 + * tree-streamer-in.c (unpack_ts_function_decl_value_fields): Use + proper size for function_code bitfield. + (pack_ts_function_decl_value_fields): Likewise. + +2014-11-21 Mark Wielaard <mjw@redhat.com> + + * doc/invoke.texi (-gdwarf-@{version}): Mention experimental DWARFv5. + * opts.c (common_handle_option): Accept -gdwarf-5. + * dwarf2out.c (is_cxx): Add DW_LANG_C_plus_plus_11 and + DW_LANG_C_plus_plus_14. + (lower_bound_default): Likewise. Plus DW_LANG_C11. + (gen_compile_unit_die): Output DW_LANG_C_plus_plus_11, + DW_LANG_C_plus_plus_14 or DW_LANG_C11. + (output_compilation_unit_header): Output at most a DWARFv4 header. + (output_skeleton_debug_sections): Likewise. + (output_line_info): Likewise. + (output_aranges): Document header version number. + +2014-11-26 Richard Biener <rguenther@suse.de> + + * gimple-fold.c (get_symbol_constant_value): Allow all + GIMPLE register type zero-constants. + +2014-11-26 Mark Wielaard <mjw@redhat.com> + + * dwarf2out.c (gen_subprogram_die): Add DW_AT_noreturn when the + function decl has TREE_THIS_VOLATILE. + +2014-11-26 Richard Biener <rguenther@suse.de> + + PR tree-optimization/62238 + * tree-predcom.c (ref_at_iteration): Unshare the expression + before gimplifying it. + (prepare_initializers_chain): Discard unused seq. + +2014-11-26 Prachi Godbole <prachi.godbole@imgtec.com> + + * config/mips/mips.c (mips_rtx_cost_data): Fix memory_latency cost + for p5600. + +2014-11-25 Vladimir Makarov <vmakarov@redhat.com> + + * ira-lives.c (process_bb_node_lives): Make code with conditional + REAL_PIC_OFFSET_TABLE_REGNUM. + +2014-11-25 Vladimir Makarov <vmakarov@redhat.com> + + PR target/63527 + * ira-lives.c (process_bb_node_lives): Check and remove conflict + of pic pseudo with pic hard reg. + +2014-11-25 Rohit <rohitarulraj@freescale.com> + + PR bootstrap/63703 + * config/rs6000/darwin.h (REGISTER_NAMES): Update based on 32 newly + added GCC hard register numbers for SPE high registers. + +2014-11-25 Segher Boessenkool <segher@kernel.crashing.org> + + * bt-load.c (migrate_btr_defs): Get the key of a heap entry + before removing it, not after. + +2014-11-25 Segher Boessenkool <segher@kernel.crashing.org> + + * config/mn10300/mn10300.c (mn10300_insert_setlb_lcc): Remove + PATTERN call. + +2014-11-25 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/sysv4.h (ASM_OUTPUT_REG_POP): Use addi instead + of addic. + +2014-11-25 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (iorxor, IORXOR): Delete code_attrs. + (rest of file): Replace those with code resp. CODE. + +2014-11-25 Tom de Vries <tom@codesourcery.com> + + * tree-cfg.c (verify_sese): New function. + (move_sese_region_to_fn): Call verify_sese. + * tree-cfg.h (verify_sese): Declare. + +2014-11-25 Richard Biener <rguenther@suse.de> + + PR lto/64065 + * lto-streamer-out.c (output_struct_function_base): Stream + last_clique field. + * lto-streamer-in.c (input_struct_function_base): Likewise. + +2014-11-25 Martin Liska <mliska@suse.cz> + + PR bootstrap/64050 + PR ipa/64060 + * sreal.c (sreal::operator+): Addition fixed. + (sreal::signedless_plus): Negative numbers are + handled correctly. + (sreal::operator-): Subtraction is fixed. + (sreal::signedless_minus): Negative numbers are + handled correctly. + * sreal.h (sreal::operator<): Equal negative numbers + are compared correctly. + (sreal::shift): New checking asserts are introduced. + Operation is fixed. + +2014-11-25 Richard Biener <rguenther@suse.de> + + PR tree-optimization/61927 + * tree-vect-loop.c (vect_analyze_loop_2): Revert ordering + of group and pattern analysis to the one in GCC 4.8. + +2014-11-25 Ilya Tocar <ilya.tocar@intel.com> + Jakub Jelinek <jakub@redhat.com> + + * gcc.c (handle_foffload_option): Remove unnecessary calls to strchr, + strlen, strncpy. + * lto-wrapper.c (append_offload_options): Likewise. + +2014-11-25 Eric Botcazou <ebotcazou@adacore.com> + + * config/rs6000/rs6000.c (rs6000_call_aix): For the AIX ABI, do not + load the static chain if the call was originally direct. + +2014-11-25 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/64059 + * ipa-prop.c (ipa_analyze_call_uses): Don't call get_dynamic_type when + devirtualization is disabled. + +2014-11-24 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/63965 + * config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): Do not set + Altivec & -16 mask if the type is not valid for Altivec registers. + (rs6000_secondary_reload_memory): Add support for ((reg + const) + + reg) that occurs during push_reload processing. + + * config/rs6000/altivec.md (altivec_mov<mode>): Add instruction + alternative for moving constant vectors which are easy altivec + constants to GPRs. Set the length attribute each of the + alternatives. + + * config/rs6000/rs6000-cpus.def: Undo November 21st changes, a + work in progress patch was committed instead of the fixes for + 63965. + * config/rs6000/rs6000.c: Likewise. + +2014-11-22 Jan Hubicka <hubicka@ucw.cz> + + PR ipa/63671 + * ipa-inline-transform.c (can_remove_node_now_p_1): Handle alises + and -fno-devirtualize more carefully. + (can_remove_node_now_p): Update. + +2014-11-24 Andrew Pinski <apinski@cavium.com> + + PR rtl-opt/63972 + * shrink-wrap.c (move_insn_for_shrink_wrap): Allow LO_SUM also. + +2014-11-24 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/aarch64-simd.md (vec_shr<mode>): New. + +2014-11-24 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): + Refactor by combining switch statements and make arrays into scalars. + +2014-11-24 David Edelsohn <dje.gcc@gmail.com> + + PR c++/58561 + * dbxout.c: Include stringpool.h + (dbxout_type) [default]: Ignore auto type. + +2014-11-24 Richard Biener <rguenther@suse.de> + + PR tree-optimization/63679 + * tree-ssa-sccvn.c: Include ipa-ref.h, plugin-api.h and cgraph.h. + (copy_reference_ops_from_ref): Fix non-constant ADDR_EXPR case + to properly leave off at -1. + (fully_constant_vn_reference_p): Generalize folding from + constant initializers. + (vn_reference_lookup_3): When looking through aggregate copies + handle offsetted reads and try simplifying the result to + a constant. + * gimple-fold.h (fold_ctor_reference): Export. + * gimple-fold.c (fold_ctor_reference): Likewise. + +2014-11-24 Petr Murzin <petr.murzin@intel.com> + + * simplify-rtx.c (simplify_ternary_operation): Simplify + vec_merge (vec_duplicate (vec_select)). + +2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (AARCH64_FUSE_ADRP_LDR): Define. + (cortexa53_tunings): Specify AARCH64_FUSE_ADRP_LDR in fuseable_ops. + (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_ADRP_LDR. + +2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (AARCH64_FUSE_MOVK_MOVK): Define. + (cortexa53_tunings): Specify AARCH64_FUSE_MOVK_MOVK in fuseable_ops. + (cortexa57_tunings): Likewise. + (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_MOVK_MOVK. + +2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * sched-deps.c (sched_macro_fuse_insns): Do not check modified_in_p + in the not conditional jump case. + * doc/tm.texi (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description. + * target.def (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description. + +2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c: Include tm-constrs.h + (AARCH64_FUSE_ADRP_ADD): Define. + (cortexa57_tunings): Add AARCH64_FUSE_ADRP_ADD to fuseable_ops. + (cortexa53_tunings): Likewise. + (aarch_macro_fusion_pair_p): Handle AARCH64_FUSE_ADRP_ADD. + +2014-11-24 Martin Liska <mliska@suse.cz> + + * ipa-inline.c (edge_badness): long is replaced by sreal + as fibonacci_heap template type. + (update_edge_key): Likewise. + (inline_small_functions): Likewise. + +2014-11-24 Martin Liska <mliska@suse.cz> + + * predict.c (propagate_freq): More elegant sreal API is used. + (estimate_bb_frequencies): Precomputed constants replaced by integer + constants. + * sreal.c (sreal::normalize): New function. + (sreal::to_int): Likewise. + (sreal::operator+): Likewise. + (sreal::operator-): Likewise. + (sreal::signedless_plus): Likewise. + (sreal::signedless_minus): Likewise. + (sreal::operator/): Negative number support is added. + * sreal.h: Definition of new functions added. + (inline sreal operator<<): New function. + (inline sreal operator>>): Likewise. + +2014-11-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-protos.h (struct tune_params): Add + fuseable_ops field. + * config/aarch64/aarch64.c (generic_tunings): Specify fuseable_ops. + (cortexa53_tunings): Likewise. + (cortexa57_tunings): Likewise. + (thunderx_tunings): Likewise. + (aarch64_macro_fusion_p): New function. + (aarch_macro_fusion_pair_p): Likewise. + (TARGET_SCHED_MACRO_FUSION_P): Define. + (TARGET_SCHED_MACRO_FUSION_PAIR_P): Likewise. + (AARCH64_FUSE_MOV_MOVK): Likewise. + (AARCH64_FUSE_NOTHING): Likewise. + +2014-11-24 Martin Liska <mliska@suse.cz> + + PR lto/63968 + * bb-reorder.c (find_traces_1_round): decreate_key is replaced + with replace_key method. + * fibonacci_heap.h (fibonacci_heap::insert): New argument. + (fibonacci_heap::replace_key_data): Likewise. + (fibonacci_heap::replace_key): New method that can even increment key, + this operation costs O(log N). + (fibonacci_heap::extract_min): New argument. + (fibonacci_heap::delete_node): Likewise. + +2014-11-24 Richard Biener <rguenther@suse.de> + + PR tree-optimization/55334 + * function.h (struct function): Add last_clique member. + * tree-inline.c (remap_dependence_clique): New function. + (remap_gimple_op_r): Remap dependence cliques in MEM_REFs. + (copy_tree_body_r): Likewise. + (copy_cfg_body): Free dependence map. + (copy_gimple_seq_and_replace_locals): Likewise. + * tree-pretty-print.c (dump_generic_node): Dump + dependence info. + * tree-ssa-alias.c (refs_may_alias_p_1): Use dependence info + to answer alias query. + * tree-ssa-structalias.c: Include tree-phinodes.h, ssa-iterators.h, + tree-pretty-print.h and gimple-walk.h. + (struct variable_info): Add is_restrict_var flag and ruid + member. + (new_var_info): Initialize is_restrict_var. + (make_constraint_from_restrict): Likewise. + (create_variable_info_for): Exclude restricts from global vars + from new handling. + (intra_create_variable_infos): But not those from parameters. + (visit_loadstore): New function. + (maybe_set_dependence_info): Likewise. + (compute_dependence_clique): Likewise. + (compute_may_aliases): Call compute_dependence_clique. + * tree-data-ref.c (dr_analyze_indices): Copy dependence info + to fake MEM_REF. + (dr_may_alias_p): Use recorded dependence info to answer + alias query. + * tree-core.h (struct tree_base): Add clique, base struct in + union. + * tree.h (MR_DEPENDENCE_CLIQUE): New macro. + (MR_DEPENDENCE_BASE): Likewise. + * tree-inline.h (dependence_hasher): New hash-map kind. + (struct copy_body_data): Add dependence_map pointer. + * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Avoid + throwing away dependence info. + * tree-streamer-in.c (unpack_value_fields): Stream dependence info. + * tree-streamer-out.c (streamer_pack_tree_bitfields): Likewise. + +2014-11-23 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/53976 + * config/sh/sh_optimize_sett_clrt.cc + (sh_optimize_sett_clrt::find_last_ccreg_values): Return bool instead + of void. Abort at complex edges. + (sh_optimize_sett_clrt::execute): Do nothing if find_last_ccreg_values + returned false. + +2014-11-22 John David Anglin <danglin@gcc.gnu.org> + + PR other/63694 + * configure.ac: Check for strtol, strtoul, strtoll and strtoull + declarations. + * configure: Regenerated. + * config.in: Regenerated. + +2014-11-22 Jan Hubicka <hubicka@ucw.cz> + + * ipa.c (symbol_table::remove_unreachable_nodes): Mark all inline + clones as having abstract origin used. + * ipa-inline-transform.c (can_remove_node_now_p_1): Drop abstract + origin check. + (clone_inlined_nodes): Copy abstract originflag. + * lto-cgraph.c (compute_ltrans_boundary): Use get_create to get + abstract origin node. + +2014-11-22 Uros Bizjak <ubizjak@gmail.com> + + * params.def (PARAM_MAX_COMPLETELY_PEELED_INSNS): Increase to 200. + * config/i386/i386.c (ix86_option_override_internal): Do not increase + PARAM_MAX_COMPLETELY_PEELED_INSNS. + +2014-11-22 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/63783 + PR target/51244 + * config/sh/sh_treg_combine.cc (sh_treg_combine::make_not_reg_insn): + Do not emit bitwise not insn. Emit logical not insn sequence instead. + Adjust related comments throughout the file. + +2014-11-22 Oleg Endo <olegendo@gcc.gnu.org> + + PR target/63986 + PR target/51244 + * config/sh/sh.c (sh_is_logical_t_store_expr, + sh_try_omit_signzero_extend): Use rtx_insn* for insn argument. + (sh_split_movrt_negc_to_movt_xor): New function. + (sh_find_set_of_reg): Move to ... + * config/sh/sh-protos.h (sh_find_set_of_reg): ... here and convert + to template function. + (set_of_reg): Use rtx_insn* for insn member. + (sh_is_logical_t_store_expr, sh_try_omit_signzero_extend): Use + rtx_insn* for insn argument. + * config/sh/sh.md (movrt_negc, *movrt_negc): Split into movt-xor + sequence using new sh_split_movrt_negc_to_movt_xor function. + (movrt_xor): Allow also for SH2A. + (*movt_movrt): Delete insns and splits. + +2014-11-22 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/60770 + * tree-sra.c (clobber_subtree): New function. + (sra_modify_constructor_assign): Call it. + +2014-11-21 Vladimir Makarov <vmakarov@redhat.com> + + PR target/63897 + * lra-lives.c (mark_regno_live, mark_regno_dead): Remove last + argument. + (process_bb_lives): Rename dead_insn_p on remove_p + and global_live_info_p on dead_insn_p. Calculate local live info + unconditionally. Remove last argument in calls mark_regno_live and + mark_regno_dead. Reorganize body of EXECUTE_IF_SET_IN_BITMAP. + (lra_create_live_ranges): Rename to lra_create_live_ranges_1. + Return bool. Rename global_live_info_p on dead_insn_p. Return + flag of live info change. + (lra_create_live_ranges): New. + +2014-11-21 Jakub Jelinek <jakub@redhat.com> + + PR target/63848 + PR target/63975 + * internal-fn.c (expand_arith_overflow_result_store, + expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow): Use + do_compare_rtx_and_jump instead of emit_cmp_and_jump_insns everywhere, + adjust arguments to those functions. Use unsignedp = true for + EQ, NE, GEU, LEU, LTU and GTU comparisons. + + PR tree-optimization/64006 + * tree-vrp.c (stmt_interesting_for_vrp): Return true + for {ADD,SUB,MUL}_OVERFLOW internal calls. + (vrp_visit_assignment_or_call): For {ADD,SUB,MUL}_OVERFLOW + internal calls, check if any REALPART_EXPR/IMAGPART_EXPR + immediate uses would change their value ranges and return + SSA_PROP_INTERESTING if so, or SSA_PROP_NOT_INTERESTING + if there are some REALPART_EXPR/IMAGPART_EXPR immediate uses + interesting for vrp. + +2014-11-21 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/63965 + * config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): Do not set + Altivec & -16 mask if the type is not valid for Altivec registers. + (rs6000_secondary_reload_memory): Add support for ((reg + const) + + reg) that occurs during push_reload processing. + + * config/rs6000/altivec.md (altivec_mov<mode>): Add instruction + alternative for moving constant vectors which are easy altivec + constants to GPRs. Set the length attribute each of the + alternatives. + +2014-11-21 Matthew Fortune <matthew.fortune@imgtec.com> + + * configure.ac: When checking for MIPS .module support ensure that + o32 FPXX is supported to avoid a second configure check. + * configure: Regenerate. + +2014-11-21 Jiong Wang <jiong.wang@arm.com> + + * config/aarch64/iterators.md (VS): New mode iterator. + (vsi2qi): New mode attribute. + (VSI2QI): Likewise. + * config/aarch64/aarch64-simd-builtins.def: New entry for ctz. + * config/aarch64/aarch64-simd.md (ctz<mode>2): New pattern for ctz. + * config/aarch64/aarch64-builtins.c + (aarch64_builtin_vectorized_function): Support BUILT_IN_CTZ. + +2014-11-21 H.J. Lu <hongjiu.lu@intel.com> + + PR bootstrap/63784 + * configure: Regenerated. + +2014-11-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/arm_neon.h (vsqrt_f64): New intrinsic. + +2014-11-21 Ilya Tocar <ilya.tocar@intel.com> + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_PCOMMIT_UNSET, + OPTION_MASK_ISA_PCOMMIT_SET): New. + (ix86_handle_option): Handle OPT_mpcommit. + * config.gcc: Add pcommitintrin.h + * config/i386/pcommitintrin.h: New file. + * config/i386/cpuid.h (bit_PCOMMIT): Define. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect pcommit. + * config/i386/i386-c.c (ix86_target_macros_internal): Define + __PCOMMIT__. + * config/i386/i386.c (ix86_target_string): Add -mpcommit. + (PTA_PCOMMIT): Define. + (ix86_option_override_internal): Handle new option. + (ix86_valid_target_attribute_inner_p): Add pcommit. + (ix86_builtins): Add IX86_BUILTIN_PCOMMIT. + (bdesc_special_args): Add __builtin_ia32_pcommit. + * config/i386/i386.h (TARGET_PCOMMIT, TARGET_PCOMMIT_P): Define. + * config/i386/i386.md (unspecv): Add UNSPECV_PCOMMIT. + (pcommit): New instruction. + * config/i386/i386.opt: Add mpcommit. + * config/i386/x86intrin.h: Include pcommitintrin.h. + +2014-11-20 Mark Wielaard <mjw@redhat.com> + + PR debug/38757 + * config/avr/avr-c.c (avr_cpu_cpp_builtins): Use lang_GNU_C. + * config/darwin.c (darwin_file_end): Use lang_GNU_CXX. + (darwin_override_options): Likewise. + * config/ia64/ia64.c (ia64_struct_retval_addr_is_first_parm_p): + Likewise. + * config/rs6000/rs6000.c (rs6000_output_function_epilogue): + Likewise. + * dbxout.c (get_lang_number): Likewise. + (dbxout_type): Likewise. + (dbxout_symbol_location): Likewise. + * dwarf2out.c (add_prototyped_attribute): Add DW_AT_prototype + also for DW_LANG_{C,C99,ObjC}. + (highest_c_language): New function. + (gen_compile_unit_die): Call highest_c_language to merge LTO + TRANSLATION_UNIT_LANGUAGE. Use strncmp language_string to + determine if DW_LANG_C99 or DW_LANG_C89 should be returned. + * fold-const.c (fold_cond_expr_with_comparison): Use lang_GNU_CXX. + * langhooks.h (struct lang_hooks): Add version comment to name. + (lang_GNU_C): New function declaration. + (lang_GNU_CXX): Likewise. + * langhooks.c (lang_GNU_C): New function. + (lang_GNU_CXX): Likewise. + * vmsdbgout.c (vmsdbgout_init): Use lang_GNU_C and lang_GNU_CXX. + +2014-11-21 Ilya Tocar <ilya.tocar@intel.com> + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_CLWB_UNSET, + OPTION_MASK_ISA_CLWB_SET): New. + (ix86_handle_option): Handle OPT_mclwb. + * config.gcc: Add clwbintrin.h. + * config/i386/clwbintrin.h: New file. + * config/i386/cpuid.h (bit_CLWB): Define. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect clwb. + * config/i386/i386-c.c (ix86_target_macros_internal): Define + __CLWB__. + * config/i386/i386.c (ix86_target_string): Add -mclwb. + (PTA_CLWB): Define. + (ix86_option_override_internal): Handle new option. + (ix86_valid_target_attribute_inner_p): Add clwb. + (ix86_builtins): Add IX86_BUILTIN_CLWB. + (ix86_init_mmx_sse_builtins): Add __builtin_ia32_clwb. + (ix86_expand_builtin): Handle IX86_BUILTIN_CLWB. + * config/i386/i386.h (TARGET_CLWB, TARGET_CLWB_P): Define. + * config/i386/i386.md (unspecv): Add UNSPECV_CLWB. + (clwb): New instruction. + * config/i386/i386.opt: Add mclwb. + * config/i386/x86intrin.h: Include clwbintrin.h. + +2014-11-21 Ilya Tocar <ilya.tocar@intel.com> + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VBMI_SET + OPTION_MASK_ISA_AVX512VBMI_UNSET): New. + (ix86_handle_option): Handle OPT_mavx512vbmi. + * config.gcc: Add avx512vbmiintrin.h, avx512vbmivlintrin.h. + * config/i386/avx512vbmiintrin.h: New file. + * config/i386/avx512vbmivlintrin.h: Ditto. + * config/i386/cpuid.h (bit_AVX512VBMI): New. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect avx512vbmi. + * config/i386/i386-c.c (ix86_target_macros_internal): Define + __AVX512VBMI__. + * config/i386/i386.c (ix86_target_string): Add -mavx512vbmi. + (PTA_AVX512VBMI): Define. + (ix86_option_override_internal): Handle new options. + (ix86_valid_target_attribute_inner_p): Add avx512vbmi, + (ix86_builtins): Add IX86_BUILTIN_VPMULTISHIFTQB512, + IX86_BUILTIN_VPMULTISHIFTQB256, IX86_BUILTIN_VPMULTISHIFTQB128, + IX86_BUILTIN_VPERMVARQI512_MASK, IX86_BUILTIN_VPERMT2VARQI512, + IX86_BUILTIN_VPERMT2VARQI512_MASKZ, IX86_BUILTIN_VPERMI2VARQI512, + IX86_BUILTIN_VPERMVARQI256_MASK, IX86_BUILTIN_VPERMVARQI128_MASK, + IX86_BUILTIN_VPERMT2VARQI256, IX86_BUILTIN_VPERMT2VARQI256_MASKZ, + IX86_BUILTIN_VPERMT2VARQI128, IX86_BUILTIN_VPERMI2VARQI256, + IX86_BUILTIN_VPERMI2VARQI128. + (bdesc_special_args): Add __builtin_ia32_vpmultishiftqb512_mask, + __builtin_ia32_vpmultishiftqb256_mask, + __builtin_ia32_vpmultishiftqb128_mask, + __builtin_ia32_permvarqi512_mask, __builtin_ia32_vpermt2varqi512_mask, + __builtin_ia32_vpermt2varqi512_maskz, + __builtin_ia32_vpermi2varqi512_mask, __builtin_ia32_permvarqi256_mask, + __builtin_ia32_permvarqi128_mask, __builtin_ia32_vpermt2varqi256_mask, + __builtin_ia32_vpermt2varqi256_maskz, + __builtin_ia32_vpermt2varqi128_mask, + __builtin_ia32_vpermt2varqi128_maskz, + __builtin_ia32_vpermi2varqi256_mask, + __builtin_ia32_vpermi2varqi128_mask. + (ix86_hard_regno_mode_ok): Allow big masks for AVX512VBMI. + * config/i386/i386.h (TARGET_AVX512VBMI, TARGET_AVX512VBMI_P): Define. + * config/i386/i386.opt: Add mavx512vbmi. + * config/i386/immintrin.h: Include avx512vbmiintrin.h, + avx512vbmivlintrin.h. + * config/i386/sse.md (unspec): Add UNSPEC_VPMULTISHIFT. + (VI1_AVX512VL): New iterator. + (<avx512>_permvar<mode><mask_name>): Use it. + (<avx512>_vpermi2var<mode>3_maskz): Ditto. + (<avx512>_vpermi2var<mode>3<sd_maskz_name>): Ditto. + (<avx512>_vpermi2var<mode>3_mask): Ditto. + (<avx512>_vpermt2var<mode>3_maskz): Ditto. + (<avx512>_vpermt2var<mode>3<sd_maskz_name>): Ditto. + (<avx512>_vpermt2var<mode>3_mask): Ditto. + (vpmultishiftqb<mode><mask_name>): Ditto. + +2014-11-21 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + PR rtl-optimization/63952 + * optabs.c (prepare_cmp_insn): Do not call can_compare_p for CCmode. + * config/s390/s390.md ("cbranchcc4"): Accept any s390_comparison. + Remove incorrect TARGET_HARD_FLOAT check and no-op expander code. + +2014-11-21 Ilya Tocar <ilya.tocar@intel.com> + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512IFMA_SET, + OPTION_MASK_ISA_AVX512IFMA_UNSET): New. + (ix86_handle_option): Handle OPT_mavx512ifma. + * config.gcc: Add avx512ifmaintrin.h, avx512ifmavlintrin.h. + * config/i386/avx512ifmaintrin.h: New file. + * config/i386/avx512ifmaivlntrin.h: Ditto. + * config/i386/cpuid.h (bit_AVX512IFMA): New. + * config/i386/driver-i386.c (host_detect_local_cpu): Detect + avx512ifma. + * config/i386/i386-c.c (ix86_target_macros_internal): Define + __AVX512IFMA__. + * config/i386/i386.c (ix86_target_string): Add -mavx512ifma. + (PTA_AVX512IFMA): Define. + (ix86_option_override_internal): Handle new options. + (ix86_valid_target_attribute_inner_p): Add avx512ifma. + (ix86_builtins): Add IX86_BUILTIN_VPMADD52LUQ512, + IX86_BUILTIN_VPMADD52HUQ512, IX86_BUILTIN_VPMADD52LUQ256, + IX86_BUILTIN_VPMADD52HUQ256, IX86_BUILTIN_VPMADD52LUQ128, + IX86_BUILTIN_VPMADD52HUQ128, IX86_BUILTIN_VPMADD52LUQ512_MASKZ, + IX86_BUILTIN_VPMADD52HUQ512_MASKZ, IX86_BUILTIN_VPMADD52LUQ256_MASKZ, + IX86_BUILTIN_VPMADD52HUQ256_MASKZ, IX86_BUILTIN_VPMADD52LUQ128_MASKZ, + IX86_BUILTIN_VPMADD52HUQ128_MASKZ. + (bdesc_special_args): Add __builtin_ia32_vpmadd52luq512_mask, + __builtin_ia32_vpmadd52luq512_maskz, + __builtin_ia32_vpmadd52huq512_mask, + __builtin_ia32_vpmadd52huq512_maskx, + __builtin_ia32_vpmadd52luq256_mask, + __builtin_ia32_vpmadd52luq256_maskz, + __builtin_ia32_vpmadd52huq256_mask, + __builtin_ia32_vpmadd52huq256_maskz, + __builtin_ia32_vpmadd52luq128_mask, + __builtin_ia32_vpmadd52luq128_maskz, + __builtin_ia32_vpmadd52huq128_mask, + __builtin_ia32_vpmadd52huq128_maskz, + * config/i386/i386.h (TARGET_AVX512IFMA, TARGET_AVX512IFMA_P): Define. + * config/i386/i386.opt: Add mavx512ifma. + * config/i386/immintrin.h: Include avx512ifmaintrin.h, + avx512ifmavlintrin.h. + * config/i386/sse.md (unspec): Add UNSPEC_VPMADD52LUQ, + UNSPEC_VPMADD52HUQ. + (VPMADD52): New iterator. + (vpmadd52type): New attribute. + (vpamdd52huq<mode>_maskz): New. + (vpamdd52luq<mode>_maskz): Ditto. + (vpamdd52<vpmadd52type><mode><sd_maskz_name>): Ditto. + (vpamdd52<vpmadd52type><mode>_mask): Ditto. + +2014-11-21 Alan Lawrence <alan.lawrence@arm.com> + + Revert: + 2014-09-22 Alan Lawrence <alan.lawrence@arm.com> + * fold-const.c (tree_swap_operands_p): Strip only sign-preserving NOPs. + +2014-11-21 Andrew Bennett <andrew.bennett@imgtec.com> + + * config/mips/mips.c (mips_process_sync_loop): Place a + nop in the delay slot of the branch likely instruction. + (mips_output_sync_loop): Ensure mips_branch_likely is + set before calling mips_output_sync_loop. + (mips_sync_loop_insns): Likewise. + +2014-11-21 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + PR/target 63673 + * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Allow + the base pointer of vec_vsx_ld and vec_vsx_st to take a pointer to + double. + +2014-11-21 Georg-Johann Lay <avr@gjlay.de> + + Forward-port from 2014-10-30 4_9-branch r216934 + + PR target/63633 + * config/avr/avr-protos.h (regmask): New inline function. + (avr_fix_inputs, avr_emit3_fix_outputs): New protos. + * config/avr/avr.c (avr_fix_operands, avr_move_fixed_operands) + (avr_fix_inputs, avr_emit3_fix_outputs): New functions. + * config/avr/avr-fixed.md (mulqq3_nomul, muluqq3_nomul) + (mul<ALL2QA>3, mul<ALL4A>3, <usdiv><ALL1Q>3, <usdiv><ALL2QA>3) + (<usdiv><ALL4A>3, round<ALL124QA>3): Fix input operands. + * config/avr/avr-dimode.md (add<ALL8>3, sub<ALL8>3) + (<ss_addsub><ALL8S>3, <us_addsub><ALL8U>3, cbranch<ALL8>4) + (<di_shifts><ALL8>3, <any_extend>mulsidi3): Fix input operands. + * config/avr/avr.md (mulqi3_call, mulhi3_call, mulsi3, mulpsi3) + (mulu<QIHI>si3, muls<QIHI>si3, mulohisi3, <any_extend>mulhisi3) + (usmulhisi3, <any_extend>mulhi3_highpart, mulsqipsi3) + (fmul, fmuls, fmulsu): Fix operands. Turn insn into expander as + needed. + +2014-11-21 Jakub Jelinek <jakub@redhat.com> + + PR target/61137 + * config/ia64/ia64.c (ia64_attribute_takes_identifier_p): New function. + (TARGET_ATTRIBUTE_TAKES_IDENTIFIER_P): Redefine to it. + +2014-11-21 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_<ANY_EXTEND:su><ADDSUB:optab>l<mode>): Add a tab between + output mnemonic and operands. + (aarch64_simd_vec_unpack<su>_lo_<mode>): Likewise. + (aarch64_simd_vec_unpack<su>_hi_<mode>): Likewise. + +2014-11-21 Evgeny Stupachenko <evstupac@gmail.com> + + * config/i386/i386.c (ix86_option_override_internal): Increase + PARAM_MAX_COMPLETELY_PEELED_INSNS. + +2014-11-21 Evgeny Stupachenko <evstupac@gmail.com> + + PR target/60451 + * config/i386/i386.c (expand_vec_perm_even_odd_pack): New. + (expand_vec_perm_even_odd_1): Add new expand for V8HI mode, + replace for V16QI, V16HI and V32QI modes. + (ix86_expand_vec_perm_const_1): Add new expand. + +2014-11-21 Nick Clifton <nickc@redhat.com> + + * config/rl78/rl78-real.md (movqi_from_es): New pattern. + * config/rl78/rl78.c (struct machine_function): Add uses_es field. + (rl78_expand_prologue): Save the ES register in interrupt handlers + that use it. + (rl78_expand_epilogue): Restore the ES register if necessary. + (rl78_start_function): Mention if the function uses the ES + register. + (rl78_lo16): Record the use of the ES register. + (transcode_memory_rtx): Likewise. + +2014-11-21 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/61773 + * tree-ssa-strlen.c (get_string_length): Don't assert + stpcpy has been prototyped if si->stmt is BUILT_IN_MALLOC. + + PR target/63910 + * simplify-rtx.c (simplify_immed_subreg): Return NULL for integer + modes wider than MAX_BITSIZE_MODE_ANY_INT. If not using + CONST_WIDE_INT, make sure r fits into CONST_DOUBLE. + +2014-11-21 Markus Trippelsdorf <markus@trippelsdorf.de> + + * config/rs6000/rs6000.c (includes_rldic_lshift_p): Use + HOST_WIDE_INT_M1U instead of ~0. + (includes_rldicr_lshift_p): Likewise. + +2014-11-21 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32.c (nds32_legitimate_address_p): For LO_SUM, + we need to look into its operand to determine if it is a valid + address. + +2014-11-21 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32.c (nds32_emit_stack_push_multiple): Add new + vaarg_p argument and create correct CFI info. + (nds32_expand_prologue): Pass true or false to + nds32_emit_stack_push_multiple function. + +2014-11-21 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32.c (nds32_expand_prologue): Set fp_adjust_insn + as RTX_FRAME_RELATED_P rtx. + +2014-11-21 Chung-Ju Wu <jasonwucj@gmail.com> + + * config/nds32/nds32.opt (march): Add help message. + +2014-11-20 Patrick Palka <ppalka@gcc.gnu.org> + + * tree-vrp.c (test_for_singularity): New parameter + strict_overflow_p. Set *strict_overflow_p to true if signed + overflow must be undefined for the return value to satisfy the + conditional. + (simplify_cond_using_ranges): Don't perform the simplification + if it violates overflow rules. + +2014-11-20 Marek Polacek <polacek@redhat.com> + + * tree-ssa-loop-niter.c (maybe_lower_iteration_bound): Fix typo. + +2014-11-20 Andrew Stubbs <ams@codesourcery.com> + + * tree-ssa-loop-niter.c (maybe_lower_iteration_bound): Warn if a loop + condition would be removed due to undefined behaviour. + +2014-11-20 Andrew Pinski <apinski@cavium.com> + + PR ipa/63981 + PR ipa/63982 + * ipa-polymorphic-call.c (possible_placement_new): + Use POINTER_SIZE instead of GET_MODE_BITSIZE (Pmode). + (ipa_polymorphic_call_context::restrict_to_inner_class): Likewise. + (extr_type_from_vtbl_ptr_store): Likewise. + +2014-11-20 Markus Trippelsdorf <markus@trippelsdorf.de> + + * config/rs6000/constraints.md: Avoid signed integer overflows. + * config/rs6000/predicates.md: Likewise. + * config/rs6000/rs6000.c (num_insns_constant_wide): Likewise. + (includes_rldic_lshift_p): Likewise. + (includes_rldicr_lshift_p): Likewise. + * emit-rtl.c (const_wide_int_htab_hash): Likewise. + * loop-iv.c (determine_max_iter): Likewise. + (iv_number_of_iterations): Likewise. + * tree-ssa-loop-ivopts.c (get_computation_cost_at): Likewise. + * varasm.c (get_section_anchor): Likewise. + +2014-11-20 Charles Baylis <charles.baylis@linaro.org> + + PR target/63870 + * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Pass + expression to aarch64_simd_lane_bounds. + * config/aarch64/aarch64-protos.h (aarch64_simd_lane_bounds): Update + prototype. + * config/aarch64/aarch64-simd.md: (aarch64_combinez<mode>): Update + call to aarch64_simd_lane_bounds. + (aarch64_get_lanedi): Likewise. + (aarch64_ld2_lane<mode>): Likewise. + (aarch64_ld3_lane<mode>): Likewise. + (aarch64_ld4_lane<mode>): Likewise. + (aarch64_im_lane_boundsi): Likewise. + * config/aarch64/aarch64.c (aarch64_simd_lane_bounds): Add exp + parameter. Report calling function in error message if exp is non-NULL. + +2014-11-20 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/60111 + * config/sh/sh.c: Use signed char for signed field. + +2014-11-20 Trevor Saunders <tsaunders@mozilla.com> + + * cfgexpand.c, gimple-ssa.h, trans-mem.c: Replace htab with + hash_table. + +2014-11-20 Trevor Saunders <tsaunders@mozilla.com> + + * ipa-utils.c, lto-section-in.c, lto-streamer.h, + tree-scalar-evolution.c: Replace htab with hash_table. + +2014-11-20 Trevor Saunders <tsaunders@mozilla.com> + + * lto-section-in.c (lto_delete_in_decl_state): Adjust. + (lto_free_function_in_decl_state): Likewise. + * lto-streamer-out.c (copy_function_or_variable): Likewise. + * lto-streamer.h (lto_file_decl_data_get_ ## name): Likewise. + (lto_file_decl_data_num_ ## name ## s): Likewise. + (struct lto_tree_ref_table): Remove. + (struct lto_in_decl_state): Replace lto_tree_ref_table with vec<tree>. + +2014-11-20 Trevor Saunders <tsaunders@mozilla.com> + + * hash-map.h (hash_map::iterator): New class. + (hash_map::begin): New method. + (hash_map::end): Likewise. + * alias.c, config/alpha/alpha.c, dwarf2asm.c, omp-low.c, tree.h: + replace splay_tree with hash_map. + +2014-11-20 Trevor Saunders <tsaunders@mozilla.com> + + * hash-table.h (hash_table::hash_table): Call alloc_entries. + (hash_table::alloc_entries): new method. + (hash_table::expand): Call alloc_entries. + (hash_table::empty): Likewise. + +2014-11-20 Trevor Saunders <tsaunders@mozilla.com> + + * config/i386/i386.c, function.c, trans-mem.c, tree-core.h, + tree.c, tree.h, ubsan.c, varasm.c: Use hash_table instead of htab. + +2014-11-20 Trevor Saunders <tsaunders@mozilla.com> + + * doc/gty.texi: Document the new cache gty attribute. + * gengtype.c (finish_cache_funcs): New function. + (write_roots): Call gt_clear_cache on global variables with the cache + gty attribute. + * ggc-common.c (ggc_mark_roots): Call gt_clear_caches. + * ggc.h (gt_clear_caches): New declaration. + * hash-table.h (struct ggc_cache_hasher): New hasher for caches in gc + memory. + (gt_cleare_cache): New function. + * emit-rtl.c, rtl.h, tree.c: Use hash_table instead of htab. + +2014-11-20 Segher Boessenkool <segher@kernel.crashing.org> + + * combine.c (try_combine): Prefer to delete dead SETs inside + a PARALLEL over keeping them. + +2014-11-20 Segher Boessenkool <segher@kernel.crashing.org> + + * combine.c (combine_validate_cost): Always print the insn costs + to the dump file. + +2014-11-20 Richard Henderson <rth@redhat.com> + + PR target/63977 + * config/i386/i386.c (ix86_static_chain): Reinstate the check + for DECL_STATIC_CHAIN. + +2014-11-20 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_classify_symbol): + Fixup prototype. + * config/aarch64/aarch64.c (aarch64_expand_mov_immediate, + aarch64_cannot_force_const_mem, aarch64_classify_address, + aarch64_classify_symbolic_expression): Fixup call to + aarch64_classify_symbol. + (aarch64_classify_symbol): Add range-checking for + symbol + offset addressing for tiny and small models. + +2014-11-20 Richard Biener <rguenther@suse.de> + + PR middle-end/63962 + * match.pd ((p +p off1) +p off2 -> (p +p (off1 + off2))): + Guard with single-use operand 0. + +2014-11-20 Richard Biener <rguenther@suse.de> + + PR tree-optimization/63677 + * tree-ssa-dom.c: Include gimplify.h for unshare_expr. + (avail_exprs_stack): Make a vector of pairs. + (struct hash_expr_elt): Replace stmt member with vop member. + (expr_elt_hasher::equal): Simplify. + (initialize_hash_element): Adjust. + (initialize_hash_element_from_expr): Likewise. + (dom_opt_dom_walker::thread_across_edge): Likewise. + (record_cond): Likewise. + (dom_opt_dom_walker::before_dom_children): Likewise. + (print_expr_hash_elt): Likewise. + (remove_local_expressions_from_table): Restore previous state + if requested. + (record_equivalences_from_stmt): Record &x + CST as constant + &MEM[&x, CST] for further propagation. + (vuse_eq): New function. + (lookup_avail_expr): For loads use the alias oracle to see + whether a candidate from the expr hash is usable. + (avail_expr_hash): Do not hash VUSEs. + +2014-11-20 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/59593 + * config/arm/arm.md (*movhi_insn): Use right formatting + for immediate. + +2014-11-20 Igor Zamyatin <igor.zamyatin@intel.com> + + PR sanitizer/63845 + * function.c (assign_parms): Move init of pic_offset_table_rtx + from here to... + * cfgexpand.c (expand_used_vars): ...here. + +2014-11-19 Jan Hubicka <hubicka@ucw.cz> + + * tree.c (free_lang_data_in_type): If BINFO has no important + information in it, set it to NULL. + (get_binfo_at_offset): Do not walk fields, only bases. + * ipa-utils.h (polymorphic_type_binfo_p): Be ready for BINFO_TYPE + to be NULL. + * ipa-polymorphic-call.c (record_known_type): Likewise. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * ipa-icf.c (sem_item_optimizer::~sem_item_optimizer): Free each + congruence_class_group *. + +2014-11-19 Uros Bizjak <ubizjak@gmail.com> + + PR target/63947 + * config/i386/i386.c (put_condition_code) <case LTU, case GEU>: + Output "b" and "nb" suffix for FP mode. + +2014-11-19 Jan Hubicka <hubicka@ucw.cz> + + PR bootstrap/63963 + * tree-streamer-out.c (write_ts_function_decl_tree_pointers): Stream + out DECL_FUNCTION_SPECIFIC_TARGET + * tree-streamer-in.c (lto_input_ts_function_decl_tree_pointers): Stream + in DECL_FUNCTION_SPECIFIC_TARGET. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * pass_manager.h (GCC_PASS_LISTS): Add all_late_ipa_passes. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * lra.c (lra): After creating live ranges in preparation for call + to lra_inheritance, set live_p to true. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * tree-ssa-threadedge.c (thread_across_edge): Don't just release + "path", delete it. + * tree-ssa-threadupdate.c (delete_jump_thread_path): Likewise. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * tree-ssa-pre.c (do_regular_insertion): Convert "avail" from + vec<> to auto_vec<> to fix a leak. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * dwarf2out.c (dwarf2out_c_finalize): Free producer_string. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * ira-costs.c (ira_costs_c_finalize): New function. + * ira.h (ira_costs_c_finalize): New prototype. + * toplev.c (toplev::finalize): Call ira_costs_c_finalize. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * ipa-reference.c (ipa_reference_c_finalize): Release + optimization_summary_obstack. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * toplev.c (toplev::finalize): Free opts_obstack. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * toplev.c (toplev::finalize): Clean up save_decoded_options. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * bb-reorder.c + (find_rarely_executed_basic_blocks_and_crossing_edges): Convert + local bbs_in_hot_partition from vec<> to auto_vec<>. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * config/alpha/alpha.c (alpha_option_override): Remove static from + "handle_trap_shadows_info" and "align_insns_info". + * config/i386/i386.c (ix86_option_override): Likewise for + "insert_vzeroupper_info". + * config/rl78/rl78.c (rl78_asm_file_start): Likewise for + "rl78_devirt_info" and "rl78_move_elim_info". + * config/rs6000/rs6000.c (rs6000_option_override): Likewise for + "analyze_swaps_info". + * context.c (gcc::context::~context): New. + * context.h (gcc::context::~context): New. + * dumpfile.c (dump_files): Add "false" initializers for new field + "owns_strings". + (gcc::dump_manager::~dump_manager): New. + (gcc::dump_manager::dump_register): Add param "take_ownership". + * dumpfile.h (struct dump_file_info): Add field "owns_strings". + (gcc::dump_manager::~dump_manager): New. + (gcc::dump_manager::dump_register): Add param "take_ownership". + * pass_manager.h (gcc::pass_manager::operator delete): New. + (gcc::pass_manager::~pass_manager): New. + * passes.c (pass_manager::register_one_dump_file): Pass "true" to + new "owns_strings" argument to dump_register. + (pass_manager::operator delete): New. + (delete_pass_tree): New function. + (pass_manager::~pass_manager): New. + * statistics.c (statistics_early_init): Pass "false" to + new "owns_strings" argument to dump_register. + * toplev.c (toplev::finalize): Clean up the context and thus the + things it owns. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * reginfo.c (finish_subregs_of_mode): Replace obstack_finish with + obstack_free when cleaning up valid_mode_changes_obstack. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + PR jit/63854 + * opts.c (finalize_options_struct): New. + * opts.h (finalize_options_struct): New. + * toplev.c (toplev::finalize): Call finalize_options_struct + on global_options and global_options_set. + +2014-11-19 Manuel López-Ibáñez <manu@gcc.gnu.org> + Jakub Jelinek <jakub@redhat.com> + + PR driver/36312 + PR driver/63837 + * gcc.c (process_command): Don't check for input/output + filename equality if output is HOST_BIT_BUCKET. + * toplev.c (init_asm_output): Likewise. + +2014-11-19 David Malcolm <dmalcolm@redhat.com> + + Merger of git branch "gimple-classes-v2-option-3". + + * ChangeLog.gimple-classes: New. + + * coretypes.h (struct gcond): Add forward decl. + (struct gdebug): Likewise. + (struct ggoto): Likewise. + (struct glabel): Likewise. + (struct gswitch): Likewise. + (struct gassign): Likewise. + (struct gasm): Likewise. + (struct gcall): Likewise. + (struct gtransaction): Likewise. + (struct greturn): Likewise. + (struct gbind): Likewise. + (struct gcatch): Likewise. + (struct geh_filter): Likewise. + (struct geh_mnt): Likewise. + (struct geh_else): Likewise. + (struct gresx): Likewise. + (struct geh_dispatch): Likewise. + (struct gphi): Likewise. + (struct gtry): Likewise. + (struct gomp_atomic_load): Likewise. + (struct gomp_atomic_store): Likewise. + (struct gomp_continue): Likewise. + (struct gomp_critical): Likewise. + (struct gomp_for): Likewise. + (struct gomp_parallel): Likewise. + (struct gomp_task): Likewise. + (struct gomp_sections): Likewise. + (struct gomp_single): Likewise. + (struct gomp_target): Likewise. + (struct gomp_teams): Likewise. + + * doc/gimple.texi (Class hierarchy of GIMPLE statements): Update + for renaming of gimple subclasses. + + * gdbhooks.py: Update. + + * gimple-iterator.c (gsi_for_phi): New. + (gsi_start_phis): Strengthen return type from gimple_stmt_iterator + to gphi_iterator. + * gimple-iterator.h (struct gphi_iterator): New subclass of + gimple_stmt_iterator. + (gsi_for_phi): New prototype. + (gsi_start_phis): Strengthen return type from gimple_stmt_iterator + to gphi_iterator. + (gsi_next_nonvirtual_phi): Strengthen param from + gimple_stmt_iterator * to gphi_iterator *, and local "phi" from + gimple to gphi *. + + * gsstruct.def: Update for renamings of classes. + + * gimple.c (gimple_build_return): Strengthen return type from + gimple to greturn *. + (gimple_call_reset_alias_info): Strengthen param to gcall *. + (gimple_build_call_1): Strengthen return type from gimple to + gcall *. + (gimple_build_call_vec): Likewise. + (gimple_build_call): Likewise. + (gimple_build_call_valist): Likewise. + (gimple_build_call_internal_1): Likewise. + (gimple_build_call_internal): Likewise. + (gimple_build_call_internal_vec): Likewise. + (gimple_build_call_from_tree): Likewise. + (gimple_build_assign_stat): Strengthen return type from gimple to + gassign *. + (gimple_build_assign_with_ops): Likewise. + (gimple_build_assign_with_ops): Likewise. + (gimple_build_cond): Strengthen return type from gimple to + gcond *. + (gimple_build_cond_from_tree): Likewise. + (gimple_cond_set_condition_from_tree): Require a gcond *. + (gimple_build_label): Strengthen return type from gimple to + glabel *. + (gimple_build_goto): Strengthen return type from gimple to + ggoto *. + (gimple_build_bind): Strengthen return type from gimple to + gbind *. + (gimple_build_asm_1): Strengthen return type from gimple to + gasm *. + (gimple_build_asm_vec): Likewise. + (gimple_build_catch): Strengthen return type from gimple to + gcatch *. + (gimple_build_eh_filter): Strengthen return type from gimple to + geh_filter *. + (gimple_build_eh_must_not_throw): Strengthen return type from + gimple to geh_mnt *. + (gimple_build_eh_else): Strengthen return type from gimple to + geh_else *. + (gimple_build_try): Update for renaming of gimple_statement_try to + gtry. + (gimple_build_resx): Strengthen return type from gimple to + gresx *. + (gimple_build_switch_nlabels): Strengthen return type from gimple + to gswitch *. + (gimple_build_switch): Likewise. + (gimple_build_eh_dispatch): Strengthen return type from gimple to + geh_dispatch *. + (gimple_build_debug_bind_stat): Strengthen return type from gimple + to gdebug *. + (gimple_build_debug_source_bind_stat): Strengthen return type from + gimple to gdebug *. + (gimple_build_omp_critical): Strengthen return type from gimple to + gomp_critical *. + (gimple_build_omp_for): Strengthen return type from gimple to + gomp_for *. + (gimple_build_omp_parallel): Strengthen return type from gimple to + gomp_parallel *. + (gimple_build_omp_task): Strengthen return type from gimple to + gomp_task *. + (gimple_build_omp_continue): Strengthen return type from gimple to + gomp_continue *. + (gimple_build_omp_sections): Strengthen return type from gimple to + gomp_sections *. + (gimple_build_omp_single): Strengthen return type from gimple to + gomp_single *. + (gimple_build_omp_target): Strengthen return type from gimple to + gomp_target *. + (gimple_build_omp_teams): Strengthen return type from gimple to + gomp_teams *. + (gimple_build_omp_atomic_load): Strengthen return type from gimple + to gomp_atomic_load *. + (gimple_build_omp_atomic_store): Strengthen return type from gimple + to gomp_atomic_store *. + (gimple_build_transaction): Strengthen return type from gimple + to gtransaction *. + (empty_stmt_p): Replace check for GIMPLE_BIND with a dyn_cast. + (gimple_call_fnspec): Require a const gcall *. + (gimple_call_arg_flags): Likewise. + (gimple_call_return_flags): Likewise. + (gimple_set_bb): Add a checked cast. + (gimple_copy): Within the cases, add locals of the appropriate + subclass and use in place of "stmt" and "copy" for typesafety. + (gimple_has_side_effects): Add a checked cast. + (gimple_could_trap_p_1): Likewise. + (gimple_call_copy_skip_args): Require a gcall *, and return one. + (gimple_asm_clobbers_memory_p): Require a const gasm *. + (infer_nonnull_range): Replace a check for GIMPLE_RETURN with a + dyn_cast, introducing local "return_stmt" and using ti in place + of "stmt". + + * gimple.h (gimple_vec): Eliminate this typedef. + (struct gimple_statement_call): Rename to... + (struct gcall): ...this. + (struct gimple_statement_bind): Rename to... + (struct gbind): ...this. + (struct gimple_statement_catch): Rename to... + (struct gcatch): ...this. + (struct gimple_statement_eh_filter): Rename to... + (struct geh_filter): ...this. + (struct gimple_statement_eh_else): Rename to... + (struct geh_else): ...this. + (struct gimple_statement_eh_mnt): Rename to... + (struct geh_mnt): ...this. + (struct gimple_statement_phi): Rename to... + (struct gphi): ...this. + (struct gimple_statement_resx): Rename to... + (struct gresx): ...this. + (struct gimple_statement_eh_dispatch): Rename to... + (struct geh_dispatch): ...this. + (struct gimple_statement_try): Rename to... + (struct gtry): ...this. + (struct gimple_statement_asm): Rename to... + (struct gasm): ...this. + (struct gimple_statement_omp_critical): Rename to... + (struct gomp_critical): ...this. + (struct gimple_statement_omp_for): Rename to... + (struct gomp_for): ...this. + (struct gimple_statement_omp_parallel): Rename to... + (struct gomp_parallel): ...this. + (struct gimple_statement_omp_target): Rename to... + (struct gomp_target): ...this. + (struct gimple_statement_omp_task): Rename to... + (struct gomp_task): ...this. + (struct gimple_statement_omp_sections): Rename to... + (struct gomp_sections): ...this. + (struct gimple_statement_omp_continue): Rename to... + (struct gomp_continue): ...this. + (struct gimple_statement_omp_single): Rename to... + (struct gomp_single): ...this. + (struct gimple_statement_omp_teams): Rename to... + (struct gomp_teams): ...this. + (struct gimple_statement_omp_atomic_load): Rename to... + (struct gomp_atomic_load): ...this. + (struct gimple_statement_omp_atomic_store :): Rename to... + (struct gomp_atomic_store :): ...this. + (struct gimple_statement_transaction): Rename to... + (struct gtransaction): ...this. + (struct gcond): New subclass. + (struct gdebug): New subclass. + (struct ggoto): New subclass. + (struct glabel): New subclass. + (struct gswitch): New subclass. + (struct gassign): New subclass. + (struct greturn): New subclass. + (is_a_helper <gimple_statement_asm *>::test): Rename to... + (is_a_helper <gasm *>::test): ...this. + (is_a_helper <gimple_statement_bind *>::test): Rename to... + (is_a_helper <gbind *>::test): ...this. + (is_a_helper <gassign *>::test): New. + (is_a_helper <gimple_statement_call *>::test): Rename to... + (is_a_helper <gcall *>::test): ...this. + (is_a_helper <gimple_statement_catch *>::test): Rename to... + (is_a_helper <gcatch *>::test): ...this. + (is_a_helper <gimple_statement_resx *>::test): Rename to... + (is_a_helper <gresx *>::test): ...this. + (is_a_helper <gcond *>::test): New. + (is_a_helper <gdebug *>::test): New. + (is_a_helper <ggoto *>::test): New. + (is_a_helper <glabel *>::test): New. + (is_a_helper <gimple_statement_eh_dispatch *>::test): Rename to... + (is_a_helper <geh_dispatch *>::test): ...this. + (is_a_helper <gimple_statement_eh_else *>::test): Rename to... + (is_a_helper <geh_else *>::test): ...this. + (is_a_helper <gimple_statement_eh_filter *>::test): Rename to... + (is_a_helper <geh_filter *>::test): ...this. + (is_a_helper <gimple_statement_eh_mnt *>::test): Rename to... + (is_a_helper <geh_mnt *>::test): ...this. + (is_a_helper <gimple_statement_omp_atomic_load *>::test): Rename to... + (is_a_helper <gomp_atomic_load *>::test): ...this. + (is_a_helper <gimple_statement_omp_atomic_store *>::test): Rename to... + (is_a_helper <gomp_atomic_store *>::test): ...this. + (is_a_helper <gimple_statement_omp_continue *>::test): Rename to... + (is_a_helper <gomp_continue *>::test): ...this. + (is_a_helper <gimple_statement_omp_critical *>::test): Rename to... + (is_a_helper <gomp_critical *>::test): ...this. + (is_a_helper <gimple_statement_omp_for *>::test): Rename to... + (is_a_helper <gomp_for *>::test): ...this. + (is_a_helper <gimple_statement_omp_parallel *>::test): Rename to... + (is_a_helper <gomp_parallel *>::test): ...this. + (is_a_helper <gimple_statement_omp_target *>::test): Rename to... + (is_a_helper <gomp_target *>::test): ...this. + (is_a_helper <gimple_statement_omp_sections *>::test): Rename to... + (is_a_helper <gomp_sections *>::test): ...this. + (is_a_helper <gimple_statement_omp_single *>::test): Rename to... + (is_a_helper <gomp_single *>::test): ...this. + (is_a_helper <gimple_statement_omp_teams *>::test): Rename to... + (is_a_helper <gomp_teams *>::test): ...this. + (is_a_helper <gimple_statement_omp_task *>::test): Rename to... + (is_a_helper <gomp_task *>::test): ...this. + (is_a_helper <gimple_statement_phi *>::test): Rename to... + (is_a_helper <gphi *>::test): ...this. + (is_a_helper <gimple_statement_transaction *>::test): Rename to... + (is_a_helper <gtransaction *>::test): ...this. + (is_a_helper <greturn *>::test): New. + (is_a_helper <gswitch *>::test): New. + (is_a_helper <gimple_statement_try *>::test): Rename to... + (is_a_helper <gtry *>::test): ...this. + (is_a_helper <const gimple_statement_asm *>::test): Rename to... + (is_a_helper <const gasm *>::test): ...this. + (is_a_helper <const gimple_statement_bind *>::test): Rename to... + (is_a_helper <const gbind *>::test): ...this. + (is_a_helper <const gimple_statement_call *>::test): Rename to... + (is_a_helper <const gcall *>::test): ...this. + (is_a_helper <const gimple_statement_catch *>::test): Rename to... + (is_a_helper <const gcatch *>::test): ...this. + (is_a_helper <const gimple_statement_resx *>::test): Rename to... + (is_a_helper <const gresx *>::test): ...this. + (is_a_helper <const gimple_statement_eh_dispatch *>::test): Rename to... + (is_a_helper <const geh_dispatch *>::test): ...this. + (is_a_helper <const gimple_statement_eh_filter *>::test): Rename to... + (is_a_helper <const geh_filter *>::test): ...this. + (is_a_helper <const gimple_statement_omp_atomic_load *>::test): + Rename to... + (is_a_helper <const gomp_atomic_load *>::test): ...this. + (is_a_helper <const gimple_statement_omp_atomic_store *>::test): + Rename to... + (is_a_helper <const gomp_atomic_store *>::test): ...this. + (is_a_helper <const gimple_statement_omp_continue *>::test): + Rename to... + (is_a_helper <const gomp_continue *>::test): ...this. + (is_a_helper <const gimple_statement_omp_critical *>::test): + Rename to... + (is_a_helper <const gomp_critical *>::test): ...this. + (is_a_helper <const gimple_statement_omp_for *>::test): Rename to... + (is_a_helper <const gomp_for *>::test): ...this. + (is_a_helper <const gimple_statement_omp_parallel *>::test): + Rename to... + (is_a_helper <const gomp_parallel *>::test): ...this. + (is_a_helper <const gimple_statement_omp_target *>::test): Rename to... + (is_a_helper <const gomp_target *>::test): ...this. + (is_a_helper <const gimple_statement_omp_sections *>::test): + Rename to... + (is_a_helper <const gomp_sections *>::test): ...this. + (is_a_helper <const gimple_statement_omp_single *>::test): Rename to... + (is_a_helper <const gomp_single *>::test): ...this. + (is_a_helper <const gimple_statement_omp_teams *>::test): Rename to... + (is_a_helper <const gomp_teams *>::test): ...this. + (is_a_helper <const gimple_statement_omp_task *>::test): Rename to... + (is_a_helper <const gomp_task *>::test): ...this. + (is_a_helper <const gimple_statement_phi *>::test): Rename to... + (is_a_helper <const gphi *>::test): ...this. + (is_a_helper <const gimple_statement_transaction *>::test): Rename to... + (is_a_helper <const gtransaction *>::test): ...this. + (gimple_build_return): Strengthen return type to greturn *. + (gimple_call_reset_alias_info): Require a gcall *. + (gimple_build_call_vec): Return a gcall *. + (gimple_build_call): Likewise. + (gimple_build_call_valist): Likewise. + (gimple_build_call_internal): Likewise. + (gimple_build_call_internal_vec): Likewise. + (gimple_build_call_from_tree): Likewise. + (gimple_build_assign_stat): Return a gassign *. + (gimple_build_assign_with_ops): Likewise. + (gimple_build_cond): Return a gcond *. + (gimple_build_cond_from_tree): Likewise. + (gimple_cond_set_condition_from_tree): Require a gcond *. + (gimple_build_label): Return a glabel *. + (gimple_build_goto): Return a ggoto *. + (gimple_build_bind): Return a gbind *. + (gimple_build_asm_vec): Return a gasm *. + (gimple_build_catch): Return a gcatch *. + (gimple_build_eh_filter): Return a geh_filter *. + (gimple_build_eh_must_not_throw): Return a geh_mnt *. + (gimple_build_eh_else): Return a geh_else *. + (gimple_build_try): Return a gtry *. + (gimple_build_resx): Return a gresx *. + (gimple_build_switch_nlabels): Return a gswitch *. + (gimple_build_switch): Return a gswitch *. + (gimple_build_eh_dispatch): Return a geh_dispatch *. + (gimple_build_debug_bind_stat): Return a gdebug *. + (gimple_build_debug_source_bind_stat): Return a gdebug *. + (gimple_build_omp_critical): Return a gomp_critical *. + (gimple_build_omp_for): Return a gomp_for *. + (gimple_build_omp_parallel): Return a gomp_parallel *. + (gimple_build_omp_task): Return a gomp_task *. + (gimple_build_omp_continue): Return a gomp_continue *. + (gimple_build_omp_sections): Return a gomp_sections *. + (gimple_build_omp_single): Return a gomp_single *. + (gimple_build_omp_target): Return a gomp_target *. + (gimple_build_omp_teams): Return a gomp_teams *. + (gimple_build_omp_atomic_load): Return a gomp_atomic_load *. + (gimple_build_omp_atomic_store): Return a gomp_atomic_store *. + (gimple_build_transaction): Return a gtransaction *. + (gimple_call_arg_flags): Require a const gcall *. + (gimple_call_return_flags): Likewise. + (gimple_call_copy_skip_args): Require and return a gcall *. + (gimple_asm_clobbers_memory_p): Require a const gasm *. + (gimple_seq_first_stmt_as_a_bind): New. + (gimple_assign_nontemporal_move_p): Require a const gassign * + rather than a const_gimple. + (gimple_call_internal_fn): Update for renaming to gcall. + (gimple_call_fntype): Likewise. + (gimple_call_set_fntype): Require a gcall * rather than a gimple. + (gimple_call_set_fn): Likewise. + (gimple_call_set_internal_fn): Likewise. + (gimple_call_set_chain): Likewise. + (gimple_call_set_tail): Likewise. + (gimple_call_tail_p): Likewise. + (gimple_call_set_return_slot_opt): Likewise. + (gimple_call_return_slot_opt_p): Likewise. + (gimple_call_set_from_thunk): Likewise. + (gimple_call_from_thunk_p): Likewise. + (gimple_call_set_va_arg_pack): Likewise. + (gimple_call_va_arg_pack_p): Likewise. + (gimple_call_set_nothrow): Likewise. + (gimple_call_nothrow_p): Likewise. + (gimple_call_set_alloca_for_var): Likewise. + (gimple_call_alloca_for_var_p): Likewise. + (gimple_call_use_set): Likewise. + (gimple_call_clobber_set): Likewise. + (gimple_call_return_type): Require a const gcall * rather than a + const_gimple. + (gimple_call_chain_ptr): Likewise. + (gimple_call_copy_flags): Require a pair of gcall *. + (gimple_cond_set_code): Require a gcond * rather than a gimple + (gimple_cond_set_lhs): Likewise. + (gimple_cond_set_rhs): Likewise. + (gimple_cond_set_true_label): Likewise. + (gimple_cond_set_false_label): Likewise. + (gimple_cond_make_false): Likewise. + (gimple_cond_make_true): Likewise. + (gimple_cond_lhs_ptr): Require a const gcond * rather than a + const_gimple. + (gimple_cond_rhs_ptr): Likewise. + (gimple_cond_true_label): Likewise. + (gimple_cond_false_label): Likewise. + (gimple_cond_true_p): Likewise. + (gimple_cond_false_p): Likewise. + (gimple_cond_set_condition): Likewise. + (gimple_label_label): Require a const glabel *. + (gimple_label_set_label): Require a glabel *. + (gimple_goto_set_dest): Require a ggoto *. + (gimple_bind_vars): Require a const gbind *. + (gimple_bind_block): Likewise. + (gimple_bind_set_vars): Require a gbind *. + (gimple_bind_append_vars): Likewise. + (gimple_bind_body_ptr): Likewise. + (gimple_bind_body): Likewise. + (gimple_bind_set_body): Likewise. + (gimple_bind_add_stmt): Likewise. + (gimple_bind_add_seq): Likewise. + (gimple_bind_set_block): Likewise. + (gimple_asm_ninputs): Require a const gasm *. + (gimple_asm_noutputs): Likewise. + (gimple_asm_nclobbers): Likewise. + (gimple_asm_nlabels): Likewise. + (gimple_asm_input_op): Likewise. + (gimple_asm_input_op_ptr): Likewise. + (gimple_asm_output_op): Likewise. + (gimple_asm_output_op_ptr): Likewise. + (gimple_asm_clobber_op): Likewise. + (gimple_asm_label_op): Likewise. + (gimple_asm_string): Likewise. + (gimple_asm_volatile_p): Likewise. + (gimple_asm_input_p): Likewise. + (gimple_asm_set_input_op): Require a gasm *. + (gimple_asm_set_output_op): Likewise. + (gimple_asm_set_clobber_op): Likewise. + (gimple_asm_set_label_op): Likewise. + (gimple_asm_set_volatile): Likewise. + (gimple_asm_set_input): Likewise. + (gimple_catch_types): Require a const gcatch *. + (gimple_catch_types_ptr): Require a gcatch *. + (gimple_catch_handler_ptr): Likewise. + (gimple_catch_handler): Likewise. + (gimple_catch_set_types): Likewise. + (gimple_catch_set_handler): Likewise. + (gimple_eh_filter_types): Update for renaming of subclass to + geh_filter. + (gimple_eh_filter_types_ptr): Likewise. + (gimple_eh_filter_failure_ptr): Likewise. + (gimple_eh_filter_set_types): Require a geh_filter *. + (gimple_eh_filter_set_failure): Likewise. + (gimple_eh_must_not_throw_fndecl): Require a geh_mnt *. + (gimple_eh_must_not_throw_set_fndecl): Likewise. + (gimple_eh_else_n_body_ptr): Require a geh_else *. + (gimple_eh_else_n_body): Likewise. + (gimple_eh_else_e_body_ptr): Likewise. + (gimple_eh_else_e_body): Likewise. + (gimple_eh_else_set_n_body): Likewise. + (gimple_eh_else_set_e_body): Likewise. + (gimple_try_set_kind): Require a gtry *. + (gimple_try_set_catch_is_cleanup): Likewise. + (gimple_try_set_eval): Likewise. + (gimple_try_set_cleanup): Likewise. + (gimple_try_eval_ptr): Update for renaming of subclass to gtry. + (gimple_try_cleanup_ptr): Likewise. + (gimple_phi_capacity): Update for renaming of subclass to gphi. + (gimple_phi_num_args): Likewise. + (gimple_phi_result): Likewise. + (gimple_phi_result_ptr): Likewise. + (gimple_phi_arg): Likewise. + (gimple_phi_set_result): Require a gphi *. + (gimple_phi_set_arg): Likewise. + (gimple_phi_arg_def_ptr): Likewise. + (gimple_phi_arg_edge): Likewise. + (gimple_phi_arg_location): Likewise. + (gimple_phi_arg_location_from_edge): Likewise. + (gimple_phi_arg_set_location): Likewise. + (gimple_phi_arg_has_location): Likewise. + (gimple_resx_region): Require a const gresx *. + (gimple_resx_set_region): Require a gresx *. + (gimple_eh_dispatch_region): Require a const geh_dispatch *. + (gimple_eh_dispatch_set_region): Require a geh_dispatch *. + (gimple_switch_num_labels): Require a const gswitch *. + (gimple_switch_set_num_labels): Likewise. + (gimple_switch_index): Likewise. + (gimple_switch_index_ptr): Likewise. + (gimple_switch_label): Likewise. + (gimple_switch_default_label): Likewise. + (gimple_switch_set_index): Require a gswitch *. + (gimple_switch_set_label): Likewise. + (gimple_switch_set_default_label): Likewise. + (gimple_omp_critical_name): Require a const gomp_critical *. + (gimple_omp_critical_name_ptr): Require a gomp_critical *. + (gimple_omp_critical_set_name): Likewise. + (gimple_omp_for_set_kind): Require a gomp_for *. + (gimple_omp_for_set_combined_p): Likewise. + (gimple_omp_for_set_combined_into_p): Likewise. + (gimple_omp_for_clauses): Update for renaming of subclass to + gomp_for. + (gimple_omp_for_clauses_ptr): Likewise. + (gimple_omp_for_set_clauses): Likewise. + (gimple_omp_for_collapse): Likewise. + (gimple_omp_for_index): Likewise. + (gimple_omp_for_index_ptr): Likewise. + (gimple_omp_for_set_index): Likewise. + (gimple_omp_for_initial): Likewise. + (gimple_omp_for_initial_ptr): Likewise. + (gimple_omp_for_set_initial): Likewise. + (gimple_omp_for_final): Likewise. + (gimple_omp_for_final_ptr): Likewise. + (gimple_omp_for_set_final): Likewise. + (gimple_omp_for_incr): Likewise. + (gimple_omp_for_incr_ptr): Likewise. + (gimple_omp_for_set_incr): Likewise. + (gimple_omp_for_pre_body): Likewise. + (gimple_omp_for_set_pre_body): Likewise. + (gimple_omp_parallel_clauses): Update for renaming of subclass to + gomp_parallel. + (gimple_omp_parallel_clauses_ptr): Require a gomp_parallel *. + (gimple_omp_parallel_set_clauses): Likewise. + (gimple_omp_parallel_child_fn_ptr): Likewise. + (gimple_omp_parallel_set_child_fn): Likewise. + (gimple_omp_parallel_data_arg_ptr): Likewise. + (gimple_omp_parallel_set_data_arg): Likewise. + (gimple_omp_parallel_child_fn): Require a const gomp_parallel *. + (gimple_omp_parallel_data_arg): Likewise. + (gimple_omp_task_clauses): Update for renaming of subclass to + gomp_task. + (gimple_omp_task_clauses_ptr): Likewise. + (gimple_omp_task_set_clauses): Likewise. + (gimple_omp_task_child_fn): Likewise. + (gimple_omp_task_child_fn_ptr): Likewise. + (gimple_omp_task_set_child_fn): Likewise. + (gimple_omp_task_data_arg): Likewise. + (gimple_omp_task_data_arg_ptr): Likewise. + (gimple_omp_task_set_data_arg): Likewise. + (gimple_omp_taskreg_clauses): Whitespace fixes. + (gimple_omp_taskreg_clauses_ptr): Likewise. + (gimple_omp_taskreg_set_clauses): Likewise. + (gimple_omp_taskreg_child_fn): Likewise. + (gimple_omp_taskreg_child_fn_ptr): Likewise. + (gimple_omp_taskreg_set_child_fn): Likewise. + (gimple_omp_taskreg_data_arg): Likewise. + (gimple_omp_taskreg_data_arg_ptr): Likewise. + (gimple_omp_taskreg_set_data_arg): Likewise. + (gimple_omp_task_copy_fn): Update for renaming of subclass to + gomp_task. + (gimple_omp_task_copy_fn_ptr): Likewise. + (gimple_omp_task_set_copy_fn): Likewise. + (gimple_omp_task_arg_size): Likewise. + (gimple_omp_task_arg_size_ptr): Likewise. + (gimple_omp_task_set_arg_size): Likewise. + (gimple_omp_task_arg_align): Likewise. + (gimple_omp_task_arg_align_ptr): Likewise. + (gimple_omp_task_set_arg_align): Likewise. + (gimple_omp_single_clauses): Update for renaming of subclass to + gomp_single. + (gimple_omp_single_clauses_ptr): Likewise. + (gimple_omp_single_set_clauses): Likewise. + (gimple_omp_target_clauses): Update for renaming of subclass to + gomp_target. + (gimple_omp_target_clauses_ptr): Likewise. + (gimple_omp_target_set_clauses): Require a gomp_target *. + (gimple_omp_target_set_kind): Likewise. + (gimple_omp_target_child_fn_ptr): Likewise. + (gimple_omp_target_set_child_fn): Likewise. + (gimple_omp_target_data_arg_ptr): Likewise. + (gimple_omp_target_set_data_arg): Likewise. + (gimple_omp_target_child_fn): Require a const gomp_target *. + (gimple_omp_target_data_arg): Likewise. + (gimple_omp_teams_clauses): Update for renaming of subclass to + gomp_teams. + (gimple_omp_teams_clauses_ptr): Likewise. + (gimple_omp_teams_set_clauses): Require a gomp_teams *. + (gimple_omp_sections_clauses): Update for renaming of subclass to + gomp_sections. + (gimple_omp_sections_clauses_ptr): Likewise. + (gimple_omp_sections_set_clauses): Likewise. + (gimple_omp_sections_control): Likewise. + (gimple_omp_sections_control_ptr): Likewise. + (gimple_omp_sections_set_control): Likewise. + (gimple_omp_for_set_cond): Likewise. + (gimple_omp_for_cond): Likewise. + (gimple_omp_atomic_store_set_val): Require a gomp_atomic_store *. + (gimple_omp_atomic_store_val_ptr): Likewise. + (gimple_omp_atomic_load_set_lhs): Likewise. + (gimple_omp_atomic_store_val): Require a const gomp_atomic_store *. + (gimple_omp_atomic_load_lhs): Likewise. + (gimple_omp_atomic_load_rhs): Likewise. + (gimple_omp_atomic_load_lhs_ptr): Require a gomp_atomic_load *. + (gimple_omp_atomic_load_set_rhs): Likewise. + (gimple_omp_atomic_load_rhs_ptr): Likewise. + (gimple_omp_continue_control_def): Require a const gomp_continue *. + (gimple_omp_continue_control_use): Likewise. + (gimple_omp_continue_control_def_ptr): Require a gomp_continue *. + (gimple_omp_continue_set_control_def): Likewise. + (gimple_omp_continue_control_use_ptr): Likewise. + (gimple_omp_continue_set_control_use): Likewise. + (gimple_transaction_body_ptr): Require a gtransaction *. + (gimple_transaction_body): Likewise. + (gimple_transaction_label_ptr): Likewise. + (gimple_transaction_label): Require a const gtransaction *. + (gimple_transaction_subcode): Likewise. + (gimple_transaction_set_body): Require a gtransaction *. + (gimple_transaction_set_label): Likewise. + (gimple_transaction_set_subcode): Likewise. + (gimple_return_retval_ptr): Require a const greturn *. + (gimple_return_retval): Likewise. + (gimple_return_set_retval): Require a greturn *. + (gimple_expr_type): Introduce local "call_stmt" and use in place of + "stmt" for typesafety. + + * asan.c: Use gimple subclasses. + * auto-profile.c: Likewise. + * builtins.c: Likewise. + * builtins.h: Likewise. + * cfgexpand.c: Likewise. + * cfgloop.c: Likewise. + * cfgloopmanip.c: Likewise. + * cgraph.c: Likewise. + * cgraph.h: Likewise. + * cgraphbuild.c: Likewise. + * cgraphclones.c: Likewise. + * cgraphunit.c: Likewise. + * expr.h: Likewise. + * gimple-builder.c: Likewise. + * gimple-builder.h: Likewise. + * gimple-fold.c: Likewise. + * gimple-low.c: Likewise. + * gimple-pretty-print.c: Likewise. + * gimple-ssa-isolate-paths.c: Likewise. + * gimple-ssa-strength-reduction.c: Likewise. + * gimple-streamer-in.c: Likewise. + * gimple-streamer-out.c: Likewise. + * gimple-walk.c: Likewise. + * gimplify-me.c: Likewise. + * gimplify.c: Likewise. + * gimplify.h: Likewise. + * graphite-scop-detection.c: Likewise. + * graphite-sese-to-poly.c: Likewise. + * internal-fn.c: Likewise. + * internal-fn.def:: Likewise. + * internal-fn.h: Likewise. + * ipa-icf-gimple.c: Likewise. + * ipa-icf-gimple.h: Likewise. + * ipa-icf.c: Likewise. + * ipa-inline-analysis.c: Likewise. + * ipa-prop.c: Likewise. + * ipa-prop.h: Likewise. + * ipa-pure-const.c: Likewise. + * ipa-split.c: Likewise. + * lto-streamer-in.c: Likewise. + * lto-streamer-out.c: Likewise. + * omp-low.c: Likewise. + * predict.c: Likewise. + * sanopt.c: Likewise. + * sese.c: Likewise. + * ssa-iterators.h: Likewise. + * stmt.c: Likewise. + * trans-mem.c: Likewise. + * tree-call-cdce.c: Likewise. + * tree-cfg.c: Likewise. + * tree-cfg.h: Likewise. + * tree-cfgcleanup.c: Likewise. + * tree-chkp.c: Likewise. + * tree-chkp.h: Likewise. + * tree-complex.c: Likewise. + * tree-data-ref.c: Likewise. + * tree-dfa.c: Likewise. + * tree-eh.c: Likewise. + * tree-eh.h: Likewise. + * tree-emutls.c: Likewise. + * tree-if-conv.c: Likewise. + * tree-inline.c: Likewise. + * tree-inline.h: Likewise. + * tree-into-ssa.c: Likewise. + * tree-into-ssa.h: Likewise. + * tree-loop-distribution.c: Likewise. + * tree-nrv.c: Likewise. + * tree-object-size.c: Likewise. + * tree-outof-ssa.c: Likewise. + * tree-parloops.c: Likewise. + * tree-phinodes.c: Likewise. + * tree-phinodes.h: Likewise. + * tree-predcom.c: Likewise. + * tree-profile.c: Likewise. + * tree-scalar-evolution.c: Likewise. + * tree-scalar-evolution.h + * tree-sra.cn_function): + * tree-ssa-alias.c: Likewise. + * tree-ssa-alias.h: Likewise. + * tree-ssa-ccp.c: Likewise. + * tree-ssa-coalesce.c: Likewise. + * tree-ssa-copy.c: Likewise. + * tree-ssa-copyrename.c: Likewise. + * tree-ssa-dce.c: Likewise. + * tree-ssa-dom.c: Likewise. + * tree-ssa-forwprop.c: Likewise. + * tree-ssa-ifcombine.c: Likewise. + * tree-ssa-live.c: Likewise. + * tree-ssa-loop-im.c: Likewise. + * tree-ssa-loop-ivcanon.c: Likewise. + * tree-ssa-loop-ivopts.c: Likewise. + * tree-ssa-loop-manip.c: Likewise. + * tree-ssa-loop-niter.c: Likewise. + * tree-ssa-loop-prefetch.c: Likewise. + * tree-ssa-loop-unswitch.c: Likewise. + * tree-ssa-math-opts.c: Likewise. + * tree-ssa-operands.c: Likewise. + * tree-ssa-phiopt.c: Likewise. + * tree-ssa-phiprop.c: Likewise. + * tree-ssa-pre.c: Likewise. + * tree-ssa-propagate.c: Likewise. + * tree-ssa-propagate.h: Likewise. + * tree-ssa-reassoc.c: Likewise. + * tree-ssa-sccvn.c: Likewise. + * tree-ssa-sccvn.h: Likewise. + * tree-ssa-sink.c: Likewise. + * tree-ssa-strlen.c + * tree-ssa-structalias.c + * tree-ssa-tail-merge.c: Likewise. + * tree-ssa-ter.c: Likewise. + * tree-ssa-threadedge.c: Likewise. + * tree-ssa-threadedge.h: Likewise. + * tree-ssa-threadupdate.c: Likewise. + * tree-ssa-uncprop.c: Likewise. + * tree-ssa-uninit.c: Likewise. + * tree-ssa.c: Likewise. + * tree-stdarg.c: Likewise. + * tree-switch-conversion.c: Likewise. + * tree-tailcall.c: Likewise. + * tree-vect-data-refs.c: Likewise. + * tree-vect-generic.c: Likewise. + * tree-vect-loop-manip.c: Likewise. + * tree-vect-loop.c: Likewise. + * tree-vect-patterns.c: Likewise. + * tree-vect-slp.c: Likewise. + * tree-vect-stmts.c: Likewise. + * tree-vectorizer.h: Likewise. + * tree-vrp.c: Likewise. + * tree.c: Likewise. + * ubsan.c: Likewise. + * value-prof.c: Likewise. + * value-prof.h: Likewise. + * vtable-verify.c: Likewise. + +2014-11-19 Markus Trippelsdorf <markus@trippelsdorf.de> + + * config/rs6000/constraints.md: Avoid signed integer overflows. + * config/rs6000/predicates.md: Likewise. + +2014-11-19 Renlin Li <Renlin.Li@arm.com> + + PR target/63424 + * config/aarch64/aarch64-simd.md (<su><maxmin>v2di3): New. + +2014-11-19 Renlin Li <Renlin.Li@arm.com> + + PR middle-end/63762 + * ira.c (ira): Update preferred class. + +2014-11-19 Jakub Jelinek <jakub@redhat.com> + + * gimple.h (gimple_build_assign_with_ops): Add unary arg overload. + (gimple_assign_set_rhs_with_ops_1): Renamed to ... + (gimple_assign_set_rhs_with_ops): ... this. Adjust binary arg + inline overload to use it. Add unary arg overload. + * gimple.c (gimple_build_assign_with_ops): New unary arg overload. + (gimple_assign_set_rhs_from_tree): Use + gimple_assign_set_rhs_with_ops instead of + gimple_assign_set_rhs_with_ops_1. + (gimple_assign_set_rhs_with_ops_1): Renamed to ... + (gimple_assign_set_rhs_with_ops): ... this. + * ipa-split.c (split_function): Remove last NULL argument + from gimple_build_assign_with_ops call. + * tree-ssa-loop-im.c + (move_computations_dom_walker::before_dom_children): Likewise. + * tsan.c (instrument_builtin_call): Likewise. + * tree-vect-stmts.c (vect_init_vector, vectorizable_mask_load_store, + vectorizable_conversion, vectorizable_load): Likewise. + * tree-vect-loop.c (vect_is_simple_reduction_1, + get_initial_def_for_induction): Likewise. + * tree-loop-distribution.c (generate_memset_builtin): Likewise. + * tree-vect-patterns.c (vect_handle_widen_op_by_const, + vect_recog_widen_mult_pattern, vect_operation_fits_smaller_type, + vect_recog_over_widening_pattern, vect_recog_rotate_pattern, + vect_recog_vector_vector_shift_pattern, vect_recog_divmod_pattern, + vect_recog_mixed_size_cond_pattern, adjust_bool_pattern_cast, + adjust_bool_pattern, vect_recog_bool_pattern): Likewise. + * tree-ssa-phiopt.c (conditional_replacement, abs_replacement, + neg_replacement): Likewise. + * asan.c (build_shadow_mem_access, maybe_create_ssa_name, + maybe_cast_to_ptrmode, asan_expand_check_ifn): Likewise. + * tree-vect-slp.c (vect_get_constant_vectors): Likewise. + * omp-low.c (lower_rec_input_clauses, expand_omp_for_generic, + expand_omp_for_static_nochunk, expand_omp_for_static_chunk, + simd_clone_adjust): Likewise. + * tree-vect-loop-manip.c (vect_create_cond_for_align_checks): Likewise. + * gimple-ssa-strength-reduction.c (introduce_cast_before_cand, + replace_one_candidate): Likewise. + * gimple-builder.c (build_type_cast): Likewise. + * tree-ssa-forwprop.c (simplify_rotate): Likewise. + (forward_propagate_addr_expr_1): Remove last NULL argument + from gimple_assign_set_rhs_with_ops call. + (simplify_vector_constructor): Use gimple_assign_set_rhs_with_ops + instead of gimple_assign_set_rhs_with_ops_1. + * tree-ssa-reassoc.c (maybe_optimize_range_tests): Remove last NULL + argument from gimple_build_assign_with_ops call. + (repropagate_negates): Remove last NULL argument from + gimple_assign_set_rhs_with_ops call. + * ubsan.c (ubsan_expand_null_ifn, ubsan_expand_objsize_ifn): Remove + last NULL argument from gimple_build_assign_with_ops call. + (instrument_bool_enum_load): Likewise. Remove last NULL argument + from gimple_assign_set_rhs_with_ops call. + * tree-ssa-math-opts.c (build_and_insert_cast, convert_mult_to_fma): + Remove last NULL argument from gimple_build_assign_with_ops call. + (bswap_replace): Likewise. Use gimple_assign_set_rhs_with_ops instead + of gimple_assign_set_rhs_with_ops_1. + (convert_plusminus_to_widen): Use gimple_assign_set_rhs_with_ops + instead of gimple_assign_set_rhs_with_ops_1. + * gimple-fold.c (replace_stmt_with_simplification): Likewise. + (rewrite_to_defined_overflow, gimple_build): Remove last NULL argument + from gimple_build_assign_with_ops call. + * tree-ssa-strlen.c (handle_pointer_plus): Remove last NULL argument + from gimple_assign_set_rhs_with_ops call. + * tree-vrp.c (simplify_truth_ops_using_ranges, + simplify_bit_ops_using_ranges): Remove last NULL argument from + gimple_assign_set_rhs_with_ops call. + (simplify_float_conversion_using_ranges, + simplify_internal_call_using_ranges): Remove last NULL argument from + gimple_build_assign_with_ops call. + +2014-11-19 Wilco Dijkstra <wdijkstr@arm.com> + + PR target/61915 + * config/aarch64/aarch64.c (generic_regmove_cost): Increase FP move + cost. + +2014-11-19 Marek Polacek <polacek@redhat.com> + + PR sanitizer/63690 + * ubsan.c (instrument_object_size): Check for MEM_REF. + +2014-11-19 Ilya Verbin <ilya.verbin@intel.com> + + PR regression/63868 + * cgraph.c (cgraph_node::create): Guard g->have_offload with + ifdef ENABLE_OFFLOADING. + * omp-low.c (create_omp_child_function): Likewise. + (expand_omp_target): Guard node->mark_force_output and offload_funcs + with ifdef ENABLE_OFFLOADING. + * varpool.c (varpool_node::get_create): Guard g->have_offload and + offload_vars with ifdef ENABLE_OFFLOADING. + +2014-11-19 Felix Yang <felix.yang@huawei.com> + Shanyao Chen <chenshanyao@huawei.com> + + PR target/59593 + * config/arm/arm.md (define_attr "arch"): Add v6t2. + (define_attr "arch_enabled"): Add test for the above. + (*movhi_insn_arch4): Add new alternative. + +2014-11-19 Richard Henderson <rth@redhat.com> + + * c-family/c-common.c (c_common_reswords): Add + __builtin_call_with_static_chain. + * c-family/c-common.h (RID_BUILTIN_CALL_WITH_STATIC_CHAIN): New. + * c/c-parser.c (c_parser_postfix_expression): Handle it. + * doc/extend.texi (__builtin_call_with_static_chain): Document it. + + * calls.c (prepare_call_address): Allow decl or type for first arg. + (expand_call): Pass type to prepare_call_address if no decl. + * gimple-fold.c (gimple_fold_call): Eliminate the static chain if + the function doesn't use it; fold it otherwise. + * gimplify.c (gimplify_call_expr): Gimplify the static chain. + * tree-cfg.c (verify_gimple_call): Allow a static chain on indirect + function calls. + + * targhooks.c (default_static_chain): Remove check for + DECL_STATIC_CHAIN. + * config/moxie/moxie.c (moxie_static_chain): Likewise. + * config/i386/i386.c (ix86_static_chain): Allow decl or type + as the first argument. + * config/xtensa/xtensa.c (xtensa_static_chain): Change the name + of the unused first parameter. + * doc/tm.texi (TARGET_STATIC_CHAIN): Document the first parameter + may be a type. + * target.def (static_chain): Likewise. + +2014-11-19 Renlin Li <renlin.li@arm.com> + + * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define + __ARM_FP_FAST, __ARM_FEATURE_FMA, __ARM_FP, + __ARM_FEATURE_NUMERIC_MAXMIN, __ARM_NEON_FP. + +2014-11-19 Marek Polacek <polacek@redhat.com> + + PR sanitizer/63879 + * fold-const.c (negate_expr_p) <case NEGATE_EXPR>: Return + !TYPE_OVERFLOW_SANITIZED. + (fold_negate_expr) <case INTEGER_CST>: Fold when overflow + does not trap and when overflow wraps, or when SANITIZE_SI_OVERFLOW + is 0. + +2014-11-19 Ilya Tocar <ilya.tocar@intel.com> + + * collect2.c (main): Don't call fatal_error before + diagnostic_initialize. + * lto-wrapper.c (main): Likewise. + +2014-11-19 Tom de Vries <tom@codesourcery.com> + + PR tree-optimization/62167 + * tree-ssa-tail-merge.c (stmt_local_def): Handle statements with vuse + conservatively. + (gimple_equal_p): Don't use vn_valueize to compare for lhs equality of + assigns. + +2014-11-19 Jakub Jelinek <jakub@redhat.com> + + PR tree-optimization/63915 + * tree-vect-stmts.c (vectorizable_simd_clone_call): Pass + true instead of false as last argument to gsi_replace. + + PR sanitizer/63520 + * internal-fn.c (expand_ubsan_result_store): New function. + (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow): + Use it instead of just emit_move_insn. + +2014-11-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/63844 + * omp-low.c (fixup_child_record_type): Use a restrict qualified + referece type for the receiver parameter. + +2014-11-19 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/63913 + * ubsan.c: Include tree-eh.h. + (instrument_bool_enum_load): Handle loads that can throw. + + PR rtl-optimization/63843 + * simplify-rtx.c (simplify_binary_operation_1) <case ASHIFTRT>: For + optimization of ashiftrt of subreg of lshiftrt, check that code + is ASHIFTRT. + +2014-11-18 Andrew MacLeod <amacleod@redhat.com> + + * attribs.c (decl_attributes): Remove always true condition, + TREE_TYPE(x) will never compare equal to a TYPE_DECL. + +2014-11-18 James Greenhalgh <james.greenhalgh@arm.com> + + PR target/63937 + * target.def (use_by_pieces_infrastructure_p): Take unsigned + HOST_WIDE_INT as the size parameter. + * targhooks.c (default_use_by_pieces_infrastructure_p): Likewise. + * targhooks.h (default_use_by_pieces_infrastructure_p): Likewise. + * config/arc/arc.c (arc_use_by_pieces_infrastructure_p)): Likewise. + * config/mips/mips.c (mips_use_by_pieces_infrastructure_p)): Likewise. + * config/s390/s390.c (s390_use_by_pieces_infrastructure_p)): Likewise. + * config/sh/sh.c (sh_use_by_pieces_infrastructure_p)): Likewise. + * config/aarch64/aarch64.c + (aarch64_use_by_pieces_infrastructure_p)): Likewise. + * doc/tm.texi: Regenerate. + +2014-11-18 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.c (ipcp_cloning_candidate_p): Use opt_for_fn. + (ipa_value_from_jfunc, ipa_context_from_jfunc): Skip sanity check. + (ipa_get_indirect_edge_target_1): Use opt_for_fn. + (good_cloning_opportunity_p): Likewise. + (ipa-cp gate): Enable ipa-cp with LTO. + * ipa-profile.c (ipa_propagate_frequency): Use opt_for_fn. + * ipa.c (symbol_table::remove_unreachable_nodes): Always build type + inheritance. + * ipa-inline-transform.c (inline_transform): Check if there are inlines + to apply even at -O0. + * cgraphunit.c (cgraph_node::finalize_function): Use opt_for_fn. + (analyze_functions): Build type inheritance graph. + * ipa-inline.c (can_inline_edge_p): Use opt_for_fn. + (want_early_inline_function_p, want_inline_small_function_p): + Likewise. + (check_callers): Likewise. + (edge_badness): Likewise. + (inline_small_functions): Always be ready for indirect inlining + to happend. + (ipa_inline): Always use want_inline_function_to_all_callers_p. + (early_inline_small_functions): Use opt_for_fn. + * ipa-inline-analysis.c (estimate_function_body_sizes): use opt_for_fn. + (estimate_function_body_sizes): Likewise. + (compute_inline_parameters): Likewise. + (estimate_edge_devirt_benefit): Likewise. + (inline_analyze_function): Likewise. + * ipa-devirt.c (ipa_devirt): Likewise. + (gate): Use in_lto_p. + * ipa-prop.c (ipa_func_spec_opts_forbid_analysis_p): Use opt_for_fn. + (try_make_edge_direct_virtual_call): Likewise. + (update_indirect_edges_after_inlining): Likewise. + (ipa_free_all_structures_after_ipa_cp): Add in_lto_p check. + * common.opt (findirect-inlining): Turn into optimization. + * ipa-pure-const.c (add_new_function): Use opt_for_fn. + (pure_const_generate_summary): Likewise. + (gate_pure_const): Always enable with in_lto_p. + +2014-11-18 Maciej W. Rozycki <macro@codesourcery.com> + + * config/mips/mips.md (compression): Add `micromips32' setting. + (enabled, length): Handle it. + (shift_compression): Replace `micromips' with `micromips32' in + the `compression' attribute. + (*add<mode>3, sub<mode>3): Likewise. + +2014-11-18 Maciej W. Rozycki <macro@codesourcery.com> + + * gcc/config/mips/mips.md (*jump_absolute): Use a branch when in + range, a jump otherwise. + +2014-11-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/cortex-a15-neon.md (cortex_a15_vfp_to_from_gp): + Split into... + (cortex_a15_gp_to_vfp): ...This. + (cortex_a15_fp_to_gp): ...And this. + Define and comment bypass from vfp operations to fp->gp moves. + +2014-11-18 Martin Liska <mliska@suse.cz> + + * var-tracking.c (vt_find_locations): New fibonacci_node is used. + +2014-11-18 Martin Liska <mliska@suse.cz> + + * bt-load.c (add_btr_def): New fibonacci_heap is used. + (migrate_btr_defs): Likewise. + +2014-11-18 Martin Liska <mliska@suse.cz> + + * tracer.c (tail_duplicate): New fibonacci_heap class is used. + +2014-11-18 Martin Liska <mliska@suse.cz> + + * bb-reorder.c (mark_bb_visited): New fibonacci_heap is used. + (find_traces): Likewise. + (find_traces_1_round): Likewise. + +2014-11-18 Martin Liska <mliska@suse.cz> + + * fibonacci_heap.h: New file. + (fibonacci_heap::insert): Created from fibheap_insert. + (fibonacci_heap::empty): Created from fibheap_empty. + (fibonacci_heap::nodes): Created from fibheap_nodes. + (fibonacci_heap::min_key): Created from fibheap_min_key. + (fibonacci_heap::decrease_key): Created from fibheap_replace_key. + (fibonacci_heap::replace_key_data): Created from fibheap_replace_key_data. + (fibonacci_heap::extract_min): Created from fibheap_extract_min. + (fibonacci_heap::min): Created from fibheap_min. + (fibonacci_heap::replace_data): Created from fibheap_replace_data. + (fibonacci_heap::delete_node): Created from fibheap_delete_node. + (fibonacci_heap::union_with): Created from fibheap_union. + * ipa-inline.c (update_edge_key): New heap API is used. + (update_caller_keys): Likewise. + (update_callee_keys): Likewise. + (lookup_recursive_calls): Likewise. + (recursive_inlining): Likewise. + (add_new_edges_to_heap): Likewise. + (heap_edge_removal_hook): Likewise. + (inline_small_functions): Likewise. + +2014-11-18 Marek Polacek <polacek@redhat.com> + + PR sanitizer/63866 + * asan.c (asan_global_struct): Create a TYPE_DECL for "__asan_global", + put it into TYPE_NAME and TYPE_STUB_DECL. + * ubsan.c (ubsan_type_descriptor_type): New variable. + Function renamed to ... + (ubsan_get_type_descriptor_type): ... this. Cache + return value in ubsan_type_descriptor_type variable. + Create a TYPE_DECL for "__ubsan_type_descriptor", put it into + TYPE_NAME and TYPE_STUB_DECL. + (ubsan_get_source_location_type): Create a TYPE_DECL for + "__ubsan_source_location", put it into TYPE_NAME and TYPE_STUB_DECL. + (ubsan_type_descriptor, ubsan_create_data): Call + ubsan_get_type_descriptor_type instead of ubsan_type_descriptor_type. + Create a TYPE_DECL for name, put it into TYPE_NAME and TYPE_STUB_DECL. + +2014-11-18 Felix Yang <felix.yang@huawei.com> + + * config/aarch64/aarch64.c (doloop_end): New pattern. + * config/aarch64/aarch64.md (TARGET_CAN_USE_DOLOOP_P): Implement. + +2014-11-18 Jason Merrill <jason@redhat.com> + + * tree.c (warn_deprecated_use): Show declaration with inform. + +2014-11-18 Richard Biener <rguenther@suse.de> + + PR tree-optimization/63914 + * tree-ssa-ccp.c (canonicalize_value): Remove float value + canonicalization. + (valid_lattice_transition): Allow (partial) transition + from NaN to non-NaN if !HONOR_NANS. + (set_lattice_value): Check for valid lattice transitions + only when checking is enabled. + +2014-11-18 Bernd Schmidt <bernds@codesourcery.com> + + * config/nvptx/nvptx.c: Include <sstream> directly after "config.h". + +2014-11-18 Christophe Lyon <christophe.lyon@linaro.org> + + * config/arm/neon-testgen.ml (emit_prologue): Handle new + compile_test_optim argument. + (emit_automatics): Rename to emit_variables. Support variable + indentation of its output. + (compile_test_optim): New function. + (test_intrinsic): Call compile_test_optim. + * config/arm/neon.ml (features): Add Compiler_optim. + (ops): Add Compiler_optim feature to Vbic and Vorn. + (type_in_crypto_only): Replace 'or' by '||'. + (reinterp): Likewise. + (reinterpq): Likewise. + +2014-11-18 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/arm_neon.h (vld1_dup_f32, vld1_dup_f64, vld1_dup_p8, + vld1_dup_p16, vld1_dup_s8, vld1_dup_s16, vld1_dup_s32, vld1_dup_s64, + vld1_dup_u8, vld1_dup_u16, vld1_dup_u32, vld1_dup_u64, vld1q_dup_f32, + vld1q_dup_f64, vld1q_dup_p8, vld1q_dup_p16, vld1q_dup_s8, vld1q_dup_s16, + vld1q_dup_s32, vld1q_dup_s64, vld1q_dup_u8, vld1q_dup_u16, + vld1q_dup_u32, vld1q_dup_u64): Replace inline asm with vdup_n_ and + pointer dereference. + +2014-11-18 Marc Glisse <marc.glisse@inria.fr> + + * tree.c (element_mode, integer_truep): New functions. + * tree.h (element_mode, integer_truep): Declare them. + * fold-const.c (negate_expr_p, fold_negate_expr, combine_comparisons, + fold_cond_expr_with_comparison, fold_real_zero_addition_p, + fold_comparison, fold_ternary_loc, tree_call_nonnegative_warnv_p, + fold_strip_sign_ops): Use element_mode. + (fold_binary_loc): Use element_mode and element_precision. + * match.pd: Use integer_truep, element_mode, element_precision, + VECTOR_TYPE_P and build_one_cst. Extend some transformations to + vectors. Simplify A/-A. + +2014-11-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.md (unaligned_loaddi): Use std::swap instead of + manual swapping implementation. + (movcond_addsi): Likewise. + * config/arm/arm.c (arm_canonicalize_comparison): Likewise. + (arm_select_dominance_cc_mode): Likewise. + (arm_reload_out_hi): Likewise. + (gen_operands_ldrd_strd): Likewise. + (output_move_double): Likewise. + (arm_print_operand_address): Likewise. + (thumb_output_move_mem_multiple): Likewise. + (SWAP_RTX): Delete. + +2014-11-18 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/arm-builtins.c (CONVERT_QUALIFIERS): Delete. + (COPYSIGNF_QUALIFIERS): Likewise. + (CREATE_QUALIFIERS): Likewise. + (DUP_QUALIFIERS): Likewise. + (FLOAT_WIDEN_QUALIFIERS): Likewise. + (FLOAT_NARROW_QUALIFIERS): Likewise. + (REINTERP_QUALIFIERS): Likewise. + (RINT_QUALIFIERS): Likewise. + (SPLIT_QUALIFIERS): Likewise. + (FIXCONV_QUALIFIERS): Likewise. + (SCALARMUL_QUALIFIERS): Likewise. + (SCALARMULL_QUALIFIERS): Likewise. + (SCALARMULH_QUALIFIERS): Likewise. + (SELECT_QUALIFIERS): Likewise. + (VTBX_QUALIFIERS): Likewise. + (SHIFTIMM_QUALIFIERS): Likewise. + (SCALARMAC_QUALIFIERS): Likewise. + (LANEMUL_QUALIFIERS): Likewise. + (LANEMULH_QUALIFIERS): Likewise. + (LANEMULL_QUALIFIERS): Likewise. + (SHIFTACC_QUALIFIERS): Likewise. + (SHIFTINSERT_QUALIFIERS): Likewise. + (VTBL_QUALIFIERS): Likewise. + (LOADSTRUCT_QUALIFIERS): Likewise. + (LOADSTRUCTLANE_QUALIFIERS): Likewise. + (STORESTRUCT_QUALIFIERS): Likewise. + (STORESTRUCTLANE_QUALIFIERS): Likewise. + (neon_builtin_type_mode): Delete. + (v8qi_UP): Map to V8QImode. + (v8qi_UP): Map to V8QImode. + (v4hi_UP): Map to V4HImode. + (v4hf_UP): Map to V4HFmode. + (v2si_UP): Map to V2SImode. + (v2sf_UP): Map to V2SFmode. + (di_UP): Map to DImode. + (v16qi_UP): Map to V16QImode. + (v8hi_UP): Map to V8HImode. + (v4si_UP): Map to V4SImode. + (v4sf_UP): Map to V4SFmode. + (v2di_UP): Map to V2DImode. + (ti_UP): Map to TImode. + (ei_UP): Map to EImode. + (oi_UP): Map to OImode. + (neon_itype): Delete. + (neon_builtin_datum): Remove itype, make mode a machine_mode. + (VAR1): Update accordingly. + (arm_init_neon_builtins): Use machine_mode directly. + (neon_dereference_pointer): Likewise. + (arm_expand_neon_args): Use qualifiers to decide operand types. + (arm_expand_neon_builtin): Likewise. + * config/arm/arm_neon_builtins.def: Remap operation type for + many builtins. + +2014-11-18 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/arm-builtins.c (arm_scalar_builtin_types): New. + (enum arm_simd_type): Likewise. + (struct arm_simd_type_info): Likewise + (arm_mangle_builtin_scalar_type): Likewise. + (arm_mangle_builtin_vector_type): Likewise. + (arm_mangle_builtin_type): Likewise. + (arm_simd_builtin_std_type): Likewise. + (arm_lookup_simd_builtin_type): Likewise. + (arm_simd_builtin_type): Likewise. + (arm_init_simd_builtin_types): Likewise. + (arm_init_simd_builtin_scalar_types): Likewise. + (arm_init_neon_builtins): Rewrite using qualifiers. + * config/arm/arm-protos.h (arm_mangle_builtin_type): New. + * config/arm/arm-simd-builtin-types.def: New file. + * config/arm/t-arm (arm-builtins.o): Depend on it. + * config/arm/arm.c (arm_mangle_type): Call arm_mangle_builtin_type. + * config/arm/arm_neon.h (int8x8_t): Use new internal type. + (int16x4_t): Likewise. + (int32x2_t): Likewise. + (float16x4_t): Likewise. + (float32x2_t): Likewise. + (poly8x8_t): Likewise. + (poly16x4_t): Likewise. + (uint8x8_t): Likewise. + (uint16x4_t): Likewise. + (uint32x2_t): Likewise. + (int8x16_t): Likewise. + (int16x8_t): Likewise. + (int32x4_t): Likewise. + (int64x2_t): Likewise. + (float32x4_t): Likewise. + (poly8x16_t): Likewise. + (poly16x8_t): Likewise. + (uint8x16_t): Likewise. + (uint16x8_t): Likewise. + (uint32x4_t): Likewise. + (uint64x2_t): Likewise. + +2014-11-18 James Greenhalgh <james.greenhalgh@arm.com> + + * gcc/config/arm/arm-builtins.c (arm_type_qualifiers): New. + (neon_itype): Add new types corresponding to the types used in + qualifiers names. + (arm_unop_qualifiers): New. + (arm_bswap_qualifiers): Likewise. + (arm_binop_qualifiers): Likewise. + (arm_ternop_qualifiers): Likewise. + (arm_getlane_qualifiers): Likewise. + (arm_lanemac_qualifiers): Likewise. + (arm_setlane_qualifiers): Likewise. + (arm_combine_qualifiers): Likewise. + (arm_load1_qualifiers): Likewise. + (arm_load1_lane_qualifiers): Likewise. + (arm_store1_qualifiers): Likewise. + (arm_storestruct_lane_qualifiers): Likewise. + (UNOP_QUALIFIERS): Likewise. + (DUP_QUALIFIERS): Likewise. + (SPLIT_QUALIFIERS): Likewise. + (CONVERT_QUALIFIERS): Likewise. + (FLOAT_WIDEN_QUALIFIERS): Likewise. + (FLOAT_NARROW_QUALIFIERS): Likewise. + (RINT_QUALIFIERS): Likewise. + (COPYSIGNF_QUALIFIERS): Likewise. + (CREATE_QUALIFIERS): Likewise. + (REINTERP_QUALIFIERS): Likewise. + (BSWAP_QUALIFIERS): Likewise. + (BINOP_QUALIFIERS): Likewise. + (FIXCONV_QUALIFIERS): Likewise. + (SCALARMUL_QUALIFIERS): Likewise. + (SCALARMULL_QUALIFIERS): Likewise. + (SCALARMULH_QUALIFIERS): Likewise. + (TERNOP_QUALIFIERS): Likewise. + (SELECT_QUALIFIERS): Likewise. + (VTBX_QUALIFIERS): Likewise. + (GETLANE_QUALIFIERS): Likewise. + (SHIFTIMM_QUALIFIERS): Likewise. + (LANEMAC_QUALIFIERS): Likewise. + (SCALARMAC_QUALIFIERS): Likewise. + (SETLANE_QUALIFIERS): Likewise. + (SHIFTINSERT_QUALIFIERS): Likewise. + (SHIFTACC_QUALIFIERS): Likewise. + (LANEMUL_QUALIFIERS): Likewise. + (LANEMULL_QUALIFIERS): Likewise. + (LANEMULH_QUALIFIERS): Likewise. + (COMBINE_QUALIFIERS): Likewise. + (VTBL_QUALIFIERS): Likewise. + (LOAD1_QUALIFIERS): Likewise. + (LOADSTRUCT_QUALIFIERS): Likewise. + (LOAD1LANE_QUALIFIERS): Likewise. + (LOADSTRUCTLANE_QUALIFIERS): Likewise. + (STORE1_QUALIFIERS): Likewise. + (STORESTRUCT_QUALIFIERS): Likewise. + (STORE1LANE_QUALIFIERS): Likewise. + (STORESTRUCTLANE_QUALIFIERS): Likewise. + (neon_builtin_datum): Keep track of qualifiers. + (VAR1): Likewise. + +2014-11-18 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/arm-builtins.c (VAR1): Add a comma. + (VAR2): Rewrite in terms of VAR1. + (VAR3-10): Likewise. + (arm_builtins): Remove leading comma before ARM_BUILTIN_MAX. + * config/arm/arm_neon_builtins.def: Remove trailing commas. + +2014-11-18 James Greenhalgh <james.greenhalgh@arm.com> + + * config.gcc (extra_objs): Add arm-builtins.o for arm*-*-*. + (target_gtfiles): Add config/arm/arm-builtins.c for arm*-*-*. + * config/arm/arm-builtins.c: New. + * config/arm/t-arm (arm_builtins.o): New. + * config/arm/arm-protos.h (arm_expand_builtin): New. + (arm_builtin_decl): Likewise. + (arm_init_builtins): Likewise. + (arm_atomic_assign_expand_fenv): Likewise. + * config/arm/arm.c (arm_atomic_assign_expand_fenv): Remove prototype. + (arm_init_builtins): Likewise. + (arm_init_iwmmxt_builtins): Likewise + (safe_vector_operand): Likewise + (arm_expand_binop_builtin): Likewise + (arm_expand_unop_builtin): Likewise + (arm_expand_builtin): Likewise + (arm_builtin_decl): Likewise + (insn_flags): Remove static. + (tune_flags): Likewise. + (enum arm_builtins): Move to config/arm/arm-builtins.c. + (arm_init_neon_builtins): Likewise. + (struct builtin_description): Likewise. + (arm_init_iwmmxt_builtins): Likewise. + (arm_init_fp16_builtins): Likewise. + (arm_init_crc32_builtins): Likewise. + (arm_init_builtins): Likewise. + (arm_builtin_decl): Likewise. + (safe_vector_operand): Likewise. + (arm_expand_ternop_builtin): Likewise. + (arm_expand_binop_builtin): Likewise. + (arm_expand_unop_builtin): Likewise. + (neon_dereference_pointer): Likewise. + (arm_expand_neon_args): Likewise. + (arm_expand_neon_builtin): Likewise. + (neon_split_vcombine): Likewise. + (arm_expand_builtin): Likewise. + (arm_builtin_vectorized_function): Likewise. + (arm_atomic_assign_expand_fenv): Likewise. + +2014-11-18 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/t-arm (arm.o): Include arm-protos.h in the recipe. + * config/arm/arm.c (FL_CO_PROC): Move to arm-protos.h. + (FL_ARCH3M): Likewise. + (FL_MODE26): Likewise. + (FL_MODE32): Likewise. + (FL_ARCH4): Likewise. + (FL_ARCH5): Likewise. + (FL_THUMB): Likewise. + (FL_LDSCHED): Likewise. + (FL_STRONG): Likewise. + (FL_ARCH5E): Likewise. + (FL_XSCALE): Likewise. + (FL_ARCH6): Likewise. + (FL_VFPV2): Likewise. + (FL_WBUF): Likewise. + (FL_ARCH6K): Likewise. + (FL_THUMB2): Likewise. + (FL_NOTM): Likewise. + (FL_THUMB_DIV): Likewise. + (FL_VFPV3): Likewise. + (FL_NEON): Likewise. + (FL_ARCH7EM): Likewise. + (FL_ARCH7): Likewise. + (FL_ARM_DIV): Likewise. + (FL_ARCH8): Likewise. + (FL_CRC32): Likewise. + (FL_SMALLMUL): Likewise. + (FL_IWMMXT): Likewise. + (FL_IWMMXT2): Likewise. + (FL_TUNE): Likewise. + (FL_FOR_ARCH2): Likewise. + (FL_FOR_ARCH3): Likewise. + (FL_FOR_ARCH3M): Likewise. + (FL_FOR_ARCH4): Likewise. + (FL_FOR_ARCH4T): Likewise. + (FL_FOR_ARCH5): Likewise. + (FL_FOR_ARCH5T): Likewise. + (FL_FOR_ARCH5E): Likewise. + (FL_FOR_ARCH5TE): Likewise. + (FL_FOR_ARCH5TEJ): Likewise. + (FL_FOR_ARCH6): Likewise. + (FL_FOR_ARCH6J): Likewise. + (FL_FOR_ARCH6K): Likewise. + (FL_FOR_ARCH6Z): Likewise. + (FL_FOR_ARCH6ZK): Likewise. + (FL_FOR_ARCH6T2): Likewise. + (FL_FOR_ARCH6M): Likewise. + (FL_FOR_ARCH7): Likewise. + (FL_FOR_ARCH7A): Likewise. + (FL_FOR_ARCH7VE): Likewise. + (FL_FOR_ARCH7R): Likewise. + (FL_FOR_ARCH7M): Likewise. + (FL_FOR_ARCH7EM): Likewise. + (FL_FOR_ARCH8A): Likewise. + * config/arm/arm-protos.h: Take definitions moved from arm.c. + +2014-11-18 James Greenhalgh <james.greenhalgh@arm.com> + + * config/arm/arm.c (arm_expand_neon_builtin): Remove "Magic Word" + parameter, rearrange switch statement accordingly. + (arm_evpc_neon_vrev): Remove "Magic Word". + * config/arm/unspecs.md (unspec): Split many UNSPECs to + rounding, or signed/unsigned variants. + * config/arm/neon.md (vcond<mode><mode>): Remove "Magic Word" code. + (vcondu<mode><mode>): Likewise. + (neon_vadd): Remove "Magic Word" operand. + (neon_vaddl): Remove "Magic Word" operand, convert to use + signed/unsigned iterator. + (neon_vaddw): Likewise. + (neon_vhadd): Likewise, also iterate over "rounding" forms. + (neon_vqadd): Remove "Magic Word" operand, convert to use + signed/unsigned iterator. + (neon_v<r>addhn): Remove "Magic Word" operand, convert to iterate + over "rounding" forms. + (neon_vmul): Remove "Magic Word" operand, iterate over + polynomial/float instruction forms. + (neon_vmla): Remove "Magic Word" operand. + (neon_vfma): Likewise. + (neon_vfms): Likewise. + (neon_vmls): Likewise. + (neon_vmlal): Remove "Magic Word" operand, iterate over + signed/unsigned forms. + (neon_vmlsl): Likewise. + (neon_vqdmulh): Remove "Magic Word" operand, iterate over "rounding" + forms. + (neon_vqdmlal): Remove "Magic Word" operand, iterate over + signed/unsigned forms. + (neon_vqdmlsl): Likewise. + (neon_vmull): Likewise. + (neon_vqdmull): Remove "Magic Word" operand. + (neon_vsub): Remove "Magic Word" operand. + (neon_vsubl): Remove "Magic Word" operand, convert to use + signed/unsigned iterator. + (neon_vsubw): Likewise. + (neon_vhsub): Likewise. + (neon_vqsub): Likewise. + (neon_v<r>subhn): Remove "Magic Word" operand, convert to iterate + over "rounding" forms. + (neon_vceq): Remove "Magic Word" operand. + (neon_vcge): Likewise. + (neon_vcgeu): Likewise. + (neon_vcgt): Likewise. + (neon_vcgtu): Likewise. + (neon_vcle): Likewise. + (neon_vclt): Likewise. + (neon_vcage): Likewise. + (neon_vcagt): Likewise. + (neon_vabd): Remove "Magic Word" operand, iterate over + signed/unsigned forms, and split out... + (neon_vabdf): ...this as new. + (neon_vabdl): Remove "Magic Word" operand, iterate over + signed/unsigned forms. + (neon_vaba): Likewise. + (neon_vmax): Remove "Magic Word" operand, iterate over + signed/unsigned and max/min forms, and split out... + (neon_v<maxmin>f): ...this as new. + (neon_vmin): Delete. + (neon_vpadd): Remove "Magic Word" operand. + (neon_vpaddl): Remove "Magic Word" operand, iterate over + signed/unsigned variants. + (neon_vpadal): Likewise. + (neon_vpmax): Remove "Magic Word" operand, iterate over + signed/unsigned and max/min forms, and split out... + (neon_vp<maxmin>f): ...this as new. + (neon_vpmin): Delete. + (neon_vrecps): Remove "Magic Word" operand. + (neon_vrsqrts): Likewise. + (neon_vabs): Likewise. + (neon_vqabs): Likewise. + (neon_vneg): Likewise. + (neon_vqneg): Likewise. + (neon_vcls): Likewise. + (neon_vcnt): Likewise. + (neon_vrecpe): Likewise. + (neon_vrsqrte): Likewise. + (neon_vmvn): Likewise. + (neon_vget_lane): Likewise. + (neon_vget_laneu): New. + (neon_vget_lanedi): Remove "Magic Word" operand. + (neon_vget_lanev2di): Likewise. + (neon_vcvt): Remove "Magic Word" operand, iterate over + signed/unsigned variants. + (neon_vcvt_n): Likewise. + (neon_vmovn): Remove "Magic Word" operand. + (neon_vqmovn): Remove "Magic Word" operand, iterate over + signed/unsigned variants. + (neon_vmovun): Remove "Magic Word" operand. + (neon_vmovl): Remove "Magic Word" operand, iterate over + signed/unsigned variants. + (neon_vmul_lane): Remove "Magic Word" operand. + (neon_vmull_lane): Remove "Magic Word" operand, iterate over + signed/unsigned variants. + (neon_vqdmull_lane): Remove "Magic Word" operand. + (neon_vqdmulh_lane): Remove "Magic Word" operand, iterate over + rounding variants. + (neon_vmla_lane): Remove "Magic Word" operand. + (neon_vmlal_lane): Remove "Magic Word" operand, iterate over + signed/unsigned variants. + (neon_vqdmlal_lane): Remove "Magic Word" operand. + (neon_vmls_lane): Likewise. + (neon_vmlsl_lane): Remove "Magic Word" operand, iterate over + signed/unsigned variants. + (neon_vqdmlsl_lane): Remove "Magic Word" operand. + (neon_vmul_n): Remove "Magic Word" operand. + (neon_vmull_n): Rename to... + (neon_vmulls_n): ...this, remove "Magic Word" operand. + (neon_vmullu_n): New. + (neon_vqdmull_n): Remove "Magic Word" operand. + (neon_vqdmulh_n): Likewise. + (neon_vqrdmulh_n): New. + (neon_vmla_n): Remove "Magic Word" operand. + (neon_vmls_n): Likewise. + (neon_vmlal_n): Rename to... + (neon_vmlals_n): ...this, remove "Magic Word" operand. + (neon_vmlalu_n): New. + (neon_vqdmlal_n): Remove "Magic Word" operand. + (neon_vmlsl_n): Rename to... + (neon_vmlsls_n): ...this, remove "Magic Word" operand. + (neon_vmlslu_n): New. + (neon_vqdmlsl_n): Remove "Magic Word" operand. + (neon_vrev64): Remove "Magic Word" operand. + (neon_vrev32): Likewise. + (neon_vrev16): Likewise. + (neon_vshl): Remove "Magic Word" operand, iterate over + signed/unsigned and "rounding" forms. + (neon_vqshl): Likewise. + (neon_vshr_n): Likewise. + (neon_vshrn_n): Remove "Magic Word" operand, iterate over + "rounding" forms. + (neon_vqshrn_n): Remove "Magic Word" operand, iterate over + signed/unsigned and "rounding" forms. + (neon_vqshrun_n): Remove "Magic Word" operand, iterate over + "rounding" forms. + (neon_vshl_n): Remove "Magic Word" operand. + (neon_vqshl_n): Remove "Magic Word" operand, iterate over + signed/unsigned variants. + (neon_vqshlu_n): Remove "Magic Word" operand. + (neon_vshll_n): Remove "Magic Word" operand, iterate over + signed/unsigned variants. + (neon_vsra_n): Remove "Magic Word" operand, iterate over + signed/unsigned and "rounding" forms. + * config/arm/iterators.md (VPF): New. + (VADDL): Likewise. + (VADDW): Likewise. + (VHADD): Likewise. + (VQADD): Likewise. + (VADDHN): Likewise. + (VMLAL): Likewise. + (VMLAL_LANE): Likewise. + (VLMSL): Likewise. + (VMLSL_LANE): Likewise. + (VQDMULH): Likewise, + (VQDMULH_LANE): Likewise. + (VMULL): Likewise. + (VMULL_LANE): Likewise. + (VSUBL): Likewise. + (VSUBW): Likewise. + (VHSUB): Likewise. + (VQSUB): Likewise. + (VSUBHN): Likewise. + (VABD): Likewise. + (VABDL): Likewise. + (VMAXMIN): Likewise. + (VMAXMINF): Likewise. + (VPADDL): Likewise. + (VPADAL): Likewise. + (VPMAXMIN): Likewise. + (VPMAXMINF): Likewise. + (VCVT_US): Likewise. + (VCVT_US_N): Likewise. + (VQMOVN): Likewise. + (VMOVL): Likewise. + (VSHL): Likewise. + (VQSHL): Likewise. + (VSHR_N): Likewise. + (VSHRN_N): Likewise. + (VQSHRN_N): Likewise. + (VQSHRUN_N): Likewise. + (VQSHL_N): Likewise. + (VSHLL_N): Likewise. + (VSRA_N): Likewise. + (pf): Likewise. + (sup): Likewise. + (r): Liekwise. + (maxmin): Likewise. + (shift_op): Likewise. + * config/arm/arm_neon_builtins.def (vaddl): Split to... + (vaddls): ...this and... + (vaddlu): ...this. + (vaddw): Split to... + (vaddws): ...this and... + (vaddwu): ...this. + (vhadd): Split to... + (vhadds): ...this and... + (vhaddu): ...this and... + (vrhadds): ...this and... + (vrhaddu): ...this. + (vqadd): Split to... + (vqadds): ...this and... + (vqaddu): ...this. + (vaddhn): Split to itself and... + (vraddhn): ...this. + (vmul): Split to... + (vmulf): ...this and... + (vmulp): ...this. + (vmlal): Split to... + (vmlals): ...this and... + (vmlalu): ...this. + (vmlsl): Split to... + (vmlsls): ...this and... + (vmlslu): ...this. + (vqdmulh): Split to itself and... + (vqrdmulh): ...this. + (vmull): Split to... + (vmullp): ...this and... + (vmulls): ...this and... + (vmullu): ...this. + (vmull_n): Split to... + (vmulls_n): ...this and... + (vmullu_n): ...this. + (vmull_lane): Split to... + (vmulls_lane): ...this and... + (vmullu_lane): ...this. + (vqdmulh_n): Split to itself and... + (vqrdmulh_n): ...this. + (vqdmulh_lane): Split to itself and... + (vqrdmulh_lane): ...this. + (vshl): Split to... + (vshls): ...this and... + (vshlu): ...this and... + (vrshls): ...this and... + (vrshlu): ...this. + (vqshl): Split to... + (vqshls): ...this and... + (vqrshlu): ...this and... + (vqrshls): ...this and... + (vqrshlu): ...this. + (vshr_n): Split to... + (vshrs_n): ...this and... + (vshru_n): ...this and... + (vrshrs_n): ...this and... + (vrshru_n): ...this. + (vshrn_n): Split to itself and... + (vrshrn_n): ...this. + (vqshrn_n): Split to... + (vqshrns_n): ...this and... + (vqshrnu_n): ...this and... + (vqrshrns_n): ...this and... + (vqrshrnu_n): ...this. + (vqshrun_n): Split to itself and... + (vqrshrun_n): ...this. + (vqshl_n): Split to... + (vqshl_s_n): ...this and... + (vqshl_u_n): ...this. + (vshll_n): Split to... + (vshlls_n): ...this and... + (vshllu_n): ...this. + (vsra_n): Split to... + (vsras_n): ...this and... + (vsrau_n): ...this and. + (vrsras_n): ...this and... + (vrsrau_n): ...this and. + (vsubl): Split to... + (vsubls): ...this and... + (vsublu): ...this. + (vsubw): Split to... + (vsubws): ...this and... + (vsubwu): ...this. + (vqsub): Split to... + (vqsubs): ...this and... + (vqsubu): ...this. + (vhsub): Split to... + (vhsubs): ...this and... + (vhsubu): ...this. + (vsubhn): Split to itself and... + (vrsubhn): ...this. + (vabd): Split to... + (vabds): ...this and... + (vabdu): ...this and... + (vabdf): ...this. + (vabdl): Split to... + (vabdls): ...this and... + (vabdlu): ...this. + (vaba): Split to... + (vabas): ...this and... + (vabau): ...this and... + (vabal): Split to... + (vabals): ...this and... + (vabalu): ...this. + (vmax): Split to... + (vmaxs): ...this and... + (vmaxu): ...this and... + (vmaxf): ...this. + (vmin): Split to... + (vmins): ...this and... + (vminu): ...this and... + (vminf): ...this. + (vpmax): Split to... + (vpmaxs): ...this and... + (vpmaxu): ...this and... + (vpmaxf): ...this. + (vpmin): Split to... + (vpmins): ...this and... + (vpminu): ...this and... + (vpminf): ...this. + (vpaddl): Split to... + (vpaddls): ...this and... + (vpaddlu): ...this. + (vpadal): Split to... + (vpadals): ...this and... + (vpadalu): ...this. + (vget_laneu): New. + (vqmovn): Split to... + (vqmovns): ...this and... + (vqmovnu): ...this. + (vmovl): Split to... + (vmovls): ...this and... + (vmovlu): ...this. + (vmlal_lane): Split to... + (vmlals_lane): ...this and... + (vmlalu_lane): ...this. + (vmlsl_lane): Split to... + (vmlsls_lane): ...this and... + (vmlslu_lane): ...this. + (vmlal_n): Split to... + (vmlals_n): ...this and... + (vmlalu_n): ...this. + (vmlsl_n): Split to... + (vmlsls_n): ...this and... + (vmlslu_n): ...this. + (vext): Make type "SHIFTINSERT". + (vcvt): Split to... + (vcvts): ...this and... + (vcvtu): ...this. + (vcvt_n): Split to... + (vcvts_n): ...this and... + (vcvtu_n): ...this. + * config/arm/arm_neon.h (vaddl_s8): Remove "Magic Word". + (vaddl_s16): Likewise. + (vaddl_s32): Likewise. + (vaddl_u8): Likewise. + (vaddl_u16): Likewise. + (vaddl_u32): Likewise. + (vaddw_s8): Likewise. + (vaddw_s16): Likewise. + (vaddw_s32): Likewise. + (vaddw_u8): Likewise. + (vaddw_u16): Likewise. + (vaddw_u32): Likewise. + (vhadd_s8): Likewise. + (vhadd_s16): Likewise. + (vhadd_s32): Likewise. + (vhadd_u8): Likewise. + (vhadd_u16): Likewise. + (vhadd_u32): Likewise. + (vhaddq_s8): Likewise. + (vhaddq_s16): Likewise. + (vhaddq_s32): Likewise. + (vhaddq_u8): Likewise. + (vhaddq_u16): Likewise. + (vrhadd_s8): Likewise. + (vrhadd_s16): Likewise. + (vrhadd_s32): Likewise. + (vrhadd_u8): Likewise. + (vrhadd_u16): Likewise. + (vrhadd_u32): Likewise. + (vrhaddq_s8): Likewise. + (vrhaddq_s16): Likewise. + (vrhaddq_s32): Likewise. + (vrhaddq_u8): Likewise. + (vrhaddq_u16): Likewise. + (vrhaddq_u32): Likewise. + (vqadd_s8): Likewise. + (vqadd_s16): Likewise. + (vqadd_s32): Likewise. + (vqadd_s64): Likewise. + (vqadd_u8): Likewise. + (vqadd_u16): Likewise. + (vqadd_u32): Likewise. + (vqadd_u64): Likewise. + (vqaddq_s8): Likewise. + (vqaddq_s16): Likewise. + (vqaddq_s32): Likewise. + (vqaddq_s64): Likewise. + (vqaddq_u8): Likewise. + (vqaddq_u16): Likewise. + (vqaddq_u32): Likewise. + (vqaddq_u64): Likewise. + (vaddhn_s16): Likewise. + (vaddhn_s32): Likewise. + (vaddhn_s64): Likewise. + (vaddhn_u16): Likewise. + (vaddhn_u32): Likewise. + (vaddhn_u64): Likewise. + (vraddhn_s16): Likewise. + (vraddhn_s32): Likewise. + (vraddhn_s64): Likewise. + (vraddhn_u16): Likewise. + (vraddhn_u32): Likewise. + (vraddhn_u64): Likewise. + (vmul_p8): Likewise. + (vmulq_p8): Likewise. + (vqdmulh_s16): Likewise. + (vqdmulh_s32): Likewise. + (vqdmulhq_s16): Likewise. + (vqdmulhq_s32): Likewise. + (vqrdmulh_s16): Likewise. + (vqrdmulh_s32): Likewise. + (vqrdmulhq_s16): Likewise. + (vqrdmulhq_s32): Likewise. + (vmull_s8): Likewise. + (vmull_s16): Likewise. + (vmull_s32): Likewise. + (vmull_u8): Likewise. + (vmull_u16): Likewise. + (vmull_u32): Likewise. + (vmull_p8): Likewise. + (vqdmull_s16): Likewise. + (vqdmull_s32): Likewise. + (vmla_s8): Likewise. + (vmla_s16): Likewise. + (vmla_s32): Likewise. + (vmla_f32): Likewise. + (vmla_u8): Likewise. + (vmla_u16): Likewise. + (vmla_u32): Likewise. + (vmlaq_s8): Likewise. + (vmlaq_s16): Likewise. + (vmlaq_s32): Likewise. + (vmlaq_f32): Likewise. + (vmlaq_u8): Likewise. + (vmlaq_u16): Likewise. + (vmlaq_u32): Likewise. + (vmlal_s8): Likewise. + (vmlal_s16): Likewise. + (vmlal_s32): Likewise. + (vmlal_u8): Likewise. + (vmlal_u16): Likewise. + (vmlal_u32): Likewise. + (vqdmlal_s16): Likewise. + (vqdmlal_s32): Likewise. + (vmls_s8): Likewise. + (vmls_s16): Likewise. + (vmls_s32): Likewise. + (vmls_f32): Likewise. + (vmls_u8): Likewise. + (vmls_u16): Likewise. + (vmls_u32): Likewise. + (vmlsq_s8): Likewise. + (vmlsq_s16): Likewise. + (vmlsq_s32): Likewise. + (vmlsq_f32): Likewise. + (vmlsq_u8): Likewise. + (vmlsq_u16): Likewise. + (vmlsq_u32): Likewise. + (vmlsl_s8): Likewise. + (vmlsl_s16): Likewise. + (vmlsl_s32): Likewise. + (vmlsl_u8): Likewise. + (vmlsl_u16): Likewise. + (vmlsl_u32): Likewise. + (vqdmlsl_s16): Likewise. + (vqdmlsl_s32): Likewise. + (vfma_f32): Likewise. + (vfmaq_f32): Likewise. + (vfms_f32): Likewise. + (vfmsq_f32): Likewise. + (vsubl_s8): Likewise. + (vsubl_s16): Likewise. + (vsubl_s32): Likewise. + (vsubl_u8): Likewise. + (vsubl_u16): Likewise. + (vsubl_u32): Likewise. + (vsubw_s8): Likewise. + (vsubw_s16): Likewise. + (vsubw_s32): Likewise. + (vsubw_u8): Likewise. + (vsubw_u16): Likewise. + (vsubw_u32): Likewise. + (vhsub_s8): Likewise. + (vhsub_s16): Likewise. + (vhsub_s32): Likewise. + (vhsub_u8): Likewise. + (vhsub_u16): Likewise. + (vhsub_u32): Likewise. + (vhsubq_s8): Likewise. + (vhsubq_s16): Likewise. + (vhsubq_s32): Likewise. + (vhsubq_u8): Likewise. + (vhsubq_u16): Likewise. + (vhsubq_u32): Likewise. + (vqsub_s8): Likewise. + (vqsub_s16): Likewise. + (vqsub_s32): Likewise. + (vqsub_s64): Likewise. + (vqsub_u8): Likewise. + (vqsub_u16): Likewise. + (vqsub_u32): Likewise. + (vqsub_u64): Likewise. + (vqsubq_s8): Likewise. + (vqsubq_s16): Likewise. + (vqsubq_s32): Likewise. + (vqsubq_s64): Likewise. + (vqsubq_u8): Likewise. + (vqsubq_u16): Likewise. + (vqsubq_u32): Likewise. + (vqsubq_u64): Likewise. + (vsubhn_s16): Likewise. + (vsubhn_s32): Likewise. + (vsubhn_s64): Likewise. + (vsubhn_u16): Likewise. + (vsubhn_u32): Likewise. + (vsubhn_u64): Likewise. + (vrsubhn_s16): Likewise. + (vrsubhn_s32): Likewise. + (vrsubhn_s64): Likewise. + (vrsubhn_u16): Likewise. + (vrsubhn_u32): Likewise. + (vrsubhn_u64): Likewise. + (vceq_s8): Likewise. + (vceq_s16): Likewise. + (vceq_s32): Likewise. + (vceq_f32): Likewise. + (vceq_u8): Likewise. + (vceq_u16): Likewise. + (vceq_u32): Likewise. + (vceq_p8): Likewise. + (vceqq_s8): Likewise. + (vceqq_s16): Likewise. + (vceqq_s32): Likewise. + (vceqq_f32): Likewise. + (vceqq_u8): Likewise. + (vceqq_u16): Likewise. + (vceqq_u32): Likewise. + (vceqq_p8): Likewise. + (vcge_s8): Likewise. + (vcge_s16): Likewise. + (vcge_s32): Likewise. + (vcge_f32): Likewise. + (vcge_u8): Likewise. + (vcge_u16): Likewise. + (vcge_u32): Likewise. + (vcgeq_s8): Likewise. + (vcgeq_s16): Likewise. + (vcgeq_s32): Likewise. + (vcgeq_f32): Likewise. + (vcgeq_u8): Likewise. + (vcgeq_u16): Likewise. + (vcgeq_u32): Likewise. + (vcle_s8): Likewise. + (vcle_s16): Likewise. + (vcle_s32): Likewise. + (vcle_f32): Likewise. + (vcle_u8): Likewise. + (vcle_u16): Likewise. + (vcle_u32): Likewise. + (vcleq_s8): Likewise. + (vcleq_s16): Likewise. + (vcleq_s32): Likewise. + (vcleq_f32): Likewise. + (vcleq_u8): Likewise. + (vcleq_u16): Likewise. + (vcleq_u32): Likewise. + (vcgt_s8): Likewise. + (vcgt_s16): Likewise. + (vcgt_s32): Likewise. + (vcgt_f32): Likewise. + (vcgt_u8): Likewise. + (vcgt_u16): Likewise. + (vcgt_u32): Likewise. + (vcgtq_s8): Likewise. + (vcgtq_s16): Likewise. + (vcgtq_s32): Likewise. + (vcgtq_f32): Likewise. + (vcgtq_u8): Likewise. + (vcgtq_u16): Likewise. + (vcgtq_u32): Likewise. + (vclt_s8): Likewise. + (vclt_s16): Likewise. + (vclt_s32): Likewise. + (vclt_f32): Likewise. + (vclt_u8): Likewise. + (vclt_u16): Likewise. + (vclt_u32): Likewise. + (vcltq_s8): Likewise. + (vcltq_s16): Likewise. + (vcltq_s32): Likewise. + (vcltq_f32): Likewise. + (vcltq_u8): Likewise. + (vcltq_u16): Likewise. + (vcltq_u32): Likewise. + (vcage_f32): Likewise. + (vcageq_f32): Likewise. + (vcale_f32): Likewise. + (vcaleq_f32): Likewise. + (vcagt_f32): Likewise. + (vcagtq_f32): Likewise. + (vcalt_f32): Likewise. + (vcaltq_f32): Likewise. + (vtst_s8): Likewise. + (vtst_s16): Likewise. + (vtst_s32): Likewise. + (vtst_u8): Likewise. + (vtst_u16): Likewise. + (vtst_u32): Likewise. + (vtst_p8): Likewise. + (vtstq_s8): Likewise. + (vtstq_s16): Likewise. + (vtstq_s32): Likewise. + (vtstq_u8): Likewise. + (vtstq_u16): Likewise. + (vtstq_u32): Likewise. + (vtstq_p8): Likewise. + (vabd_s8): Likewise. + (vabd_s16): Likewise. + (vabd_s32): Likewise. + (vabd_f32): Likewise. + (vabd_u8): Likewise. + (vabd_u16): Likewise. + (vabd_u32): Likewise. + (vabdq_s8): Likewise. + (vabdq_s16): Likewise. + (vabdq_s32): Likewise. + (vabdq_f32): Likewise. + (vabdq_u8): Likewise. + (vabdq_u16): Likewise. + (vabdq_u32): Likewise. + (vabdl_s8): Likewise. + (vabdl_s16): Likewise. + (vabdl_s32): Likewise. + (vabdl_u8): Likewise. + (vabdl_u16): Likewise. + (vabdl_u32): Likewise. + (vaba_s8): Likewise. + (vaba_s16): Likewise. + (vaba_s32): Likewise. + (vaba_u8): Likewise. + (vaba_u16): Likewise. + (vaba_u32): Likewise. + (vabaq_s8): Likewise. + (vabaq_s16): Likewise. + (vabaq_s32): Likewise. + (vabaq_u8): Likewise. + (vabaq_u16): Likewise. + (vabaq_u32): Likewise. + (vabal_s8): Likewise. + (vabal_s16): Likewise. + (vabal_s32): Likewise. + (vabal_u8): Likewise. + (vabal_u16): Likewise. + (vabal_u32): Likewise. + (vmax_s8): Likewise. + (vmax_s16): Likewise. + (vmax_s32): Likewise. + (vmax_f32): Likewise. + (vmax_u8): Likewise. + (vmax_u16): Likewise. + (vmax_u32): Likewise. + (vmaxq_s8): Likewise. + (vmaxq_s16): Likewise. + (vmaxq_s32): Likewise. + (vmaxq_f32): Likewise. + (vmaxq_u8): Likewise. + (vmaxq_u16): Likewise. + (vmaxq_u32): Likewise. + (vmin_s8): Likewise. + (vmin_s16): Likewise. + (vmin_s32): Likewise. + (vmin_f32): Likewise. + (vmin_u8): Likewise. + (vmin_u16): Likewise. + (vmin_u32): Likewise. + (vminq_s8): Likewise. + (vminq_s16): Likewise. + (vminq_s32): Likewise. + (vminq_f32): Likewise. + (vminq_u8): Likewise. + (vminq_u16): Likewise. + (vminq_u32): Likewise. + (vpadd_s8): Likewise. + (vpadd_s16): Likewise. + (vpadd_s32): Likewise. + (vpadd_f32): Likewise. + (vpadd_u8): Likewise. + (vpadd_u16): Likewise. + (vpadd_u32): Likewise. + (vpaddl_s8): Likewise. + (vpaddl_s16): Likewise. + (vpaddl_s32): Likewise. + (vpaddl_u8): Likewise. + (vpaddl_u16): Likewise. + (vpaddl_u32): Likewise. + (vpaddlq_s8): Likewise. + (vpaddlq_s16): Likewise. + (vpaddlq_s32): Likewise. + (vpaddlq_u8): Likewise. + (vpaddlq_u16): Likewise. + (vpaddlq_u32): Likewise. + (vpadal_s8): Likewise. + (vpadal_s16): Likewise. + (vpadal_s32): Likewise. + (vpadal_u8): Likewise. + (vpadal_u16): Likewise. + (vpadal_u32): Likewise. + (vpadalq_s8): Likewise. + (vpadalq_s16): Likewise. + (vpadalq_s32): Likewise. + (vpadalq_u8): Likewise. + (vpadalq_u16): Likewise. + (vpadalq_u32): Likewise. + (vpmax_s8): Likewise. + (vpmax_s16): Likewise. + (vpmax_s32): Likewise. + (vpmax_f32): Likewise. + (vpmax_u8): Likewise. + (vpmax_u16): Likewise. + (vpmax_u32): Likewise. + (vpmin_s8): Likewise. + (vpmin_s16): Likewise. + (vpmin_s32): Likewise. + (vpmin_f32): Likewise. + (vpmin_u8): Likewise. + (vpmin_u16): Likewise. + (vpmin_u32): Likewise. + (vrecps_f32): Likewise. + (vrecpsq_f32): Likewise. + (vrsqrts_f32): Likewise. + (vrsqrtsq_f32): Likewise. + (vshl_s8): Likewise. + (vshl_s16): Likewise. + (vshl_s32): Likewise. + (vshl_s64): Likewise. + (vshl_u8): Likewise. + (vshl_u16): Likewise. + (vshl_u32): Likewise. + (vshl_u64): Likewise. + (vshlq_s8): Likewise. + (vshlq_s16): Likewise. + (vshlq_s32): Likewise. + (vshlq_s64): Likewise. + (vshlq_u8): Likewise. + (vshlq_u16): Likewise. + (vshlq_u32): Likewise. + (vshlq_u64): Likewise. + (vrshl_s8): Likewise. + (vrshl_s16): Likewise. + (vrshl_s32): Likewise. + (vrshl_s64): Likewise. + (vrshl_u8): Likewise. + (vrshl_u16): Likewise. + (vrshl_u32): Likewise. + (vrshl_u64): Likewise. + (vrshlq_s8): Likewise. + (vrshlq_s16): Likewise. + (vrshlq_s32): Likewise. + (vrshlq_s64): Likewise. + (vrshlq_u8): Likewise. + (vrshlq_u16): Likewise. + (vrshlq_u32): Likewise. + (vrshlq_u64): Likewise. + (vqshl_s8): Likewise. + (vqshl_s16): Likewise. + (vqshl_s32): Likewise. + (vqshl_s64): Likewise. + (vqshl_u8): Likewise. + (vqshl_u16): Likewise. + (vqshl_u32): Likewise. + (vqshl_u64): Likewise. + (vqshlq_s8): Likewise. + (vqshlq_s16): Likewise. + (vqshlq_s32): Likewise. + (vqshlq_s64): Likewise. + (vqshlq_u8): Likewise. + (vqshlq_u16): Likewise. + (vqshlq_u32): Likewise. + (vqshlq_u64): Likewise. + (vqrshl_s8): Likewise. + (vqrshl_s16): Likewise. + (vqrshl_s32): Likewise. + (vqrshl_s64): Likewise. + (vqrshl_u8): Likewise. + (vqrshl_u16): Likewise. + (vqrshl_u32): Likewise. + (vqrshl_u64): Likewise. + (vqrshlq_s8): Likewise. + (vqrshlq_s16): Likewise. + (vqrshlq_s32): Likewise. + (vqrshlq_s64): Likewise. + (vqrshlq_u8): Likewise. + (vqrshlq_u16): Likewise. + (vqrshlq_u32): Likewise. + (vqrshlq_u64): Likewise. + (vshr_n_s8): Likewise. + (vshr_n_s16): Likewise. + (vshr_n_s32): Likewise. + (vshr_n_s64): Likewise. + (vshr_n_u8): Likewise. + (vshr_n_u16): Likewise. + (vshr_n_u32): Likewise. + (vshr_n_u64): Likewise. + (vshrq_n_s8): Likewise. + (vshrq_n_s16): Likewise. + (vshrq_n_s32): Likewise. + (vshrq_n_s64): Likewise. + (vshrq_n_u8): Likewise. + (vshrq_n_u16): Likewise. + (vshrq_n_u32): Likewise. + (vshrq_n_u64): Likewise. + (vrshr_n_s8): Likewise. + (vrshr_n_s16): Likewise. + (vrshr_n_s32): Likewise. + (vrshr_n_s64): Likewise. + (vrshr_n_u8): Likewise. + (vrshr_n_u16): Likewise. + (vrshr_n_u32): Likewise. + (vrshr_n_u64): Likewise. + (vrshrq_n_s8): Likewise. + (vrshrq_n_s16): Likewise. + (vrshrq_n_s32): Likewise. + (vrshrq_n_s64): Likewise. + (vrshrq_n_u8): Likewise. + (vrshrq_n_u16): Likewise. + (vrshrq_n_u32): Likewise. + (vrshrq_n_u64): Likewise. + (vshrn_n_s16): Likewise. + (vshrn_n_s32): Likewise. + (vshrn_n_s64): Likewise. + (vshrn_n_u16): Likewise. + (vshrn_n_u32): Likewise. + (vshrn_n_u64): Likewise. + (vrshrn_n_s16): Likewise. + (vrshrn_n_s32): Likewise. + (vrshrn_n_s64): Likewise. + (vrshrn_n_u16): Likewise. + (vrshrn_n_u32): Likewise. + (vrshrn_n_u64): Likewise. + (vqshrn_n_s16): Likewise. + (vqshrn_n_s32): Likewise. + (vqshrn_n_s64): Likewise. + (vqshrn_n_u16): Likewise. + (vqshrn_n_u32): Likewise. + (vqshrn_n_u64): Likewise. + (vqrshrn_n_s16): Likewise. + (vqrshrn_n_s32): Likewise. + (vqrshrn_n_s64): Likewise. + (vqrshrn_n_u16): Likewise. + (vqrshrn_n_u32): Likewise. + (vqrshrn_n_u64): Likewise. + (vqshrun_n_s16): Likewise. + (vqshrun_n_s32): Likewise. + (vqshrun_n_s64): Likewise. + (vqrshrun_n_s16): Likewise. + (vqrshrun_n_s32): Likewise. + (vqrshrun_n_s64): Likewise. + (vshl_n_s8): Likewise. + (vshl_n_s16): Likewise. + (vshl_n_s32): Likewise. + (vshl_n_s64): Likewise. + (vshl_n_u8): Likewise. + (vshl_n_u16): Likewise. + (vshl_n_u32): Likewise. + (vshl_n_u64): Likewise. + (vshlq_n_s8): Likewise. + (vshlq_n_s16): Likewise. + (vshlq_n_s32): Likewise. + (vshlq_n_s64): Likewise. + (vshlq_n_u8): Likewise. + (vshlq_n_u16): Likewise. + (vshlq_n_u32): Likewise. + (vshlq_n_u64): Likewise. + (vqshl_n_s8): Likewise. + (vqshl_n_s16): Likewise. + (vqshl_n_s32): Likewise. + (vqshl_n_s64): Likewise. + (vqshl_n_u8): Likewise. + (vqshl_n_u16): Likewise. + (vqshl_n_u32): Likewise. + (vqshl_n_u64): Likewise. + (vqshlq_n_s8): Likewise. + (vqshlq_n_s16): Likewise. + (vqshlq_n_s32): Likewise. + (vqshlq_n_s64): Likewise. + (vqshlq_n_u8): Likewise. + (vqshlq_n_u16): Likewise. + (vqshlq_n_u32): Likewise. + (vqshlq_n_u64): Likewise. + (vqshlu_n_s8): Likewise. + (vqshlu_n_s16): Likewise. + (vqshlu_n_s32): Likewise. + (vqshlu_n_s64): Likewise. + (vqshluq_n_s8): Likewise. + (vqshluq_n_s16): Likewise. + (vqshluq_n_s32): Likewise. + (vqshluq_n_s64): Likewise. + (vshll_n_s8): Likewise. + (vshll_n_s16): Likewise. + (vshll_n_s32): Likewise. + (vshll_n_u8): Likewise. + (vshll_n_u16): Likewise. + (vshll_n_u32): Likewise. + (vsra_n_s8): Likewise. + (vsra_n_s16): Likewise. + (vsra_n_s32): Likewise. + (vsra_n_s64): Likewise. + (vsra_n_u8): Likewise. + (vsra_n_u16): Likewise. + (vsra_n_u32): Likewise. + (vsra_n_u64): Likewise. + (vsraq_n_s8): Likewise. + (vsraq_n_s16): Likewise. + (vsraq_n_s32): Likewise. + (vsraq_n_s64): Likewise. + (vsraq_n_u8): Likewise. + (vsraq_n_u16): Likewise. + (vsraq_n_u32): Likewise. + (vsraq_n_u64): Likewise. + (vrsra_n_s8): Likewise. + (vrsra_n_s16): Likewise. + (vrsra_n_s32): Likewise. + (vrsra_n_s64): Likewise. + (vrsra_n_u8): Likewise. + (vrsra_n_u16): Likewise. + (vrsra_n_u32): Likewise. + (vrsra_n_u64): Likewise. + (vrsraq_n_s8): Likewise. + (vrsraq_n_s16): Likewise. + (vrsraq_n_s32): Likewise. + (vrsraq_n_s64): Likewise. + (vrsraq_n_u8): Likewise. + (vrsraq_n_u16): Likewise. + (vrsraq_n_u32): Likewise. + (vrsraq_n_u64): Likewise. + (vabs_s8): Likewise. + (vabs_s16): Likewise. + (vabs_s32): Likewise. + (vabs_f32): Likewise. + (vabsq_s8): Likewise. + (vabsq_s16): Likewise. + (vabsq_s32): Likewise. + (vabsq_f32): Likewise. + (vqabs_s8): Likewise. + (vqabs_s16): Likewise. + (vqabs_s32): Likewise. + (vqabsq_s8): Likewise. + (vqabsq_s16): Likewise. + (vqabsq_s32): Likewise. + (vneg_s8): Likewise. + (vneg_s16): Likewise. + (vneg_s32): Likewise. + (vneg_f32): Likewise. + (vnegq_s8): Likewise. + (vnegq_s16): Likewise. + (vnegq_s32): Likewise. + (vnegq_f32): Likewise. + (vqneg_s8): Likewise. + (vqneg_s16): Likewise. + (vqneg_s32): Likewise. + (vqnegq_s8): Likewise. + (vqnegq_s16): Likewise. + (vqnegq_s32): Likewise. + (vmvn_s8): Likewise. + (vmvn_s16): Likewise. + (vmvn_s32): Likewise. + (vmvn_u8): Likewise. + (vmvn_u16): Likewise. + (vmvn_u32): Likewise. + (vmvn_p8): Likewise. + (vmvnq_s8): Likewise. + (vmvnq_s16): Likewise. + (vmvnq_s32): Likewise. + (vmvnq_u8): Likewise. + (vmvnq_u16): Likewise. + (vmvnq_u32): Likewise. + (vmvnq_p8): Likewise. + (vcls_s8): Likewise. + (vcls_s16): Likewise. + (vcls_s32): Likewise. + (vclsq_s8): Likewise. + (vclsq_s16): Likewise. + (vclsq_s32): Likewise. + (vclz_s8): Likewise. + (vclz_s16): Likewise. + (vclz_s32): Likewise. + (vclz_u8): Likewise. + (vclz_u16): Likewise. + (vclz_u32): Likewise. + (vclzq_s8): Likewise. + (vclzq_s16): Likewise. + (vclzq_s32): Likewise. + (vclzq_u8): Likewise. + (vclzq_u16): Likewise. + (vclzq_u32): Likewise. + (vcnt_s8): Likewise. + (vcnt_u8): Likewise. + (vcnt_p8): Likewise. + (vcntq_s8): Likewise. + (vcntq_u8): Likewise. + (vcntq_p8): Likewise. + (vrecpe_f32): Likewise. + (vrecpe_u32): Likewise. + (vrecpeq_f32): Likewise. + (vrecpeq_u32): Likewise. + (vrsqrte_f32): Likewise. + (vrsqrte_u32): Likewise. + (vrsqrteq_f32): Likewise. + (vrsqrteq_u32): Likewise. + (vget_lane_s8): Likewise. + (vget_lane_s16): Likewise. + (vget_lane_s32): Likewise. + (vget_lane_f32): Likewise. + (vget_lane_u8): Likewise. + (vget_lane_u16): Likewise. + (vget_lane_u32): Likewise. + (vget_lane_p8): Likewise. + (vget_lane_p16): Likewise. + (vget_lane_s64): Likewise. + (vget_lane_u64): Likewise. + (vgetq_lane_s8): Likewise. + (vgetq_lane_s16): Likewise. + (vgetq_lane_s32): Likewise. + (vgetq_lane_f32): Likewise. + (vgetq_lane_u8): Likewise. + (vgetq_lane_u16): Likewise. + (vgetq_lane_u32): Likewise. + (vgetq_lane_p8): Likewise. + (vgetq_lane_p16): Likewise. + (vgetq_lane_s64): Likewise. + (vgetq_lane_u64): Likewise. + (vcvt_s32_f32): Likewise. + (vcvt_f32_s32): Likewise. + (vcvt_f32_u32): Likewise. + (vcvt_u32_f32): Likewise. + (vcvtq_s32_f32): Likewise. + (vcvtq_f32_s32): Likewise. + (vcvtq_f32_u32): Likewise. + (vcvtq_u32_f32): Likewise. + (vcvt_n_s32_f32): Likewise. + (vcvt_n_f32_s32): Likewise. + (vcvt_n_f32_u32): Likewise. + (vcvt_n_u32_f32): Likewise. + (vcvtq_n_s32_f32): Likewise. + (vcvtq_n_f32_s32): Likewise. + (vcvtq_n_f32_u32): Likewise. + (vcvtq_n_u32_f32): Likewise. + (vmovn_s16): Likewise. + (vmovn_s32): Likewise. + (vmovn_s64): Likewise. + (vmovn_u16): Likewise. + (vmovn_u32): Likewise. + (vmovn_u64): Likewise. + (vqmovn_s16): Likewise. + (vqmovn_s32): Likewise. + (vqmovn_s64): Likewise. + (vqmovn_u16): Likewise. + (vqmovn_u32): Likewise. + (vqmovn_u64): Likewise. + (vqmovun_s16): Likewise. + (vqmovun_s32): Likewise. + (vqmovun_s64): Likewise. + (vmovl_s8): Likewise. + (vmovl_s16): Likewise. + (vmovl_s32): Likewise. + (vmovl_u8): Likewise. + (vmovl_u16): Likewise. + (vmovl_u32): Likewise. + (vmul_lane_s16): Likewise. + (vmul_lane_s32): Likewise. + (vmul_lane_f32): Likewise. + (vmul_lane_u16): Likewise. + (vmul_lane_u32): Likewise. + (vmulq_lane_s16): Likewise. + (vmulq_lane_s32): Likewise. + (vmulq_lane_f32): Likewise. + (vmulq_lane_u16): Likewise. + (vmulq_lane_u32): Likewise. + (vmla_lane_s16): Likewise. + (vmla_lane_s32): Likewise. + (vmla_lane_f32): Likewise. + (vmla_lane_u16): Likewise. + (vmla_lane_u32): Likewise. + (vmlaq_lane_s16): Likewise. + (vmlaq_lane_s32): Likewise. + (vmlaq_lane_f32): Likewise. + (vmlaq_lane_u16): Likewise. + (vmlaq_lane_u32): Likewise. + (vmlal_lane_s16): Likewise. + (vmlal_lane_s32): Likewise. + (vmlal_lane_u16): Likewise. + (vmlal_lane_u32): Likewise. + (vqdmlal_lane_s16): Likewise. + (vqdmlal_lane_s32): Likewise. + (vmls_lane_s16): Likewise. + (vmls_lane_s32): Likewise. + (vmls_lane_f32): Likewise. + (vmls_lane_u16): Likewise. + (vmls_lane_u32): Likewise. + (vmlsq_lane_s16): Likewise. + (vmlsq_lane_s32): Likewise. + (vmlsq_lane_f32): Likewise. + (vmlsq_lane_u16): Likewise. + (vmlsq_lane_u32): Likewise. + (vmlsl_lane_s16): Likewise. + (vmlsl_lane_s32): Likewise. + (vmlsl_lane_u16): Likewise. + (vmlsl_lane_u32): Likewise. + (vqdmlsl_lane_s16): Likewise. + (vqdmlsl_lane_s32): Likewise. + (vmull_lane_s16): Likewise. + (vmull_lane_s32): Likewise. + (vmull_lane_u16): Likewise. + (vmull_lane_u32): Likewise. + (vqdmull_lane_s16): Likewise. + (vqdmull_lane_s32): Likewise. + (vqdmulhq_lane_s16): Likewise. + (vqdmulhq_lane_s32): Likewise. + (vqdmulh_lane_s16): Likewise. + (vqdmulh_lane_s32): Likewise. + (vqrdmulhq_lane_s16): Likewise. + (vqrdmulhq_lane_s32): Likewise. + (vqrdmulh_lane_s16): Likewise. + (vqrdmulh_lane_s32): Likewise. + (vmul_n_s16): Likewise. + (vmul_n_s32): Likewise. + (vmul_n_f32): Likewise. + (vmul_n_u16): Likewise. + (vmul_n_u32): Likewise. + (vmulq_n_s16): Likewise. + (vmulq_n_s32): Likewise. + (vmulq_n_f32): Likewise. + (vmulq_n_u16): Likewise. + (vmulq_n_u32): Likewise. + (vmull_n_s16): Likewise. + (vmull_n_s32): Likewise. + (vmull_n_u16): Likewise. + (vmull_n_u32): Likewise. + (vqdmull_n_s16): Likewise. + (vqdmull_n_s32): Likewise. + (vqdmulhq_n_s16): Likewise. + (vqdmulhq_n_s32): Likewise. + (vqdmulh_n_s16): Likewise. + (vqdmulh_n_s32): Likewise. + (vqrdmulhq_n_s16): Likewise. + (vqrdmulhq_n_s32): Likewise. + (vqrdmulh_n_s16): Likewise. + (vqrdmulh_n_s32): Likewise. + (vmla_n_s16): Likewise. + (vmla_n_s32): Likewise. + (vmla_n_f32): Likewise. + (vmla_n_u16): Likewise. + (vmla_n_u32): Likewise. + (vmlaq_n_s16): Likewise. + (vmlaq_n_s32): Likewise. + (vmlaq_n_f32): Likewise. + (vmlaq_n_u16): Likewise. + (vmlaq_n_u32): Likewise. + (vmlal_n_s16): Likewise. + (vmlal_n_s32): Likewise. + (vmlal_n_u16): Likewise. + (vmlal_n_u32): Likewise. + (vqdmlal_n_s16): Likewise. + (vqdmlal_n_s32): Likewise. + (vmls_n_s16): Likewise. + (vmls_n_s32): Likewise. + (vmls_n_f32): Likewise. + (vmls_n_u16): Likewise. + (vmls_n_u32): Likewise. + (vmlsq_n_s16): Likewise. + (vmlsq_n_s32): Likewise. + (vmlsq_n_f32): Likewise. + (vmlsq_n_u16): Likewise. + (vmlsq_n_u32): Likewise. + (vmlsl_n_s16): Likewise. + (vmlsl_n_s32): Likewise. + (vmlsl_n_u16): Likewise. + (vmlsl_n_u32): Likewise. + (vqdmlsl_n_s16): Likewise. + (vqdmlsl_n_s32): Likewise. + +2014-11-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/arm/arm.c (arm_new_rtx_costs, case PLUS, MINUS): + Add cost of alu.arith in simple SImode case. + +2014-11-18 Jiong Wang <jiong.wang@arm.com> + + * lra-eliminations.c (update_reg_eliminate): Relax gcc_assert for fixed + registers. + +2014-11-18 Marat Zakirov <m.zakirov@samsung.com> + + * opts.c (finish_options): Disable aggressive opts for sanitizer. + (common_handle_option): Move code to finish_options. + +2014-11-18 Yury Gribov <y.gribov@samsung.com> + + PR sanitizer/63802 + * stor-layout.c (min_align_of_type): Respect user alignment + more. + +2014-11-18 Ilya Enkovich <ilya.enkovich@intel.com> + + * passes.c (remove_cgraph_node_from_order): New. + (do_per_function_toporder): Register cgraph removal + hook. + +2014-11-17 Terry Guo <terry.guo@arm.com> + + * config/arm/arm.c (arm_issue_rate): Return 2 for cortex-m7. + * config/arm/arm.md (generic_sched): Exclude cortex-m7. + (generic_vfp): Likewise. + * config/arm/cortex-m7.md: Pipeline description for cortex-m7. + +2014-11-17 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/63906 + * lra-remat.c (operand_to_remat): Check SP and + frame_pointer_required. + +2014-11-17 Mircea Namolaru <mircea.namolaru@inria.fr> + + * doc/invoke.texi (floop-unroll-and-jam): Document + (loop-unroll-jam-size): Likewise. + (loop-unroll-jam-depth): Likewise. + * graphite-optimize-isl.c (getPrevectorMap_full): Modify comment. + (getScheduleForBandList): Replaced unsafe union_map reuse. + +2014-11-17 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/thunderx.md: Remove copyright which should not + have been there. + +2014-11-17 Michael Meissner <meissner@linux.vnet.ibm.com> + Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * config/rs6000/rs6000.c (RELOAD_REG_AND_M16): Add support for + Altivec style vector loads that ignore the bottom 3 bits of the + address. + (rs6000_debug_addr_mask): New function to print the addr_mask + values if debugging. + (rs6000_debug_print_mode): Call rs6000_debug_addr_mask to print + out addr_mask. + (rs6000_setup_reg_addr_masks): Add support for Altivec style + vector loads that ignore the bottom 3 bits of the address. Allow + pre-increment and pre-decrement on floating point, even if the + -mupper-regs-{sf,df} options were used. + (rs6000_init_hard_regno_mode_ok): Rework DFmode support if + -mupper-regs-df. Add support for -mupper-regs-sf. Rearrange code + placement for direct move support. + (rs6000_option_override_internal): Add checks for -mupper-regs-df + requiring -mvsx, and -mupper-regs-sf requiring -mpower8-vector. + If -mupper-regs, set both -mupper-regs-sf and -mupper-regs-df, + depending on the underlying cpu. + (rs6000_secondary_reload_fail): Add ATTRIBUTE_NORETURN. + (rs6000_secondary_reload_toc_costs): Helper function to identify + costs of a TOC load for secondary reload support. + (rs6000_secondary_reload_memory): Helper function for secondary + reload, to determine if a particular memory operation is directly + handled by the hardware, or if it needs support from secondary + reload to create a valid address. + (rs6000_secondary_reload): Rework code, to be clearer. If the + appropriate -mupper-regs-{sf,df} is used, use FPR registers to + reload scalar values, since the FPR registers have D-form + addressing. Move most of the code handling memory to the function + rs6000_secondary_reload_memory, and use the reg_addr structure to + determine what type of address modes are supported. Print more + debug information if -mdebug=addr. + (rs6000_secondary_reload_inner): Rework entire function to be more + general. Use the reg_addr bits to determine what type of + addressing is supported. + (rs6000_preferred_reload_class): Rework. Move constant handling + into a single place. Prefer using FLOAT_REGS for scalar floating + point. + (rs6000_secondary_reload_class): Use a FPR register to move a + value from an Altivec register to a GPR, and vice versa. Move VSX + handling above traditional floating point. + + * config/rs6000/rs6000.md (mov<mode>_hardfloat, FMOVE32 case): + Delete some spaces in the constraints. + (DF->DF move peephole2): Disable if -mupper-regs-{sf,df} to + allow using FPR registers to load/store an Altivec register for + scalar floating point types. + (SF->SF move peephole2): Likewise. + (DFmode splitter): Add a define_split to move floating point + constants to the constant pool before register allocation. + Normally constants are put into the pool immediately, but + -ffast-math delays putting them into the constant pool for the + reciprocal approximation support. + (SFmode splitter): Likewise. + + * config/rs6000/rs6000.opt (-mupper-regs-df): Make option public. + (-mupper-regs-sf): Likewise. + + * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define + __UPPER_REGS_DF__ if -mupper-regs-df. Define __UPPER_REGS_SF__ if + -mupper-regs-sf. + (-mupper-regs): New combination option that sets -mupper-regs-sf + and -mupper-regs-df by default if the cpu supports the instructions. + + * doc/invoke.texi (RS/6000 and PowerPC Options): Document + -mupper-regs, -mupper-regs-sf, and -mupper-regs-df. + + * config/rs6000/predicates.md (memory_fp_constant): New predicate + to return true if the operand is a floating point constant that + must be put into the constant pool, before register allocation + occurs. + + * config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Enable + -mupper-regs-df by default. + (ISA_2_7_MASKS_SERVER): Enable -mupper-regs-sf by default. + (POWERPC_MASKS): Add -mupper-regs-{sf,df} as options set by the + various -mcpu=... options. + (power7 cpu): Enable -mupper-regs-df by default. + + * doc/invoke.texi (RS/6000 and PowerPC Options): Document + -mupper-regs. + +2014-11-17 Zhouyi Zhou <yizhouzhou@ict.ac.cn> + + * ira-conflicts.c (build_conflict_bit_table): Add the current + object to OBJECTS_LIVE after traversing OBJECTS_LIVE. + +2014-11-17 Jan Hubicka <hubicka@ucw.cz> + + * ipa-cp.c (ipa_get_indirect_edge_target_1): Handle speculation. + (ipa_get_indirect_edge_target): Add SPECULATIVE argument. + (devirtualization_time_bonus): Use it. + (ipcp_discover_new_direct_edges): Likewise. + * ipa-inline-analysis.c (estimate_edge_devirt_benefit): Update. + * ipa-prop.h (ipa_get_indirect_edge_target): Update prototype. + +2014-11-17 Jan Hubicka <hubicka@ucw.cz> + + * tree.c (free_lang_data_in_decl): Set + DECL_FUNCTION_SPECIFIC_OPTIMIZATION to optimization_default_node. + +2014-11-17 Jan Hubicka <hubicka@ucw.cz> + + * cgraphunit.c (analyze_functions): Use opt_for_fn. + * cgraph.h (cgraph_node::optimize_for_size_p): Likewise. + +2014-11-17 Jan Hubicka <hubicka@ucw.cz> + + * cgraph.c (symbol_table::create_edge): Use opt_for_fn. + (cgraph_node::cannot_return_p): Likewise. + (cgraph_edge::cannot_lead_to_return_p): Likewise. + (cgraph_edge::maybe_hot_p): Likewise. + +2014-11-17 Jan Hubicka <hubicka@ucw.cz> + + * predict.c (maybe_hot_frequency_p): Use opt_for_fn. + (optimize_function_for_size_p): Likewise. + (probably_never_executed): Likewise; replace cfun by fun. + +2014-11-17 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Add + variant reading from memory and assembling to ld1. + + * config/aarch64/arm_neon.h (vld1_lane_f32, vld1_lane_f64, vld1_lane_p8, + vld1_lane_p16, vld1_lane_s8, vld1_lane_s16, vld1_lane_s32, + vld1_lane_s64, vld1_lane_u8, vld1_lane_u16, vld1_lane_u32, + vld1_lane_u64, vld1q_lane_f32, vld1q_lane_f64, vld1q_lane_p8, + vld1q_lane_p16, vld1q_lane_s8, vld1q_lane_s16, vld1q_lane_s32, + vld1q_lane_s64, vld1q_lane_u8, vld1q_lane_u16, vld1q_lane_u32, + vld1q_lane_u64): Replace asm with vset_lane and pointer dereference. + +2014-11-17 Jason Merrill <jason@redhat.com> + + * tree-inline.c (copy_fn): New. + * tree-inline.h: Declare it. + +2014-11-17 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/aarch64-builtins.c (TYPES_CREATE): Remove. + * config/aarch64/aarch64-simd-builtins.def (create): Remove. + * config/aarch64/aarch64-simd.md (aarch64_create<mode>): Remove. + * config/aarch64/arm_neon.h (vcreate_f64, vreinterpret_f64_s64, + vreinterpret_f64_u64): Replace __builtin_aarch64_createv1df with C casts. + * config/aarch64/iterators.md (VD1): Remove. + +2014-11-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-cores.def (cortex-a53): Remove + AARCH64_FL_CRYPTO from feature flags. + (cortex-a57): Likewise. + (cortex-a57.cortex-a53): Likewise. + +2014-11-17 Jan Hubicka <hubicka@ucw.cz> + + * tree.c (free_lang_data_in_decl): Annotate all functio nbodies with + DECL_FUNCTION_SPECIFIC_TARGET. + * i386.c (ix86_set_current_function): Handle explicit default options. + +2014-11-17 Ilya Enkovich <ilya.enkovich@intel.com> + + * builtins.c (expand_builtin_memcpy_with_bounds): Use target hook + instead of BNDmode. + (expand_builtin_mempcpy_with_bounds): Likewise. + (expand_builtin_memset_with_bounds): Likewise. + +2014-11-17 Ilya Enkovich <ilya.enkovich@intel.com> + + * tree-ssa-strlen.c: include ipa-chkp.h, cgraph.h, + ipa-ref.h, plugin-api.h. + (get_string_length): Handle calls with bounds. + (adjust_last_stmt): Likewise. + (handle_builtin_strchr): Likewise. + (handle_builtin_strcpy): Likewise. + (handle_builtin_memcpy): Likewise. + (handle_builtin_strcat): Likewise. + +2014-11-17 Ilya Enkovich <ilya.enkovich@intel.com> + + * tree-chkp-opt.c (chkp_get_nobnd_fndecl): New. + (chkp_get_nochk_fndecl): New. + (chkp_optimize_string_function_calls): New. + (chkp_opt_execute): Call chkp_optimize_string_function_calls. + * tree-cfg.h (insert_cond_bb): New. + * tree-cfg.c (insert_cond_bb): New. + +2014-11-17 Ilya Enkovich <ilya.enkovich@intel.com> + + * tree-core.h (built_in_class): Add builtin codes to be used + by Pointer Bounds Checker for instrumented builtin functions. + * tree-streamer-in.c: Include ipa-chkp.h. + (streamer_get_builtin_tree): Created instrumented decl if + required. + * ipa-chkp.h (chkp_maybe_clone_builtin_fndecl): New. + * ipa-chkp.c (chkp_build_instrumented_fndecl): Support builtin + function decls. + (chkp_maybe_clone_builtin_fndecl): New. + (chkp_maybe_create_clone): Support builtin function decls. + (chkp_versioning): Clone builtin functions. + * tree-chkp.c (chkp_instrument_normal_builtin): New. + (chkp_add_bounds_to_call_stmt): Support builtin functions. + (chkp_replace_function_pointer): Likewise. + * builtins.c (expand_builtin_memcpy_args): New. + (expand_builtin_memcpy): Call expand_builtin_memcpy_args. + (expand_builtin_memcpy_with_bounds): New. + (expand_builtin_mempcpy_with_bounds): New. + (expand_builtin_mempcpy_args): Add orig_exp arg. Support + BUILT_IN_CHKP_MEMCPY_NOBND_NOCHK + (expand_builtin_memset_with_bounds): New. + (expand_builtin_memset_args): Support BUILT_IN_CHKP_MEMSET_NOBND_NOCHK. + (expand_builtin_with_bounds): New. + * builtins.h (expand_builtin_with_bounds): New. + * expr.c (expand_expr_real_1): Support instrumented builtin calls. + +2014-11-17 Dodji Seketeli <dodji@redhat.com> + + * gimple.h (gimple_set_visited, gimple_visited_p) + (gimple_set_plf, gimple_plf, gimple_set_uid, gimple_uid): Add more + comments to these accessors. + +2014-11-17 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr-log.c (avr_log_set_avr_log) [TARGET_ALL_DEBUG]: + Set avr_log_details to "all". + +2014-11-17 Richard Biener <rguenther@suse.de> + + PR middle-end/63898 + * match.pd: Guard X / CST -> X * CST' transform against + zero CST. + +2014-11-17 Terry Guo <terry.guo@arm.com> + + * config/arm/thumb1.md (*addsi3_cbranch_scratch): Updated to UAL + format. + +2014-11-17 Zhenqiang Chen <zhenqiang.chen@arm.com> + + * ifcvt.c (HAVE_cbranchcc4): Define. + (noce_emit_cmove, noce_get_alt_condition, noce_get_condition): + Use HAVE_cbranchcc4. + +2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * config/aarch64/aarch64.c (aarch64_code_to_ccmode, + aarch64_convert_mode, aarch64_gen_ccmp_first, + aarch64_gen_ccmp_next): New functions. + (TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): Define. + +2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * config/aarch64/aarch64-protos.h (aarch64_ccmp_mode_to_code): New. + * aarch64.c (aarch64_nzcv_codes): New data. + (aarch64_ccmp_mode_to_code): New. + (aarch64_print_operand): Output nzcv. + config/aarch64/aarch64.md (cbranchcc4, *ccmp_and, *ccmp_ior, cstorecc4): + New patterns. + (cstore<mode>4): Handle ccmp_cc_register. + * config/aarch64/predicates.md (const0_operand): New. + +2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * config/aarch64/aarch64-modes.def: Define ccmp CC mode. + * config/aarch64/aarch64.c (aarch64_get_condition_code_1): New function + extacted from aarch64_get_condition_code. + (aarch64_get_condition_code): Call aarch64_get_condition_code_1. + config/aarch64/predicates.md (ccmp_cc_register): New predicate. + +014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * config/aarch64/constraints.md (Usn, aarch64_ccmp_immediate, + aarch64_ccmp_operand): New constraints. + +2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * Makefile.in: Add ccmp.o. + * ccmp.c: New file. + * ccmp.h: New file. + * expr.c: include "ccmp.h" + (expand_cond_expr_using_cmove): Handle VOIDmode. + (expand_expr_real_1): Try to expand ccmp. + +2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * cfgexpand.c (expand_gimple_cond): Check ccmp. + * expmed.c (emit_cstore): Make it global. + * expmed.h: #include "insn-codes.h" + (emit_cstore): New prototype. + * expr.c (expand_operands): Make it global. + * expr.h (expand_operands): New prototype. + * optabs.c (get_rtx_code): Make it global. + * optabs.h (get_rtx_code): New prototype. + +2014-11-17 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + * target.def (gen_ccmp_first, gen_ccmp_first): Add two new hooks. + * doc/tm.texi.in (TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): New. + * doc/tm.texi (TARGET_GEN_CCMP_FIRST, TARGET_GEN_CCMP_NEXT): New. + +2014-11-16 Patrick Palka <ppalka@gcc.gnu.org> + + PR middle-end/63790 + * tree-ssa-forwprop.c (forward_propagate_into_comparison_1): + Always combine comparisons or conversions from booleans. + +2014-11-16 Jan Hubicka <hubicka@ucw.cz> + + * ipa-polymorphic-call.c + (ipa_polymorphic_call_context::speculation_consistent_p): Constify. + (ipa_polymorphic_call_context::meet_speculation_with): New function. + (ipa_polymorphic_call_context::combine_with): Handle types in + construction better. + (ipa_polymorphic_call_context::equal_to): Do not bother about useless + speculation. + (ipa_polymorphic_call_context::meet_with): New function. + * cgraph.h (class ipa_polymorphic_call_context): Add + meet_width, meet_speculation_with; constify speculation_consistent_p. + * ipa-cp.c (ipa_context_from_jfunc): Handle speculation; combine + with incomming context. + (propagate_context_accross_jump_function): Likewise; be more cureful. + about set_contains_variable. + (ipa_get_indirect_edge_target_1): Fix handling of dynamic type changes. + (find_more_scalar_values_for_callers_subset): Fix. + (find_more_contexts_for_caller_subset): Perform meet operation. + +2014-11-16 Jan Hubicka <hubicka@ucw.cz> + + * passes.c (execute_one_pass): Do not apply all transforms prior + every simple IPA pass. + * cgraphunit.c: Do not include fibheap.h + (expand_thunk): Use get_untransformed_body. + (cgraph_node::expand): Likewise. + * tree-ssa-structalias.c (ipa_pta_execute): Skip inline clones. + * cgraph.c (release_function_body): Do not push cfun when CFG + is not there. + (cgraph_node::get_untransformed_body): Break out from ... + (cgraph_node::get_body): ... here; add code to apply all transforms. + * cgraph.h (cgraph_node): Add get_untransformed_body. + * ipa-icf.c (sem_function::init): Use get_untransformed_body. + * cgraphclones.c (duplicate_thunk_for_node): Likewise. + * tree-inline.c (expand_call_inline): LIkewise. + * i386.c (ix86_reset_to_default_globals): Break out from ... + (ix86_set_current_function): ... here; + (ix86_reset_previous_fndecl): Use it. + (ix86_simd_clone_adjust): Use ix86_reset_previous_fndecl. + +2014-11-16 Eric Botcazou <ebotcazou@adacore.com> + + * doc/tm.texi.in (TARGET_FLAGS_REGNUM): Move around. + * doc/tm.texi: Regenerate. + +2014-11-16 Uros Bizjak <ubizjak@gmail.com> + + * config/sh/sh.c: Do not include algorithm. + (sh_emit_scc_to_t): Replace open-coded swap with std::swap + to swap values. + (sh_emit_compare_and_branch): Ditto. + (sh_emit_compare_and_set): Ditto. + * config/sh/sh.md (replacement peephole2): Ditto. + (cstore4_media): Ditto. + (*fmasf4): Ditto. + +2014-11-15 Vladimir Makarov <vmakarov@redhat.com> + + * lra-remat.c (cand_transf_func): Process regno for + rematerialization too. + * lra.c (lra): Switch on rematerialization pass. + +2014-11-15 Vladimir Makarov <vmakarov@redhat.com> + + * lra.c (lra): Switch off rematerialization pass. + +2014-11-15 Marc Glisse <marc.glisse@inria.fr> + + * config/i386/xmmintrin.h (_mm_add_ps, _mm_sub_ps, _mm_mul_ps, + _mm_div_ps, _mm_store_ss, _mm_cvtss_f32): Use vector extensions + instead of builtins. + * config/i386/emmintrin.h (__v2du, __v4su, __v8hu, __v16qu): New + typedefs. + (_mm_sqrt_sd): Fix comment. + (_mm_add_epi8, _mm_add_epi16, _mm_add_epi32, _mm_add_epi64, + _mm_sub_epi8, _mm_sub_epi16, _mm_sub_epi32, _mm_sub_epi64, + _mm_mullo_epi16, _mm_cmpeq_epi8, _mm_cmpeq_epi16, _mm_cmpeq_epi32, + _mm_cmplt_epi8, _mm_cmplt_epi16, _mm_cmplt_epi32, _mm_cmpgt_epi8, + _mm_cmpgt_epi16, _mm_cmpgt_epi32, _mm_and_si128, _mm_or_si128, + _mm_xor_si128, _mm_store_sd, _mm_cvtsd_f64, _mm_storeh_pd, + _mm_cvtsi128_si64, _mm_cvtsi128_si64x, _mm_add_pd, _mm_sub_pd, + _mm_mul_pd, _mm_div_pd, _mm_storel_epi64, _mm_movepi64_pi64): + Use vector extensions instead of builtins. + * config/i386/smmintrin.h (_mm_cmpeq_epi64, _mm_cmpgt_epi64, + _mm_mullo_epi32): Likewise. + * config/i386/avxintrin.h (__v4du, __v8su, __v16hu, __v32qu): + New typedefs. + (_mm256_add_pd, _mm256_add_ps, _mm256_div_pd, _mm256_div_ps, + _mm256_mul_pd, _mm256_mul_ps, _mm256_sub_pd, _mm256_sub_ps): + Use vector extensions instead of builtins. + * config/i386/avx2intrin.h (_mm256_cmpeq_epi8, _mm256_cmpeq_epi16, + _mm256_cmpeq_epi32, _mm256_cmpeq_epi64, _mm256_cmpgt_epi8, + _mm256_cmpgt_epi16, _mm256_cmpgt_epi32, _mm256_cmpgt_epi64, + _mm256_and_si256, _mm256_or_si256, _mm256_xor_si256, _mm256_add_epi8, + _mm256_add_epi16, _mm256_add_epi32, _mm256_add_epi64, + _mm256_mullo_epi16, _mm256_mullo_epi32, _mm256_sub_epi8, + _mm256_sub_epi16, _mm256_sub_epi32, _mm256_sub_epi64): Likewise. + * config/i386/avx512fintrin.h (__v8du, __v16su, __v32hu, __v64qu): + New typedefs. + (_mm512_or_si512, _mm512_or_epi32, _mm512_or_epi64, _mm512_xor_si512, + _mm512_xor_epi32, _mm512_xor_epi64, _mm512_and_si512, + _mm512_and_epi32, _mm512_and_epi64, _mm512_mullo_epi32, + _mm512_add_epi64, _mm512_sub_epi64, _mm512_add_epi32, + _mm512_sub_epi32, _mm512_add_pd, _mm512_add_ps, _mm512_sub_pd, + _mm512_sub_ps, _mm512_mul_pd, _mm512_mul_ps, _mm512_div_pd, + _mm512_div_ps): Use vector extensions instead of builtins. + * config/i386/avx512bwintrin.h (_mm512_mullo_epi16, _mm512_add_epi8, + _mm512_sub_epi8, _mm512_sub_epi16, _mm512_add_epi16): Likewise. + * config/i386/avx512dqintrin.h (_mm512_mullo_epi64): Likewise. + * config/i386/avx512vldqintrin.h (_mm256_mullo_epi64, _mm_mullo_epi64): + Likewise. + +2014-11-15 Jan Hubicka <hubicka@ucw.cz> + + * lto-streamer-out.c (hash_tree): Use cl_optimization_hash. + * lto-streamer.h (cl_optimization_stream_out, + cl_optimization_stream_in): Declare. + * optc-save-gen.awk: Generate cl_optimization LTO streaming + and hashing routines. + * opth-gen.awk: Add prototype of cl_optimization_hash. + * tree-streamer-in.c (unpack_ts_optimization): Remove. + (streamer_unpack_tree_bitfields): Use cl_optimization_stream_in. + * tree-streamer-out.c (pack_ts_optimization): Remove. + (streamer_pack_tree_bitfields): Use cl_optimization_stream_out. + +2014-11-15 Mircea Namolaru <mircea.namolaru@inria.fr> + + * common.opt (flag_loop_unroll_and_jam): New flag. + * params.def (PARAM_LOOP_UNROLL_JAM_SIZE): Parameter for unroll and + jam flag. + (PARAM_LOOP_UNROLL_JAM_DEPTH): Likewise. + * graphite-poly.h (struct poly_bb:map_sepclass): New field + * graphite-poly.c (new_poly_bb): Initialization for new field. + (apply_poly_transforms): Support for unroll and jam flag. + * graphite-isl-ast-to-gimple.c (generate_luj_sepclass): Compute the + separation class. + (generate_luj_sepclass_opt): Build the separation class option. + (generate_luj_options): Set unroll and jam options. + (set_options): Support for unroll and jam options. + (scop_to_isl_ast): Likewise + * graphite-optimize-isl.c (getPrevectorMap_full): New function for + computing the separating class map. + (optimize_isl): Support for the separating class map. + (apply_schedule_map_to_scop): Likewise. + (getScheduleMap): Likewise. + (getScheduleForBand): Likewise. + (getScheduleForBandList): Likewise. + * graphite.c (gate_graphite_transforms): Add unroll and jam flag. + * toplev.c (process_options) Likewise. + +2014-11-15 Eric Botcazou <ebotcazou@adacore.com> + + * tree-cfg.c (replace_loop_annotate_in_block): New function extracted + from... + (replace_loop_annotate): ...here. Call it on the header and on the + latch block, if any. Restore proper behavior of final cleanup. + +2014-11-15 Eric Botcazou <ebotcazou@adacore.com> + + * tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Add log message + for max-completely-peeled-insns limit. + +2014-11-14 Jan Hubicka <hubicka@ucw.cz> + + * ipa-prop.h (ipa_known_type_data): Remove. + (ipa_binfo_from_known_type_jfunc): Remove. + +2014-11-14 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/aarch64-cores.def (thunderx): Change the scheduler + over to thunderx. + * config/aarch64/aarch64.md: Include thunderx.md. + (generic_sched): Set to no for thunderx. + * config/aarch64/thunderx.md: New file. + +2014-11-14 Michael Meissner <meissner@linux.vnet.ibm.com> + + * config/rs6000/predicates.md (easy_fp_constant): Delete redunant + tests for 0.0. + + * config/rs6000/vector.md (VEC_R): Move secondary reload support + insns to rs6000.md from vector.md. + (reload_<VEC_R:mode>_<P:mptrsize>_store): Likewise. + (reload_<VEC_R:mode>_<P:mptrsize>_load): Likewise. + (vec_reload_and_plus_<mptrsize>): Likewise. + + * config/rs6000/rs6000.md (Fa): New mode attribute to give + constraint for the Altivec registers for a type. + (RELOAD): New mode iterator for all of the types that have + secondary reload address support to load up a base register. + (extendsfdf2_fpr): Use correct constraint. + (copysign<mode>3_fcpsgn): For SFmode, use correct xscpsgndp + instruction. + (floatsi<mode>2_lfiwax): Add support for -mupper-regs-{sf,df}. + Generate the non-VSX instruction if all registers were FPRs. Do + not use the patterns in vsx.md for scalar operations. + (floatsi<mode>2_lfiwax_mem): Likewise. + (floatunssi<mode>2_lfiwzx): Likewise. + (floatunssi<mode>2_lfiwzx_mem): Likewise. + (fix_trunc<mode>di2_fctidz): Likewise. + (fixuns_trunc<mode>di2_fctiduz): Likewise. + (fctiwz_<mode>): Likewise. + (fctiwuz_<mode>): Likewise. + (friz): Likewise. + (floatdidf2_fpr): Likewise. + (floatdidf2_mem): Likewise. + (floatunsdidf2): Likewise. + (floatunsdidf2_fcfidu): Likewise. + (floatunsdidf2_mem): Likewise. + (floatdisf2_fcfids): Likewise. + (floatdisf2_mem): Likewise. + (floatdisf2_internal1): Add explicit test for not FCFIDS to make + it more obvious that the code is for pre-ISA 2.06 machines. + (floatdisf2_internal2): Likewise. + (floatunsdisf2_fcfidus): Add support for -mupper-regs-{sf,df}. + Generate the non-VSX instruction if all registers were FPRs. Do + not use the patterns in vsx.md for scalar operations. + (floatunsdisf2_mem): Likewise. + (reload_<RELOAD:mode>_<P:mptrsize>_store): Move the reload + handlers here from vector.md, and expand the types we generate + reload handlers for. + (reload_<RELOAD:mode>_<P:mptrsize>_load): Likewise. + (vec_reload_and_plus_<mptrsize>): Likewise. + + * config/rs6000/vsx.md (vsx_float<VSi><mode>2): Only provide the + vector forms of the instructions. Move VSX scalar forms to + rs6000.md, and add support for -mupper-regs-sf. + (vsx_floatuns<VSi><mode>2): Likewise. + (vsx_fix_trunc<mode><VSi>2): Likewise. + (vsx_fixuns_trunc<mode><VSi>2): Likewise. + (vsx_float_fix_<mode>2): Delete DF version, rename to + vsx_float_fix_v2df2. + (vsx_float_fix_v2df2): Likewise. + +2014-11-14 Martin Jambor <mjambor@suse.cz> + + * ipa-prop.h (jump_func_type): Removed value IPA_JF_KNOWN_TYPE. + (ipa_pass_through_data): Removed field type_preserved. + (ipa_ancestor_jf_data): removed fields type and type_preserved. + (ipa_jump_func): Removed field known_type. + (ipa_get_jf_known_type_offset): Removed. + (ipa_get_jf_known_type_base_type): Likewise. + (ipa_get_jf_known_type_component_type): Likewise. + (ipa_get_jf_ancestor_type): Likewise. + * ipa-cp.c (print_ipcp_constant_value): Removed BINFO handling. + (ipa_get_jf_pass_through_result): Likewise. + (ipa_get_jf_ancestor_result): Always build ptr_node_type accesses. + (values_equal_for_ipcp_p): Removed BINFO handling. + (ipa_get_indirect_edge_target_1): Updated comment. + * ipa-prop.c (ipa_print_node_jump_functions_for_edge): Removed handling + of IPA_JF_KNOWN_TYPE jump functions. Do not print removed fields. + (ipa_set_jf_known_type): Removed. + (ipa_set_jf_simple_pass_through): Do not set removed fields. Update + all callers. + (ipa_set_jf_arith_pass_through): Likewise. + (ipa_set_ancestor_jf): Likewise. + (ipa_binfo_from_known_type_jfunc): Removed. + (prop_type_change_info): Removed fields known_current_type and + multiple_types_encountered. + (extr_type_from_vtbl_ptr_store): Removed. + (check_stmt_for_type_change): Do not attempt to identify changed type. + (detect_type_change_from_memory_writes): Do not set the removed fields, + always set jfunc to unknown. + (compute_complex_assign_jump_func): Do not detect dynamic type change. + (compute_complex_ancestor_jump_func): Likewise. + (compute_known_type_jump_func): Removed. + (ipa_compute_jump_functions_for_edge): Do not detect dynamic type + change. Do not comute known type jump functions. + (combine_known_type_and_ancestor_jfs): Removed. + (update_jump_functions_after_inlining): Removed handling of + IPA_JF_KNOWN_TYPE jump functions. Do not set removed fields. + (ipa_write_jump_function): Do not stream removed fields or known type + jump functions. + (ipa_read_jump_function): Likewise. + +2014-11-14 Vladimir Makarov <vmakarov@redhat.com> + + * lra-int.h (lra_create_live_ranges): Add parameter. + * lra-lives.c (temp_bitmap): Move higher. + (initiate_live_solver): Move temp_bitmap initialization into + lra_live_ranges_init. + (finish_live_solver): Move temp_bitmap clearing into + live_ranges_finish. + (process_bb_lives): Add parameter. Use it to control live info + update and dead insn elimination. Pass it to mark_regno_live and + mark_regno_dead. + (lra_create_live_ranges): Add parameter. Pass it to + process_bb_lives. + (lra_live_ranges_init, lra_live_ranges_finish): See changes in + initiate_live_solver and finish_live_solver. + * lra-remat.c (do_remat): Process insn non-operand hard regs too. + Use temp_bitmap to update avail_cands. + * lra.c (lra): Pass new parameter to lra_create_live_ranges. Move + check with lra_need_for_spill_p after live range pass. Switch on + rematerialization pass. + +2014-11-14 Martin Jambor <mjambor@suse.cz> + + * ipa-prop.h (ipa_get_jf_pass_through_type_preserved): use + agg_preserved flag instead. + (ipa_get_jf_ancestor_type_preserved): Likewise. + (ipa_node_params): Rename known_vals to known_csts, update all users. + New field known_contexts. + (ipa_get_indirect_edge_target): Update prototype. + (ipcp_poly_ctx_values_pool): Declare. + (ipa_context_from_jfunc): Likewise. + * ipa-inline.h (estimate_ipcp_clone_size_and_time): Updated prototype. + * cgraph.h (ipa_polymorphic_call_context): New method equal_to. New + parameter newline of method dump. + * ipa-cp.c (ctxlat): New field. + (ipcp_values_pool): Renamed to ipcp_cst_values_pool, updated all users. + (ipcp_poly_ctx_values_pool):New variable. + (ipa_get_poly_ctx_lat): New function. + (print_ipcp_constant_value): New overloaded function for contexts. + (print_all_lattices): Also print contexts. + (ipa_topo_info): New field contexts; + (set_all_contains_variable): Also set the flag in the context lattice. + (initialize_node_lattices): Likewise for flag bottom. + (ipa_get_jf_ancestor_result): Removed BINFO handling. + (ipa_value_from_jfunc): Likewise. + (ipa_context_from_jfunc): New function. + (values_equal_for_ipcp_p): New overloaded function for contexts. + (allocate_and_init_ipcp_value): Construct the value. + (allocate_and_init_ipcp_value): New overloaded function for contexts. + (propagate_scalar_accross_jump_function): Removed handling of + KNOWN_TYPE jump functions. + (propagate_context_accross_jump_function): New function. + (propagate_constants_accross_call): Also propagate contexts. + (ipa_get_indirect_edge_target_1): Work on contexts rather than BINFOs. + (ipa_get_indirect_edge_target): Likewise. + (devirtualization_time_bonus): Likewise. + (gather_context_independent_values): Create and populate known_contexts + vector rather than known_binfos. + (perform_estimation_of_a_value): Work on contexts rather than BINFOs. + (estimate_local_effects): Likewise. + (add_all_node_vals_to_toposort): Also add contexts to teir topological + sort. + (ipcp_propagate_stage): Also propagate effects of contexts. + (ipcp_discover_new_direct_edges): Receive and pass known_contexts to + ipa_get_indirect_edge_target_1. + (cgraph_edge_brings_value_p): New overloaded function for contexts. + (create_specialized_node): Work on contexts rather than BINFOs. + (find_more_contexts_for_caller_subset): New function. + (known_contexts_useful_p): New function. + (copy_useful_known_contexts): Likewise. + (modify_known_vectors_with_val): Likewise. + (ipcp_val_in_agg_replacements_p): Renamed to + ipcp_val_agg_replacement_ok_p, return true for all offset indicating + non-aggregate. + (ipcp_val_agg_replacement_ok_p): New overloaded function for contexts. + (decide_about_value): Work on contexts rather than BINFOs. + (decide_whether_version_node): Likewise. + (ipcp_driver): Initialize the new alloc pool. + * ipa-prop.c (ipa_print_node_jump_functions_for_edge): Prettify + printing of edge contexts. + (ipa_set_ancestor_jf): Replace assert with conditional setting of + type_preserved to false. + (update_jump_functions_after_inlining): Use access function instead of + reading agg_preserved directly. Store combined context in the ancestor + case. + (try_make_edge_direct_virtual_call): Work on contexts rather than + BINFOs. + (update_indirect_edges_after_inlining): Get context from + ipa_context_from_jfunc. + (ipa_free_node_params_substructures): Free also known_contexts. + (ipa_free_all_structures_after_ipa_cp): Free the new alloc pool. + (ipa_free_all_structures_after_iinln): Likewise. + * ipa-inline-analysis.c (evaluate_properties_for_edge): Work on + contexts rather than BINFOs. + (estimate_edge_devirt_benefit): Likewise. + (estimate_edge_size_and_time): Likewise. + (estimate_calls_size_and_time): Likewise. + (estimate_node_size_and_time): Likewise. + (estimate_ipcp_clone_size_and_time): Likewise. + (do_estimate_edge_time): Likewise. + (do_estimate_edge_size): Likewise. + (do_estimate_edge_hints): Likewise. + * ipa-polymorphic-call.c (ipa_polymorphic_call_context::dump): New + parameter newline, ouput newline only when it is set. + (ipa_polymorphic_call_context::equal_to): New method. + +2014-11-14 Martin Jambor <mjambor@suse.cz> + + * ipa-cp.c (ipcp_value_source): Converted to a template class. All + users converted to the same specialization as the using class/function + or specialization on tree. + (ipcp_value): Likewise. + (ipcp_lattice): Likewise. + (ipcp_agg_lattice): Now derived from tree specialization of + ipcp_lattice. + (values_topo): Moved to new class value_topo_info. + (ipa_lat_is_single_const): Turned into ipcp_lattice::is_single_const. + Updated all callers. + (print_lattice): Turned into ipcp_lattice::print. Updated all + callers. + (value_topo_info): New class template. + (ipa_topo_info): New field constants. New constructor. + (build_toporder_info): Do not clear stack_top, only checkign assert + it. + (set_lattice_to_bottom): Turned into ipcp_lattice::set_to_bottom. + Updated all callers. + (set_lattice_contains_variable): Turned into + ipcp_lattice::set_contains_variable. Updated all callers. + (add_value_source): Turned into ipcp_value::add_source. Updated all + callers. + (allocate_and_init_ipcp_value): New function. + (add_value_to_lattice): Turned into ipcp_lattice::add_value. Last + parameter got default a value. Updated all callers. + (add_scalar_value_to_lattice): Removed, users converted to using + ipcp_lattice::add_value with default value of the last parameter. + (add_val_to_toposort): Turned to value_topo_info::add_val. Updated + all callers. + (propagate_effects): Made method of value_topo_info. + (cgraph_edge_brings_value_p): Now a template function. + (get_info_about_necessary_edges): Likewise. + (gather_edges_for_value): Likewise. + (perhaps_add_new_callers): Likewise. + (decide_about_value): Likewise. + * ipa-prop.h (ipcp_lattice): Remove fowrward declaration. + +2014-11-14 Jakub Jelinek <jakub@redhat.com> + + * doc/install.texi (--with-diagnostics-color=): Document. + + * tree-ssa.dce.c (eliminate_unnecessary_stmts): Eliminate + IFN_GOMP_SIMD_LANE without lhs as useless. + + * ipa-pure-const.c (struct funct_state_d): Add can_free field. + (varying_state): Add true for can_free. + (check_call): For builtin or internal !nonfreeing_call_p set + local->can_free. + (check_stmt): For asm volatile and asm with "memory" set + local->can_free. + (analyze_function): Clear local->can_free initially, continue + calling check_stmt until all flags are computed, dump can_free + flag. + (pure_const_write_summary): Write can_free flag. + (pure_const_read_summary): Read it back. + (propagate_pure_const): Propagate also can_free flag, set + w->nonfreeing_fn if it is false after propagation. + * cgraph.h (cgraph_node): Add nonfreeing_fn member. + * gimple.c: Include ipa-ref.h, lto-streamer.h and cgraph.h. + (nonfreeing_call_p): Return cgraph nonfreeing_fn flag if set. + Also return true for IFN_ABNORMAL_DISPATCHER. + * cgraph.c (cgraph_node::dump): Dump nonfreeing_fn flag. + * lto-cgraph.c (lto_output_node): Write nonfreeing_fn flag. + (input_overwrite_node): Read it back. + +2014-11-14 Jakub Jelinek <jakub@redhat.com> + Marek Polacek <polacek@redhat.com> + + * sanopt.c: Include tree-ssa-operands.h. + (struct sanopt_info): Add has_freeing_call_p, + has_freeing_call_computed_p, imm_dom_path_with_freeing_call_p, + imm_dom_path_with_freeing_call_computed_p, freeing_call_events, + being_visited_p fields. + (struct sanopt_ctx): Add asan_check_map field. + (imm_dom_path_with_freeing_call, maybe_optimize_ubsan_null_ifn, + maybe_optimize_asan_check_ifn): New functions. + (sanopt_optimize_walker): Use them, optimize even ASAN_CHECK + internal calls. + (pass_sanopt::execute): Call sanopt_optimize even for + -fsanitize=address. + * gimple.c (nonfreeing_call_p): Return true for non-ECF_LEAF + internal calls. + +2014-11-14 Alan Lawrence <alan.lawrence@arm.com> + + * tree-vect-loop.c (vect_create_epilog_for_reduction): Move code for + 'if (extract_scalar_result)' to the only place that it is true. + +2014-11-14 H.J. Lu <hongjiu.lu@intel.com> + + * config.gcc (default_gnu_indirect_function): Set to yes + for i[34567]86-*-linux* and x86_64-*-linux* if not targeting + Android nor uclibc. + +2014-11-14 Felix Yang <felix.yang@huawei.com> + Jiji Jiang <jiangjiji@huawei.com> + + * config/aarch64/aarch64-simd.md (*aarch64_simd_ld1r<mode>): Use + VALL mode iterator instead of VALLDI. + +2014-11-14 Jan Hubicka <hubicka@ucw.cz> + + * optc-save-gen.awk: Output cl_target_option_eq, + cl_target_option_hash, cl_target_option_stream_out, + cl_target_option_stream_in functions. + * opth-gen.awk: Output prototypes for + cl_target_option_eq and cl_target_option_hash. + * lto-streamer.h (cl_target_option_stream_out, + cl_target_option_stream_in): Declare. + * tree.c (cl_option_hash_hash): Use cl_target_option_hash. + (cl_option_hash_eq): Use cl_target_option_eq. + * tree-streamer-in.c (unpack_value_fields): Stream in + TREE_TARGET_OPTION. + * lto-streamer-out.c (DFS::DFS_write_tree_body): Follow + DECL_FUNCTION_SPECIFIC_TARGET. + (hash_tree): Hash TREE_TARGET_OPTION; visit + DECL_FUNCTION_SPECIFIC_TARGET. + * tree-streamer-out.c (streamer_pack_tree_bitfields): Skip + TS_TARGET_OPTION. + (streamer_write_tree_body): Output TS_TARGET_OPTION. + +2014-11-14 Richard Biener <rguenther@suse.de> + + * gimple-fold.h (gimple_fold_stmt_to_constant_1): Add 2nd + valueization hook defaulted to no_follow_ssa_edges. + * gimple-fold.c (gimple_fold_stmt_to_constant_1): Pass + 2nd valueization hook to gimple_simplify. + * tree-ssa-ccp.c (valueize_op_1): New function to be + used for gimple_simplify called via gimple_fold_stmt_to_constant_1. + (ccp_fold): Adjust. + * tree-vrp.c (vrp_valueize_1): New function to be + used for gimple_simplify called via gimple_fold_stmt_to_constant_1. + (vrp_visit_assignment_or_call): Adjust. + +2014-11-14 Marek Polacek <polacek@redhat.com> + + * fold-const.c (fold_negate_expr): Don't fold INTEGER_CST if + that overflows when SANITIZE_SI_OVERFLOW is on. Guard -(-A) + folding with TYPE_OVERFLOW_SANITIZED. + +2014-11-14 Marek Polacek <polacek@redhat.com> + + PR sanitizer/63839 + * asan.c (ATTR_CONST_NORETURN_NOTHROW_LEAF_LIST, + ATTR_COLD_CONST_NORETURN_NOTHROW_LEAF_LIST): Define. + * builtin-attrs.def (ATTR_COLD_CONST_NORETURN_NOTHROW_LEAF_LIST): + Define. + * builtins.c (fold_builtin_0): Don't include ubsan.h. Don't + instrument BUILT_IN_UNREACHABLE here. + * sanitizer.def (BUILT_IN_UBSAN_HANDLE_BUILTIN_UNREACHABLE): Make + const. + * sanopt.c (pass_sanopt::execute): Instrument BUILT_IN_UNREACHABLE. + * tree-ssa-ccp.c (optimize_unreachable): Bail out if + SANITIZE_UNREACHABLE. + * ubsan.c (ubsan_instrument_unreachable): Rewrite for GIMPLE. + * ubsan.h (ubsan_instrument_unreachable): Adjust declaration. + +2014-11-14 Alan Lawrence <alan.lawrence@arm.com> + + * config/rs6000/vector.md (vec_shl_<mode>): Remove. + (vec_shr_<mode>): Reverse shift if BYTES_BIG_ENDIAN. + +2014-11-14 Alan Lawrence <alan.lawrence@arm.com> + + * optabs.c (shift_amt_for_vec_perm_mask): Remove code conditional on + BYTES_BIG_ENDIAN. + * tree-vect-loop.c (calc_vec_perm_mask_for_shift, + vect_create_epilog_for_reduction): Likewise. + * doc/md.texi (vec_shr_m): Clarify direction of shifting. + +2014-11-14 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + PR target/63724 + * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Split out + numerical immediate handling to... + (aarch64_internal_mov_immediate): ...this. New. + (aarch64_rtx_costs): Use aarch64_internal_mov_immediate. + (aarch64_mov_operand_p): Relax predicate. + * config/aarch64/aarch64.md (mov<mode>:GPI): Do not expand CONST_INTs. + (*movsi_aarch64): Turn into define_insn_and_split and new alternative + for 'n'. + (*movdi_aarch64): Likewise. + +2014-11-14 Richard Biener <rguenther@suse.de> + + * match.pd: Implement more binary patterns exercised by + fold_stmt. + * fold-const.c (sing_bit_p): Export. + (exact_inverse): Likewise. + (fold_binary_loc): Remove patterns here. + (tree_unary_nonnegative_warnv_p): Use CASE_CONVERT. + * fold-const.h (sing_bit_p): Declare. + (exact_inverse): Likewise. + +2014-11-14 Marek Polacek <polacek@redhat.com> + + * tree.c (build_common_builtin_nodes): Remove doubled ECF_LEAF. + +2014-11-14 Richard Biener <rguenther@suse.de> + + * genmatch.c (add_operator): Allow CONSTRUCTOR. + (dt_node::gen_kids): Handle CONSTRUCTOR not as GENERIC. + (parser::parse_op): Allow to iterate over predicates. + +2014-11-14 Jakub Jelinek <jakub@redhat.com> + + * configure.ac (--with-diagnostics-color): New configure + option, default to --with-diagnostics-color=auto. + * toplev.c (process_options): Use DIAGNOSTICS_COLOR_DEFAULT + to determine -fdiagnostics-color= option default. + * doc/invoke.texi (-fdiagnostics-color=): Document new + default. + * configure: Regenerated. + * config.in: Regenerated. + +2014-11-13 Teresa Johnson <tejohnson@google.com> + + PR tree-optimization/63841 + * tree-ssa-strlen.c (strlen_optimize_stmt): Ignore clobbers. + +2014-11-14 Bin Cheng <bin.cheng@arm.com> + + * timevar.def (TV_SCHED_FUSION): New time var. + * passes.def (pass_sched_fusion): New pass. + * config/arm/arm.c (TARGET_SCHED_FUSION_PRIORITY): New. + (extract_base_offset_in_addr, fusion_load_store): New. + (arm_sched_fusion_priority): New. + (arm_option_override): Disable scheduling fusion by default + on non-armv7 processors or ldrd/strd isn't preferred. + * sched-int.h (struct _haifa_insn_data): New field. + (INSN_FUSION_PRIORITY, FUSION_MAX_PRIORITY, sched_fusion): New. + * sched-rgn.c (rest_of_handle_sched_fusion): New. + (pass_data_sched_fusion, pass_sched_fusion): New. + (make_pass_sched_fusion): New. + * haifa-sched.c (sched_fusion): New. + (insn_cost): Handle sched_fusion. + (priority): Handle sched_fusion by calling target hook. + (enum rfs_decision): New enum value. + (rfs_str): New element for RFS_FUSION. + (rank_for_schedule): Support sched_fusion. + (schedule_insn, max_issue, prune_ready_list): Handle sched_fusion. + (schedule_block, fix_tick_ready): Handle sched_fusion. + * common.opt (flag_schedule_fusion): New. + * tree-pass.h (make_pass_sched_fusion): New. + * target.def (fusion_priority): New. + * doc/tm.texi.in (TARGET_SCHED_FUSION_PRIORITY): New. + * doc/tm.texi: Regenerated. + * doc/invoke.texi (-fschedule-fusion): New. + +2014-11-13 Rong Xu <xur@google.com> + + PR debug/63581 + * cfgrtl.c (emit_barrier_after_bb): Append the barrier to the + footer, instead of unconditionally overwritten. + +2014-11-14 Martin Jambor <mjambor@suse.cz> + + * cgraph.h (clear_outer_type): Make public. Fix comment. + * ipa-devirt.c (possible_polymorphic_call_targets): Use + clear_outer_type when resetting the context. + +2014-11-13 Dominique Dhumieres <dominiq@lps.ens.fr> + + PR bootstrap/63853 + * gcc.c (handle_foffload_option): Replace strchrnul with strchr. + * lto-wrapper.c (parse_env_var, append_offload_options): Likewise. + +2014-11-13 Alan Lawrence <alan.lawrence@arm.com> + + * fold-const.c (const_binop): Remove code handling VEC_RSHIFT_EXPR. + * tree-cfg.c (verify_gimple_assign_binary): Likewise. + * tree-inline.c (estimate_operator_cost): Likewise. + * tree-pretty-print.c (dump_generic_node, op_code_prio, op_symbol_code): + Likewise. + + * tree-vect-generic.c (expand_vector_operations_1): Remove assertion + against VEC_RSHIFT_EXPR. + + * optabs.h (expand_vec_shift_expr): Remove. + * optabs.c (optab_for_tree_code): Remove case VEC_RSHIFT_EXPR. + (expand_vec_shift_expr): Remove. + * tree.def (VEC_RSHIFT_EXPR): Remove + +2014-11-13 Alan Lawrence <alan.lawrence@arm.com> + + * optabs.c (can_vec_perm_p): Update comment, does not consider vec_shr. + (shift_amt_for_vec_perm_mask): New. + (expand_vec_perm_1): Use vec_shr_optab if second vector is const0_rtx + and mask appropriate. + + * tree-vect-loop.c (calc_vec_perm_mask_for_shift): New. + (have_whole_vector_shift): New. + (vect_model_reduction_cost): Call have_whole_vector_shift instead of + looking for vec_shr_optab. + (vect_create_epilog_for_reduction): Likewise; also rename local variable + have_whole_vector_shift to reduce_with_shift; output VEC_PERM_EXPRs + instead of VEC_RSHIFT_EXPRs. + + * tree-vect-stmts.c (vect_gen_perm_mask_checked): Extend comment. + +2014-11-13 Alan Lawrence <alan.lawrence@arm.com> + + * tree-vectorizer.h (vect_gen_perm_mask): Remove. + (vect_gen_perm_mask_checked, vect_gen_perm_mask_any): New. + + * tree_vec_data_refs.c (vect_permute_load_chain, + vec_permute_store_chain, vec_shift_permute_load_chain): Replace + vect_gen_perm_mask & assert with vect_gen_perm_mask_checked. + + * tree-vect-stmts.c (vectorizable_mask_load_store, vectorizable_load): + Likewise. + (vect_gen_perm_mask_checked): New. + (vect_gen_perm_mask): Remove can_vec_perm_p check, rename to... + (vect_gen_perm_mask_any): ...this. + (perm_mask_for_reverse): Call can_vec_perm_p and + vect_gen_perm_mask_checked. + +2014-11-13 Felix Yang <felix.yang@huawei.com> + + * ipa-utils.h: Fix typo in comments. + * ipa-profile.c: Likewise. + * tree-ssa-loop-ivcanon.c: Fix typo in comments and debugging dumps. + +2014-11-13 Teresa Johnson <tejohnson@google.com> + + PR tree-optimization/63841 + * tree-ssa-strlen.c (strlen_optimize_stmt): Ignore clobbers. + +2014-11-13 Teresa Johnson <tejohnson@google.com> + + PR tree-optimization/63841 + * tree.c (initializer_zerop): A clobber does not zero initialize. + +2014-11-13 Ulrich Weigand <Ulrich.Weigand@de.ibm.com> + + * optabs.c (prepare_operand): Gracefully fail if the mode of X + does not match the operand mode expected by the insn pattern. + +2014-11-13 Richard Biener <rguenther@suse.de> + + * match.pd: Add tcc_comparison, inverted_tcc_comparison + and inverted_tcc_comparison_with_nans operator lists. + Use tcc_comparison in the truth_valued_p predicate definition. + Restrict logical_inverted_value with bit_xor to integral types. + Build a boolean true for simplifying x |^ !x because of + vector types. Implement patterns from forward_propagate_comparison + * tree-ssa-forwprop.c (forward_propagate_comparison): Remove. + (get_prop_dest_stmt): Likewise. + (pass_forwprop::execute): Do not call it. + * fold-const.c (fold_unary_loc): Remove the pattern here. + +2014-11-13 Ilya Verbin <ilya.verbin@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + + * config.gcc (*-intelmic-* | *-intelmicemul-*): Add i386/t-intelmic to + tmake_file. + (i[34567]86-*-* | x86_64-*-*): Build mkoffload$(exeext) with the + accelerator compiler. + * config/i386/intelmic-mkoffload.c: New file. + * config/i386/t-intelmic: Ditto. + +2014-11-13 Bernd Schmidt <bernds@codesourcery.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + + * common.opt (foffload, foffload-abi): New options. + * config/i386/i386.c (ix86_offload_options): New static function. + (TARGET_OFFLOAD_OPTIONS): Define. + * coretypes.h (enum offload_abi): New enum. + * doc/tm.texi: Regenerate. + * doc/tm.texi.in (TARGET_OFFLOAD_OPTIONS): Document. + * gcc.c (offload_targets): New static variable. + (handle_foffload_option): New static function. + (driver_handle_option): Handle OPT_foffload_. + (driver::maybe_putenv_OFFLOAD_TARGETS): Set OFFLOAD_TARGET_NAMES + according to offload_targets. + * hooks.c (hook_charptr_void_null): New hook. + * hooks.h (hook_charptr_void_null): Declare. + * lto-opts.c: Include lto-section-names.h. + (lto_write_options): Append options from target offload_options hook and + store them to offload_lto section. Do not store target-specific, + driver and diagnostic options in offload_lto section. + * lto-wrapper.c (merge_and_complain): Handle OPT_foffload_ and + OPT_foffload_abi_. + (append_compiler_options, append_linker_options) + (append_offload_options): New static functions. + (compile_offload_image): Add new arguments with options. + Call append_compiler_options and append_offload_options. + (compile_images_for_offload_targets): Add new arguments with options. + (find_and_merge_options): New static function. + (run_gcc): Outline options handling into the new functions: + find_and_merge_options, append_compiler_options, append_linker_options. + * opts.c (common_handle_option): Don't handle OPT_foffload_. + Forbid OPT_foffload_abi_ for non-offload compiler. + * target.def (offload_options): New target hook. + +2014-11-13 Ilya Verbin <ilya.verbin@intel.com> + Bernd Schmidt <bernds@codesourcery.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * gcc.c (spec_host_machine, accel_dir_suffix): New variables. + (process_command): Tweak path construction for the possibility + of being configured as an offload compiler. + (driver::maybe_putenv_OFFLOAD_TARGETS): New function. + (driver::main): Call maybe_putenv_OFFLOAD_TARGETS. + (driver::set_up_specs): Tweak path construction for the possibility of + being configured as an offload compiler. + * lto-wrapper.c (OFFLOAD_TARGET_NAMES_ENV): Define. + (offload_names, offloadbegin, offloadend): New static variables. + (free_array_of_ptrs, parse_env_var, access_check, compile_offload_image) + (compile_images_for_offload_targets, copy_file, find_offloadbeginend): + New static functions. + (run_gcc): Determine whether offload sections are present. If so, run + compile_images_for_offload_targets and return the names of new generated + objects to linker. If there are offload sections, but no LTO sections, + then return the copies of input objects without link-time recompilation. + +2014-11-13 Richard Biener <rguenther@suse.de> + + * genmatch.c (dt_node::gen_kids): Fix placement of break statement. + +2014-11-13 Ilya Verbin <ilya.verbin@intel.com> + Bernd Schmidt <bernds@codesourcery.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + + * Makefile.in (GTFILES): Add omp-low.h to list of GC files. + * cgraphunit.c: Include omp-low.h. + * doc/tm.texi: Regenerate. + * doc/tm.texi.in (TARGET_RECORD_OFFLOAD_SYMBOL): Document. + * gengtype.c (open_base_files): Add omp-low.h to ifiles. + * lto-cgraph.c (output_offload_tables): New function. + (input_offload_tables): Likewise. + * lto-section-in.c (lto_section_name): Add "offload_table". + * lto-section-names.h (OFFLOAD_VAR_TABLE_SECTION_NAME): Define. + (OFFLOAD_FUNC_TABLE_SECTION_NAME): Likewise. + * lto-streamer-out.c (lto_output): Call output_offload_tables. + * lto-streamer.h (lto_section_type): Add LTO_section_offload_table. + (output_offload_tables, input_offload_tables): Declare. + * omp-low.c: Include common/common-target.h and lto-section-names.h. + (offload_funcs, offload_vars): New global <tree, va_gc> vectors. + (expand_omp_target): Add child_fn into offload_funcs vector. + (add_decls_addresses_to_decl_constructor): New function. + (omp_finish_file): Likewise. + * omp-low.h (omp_finish_file, offload_funcs, offload_vars): Declare. + * target.def (record_offload_symbol): New DEFHOOK. + * toplev.c: Include omp-low.h. + (compile_file): Call omp_finish_file. + * varpool.c: Include omp-low.h. + (varpool_node::get_create): Add decl into offload_vars vector. + +2014-11-13 Ilya Verbin <ilya.verbin@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Bernd Schmidt <bernds@codesourcery.com> + + * cgraph.c: Include context.h. + (cgraph_node::create): Set node->offloadable and g->have_offload if + decl have "omp declare target" attribute. + * cgraph.h (symtab_node): Add need_lto_streaming and offloadable flags. + * cgraphunit.c: Include lto-section-names.h. + (ipa_passes): Call ipa_write_summaries if there is something to write to + OFFLOAD_SECTION_NAME_PREFIX sections. + (symbol_table::compile): Set flag_generate_lto if there is something to + offload. + Replace flag_lto with flag_generate_lto before lto_streamer_hooks_init. + * context.c (gcc::context::context): Initialize have_offload with false. + * context.h (class context): Add have_offload flag. + * ipa-inline-analysis.c (inline_generate_summary): Do not exit under + flag_generate_lto. + (inline_free_summary): Always remove hooks. + * lto-cgraph.c (referenced_from_other_partition_p): Ignore references + from non-offloadable nodes while streaming a node into offload section. + (reachable_from_other_partition_p): Likewise. + (select_what_to_stream): New function. + (compute_ltrans_boundary): Do not call + lto_set_symtab_encoder_in_partition if the node should not be streamed. + * lto-section-names.h (OFFLOAD_SECTION_NAME_PREFIX): Define. + (section_name_prefix): Declare. + * lto-streamer.c (section_name_prefix): New variable. + (lto_get_section_name): Use section_name_prefix instead of + LTO_SECTION_NAME_PREFIX. + * lto-streamer.h (select_what_to_stream): Declare. + * omp-low.c: Include context.h. + (is_targetreg_ctx): New function. + (scan_sharing_clauses): Use offloadable flag, instead of an attribute. + (create_omp_child_function, check_omp_nesting_restrictions): Use new + is_targetreg_ctx function. Replace usage of "omp declare target" + attribute with a cgraph_node flag offloadable. + (expand_omp_target): Set mark_force_output for offloadable functions. + (lower_omp_critical): Set offloadable flag for omp critical symbol. + * passes.c (ipa_write_summaries): New argument offload_lto_mode. Call + select_what_to_stream. Do not call lto_set_symtab_encoder_in_partition + if the node should not be streamed out. + * tree-pass.h (ipa_write_summaries): New bool argument. + * varpool.c: Include context.h. + (varpool_node::get_create): Set node->offloadable and g->have_offload if + decl have "omp declare target" attribute. + +2014-11-13 Bernd Schmidt <bernds@codesourcery.com> + Thomas Schwinge <thomas@codesourcery.com> + Ilya Verbin <ilya.verbin@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + + * Makefile.in (real_target_noncanonical, accel_dir_suffix) + (enable_as_accelerator): New variables substituted by configure. + (libsubdir, libexecsubdir, unlibsubdir): Tweak for the possibility of + being configured as an offload compiler. + (DRIVER_DEFINES): Pass new defines DEFAULT_REAL_TARGET_MACHINE and + ACCEL_DIR_SUFFIX. + (install-cpp, install-common, install_driver, install-gcc-ar): Do not + install for the offload compiler. + * config.in: Regenerate. + * configure: Regenerate. + * configure.ac (real_target_noncanonical, accel_dir_suffix) + (enable_as_accelerator): Compute new variables. + (ACCEL_COMPILER): Define if the compiler is built as the accel compiler. + (OFFLOAD_TARGETS): List of target names suitable for offloading. + (ENABLE_OFFLOADING): Define if list of offload targets is not empty. + * doc/install.texi (Options specification): Document + --enable-as-accelerator-for and --enable-offload-targets. + +2014-11-13 H.J. Lu <hongjiu.lu@intel.com> + + PR tree-optimization/63828 + * ipa-polymorphic-call.c (possible_placement_new): Check + POINTER_SIZE, instead of BITS_PER_WORD, for pointer size. + +2014-11-13 Eric Botcazou <ebotcazou@adacore.com> + + * doc/tm.texi.in (SELECT_CC_MODE): Update example. + (REVERSIBLE_CC_MODE): Fix example. + (REVERSE_CONDITION): Fix typo. + * doc/tm.texi: Regenerate. + +2014-11-13 Tom de Vries <tom@codesourcery.com> + + * omp-low.c (pass_data_expand_omp): Set properties_provided to + PROP_gimple_eomp. + (pass_expand_omp::gate): Remove function. Move gate expression to ... + (pass_expand_omp::execute): ... here, as new variable gate. Add early + exit if gate is false. + (pass_data pass_data_expand_omp_ssa): New pass_data. + (class pass_expand_omp_ssa): New pass. + (make_pass_expand_omp_ssa): New function. + * passes.def (pass_parallelize_loops): Use PUSH_INSERT_PASSES_WITHIN + instead of NEXT_PASS. + (pass_expand_omp_ssa): Add after pass_parallelize_loops. + * tree-parloops.c (gen_parallel_loop): Remove call to omp_expand_local. + (pass_parallelize_loops::execute): Don't do cleanups TODO_cleanup_cfg + and TODO_rebuild_alias yet. Add TODO_update_ssa. Set + cfun->omp_expand_needed. + * tree-pass.h: Add define PROP_gimple_eomp. + (make_pass_expand_omp_ssa): Declare. + +2014-11-13 Marek Polacek <polacek@redhat.com> + + * tree.h (TYPE_OVERFLOW_SANITIZED): Define. + * fold-const.c (fold_binary_loc): Use it. + * match.pd: Likewise. + +2014-11-14 Kirill Yukhin <kirill.yukhin@intel.com> + + * lra-lives.c (struct bb_data): Rename to ... + (struct bb_data_pseudos): ... this. + (initiate_live_solver): Update struct name. + +2014-11-13 Richard Biener <rguenther@suse.de> + + * match.pd: Implement conditional expression patterns. + * tree-ssa-forwprop.c (forward_propagate_into_cond): Remove + them here. + (combine_cond_exprs): Remove. + (pass_forwprop::execute): Do not call combine_cond_exprs. + * fold-const.c (fold_ternary_loc): Remove patterns here. + (pedantic_omit_one_operand_loc): Remove. + +2014-12-13 Richard Biener <rguenther@suse.de> + + PR middle-end/61559 + * match.pd: Implement bswap patterns for transforms checked by + gcc.dg/builtin-bswap-8.c. + +2014-11-13 Vladimir Makarov <vmakarov@redhat.com> + + * lra.c (lra): Switch off rematerialization pass. + +2014-11-12 Vladimir Makarov <vmakarov@redhat.com> + + * common.opt (flra-remat): New. + * opts.c (default_options_table): Add entry for flra_remat. + * timevar_def (TV_LRA_REMAT): New. + * doc/invoke.texi (-flra-remat): Add description of the new + option. + * doc/passes.texi (-flra-remat): Remove lra-equivs.c and + lra-saves.c. Add lra-remat.c. + * Makefile.in (OBJS): Add lra-remat.o. + * lra-remat.c: New file. + * lra.c: Add info about the rematerialization pass in the top + comment. + (collect_non_operand_hard_regs, add_regs_to_insn_regno_info): + Process unallocatable regs too. + (lra_constraint_new_insn_uid_start): Remove. + (lra): Add code for calling rematerialization sub-pass. + * lra-int.h (lra_constraint_new_insn_uid_start): Remove. + (lra_constrain_insn, lra_remat): New prototypes. + (lra_eliminate_regs_1): Add parameter. + * lra-lives.c (make_hard_regno_born, make_hard_regno_dead): + Process unallocatable hard regs too. + (process_bb_lives): Ditto. + * lra-spills.c (remove_pseudos): Add argument to + lra_eliminate_regs_1 call. + * lra-eliminations.c (lra_eliminate_regs_1): Add parameter. Use it + for sp offset calculation. + (lra_eliminate_regs): Add argument for lra_eliminate_regs_1 call. + (eliminate_regs_in_insn): Add parameter. Use it for sp offset + calculation. + (process_insn_for_elimination): Add argument for + eliminate_regs_in_insn call. + * lra-constraints.c (get_equiv_with_elimination): Add argument + for lra_eliminate_regs_1 call. + (process_addr_reg): Add parameter. Use it. + (process_address_1): Ditto. Add argument for process_addr_reg + call. + (process_address): Ditto. + (curr_insn_transform): Add parameter. Use it. Add argument for + process_address calls. + (lra_constrain_insn): New function. + (lra_constraints): Add argument for curr_insn_transform call. + +2014-11-13 Manuel López-Ibáñez <manu@gcc.gnu.org> + + * opts-global.c (postpone_unknown_option_warning): Fix spelling. + (print_ignored_options): Fix quoting. + * opts.c (common_handle_option): Likewise. + (set_debug_level): Likewise. + * toplev.c (process_options): Likewise. + +2014-11-12 Jakub Jelinek <jakub@redhat.com> + + PR ipa/63838 + * ipa-pure-const.c (propagate_nothrow): Walk w->indirect_calls + chain instead of node->indirect_calls. Put !can_throw into + conditions of all the loops. + +2014-11-12 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/i386.c (x86_output_mi_thunk): Use gen_rtx_REG to + set pic_offset_table_rtx. + +2014-11-12 Matthew Fortune <matthew.fortune@imgtec.com> + + * common/config/mips/mips-common.c (mips_handle_option): Ensure + that -mfp32, -mfp64 disable -mfpxx and -mfpxx disables -mfp64. + * config.gcc (--with-fp-32): New option. + (--with-odd-spreg-32): Likewise. + * config.in (HAVE_AS_DOT_MODULE): New config define. + * config/mips/mips-protos.h + (mips_secondary_memory_needed): New prototype. + (mips_hard_regno_caller_save_mode): Likewise. + * config/mips/mips.c (mips_get_reg_raw_mode): New static prototype. + (mips_get_arg_info): Assert that V2SFmode is only handled specially + with TARGET_PAIRED_SINGLE_FLOAT. + (mips_return_mode_in_fpr_p): Likewise. + (mips16_call_stub_mode_suffix): Likewise. + (mips_get_reg_raw_mode): New static function. + (mips_return_fpr_pair): O32 return values span two registers. + (mips16_build_call_stub): Likewise. + (mips_function_value_regno_p): Support both FP return registers. + (mips_output_64bit_xfer): Use mthc1 whenever TARGET_HAS_MXHC1. Add + specific cases for TARGET_FPXX to move via memory. + (mips_dwarf_register_span): For TARGET_FPXX pretend that modes larger + than UNITS_PER_FPREG 'span' one register. + (mips_dwarf_frame_reg_mode): New static function. + (mips_file_start): Switch to using .module instead of .gnu_attribute. + No longer support FP ABI 4 (-mips32r2 -mfp64), replace with FP ABI 6. + Add FP ABI 5 (-mfpxx) and FP ABI 7 (-mfp64 -mno-odd-spreg). + (mips_save_reg, mips_restore_reg): Always represent DFmode frame + slots with two CFI directives even for O32 FP64. + (mips_for_each_saved_gpr_and_fpr): Account for fixed_regs when + saving/restoring callee-saved registers. + (mips_hard_regno_mode_ok_p): Implement O32 FP64A extension. + (mips_secondary_memory_needed): New function. + (mips_option_override): ABI check for TARGET_FLOATXX. Disable + odd-numbered single-precision registers when using TARGET_FLOATXX. + Implement -modd-spreg and defaults. + (mips_conditional_register_usage): Redefine O32 FP64 to match O32 FP32 + callee-saved behaviour. + (mips_hard_regno_caller_save_mode): Implement. + (TARGET_GET_RAW_RESULT_MODE): Define target hook. + (TARGET_GET_RAW_ARG_MODE): Define target hook. + (TARGET_DWARF_FRAME_REG_MODE): Define target hook. + * config/mips/mips.h (TARGET_FLOAT32): New macro. + (TARGET_O32_FP64A_ABI): Likewise. + (TARGET_CPU_CPP_BUILTINS): TARGET_FPXX is __mips_fpr==0. Add + _MIPS_SPFPSET builtin define. + (MIPS_FPXX_OPTION_SPEC): New macro. + (OPTION_DEFAULT_SPECS): Pass through --with-fp-32=* to -mfp and + --with-odd-spreg-32=* to -m[no-]odd-spreg. + (ISA_HAS_ODD_SPREG): New macro. + (ISA_HAS_MXHC1): True for anything other than -mfp32. + (ASM_SPEC): Pass through mfpxx, mfp64, -mno-odd-spreg and -modd-spreg. + (MIN_FPRS_PER_FMT): Redefine in terms of TARGET_ODD_SPREG. + (HARD_REGNO_CALLER_SAVE_MODE): Define. Implement O32 FPXX extension + (HARD_REGNO_CALL_PART_CLOBBERED): Likewise. + (SECONDARY_MEMORY_NEEDED): Likewise. + (FUNCTION_ARG_REGNO_P): Update for O32 FPXX and FP64 extensions. + * config/mips/mips.md (define_attr enabled): Implement O32 FPXX and + FP64A ABI extensions. + (move_doubleword_fpr<mode>): Use ISA_HAS_MXHC1 instead of + TARGET_FLOAT64. + * config/mips/mips.opt (mfpxx): New target option. + (modd-spreg): Likewise. + * config/mips/mti-elf.h (DRIVER_SELF_SPECS): Infer FP ABI from arch. + * config/mips/mti-linux.h (DRIVER_SELF_SPECS): Likewise and remove + fp64 sysroot. + * config/mips/t-mti-elf: Remove fp64 multilib. + * config/mips/t-mti-linux: Likewise. + * configure.ac: Detect .module support. + * configure: Regenerate. + * doc/invoke.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg option. + * doc/install.texi (--with-fp-32, --with-odd-spreg-32): Document new + options. + +2014-11-12 H.J. Lu <hongjiu.lu@intel.com> + + PR target/63815 + * config/i386/i386.c (ix86_init_large_pic_reg): New. Extracted + from ... + (ix86_init_pic_reg): Here. Use ix86_init_large_pic_reg. + (x86_output_mi_thunk): Set PIC register to %r11. Call + ix86_init_large_pic_reg to initialize PIC register. + +2014-11-12 Kai Tietz <ktietz@redhat.com> + + * sdbout.c (sdbout_symbol): Eliminate register only + if decl isn't a global variable. + +2014-11-12 Alan Lawrence <alan.lawrence@arm.com> + + * config/aarch64/aarch64.c (aarch64_simd_lane_bounds): Display indices. + + * config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers): Add + qualifier_lane_index. + (aarch64_types_ternop_lane_qualifiers, TYPES_TERNOP_LANE): Rename to... + (aarch64_types_quadop_lane_qualifiers, TYPES_QUADOP_LANE): ...these. + (aarch64_types_ternop_lane_qualifiers, TYPES_TERNOP_LANE): New. + + (aarch64_types_getlane_qualifiers): Rename to... + (aarch64_types_binop_imm_qualifiers): ...this. + (TYPES_SHIFTIMM): Follow renaming. + (TYPES_GETLANE): Rename to... + (TYPE_GETREG): ...this. + + (aarch64_types_setlane_qualifiers): Rename to... + (aarch64_type_ternop_imm_qualifiers): ...this. + (TYPES_SHIFTINSERT, TYPES_SHIFTACC): Follow renaming. + (TYPES_SETLANE): Follow renaming above, and rename self to... + (TYPE_SETREG): ...this. + + (enum builtin_simd_arg): Add SIMD_ARG_LANE_INDEX. + (aarch64_simd_expand_args): Add range check and endianness-flip. + + (aarch64_simd_expand_builtin): Add mapping for qualifier_lane_index. + + * config/aarch64/aarch64-simd.md + (aarch64_sq<r>dmulh_lane<mode>_internal *2): Rename to... + (aarch64_sq<r>dmulh_lane<mode>): ...this, and remove lane bounds check. + (aarch64_sqdmulh_lane<mode> *2, aarch64_sqrdmulh_lane<mode> *2): Delete. + + (aarch64_sq<r>dmulh_laneq<mode>_internal): Rename to... + (aarch64_sq<r>dmulh_lane<mode>): ...this. + + (aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal *2): Rename to... + (aarch64_sqdml<SBINQOPS:as>l_lane<mode>): ...this. + + (aarch64_sqdml<SBINQOPS:as>l_laneq<mode>_internal *2): Rename to... + (aarch64_sqdml<SBINQOPS:as>l_laneq<mode>): ...this. + + (aarch64_sqdmull_lane<mode>_internal *2): Rename to... + (aarch64_sqdmull_lane<mode>): ...this. + + (aarch64_sqdmull_laneq<mode>_internal *2): Rename to... + (aarch64_sqdmull_laneq<mode>): ...this. + + (aarch64_sqdmulh_laneq<mode>, aarch64_sqrdmulh_laneq<mode>, + (aarch64_sqdmlal_lane<mode>, aarch64_sqdmlal_laneq<mode>, + aarch64_sqdmlsl_lane<mode>, aarch64_sqdmlsl_laneq<mode>, + aarch64_sqdmull_lane<mode>, aarch64_sqdmull_laneq<mode>): Delete. + + (aarch64_sqdmlal2_lane<mode>, aarch64_sqdmlal2_laneq<mode>, + aarch64_sqdmlsl2_lane<mode>, aarch64_sqdmlsl2_laneq<mode>, + aarch64_sqdmull2_lane<mode>, aarch64_sqdmull2_laneq<mode>): Remove + bounds check and lane flip. + + * config/aarch64/aarch64-simd-builtins.def (be_checked_get_lane, + get_dregoi, get_dregci, getdregxi, get_qregoi,get_qregci, get_qregxi, + set_qregoi, set_qregci, set_qregxi): Change qualifiers to GETREG. + + (sqdmlal_lane, sqdmlsl_lane, sqdmlal_laneq, sqdmlsl_laneq, + sqdmlal2_lane, sqdmlsl2_lane, sqdmlal2_laneq, sqdmlsl2_laneq): Follow + renaming of TERNOP_LANE to QUADOP_LANE. + + (sqdmull_lane, sqdmull_laneq, sqdmull2_lane, sqdmull2_laneq, + sqdmulh_lane, sqdmulh_laneq, sqrdmulh_lane, sqrdmulh_laneq): Set + qualifiers to TERNOP_LANE. + +2014-11-12 Tobias Burnus <burnus@net-b.de> + + * Makefile.in (CLOOGLIBS, CLOOGINC): Remove. + * configure.ac: Ditto. + * graphite-interchange.c: Remove HAVE_CLOOG block. + * config.in: Regenerate. + * configure: Regenerate. + +2014-11-12 Jiong Wang <jiong.wang@arm.com> + + * config/aarch64/aarch64.h (CALL_USED_REGISTERS): Mark LR as + caller-save. + (EPILOGUE_USES): Guard the check by epilogue_completed. + * config/aarch64/aarch64.c (aarch64_layout_frame): Explictly check for + LR. + (aarch64_can_eliminate): Check LR_REGNUM liveness. + +2014-11-12 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/arm/arm.c (*<arith_shift_insn>_shiftsi): Fix typo. + +2014-11-12 Marek Polacek <polacek@redhat.com> + + * fold-const.c (fold_binary_loc): Don't fold if the result + is undefined. + * match.pd (A + (-B) -> A - B, A - (-B) -> A + B, + -(-A) -> A): Likewise. + +2014-11-12 Richard Biener <rguenther@suse.de> + + Merge from match-and-simplify branch + 2014-11-04 Prathamesh Kulkarni <bilbotheelffriend@gmail.com> + + * genmatch.c (user_id): Add new member is_oper_list. + (user_id::user_id): Add new default argument. + (parser::parse_operator_list): New function. + (parser::parse_for): Allow operator-list. + (parser::parse_pattern): Call parser::parse_operator_list. + (parser::parse_operation): Reject operator-list. + * match-builtin.pd: Define operator lists POWs, CBRTs and SQRTs. + + 2014-10-31 Prathamesh Kulkarni <bilbotheelffriend@gmail.com> + + * genmatch.c (parser::parse_c_expr): Mark user-defined ops as used. + + 2014-10-30 Prathamesh Kulkarni <bilbotheelffriend@gmail.com> + + * genmatch.c (parser::parse_op): Check if predicate is used in + result operand. + + 2014-10-29 Prathamesh Kulkarni <bilbotheelffriend@gmail.com> + + * genmatch.c (parser::parse_for): Make sure to have a valid + token to report errors at. + + 2014-10-28 Prathamesh Kulkarni <bilbotheelffriend@gmail.com> + + * genmatch.c (parser): Add new member parsing_match_operand. + (parser::parse_operation): Check for conditional convert in result + operand. + (parser::parse_expr): Check for commutative operator in result operand. + Check for :type in match operand. + (parser::parse_simplify): Set/unset parsing_match_operand. + (parser::parser): Initialize parsing_match_operand. + + 2014-10-28 Richard Biener <rguenther@suse.de> + + * genmatch.c (parser::parse_for): Properly check for already + defined operators. + + 2014-10-28 Prathamesh Kulkarni <bilbotheelffriend@gmail.com> + + * genmatch.c (error_cb): Adjust for printing warnings. + (warning_at): New function. + (user_id): Add new member used. + (get_operator): Mark user_id as used. + (parse_for): Warn for unused operators. + +2014-11-12 Richard Biener <rguenther@suse.de> + + * match.pd: Implement simple complex operations cancelling. + * fold-const.c (fold_unary_loc): Remove them here. + +2014-11-12 Joseph Myers <joseph@codesourcery.com> + + * cppbuiltin.c (define_builtin_macros_for_compilation_flags): + Define __NO_MATH_ERRNO__ if -fno-math-errno. + * doc/cpp.texi (__NO_MATH_ERRNO__): Document predefined macro. + +2014-11-12 Richard Biener <rguenther@suse.de> + + * genmatch.c (::gen_transform): Add capture_info and + expand_compares arguments. + (struct expr): Add is_generic flag. + (lower_cond): New functions lowering [VEC_]COND_EXPR + conditions to a GENERIC and a GIMPLE variant. + (lower): Call lower_cond. + (cmp_operand): Also compare the is_generic flag. + (capture_info::cinfo): Add cond_expr_cond_p flag. + (capture_info::capture_info): Pass down whether the + expression argument is a COND_EXPR condition. + (capture_info::walk_match): Likewise, mark captures + capturing COND_EXPR conditions with cond_expr_cond_p. + (expr::gen_transform): Pass down whether we need to + expand compares from COND_EXPR conditions. + (capture::gen_transform): Expand compares substituted + from COND_EXPR conditions into non-COND_EXPR conditions. + (dt_operand::gen_gimple_expr): Handle explicitely marked + GENERIC expressions as generic. + (dt_simplify::gen): Pass whether we need to expand + conditions to gen_transform. Handle capture results + which are from COND_EXPR conditions. + (main): Pass gimple flag down to lower. + +2014-11-12 Jakub Jelinek <jakub@redhat.com> + + PR c/59708 + * builtin-attrs.def (ATTR_NOTHROW_TYPEGENERIC_LEAF): New attribute. + * builtins.c (fold_builtin_arith_overflow): New function. + (fold_builtin_3): Use it. + * builtins.def (BUILT_IN_ADD_OVERFLOW, BUILT_IN_SUB_OVERFLOW, + BUILT_IN_MUL_OVERFLOW, BUILT_IN_SADD_OVERFLOW, BUILT_IN_SADDL_OVERFLOW, + BUILT_IN_SADDLL_OVERFLOW, BUILT_IN_SSUB_OVERFLOW, + BUILT_IN_SSUBL_OVERFLOW, BUILT_IN_SSUBLL_OVERFLOW, + BUILT_IN_SMUL_OVERFLOW, BUILT_IN_SMULL_OVERFLOW, + BUILT_IN_SMULLL_OVERFLOW, BUILT_IN_UADDL_OVERFLOW, + BUILT_IN_UADDLL_OVERFLOW, BUILT_IN_USUB_OVERFLOW, + BUILT_IN_USUBL_OVERFLOW, BUILT_IN_USUBLL_OVERFLOW, + BUILT_IN_UMUL_OVERFLOW, BUILT_IN_UMULL_OVERFLOW, + BUILT_IN_UMULLL_OVERFLOW): New built-in functions. + * builtin-types.def (BT_PTR_UINT, BT_PTR_ULONG, BT_PTR_LONGLONG, + BT_FN_BOOL_INT_INT_INTPTR, BT_FN_BOOL_LONG_LONG_LONGPTR, + BT_FN_BOOL_LONGLONG_LONGLONG_LONGLONGPTR, BT_FN_BOOL_UINT_UINT_UINTPTR, + BT_FN_BOOL_ULONG_ULONG_ULONGPTR, + BT_FN_BOOL_ULONGLONG_ULONGLONG_ULONGLONGPTR, BT_FN_BOOL_VAR): New. + * expr.c (write_complex_part): Remove prototype, no longer static. + * expr.h (write_complex_part): New prototype. + * function.c (aggregate_value_p): For internal functions return 0. + * gimple-fold.c (arith_overflowed_p): New functions. + (gimple_fold_call): Fold {ADD,SUB,MUL}_OVERFLOW internal calls. + * gimple-fold.h (arith_overflowed_p): New prototype. + * tree-ssa-dce.c: Include tree-ssa-propagate.h and gimple-fold.h. + (find_non_realpart_uses, maybe_optimize_arith_overflow): New + functions. + (eliminate_unnecessary_stmts): Transform {ADD,SUB,MUL}_OVERFLOW + into COMPLEX_CST/COMPLEX_EXPR if IMAGPART_EXPR of the result is + never used. + * gimplify.c (gimplify_call_expr): Handle gimplification of + internal calls with lhs. + * internal-fn.c (get_range_pos_neg, get_min_precision, + expand_arith_overflow_result_store): New functions. + (ubsan_expand_si_overflow_addsub_check): Renamed to ... + (expand_addsub_overflow): ... this. Add LOC, LHS, ARG0, ARG1, + UNSR_P, UNS0_P, UNS1_P, IS_UBSAN arguments, remove STMT argument. + Handle ADD_OVERFLOW and SUB_OVERFLOW expansion. + (ubsan_expand_si_overflow_neg_check): Renamed to ... + (expand_neg_overflow): ... this. Add LOC, LHS, ARG1, IS_UBSAN + arguments, remove STMT argument. Handle SUB_OVERFLOW with + 0 as first argument expansion. + (ubsan_expand_si_overflow_mul_check): Renamed to ... + (expand_mul_overflow): ... this. Add LOC, LHS, ARG0, ARG1, + UNSR_P, UNS0_P, UNS1_P, IS_UBSAN arguments, remove STMT argument. + Handle MUL_OVERFLOW expansion. + (expand_UBSAN_CHECK_ADD): Use expand_addsub_overflow, prepare + arguments for it. + (expand_UBSAN_CHECK_SUB): Use expand_addsub_overflow or + expand_neg_overflow, prepare arguments for it. + (expand_UBSAN_CHECK_MUL): Use expand_mul_overflow, prepare arguments + for it. + (expand_arith_overflow, expand_ADD_OVERFLOW, expand_SUB_OVERFLOW, + expand_MUL_OVERFLOW): New functions. + * internal-fn.def (ADD_OVERFLOW, SUB_OVERFLOW, MUL_OVERFLOW): New + internal functions. + * tree-vrp.c (check_for_binary_op_overflow): New function. + (extract_range_basic): Handle {REAL,IMAG}PART_EXPR if the operand + is SSA_NAME set by {ADD,SUB,MUL}_OVERFLOW internal functions. + (simplify_internal_call_using_ranges): Handle {ADD,SUB,MUL}_OVERFLOW + internal functions. + * optabs.def (umulv4_optab): New optab. + * config/i386/i386.md (umulv<mode>4, <u>mulvqi4): New define_expands. + (*umulv<mode>4, *<u>mulvqi4): New define_insns. + * doc/extend.texi (Integer Overflow Builtins): Document + __builtin_*_overflow. + +2014-11-12 Richard Biener <rguenther@suse.de> + + * genmatch.c (capture_info::capture_info): Add missing + COND_EXPR handling. + (capture_info::walk_match): Fix COND_EXPR handling. + (capture_info::walk_result): Likewise. + +2014-11-12 Richard Biener <rguenther@suse.de> + + PR middle-end/63821 + * match.pd: Add missing conversion to the -(T)-X pattern. + +2014-11-12 Richard Biener <rguenther@suse.de> + + PR bootstrap/63819 + * hash-table.h: Include ggc.h also for generator programs. + * genmatch.c (ggc_internal_cleared_alloc): Properly define + using MEM_STAT_DECL instead of CXX_MEM_STAT_INFO. + +2014-11-12 Thomas Preud'homme <thomas.preudhomme@arm.com> + + PR tree-optimization/63761 + * tree-ssa-math-opts.c (bswap_replace): Construct gsi from cur_stmt + rather than taking it as a parameter. Add some comments to explain the + gsi_move_before in case of load and why canonicalization of bswap into + a rotation is only done for 16bit values. + (pass_optimize_bswap::execute): Adapt for loop via gsi to make gsi + refer to the statement just before cur_stmt. Ignore 16bit bswap that + are already in canonical form. Adapt bswap_replace to removal of its + gsi parameter. + +2014-11-12 Richard Sandiford <richard.sandiford@arm.com> + + * rtl.h (rtx_function, for_each_rtx, for_each_rtx_in_insn): Delete. + * rtlanal.c (non_rtx_starting_operands, for_each_rtx_1, for_each_rtx): + (for_each_rtx_in_insn): Delete. + (init_rtlanal): Remove initialization of non_rtx_starting_operands. + * df-core.c: Remove reference to for_each_rtx in comment. + +2014-11-12 Tejas Belagod <tejas.belagod@arm.com> + + * Makefile.in (TEXI_GCC_FILES): Remove arm-acle-intrinsics.texi, + arm-neon-intrinsics.texi, aarch64-acle-intrinsics.texi. + * doc/aarch64-acle-intrinsics.texi: Remove. + * doc/arm-acle-intrinsics.texi: Remove. + * doc/arm-neon-intrinsics.texi: Remove. + * doc/extend.texi: Consolidate sections AArch64 intrinsics, + ARM NEON Intrinsics, ARM ACLE Intrinsics into one ARM C Language + Extension section. Add references to public ACLE specification. + +2014-11-11 Patrick Palka <ppalka@gcc.gnu.org> + + * tree-vrp.c (register_edge_assert_for_2): Change return type to + void and adjust accordingly. + (register_edge_assert_for_1): Likewise. + (register_edge_assert_for): Likewise. + (find_conditional_asserts): Likewise. + (find_switch_asserts): Likewise. + (find_assert_locations_1): Likewise. + (find_assert_locations): Likewise. + (insert_range_insertions): Inspect the need_assert_for bitmap. + +2014-11-11 Andrew Pinski <apinski@cavium.com> + + Bug target/61997 + * config.gcc (aarch64*-*-*): Set target_gtfiles to include + aarch64-builtins.c. + * config/aarch64/aarch64-builtins.c: Include gt-aarch64-builtins.h + at the end of the file. + +2014-11-11 Anthony Brandon <anthony.brandon@gmail.com> + Manuel López-Ibáñez <manu@gcc.gnu.org> + + PR driver/36312 + * diagnostic-core.h: Add prototype for fatal_error. + * diagnostic.c (fatal_error): New function fatal_error. + * gcc.c (store_arg): Remove have_o_argbuf_index. + (process_command): Check if input and output files are the same. + * toplev.c (init_asm_output): Check if input and output files are + the same. + +2014-11-11 Eric Botcazou <ebotcazou@adacore.com> + + * reorg.c (fill_slots_from_thread): Do not copy frame-related insns. + +2014-11-11 Eric Botcazou <ebotcazou@adacore.com> + + PR target/61535 + * config/sparc/sparc.c (function_arg_vector_value): Deal with vectors + smaller than 8 bytes. + (sparc_function_arg_1): Tweak. + (sparc_function_value_1): Tweak. + +2014-11-11 David Malcolm <dmalcolm@redhat.com> + + * ChangeLog.jit: New. + * Makefile.in (doc_build_sys): New variable, set to "sphinx" if + sphinx is installed, falling back to "texinfo" otherwise. + (FULL_DRIVER_NAME): New variable, adapted from the + install-driver target. New target, a symlink within the builddir, + linked to "xgcc", for use when running the JIT library from the + builddir. + (MOSTLYCLEANFILES): Add FULL_DRIVER_NAME. + (install-driver): Use $(FULL_DRIVER_NAME) rather than spelling it + out. + * configure.ac (doc_build_sys): New variable, set to "sphinx" if + sphinx is installed, falling back to "texinfo" otherwise. + (GCC_DRIVER_NAME): Generate a gcc-driver-name.h file containing + GCC_DRIVER_NAME for the benefit of jit/internal-api.c. + * configure: Regenerate. + * doc/install.texi (--enable-host-shared): Specify that this is + required when building libgccjit. + (Tools/packages necessary for modifying GCC): Add Sphinx. + * timevar.def (TV_JIT_REPLAY): New. + (TV_ASSEMBLE): New. + (TV_LINK): New. + (TV_LOAD): New. + +2014-11-11 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> + + PR target/63610 + * configure: Regenerate. + +2014-11-11 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-simd.md + (aarch64_simd_bsl<mode>_internal): Remove float cases, canonicalize. + (aarch64_simd_bsl<mode>): Add gen_lowpart expressions where we + are punning between float vectors and integer vectors. + +2014-11-11 Uros Bizjak <ubizjak@gmail.com> + + * config/alpha/alpha.c (alpha_emit_conditional_branch): Replace + open-coded swap with std::swap to swap values. + (alpha_emit_setcc): Ditto. + (alpha_emit_conditional_move): Ditto. + (alpha_split_tmode_pair): Ditto. + +2014-11-11 Evgeny Stupachenko <evstupac@gmail.com> + + * tree-vect-data-refs.c (vect_shift_permute_load_chain): Extend shift + permutations on power of 2 cases. + +2014-11-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.h (MACHMODE): Remove 'enum' keyword. + (CUMULATIVE_ARGS): Guard on !defined(USED_FOR_TARGET). + +2014-11-11 Richard Biener <rguenther@suse.de> + + * tree-core.h (pedantic_lvalues): Remove. + * fold-const.c (pedantic_lvalues): Likewise. + (pedantic_non_lvalue_loc): Remove conditional non_lvalue_loc call. + +2014-11-11 Martin Liska <mliska@suse.cz> + + PR ipa/63622 + PR ipa/63795 + * ipa-icf.c (sem_function::merge): Add new target symbol alias + support guard. + (sem_variable::merge): Likewise. + * ipa-icf.h (target_supports_symbol_aliases_p): New function. + +2014-11-11 Richard Biener <rguenther@suse.de> + + * match.pd: Implement patterns from associate_plusminus + and factor in differences from the fold-const.c implementation. + * fold-const.c (fold_binary_loc): Remove patterns here. + * tree-ssa-forwprop.c (associate_plusminus): Remove. + (pass_forwprop::execute): Don't call it. + * tree.c (tree_nop_conversion_p): New function, factored + from tree_nop_conversion. + * tree.h (tree_nop_conversion_p): Declare. + +2014-11-11 Uros Bizjak <ubizjak@gmail.com> + + * system.h: Include algorithm and utility. + * rtl.h: Do not include utility here. + * wide-int.h: Ditto. + * tree-vect-data-refs.c (swap): Remove template. + (vect_prune_runtime_alias_test_list): Use std::swap instead of swap. + +2014-11-11 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> + + PR bootstrap/63699 + PR bootstrap/63750 + * system.h: Include <string> before "safe-ctype.h" + * wide-int.h (wi::smin, wi::smax, wi::umin, wi::umax): Prefix + calls to min/max with wi namespace. + * ipa-chkp.c: Don't include <string>. + +2014-11-11 Terry Guo <terry.guo@arm.com> + + * doc/invoke.texi (-masm-syntax-unified): Reword and fix typo. + * config/arm/thumb1.md (*thumb_mulsi3): Use movs to move low + registers. + (*thumb1_movhf): Likewise. + +2014-11-11 Uros Bizjak <ubizjak@gmail.com> + + * sreal.c (sreal::to_int): Use INTTYPE_MAXIMUM (int64_t) + instead of INT64_MAX. + +2014-11-11 Tobias Burnus <burnus@net-b.de> + + * doc/install.texi (Prerequisites): Remove CLooG. + +2014-11-10 Trevor Saunders <tsaunders@mozilla.com> + + * ipa-inline.c (edge_badness): Adjust. + (inline_small_functions): Likewise. + * predict.c (propagate_freq): Likewise. + (estimate_bb_frequencies): Likewise. + * sreal.c (sreal::dump): Rename from dump_sreal. + (debug): Adjust. + (copy): Remove function. + (sreal::shift_right): Rename from sreal_sift_right. + (sreal::normalize): Rename from normalize. + (sreal_init): Remove function. + (sreal::to_int): Rename from sreal_to_int. + (sreal_compare): Remove function. + (sreal::operator+): Rename from sreal_add. + (sreal::operator-): Rename from sreal_sub. + (sreal::operator*): Rename from sreal_mul. + (sreal::operator/): Rename from sreal_div. + * sreal.h (class sreal): Adjust. + (inline sreal &operator+=): New operator. + (inline sreal &operator-=): Likewise. + (inline sreal &operator/=): Likewise. + (inline sreal &operator*=): Likewise. + (inline bool operator!=): Likewise. + (inline bool operator>): Likewise. + (inline bool operator<=): Likewise. + (inline bool operator>=): Likewise. + +2014-11-11 Bin Cheng <bin.cheng@arm.com> + + * sched-deps.c (sched_analyze_1): Check pending list if it is not + less than MAX_PENDING_LIST_LENGTH. + (sched_analyze_2, sched_analyze_insn, deps_analyze_insn): Ditto. + +2014-11-11 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/i386.c (ix86_decompose_address): Replace open-coded + swap with std::swap to swap values. + (ix86_fixup_binary_operands): Ditto. + (ix86_binary_operator_ok): Ditto. + (ix86_prepare_fp_compare_args): Ditto. + (ix86_expand_branch): Ditto. + (ix86_expand_carry_flag_compare): Ditto. + (ix86_expand_int_movcc): Ditto. + (ix86_prepare_sse_fp_compare_args): Ditto. + (ix86_expand_sse_fp_minmax): Ditto. + (ix86_expand_int_vcond): Ditto. + (ix86_split_long_move): Ditto. + (ix86_expand_sse_comi): Ditto. + (ix86_expand_sse_compare_and_jump): Ditto. + (ix86_expand_sse_compare_mask): Ditto. + * config/i386/i386.md (*add<mode>_1): Ditto. + (addsi_1_zext): Ditto. + (*addhi_1): Ditto. + (*addqi_1): Ditto. + (*add<mode>_2): Ditto. + (*addsi_2_zext): Ditto. + (*add<mode>_3): Ditto. + (*addsi_3_zext): Ditto. + (*add<mode>_5): Ditto. + (absneg splitter): Ditto. + +2014-11-11 Uros Bizjak <ubizjak@gmail.com> + + Revert: + 2014-10-31 Uros Bizjak <ubizjak@gmail.com> + + PR target/63620 + * config/i386/i386-protos.h (ix86_use_pseudo_pic_reg): Declare. + * config/i386/i386.c (ix86_use_pseudo_pic_reg): Export. + * config/i386/i386.md (*pushtf): Allow only CONST_DOUBLEs that won't + be reloaded through memory. + (*pushxf): Ditto. + (*pushdf): Ditto. + +2014-11-11 Jakub Jelinek <jakub@redhat.com> + Martin Liska <mliska@suse.cz> + + * ipa-icf-gimple.c (func_checker::compare_bb): Fix comment typo. + (func_checker::compare_gimple_call): Compare gimple_call_fn, + gimple_call_chain, gimple_call_fntype and call flags. + +2014-11-10 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/63620 + PR rtl-optimization/63799 + * lra-lives.c (process_bb_lives): Do not delete EH_REGION, trapped + and setting PIC pseudo insns. + (lra_create_live_ranges): Fix the typo. + +2014-11-10 Patrick Palka <ppalka@gcc.gnu.org> + + PR middle-end/63748 + * tree-ssa-propagate.c (may_propagate_copy): Allow propagating + SSA copies whose source and destination names both occur in + abnormal PHIs. + +2014-11-10 Roman Gareev <gareevroman@gmail.com> + + * Makefile.in: Remove the compilation of graphite-clast-to-gimple.o. + * common.opt: Remove using of fgraphite-code-generator flag. + * flag-types.h: Likewise. + * graphite.c: Remove using of CLooG. + * graphite-blocking.c: Likewise. + * graphite-dependences.c: Likewise. + * graphite-poly.c: Likewise. + * graphite-poly.h: Likewise. + * graphite-scop-detection.c: Likewise. + * graphite-sese-to-poly.c: Likewise. + * graphite-clast-to-gimple.c: Removed. + * graphite-clast-to-gimple.h: Likewise. + * graphite-htab.h: Likewise. + +2014-11-10 Paolo Carlini <paolo.carlini@oracle.com> + + * doc/invoke.texi ([-Wshift-count-negative, -Wshift-count-overflow]): + Add. + +2014-11-10 Richard Sandiford <richard.sandiford@arm.com> + + * config/frv/frv.c (frv_io_handle_use_1): Delete. + (frv_io_handle_use): Use find_all_hard_regs. + +2014-11-10 Richard Sandiford <richard.sandiford@arm.com> + + * config/frv/frv.c (frv_registers_conflict_p_1): Take an rtx rather + than an rtx *. Take the regstate_t directly rather than via a void *. + Return a bool rather than an int. Iterate over all subrtxes here. + (frv_registers_conflict_p): Update accordingly. + +2014-11-10 Richard Sandiford <richard.sandiford@arm.com> + + * config/frv/frv.c: Include rtl-iter.h. + (frv_acc_group_1): Delete. + (frv_acc_group): Use FOR_EACH_SUBRTX. + +2014-11-10 Richard Sandiford <richard.sandiford@arm.com> + + * config/frv/frv.c: Move include of rtl.h after hard-reg-set.h. + (frv_clear_registers_used): Delete. + (frv_ifcvt_modify_tests): Use find_all_hard_regs. + +2014-11-10 Jan Hubicka <hubicka@ucw.cz> + + PR bootstrap/63573 + * calls.c (initialize_argument_information): When emitting thunk call + use original memory placement of the argument. + +2014-11-10 Renlin Li <renlin.li@arm.com> + + PR middle-end/61529 + * tree-ssa-threadupdate.c (compute_path_counts): Bound path_in_freq. + +2014-11-10 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * expmed.c (expand_shift_1): Expand 8 bit rotate of 16 bit value to + bswaphi if available. + +2014-11-10 Bernd Schmidt <bernds@codesourcery.com> + + * config/nvptx/nvptx.c: New file. + * config/nvptx/nvptx.h: New file. + * config/nvptx/nvptx-protos.h: New file. + * config/nvptx/nvptx.md: New file. + * config/nvptx/t-nvptx: New file. + * config/nvptx/nvptx.opt: New file. + * common/config/nvptx/nvptx-common.c: New file. + * config.gcc: Handle nvptx-*-*. + +2014-11-10 Richard Biener <rguenther@suse.de> + + * tree-ssa-operands.c (finalize_ssa_uses): Properly put + released operands on the free list. + +2014-11-10 Richard Biener <rguenther@suse.de> + + * match.pd: Implement pattern from simplify_mult. + * tree-ssa-forwprop.c (simplify_mult): Remove. + (pass_forwprop::execute): Do not call simplify_mult. + +2014-11-10 Richard Biener <rguenther@suse.de> + + PR tree-optimization/63800 + * tree-ssa-pre.c (eliminate_push_avail): Push in a way so + we can restore the previous availability in after_dom_children. + (eliminate_dom_walker::after_dom_children): Restore + previous availability. + +2014-11-10 Richard Biener <rguenther@suse.de> + + PR middle-end/63798 + * expr.c (expand_expr_real_2): When expanding FMA_EXPRs + properly treat the embedded multiplication as commutative + when looking for feeding negates. + +2014-11-10 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/avr/avr.h (CPLUSPLUS_CPP_SPEC): Define. + +2014-11-10 Martin Liska <mliska@suse.cz> + + * gcc.dg/tree-ssa/ldist-19.c: ICF is disabled + for the test because of default char signedness + on powerpc64 target. + +2014-11-10 Richard Biener <rguenther@suse.de> + + * match.pd: Implement pattern from simplify_conversion_from_bitmask. + * tree-ssa-forwprop.c (simplify_conversion_from_bitmask): Remove. + (pass_forwprop::execute): Do not call simplify_conversion_from_bitmask. + +2014-11-10 Richard Biener <rguenther@suse.de> + + * match.pd: Move rest of the conversion combining patterns + from tree-ssa-forwprop.c. + * tree-ssa-forwprop.c (combine_conversions): Remove. + (pass_forwprop::execute): Do not call it. + +2014-11-10 Eric Botcazou <ebotcazou@adacore.com> + + * gimple-low.c (lower_function_body): Clear the location of the first + inserted representative return if it also fills in for the fallthru. + +2014-11-10 Yuri Rumyantsev <ysrumyan@gmail.com> + + * tree-if-conv.c (add_to_predicate_list): Check unconditionally + that bb is always executed to early exit. Use predicate of + cd-equivalent block for join blocks if it exists. + (if_convertible_loop_p_1): Recompute POST_DOMINATOR tree. + (tree_if_conversion): Free post-dominance information. + +2014-11-09 Jason Merrill <jason@redhat.com> + + * config/i386/avx512vldqintrin.h (_mm256_broadcast_f32x2): __mmask8. + * config/i386/avx512vlintrin.h (_mm256_mask_cvtepi32_storeu_epi16) + (_mm_mask_cvtusepi32_storeu_epi16) + (_mm_mask_cvtsepi64_storeu_epi32): Return void. + +2014-11-09 Joern Rennecke <joern.rennecke@embecosm.com> + + * config/avr/predicates.md (low_io_address_operand): Fix typo. + +2014-11-09 Vladimir Makarov <vmakarov@redhat.com> + + PR rtl-optimization/63620 + * lra-constraints.c (substitute_pseudo): Add prefix lra_ to the + name. Move to lra.c. Make it external. + (substitute_pseudo_within_insn): Ditto. + (inherit_reload_reg, split_reg, remove_inheritance_pseudos): Use + the new names. + (undo_optional_reloads): Ditto. + * lra-int.h (lra_dump_bitmap_with_title, lra_substitute_pseudo): + New prototypes. + (lra_substitute_pseudo_within_insn): Ditto. + * lra-lives.c (bb_killed_pseudos, bb_gen_pseudos): New. + (mark_regno_live): Add parameter. Update bb_gen_pseudos. + (mark_regno_dead): Add parameter. Update bb_gen_pseudos and + bb_killed_pseudos. + (struct bb_data, bb_data_t, bb_data): New. + (get_bb_data, get_bb_data_by_index): Ditto. + (all_hard_regs_bitmap): New. + (live_trans_fun, live_con_fun_0, live_con_fun_n, all_blocks): New. + (initiate_live_solver, finish_live_solver): New. + (process_bb_lives): Change return type. Add code updating local + live data and removing dead insns. Pass new argument to + mark_regno_live and mark_regno_dead. Check changing bb pseudo + life info. Return the result. + (lra_create_live_ranges): Add code to do global pseudo live + analysis. + (lra_live_ranges_init): Call initiate_live_solver. + (lra_live_ranges_finish): Call finish_live_solver. + * lra.c (lra_dump_bitmap_with_title): New. + (lra_substitute_pseudo, lra_substitute_pseudo_within_insn): Move + from lra-constraints.c. + +2014-11-09 Richard Biener <rguenther@suse.de> + + * match.pd: Add patterns convering two conversions in a row + from fold-const.c. + * fold-const.c (fold_unary_loc): Remove them here. + * tree-ssa-forwprop.c (combine_conversions): Likewise. + * genmatch.c (dt_node::gen_kids): Check whether we may + follow SSA use-def chains. + +2014-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * config/aarch64/aarch64.c: Include rtl-iter.h. + (aarch64_tls_operand_p_1): Delete. + (aarch64_tls_operand_p): Use FOR_EACH_SUBRTX. + +2014-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * config/arm/arm.c (arm_note_pic_base): Delete. + (arm_cannot_copy_insn_p): Use FOR_EACH_SUBRTX. + +2014-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * config/arm/arm.c: Include rtl-iter.h. + (arm_tls_referenced_p_1): Delete. + (arm_tls_referenced_p): Use FOR_EACH_SUBRTX. + +2014-11-08 Richard Sandiford <richard.sandiford@arm.com> + + * config/arm/aarch-common.c: Include rtl-iter.h. + (search_term, arm_find_sub_rtx_with_search_term): Delete. + (arm_find_sub_rtx_with_code): Use FOR_EACH_SUBRTX_VAR. + (arm_get_set_operands): Pass the insn pattern rather than the + insn itself. + (arm_no_early_store_addr_dep): Likewise. + +2014-11-08 Eric Botcazou <ebotcazou@adacore.com> + + * config/arm/arm.c (arm_set_return_address): Mark the store as frame + related, if any. + (thumb_set_return_address): Likewise. + +2014-11-07 Jeff Law <law@redhat.com> + + PR tree-optimization/61515 + * tree-ssa-threadedge.c (invalidate_equivalences): Walk the unwinding + stack rather than looking at every SSA_NAME's value. + +2014-11-07 Richard Biener <rguenther@suse.de> + + PR tree-optimization/63605 + * fold-const.c (fold_binary_loc): Properly use element_precision + for types that may not be scalar. + +2014-11-07 Evgeny Stupachenko <evstupac@gmail.com> + + PR target/63534 + * config/i386/i386.md (builtin_setjmp_receiver): Use + pic_offset_table_rtx for PIC register. + (nonlocal_goto_receiver): Delete. + +2014-11-07 Daniel Hellstrom <daniel@gaisler.com> + + * config.gcc (sparc-*-rtems*): Clean away unused t-elf. + * config/sparc/t-rtems: Add leon3v7 and muser-mode multilibs. + +2014-11-07 Martin Liska <mliska@suse.cz> + + PR ipa/63580 + * cgraphunit.c (cgraph_node::create_wrapper): + TREE_ADDRESSABLE is set to false for a newly created thunk. + +2014-11-07 Martin Liska <mliska@suse.cz> + + PR ipa/63747 + * ipa-icf-gimple.c (func_checker::compare_gimple_switch): + Missing checking for CASE_LOW and CASE_HIGH added. + +2014-11-07 Martin Liska <mliska@suse.cz> + + PR ipa/63595 + * cgraphunit.c (cgraph_node::expand_thunk): DECL_BY_REFERENCE + is correctly handled for thunks created by IPA ICF. + +2014-11-07 Jiong Wang <jiong.wang@arm.com> +2014-11-07 Richard Biener <rguenther@suse.de> + + PR tree-optimization/63676 + * gimple-fold.c (fold_gimple_assign): Do not fold node when + TREE_CLOBBER_P be true. + +2014-11-07 Richard Biener <rguenther@suse.de> + + PR middle-end/63770 + * match.pd: Guard conflicting GENERIC pattern properly. + +2014-11-07 Richard Biener <rguenther@suse.de> + + * match.pd: Add patterns for POINTER_PLUS_EXPR association + and special patterns from tree-ssa-forwprop.c + * fold-const.c (fold_binary_loc): Remove them here. + * tree-ssa-forwprop.c (to_purge): New global bitmap. + (fwprop_set_lattice_val): New function. + (fwprop_invalidate_lattice): Likewise. + (remove_prop_source_from_use): Instead of purging dead EH + edges record blocks to do that in to_purge. + (tidy_after_forward_propagate_addr): Likewise. + (forward_propagate_addr_expr): Invalidate the lattice for + SSA names we release. + (simplify_conversion_from_bitmask): Likewise. + (simplify_builtin_call): Likewise. + (associate_pointerplus_align): Remove. + (associate_pointerplus_diff): Likewise. + (associate_pointerplus): Likewise. + (fold_all_stmts): Merge with ... + (pass_forwprop::execute): ... the original loop over all + basic-blocks. Delay purging dead EH edges and invalidate + the lattice for SSA names we release. + +2014-11-07 Terry Guo <terry.guo@arm.com> + + * config/arm/arm.opt (masm-syntax-unified): New option. + * doc/invoke.texi (-masm-syntax-unified): Document new option. + * config/arm/arm.h (TARGET_UNIFIED_ASM): Also include thumb1. + (ASM_APP_ON): Redefined. + * config/arm/arm.c (arm_option_override): Thumb2 inline assembly + code always use UAL syntax. + (arm_output_mi_thunk): Use UAL syntax for Thumb1 target. + * config/arm/thumb1.md: Likewise. + +2014-11-06 John David Anglin <danglin@gcc.gnu.org> + + * config/pa/pa.md (trap): New insn. Add "trap" to attribute type. + Don't allow trap insn in in_branch_delay, in_nullified_branch_delay + or in_call_delay. + +2014-11-06 Steve Ellcey <sellcey@imgtec.com> + + * config.gcc (mips*-mti-linux*): Remove gnu_ld and gas assignments. + Set default_mips_arch and default_mips_abi instead of tm_defines. + (mips*-*-linux*): Set default_mips_arch and default_mips_abi instead + of tm_defines. + (mips*-*-*): Check with_arch and with_abi. Set tm_defines. + * config/mips/mips.h (STANDARD_STARTFILE_PREFIX_1): Set default + based on MIPS_ABI_DEFAULT. + (STANDARD_STARTFILE_PREFIX_2): Ditto. + +2014-11-06 Joseph Myers <joseph@codesourcery.com> + + * doc/invoke.texi (-std=c99, -std=c11): Don't refer to corner + cases of extended identifiers. + +2014-11-06 Eric Botcazou <ebotcazou@adacore.com> + + * tree-cfgcleanup.c (fixup_noreturn_call): Do not perform DCE here. + +2014-11-06 DJ Delorie <dj@redhat.com> + + * config/m32c/cond.md (movqicc_<code>_<mode>): Remove mode of + conditional. + (movhicc_<code>_<mode>): Likewise. + * config/m32c/m32c.c (encode_pattern_1): Specialise PSImode + subregs. + (m32c_eh_return_data_regno): Change to using memregs to avoid + tying up all the compute regs. + (m32c_legitimate_address_p) Subregs are not valid addresses. + +2014-11-06 Bernd Schmidt <bernds@codesourcery.com> + + * function.c (thread_prologue_and_epilogue_insns): No longer static. + * function.h (thread_prologue_and_epilogue_insns): Declare. + + * target.def (assemble_undefined_decl): New hooks. + * hooks.c (hook_void_FILEptr_constcharptr_const_tree): New function. + * hooks.h (hook_void_FILEptr_constcharptr_const_tree): Declare. + * doc/tm.texi.in (TARGET_ASM_ASSEMBLE_UNDEFINED_DECL): Add. + * doc/tm.texi: Regenerate. + * output.h (assemble_undefined_decl): Declare. + (get_fnname_from_decl): Declare. + * varasm.c (assemble_undefined_decl): New function. + (get_fnname_from_decl): New function. + * final.c (rest_of_handle_final): Use it. + * varpool.c (varpool_output_variables): Call assemble_undefined_decl + for nodes without a definition. + + * target.def (call_args, end_call_args): New hooks. + * hooks.c (hook_void_rtx_tree): New empty function. + * hooks.h (hook_void_rtx_tree): Declare. + * doc/tm.texi.in (TARGET_CALL_ARGS, TARGET_END_CALL_ARGS): Add. + * doc/tm.texi: Regenerate. + * calls.c (expand_call): Slightly rearrange the code. Use the two new + hooks. + (expand_library_call_value_1): Use the two new hooks. + + * expr.c (use_reg_mode): Just return for pseudo registers. + + * combine.c (try_combine): Don't allow a call as one of the source + insns. + + * target.def (decl_end): New hook. + * varasm.c (assemble_variable_contents, assemble_constant_contents): + Use it. + * doc/tm.texi.in (TARGET_ASM_DECL_END): Add. + * doc/tm.texi: Regenerate. + +2014-11-06 Renlin Li <renlin.li@arm.com> + + * config/aarch64/aarch64.c (aarch64_architecture_version): New. + (processor): New architecture_version field. + (aarch64_override_options): Initialize aarch64_architecture_version. + * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_ARCH, + __ARM_ARCH_PROFILE, aarch64_arch_name macro. + +2014-11-06 James Greenhalgh <james.greenhalgh@arm.com> + + * params.def (sra-max-scalarization-size-Ospeed): New. + (sra-max-scalarization-size-Osize): Likewise. + * doc/invoke.texi (sra-max-scalarization-size-Ospeed): Document. + (sra-max-scalarization-size-Osize): Likewise. + * toplev.c (process_options): Set default values for new + parameters. + * tree-sra.c (analyze_all_variable_accesses): Use new parameters. + * targhooks.c (get_move_ratio): Remove static designator. + * target.h (get_move_ratio): Declare. + +2014-11-06 Marek Polacek <polacek@redhat.com> + + * sanopt.c (sanopt_optimize_walker): Limit removal of the checks. + Remove vector limit. + +2014-11-06 Richard Biener <rguenther@suse.de> + + * match.pd: Implement bitwise binary and unary simplifications + from tree-ssa-forwprop.c. + * fold-const.c (fold_unary_loc): Remove them here. + (fold_binary_loc): Likewise. + * tree-ssa-forwprop.c (simplify_not_neg_expr): Remove. + (truth_valued_ssa_name): Likewise. + (lookup_logical_inverted_value): Likewise. + (simplify_bitwise_binary_1): Likewise. + (hoist_conversion_for_bitop_p): Likewise. + (simplify_bitwise_binary_boolean): Likewise. + (simplify_bitwise_binary): Likewise. + (pass_forwprop::execute): Remove calls to simplify_not_neg_expr + and simplify_bitwise_binary. + * genmatch.c (dt_node::append_true_op): Use safe_as_a for parent. + (decision_tree::insert): Also insert non-expressions. + +2014-11-06 Hale Wang <hale.wang@arm.com> + + * config/arm/arm-cores.def: Add support for + -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply, + cortex-m1.small-multiply. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Regenerate. + * config/arm/arm.c: Update the rtx-costs for MUL. + * config/arm/bpabi.h: Handle + -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply, + cortex-m1.small-multiply. + * doc/invoke.texi: Document + -mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply, + cortex-m1.small-multiply. + +2014-11-06 Hale Wang <hale.wang@arm.com> + + * config/arm/arm.c: Add cortex-m7 tune. + * config/arm/arm-cores.def: Use cortex-m7 tune. + +2014-11-05 Uros Bizjak <ubizjak@gmail.com> + + PR target/63538 + * config/i386/i386.c (in_large_data_p): Reject automatic variables. + (ix86_encode_section_info): Do not check for non-automatic varibles + when setting SYMBOL_FLAG_FAR_ADDR flag. + (x86_64_elf_select_section): Do not check ix86_cmodel here. + (x86_64_elf_unique_section): Ditto. + (x86_elf_aligned_common): Emit tab before .largecomm. + +2014-11-05 Joseph Myers <joseph@codesourcery.com> + + PR preprocessor/9449 + * doc/cpp.texi (Character sets, Tokenization) + (Implementation-defined behavior): Don't refer to UCNs in + identifiers requiring -fextended-identifiers. + * doc/cppopts.texi (-fextended-identifiers): Document as enabled + by default for C99 and later and C++. + * doc/invoke.texi (-std=c99, -std=c11): Don't refer to extended + identifiers needing -fextended-identifiers. + +2014-11-05 Ilya Tocar <ilya.tocar@intel.com> + + * config/i386/i386.c (expand_vec_perm_pshufb): Try vpermq/vpermd + for 512-bit wide modes. + (expand_vec_perm_1): Use correct versions of patterns. + * config/i386/sse.md (avx512f_vec_dup<mode>_1): New. + (vashr<mode>3<mask_name>): Split V8HImode and V16QImode. + +2014-11-05 Ilya Enkovich <ilya.enkovich@intel.com> + + * ipa-chkp.c: New. + * ipa-chkp.h: New. + * tree-chkp.c: New. + * tree-chkp.h: New. + * tree-chkp-opt.c: New. + * rtl-chkp.c: New. + * rtl-chkp.h: New. + * Makefile.in (OBJS): Add ipa-chkp.o, rtl-chkp.o, tree-chkp.o + tree-chkp-opt.o. + (GTFILES): Add tree-chkp.c. + * mode-classes.def (MODE_POINTER_BOUNDS): New. + * tree.def (POINTER_BOUNDS_TYPE): New. + * genmodes.c (complete_mode): Support MODE_POINTER_BOUNDS. + (POINTER_BOUNDS_MODE): New. + (make_pointer_bounds_mode): New. + * machmode.h (POINTER_BOUNDS_MODE_P): New. + * stor-layout.c (int_mode_for_mode): Support MODE_POINTER_BOUNDS. + (layout_type): Support POINTER_BOUNDS_TYPE. + * tree-pretty-print.c (dump_generic_node): Support POINTER_BOUNDS_TYPE. + * tree-core.h (tree_index): Add TI_POINTER_BOUNDS_TYPE. + * tree.c (build_int_cst_wide): Support POINTER_BOUNDS_TYPE. + (type_contains_placeholder_1): Likewise. + (build_common_tree_nodes): Initialize + pointer_bounds_type_node. + * tree.h (POINTER_BOUNDS_TYPE_P): New. + (pointer_bounds_type_node): New. + (POINTER_BOUNDS_P): New. + (BOUNDED_TYPE_P): New. + (BOUNDED_P): New. + (CALL_WITH_BOUNDS_P): New. + * gimple.h (gf_mask): Add GF_CALL_WITH_BOUNDS. + (gimple_call_with_bounds_p): New. + (gimple_call_set_with_bounds): New. + (gimple_return_retbnd): New. + (gimple_return_set_retbnd): New + * gimple.c (gimple_build_return): Increase number of ops + for return statement. + (gimple_build_call_from_tree): Propagate CALL_WITH_BOUNDS_P + flag. + * gimple-pretty-print.c (dump_gimple_return): Print second op. + * rtl.h (CALL_EXPR_WITH_BOUNDS_P): New. + * gimplify.c (gimplify_init_constructor): Avoid infinite + loop during gimplification of bounds initializer. + * calls.c: Include tree-chkp.h, rtl-chkp.h, bitmap.h. + (special_function_p): Use original decl name when analyzing + instrumentation clone. + (arg_data): Add fields special_slot, pointer_arg and + pointer_offset. + (store_bounds): New. + (emit_call_1): Propagate instrumentation flag for CALL. + (initialize_argument_information): Compute pointer_arg, + pointer_offset and special_slot for pointer bounds arguments. + (finalize_must_preallocate): Preallocate when storing bounds + in bounds table. + (compute_argument_addresses): Skip pointer bounds. + (expand_call): Store bounds into tables separately. Return + result joined with resulting bounds. + * cfgexpand.c: Include tree-chkp.h, rtl-chkp.h. + (expand_call_stmt): Propagate bounds flag for CALL_EXPR. + (expand_return): Add returned bounds arg. Handle returned bounds. + (expand_gimple_stmt_1): Adjust to new expand_return signature. + (gimple_expand_cfg): Reset rtx bounds map. + * expr.c: Include tree-chkp.h, rtl-chkp.h. + (expand_assignment): Handle returned bounds. + (store_expr_with_bounds): New. Replaces store_expr with new bounds + target argument. Handle bounds returned by calls. + (store_expr): Now wraps store_expr_with_bounds. + * expr.h (store_expr_with_bounds): New. + * function.c: Include tree-chkp.h, rtl-chkp.h. + (bounds_parm_data): New. + (use_register_for_decl): Do not registerize decls used for bounds + stores and loads. + (assign_parms_augmented_arg_list): Add bounds of the result + structure pointer as the second argument. + (assign_parm_find_entry_rtl): Mark bounds are never passed on + the stack. + (assign_parm_is_stack_parm): Likewise. + (assign_parm_load_bounds): New. + (assign_bounds): New. + (assign_parms): Load bounds and determine a location for + returned bounds. + (diddle_return_value_1): New. + (diddle_return_value): Handle returned bounds. + * function.h (rtl_data): Add field for returned bounds. + * varasm.c: Include tree-chkp.h. + (output_constant): Support POINTER_BOUNDS_TYPE. + (output_constant_pool_2): Support MODE_POINTER_BOUNDS. + (ultimate_transparent_alias_target): Move up. + (make_decl_rtl): For instrumented function use + name of the original decl. + (assemble_start_function): Mark function as global + in case it is instrumentation clone of the global + function. + (do_assemble_alias): Follow transparent alias chain + for identifier. Check if original alias is public. + (maybe_assemble_visibility): Use visibility of the + original function for instrumented version. + (default_unique_section): Likewise. + * emit-rtl.c (immed_double_const): Support MODE_POINTER_BOUNDS. + (init_emit_once): Build pointer bounds zero constants. + * explow.c (trunc_int_for_mode): Support MODE_POINTER_BOUNDS. + * target.def (builtin_chkp_function): New. + (chkp_bound_type): New. + (chkp_bound_mode): New. + (chkp_make_bounds_constant): New. + (chkp_initialize_bounds): New. + (load_bounds_for_arg): New. + (store_bounds_for_arg): New. + (load_returned_bounds): New. + (store_returned_bounds): New. + (chkp_function_value_bounds): New. + (setup_incoming_vararg_bounds): New. + (function_arg): Update hook description with new possible return + value CONST_INT. + * targhooks.h (default_load_bounds_for_arg): New. + (default_store_bounds_for_arg): New. + (default_load_returned_bounds): New. + (default_store_returned_bounds): New. + (default_chkp_bound_type): New. + (default_chkp_bound_mode): New. + (default_builtin_chkp_function): New. + (default_chkp_function_value_bounds): New. + (default_chkp_make_bounds_constant): New. + (default_chkp_initialize_bounds): New. + (default_setup_incoming_vararg_bounds): New. + * targhooks.c (default_load_bounds_for_arg): New. + (default_store_bounds_for_arg): New. + (default_load_returned_bounds): New. + (default_store_returned_bounds): New. + (default_chkp_bound_type): New. + (default_chkp_bound_mode); New. + (default_builtin_chkp_function): New. + (default_chkp_function_value_bounds): New. + (default_chkp_make_bounds_constant): New. + (default_chkp_initialize_bounds): New. + (default_setup_incoming_vararg_bounds): New. + * builtin-types.def (BT_BND): New. + (BT_FN_PTR_CONST_PTR): New. + (BT_FN_CONST_PTR_CONST_PTR): New. + (BT_FN_BND_CONST_PTR): New. + (BT_FN_CONST_PTR_BND): New. + (BT_FN_PTR_CONST_PTR_SIZE): New. + (BT_FN_PTR_CONST_PTR_CONST_PTR): New. + (BT_FN_VOID_PTRPTR_CONST_PTR): New. + (BT_FN_VOID_CONST_PTR_SIZE): New. + (BT_FN_VOID_PTR_BND): New. + (BT_FN_CONST_PTR_CONST_PTR_CONST_PTR): New. + (BT_FN_BND_CONST_PTR_SIZE): New. + (BT_FN_PTR_CONST_PTR_CONST_PTR_SIZE): New. + (BT_FN_VOID_CONST_PTR_BND_CONST_PTR): New. + * chkp-builtins.def: New. + * builtins.def: include chkp-builtins.def. + (DEF_CHKP_BUILTIN): New. + * builtins.c: Include tree-chkp.h and rtl-chkp.h. + (expand_builtin): Support BUILT_IN_CHKP_INIT_PTR_BOUNDS, + BUILT_IN_CHKP_NULL_PTR_BOUNDS, BUILT_IN_CHKP_COPY_PTR_BOUNDS, + BUILT_IN_CHKP_CHECK_PTR_LBOUNDS, BUILT_IN_CHKP_CHECK_PTR_UBOUNDS, + BUILT_IN_CHKP_CHECK_PTR_BOUNDS, BUILT_IN_CHKP_SET_PTR_BOUNDS, + BUILT_IN_CHKP_NARROW_PTR_BOUNDS, BUILT_IN_CHKP_STORE_PTR_BOUNDS, + BUILT_IN_CHKP_GET_PTR_LBOUND, BUILT_IN_CHKP_GET_PTR_UBOUND, + BUILT_IN_CHKP_BNDMK, BUILT_IN_CHKP_BNDSTX, BUILT_IN_CHKP_BNDCL, + BUILT_IN_CHKP_BNDCU, BUILT_IN_CHKP_BNDLDX, BUILT_IN_CHKP_BNDRET, + BUILT_IN_CHKP_INTERSECT, BUILT_IN_CHKP_NARROW, + BUILT_IN_CHKP_EXTRACT_LOWER, BUILT_IN_CHKP_EXTRACT_UPPER. + (std_expand_builtin_va_start): Init bounds for va_list. + * cppbuiltin.c (define_builtin_macros_for_compilation_flags): Add + __CHKP__ macro when Pointer Bounds Checker is on. + * params.def (PARAM_CHKP_MAX_CTOR_SIZE): New. + * passes.def (pass_ipa_chkp_versioning): New. + (pass_early_local_passes): Renamed to pass_build_ssa_passes. + (pass_fixup_cfg): Moved to pass_chkp_instrumentation_passes. + (pass_chkp_instrumentation_passes): New. + (pass_ipa_chkp_produce_thunks): New. + (pass_local_optimization_passes): New. + (pass_chkp_opt): New. + * tree-pass.h (make_pass_ipa_chkp_versioning): New. + (make_pass_ipa_chkp_produce_thunks): New. + (make_pass_chkp): New. + (make_pass_chkp_opt): New. + (make_pass_early_local_passes): Renamed to ... + (make_pass_build_ssa_passes): This. + (make_pass_chkp_instrumentation_passes): New. + (make_pass_local_optimization_passes): New. + * passes.c (pass_manager::execute_early_local_passes): Execute + early passes in three steps. + (execute_all_early_local_passes): Renamed to ... + (execute_build_ssa_passes): This. + (pass_data_early_local_passes): Renamed to ... + (pass_data_build_ssa_passes): This. + (pass_early_local_passes): Renamed to ... + (pass_build_ssa_passes): This. + (pass_data_chkp_instrumentation_passes): New. + (pass_chkp_instrumentation_passes): New. + (pass_data_local_optimization_passes): New. + (pass_local_optimization_passes): New. + (make_pass_early_local_passes): Renamed to ... + (make_pass_build_ssa_passes): This. + (make_pass_chkp_instrumentation_passes): New. + (make_pass_local_optimization_passes): New. + * c-family/c.opt (fcheck-pointer-bounds): New. + (fchkp-check-incomplete-type): New. + (fchkp-zero-input-bounds-for-main): New. + (fchkp-first-field-has-own-bounds): New. + (fchkp-narrow-bounds): New. + (fchkp-narrow-to-innermost-array): New. + (fchkp-optimize): New. + (fchkp-use-fast-string-functions): New. + (fchkp-use-nochk-string-functions): New. + (fchkp-use-static-bounds): New. + (fchkp-use-static-const-bounds): New. + (fchkp-treat-zero-dynamic-size-as-infinite): New. + (fchkp-check-read): New. + (fchkp-check-write): New. + (fchkp-store-bounds): New. + (fchkp-instrument-calls): New. + (fchkp-instrument-marked-only): New. + (Wchkp): New. + * c-family/c-common.c (handle_bnd_variable_size_attribute): New. + (handle_bnd_legacy): New. + (handle_bnd_instrument): New. + (c_common_attribute_table): Add bnd_variable_size, bnd_legacy + and bnd_instrument. Fix documentation. + (c_common_format_attribute_table): Likewsie. + * toplev.c: include tree-chkp.h. + (process_options): Check Pointer Bounds Checker is supported. + (compile_file): Add chkp_finish_file call. + * ipa-cp.c (initialize_node_lattices): Use cgraph_local_p + to handle instrumentation clones properly. + (propagate_constants_accross_call): Do not propagate + through instrumentation thunks. + * ipa-pure-const.c (propagate_pure_const): Support + IPA_REF_CHKP. + * ipa-inline.c (early_inliner): Check edge has summary allocated. + * ipa-split.c: Include tree-chkp.h. + (find_retbnd): New. + (split_part_set_ssa_name_p): New. + (consider_split): Do not split retbnd and retval + producers. + (insert_bndret_call_after): new. + (split_function): Propagate Pointer Bounds Checker + instrumentation marks and handle returned bounds. + * tree-ssa-sccvn.h (vn_reference_op_struct): Transform opcode + into bit field and add with_bounds field. + * tree-ssa-sccvn.c (copy_reference_ops_from_call): Set + with_bounds field for instrumented calls. + * tree-ssa-pre.c (create_component_ref_by_pieces_1): Restore + CALL_WITH_BOUNDS_P flag for calls. + * tree-ssa-ccp.c: Include tree-chkp.h. + (insert_clobber_before_stack_restore): Handle + BUILT_IN_CHKP_BNDRET calls. + * tree-ssa-dce.c: Include tree-chkp.h. + (propagate_necessity): For free call fed by alloc check + bounds are also provided by the same alloc. + (eliminate_unnecessary_stmts): Handle BUILT_IN_CHKP_BNDRET + used by free calls. + * tree-inline.c: Include tree-chkp.h. + (declare_return_variable): Add arg holding + returned bounds slot. Create and initialize returned bounds var. + (remap_gimple_stmt): Handle returned bounds. + Return sequence of statements instead of a single statement. + (insert_init_stmt): Add declaration. + (remap_gimple_seq): Adjust to new remap_gimple_stmt signature. + (copy_bb): Adjust to changed return type of remap_gimple_stmt. + Properly handle bounds in va_arg_pack and va_arg_pack_len. + (expand_call_inline): Handle returned bounds. Add bounds copy + for generated mem to mem assignments. + * tree-inline.h (copy_body_data): Add fields retbnd and + assign_stmts. + * value-prof.c: Include tree-chkp.h. + (gimple_ic): Support returned bounds. + * ipa.c (cgraph_build_static_cdtor_1): Support contructors + with "chkp ctor" and "bnd_legacy" attributes. + (symtab_remove_unreachable_nodes): Keep initial values for + pointer bounds to be used for checks eliminations. + (process_references): Handle IPA_REF_CHKP. + (walk_polymorphic_call_targets): Likewise. + * ipa-visibility.c (cgraph_externally_visible_p): Mark + instrumented 'main' as externally visible. + (function_and_variable_visibility): Filter instrumentation + thunks. + * cgraph.h (cgraph_thunk_info): Add add_pointer_bounds_args + field. + (cgraph_node): Add instrumented_version, orig_decl and + instrumentation_clone fields. + (symtab_node::get_alias_target): Allow IPA_REF_CHKP reference. + (varpool_node): Add need_bounds_init field. + (cgraph_local_p): New. + * cgraph.c: Include tree-chkp.h. + (cgraph_node::remove): Fix instrumented_version + of the referenced node if any. + (cgraph_node::dump): Dump instrumentation_clone and + instrumented_version fields. + (cgraph_node::verify_node): Check correctness of IPA_REF_CHKP + references and instrumentation thunks. + (cgraph_can_remove_if_no_direct_calls_and_refs_p): Keep + all not instrumented instrumentation clones alive. + (cgraph_redirect_edge_call_stmt_to_callee): Support + returned bounds. + * cgraphbuild.c (rebuild_cgraph_edges): Rebuild IPA_REF_CHKP + reference. + (cgraph_rebuild_references): Likewise. + * cgraphunit.c: Include tree-chkp.h. + (assemble_thunks_and_aliases): Skip thunks calling instrumneted + function version. + (varpool_finalize_decl): Register statically initialized decls + in Pointer Bounds Checker. + (walk_polymorphic_call_targets): Do not mark generated call to + __builtin_unreachable as with_bounds. + (output_weakrefs): If there are both instrumented and original + versions, output only one of them. + (cgraph_node::expand_thunk): Set with_bounds flag + for created call statement. + * ipa-ref.h (ipa_ref_use): Add IPA_REF_CHKP. + (ipa_ref): increase size of use field. + * symtab.c (ipa_ref_use_name): Add element for IPA_REF_CHKP. + * varpool.c (dump_varpool_node): Dump need_bounds_init field. + (ctor_for_folding): Do not fold constant bounds vars. + * lto-streamer.h (LTO_minor_version): Change minor version from + 0 to 1. + * lto-cgraph.c (compute_ltrans_boundary): Keep initial values for + pointer bounds. + (lto_output_node): Output instrumentation_clone, + thunk.add_pointer_bounds_args and orig_decl field. + (lto_output_ref): Adjust to new ipa_ref::use field size. + (input_overwrite_node): Read instrumentation_clone field. + (input_node): Read thunk.add_pointer_bounds_args and orig_decl + fields. + (input_ref): Adjust to new ipa_ref::use field size. + (input_cgraph_1): Compute instrumented_version fields and restore + IDENTIFIER_TRANSPARENT_ALIAS chains. + (lto_output_varpool_node): Output + need_bounds_init value. + (input_varpool_node): Read need_bounds_init value. + * lto-partition.c (add_symbol_to_partition_1): Keep original + and instrumented versions together. + (privatize_symbol_name): Restore transparent alias chain if required. + (add_references_to_partition): Add references to pointer bounds vars. + * dbxout.c (dbxout_type): Ignore POINTER_BOUNDS_TYPE. + * dwarf2out.c (gen_subprogram_die): Ignore bound args. + (gen_type_die_with_usage): Skip pointer bounds. + (dwarf2out_global_decl): Likewise. + (is_base_type): Support POINTER_BOUNDS_TYPE. + (gen_formal_types_die): Skip pointer bounds. + (gen_decl_die): Likewise. + * var-tracking.c (vt_add_function_parameters): Skip + bounds parameters. + * ipa-icf.c (sem_function::merge): Do not merge when instrumentation + thunk still exists. + (sem_variable::merge): Reset need_bounds_init flag. + * doc/extend.texi: Document Pointer Bounds Checker built-in functions + and attributes. + * doc/tm.texi.in (TARGET_LOAD_BOUNDS_FOR_ARG): New. + (TARGET_STORE_BOUNDS_FOR_ARG): New. + (TARGET_LOAD_RETURNED_BOUNDS): New. + (TARGET_STORE_RETURNED_BOUNDS): New. + (TARGET_CHKP_FUNCTION_VALUE_BOUNDS): New. + (TARGET_SETUP_INCOMING_VARARG_BOUNDS): New. + (TARGET_BUILTIN_CHKP_FUNCTION): New. + (TARGET_CHKP_BOUND_TYPE): New. + (TARGET_CHKP_BOUND_MODE): New. + (TARGET_CHKP_MAKE_BOUNDS_CONSTANT): New. + (TARGET_CHKP_INITIALIZE_BOUNDS): New. + * doc/tm.texi: Regenerated. + * doc/rtl.texi (MODE_POINTER_BOUNDS): New. + (BND32mode): New. + (BND64mode): New. + * doc/invoke.texi (-mmpx): New. + (-mno-mpx): New. + (chkp-max-ctor-size): New. + * config/i386/constraints.md (w): New. + (Ti): New. + (Tb): New. + * config/i386/i386-c.c (ix86_target_macros_internal): Add __MPX__. + * config/i386/i386-modes.def (BND32): New. + (BND64): New. + * config/i386/i386-protos.h (ix86_bnd_prefixed_insn_p): New. + * config/i386/i386.c: Include tree-chkp.h, rtl-chkp.h, tree-iterator.h. + (regclass_map): Add bound registers. + (dbx_register_map): Likewise. + (dbx64_register_map): Likewise. + (svr4_dbx_register_map): Likewise. + (isa_opts): Add -mmpx. + (PTA_MPX): New. + (ix86_option_override_internal): Support MPX ISA. + (ix86_conditional_register_usage): Support bound registers. + (ix86_code_end): Add MPX bnd prefix. + (output_set_got): Likewise. + (print_reg): Avoid prefixes for bound registers. + (ix86_print_operand): Add '!' (MPX bnd) print prefix support. + (ix86_print_operand_punct_valid_p): Likewise. + (ix86_print_operand_address): Support UNSPEC_BNDMK_ADDR and + UNSPEC_BNDLDX_ADDR. + (ix86_output_call_insn): Add MPX bnd prefix to branch instructions. + (ix86_class_likely_spilled_p): Add bound regs support. + (ix86_hard_regno_mode_ok): Likewise. + (x86_order_regs_for_local_alloc): Likewise. + (ix86_bnd_prefixed_insn_p): New. + (ix86_builtins): Add + IX86_BUILTIN_BNDMK, IX86_BUILTIN_BNDSTX, + IX86_BUILTIN_BNDLDX, IX86_BUILTIN_BNDCL, + IX86_BUILTIN_BNDCU, IX86_BUILTIN_BNDRET, + IX86_BUILTIN_BNDNARROW, IX86_BUILTIN_BNDINT, + IX86_BUILTIN_SIZEOF, IX86_BUILTIN_BNDLOWER, + IX86_BUILTIN_BNDUPPER. + (builtin_isa): Add leaf_p and nothrow_p fields. + (def_builtin): Initialize leaf_p and nothrow_p. + (ix86_add_new_builtins): Handle leaf_p and nothrow_p + flags. + (bdesc_mpx): New. + (bdesc_mpx_const): New. + (ix86_init_mpx_builtins): New. + (ix86_init_builtins): Call ix86_init_mpx_builtins. + (ix86_emit_cmove): New. + (ix86_emit_move_max): New. + (ix86_expand_builtin): Expand IX86_BUILTIN_BNDMK, + IX86_BUILTIN_BNDSTX, IX86_BUILTIN_BNDLDX, + IX86_BUILTIN_BNDCL, IX86_BUILTIN_BNDCU, + IX86_BUILTIN_BNDRET, IX86_BUILTIN_BNDNARROW, + IX86_BUILTIN_BNDINT, IX86_BUILTIN_SIZEOF, + IX86_BUILTIN_BNDLOWER, IX86_BUILTIN_BNDUPPER. + (ix86_function_value_bounds): New. + (ix86_builtin_mpx_function): New. + (ix86_get_arg_address_for_bt): New. + (ix86_load_bounds): New. + (ix86_store_bounds): New. + (ix86_load_returned_bounds): New. + (ix86_store_returned_bounds): New. + (ix86_mpx_bound_mode): New. + (ix86_make_bounds_constant): New. + (ix86_initialize_bounds): + (TARGET_LOAD_BOUNDS_FOR_ARG): New. + (TARGET_STORE_BOUNDS_FOR_ARG): New. + (TARGET_LOAD_RETURNED_BOUNDS): New. + (TARGET_STORE_RETURNED_BOUNDS): New. + (TARGET_CHKP_BOUND_MODE): New. + (TARGET_BUILTIN_CHKP_FUNCTION): New. + (TARGET_CHKP_FUNCTION_VALUE_BOUNDS): New. + (TARGET_CHKP_MAKE_BOUNDS_CONSTANT): New. + (TARGET_CHKP_INITIALIZE_BOUNDS): New. + (ix86_option_override_internal): Do not + support x32 with MPX. + (init_cumulative_args): Init stdarg, bnd_regno, bnds_in_bt + and force_bnd_pass. + (function_arg_advance_32): Return number of used integer + registers. + (function_arg_advance_64): Likewise. + (function_arg_advance_ms_64): Likewise. + (ix86_function_arg_advance): Handle pointer bounds. + (ix86_function_arg): Likewise. + (ix86_function_value_regno_p): Mark fisrt bounds registers as + possible function value. + (ix86_function_value_1): Handle pointer bounds type/mode + (ix86_return_in_memory): Likewise. + (ix86_print_operand): Analyse insn to decide abounf "bnd" prefix. + (ix86_expand_call): Generate returned bounds. + (ix86_setup_incoming_vararg_bounds): New. + (ix86_va_start): Initialize bounds for pointers in va_list. + (TARGET_SETUP_INCOMING_VARARG_BOUNDS): New. + * config/i386/i386.h (TARGET_MPX): New. + (TARGET_MPX_P): New. + (FIRST_PSEUDO_REGISTER): Fix to new value. + (FIXED_REGISTERS): Add bound registers. + (CALL_USED_REGISTERS): Likewise. + (REG_ALLOC_ORDER): Likewise. + (HARD_REGNO_NREGS): Likewise. + (VALID_BND_REG_MODE): New. + (FIRST_BND_REG): New. + (LAST_BND_REG): New. + (reg_class): Add BND_REGS. + (REG_CLASS_NAMES): Likewise. + (REG_CLASS_CONTENTS): Likewise. + (BND_REGNO_P): New. + (ANY_BND_REG_P): New. + (BNDmode): New. + (HI_REGISTER_NAMES): Add bound registers. + (ix86_args): Add bnd_regno, bnds_in_bt, force_bnd_pass and + stdarg fields. + * config/i386/i386.md (UNSPEC_BNDMK): New. + (UNSPEC_BNDMK_ADDR): New. + (UNSPEC_BNDSTX): New. + (UNSPEC_BNDLDX): New. + (UNSPEC_BNDLDX_ADDR): New. + (UNSPEC_BNDCL): New. + (UNSPEC_BNDCU): New. + (UNSPEC_BNDCN): New. + (UNSPEC_MPX_FENCE): New. + (UNSPEC_SIZEOF): New. + (BND0_REG): New. + (BND1_REG): New. + (type): Add mpxmov, mpxmk, mpxchk, mpxld, mpxst. + (length_immediate): Support mpxmov, mpxmk, mpxchk, mpxld, mpxst. + (prefix_rep): Check for bnd prefix. + (prefix_0f): Support mpxmov, mpxmk, mpxchk, mpxld, mpxst. + (length_nobnd): New. + (length): Use length_nobnd when specified. + (memory): Support mpxmov, mpxmk, mpxchk, mpxld, mpxst. + (BND): New. + (bnd_ptr): New. + (BNDCHECK): New. + (bndcheck): New. + (*jcc_1): Add MPX bnd prefix. + (*jcc_2): Likewise. + (jump): Likewise. + (*indirect_jump): Likewise. + (*tablejump_1): Likewise. + (simple_return_internal): Likewise. + (simple_return_internal_long): Likewise. + (simple_return_pop_internal): Likewise. + (simple_return_indirect_internal): Likewise. + (<mode>_mk): New. + (*<mode>_mk): New. + (mov<mode>): New. + (*mov<mode>_internal_mpx): New. + (<mode>_<bndcheck>): New. + (*<mode>_<bndcheck>): New. + (<mode>_ldx): New. + (*<mode>_ldx): New. + (<mode>_stx): New. + (*<mode>_stx): New. + move_size_reloc_<mode>): New. + * config/i386/predicates.md (address_mpx_no_base_operand): New. + (address_mpx_no_index_operand): New. + (bnd_mem_operator): New. + (symbol_operand): New. + (x86_64_immediate_size_operand): New. + * config/i386/i386.opt (mmpx): New. + * config/i386/i386-builtin-types.def (BND): New. + (ULONG): New. + (BND_FTYPE_PCVOID_ULONG): New. + (VOID_FTYPE_BND_PCVOID): New. + (VOID_FTYPE_PCVOID_PCVOID_BND): New. + (BND_FTYPE_PCVOID_PCVOID): New. + (BND_FTYPE_PCVOID): New. + (BND_FTYPE_BND_BND): New. + (PVOID_FTYPE_PVOID_PVOID_ULONG): New. + (PVOID_FTYPE_PCVOID_BND_ULONG): New. + (ULONG_FTYPE_VOID): New. + (PVOID_FTYPE_BND): New. + +2014-11-05 Bernd Schmidt <bernds@codesourcery.com> + + * passes.def (pass_compute_alignments, pass_duplicate_computed_gotos, + pass_variable_tracking, pass_free_cfg, pass_machine_reorg, + pass_cleanup_barriers, pass_delay_slots, + pass_split_for_shorten_branches, pass_convert_to_eh_region_ranges, + pass_shorten_branches, pass_est_nothrow_function_flags, + pass_dwarf2_frame, pass_final): Move outside of pass_postreload and + into pass_late_compilation. + (pass_late_compilation): Add. + * passes.c (pass_data_late_compilation, pass_late_compilation, + make_pass_late_compilation): New. + * timevar.def (TV_LATE_COMPILATION): New. + + * target.def (omit_struct_return_reg): New data hook. + * doc/tm.texi.in: Add @hook TARGET_OMIT_STRUCT_RETURN_REG. + * doc/tm.texi: Regenerate. + * function.c (expand_function_end): Use it. + + * target.def (no_register_allocation): New data hook. + * doc/tm.texi.in: Add @hook TARGET_NO_REGISTER_ALLOCATION. + * doc/tm.texi: Regenerate. + * ira.c (gate_ira): New function. + (pass_data_ira): Set has_gate. + (pass_ira): Add a gate function. + (pass_data_reload): Likewise. + (pass_reload): Add a gate function. + (pass_ira): Use it. + * reload1.c (eliminate_regs): If reg_eliminate_is NULL, assert that + no register allocation happens on the target and return. + * final.c (alter_subreg): Ensure register is not a pseudo before + calling simplify_subreg. + (output_operand): Assert that x isn't a pseudo only if doing + register allocation. + + * dbxout.c (dbxout_symbol): Don't call eliminate_regs on decls for + global vars. + + * optabs.c (emit_indirect_jump): Test HAVE_indirect_jump and emit a + sorry if necessary. + +2014-11-05 Alex Velenko <Alex.Velenko@arm.com> + + * simplify-rtx.c (simplify_binary_operation_1): Div check added. + * rtl.h (SUBREG_P): New macro added. + +2014-11-05 Tejas Belagod <tejas.belagod@arm.com> + + * config/aarch64/aarch64-builtins.c + (aarch64_build_scalar_type): Remove. + (aarch64_scalar_builtin_types, aarch64_simd_type, + aarch64_simd_type, aarch64_mangle_builtin_scalar_type, + aarch64_mangle_builtin_vector_type, + aarch64_mangle_builtin_type, aarch64_simd_builtin_std_type, + aarch64_lookup_simd_builtin_type, aarch64_simd_builtin_type, + aarch64_init_simd_builtin_types, + aarch64_init_simd_builtin_scalar_types): New. + (aarch64_init_simd_builtins): Refactor. + (aarch64_init_crc32_builtins): Fixup with qualifier. + * config/aarch64/aarch64-protos.h + (aarch64_mangle_builtin_type): Export. + * config/aarch64/aarch64-simd-builtin-types.def: New. + * config/aarch64/aarch64.c (aarch64_simd_mangle_map): Remove. + (aarch64_mangle_type): Refactor. + * config/aarch64/arm_neon.h: Declare vector types based on + internal types. + * config/aarch64/t-aarch64: Update dependency. + +2014-11-04 Pat Haugen <pthaugen@us.ibm.com> + + * config/rs6000/rs6000.c (atomic_hold_decl, atomic_clear_decl, + atomic_update_decl): Guard declaration with #ifdef. + +2014-11-04 Marek Polacek <polacek@redhat.com> + + * sanopt.c (sanopt_optimize_walker): Remove unused variables. + +2014-11-04 Marek Polacek <polacek@redhat.com> + + * Makefile.in (OBJS): Add sanopt.o. + (GTFILES): Add sanopt.c. + * asan.h (asan_expand_check_ifn): Declare. + * asan.c (asan_expand_check_ifn): No longer static. + (class pass_sanopt, pass_sanopt::execute, make_pass_sanopt): Move... + * sanopt.c: ...here. New file. + +2014-11-04 Jiong Wang <jiong.wang@arm.com> + Wilco Dijkstra <wilco.dijkstra@arm.com> + + PR target/63293 + * config/aarch64/aarch64.c (aarch64_expand_epiloue): Add barriers before + stack adjustment. + +2014-11-04 Bernd Schmidt <bernds@codesourcery.com> + + * combine.c (combine_simplify_rtx): In STORE_FLAG_VALUE == -1 case, + also verify that mode is equal to the mode of op0. + + * bb-reorder.c (get_uncond_jump_length): Avoid using delete_insn, + emit into a sequence instead. + +2014-11-04 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/sh/sh.c (emit_fpu_switch): Drop unused automatic variable. + +2014-11-04 Alan Lawrence <alan.lawrence@arm.com> + + config/arm/neon.md (reduc_smin_<mode> *2): Rename to... + (reduc_smin_scal_<mode> *2): ...this; extract scalar result. + (reduc_smax_<mode> *2): Rename to... + (reduc_smax_scal_<mode> *2): ...this; extract scalar result. + (reduc_umin_<mode> *2): Rename to... + (reduc_umin_scal_<mode> *2): ...this; extract scalar result. + (reduc_umax_<mode> *2): Rename to... + (reduc_umax_scal_<mode> *2): ...this; extract scalar result. + +2014-11-04 Alan Lawrence <alan.lawrence@arm.com> + + config/arm/neon.md (reduc_plus_*): Rename to... + (reduc_plus_scal_*): ...this; reduce to temp and extract scalar result. + +2014-11-04 Michael Collison <michael.collison@linaro.org> + + * config/aarch64/iterators.md (lconst_atomic): New mode attribute + to support constraints for CONST_INT in atomic operations. + * config/aarch64/atomics.md + (atomic_<atomic_optab><mode>): Use lconst_atomic constraint. + (atomic_nand<mode>): Likewise. + (atomic_fetch_<atomic_optab><mode>): Likewise. + (atomic_fetch_nand<mode>): Likewise. + (atomic_<atomic_optab>_fetch<mode>): Likewise. + (atomic_nand_fetch<mode>): Likewise. + +2014-11-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Fix typo in definition + of __ARM_FEATURE_IDIV. + +2014-11-04 Marek Polacek <polacek@redhat.com> + + * ubsan.c (instrument_object_size): Optimize [x & CST] array accesses. + +2014-11-03 Jan-Benedict Glaw <jbglaw@lug-owl.de> + + * config/rx/rx.c (rx_handle_func_attribute): Mark unused argument. + +2014-11-04 Zhenqiang Chen <zhenqiang.chen@arm.com> + + Revert: + 2014-11-03 Zhenqiang Chen <zhenqiang.chen@arm.com> + * ifcvt.c (noce_emit_cmove, noce_get_alt_condition, noce_get_condition): + Allow CC mode if HAVE_cbranchcc4. + +2014-11-03 Dominik Vogt <vogt@linux.vnet.ibm.com> + + * godump.c (go_format_type): Rewrite RECORD_TYPE nad UNION_TYPE support + with -fdump-go-spec. Anonymous substructures are now flattened and + replaced by their fields (record) or the first named, non-bitfield + field (union). + +2014-11-04 Manuel López-Ibáñez <manu@gcc.gnu.org> + + * input.c (expand_location_to_spelling_point): Fix typo. + (expansion_point_location_if_in_system_header): Fix comment. + +2014-11-03 Pitchumani Sivanupandi <pitchumani.s@atmel.com> + + * config/avr/gen-avr-mmcu-specs.c: Remove unnecessary format specifier. + +2014-11-03 Richard Biener <rguenther@suse.de> + + * tree-eh.c (operation_could_trap_helper_p): Handle conversions + like ordinary operations. + * gimplify.c (gimplify_conversion): Gimplify CONVERT_EXPR + as NOP_EXPR. + +2014-11-03 Joseph Myers <joseph@codesourcery.com> + + * configure.ac (TARGET_GLIBC_MAJOR, TARGET_GLIBC_MINOR): Define + macros. + * configure, config.h.in: Regenerate. + * config/rs6000/linux.h [TARGET_GLIBC_MAJOR > 2 || + (TARGET_GLIBC_MAJOR == 2 && TARGET_GLIBC_MINOR >= 19)] + (RS6000_GLIBC_ATOMIC_FENV): New macro. + * config/rs6000/linux64.h [TARGET_GLIBC_MAJOR > 2 || + (TARGET_GLIBC_MAJOR == 2 && TARGET_GLIBC_MINOR >= 19)] + (RS6000_GLIBC_ATOMIC_FENV): New macro. + * config/rs6000/rs6000.c (atomic_hold_decl, atomic_clear_decl) + (atomic_update_decl): New static variables. + (rs6000_atomic_assign_expand_fenv) [RS6000_GLIBC_ATOMIC_FENV]: + Generate calls to __atomic_feholdexcept, __atomic_feclearexcept + and __atomic_feupdateenv for soft-float and no-FPRs. + +2014-11-03 Richard Biener <rguenther@suse.de> + + * match.pd: Add two abs patterns. Announce tree_expr_nonnegative_p. + Also drop bogus FLOAT_EXPR and FIX_TRUNC_EXPR. + * fold-const.c (fold_unary_loc): Remove them here. + (tree_unary_nonnegative_warnv_p): Use CASE_CONVERT. + * gimple-fold.c (fold_gimple_assign): Remove now obsolete + GIMPLE_UNARY_RHS case. + (gimple_fold_stmt_to_constant_1): Likewise. + (replace_stmt_with_simplification): Fix inverted comparison. + +2014-11-03 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/60770 + * tree-into-ssa.c (rewrite_update_stmt): Return whether the + statement should be removed. + (maybe_register_def): Likewise. Replace clobbers with default + definitions. + (rewrite_dom_walker::before_dom_children): Remove statement if + rewrite_update_stmt says so. + * tree-ssa-live.c: Include tree-ssa.h. + (set_var_live_on_entry): Do not mark undefined variables as live. + (verify_live_on_entry): Do not check undefined variables. + * tree-ssa.h (ssa_undefined_value_p): New parameter for the case + of partially undefined variables. + * tree-ssa.c (ssa_undefined_value_p): Likewise. + (execute_update_addresses_taken): Do not drop clobbers. + +2014-11-03 Marc Glisse <marc.glisse@inria.fr> + + PR tree-optimization/63666 + * fold-const.c: Include "optabs.h". + (fold_ternary_loc) <VEC_PERM_EXPR>: Avoid canonicalizing a + can_vec_perm_p permutation to one that is not. + +2014-11-03 Zhenqiang Chen <zhenqiang.chen@arm.com> + + * ifcvt.c (noce_try_store_flag_mask): Check rtx cost. + +2014-11-03 Andrew Pinski <apinski@cavium.com> + + * config/mips/mips-cpus.def (octeon3): New cpu. + * config/mips/mips.c (mips_rtx_cost_data): Add octeon3. + (mips_print_operand <case 'T', case 't'>): Fix a bug as the mode + of the comparison no longer matches mode of the operands. + (mips_issue_rate): Handle PROCESSOR_OCTEON3. + * config/mips/mips.h (TARGET_OCTEON): Add Octeon3. + (TARGET_OCTEON2): Likewise. + (TUNE_OCTEON): Add Octeon3. + * config/mips/mips.md (processor): Add octeon3. + * config/mips/octeon.md (octeon_fpu): New automaton and cpu_unit. + (octeon_arith): Add octeon3. + (octeon_condmove): Remove. + (octeon_condmove_o1): New reservation. + (octeon_condmove_o2): New reservation. + (octeon_condmove_o3_int_on_cc): New reservation. + (octeon_load_o2): Add octeon3. + (octeon_cop_o2): Likewise. + (octeon_store): Likewise. + (octeon_brj_o2): Likewise. + (octeon_imul3_o2): Likewise. + (octeon_imul_o2): Likewise. + (octeon_mfhilo_o2): Likewise. + (octeon_imadd_o2): Likewise. + (octeon_idiv_o2_si): Likewise. + (octeon_idiv_o2_di): Likewise. + (octeon_fpu): Add to the automaton. + (octeon_fpu): New cpu unit. + (octeon_condmove_o2): Check for non floating point modes. + (octeon_load_o2): Add prefetchx. + (octeon_cop_o2): Don't check for octeon3. + (octeon3_faddsubcvt): New reservation. + (octeon3_fmul): Likewise. + (octeon3_fmadd): Likewise. + (octeon3_div_sf): Likewise. + (octeon3_div_df): Likewise. + (octeon3_sqrt_sf): Likewise. + (octeon3_sqrt_df): Likewise. + (octeon3_rsqrt_sf): Likewise. + (octeon3_rsqrt_df): Likewise. + (octeon3_fabsnegmov): Likewise. + (octeon_fcond): Likewise. + (octeon_fcondmov): Likewise. + (octeon_fpmtc1): Likewise. + (octeon_fpmfc1): Likewise. + (octeon_fpload): Likewise. + (octeon_fpstore): Likewise. + * config/mips/mips-tables.opt: Regenerate. + * doc/invoke.texi (-march=@var{arch}): Add octeon3. + +2014-11-03 Zhenqiang Chen <zhenqiang.chen@arm.com> + + * ifcvt.c (noce_emit_cmove, noce_get_alt_condition, noce_get_condition): + Allow CC mode if HAVE_cbranchcc4. + +2014-11-02 Richard Sandiford <richard.sandiford@arm.com> + + * config/arc/arc.c (write_ext_corereg_1): Delete. + (arc_write_ext_corereg): Use FOR_EACH_SUBRTX. + +2014-11-02 Richard Sandiford <richard.sandiford@arm.com> + + * config/arc/arc.c (arc600_corereg_hazard_1): Delete. + (arc600_corereg_hazard): Use FOR_EACH_SUBRTX. + +2014-11-02 Richard Sandiford <richard.sandiford@arm.com> + + * config/arc/arc.c (arc_rewrite_small_data_p): Constify argument. + (small_data_pattern_1): Delete. + (small_data_pattern): Use FOR_EACH_SUBRTX. + +2014-11-02 Richard Sandiford <richard.sandiford@arm.com> + + * config/arc/arc.c: Include rtl-iter.h. + (arc_rewrite_small_data_1): Delete. + (arc_rewrite_small_data): Use FOR_EACH_SUBRTX_PTR. + +2014-11-02 Michael Collison <michael.collison@linaro.org> + + * config/arm/arm.h (CLZ_DEFINED_VALUE_AT_ZERO) : Update + to support vector modes. + (CTZ_DEFINED_VALUE_AT_ZERO): Ditto. + +2014-11-01 Andrew MacLeod <amacleod@redhat,com> + + * optabs.h: Flatten insn-codes.h to source files. Move some prototypes + and structs to genopinit.c. Adjust protyoptypes to match optabs.c. + * genopinit.c (main): Emit prototypes and structs into insn-opinit.h. + * optabs.c: (gen_move_insn): Move to expr.c. + * expr.h: Move protypes and enums to optabs.h. + * expr.c: (gen_move_insn): Relocate from optabs.c. + * genemit.c (main): Include insn-codes.h. + * gengtype.c (open_base_files): Include insn-codes.h. + * asan.c: Include insn-codes.h. * genattrtab.c (write_header): Include hash-set.h, machmode.h, vec.h, double-int.h, input.h, alias.h, symtab.h, options.h fold-const.h, wide-int.h, and inchash.h when generating diff --git a/gcc/cgraph.c b/gcc/cgraph.c index b28966e5185..29090a209e5 100644 --- a/gcc/cgraph.c +++ b/gcc/cgraph.c @@ -1986,6 +1986,18 @@ cgraph_node::dump (FILE *f) fprintf (f," static_constructor (priority:%i)", get_init_priority ()); if (DECL_STATIC_DESTRUCTOR (decl)) fprintf (f," static_destructor (priority:%i)", get_fini_priority ()); + if (frequency == NODE_FREQUENCY_HOT) + fprintf (f, " hot"); + if (frequency == NODE_FREQUENCY_UNLIKELY_EXECUTED) + fprintf (f, " unlikely_executed"); + if (frequency == NODE_FREQUENCY_EXECUTED_ONCE) + fprintf (f, " executed_once"); + if (only_called_at_startup) + fprintf (f, " only_called_at_startup"); + if (only_called_at_exit) + fprintf (f, " only_called_at_exit"); + if (opt_for_fn (decl, optimize_size)) + fprintf (f, " optimize_size"); fprintf (f, "\n"); |