diff options
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/alpha/alpha.c | 6 | ||||
| -rw-r--r-- | gcc/config/alpha/alpha.md | 13 |
3 files changed, 23 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 85e2b6336ec..b4259e8c838 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2000-10-05 Richard Henderson <rth@cygnus.com> + + * config/alpha/alpha.c (alpha_emit_setcc): Don't swap GT tests + when second op1 is const0_rtx. Validate op0 as a register. + * config/alpha/alpha.md (setcc_internal): Don't allow constants + in the first argument of the compare. + (setcc_swapped_internal): Likewise. + (setne_internal): Likewise. + 2000-10-05 Geoff Keating <geoffk@cygnus.com> * tree.c (tree_size): New function split out of copy_node. diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index 32373cb3577..87455423811 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -1816,6 +1816,10 @@ alpha_emit_setcc (code) break; case GE: case GT: case GEU: case GTU: + /* These are normally need swapping, but for integer zero we have + special patterns that recognize swapped operands. */ + if (!fp_p && op1 == const0_rtx) + break; code = swap_condition (code); if (fp_p) cmp_code = code, code = NE; @@ -1828,7 +1832,7 @@ alpha_emit_setcc (code) if (!fp_p) { - if (!reg_or_0_operand (op0, DImode)) + if (!register_operand (op0, DImode)) op0 = force_reg (DImode, op0); if (!reg_or_8bit_operand (op1, DImode)) op1 = force_reg (DImode, op1); diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 23d0365b5c3..d01025b4e67 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -2523,18 +2523,21 @@ (define_insn "*setcc_internal" [(set (match_operand 0 "register_operand" "=r") (match_operator 1 "alpha_comparison_operator" - [(match_operand:DI 2 "reg_or_0_operand" "rJ") + [(match_operand:DI 2 "register_operand" "r") (match_operand:DI 3 "reg_or_8bit_operand" "rI")]))] "GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_INT && GET_MODE_SIZE (GET_MODE (operands[0])) <= 8 && GET_MODE (operands[0]) == GET_MODE (operands[1])" - "cmp%C1 %r2,%3,%0" + "cmp%C1 %2,%3,%0" [(set_attr "type" "icmp")]) +;; Yes, we can technically support reg_or_8bit_operand in operand 2, +;; but that's non-canonical rtl and allowing that causes inefficiencies +;; from cse on. (define_insn "*setcc_swapped_internal" [(set (match_operand 0 "register_operand" "=r") (match_operator 1 "alpha_swapped_comparison_operator" - [(match_operand:DI 2 "reg_or_8bit_operand" "rI") + [(match_operand:DI 2 "register_operand" "r") (match_operand:DI 3 "reg_or_0_operand" "rJ")]))] "GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_INT && GET_MODE_SIZE (GET_MODE (operands[0])) <= 8 @@ -2542,10 +2545,12 @@ "cmp%c1 %r3,%2,%0" [(set_attr "type" "icmp")]) +;; Use match_operator rather than ne directly so that we can match +;; multiple integer modes. (define_insn "*setne_internal" [(set (match_operand 0 "register_operand" "=r") (match_operator 1 "signed_comparison_operator" - [(match_operand:DI 2 "reg_or_8bit_operand" "rI") + [(match_operand:DI 2 "register_operand" "r") (const_int 0)]))] "GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_INT && GET_MODE_SIZE (GET_MODE (operands[0])) <= 8 |