diff options
Diffstat (limited to 'gcc')
1125 files changed, 19078 insertions, 7146 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d4f4dee2714..eb945484a55 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,1246 @@ +2017-06-26 Richard Biener <rguenther@suse.de> + + PR tree-optimization/80928 + * cfghooks.c (duplicate_block): Do not copy BB_DUPLICATED flag. + (copy_bbs): Set BB_DUPLICATED flag early. + (execute_on_growing_pred): Do not execute for BB_DUPLICATED + marked blocks. + (execute_on_shrinking_pred): Likewise. + * tree-ssa.c (ssa_redirect_edge): Do not look for PHI args in + BB_DUPLICATED blocks. + * tree-ssa-phionlycoprop.c (eliminate_degenerate_phis_1): Properly + iterate over all PHIs considering removal of *gsi. + +2017-06-23 Jim Wilson <jim.wilson@linaro.org> + + * doc/invoke.texi (AArch64 Options, -mtune): Re-add falkor and + qdf24xx. + +2017-06-23 Aaron Sawdey <acsawdey@linux.vnet.ibm.com> + + * config/rs6000/rs6000-string.c: (expand_block_clear, + do_load_for_compare, select_block_compare_mode, + compute_current_alignment, expand_block_compare, + expand_strncmp_align_check, expand_strn_compare, + expand_block_move, rs6000_output_load_multiple) + Move functions related to string/block move/compare + to a separate file. + * config/rs6000/rs6000.c: Move above functions to rs6000-string.c. + * config/rs6000/rs6000-protos.h (rs6000_emit_dot_insn): Add prototype + for this function which is now used in two files. + * config/rs6000/t-rs6000: Add rule to compile rs6000-string.o. + * config.gcc: Add rs6000-string.o to extra_objs for + targets powerpc*-*-* and rs6000*-*-*. + +2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/80510 + * config/rs6000/rs6000.md (ALTIVEC_DFORM): Do not allow DImode in + 32-bit, since indexed is not valid for DImode. + (mov<mode>_hardfloat32): Reorder ISA 2.07 load/stores before ISA + 3.0 d-form load/stores to be the same as mov<mode>_hardfloat64. + (define_peephole2 for Altivec d-form load): Add 32-bit support. + (define_peephole2 for Altivec d-form store): Likewise. + + PR ipa/81185 + * multiple_target.c (create_dispatcher_calls): Only create the + dispatcher call if the function is the default clone of a + versioned function. + +2017-06-23 Segher Boessenkool <segher@kernel.crashing.org> + + PR middle-end/80902 + * builtins.c (expand_builtin_atomic_fetch_op): If emitting code after + a call, force the call to not be a tail call. + +2017-06-23 Jeff Law <law@redhat.com> + + * doc/contrib.texi: Add entry for Steven Pemberton's work on + enquire. + +2017-06-23 Will Schmidt <will_schmidt@vnet.ibm.com> + + * config/rs6000/rs6000.c: Add include of ssa-propagate.h for + update_call_from_tree(). (rs6000_gimple_fold_builtin): Add + handling for early expansion of vector shifts (sl,sr,sra,rl). + (builtin_function_type): Add vector shift right instructions + to the unsigned argument list. + +2017-06-23 Bernd Edlinger <bernd.edlinger@hotmail.de> + + rtl-optimizatoin/79286 + * ira.c (update_equiv_regs): Revert to using may_trap_or_fault_p again. + * rtlanal.c (rtx_addr_can_trap_p_1): SYMBOL_REF_FUNCTION_P can never + trap. PIC register plus a const unspec without offset can never trap. + +2017-06-23 Marc Glisse <marc.glisse@inria.fr> + + * tree.h (builtin_structptr_type): New type. + (builtin_structptr_types): Declare new array. + * tree.c (builtin_structptr_types): New array. + (free_lang_data, build_common_tree_nodes): Use it. + +2017-06-23 Jonathan Wakely <jwakely@redhat.com> + + PR c++/81187 + * doc/invoke.texi (-Wnoexcept-type): Fix name of option, from + -Wnoexcept. + +2017-06-22 Matt Turner <mattst88@gmail.com> + + * config/i386/driver-i386.c (host_detect_local_cpu): Add Kaby + Lake models to skylake case. Assume skylake for unknown + models with clflushopt. + +2017-06-22 Jeff Law <law@redhat.com> + + * config/aarch64/aarch64.c (aarch64_emit_probe_stack_range): Handle + frame sizes that do not satisfy aarch64_uimm12_shift. + +2017-06-22 Jan Hubicka <hubicka@ucw.cz> + + * profile-count.h (apply_probability, + apply_scale, probability_in): Fix checks for zero. + +2017-06-22 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * incpath.c (add_sysroot_to_chain): Allow for $SYSROOT prefix. + * doc/cppdiropts.texi (-I @var{dir}): Document it. + +2016-06-22 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_model_reduction_cost): Handle + COND_REDUCTION and INTEGER_INDUC_COND_REDUCTION without + REDUC_MAX_EXPR support. + (vectorizable_reduction): Likewise. + (vect_create_epilog_for_reduction): Likewise. + +2017-06-22 James Greenhalgh <james.greenhalgh@arm.com> + + * match.pd (A / (1 << B) -> A >> B): New. + * generic-match-head.c: Include optabs-tree.h. + * gimple-match-head.c: Likewise. + * optabs-tree.h (target_supports_op_p): New. + * optabs-tree.c (target_supports_op_p): New. + +2017-06-22 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * configure.ac (gcc_cv_ld_static_dynamic): Also check stderr for + $gcc_cv_ld --help output. + (gcc_cv_ld_demangle): Likewise. + (gcc_cv_ld_eh_frame_hdr): Likewise. + (gcc_cv_ld_pie): Likewise. + (gcc_cv_ld_as_needed): Likewise. Prefer native forms unless $gnu_ld. + (gcc_cv_ld_buildid): Likewise. + (gcc_cv_ld_sysroot): Likewise. + (ld_bndplt_support): Likewise. + (ld_pushpopstate_support): Likewise. + * configure: Regenerate. + * config/sol2.h [!USE_GLD] (SYSROOT_SPEC): Define. + +2017-06-21 Jakub Jelinek <jakub@redhat.com> + + PR target/81151 + * config/i386/sse.md (round<mode>2): Renumber match_dup and + operands indexes to avoid gap between operands and match_dups. + +2017-06-21 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/aarch64-cost-tables.h (thunderx_extra_costs): + Increment Arith_shift and Arith_shift_reg by 1. + * config/aarch64/aarch64-tuning-flags.def (cheap_shift_extend): + New tuning flag. + * config/aarch64/aarch64.c (thunderx_tunings): Enable + AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND. + (aarch64_strip_extend): Add new argument and test for it. + (aarch64_cheap_mult_shift_p): New function. + (aarch64_rtx_mult_cost): Call aarch64_cheap_mult_shift_p and don't + add a cost if it is true. + Update calls to aarch64_strip_extend. + (aarch64_rtx_costs): Update calls to aarch64_strip_extend. + +2017-06-21 Andrew Pinski <apinski@cavium.com> + + * config/aarch64/aarch64-cores.def (thunderxt88p1): Use thunderxt88 + tunings. + (thunderxt88): Likewise. + * config/aarch64/aarch64.c (thunderxt88_prefetch_tune): New variable. + (thunderx_prefetch_tune): New variable. + (thunderx2t99_prefetch_tune): Update for the correct values. + (thunderxt88_tunings): New variable. + (thunderx_tunings): Use thunderx_prefetch_tune instead of + generic_prefetch_tune. + (thunderx2t99_tunings): Use AUTOPREFETCHER_WEAK. + +2017-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>_lse, + SHORT): Relax operand 3 to aarch64_reg_or_zero and constraint to Z. + (aarch64_compare_and_swap<mode>_lse, GPI): Likewise. + (aarch64_atomic_cas<mode>, SHORT): Likewise for operand 2. + (aarch64_atomic_cas<mode>, GPI): Likewise. + +2017-06-21 Martin Liska <mliska@suse.cz> + + * gimplify.c (gimplify_label_expr): Insert GIMPLE_PREDICT + statements on cold and hot labels. + * predict.c (tree_estimate_probability_bb): Remove the + prediction from this place. + +2017-06-21 Martin Liska <mliska@suse.cz> + + PR tree-optimization/79489 + * gimplify.c (maybe_add_early_return_predict_stmt): New + function. + (gimplify_return_expr): Call the function. + * predict.c (tree_estimate_probability_bb): Remove handling + of early return. + * predict.def: Update comment about early return predictor. + * gimple-predict.h (is_gimple_predict): New function. + * predict.def: Change default value of early return to 66. + * tree-tailcall.c (find_tail_calls): Skip GIMPLE_PREDICT + statements. + * passes.def: Put pass_strip_predict_hints to the beginning of + IPA passes. + +2017-06-21 Pierre-Marie de Rodat <derodat@adacore.com> + + * dwarf2out.c (gen_decl_die): Remove the guard to skip file-scope + FUNCTION_DECL declarations. + (dwarf2out_early_global_decl): Remove the guard to skip FUNCTION_DECL + declarations. + (dwaf2out_decl): Likewise. + * godump.c (go_early_global_decl): Skip call to the real debug hook + for FUNCTION_DECL declarations. + * passes.c (rest_of_decl_compilation): Skip call to the + early_global_decl debug hook for FUNCTION_DECL declarations, unless + -fdump-go-spec is passed. + +2017-06-21 Marc Glisse <marc.glisse@inria.fr> + + * config/i386/i386.c (struct builtin_isa): New field pure_p. + Reorder for compactness. + (def_builtin, def_builtin2, ix86_add_new_builtins): Handle pure_p. + (def_builtin_pure, def_builtin_pure2): New functions. + (ix86_init_mmx_sse_builtins) [__builtin_ia32_stmxcsr]: Mark as pure. + +2017-06-21 Marc Glisse <marc.glisse@inria.fr> + + * match.pd (nop_convert): New predicate. + ((A +- CST1) +- CST2): Allow some NOP conversions. + +2017-06-21 Jakub Jelinek <jakub@redhat.com> + + PR c++/81130 + * gimplify.c (omp_add_variable): Don't force GOVD_SEEN for types + with ctors/dtors if GOVD_SHARED is set. + +2017-06-21 Wilco Dijkstra <wdijkstr@arm.com> + + * config/aarch64/aarch64.md (movti_aarch64): + Emit mov rather than orr. + (movtf_aarch64): Likewise. + * config/aarch64/aarch64-simd.md (aarch64_simd_mov): + Emit mov rather than orr. + +2017-06-21 Wilco Dijkstra <wdijkstr@arm.com> + + * config/aarch64/aarch64-simd.md (aarch64_simd_dup): + Swap alternatives, make integer dup more expensive. + +2017-06-21 Wilco Dijkstra <wdijkstr@arm.com> + + * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): + Return true for non-tls symbols. + +2017-06-21 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-cores.def (cortex-a55): New. + (cortex-a75): Likewise. + (cortex-a75.cortex-a55): Likewise. + * config/aarch64/aarch64-tune.md: Regenerate. + * doc/invoke.texi (-mtune): Document new values for -mtune. + +2017-06-21 Tom de Vries <tom@codesourcery.com> + + * doc/sourcebuild.texi (Add Options, Features for dg-add-options): Add + stack_size feature. + (Effective-Target Keywords, Other attributes): Suggest using + dg-add-options stack_size feature to get stack limit in stack_size + effective target documentation. + +2017-06-21 Julian Brown <julian@codesourcery.com> + Naveen H.S <Naveen.Hurugalawadi@cavium.com> + + * config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi) + (aarch64_crypto_pmullv2di): Change type attribute to crypto_pmull. + * config/aarch64/thunderx2t99.md (thunderx2t99_pmull): New + reservation. + * config/arm/cortex-a53.md (cortex_a53_advsimd_type): Add crypto_pmull to + attribute type list for neon_multiply. + * config/arm/cortex-a57.md (cortex_a57_neon_type): Add crypto_pmull to + attribute type list for neon_multiply. + * config/arm/crypto.md (crypto_vmullp64): Change type to crypto_pmull. + * config/arm/exynos-m1.md (exynos_m1_neon_type): Add crypto_pmull to + attribute type list for neon_multiply. + * config/arm/types.md (crypto_pmull): Add. + * config/arm/xgene1.md (xgene1_neon_pmull): Add crypto_pmull to + attribute type list. + +2017-06-20 Andreas Tobler <andreast@gcc.gnu.org> + + * config.gcc (armv6*-*-freebsd*): Change the target_cpu_cname to + arm1176jzf-s. + +2017-06-20 Jakub Jelinek <jakub@redhat.com> + + * ira-costs.c (find_costs_and_classes): Initialize cost_classes later + to make sure not to dereference a NULL cost_classes_ptr pointer. + +2017-06-20 Carl Love <cel@us.ibm.com> + + * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add + ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW, + ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries. + * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin, + builtin_function_type): Add ALTIVEC_BUILTIN_* case statements. + * config/rs6000/altivec.md (MVULEUW, VMULESW, VMULOUW, + VMULOSW): New enum "unspec" values. + (vec_widen_umult_even_v4si, vec_widen_smult_even_v4si, + vec_widen_umult_odd_v4si, vec_widen_smult_odd_v4si, + altivec_vmuleuw, altivec_vmulesw, altivec_vmulouw, + altivec_vmulosw): New patterns. + * config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW, + VMULOSW): Add definitions. + +2017-06-20 Julia Koval <julia.koval@intel.com> + + * config/i386/i386.c: Fix rounding expand for new pattern. + * config/i386/subst.md: Fix pattern (parallel -> unspec). + +2017-06-20 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-option-extensions.def (rcpc): New. + * config/aarch64/aarch64.h (AARCH64_FL_RCPC): New. + +2017-06-20 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-option-extensions.def (fp16): Fix expected + feature string. + +2017-06-20 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/aarch64-cores.def: Rearrange to sort by + architecture, then by implementer ID. + * config/aarch64/aarch64-tune.md: Regenerate. + +2017-06-20 Richard Biener <rguenther@suse.de> + + PR middle-end/81097 + * fold-const.c (split_tree): Fold to type before negating. + +2017-06-20 David Malcolm <dmalcolm@redhat.com> + + * diagnostic-show-locus.c + (selftest::test_fixit_deletion_affecting_newline): New function. + (selftest::diagnostic_show_locus_c_tests): Call it. + +2017-06-20 Andreas Schwab <schwab@suse.de> + + PR target/80970 + * config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d" + instead of "+d". + +2017-06-20 Prakhar Bahuguna <prakhar.bahuguna@arm.com> + + * config/arm/arm-c.c (arm_cpu_builtins): New block to define + __ARM_FEATURE_COPROC according to support. + +2017-06-20 Jakub Jelinek <jakub@redhat.com> + + * tree-chkp.c (chkp_get_hard_register_var_fake_base_address): + Rewritten to avoid overflow for > 32-bit pointers. + + PR sanitizer/81125 + * ubsan.h (ubsan_encode_value): Workaround buggy clang++ parser + by removing enum keyword. + (ubsan_type_descriptor): Likewise. Formatting fix. + + PR target/81121 + * config/i386/i386.md (TARGET_USE_VECTOR_CONVERTS float si->{sf,df} + splitter): Require TARGET_SSE2 in the condition. + +2017-06-20 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/79799 + * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add support + for doing vector set of SFmode on ISA 3.0. + * config/rs6000/vsx.md (vsx_set_v4sf_p9): Likewise. + (vsx_set_v4sf_p9_zero): Special case setting 0.0f to a V4SF + element. + (vsx_insert_extract_v4sf_p9): Add an optimization for inserting a + SFmode value into a V4SF variable that was extracted from another + V4SF variable without converting the element to double precision + and back to single precision vector format. + (vsx_insert_extract_v4sf_p9_2): Likewise. + +2017-06-19 Jakub Jelinek <jakub@redhat.com> + + * tree-ssa-structalias.c (get_constraint_for_ptr_offset): Multiply + in UWHI to avoid undefined overflow. + + PR sanitizer/81125 + * ubsan.h (enum ubsan_encode_value_phase): New. + (ubsan_encode_value): Change second argument to + enum ubsan_encode_value_phase with default value of + UBSAN_ENCODE_VALUE_GENERIC. + * ubsan.c (ubsan_encode_value): Change second argument to + enum ubsan_encode_value_phase PHASE from bool IN_EXPAND_P, + adjust uses, for UBSAN_ENCODE_VALUE_GENERIC use just + create_tmp_var_raw instead of create_tmp_var and use a + TARGET_EXPR. + (ubsan_expand_bounds_ifn, ubsan_build_overflow_builtin, + instrument_bool_enum_load, ubsan_instrument_float_cast): Adjust + ubsan_encode_value callers. + + PR sanitizer/81111 + * ubsan.c (ubsan_encode_value): If current_function_decl is NULL, + use create_tmp_var_raw instead of create_tmp_var, mark it addressable + just by setting TREE_ADDRESSABLE on the result and use a TARGET_EXPR. + +2017-06-19 Richard Biener <rguenther@suse.de> + + PR middle-end/81118 + * tree-cfgcleanup.c (cleanup_tree_cfg_noloop): Clear niter + estimates if we changed anything. + +2017-06-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/80887 + * tree-ssa-sccvn.c (mprts_hook_cnt): New global. + (vn_lookup_simplify_result): Allow only mprts_hook_cnt succesful + simplified lookups, then reset mprts_hook. + (vn_nary_build_or_lookup_1): Set mprts_hook_cnt to 9 before + simplifying. + (try_to_simplify): Likewise. + +2017-06-19 Martin Liska <mliska@suse.cz> + + PR sanitizer/80879 + * gimplify.c (gimplify_switch_expr): + Initialize live_switch_vars for SWITCH_BODY == STATEMENT_LIST. + +2017-06-19 Martin Liska <mliska@suse.cz> + + * doc/install.texi: Document that PGO runs in 4 stages. + +2017-06-19 Martin Liska <mliska@suse.cz> + + PR ipa/80732 + * attribs.c (make_dispatcher_decl): Do not append '.ifunc' + to dispatcher function name. + * multiple_target.c (replace_function_decl): New function. + (create_dispatcher_calls): Redirect both edges and references. + +2017-06-19 Jan Hubicka <hubicka@ucw.cz> + + * profile-count.c (profile_count::dump): Dump quality. + (profile_count::differs_from_p): Update for unsigned val. + * profile-count.h (profile_count_quality): New enum. + (profile_count): Turn m_val to 62bit unsigned, add quality tracking. + +2017-06-19 Richard Biener <rguenther@suse.de> + + * tree-ssa-loop-niter.h (estimate_numbers_of_iterations): Take + struct function as arg. + (estimate_numbers_of_iterations): Export overload with loop arg. + (free_numbers_of_iterations_estimates_loop): Use an overload of + free_numbers_of_iterations_estimates instead. + * tree-cfg.c (remove_bb): Adjust. + * tree-cfgcleanup.c (remove_forwarder_block_with_phi): Likewise. + * tree-parloops.c (gen_parallel_loop): Likewise. + * tree-ssa-loop-ivcanon.c (canonicalize_induction_variables): + Likewise. + (tree_unroll_loops_completely): Likewise. + * tree-ssa-loop-niter.c (estimate_numbers_of_iterations_loop): + Use an overload instead and export. + (estimated_loop_iterations): Adjust. + (max_loop_iterations): Likewise. + (likely_max_loop_iterations): Likewise. + (estimate_numbers_of_iterations): Take struct function as arg + and adjust. + (loop_exits_before_overflow): Adjust. + (free_numbers_of_iterations_estimates_loop): Use an overload. + * tree-vect-loop.c (vect_analyze_loop_form): Adjust. + * tree-vectorizer.c (vect_free_loop_info_assumptions): Likewise. + +2017-06-19 Richard Biener <rguenther@suse.de> + + PR ipa/81112 + * ipa-prop.c (find_constructor_constant_at_offset): Handle + RANGE_EXPR conservatively. + +2017-06-16 Carl Love <cel@us.ibm.com> + + * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add + definitions for vec_float, vec_float2, vec_floato, + vec_floate built-ins. + * config/rs6000/vsx.md (define_c_enum "unspec"): Add RTL code + for instructions vsx_xvcvsxws vsx_xvcvuxwsp, float2, floato and + floate. + * config/rs6000/rs6000-builtin.def (FLOAT2_V2DI, FLOATE_V2DF, + FLOATE_2DI, FLOATO_V2DF, FLOATEE_V2DI, XVCVSXWSP_V4SF, + UNS_FLOATO_V2DI, UNS_FLOATE_V2DI): Add definitions. + * config/altivec.md (define_insn "p8_vmrgew_<mode>", + define_mode_attr VF_sxddp): Add V4SF type to p8_vmrgew. + * config/rs6000/altivec.h (vec_float, vec_float2, vec_floate, + vec_floato): Add builtin defines. + * doc/extend.texi (vec_float, vec_float2, vec_floate, vec_floato): + Update the built-in documentation file for the new built-in + functions. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.opt (marm): Mark as the negative of of -mthumb. + (mthumb): Mark as the negative of -marm. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * doc/invoke.texi (ARM Options, -mcpu): Document supported + extension options. + (ARM Options, -mtune): Document that this accepts the same + extension options as -mcpu. + (ARM Options, -mfpu): Document addition of -mfpu=auto. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * doc/invoke.texi (ARM Options, -march=): Document new syntax and + permitted extensions. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-cpus.in (armv7): Add extension +nofp. + (armv7-r): Add aliases vfpv3xd and vfpv3-d16. + (armv8-m.main): Add option +nodsp. + * config/arm/arm-cpu-cdata.h: Regenerated. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/t-fuchsia: New file. + * config.gcc (arm*-*-fuchsia*): Use it. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/t-symbian: Rewrite for new option infrastructure. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/t-phoenix (MULTILIB_REUSE): Clear variable. + (MULTILIB_REQUIRED): Likewise. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/t-linux-eabi (MULTILIB_EXCEPTIONS): Set to empty. + (MULTILIB_RESUE): Likewise. + (MULTILIB_MATCHES): Likewise. + (MULTLIB_REQUIRED): Likewise. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/t-rtems: Rewrite for new option framework. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/t-aprofile (v7_a_nosimd_variants, v7_a_simd_variants) + (v7ve_nosimd_variatns, v7ve_vfpv3_simd_variants) + (v7ve_vfpv4_simd_variants, v8_a_nosimd_variants, v8_a_simd_variants) + (v8_1_a_simd_variants, v8_2_a_simd_variants): Move to ... + * config/arm/t-multilib: ... here. + (MULTILIB_OPTIONS): Add armv7 and armv7+fp architectures. + (MULTILIB_MATCHES): Use armv7 libraries for armv7-r. Also use for + armv7-a and armv8*-a when A-profile libraries have not been built. + * config/arm/t-rmprofile: Rewrite. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * genmultilib (multilib_reuse): Allow an explicit period to be escaped + with a backslash. Remove the backslash after substituting unescaped + periods. + * doc/fragments.texi (MULTILIB_REUSE): Document it. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config.gcc: (arm*-*-*): When building a-profile libraries, force + the driver to pass through the default setting of -mfloat-abi. + * common/config/arm/arm-common.c (arm_target_thumb_only): Return -marm + rather than NULL. + * config/arm/t-multilib (MULTILIB_REUSE): Initialize to empty. + (all_feat_combs): New rule. + (MULTILIB_OPTIONS): Use explicit ARM and Thumb directories. Rework + default libraries. + * config/arm/t-aprofile: Rewrite. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.h (FPUTYPE_AUTO): Define. + * config/arm/arm.c (arm_option_override): Use FPUTYPE_AUTO if the + fpu is not specified by the user/command-line. + * config/arm/bpabi.h (FPUTYPE_DEFAULT): Delete. + * config/arm/netbsd-elf.h (FPUTYPE_DEFAULT): Delete. + * config/arm/linux-elf.h (FPUTYPE_DEFAULT): Delete. + * config/arm/vxworks.h (FPUTYPE_DEFAULT): Delete. + * common/config/arm/arm-common.c (arm_canon_arch_option): Use + FPUTYPE_AUTO insted of FPUTYPE_DEFAULT. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/elf.h (MULTILIB_DEFAULTS): Delete. + * config/arm/t-arm-elf: Rewritten. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.h (TARGET_HARD_FLOAT): Also check that we + have some floating-point instructions. + (TARGET_SOFT_FLOAT): Define as inverse of TARGET_HARD_FLOAT. + (TARGET_MAYBE_HARD_FLOAT): New macro. + * config/arm/arm-builtins.c (arm_init_builtins): Use + TARGET_MAYBE_HARD_FLOAT. + * config/arm/arm.c (arm_option_override): Use TARGET_HARD_FLOAT_ABI. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * common/config/arm/arm-common.c: Define INCLUDE_LIST. + (configargs.h): Include it. + (arm_print_hint_for_fpu_option): New function. + (arm_parse_fpu_option): New function. + (candidate_extension): New class. + (arm_canon_for_multilib): New function. + * config/arm/arm.h (CANON_ARCH_SPEC_FUNCTION): New macro. + (EXTRA_SPEC_FUNCTIONS): Add CANON_ARCH_SPEC_FUNCTION. + (ARCH_CANONICAL_SPECS): New macro. + (DRIVER_SELF_SPECS): Add ARCH_CANONICAL_SPECS. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config.gcc (arm*-*-*): Ensure both target_cpu_cname and with_cpu + are set after handling multilib fragments. Set target_cpu_default2 + from with_cpu. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config.gcc (arm*-*-fucshia*): Set target_cpu_cname to the real + cpu name. + (arm*-*-*): Set target_cpu_default2 to a quoted string. + * config/arm/parsecpu.awk (check_cpu): Validate any extension + options. + (check_arch): Likewise. + * config/arm/arm.c (arm_configure_build_target): Handle + TARGET_CPU_DEFAULT being a string constant. Scan any feature + options in the default. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-protos.h (cpu_arch_extension): Add field to record + when an option is an alias of another. + * config/arm/parsecpu.awk (optalias): New parser token. + (gen_comm_data): Mark non-alias options as such. Emit entries + for extension aliases. + * config/arm/arm-cpus.in (armv5e): Make vfpv2 an alias. + (armv5te, armv5tej, armv6, armv6j, armv6k, armv6z): Likewise. + (armv6kz, armv6zk, armv6t2): Likewise. + (armv7): Make vfpv3-d16 an alias. + (armv7-a): Make vfpv3-d16, neon and neon-vfpv3 aliases. Sort in + canonical order. + (armv7ve): Make vfpv4-d16, neon-vfpv3 and neon-vfpv4 aliases. + Sort in canonical order. + (armv8-a): Sort in canonical order. + (armv8.1-a, armv8.2-a): Likewise. + (generic-armv7-a): Make neon and neon-vfpv3 aliases. Sort in + canonical order. + (cortex-a9): Sort in canonical order. + * config/arm/arm.c (selftests.h): Include it. + (arm_test_cpu_arch_data): New function. + (arm_run_self_tests): New function. + (TARGET_RUN_TARGET_SELFTESTS): Redefine. + (targetm): Move declaration to the end of the file. + * arm-cpu-cdata.h: Regenerated. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.h (TARGET_MODE_SPECS): Add additional parameter to + call to target_mode_check describing the type of option passed. + * common/config/arm/arm-common.c (arm_arch_core_flag): Delete. + (arm_target_thumb_only): Use arm_parse_arch_option_name or + arm_parse_cpu_option_name to match parameters against list of + available targets. + * config/arm/parsecpu.awk (gen_comm_data): Don't generate + arm_arch_core_flags data structure. + * config/arm/arm-cpu_cdata.h: Regenerated. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * common/config/arm/arm-common.c (arm_initialize_isa): Moved here from + config/arm/arm.c. + (arm_print_hint_for_cpu_option): Likewise. + (arm_print_hint_for_arch_option): Likewise. + (arm_parse_cpu_option_name): Likewise. + (arm_parse_arch_option_name): Likewise. + * config/arm/arm.c (arm_identify_fpu_from_isa): Use the computed number + of entries in the all_fpus list. + * config/arm/arm-protos.h (all_architectures, all_cores): Declare. + (arm_parse_cpu_option_name): Declare. + (arm_parse_arch_option_name): Declare. + (arm_parse_option_features): Declare. + (arm_intialize_isa): Declare. + * config/arm/parsecpu.awk (gen_data): Move CPU and architecture + data tables to ... + (gen_comm_data): ... here. Make definitions non-static. + * config/arm/arm-cpu-data.h: Regenerated. + * config/arm/arm-cpu-cdata.h: Regenerated. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-protos.h (arm_build_target): Remove arch_core. + (cpu_arch_extension): New structure. + (cpu_arch_option, arch_option, cpu_option): New structures. + * config/arm/parsecpu.awk (gen_headers): Build an enumeration of + architecture types. + (gen_data): Generate new format data tables. + * config/arm/arm.c (cpu_tune): New structure. + (cpu_option, processors): Delete. + (arm_print_hint_for_core_or_arch): Delete. Replace with ... + (arm_print_hint_for_cpu_option): ... this and ... + (arm_print_hint_for_arch_option): ... this. + (arm_parse_arch_cpu_name): Delete. Replace with ... + (arm_parse_cpu_option_name): ... this and ... + (arm_parse_arch_option_name): ... this. + (arm_unrecognized_feature): Change type of target parameter to + cpu_arch_option. + (arm_parse_arch_cpu_features): Delete. Replace with ... + (arm_parse_option_features): ... this. + (arm_configure_build_target): Rework to use new configuration data + tables. + (arm_print_tune_info): Rework for new configuration data tables. + * config/arm/arm-cpu-data.h: Regenerated. + * config/arm/arm-cpu.h: Regenerated. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * Makefile.in (OBJS): Move sbitmap.o from here ... + (OBJS-libcommon): ... to here. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-isa.h (ISA_ALL_FPU_INTERNAL): Renamed from ISA_ALL_FPU. + (ISA_ALL_CRYPTO): New macro. + (ISA_ALL_SIMD): New macro + (ISA_ALL_FP): New macro. + * config/arm/arm.c (fpu_bitlist): Update initializer. + * config/arm/arm-cpus.in: Use new ISA_ALL macros to disable crypto, + simd or fp. + (arm9e): Add fpu. Add option for nofp + (arm946e-s, arm966e-s, arm968e-s, arm10e, arm1020e, arm1022e): Likewise. + (arm926ej-s, arm1026ej-s): Likewise. + (generic-armv7-a): Add fpu. Add options for simd, vfpv3, vfpv3-d16, + vfpv3-fp16, vfpv3-d16-fp16, vfpv4, vfpv4-d16, neon, neon-vfp3, + neon-fp16, neon-vfpv4, nofp and nosimd. + (cortex-a5, cortex-a7): Add fpu. Add options for nosimd and nofp. + (cortex-a8): Add fpu. Add option for nofp. + (cortex-a9): Add fpu. Add options for nosimd and nofp. + (cortex-a12, cortex-a15, cortex-a17): Add fpu. Add option for nofp. + (cortex-r4f): Add fpu. + (cortex-r5): Add fpu. Add options for nofp.dp and nofp. + (cortex-r7): Use idiv option from architecture. Add fpu. Add option + for nofp. + (cortex-r8): Likewise. + (cortex-m4): Add fpu. Add option for nofp. + (cortex-a15.cortex-a7): Add fpu. Add option for nofp. + (cortex-a17.cortex-a7): Likewise. + (cortex-a32): Add fpu. Add options for crypto and nofp. + (cortex-a35, cortex-a53): Likewise. + (cortex-a57): Add fpu. Add option for crypto. + (cortex-a72, cortex-a73): Likewise. + (exynos-m1): Likewise. + (cortex-a57.cortex-a53, cortex-a72.cortex-a53): Likewise. + (cortex-a73.cortex-a35, cortex-a73.cortex-a53): Likewise. + (cortex-m33): Add fpu. Add option for nofp. + * config/arm/arm-cpu-cdata.h: Regenerated + * config/arm/arm-cpu-data.h: Regenerated. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * arm-cpus.in (armv5e): Add options fp, vfpv2 and nofp. + (armv5te, armv5tej): Likewise. + (armv6, armv6j, armv6k, armv6z, armv6kz, armv6zk, armv6t2): Likewise. + (armv7): Add options fp and vfpv3-d16. + (armv7-a): Add options fp, simd, vfpv3, vfpv3-d16, vfpv3-d16-fp16, + vfpv3-fp16, vfpv4, vfpv4-d16, neon, neon-vfpv3, neon-fp16, neon-vfpv4, + nofp and nosimd. + (armv7ve): Likewise. + (armv7-r): Add options fp, fp.sp, idiv, nofp and noidiv. + (armv7e-m): Add options fp, fpv5, fp.dp and nofp. + (armv8-a): Add nocrypto option. + (armv8.1-a, armv8.2-a): Likewise. + (armv8-m.main): add options fp, fp.dp and nofp. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm-cpus.in (armv8-a): Add options crc, simd crypto and + nofp. + (armv8-a+crc): Delete. + (armv8.1-a): Add options simd, crypto and nofp. + (armv8.2-a): Add options fp16, simd, crypto and nofp. + (armv8.2-a+fp16): Delete. + (armv8-m.main): Add option dsp. + (armv8-m.main+dsp): Delete. + (cortex-a8): Add fpu. Add nofp option. + (cortex-a9): Add fpu. Add nofp and nosimd options. + * config/arm/parsecpu.awk (gen_data): Generate option tables and + link to main cpu and architecture data structures. + (gen_comm_data): Only put isa attributes from the main architecture + in common tables. + (option): New statement for architecture and CPU entries. + * arm.c (struct cpu_option): New structure. + (struct processors): Add entry for options. + (arm_unrecognized_feature): New function. + (arm_parse_arch_cpu_name): Ignore any characters after the first + '+' character. + (arm_parse_arch_cpu_feature): New function. + (arm_configure_build_target): Separate out any CPU and architecture + features and parse separately. Don't error out if -mfpu=auto is + used with only an architecture string. + (arm_print_asm_arch_directives): New function. + (arm_file_start): Call it. + * config/arm/arm-cpu-cdata.h: Regenerated. + * config/arm/arm-cpu-data.h: Likewise. + * config/arm/arm-tables.opt: Likewise. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/elf.h (ASM_SPEC): Only pass -mfpu through to the + assembler when it is not -mfpu=auto. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.h (BIG_LITTLE_SPEC): Delete macro. + (ASM_REWRITE_SPEC_FUNCTIONS): New macro. + (BIG_LITTLE_CPU_SPEC_FUNCTIONS): Delete macro. + (ASM_CPU_SPEC): Rewrite. + (MCPU_MTUNE_NATIVE_FUNCTIONS): New macro. + (EXTRA_SPEC_FUNCTIONS): Move outside of ifdef. Use + MCPU_MTUNE_NATIVE_FUNCTIONS and ASM_REWRITE_SPEC_FUNCTIONS. Remove + reference to BIG_LITTLE_CPU_SPEC_FUNCTIONS. + * common/config/arm/arm-common.c (arm_rewrite_selected_cpu): Ensure + copied string is NUL-terminated. Also strip any characters prefixed + by '+'. + (arm_rewrite_selected_arch): New function. + (arm_rewrite_march): New function. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * config/arm/arm.opt (x_arm_arch_string): New TargetSave option. + (x_arm_cpu_string, x_arm_tune_string): Likewise. + (march, mcpu, mtune): Convert to string-based options. + * config/arm/arm.c (arm_print_hint_for_core_or_arch): New function. + (arm_parse_arch_cpu_name): New function. + (arm_configure_build_target): Use arm_parse_arch_cpu_name to + identify selected architecture or CPU. + (arm_option_save): New function. + (TARGET_OPTION_SAVE): Redefine. + (arm_option_restore): Restore string options. + (arm_option_print): Print string options. + +2017-06-16 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/80933 + PR tree-optimization/80934 + * builtins.c (fold_builtin_3): Do not handle bcmp here. + * gimple-fold.c (gimple_fold_builtin_bcmp): New function. + (gimple_fold_builtin_bcopy, gimple_fold_builtin_bzero): Likewise. + (gimple_fold_builtin): Call them. + +2017-06-16 Jan Hubicka <hubicka@ucw.cz> + + * gimple-ssa-isolate-paths.c (isolate_path): Set edge leading to path + as unlikely; update profile. + +2017-06-16 Jan Hubicka <hubicka@ucw.cz> + + * predict.c (force_edge_cold): Handle declaring edges impossible + more aggresively. + +2017-06-16 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-loop-ivcanon.c (remove_exits_and_undefined_stmts): Update + profile. + (try_unroll_loop_completely): Fix reporting. + +2017-06-16 Jan Hubicka <hubicka@ucw.cz> + + * tree-ssa-tail-merge.c (replace_block_by): Fix profile updating. + +2017-06-16 James Greenhalgh <james.greenhalgh@arm.com> + + PR target/71778 + * config/arm/arm-builtins.c (arm_expand_builtin_args): Return TARGET + if given a non-constant argument for an intrinsic which requires a + constant. + +2017-06-16 Jan Hubicka <hubicka@ucw.cz> + + * profile.c (compare_freqs): New function. + (branch_prob): Sort edge list. + (find_spanning_tree): Assume that the list is priority sorted. + +2017-06-16 Richard Biener <rguenther@suse.de> + + PR tree-optimization/81090 + * passes.def (pass_record_bounds): Remove. + * tree-pass.h (make_pass_record_bounds): Likewise. + * tree-ssa-loop.c (pass_data_record_bounds, pass_record_bounds, + make_pass_record_bounds): Likewise. + * tree-ssa-loop-ivcanon.c (canonicalize_induction_variables): Do + not free niter estimates at the beginning but at the end. + * tree-scalar-evolution.c (scev_finalize): Free niter estimates. + +2017-06-16 Richard Biener <rguenther@suse.de> + + * tree-switch-conversion.c (emit_case_bit_tests): Adjust + initializer to workaround ICE in host GCC 4.8. + +2017-06-16 Jan Hubicka <hubicka@ucw.cz> + + * ipa-inline-transform.c (update_noncloned_frequencies): Update also + counts. + (clone_inlined_nodes): Update. + +2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> + + * config/aarch64/aarch64.c (qdf24xx_prefetch_tune): Update + prefetch settings, and enable prefetching by default at -O3. + +2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> + + * config/aarch64/aarch64.c (aarch64_override_options_internal): + Set flag_prefetch_loop_arrays according to tuning data. + +2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org> + + * config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune): + New tune structure. + (struct tune_params): Use cpu_prefetch_tune instead of cache_line_size. + [Unrelated to main purpose of the patch] Place the pointer field last + to enable type checking errors when tune structure are wrongly merged. + * config/aarch64/aarch64.c (generic_prefetch_tune,) + (exynosm1_prefetch_tune, qdf24xx_prefetch_tune,) + (thunderx2t99_prefetch_tune): New tune constants. + (tune_params *_tunings): Update all tunings (no functional change). + (aarch64_override_options_internal): Set PARAM_SIMULTANEOUS_PREFETCHES, + PARAM_L1_CACHE_SIZE, PARAM_L1_CACHE_LINE_SIZE, and PARAM_L2_CACHE_SIZE + from tunings structures. + +2017-06-16 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/81094 + * ubsan.c (instrument_null): Add T argument, use it instead + of computing it based on IS_LHS. + (instrument_object_size): Likewise. + (pass_ubsan::execute): Adjust instrument_null and + instrument_object_size callers to pass gimple_get_lhs or + gimple_assign_rhs1 result to it. Use instrument_null instead of + calling get_base_address and instrument_mem_ref. Handle + aggregate call arguments for object-size sanitization. + +2017-06-16 Yury Gribov <tetra2005@gmail.com> + + PR tree-optimization/81089 + * tree-vrp.c (is_masked_range_test): Validate operands of + subexpression. + +2017-06-15 Martin Sebor <msebor@redhat.com> + + PR c++/80560 + * dumpfile.c (dump_register): Avoid calling memset to initialize + a class with a default ctor. + * gcc.c (struct compiler): Remove const qualification. + * genattrtab.c (gen_insn_reserv): Replace memset with initialization. + * hash-table.h: Ditto. + * ipa-cp.c (allocate_and_init_ipcp_value): Replace memset with + assignment. + * ipa-prop.c (ipa_free_edge_args_substructures): Ditto. + * omp-low.c (lower_omp_ordered_clauses): Replace memset with + default ctor. + * params.h (struct param_info): Make struct members non-const. + * tree-switch-conversion.c (emit_case_bit_tests): Replace memset + with default initialization. + * vec.h (vec_copy_construct, vec_default_construct): New helper + functions. + (vec<T>::copy, vec<T>::splice, vec<T>::reserve): Replace memcpy + with vec_copy_construct. + (vect<T>::quick_grow_cleared): Replace memset with default ctor. + (vect<T>::vec_safe_grow_cleared, vec_safe_grow_cleared): Same. + * doc/invoke.texi (-Wclass-memaccess): Document. + +2017-06-15 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> + + * emit-rtl.h (is_leaf): Update comment about local + register allocator. + +2017-06-15 Jozef Lawrynowicz <jozef.l@somniumtech.com> + + PR target/78818 + * config/msp430/msp430.c (msp430_data_attr): Check that it's possible + for a variable to have a section before checking if the section has a + name. + Set section to.persistent if persistent attribute is set. + Warn if .persistent attribute is used on an automatic variable. + +2017-06-15 Eric Botcazou <ebotcazou@adacore.com> + + PR rtl-optimization/80474 + * reorg.c (update_block): Do not ignore instructions in a delay slot. + +2017-06-15 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.md (add<mode>3): Use reg_or_subregno instead + of REGNO. + +2017-06-14 Maciej W. Rozycki <macro@imgtec.com> + + * config/mips/mips.md (MIPS16_T_REGNUM): Remove constant. + (casesi): Emit bounds checking as RTL. + (casesi_internal_mips16_<mode>): Remove bounds checking. + +2017-06-14 Max Filippov <jcmvbkbc@gmail.com> + + * config/xtensa/xtensa.c (xtensa_option_override): Append + MASK_CONST16 to target_flags in the absence of TARGET_L32R. + (hwloop_optimize, hwloop_fail, hwloop_pattern_reg, + xtensa_doloop_hooks): Define unconditionally. + (xtensa_reorg_loops): Only call reorg_loops in the presence of + TARGET_LOOPS. + * config/xtensa/xtensa.h (TARGET_L32R): New definition. + (TARGET_DEFAULT): Remove XCHAL_HAVE_L32R condition and account + for it in xtensa_option_override. + (HARD_FRAME_POINTER_IS_FRAME_POINTER, + HARD_FRAME_POINTER_IS_ARG_POINTER): New definitions. + +2017-06-14 Boris Kolpackov <boris@codesynthesis.com> + + * doc/cppopts.texi: Document '-' special value to -MF. + +2017-06-14 Wilco Dijkstra <wdijkstr@arm.com> + + * config/arm/cortex-a53.md (cortex_a53_fpalu) Adjust latency. + (cortex_a53_fconst): Likewise. + (cortex_a53_fpmul): Likewise. + (cortex_a53_f_load_64): Likewise. + (cortex_a53_f_load_many): Likewise. + (cortex_a53_advsimd_alu): Likewise. + (cortex_a53_advsimd_alu_q): Likewise. + (cortex_a53_advsimd_mul): Likewise. + (cortex_a53_advsimd_mul_q): Likewise. + (fpmac bypass): Add new bypass for fpmac-fpmac case. + Add missing fmul, r2f_cvt and fconst cases. + +2017-06-14 Richard Biener <rguenther@suse.de> + + PR middle-end/81088 + * fold-const.c (split_tree): Drop TREE_OVERFLOW flag from + literal constants. + (fold_binary_loc): When associating do not treat pre-existing + TREE_OVERFLOW on literal constants as a reason to allow + TREE_OVERFLOW on associated literal constants. + +2017-06-14 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/sparc.h (MASK_ISA): Add MASK_LEON and MASK_LEON3. + (MASK_FEATURES): New macro. + * config/sparc/sparc.c (sparc_option_override): Remove the special + handling of -mfpu and generalize it to all MASK_FEATURES switches. + +2017-06-14 Eric Botcazou <ebotcazou@adacore.com> + + * simplify-rtx.c (simplify_binary_operation_1) <UDIV>: Do not simplify + a division of 0 if non-call exceptions are enabled. + +2017-06-14 Andrew Pinski <apinski@cavium.com> + Naveen H.S <Naveen.Hurugalawadi@cavium.com> + + PR target/71663 + * config/aarch64/aarch64.c (aarch64_expand_vector_init): + Improve vector initialization code gen for only variable case. + +2017-06-14 Eric Botcazou <ebotcazou@adacore.com> + + * config/sparc/driver-sparc.c (cpu_names): Add SPARC-T5 entry. + +2017-06-14 Richard Biener <rguenther@suse.de> + + PR tree-optimization/81083 + * tree-ssa-sccvn.c (vn_reference_lookup_3): Do not use abnormals + as values. + +2017-06-13 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c: Update all comments that mentioned SPE. + (rs6000_expand_builtin): Remove RS6000_BTC_EVSEL. + * config/rs6000/rs6000.h (RS6000_BTC_EVSEL): Delete. + * config/rs6000/vxworks.h (VXCPU_FOR_8548): Delete. Adjust former use. + * config/rs6000/vxworksae.h (VXCPU_FOR_8548): Delete. + * config/rs6000/vxworksmils.h (VXCPU_FOR_8548): Delete. + +2017-06-13 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000-opts.h (enum rs6000_vector): Delete VECTOR_SPE. + * config/rs6000/rs6000.c (rs6000_debug_vector_unit): Delete VECTOR_SPE. + +2017-06-13 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.h (FIXED_SCRATCH): Delete. + +2017-06-13 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/t-rtems: Don't handle SPE. + +2017-06-13 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/t-linux: Don't handle SPE. + +2017-06-13 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/eabispe.h: Delete file. + +2017-06-13 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/t-spe: Delete file. + +2017-06-13 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.c (SPE_CONST_OFFSET_OK): Delete. + (rs6000_legitimate_offset_address_p): Return false for anything in + V2SImode or V2SFmode. + +2017-06-13 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000-modes.def: Remove all 8-byte vector modes + except V2SF and V2SI. Rearrange the vector modes, and add comments. + * config/rs6000/rs6000.c (rs6000_debug_reg_global): Remove V8QImode + and V4HImode. + (reg_offset_addressing_ok_p): Remove V4HImode and V1DImode. + (rs6000_legitimate_offset_address_p): Ditto. + (rs6000_emit_move): Ditto. + (rs6000_init_builtins): Remove V4HI_type_node. + +2017-06-13 Martin Liska <mliska@suse.cz> + + PR sanitize/78204 + * asan.c (asan_sanitize_stack_p): Use sanitize_flags_p. + (gate_asan): Likewise. + * asan.h (asan_no_sanitize_address_p): Remove the function. + (sanitize_flags_p): New function. + * builtins.def: Fix coding style. + * common.opt: Use renamed enum value. + * convert.c (convert_to_integer_1): Use sanitize_flags_p. + * doc/extend.texi: Document no_sanitize attribute. + * flag-types.h (enum sanitize_code): Rename SANITIZE_NONDEFAULT + to SANITIZE_UNDEFINED_NONDEFAULT. + * gcc.c (sanitize_spec_function): Use the renamed enum value. + * gimple-fold.c (optimize_atomic_compare_exchange_p): + Use sanitize_flags_p. + * gimplify.c (gimplify_function_tree): Likewise. + * ipa-inline.c (sanitize_attrs_match_for_inline_p): Likewise. + * opts.c (parse_no_sanitize_attribute): New function. + (common_handle_option): Use renamed enum value. + * opts.h (parse_no_sanitize_attribute): Declare. + * tree.c (sanitize_flags_p): New function. + * tree.h: Declared here. + * tsan.c: Use sanitize_flags_p. + * ubsan.c (ubsan_expand_null_ifn): Likewise. + (instrument_mem_ref): Likewise. + (instrument_bool_enum_load): Likewise. + (do_ubsan_in_current_function): Remove the function. + (pass_ubsan::execute): Use sanitize_flags_p. + * ubsan.h: Remove do_ubsan_in_current_function + * tree-cfg.c (print_no_sanitize_attr_value): New function. + (dump_function_to_file): Use it here. + +2017-06-13 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/80803 + PR tree-optimization/81063 + * tree-sra.c (subtree_mark_written_and_enqueue): Move up in the file. + (propagate_subaccesses_across_link): Enqueue subtree whenever + necessary instead of relying on the caller. + +2017-06-13 Martin Jambor <mjambor@suse.cz> + + * tree-sra.c (add_access_to_work_queue): Only enqueue accesses + that have a first_link. + (sort_and_splice_var_accesses): Do not check first_link before + enquing. + (subtree_mark_written_and_enqueue): Likewise. + (propagate_all_subaccesses): Likewise and do not stop at first + parent with a first_link. + +2017-06-13 Martin Jambor <mjambor@suse.cz> + + * tree-sra.c (dump_access_tree_1): Fix accidental dumping to stderr + instead of f. + +2017-06-13 Yury Gribov <tetra2005@gmail.com> + + * match.pd: New pattern. + +2017-06-13 Yury Gribov <tetra2005@gmail.com> + + * tree-vrp.c (is_masked_range_test): New function. + (register_edge_assert_for): Determine ranges for + some bit tests. + +2017-06-13 Yury Gribov <tetra2005@gmail.com> + + PR tree-optimization/67328 + * fold-const.c (maskable_range_p): New function. + (build_range_check): Generate bittests if possible. + +2017-06-13 Martin Liska <mliska@suse.cz> + + * gimple-pretty-print.c (dump_probability): Add new argument. + (dump_edge_probability): Dump both probability and count. + (dump_gimple_label): Likewise. + (dump_gimple_bb_header): Likewise. + +2017-06-13 Georg-Johann Lay <avr@gjlay.de> + + PR target/81072 + * config/avr/avr-devices.c: Fix indentation. + * config/avr/gen-avr-mmcu-specs.c: Dito. + +2017-06-13 Richard Biener <rguenther@suse.de> + + * tree-vect-loop.c (vect_model_reduction_cost): Do not fail, + instead get vector type from stmt_info. + (vectorizable_reduction): Adjust. Remove dead code. + +2017-06-13 Richard Biener <rguenther@suse.de> + + PR middle-end/81065 + * fold-const.c (extract_muldiv_1): Remove bogus distribution + case of C * (x * C2 + C3). + (fold_addr_of_array_ref_difference): Properly fold index difference. + +2017-06-12 David S. Miller <davem@davemloft.net> + + PR target/80968 + * config/sparc/sparc.md (return expander): Emit frame blockage if + function uses alloca. + +2017-06-12 Richard Sandiford <richard.sandiford@linaro.org> + + * combine.c (make_field_assignment): Check len rather than the mode + precision when calling force_to_mode. + 2017-06-12 Georg-Johann Lay <avr@gjlay.de> Support multilibs and devices that see flash in RAM address range. diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index eed0e9e82df..57a754a6e0d 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20170612 +20170626 diff --git a/gcc/Makefile.in b/gcc/Makefile.in index da98c8e864a..67d69c1c0d2 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -1441,7 +1441,6 @@ OBJS = \ rtlanal.o \ rtlhooks.o \ run-rtl-passes.o \ - sbitmap.o \ sched-deps.o \ sched-ebb.o \ sched-rgn.o \ @@ -1587,6 +1586,7 @@ OBJS = \ OBJS-libcommon = diagnostic.o diagnostic-color.o diagnostic-show-locus.o \ edit-context.o \ pretty-print.o intl.o \ + sbitmap.o \ vec.o input.o version.o hash-table.o ggc-none.o memory-block.o \ selftest.o diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog index 30290fa8858..dc8f27994d5 100644 --- a/gcc/ada/ChangeLog +++ b/gcc/ada/ChangeLog @@ -1,3 +1,35 @@ +2017-06-23 Jakub Jelinek <jakub@redhat.com> + + * gcc-interface/trans.c (gnat_to_gnu): Initialize sync to false to + avoid UB. + +2017-06-21 Pierre-Marie de Rodat <derodat@adacore.com> + + * gcc-interface/ada-tree.h (DECL_FUNCTION_IS_DEF): Update copyright + notice. New macro. + * gcc-interface/trans.c (Subprogram_Body_to_gnu): Tag the subprogram + as a definition. + (Compilation_Unit_to_gnu): Tag the elaboration procedure as a + definition. + * gcc-interface/decl.c (gnat_to_gnu_entity): Tag declarations of + imported subprograms for the current compilation unit as + definitions. Disable debug info for references to variables. + * gcc-interface/gigi.h (create_subprog_decl): Update declaration. + * gcc-interface/utils.c (gnat_pushdecl): Add external DECLs that are + not built-in functions to their binding scope. + (create_subprog_decl): Add a DEFINITION parameter. If it is true, tag + the function as a definition. Update all callers. + (gnat_write_global_declarations): Emit debug info for imported + functions. Filter out external variables for which debug info + is disabled. + +2017-06-15 Nicolas Boulenguez <nicolas.boulenguez@free.fr> + + PR ada/81105 + * gcc-interface/Makefile.in (x86 kfreebsd): Adjust system.ads setting. + (i[3456]86-pc-gnu): Likewise. + (x86_64 kfreebsd): Likewise. + 2017-06-12 Eric Botcazou <ebotcazou@adacore.com> PR bootstrap/80897 diff --git a/gcc/ada/gcc-interface/Makefile.in b/gcc/ada/gcc-interface/Makefile.in index 1030a67f9ea..1c172037d92 100644 --- a/gcc/ada/gcc-interface/Makefile.in +++ b/gcc/ada/gcc-interface/Makefile.in @@ -1435,7 +1435,7 @@ ifeq ($(strip $(filter-out %86 kfreebsd%,$(target_cpu) $(target_os))),) s-tpopsp.adb<s-tpopsp-posix-foreign.adb \ $(ATOMICS_TARGET_PAIRS) \ $(X86_TARGET_PAIRS) \ - system.ads<system-freebsd-x86.ads + system.ads<system-freebsd.ads TOOLS_TARGET_PAIRS = \ mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \ @@ -1465,7 +1465,7 @@ ifeq ($(strip $(filter-out %86 pc gnu,$(target_cpu) $(target_vendor) $(target_os s-tpopsp.adb<s-tpopsp-posix-foreign.adb \ $(ATOMICS_TARGET_PAIRS) \ $(X86_TARGET_PAIRS) \ - system.ads<system-freebsd-x86.ads + system.ads<system-freebsd.ads TOOLS_TARGET_PAIRS = \ mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \ @@ -1493,7 +1493,7 @@ ifeq ($(strip $(filter-out x86_64 kfreebsd%,$(target_cpu) $(target_os))),) s-taprop.adb<s-taprop-posix.adb \ s-taspri.ads<s-taspri-posix.ads \ s-tpopsp.adb<s-tpopsp-posix-foreign.adb \ - system.ads<system-freebsd-x86.ads + system.ads<system-freebsd.ads TOOLS_TARGET_PAIRS = \ mlib-tgt-specific.adb<mlib-tgt-specific-linux.adb \ diff --git a/gcc/ada/gcc-interface/ada-tree.h b/gcc/ada/gcc-interface/ada-tree.h index a3d38b1b22e..511a0bd8173 100644 --- a/gcc/ada/gcc-interface/ada-tree.h +++ b/gcc/ada/gcc-interface/ada-tree.h @@ -6,7 +6,7 @@ * * * C Header File * * * - * Copyright (C) 1992-2016, Free Software Foundation, Inc. * + * Copyright (C) 1992-2017, Free Software Foundation, Inc. * * * * GNAT is free software; you can redistribute it and/or modify it under * * terms of the GNU General Public License as published by the Free Soft- * @@ -463,6 +463,11 @@ do { \ a discriminant of a discriminated type without default expression. */ #define DECL_INVARIANT_P(NODE) DECL_LANG_FLAG_4 (FIELD_DECL_CHECK (NODE)) +/* Nonzero in a FUNCTION_DECL if this is a definition, i.e. if it was created + by a call to gnat_to_gnu_entity with definition set to True. */ +#define DECL_FUNCTION_IS_DEF(NODE) \ + DECL_LANG_FLAG_4 (FUNCTION_DECL_CHECK (NODE)) + /* Nonzero in a VAR_DECL if it is a temporary created to hold the return value of a function call or 'reference to a function call. */ #define DECL_RETURN_VALUE_P(NODE) DECL_LANG_FLAG_5 (VAR_DECL_CHECK (NODE)) diff --git a/gcc/ada/gcc-interface/decl.c b/gcc/ada/gcc-interface/decl.c index eab244e910c..83b9d0749fe 100644 --- a/gcc/ada/gcc-interface/decl.c +++ b/gcc/ada/gcc-interface/decl.c @@ -1392,7 +1392,8 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition) = create_var_decl (create_concat_name (gnat_entity, "ALIGN"), NULL_TREE, gnu_new_type, NULL_TREE, false, false, false, false, false, - true, debug_info_p, NULL, gnat_entity); + true, debug_info_p && definition, NULL, + gnat_entity); /* Initialize the aligned field if we have an initializer. */ if (gnu_expr) @@ -1441,7 +1442,8 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition) NULL_TREE, gnu_type, gnu_expr, const_flag, Is_Public (gnat_entity), imported_p || !definition, static_flag, - volatile_flag, true, debug_info_p, + volatile_flag, true, + debug_info_p && definition, NULL, gnat_entity); gnu_expr = build_unary_op (ADDR_EXPR, NULL_TREE, gnu_unc_var); TREE_CONSTANT (gnu_expr) = 1; @@ -1492,8 +1494,9 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition) = create_var_decl (gnu_entity_name, gnu_ext_name, gnu_type, gnu_expr, const_flag, Is_Public (gnat_entity), imported_p || !definition, static_flag, - volatile_flag, artificial_p, debug_info_p, - attr_list, gnat_entity, !renamed_obj); + volatile_flag, artificial_p, + debug_info_p && definition, attr_list, + gnat_entity, !renamed_obj); DECL_BY_REF_P (gnu_decl) = used_by_ref; DECL_POINTS_TO_READONLY_P (gnu_decl) = used_by_ref && inner_const_flag; DECL_CAN_NEVER_BE_NULL_P (gnu_decl) = Can_Never_Be_Null (gnat_entity); @@ -1545,8 +1548,8 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition) = create_var_decl (gnu_entity_name, gnu_ext_name, gnu_type, gnu_expr, true, Is_Public (gnat_entity), !definition, static_flag, volatile_flag, - artificial_p, debug_info_p, attr_list, - gnat_entity, false); + artificial_p, debug_info_p && definition, + attr_list, gnat_entity, false); SET_DECL_CONST_CORRESPONDING_VAR (gnu_decl, gnu_corr_var); } @@ -4083,7 +4086,9 @@ gnat_to_gnu_entity (Entity_Id gnat_entity, tree gnu_expr, bool definition) gnu_type, gnu_param_list, inline_status, public_flag, extern_flag, artificial_p, - debug_info_p, attr_list, gnat_entity); + debug_info_p, + definition && imported_p, attr_list, + gnat_entity); DECL_STUBBED_P (gnu_decl) = (Convention (gnat_entity) == Convention_Stubbed); diff --git a/gcc/ada/gcc-interface/gigi.h b/gcc/ada/gcc-interface/gigi.h index b1fb34ad620..0e25b6129a3 100644 --- a/gcc/ada/gcc-interface/gigi.h +++ b/gcc/ada/gcc-interface/gigi.h @@ -720,6 +720,8 @@ extern tree create_label_decl (tree name, Node_Id gnat_node); DEBUG_INFO_P is true if we need to write debug information for it. + DEFINITION is true if the subprogram is to be considered as a definition. + ATTR_LIST is the list of attributes to be attached to the subprogram. GNAT_NODE is used for the position of the decl. */ @@ -728,7 +730,8 @@ extern tree create_subprog_decl (tree name, tree asm_name, tree type, enum inline_status_t inline_status, bool public_flag, bool extern_flag, bool artificial_p, bool debug_info_p, - struct attrib *attr_list, Node_Id gnat_node); + bool definition, struct attrib *attr_list, + Node_Id gnat_node); /* Given a subprogram declaration DECL, its assembler name and its type, finish constructing the subprogram declaration from ASM_NAME and TYPE. */ diff --git a/gcc/ada/gcc-interface/trans.c b/gcc/ada/gcc-interface/trans.c index 2542626d0ca..7844bd7c5a8 100644 --- a/gcc/ada/gcc-interface/trans.c +++ b/gcc/ada/gcc-interface/trans.c @@ -398,7 +398,7 @@ gigi (Node_Id gnat_root, = create_subprog_decl (get_identifier ("__gnat_malloc"), NULL_TREE, ftype, NULL_TREE, is_disabled, true, true, true, false, - NULL, Empty); + false, NULL, Empty); DECL_IS_MALLOC (malloc_decl) = 1; ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE); @@ -406,7 +406,7 @@ gigi (Node_Id gnat_root, = create_subprog_decl (get_identifier ("__gnat_free"), NULL_TREE, ftype, NULL_TREE, is_disabled, true, true, true, false, - NULL, Empty); + false, NULL, Empty); ftype = build_function_type_list (ptr_type_node, ptr_type_node, sizetype, NULL_TREE); @@ -414,7 +414,7 @@ gigi (Node_Id gnat_root, = create_subprog_decl (get_identifier ("__gnat_realloc"), NULL_TREE, ftype, NULL_TREE, is_disabled, true, true, true, false, - NULL, Empty); + false, NULL, Empty); /* This is used for 64-bit multiplication with overflow checking. */ int64_type = gnat_type_for_size (64, 0); @@ -423,7 +423,7 @@ gigi (Node_Id gnat_root, build_function_type_list (int64_type, int64_type, int64_type, NULL_TREE), NULL_TREE, is_disabled, true, true, true, false, - NULL, Empty); + false, NULL, Empty); /* Name of the _Parent field in tagged record types. */ parent_name_id = get_identifier (Get_Name_String (Name_uParent)); @@ -446,21 +446,21 @@ gigi (Node_Id gnat_root, = create_subprog_decl (get_identifier ("system__soft_links__get_jmpbuf_address_soft"), NULL_TREE, build_function_type_list (jmpbuf_ptr_type, NULL_TREE), - NULL_TREE, is_disabled, true, true, true, false, NULL, Empty); + NULL_TREE, is_disabled, true, true, true, false, false, NULL, Empty); set_jmpbuf_decl = create_subprog_decl (get_identifier ("system__soft_links__set_jmpbuf_address_soft"), NULL_TREE, build_function_type_list (void_type_node, jmpbuf_ptr_type, NULL_TREE), - NULL_TREE, is_disabled, true, true, true, false, NULL, Empty); + NULL_TREE, is_disabled, true, true, true, false, false, NULL, Empty); get_excptr_decl = create_subprog_decl (get_identifier ("system__soft_links__get_gnat_exception"), NULL_TREE, build_function_type_list (build_pointer_type (except_type_node), NULL_TREE), - NULL_TREE, is_disabled, true, true, true, false, NULL, Empty); + NULL_TREE, is_disabled, true, true, true, false, false, NULL, Empty); not_handled_by_others_decl = get_identifier ("not_handled_by_others"); for (t = TYPE_FIELDS (except_type_node); t; t = DECL_CHAIN (t)) @@ -478,7 +478,7 @@ gigi (Node_Id gnat_root, (get_identifier ("__builtin_setjmp"), NULL_TREE, build_function_type_list (integer_type_node, jmpbuf_ptr_type, NULL_TREE), - NULL_TREE, is_disabled, true, true, true, false, NULL, Empty); + NULL_TREE, is_disabled, true, true, true, false, false, NULL, Empty); DECL_BUILT_IN_CLASS (setjmp_decl) = BUILT_IN_NORMAL; DECL_FUNCTION_CODE (setjmp_decl) = BUILT_IN_SETJMP; @@ -488,7 +488,7 @@ gigi (Node_Id gnat_root, = create_subprog_decl (get_identifier ("__builtin_update_setjmp_buf"), NULL_TREE, build_function_type_list (void_type_node, jmpbuf_ptr_type, NULL_TREE), - NULL_TREE, is_disabled, true, true, true, false, NULL, Empty); + NULL_TREE, is_disabled, true, true, true, false, false, NULL, Empty); DECL_BUILT_IN_CLASS (update_setjmp_buf_decl) = BUILT_IN_NORMAL; DECL_FUNCTION_CODE (update_setjmp_buf_decl) = BUILT_IN_UPDATE_SETJMP_BUF; @@ -500,14 +500,14 @@ gigi (Node_Id gnat_root, raise_nodefer_decl = create_subprog_decl (get_identifier ("__gnat_raise_nodefer_with_msg"), NULL_TREE, ftype, - NULL_TREE, is_disabled, true, true, true, false, NULL, Empty); + NULL_TREE, is_disabled, true, true, true, false, false, NULL, Empty); set_exception_parameter_decl = create_subprog_decl (get_identifier ("__gnat_set_exception_parameter"), NULL_TREE, build_function_type_list (void_type_node, ptr_type_node, ptr_type_node, NULL_TREE), - NULL_TREE, is_disabled, true, true, true, false, NULL, Empty); + NULL_TREE, is_disabled, true, true, true, false, false, NULL, Empty); /* Hooks to call when entering/leaving an exception handler. */ ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE); @@ -515,26 +515,30 @@ gigi (Node_Id gnat_root, begin_handler_decl = create_subprog_decl (get_identifier ("__gnat_begin_handler"), NULL_TREE, ftype, NULL_TREE, - is_disabled, true, true, true, false, NULL, Empty); + is_disabled, true, true, true, false, false, NULL, + Empty); /* __gnat_begin_handler is a dummy procedure. */ TREE_NOTHROW (begin_handler_decl) = 1; end_handler_decl = create_subprog_decl (get_identifier ("__gnat_end_handler"), NULL_TREE, ftype, NULL_TREE, - is_disabled, true, true, true, false, NULL, Empty); + is_disabled, true, true, true, false, false, NULL, + Empty); unhandled_except_decl = create_subprog_decl (get_identifier ("__gnat_unhandled_except_handler"), NULL_TREE, ftype, NULL_TREE, - is_disabled, true, true, true, false, NULL, Empty); + is_disabled, true, true, true, false, false, NULL, + Empty); /* Indicate that it never returns. */ ftype = build_qualified_type (ftype, TYPE_QUAL_VOLATILE); reraise_zcx_decl = create_subprog_decl (get_identifier ("__gnat_reraise_zcx"), NULL_TREE, ftype, NULL_TREE, - is_disabled, true, true, true, false, NULL, Empty); + is_disabled, true, true, true, false, false, NULL, + Empty); /* Dummy objects to materialize "others" and "all others" in the exception tables. These are exported by a-exexpr-gcc.adb, so see this unit for @@ -573,7 +577,8 @@ gigi (Node_Id gnat_root, tree decl = create_subprog_decl (get_identifier ("__gnat_last_chance_handler"), NULL_TREE, ftype, - NULL_TREE, is_disabled, true, true, true, false, NULL, Empty); + NULL_TREE, is_disabled, true, true, true, false, false, NULL, + Empty); for (i = 0; i < (int) ARRAY_SIZE (gnat_raise_decls); i++) gnat_raise_decls[i] = decl; } @@ -739,7 +744,7 @@ build_raise_check (int check, enum exception_info_kind kind) result = create_subprog_decl (get_identifier (Name_Buffer), NULL_TREE, ftype, NULL_TREE, is_disabled, true, true, true, false, - NULL, Empty); + false, NULL, Empty); return result; } @@ -3745,6 +3750,7 @@ Subprogram_Body_to_gnu (Node_Id gnat_node) = gnat_to_gnu_entity (gnat_subprog_id, NULL_TREE, Acts_As_Spec (gnat_node) && !present_gnu_tree (gnat_subprog_id)); + DECL_FUNCTION_IS_DEF (gnu_subprog_decl) = true; gnu_result_decl = DECL_RESULT (gnu_subprog_decl); gnu_subprog_type = TREE_TYPE (gnu_subprog_decl); gnu_cico_list = TYPE_CI_CO_LIST (gnu_subprog_type); @@ -5417,12 +5423,15 @@ Compilation_Unit_to_gnu (Node_Id gnat_node) const Entity_Id gnat_unit_entity = Defining_Entity (gnat_unit); Entity_Id gnat_entity; Node_Id gnat_pragma; - /* Make the decl for the elaboration procedure. */ + /* Make the decl for the elaboration procedure. Emit debug info for it, so + that users can break into their elaboration code in debuggers. Kludge: + don't consider it as a definition so that we have a line map for its body, + but no subprogram description in debug info. */ tree gnu_elab_proc_decl = create_subprog_decl (create_concat_name (gnat_unit_entity, body_p ? "elabb" : "elabs"), NULL_TREE, void_ftype, NULL_TREE, - is_disabled, true, false, true, true, NULL, gnat_unit); + is_disabled, true, false, true, true, false, NULL, gnat_unit); struct elab_info *info; vec_safe_push (gnu_elab_proc_stack, gnu_elab_proc_decl); @@ -5874,7 +5883,7 @@ gnat_to_gnu (Node_Id gnat_node) tree gnu_result_type = void_type_node; tree gnu_expr, gnu_lhs, gnu_rhs; Node_Id gnat_temp; - bool sync; + bool sync = false; /* Save node number for error message and set location information. */ error_gnat_node = gnat_node; @@ -6453,7 +6462,7 @@ gnat_to_gnu (Node_Id gnat_node) gnu_prefix = gnat_to_gnu (gnat_prefix); gnu_prefix = maybe_implicit_deref (gnu_prefix); } - + gnu_result = build_component_ref (gnu_prefix, gnu_field, (Nkind (Parent (gnat_node)) @@ -6484,7 +6493,8 @@ gnat_to_gnu (Node_Id gnat_node) (Entity (Prefix (gnat_node)), attr == Attr_Elab_Body ? "elabb" : "elabs"), NULL_TREE, void_ftype, NULL_TREE, is_disabled, - true, true, true, true, NULL, gnat_node); + true, true, true, true, false, NULL, + gnat_node); gnu_result = Attribute_to_gnu (gnat_node, &gnu_result_type, attr); } diff --git a/gcc/ada/gcc-interface/utils.c b/gcc/ada/gcc-interface/utils.c index b8c5d3d31f6..9e656579dda 100644 --- a/gcc/ada/gcc-interface/utils.c +++ b/gcc/ada/gcc-interface/utils.c @@ -763,11 +763,13 @@ gnat_pushdecl (tree decl, Node_Id gnat_node) if (!(TREE_CODE (decl) == TYPE_DECL && TREE_CODE (TREE_TYPE (decl)) == UNCONSTRAINED_ARRAY_TYPE)) { - if (DECL_EXTERNAL (decl)) - { - if (TREE_CODE (decl) == FUNCTION_DECL && DECL_BUILT_IN (decl)) - vec_safe_push (builtin_decls, decl); - } + /* External declarations must go to the binding level they belong to. + This will make corresponding imported entities are available in the + debugger at the proper time. */ + if (DECL_EXTERNAL (decl) + && TREE_CODE (decl) == FUNCTION_DECL + && DECL_BUILT_IN (decl)) + vec_safe_push (builtin_decls, decl); else if (global_bindings_p ()) vec_safe_push (global_decls, decl); else @@ -3189,6 +3191,8 @@ create_label_decl (tree name, Node_Id gnat_node) DEBUG_INFO_P is true if we need to write debug information for it. + DEFINITION is true if the subprogram is to be considered as a definition. + ATTR_LIST is the list of attributes to be attached to the subprogram. GNAT_NODE is used for the position of the decl. */ @@ -3197,7 +3201,8 @@ tree create_subprog_decl (tree name, tree asm_name, tree type, tree param_decl_list, enum inline_status_t inline_status, bool public_flag, bool extern_flag, bool artificial_p, bool debug_info_p, - struct attrib *attr_list, Node_Id gnat_node) + bool definition, struct attrib *attr_list, + Node_Id gnat_node) { tree subprog_decl = build_decl (input_location, FUNCTION_DECL, name, type); DECL_ARGUMENTS (subprog_decl) = param_decl_list; @@ -3208,6 +3213,8 @@ create_subprog_decl (tree name, tree asm_name, tree type, tree param_decl_list, if (!debug_info_p) DECL_IGNORED_P (subprog_decl) = 1; + if (definition) + DECL_FUNCTION_IS_DEF (subprog_decl) = 1; switch (inline_status) { @@ -5523,10 +5530,22 @@ gnat_write_global_declarations (void) if (TREE_CODE (iter) == TYPE_DECL && !DECL_IGNORED_P (iter)) debug_hooks->type_decl (iter, false); + /* Output imported functions. */ + FOR_EACH_VEC_SAFE_ELT (global_decls, i, iter) + if (TREE_CODE (iter) == FUNCTION_DECL + && DECL_EXTERNAL (iter) + && DECL_INITIAL (iter) == NULL + && !DECL_IGNORED_P (iter) + && DECL_FUNCTION_IS_DEF (iter)) + debug_hooks->early_global_decl (iter); + /* Then output the global variables. We need to do that after the debug - information for global types is emitted so that they are finalized. */ + information for global types is emitted so that they are finalized. Skip + external global variables, unless we need to emit debug info for them: + this is useful for imported variables, for instance. */ FOR_EACH_VEC_SAFE_ELT (global_decls, i, iter) - if (TREE_CODE (iter) == VAR_DECL) + if (TREE_CODE (iter) == VAR_DECL + && (!DECL_EXTERNAL (iter) || !DECL_IGNORED_P (iter))) rest_of_decl_compilation (iter, true, 0); /* Output the imported modules/declarations. In GNAT, these are only diff --git a/gcc/asan.c b/gcc/asan.c index bf564a46b28..e730530930b 100644 --- a/gcc/asan.c +++ b/gcc/asan.c @@ -305,9 +305,7 @@ asan_mark_p (gimple *stmt, enum asan_mark_flags flag) bool asan_sanitize_stack_p (void) { - return ((flag_sanitize & SANITIZE_ADDRESS) - && ASAN_STACK - && !asan_no_sanitize_address_p ()); + return (sanitize_flags_p (SANITIZE_ADDRESS) && ASAN_STACK); } /* Checks whether section SEC should be sanitized. */ @@ -3194,9 +3192,7 @@ asan_instrument (void) static bool gate_asan (void) { - return (flag_sanitize & SANITIZE_ADDRESS) != 0 - && !lookup_attribute ("no_sanitize_address", - DECL_ATTRIBUTES (current_function_decl)); + return sanitize_flags_p (SANITIZE_ADDRESS); } namespace { diff --git a/gcc/asan.h b/gcc/asan.h index 57663977603..95bb89e197c 100644 --- a/gcc/asan.h +++ b/gcc/asan.h @@ -144,13 +144,6 @@ asan_sanitize_use_after_scope (void) return (flag_sanitize_address_use_after_scope && asan_sanitize_stack_p ()); } -static inline bool -asan_no_sanitize_address_p (void) -{ - return lookup_attribute ("no_sanitize_address", - DECL_ATTRIBUTES (current_function_decl)); -} - /* Return true if DECL should be guarded on the stack. */ static inline bool @@ -161,4 +154,24 @@ asan_protect_stack_decl (tree decl) || (asan_sanitize_use_after_scope () && TREE_ADDRESSABLE (decl))); } +/* Return true when flag_sanitize & FLAG is non-zero. If FN is non-null, + remove all flags mentioned in "no_sanitize" of DECL_ATTRIBUTES. */ + +static inline bool +sanitize_flags_p (unsigned int flag, const_tree fn = current_function_decl) +{ + unsigned int result_flags = flag_sanitize & flag; + if (result_flags == 0) + return false; + + if (fn != NULL_TREE) + { + tree value = lookup_attribute ("no_sanitize", DECL_ATTRIBUTES (fn)); + if (value) + result_flags &= ~tree_to_uhwi (TREE_VALUE (value)); + } + + return result_flags; +} + #endif /* TREE_ASAN */ diff --git a/gcc/attribs.c b/gcc/attribs.c index 4ba0eab8899..5eb19e82795 100644 --- a/gcc/attribs.c +++ b/gcc/attribs.c @@ -888,12 +888,8 @@ make_dispatcher_decl (const tree decl) tree func_decl; char *func_name; tree fn_type, func_type; - bool is_uniq = false; - if (TREE_PUBLIC (decl) == 0) - is_uniq = true; - - func_name = make_unique_name (decl, "ifunc", is_uniq); + func_name = xstrdup (IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl))); fn_type = TREE_TYPE (decl); func_type = build_function_type (TREE_TYPE (fn_type), diff --git a/gcc/builtins.c b/gcc/builtins.c index 30462ad0f41..7e829ef1408 100644 --- a/gcc/builtins.c +++ b/gcc/builtins.c @@ -6079,6 +6079,12 @@ expand_builtin_atomic_fetch_op (machine_mode mode, tree exp, rtx target, gcc_assert (TREE_OPERAND (addr, 0) == fndecl); TREE_OPERAND (addr, 0) = builtin_decl_explicit (ext_call); + /* If we will emit code after the call, the call can not be a tail call. + If it is emitted as a tail call, a barrier is emitted after it, and + then all trailing code is removed. */ + if (!ignore) + CALL_EXPR_TAILCALL (exp) = 0; + /* Expand the call here so we can emit trailing code. */ ret = expand_call (exp, target, ignore); @@ -9034,7 +9040,6 @@ fold_builtin_3 (location_t loc, tree fndecl, return do_mpfr_remquo (arg0, arg1, arg2); break; - case BUILT_IN_BCMP: case BUILT_IN_MEMCMP: return fold_builtin_memcmp (loc, arg0, arg1, arg2);; diff --git a/gcc/builtins.def b/gcc/builtins.def index 1c887db7cb9..f242137a1cb 100644 --- a/gcc/builtins.def +++ b/gcc/builtins.def @@ -236,7 +236,8 @@ along with GCC; see the file COPYING3. If not see DEF_BUILTIN (ENUM, "__builtin_" NAME, BUILT_IN_NORMAL, TYPE, TYPE, \ true, true, true, ATTRS, true, \ (flag_sanitize & (SANITIZE_ADDRESS | SANITIZE_THREAD \ - | SANITIZE_UNDEFINED | SANITIZE_NONDEFAULT) \ + | SANITIZE_UNDEFINED \ + | SANITIZE_UNDEFINED_NONDEFAULT) \ || flag_sanitize_coverage)) #undef DEF_CILKPLUS_BUILTIN diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index 7ea7781c6a5..a61bb56ee80 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,39 @@ +2017-06-23 Marc Glisse <marc.glisse@inria.fr> + + * c-common.c (c_common_nodes_and_builtins): Use builtin_structptr_types. + +2017-06-15 Martin Sebor <msebor@redhat.com> + + PR c++/80560 + * c.opt (-Wclass-memaccess): New option. + +2017-06-14 Boris Kolpackov <boris@codesynthesis.com> + + * c-opts.c (c_common_finish): Handle '-' special value to -MF. + +2017-06-13 Marek Polacek <polacek@redhat.com> + + PR objc/80949 + * c-warn.c (do_warn_duplicated_branches): Return if any of the + branches is null. + +2017-06-13 Martin Liska <mliska@suse.cz> + + PR sanitize/78204 + * c-attribs.c (add_no_sanitize_value): New function. + (handle_no_sanitize_attribute): Likewise. + (handle_no_sanitize_address_attribute): Use the function. + (handle_no_sanitize_thread_attribute): New function. + (handle_no_address_safety_analysis_attribute): Use + add_no_sanitize_value. + (handle_no_sanitize_undefined_attribute): Likewise. + * c-common.h: Declare new functions. + * c-ubsan.c (ubsan_instrument_division): Use sanitize_flags_p. + (ubsan_instrument_shift): Likewise. + (ubsan_instrument_bounds): Likewise. + (ubsan_maybe_instrument_array_ref): Likewise. + (ubsan_maybe_instrument_reference_or_call): Likewise. + 2017-06-11 Jason Merrill <jason@redhat.com> * c-ada-spec.c, c-pragma.c: Use id_equal. diff --git a/gcc/c-family/c-attribs.c b/gcc/c-family/c-attribs.c index 695c58c0a14..2b6845f2cbd 100644 --- a/gcc/c-family/c-attribs.c +++ b/gcc/c-family/c-attribs.c @@ -51,8 +51,11 @@ static tree handle_common_attribute (tree *, tree, tree, int, bool *); static tree handle_noreturn_attribute (tree *, tree, tree, int, bool *); static tree handle_hot_attribute (tree *, tree, tree, int, bool *); static tree handle_cold_attribute (tree *, tree, tree, int, bool *); +static tree handle_no_sanitize_attribute (tree *, tree, tree, int, bool *); static tree handle_no_sanitize_address_attribute (tree *, tree, tree, int, bool *); +static tree handle_no_sanitize_thread_attribute (tree *, tree, tree, + int, bool *); static tree handle_no_address_safety_analysis_attribute (tree *, tree, tree, int, bool *); static tree handle_no_sanitize_undefined_attribute (tree *, tree, tree, int, @@ -285,11 +288,14 @@ const struct attribute_spec c_common_attribute_table[] = 0, 0, true, false, false, handle_no_address_safety_analysis_attribute, false }, + { "no_sanitize", 1, 1, true, false, false, + handle_no_sanitize_attribute, + false }, { "no_sanitize_address", 0, 0, true, false, false, handle_no_sanitize_address_attribute, false }, { "no_sanitize_thread", 0, 0, true, false, false, - handle_no_sanitize_address_attribute, + handle_no_sanitize_thread_attribute, false }, { "no_sanitize_undefined", 0, 0, true, false, false, handle_no_sanitize_undefined_attribute, @@ -547,22 +553,98 @@ handle_cold_attribute (tree *node, tree name, tree ARG_UNUSED (args), return NULL_TREE; } -/* Handle a "no_sanitize_address" attribute; arguments as in +/* Add FLAGS for a function NODE to no_sanitize_flags in DECL_ATTRIBUTES. */ + +void +add_no_sanitize_value (tree node, unsigned int flags) +{ + tree attr = lookup_attribute ("no_sanitize", DECL_ATTRIBUTES (node)); + if (attr) + { + unsigned int old_value = tree_to_uhwi (TREE_VALUE (attr)); + flags |= old_value; + + if (flags == old_value) + return; + + TREE_VALUE (attr) = build_int_cst (unsigned_type_node, flags); + } + else + DECL_ATTRIBUTES (node) + = tree_cons (get_identifier ("no_sanitize"), + build_int_cst (unsigned_type_node, flags), + DECL_ATTRIBUTES (node)); +} + +/* Handle a "no_sanitize" attribute; arguments as in struct attribute_spec.handler. */ static tree -handle_no_sanitize_address_attribute (tree *node, tree name, tree, int, - bool *no_add_attrs) +handle_no_sanitize_attribute (tree *node, tree name, tree args, int, + bool *no_add_attrs) { + *no_add_attrs = true; + tree id = TREE_VALUE (args); if (TREE_CODE (*node) != FUNCTION_DECL) { warning (OPT_Wattributes, "%qE attribute ignored", name); - *no_add_attrs = true; + return NULL_TREE; + } + + if (TREE_CODE (id) != STRING_CST) + { + error ("no_sanitize argument not a string"); + return NULL_TREE; + } + + char *error_value = NULL; + char *string = ASTRDUP (TREE_STRING_POINTER (id)); + unsigned int flags = parse_no_sanitize_attribute (string, &error_value); + + if (error_value) + { + error ("wrong argument: \"%s\"", error_value); + return NULL_TREE; } + add_no_sanitize_value (*node, flags); + + return NULL_TREE; +} + +/* Handle a "no_sanitize_address" attribute; arguments as in + struct attribute_spec.handler. */ + +static tree +handle_no_sanitize_address_attribute (tree *node, tree name, tree, int, + bool *no_add_attrs) +{ + *no_add_attrs = true; + if (TREE_CODE (*node) != FUNCTION_DECL) + warning (OPT_Wattributes, "%qE attribute ignored", name); + else + add_no_sanitize_value (*node, SANITIZE_ADDRESS); + + return NULL_TREE; +} + +/* Handle a "no_sanitize_thread" attribute; arguments as in + struct attribute_spec.handler. */ + +static tree +handle_no_sanitize_thread_attribute (tree *node, tree name, tree, int, + bool *no_add_attrs) +{ + *no_add_attrs = true; + if (TREE_CODE (*node) != FUNCTION_DECL) + warning (OPT_Wattributes, "%qE attribute ignored", name); + else + add_no_sanitize_value (*node, SANITIZE_THREAD); + return NULL_TREE; } + /* Handle a "no_address_safety_analysis" attribute; arguments as in struct attribute_spec.handler. */ @@ -570,13 +652,12 @@ static tree handle_no_address_safety_analysis_attribute (tree *node, tree name, tree, int, bool *no_add_attrs) { + *no_add_attrs = true; if (TREE_CODE (*node) != FUNCTION_DECL) warning (OPT_Wattributes, "%qE attribute ignored", name); - else if (!lookup_attribute ("no_sanitize_address", DECL_ATTRIBUTES (*node))) - DECL_ATTRIBUTES (*node) - = tree_cons (get_identifier ("no_sanitize_address"), - NULL_TREE, DECL_ATTRIBUTES (*node)); - *no_add_attrs = true; + else + add_no_sanitize_value (*node, SANITIZE_ADDRESS); + return NULL_TREE; } @@ -587,11 +668,12 @@ static tree handle_no_sanitize_undefined_attribute (tree *node, tree name, tree, int, bool *no_add_attrs) { + *no_add_attrs = true; if (TREE_CODE (*node) != FUNCTION_DECL) - { - warning (OPT_Wattributes, "%qE attribute ignored", name); - *no_add_attrs = true; - } + warning (OPT_Wattributes, "%qE attribute ignored", name); + else + add_no_sanitize_value (*node, + SANITIZE_UNDEFINED | SANITIZE_UNDEFINED_NONDEFAULT); return NULL_TREE; } diff --git a/gcc/c-family/c-common.c b/gcc/c-family/c-common.c index 4395e51847c..f6a9d05c3da 100644 --- a/gcc/c-family/c-common.c +++ b/gcc/c-family/c-common.c @@ -4181,10 +4181,14 @@ c_common_nodes_and_builtins (void) if (c_dialect_cxx ()) { /* For C++, make fileptr_type_node a distinct void * type until - FILE type is defined. */ - fileptr_type_node = build_variant_type_copy (ptr_type_node); - /* Likewise for const struct tm*. */ - const_tm_ptr_type_node = build_variant_type_copy (const_ptr_type_node); + FILE type is defined. Likewise for const struct tm*. */ + for (unsigned i = 0; + i < sizeof (builtin_structptr_types) + / sizeof (builtin_structptr_type); + ++i) + builtin_structptr_types[i].node = + build_variant_type_copy (builtin_structptr_types[i].base); + } record_builtin_type (RID_VOID, NULL, void_type_node); diff --git a/gcc/c-family/c-common.h b/gcc/c-family/c-common.h index 79072e6a8b7..1748c1979aa 100644 --- a/gcc/c-family/c-common.h +++ b/gcc/c-family/c-common.h @@ -1552,6 +1552,7 @@ extern enum flt_eval_method excess_precision_mode_join (enum flt_eval_method, enum flt_eval_method); extern int c_flt_eval_method (bool ts18661_p); +extern void add_no_sanitize_value (tree node, unsigned int flags); #if CHECKING_P namespace selftest { diff --git a/gcc/c-family/c-opts.c b/gcc/c-family/c-opts.c index be4478f5ce9..1657e7a4390 100644 --- a/gcc/c-family/c-opts.c +++ b/gcc/c-family/c-opts.c @@ -1150,6 +1150,8 @@ c_common_finish (void) output stream. */ if (!deps_file) deps_stream = out_stream; + else if (deps_file[0] == '-' && deps_file[1] == '\0') + deps_stream = stdout; else { deps_stream = fopen (deps_file, deps_append ? "a": "w"); @@ -1163,7 +1165,7 @@ c_common_finish (void) with cpp_destroy (). */ cpp_finish (parse_in, deps_stream); - if (deps_stream && deps_stream != out_stream + if (deps_stream && deps_stream != out_stream && deps_stream != stdout && (ferror (deps_stream) || fclose (deps_stream))) fatal_error (input_location, "closing dependency file %s: %m", deps_file); diff --git a/gcc/c-family/c-ubsan.c b/gcc/c-family/c-ubsan.c index e48841a334c..a072d19eda6 100644 --- a/gcc/c-family/c-ubsan.c +++ b/gcc/c-family/c-ubsan.c @@ -49,11 +49,11 @@ ubsan_instrument_division (location_t loc, tree op0, tree op1) op1 = unshare_expr (op1); if (TREE_CODE (type) == INTEGER_TYPE - && (flag_sanitize & SANITIZE_DIVIDE)) + && sanitize_flags_p (SANITIZE_DIVIDE)) t = fold_build2 (EQ_EXPR, boolean_type_node, op1, build_int_cst (type, 0)); else if (TREE_CODE (type) == REAL_TYPE - && (flag_sanitize & SANITIZE_FLOAT_DIVIDE)) + && sanitize_flags_p (SANITIZE_FLOAT_DIVIDE)) t = fold_build2 (EQ_EXPR, boolean_type_node, op1, build_real (type, dconst0)); else @@ -61,7 +61,7 @@ ubsan_instrument_division (location_t loc, tree op0, tree op1) /* We check INT_MIN / -1 only for signed types. */ if (TREE_CODE (type) == INTEGER_TYPE - && (flag_sanitize & SANITIZE_DIVIDE) + && sanitize_flags_p (SANITIZE_DIVIDE) && !TYPE_UNSIGNED (type)) { tree x; @@ -131,7 +131,7 @@ ubsan_instrument_shift (location_t loc, enum tree_code code, Also punt on bit-fields. */ if (TYPE_OVERFLOW_WRAPS (type0) || GET_MODE_BITSIZE (TYPE_MODE (type0)) != TYPE_PRECISION (type0) - || (flag_sanitize & SANITIZE_SHIFT_BASE) == 0) + || !sanitize_flags_p (SANITIZE_SHIFT_BASE)) ; /* For signed x << y, in C99/C11, the following: @@ -178,7 +178,7 @@ ubsan_instrument_shift (location_t loc, enum tree_code code, tree else_t = void_node; if (tt) { - if ((flag_sanitize & SANITIZE_SHIFT_EXPONENT) == 0) + if (!sanitize_flags_p (SANITIZE_SHIFT_EXPONENT)) { t = fold_build1 (TRUTH_NOT_EXPR, boolean_type_node, t); t = fold_build2 (TRUTH_AND_EXPR, boolean_type_node, t, tt); @@ -301,7 +301,7 @@ ubsan_instrument_bounds (location_t loc, tree array, tree *index, /* Detect flexible array members and suchlike, unless -fsanitize=bounds-strict. */ tree base = get_base_address (array); - if ((flag_sanitize & SANITIZE_BOUNDS_STRICT) == 0 + if (!sanitize_flags_p (SANITIZE_BOUNDS_STRICT) && TREE_CODE (array) == COMPONENT_REF && base && (INDIRECT_REF_P (base) || TREE_CODE (base) == MEM_REF)) { @@ -373,7 +373,7 @@ void ubsan_maybe_instrument_array_ref (tree *expr_p, bool ignore_off_by_one) { if (!ubsan_array_ref_instrumented_p (*expr_p) - && do_ubsan_in_current_function ()) + && sanitize_flags_p (SANITIZE_BOUNDS | SANITIZE_BOUNDS_STRICT)) { tree op0 = TREE_OPERAND (*expr_p, 0); tree op1 = TREE_OPERAND (*expr_p, 1); @@ -393,7 +393,7 @@ static tree ubsan_maybe_instrument_reference_or_call (location_t loc, tree op, tree ptype, enum ubsan_null_ckind ckind) { - if (!do_ubsan_in_current_function ()) + if (!sanitize_flags_p (SANITIZE_ALIGNMENT | SANITIZE_NULL)) return NULL_TREE; tree type = TREE_TYPE (ptype); @@ -401,7 +401,7 @@ ubsan_maybe_instrument_reference_or_call (location_t loc, tree op, tree ptype, bool instrument = false; unsigned int mina = 0; - if (flag_sanitize & SANITIZE_ALIGNMENT) + if (sanitize_flags_p (SANITIZE_ALIGNMENT)) { mina = min_align_of_type (type); if (mina <= 1) @@ -419,7 +419,7 @@ ubsan_maybe_instrument_reference_or_call (location_t loc, tree op, tree ptype, } else { - if ((flag_sanitize & SANITIZE_NULL) && TREE_CODE (op) == ADDR_EXPR) + if (sanitize_flags_p (SANITIZE_NULL) && TREE_CODE (op) == ADDR_EXPR) { bool strict_overflow_p = false; /* tree_single_nonzero_warnv_p will not return true for non-weak @@ -435,7 +435,7 @@ ubsan_maybe_instrument_reference_or_call (location_t loc, tree op, tree ptype, flag_delete_null_pointer_checks = save_flag_delete_null_pointer_checks; } - else if (flag_sanitize & SANITIZE_NULL) + else if (sanitize_flags_p (SANITIZE_NULL)) instrument = true; if (mina && mina > 1) { diff --git a/gcc/c-family/c-ubsan.h b/gcc/c-family/c-ubsan.h index 3c3ffc7f7a2..1e2d192bb31 100644 --- a/gcc/c-family/c-ubsan.h +++ b/gcc/c-family/c-ubsan.h @@ -31,7 +31,4 @@ extern void ubsan_maybe_instrument_array_ref (tree *, bool); extern void ubsan_maybe_instrument_reference (tree *); extern void ubsan_maybe_instrument_member_call (tree, bool); -/* Declare this here as well as in ubsan.h. */ -extern bool do_ubsan_in_current_function (void); - #endif /* GCC_C_UBSAN_H */ diff --git a/gcc/c-family/c-warn.c b/gcc/c-family/c-warn.c index 35321a6cb1b..056a058ca77 100644 --- a/gcc/c-family/c-warn.c +++ b/gcc/c-family/c-warn.c @@ -2354,8 +2354,8 @@ do_warn_duplicated_branches (tree expr) tree thenb = COND_EXPR_THEN (expr); tree elseb = COND_EXPR_ELSE (expr); - /* Don't bother if there's no else branch. */ - if (elseb == NULL_TREE) + /* Don't bother if any of the branches is missing. */ + if (thenb == NULL_TREE || elseb == NULL_TREE) return; /* And don't warn for empty statements. */ diff --git a/gcc/c-family/c.opt b/gcc/c-family/c.opt index 37bb236eb97..363d1043397 100644 --- a/gcc/c-family/c.opt +++ b/gcc/c-family/c.opt @@ -804,6 +804,10 @@ Wnon-template-friend C++ ObjC++ Var(warn_nontemplate_friend) Init(1) Warning Warn when non-templatized friend functions are declared within a template. +Wclass-memaccess +C++ ObjC++ Var(warn_class_memaccess) Warning LangEnabledBy(C++ ObjC++, Wall) +Warn for unsafe raw memory writes to objects of class types. + Wnon-virtual-dtor C++ ObjC++ Var(warn_nonvdtor) Warning LangEnabledBy(C++ ObjC++,Weffc++) Warn about non-virtual destructors. diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog index e94bcead994..58d59a65871 100644 --- a/gcc/c/ChangeLog +++ b/gcc/c/ChangeLog @@ -1,3 +1,17 @@ +2017-06-19 Richard Biener <rguenther@suse.de> + + * gimple-parser.c (c_parser_gimple_postfix_expression): Handle + negated _Literals to parse _Literal (int) -1. + +2017-06-13 Martin Liska <mliska@suse.cz> + + PR sanitize/78204 + * c-convert.c (convert): Use sanitize_flags_p. + * c-decl.c (grokdeclarator): Likewise. + * c-typeck.c (convert_for_assignment): Likewise. + (c_finish_return): Likewise. + (build_binary_op): Likewise. + 2017-06-08 Jakub Jelinek <jakub@redhat.com> PR c/81006 diff --git a/gcc/c/c-convert.c b/gcc/c/c-convert.c index b8117b49ac9..33c9143e354 100644 --- a/gcc/c/c-convert.c +++ b/gcc/c/c-convert.c @@ -31,6 +31,7 @@ along with GCC; see the file COPYING3. If not see #include "convert.h" #include "langhooks.h" #include "ubsan.h" +#include "asan.h" /* Change of width--truncation and extension of integers or reals-- is represented with NOP_EXPR. Proper functioning of many things @@ -106,10 +107,9 @@ convert (tree type, tree expr) case INTEGER_TYPE: case ENUMERAL_TYPE: - if (flag_sanitize & SANITIZE_FLOAT_CAST + if (sanitize_flags_p (SANITIZE_FLOAT_CAST) && TREE_CODE (TREE_TYPE (expr)) == REAL_TYPE - && COMPLETE_TYPE_P (type) - && do_ubsan_in_current_function ()) + && COMPLETE_TYPE_P (type)) { expr = save_expr (expr); tree check = ubsan_instrument_float_cast (loc, type, expr); diff --git a/gcc/c/c-decl.c b/gcc/c/c-decl.c index 3a0a4f51737..317d5cdd099 100644 --- a/gcc/c/c-decl.c +++ b/gcc/c/c-decl.c @@ -53,6 +53,7 @@ along with GCC; see the file COPYING3. If not see #include "builtins.h" #include "spellcheck-tree.h" #include "gcc-rich-location.h" +#include "asan.h" /* In grokdeclarator, distinguish syntactic contexts of declarators. */ enum decl_context @@ -6044,9 +6045,8 @@ grokdeclarator (const struct c_declarator *declarator, with known value. */ this_size_varies = size_varies = true; warn_variable_length_array (name, size); - if (flag_sanitize & SANITIZE_VLA - && decl_context == NORMAL - && do_ubsan_in_current_function ()) + if (sanitize_flags_p (SANITIZE_VLA) + && decl_context == NORMAL) { /* Evaluate the array size only once. */ size = save_expr (size); diff --git a/gcc/c/c-typeck.c b/gcc/c/c-typeck.c index ba4440653ac..4d067e96dd3 100644 --- a/gcc/c/c-typeck.c +++ b/gcc/c/c-typeck.c @@ -50,6 +50,7 @@ along with GCC; see the file COPYING3. If not see #include "gomp-constants.h" #include "spellcheck-tree.h" #include "gcc-rich-location.h" +#include "asan.h" /* Possible cases of implicit bad conversions. Used to select diagnostic messages in convert_for_assignment. */ @@ -6378,7 +6379,7 @@ convert_for_assignment (location_t location, location_t expr_loc, tree type, if (codel == BOOLEAN_TYPE || codel == COMPLEX_TYPE || (coder == REAL_TYPE && (codel == INTEGER_TYPE || codel == ENUMERAL_TYPE) - && (flag_sanitize & SANITIZE_FLOAT_CAST))) + && sanitize_flags_p (SANITIZE_FLOAT_CAST))) in_late_binary_op = true; ret = convert_and_check (expr_loc != UNKNOWN_LOCATION ? expr_loc : location, type, orig_rhs); @@ -9955,7 +9956,7 @@ c_finish_return (location_t loc, tree retval, tree origtype) || (TREE_CODE (TREE_TYPE (t)) == REAL_TYPE && (TREE_CODE (TREE_TYPE (res)) == INTEGER_TYPE || TREE_CODE (TREE_TYPE (res)) == ENUMERAL_TYPE) - && (flag_sanitize & SANITIZE_FLOAT_CAST))) + && sanitize_flags_p (SANITIZE_FLOAT_CAST))) in_late_binary_op = true; inner = t = convert (TREE_TYPE (res), t); in_late_binary_op = save; @@ -11835,9 +11836,8 @@ build_binary_op (location_t location, enum tree_code code, return error_mark_node; } - if ((flag_sanitize & (SANITIZE_SHIFT | SANITIZE_DIVIDE - | SANITIZE_FLOAT_DIVIDE)) - && do_ubsan_in_current_function () + if (sanitize_flags_p ((SANITIZE_SHIFT + | SANITIZE_DIVIDE | SANITIZE_FLOAT_DIVIDE)) && (doing_div_or_mod || doing_shift) && !require_constant_value) { @@ -11846,10 +11846,10 @@ build_binary_op (location_t location, enum tree_code code, op1 = save_expr (op1); op0 = c_fully_fold (op0, false, NULL); op1 = c_fully_fold (op1, false, NULL); - if (doing_div_or_mod && (flag_sanitize & (SANITIZE_DIVIDE - | SANITIZE_FLOAT_DIVIDE))) + if (doing_div_or_mod && (sanitize_flags_p ((SANITIZE_DIVIDE + | SANITIZE_FLOAT_DIVIDE)))) instrument_expr = ubsan_instrument_division (location, op0, op1); - else if (doing_shift && (flag_sanitize & SANITIZE_SHIFT)) + else if (doing_shift && sanitize_flags_p (SANITIZE_SHIFT)) instrument_expr = ubsan_instrument_shift (location, code, op0, op1); } diff --git a/gcc/c/gimple-parser.c b/gcc/c/gimple-parser.c index 4a55904662e..22f58f4e820 100644 --- a/gcc/c/gimple-parser.c +++ b/gcc/c/gimple-parser.c @@ -850,7 +850,7 @@ c_parser_gimple_postfix_expression (c_parser *parser) } else if (strcmp (IDENTIFIER_POINTER (id), "_Literal") == 0) { - /* _Literal '(' type-name ')' number */ + /* _Literal '(' type-name ')' [ '-' ] constant */ c_parser_consume_token (parser); tree type = NULL_TREE; if (c_parser_require (parser, CPP_OPEN_PAREN, "expected %<(%>")) @@ -862,15 +862,27 @@ c_parser_gimple_postfix_expression (c_parser *parser) c_parser_skip_until_found (parser, CPP_CLOSE_PAREN, "expected %<)%>"); } + bool neg_p; + if ((neg_p = c_parser_next_token_is (parser, CPP_MINUS))) + c_parser_consume_token (parser); tree val = c_parser_gimple_postfix_expression (parser).value; if (! type || ! val || val == error_mark_node - || TREE_CODE (val) != INTEGER_CST) + || ! CONSTANT_CLASS_P (val)) { c_parser_error (parser, "invalid _Literal"); return expr; } + if (neg_p) + { + val = const_unop (NEGATE_EXPR, TREE_TYPE (val), val); + if (! val) + { + c_parser_error (parser, "invalid _Literal"); + return expr; + } + } expr.value = fold_convert (type, val); return expr; } diff --git a/gcc/cfghooks.c b/gcc/cfghooks.c index 1b3f2695b39..bcda422d89a 100644 --- a/gcc/cfghooks.c +++ b/gcc/cfghooks.c @@ -1087,7 +1087,7 @@ duplicate_block (basic_block bb, edge e, basic_block after) if (after) move_block_after (new_bb, after); - new_bb->flags = bb->flags; + new_bb->flags = (bb->flags & ~BB_DUPLICATED); FOR_EACH_EDGE (s, ei, bb->succs) { /* Since we are creating edges from a new block to successors @@ -1207,7 +1207,8 @@ flow_call_edges_add (sbitmap blocks) void execute_on_growing_pred (edge e) { - if (cfg_hooks->execute_on_growing_pred) + if (! (e->dest->flags & BB_DUPLICATED) + && cfg_hooks->execute_on_growing_pred) cfg_hooks->execute_on_growing_pred (e); } @@ -1217,7 +1218,8 @@ execute_on_growing_pred (edge e) void execute_on_shrinking_pred (edge e) { - if (cfg_hooks->execute_on_shrinking_pred) + if (! (e->dest->flags & BB_DUPLICATED) + && cfg_hooks->execute_on_shrinking_pred) cfg_hooks->execute_on_shrinking_pred (e); } @@ -1353,6 +1355,12 @@ copy_bbs (basic_block *bbs, unsigned n, basic_block *new_bbs, basic_block bb, new_bb, dom_bb; edge e; + /* Mark the blocks to be copied. This is used by edge creation hooks + to decide whether to reallocate PHI nodes capacity to avoid reallocating + PHIs in the set of source BBs. */ + for (i = 0; i < n; i++) + bbs[i]->flags |= BB_DUPLICATED; + /* Duplicate bbs, update dominators, assign bbs to loops. */ for (i = 0; i < n; i++) { @@ -1360,7 +1368,6 @@ copy_bbs (basic_block *bbs, unsigned n, basic_block *new_bbs, bb = bbs[i]; new_bb = new_bbs[i] = duplicate_block (bb, NULL, after); after = new_bb; - bb->flags |= BB_DUPLICATED; if (bb->loop_father) { /* Possibly set loop header. */ diff --git a/gcc/combine.c b/gcc/combine.c index 8ec5f8bfb60..66f80b64bb4 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -9639,7 +9639,7 @@ make_field_assignment (rtx x) other, pos), dest); src = force_to_mode (src, mode, - GET_MODE_PRECISION (mode) >= HOST_BITS_PER_WIDE_INT + len >= HOST_BITS_PER_WIDE_INT ? HOST_WIDE_INT_M1U : (HOST_WIDE_INT_1U << len) - 1, 0); diff --git a/gcc/common.opt b/gcc/common.opt index 0a10511d468..4f9c3dcac3e 100644 --- a/gcc/common.opt +++ b/gcc/common.opt @@ -224,7 +224,7 @@ unsigned int flag_sanitize ; What sanitizers should recover from errors Variable -unsigned int flag_sanitize_recover = (SANITIZE_UNDEFINED | SANITIZE_NONDEFAULT | SANITIZE_KERNEL_ADDRESS) & ~(SANITIZE_UNREACHABLE | SANITIZE_RETURN) +unsigned int flag_sanitize_recover = (SANITIZE_UNDEFINED | SANITIZE_UNDEFINED_NONDEFAULT | SANITIZE_KERNEL_ADDRESS) & ~(SANITIZE_UNREACHABLE | SANITIZE_RETURN) fsanitize-coverage=trace-pc Common Report Var(flag_sanitize_coverage) diff --git a/gcc/common/config/arm/arm-common.c b/gcc/common/config/arm/arm-common.c index 7ecc68d6757..d06c39bd667 100644 --- a/gcc/common/config/arm/arm-common.c +++ b/gcc/common/config/arm/arm-common.c @@ -17,6 +17,7 @@ along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ +#define INCLUDE_LIST #include "config.h" #include "system.h" #include "coretypes.h" @@ -27,6 +28,8 @@ #include "common/common-target-def.h" #include "opts.h" #include "flags.h" +#include "sbitmap.h" +#include "diagnostic.h" /* Set default optimization options. */ static const struct default_options arm_option_optimization_table[] = @@ -66,7 +69,7 @@ arm_except_unwind_info (struct gcc_options *opts) #define ARM_CPU_NAME_LENGTH 20 -/* Truncate NAME at the first '.' character seen, or return +/* Truncate NAME at the first '.' or '+' character seen, or return NAME unmodified. */ const char * @@ -76,12 +79,20 @@ arm_rewrite_selected_cpu (const char *name) char *arg_pos; strncpy (output_buf, name, ARM_CPU_NAME_LENGTH); + output_buf[ARM_CPU_NAME_LENGTH] = 0; + arg_pos = strchr (output_buf, '.'); /* If we found a '.' truncate the entry at that point. */ if (arg_pos) *arg_pos = '\0'; + arg_pos = strchr (output_buf, '+'); + + /* If we found a '+' truncate the entry at that point. */ + if (arg_pos) + *arg_pos = '\0'; + return output_buf; } @@ -98,11 +109,40 @@ arm_rewrite_mcpu (int argc, const char **argv) return arm_rewrite_selected_cpu (argv[argc - 1]); } -struct arm_arch_core_flag +/* Truncate NAME at the first '+' character seen, or return + NAME unmodified. Similar to arm_rewrite_selected_cpu, but we must + preserve '.' as that is part of some architecture names. */ + +const char * +arm_rewrite_selected_arch (const char *name) { - const char *const name; - const enum isa_feature isa_bits[isa_num_bits]; -}; + static char output_buf[ARM_CPU_NAME_LENGTH + 1] = {0}; + char *arg_pos; + + strncpy (output_buf, name, ARM_CPU_NAME_LENGTH); + output_buf[ARM_CPU_NAME_LENGTH] = 0; + + arg_pos = strchr (output_buf, '+'); + + /* If we found a '+' truncate the entry at that point. */ + if (arg_pos) + *arg_pos = '\0'; + + return output_buf; +} + +/* Called by the driver to rewrite a name passed to the -march + argument in preparation to be passed to the assembler. The + names passed from the command line will be in ARGV, we want + to use the right-most argument, which should be in + ARGV[ARGC - 1]. ARGC should always be greater than 0. */ + +const char * +arm_rewrite_march (int argc, const char **argv) +{ + gcc_assert (argc); + return arm_rewrite_selected_arch (argv[argc - 1]); +} #include "config/arm/arm-cpu-cdata.h" @@ -122,26 +162,603 @@ check_isa_bits_for (const enum isa_feature* bits, enum isa_feature bit) /* Called by the driver to check whether the target denoted by current command line options is a Thumb-only target. ARGV is an array of - -march and -mcpu values (ie. it contains the rhs after the equal - sign) and we use the last one of them to make a decision. The - number of elements in ARGV is given in ARGC. */ + tupples (normally only one) where the first element of the tupple + is 'cpu' or 'arch' and the second is the option passed to the + compiler for that. An architecture tupple is always taken in + preference to a cpu tupple and the last of each type always + overrides any earlier setting. */ + const char * arm_target_thumb_only (int argc, const char **argv) { - unsigned int opt; + const char *arch = NULL; + const char *cpu = NULL; + + if (argc % 2 != 0) + fatal_error (input_location, + "%%:target_mode_check takes an even number of parameters"); + + while (argc) + { + if (strcmp (argv[0], "arch") == 0) + arch = argv[1]; + else if (strcmp (argv[0], "cpu") == 0) + cpu = argv[1]; + else + fatal_error (input_location, + "unrecognized option passed to %%:target_mode_check"); + argc -= 2; + argv += 2; + } + + /* No architecture, or CPU, has option extensions that change + whether or not we have a Thumb-only device, so there is no need + to scan any option extensions specified. */ + + /* If the architecture is specified, that overrides any CPU setting. */ + if (arch) + { + const arch_option *arch_opt + = arm_parse_arch_option_name (all_architectures, "-march", arch); + + if (arch_opt && !check_isa_bits_for (arch_opt->common.isa_bits, + isa_bit_notm)) + return "-mthumb"; + } + else if (cpu) + { + const cpu_option *cpu_opt + = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu); + + if (cpu_opt && !check_isa_bits_for (cpu_opt->common.isa_bits, + isa_bit_notm)) + return "-mthumb"; + } + + /* Compiler hasn't been configured with a default, and the CPU + doesn't require Thumb, so default to ARM. */ + return "-marm"; +} + +/* List the permitted CPU option names. If TARGET is a near miss for an + entry, print out the suggested alternative. */ +static void +arm_print_hint_for_cpu_option (const char *target, + const cpu_option *list) +{ + auto_vec<const char*> candidates; + for (; list->common.name != NULL; list++) + candidates.safe_push (list->common.name); + char *s; + const char *hint = candidates_list_and_hint (target, s, candidates); + if (hint) + inform (input_location, "valid arguments are: %s; did you mean %qs?", + s, hint); + else + inform (input_location, "valid arguments are: %s", s); + + XDELETEVEC (s); +} + +/* Parse the base component of a CPU selection in LIST. Return a + pointer to the entry in the architecture table. OPTNAME is the + name of the option we are parsing and can be used if a diagnostic + is needed. */ +const cpu_option * +arm_parse_cpu_option_name (const cpu_option *list, const char *optname, + const char *target) +{ + const cpu_option *entry; + const char *end = strchr (target, '+'); + size_t len = end ? end - target : strlen (target); - if (argc) + for (entry = list; entry->common.name != NULL; entry++) { - for (opt = 0; opt < (ARRAY_SIZE (arm_arch_core_flags)); opt++) - if ((strcmp (argv[argc - 1], arm_arch_core_flags[opt].name) == 0) - && !check_isa_bits_for (arm_arch_core_flags[opt].isa_bits, - isa_bit_notm)) - return "-mthumb"; + if (strncmp (entry->common.name, target, len) == 0 + && entry->common.name[len] == '\0') + return entry; + } + + error_at (input_location, "unrecognized %s target: %s", optname, target); + arm_print_hint_for_cpu_option (target, list); + return NULL; +} - return NULL; +/* List the permitted architecture option names. If TARGET is a near + miss for an entry, print out the suggested alternative. */ +static void +arm_print_hint_for_arch_option (const char *target, + const arch_option *list) +{ + auto_vec<const char*> candidates; + for (; list->common.name != NULL; list++) + candidates.safe_push (list->common.name); + char *s; + const char *hint = candidates_list_and_hint (target, s, candidates); + if (hint) + inform (input_location, "valid arguments are: %s; did you mean %qs?", + s, hint); + else + inform (input_location, "valid arguments are: %s", s); + + XDELETEVEC (s); +} + +/* Parse the base component of a CPU or architecture selection in + LIST. Return a pointer to the entry in the architecture table. + OPTNAME is the name of the option we are parsing and can be used if + a diagnostic is needed. */ +const arch_option * +arm_parse_arch_option_name (const arch_option *list, const char *optname, + const char *target) +{ + const arch_option *entry; + const char *end = strchr (target, '+'); + size_t len = end ? end - target : strlen (target); + + for (entry = list; entry->common.name != NULL; entry++) + { + if (strncmp (entry->common.name, target, len) == 0 + && entry->common.name[len] == '\0') + return entry; } + + error_at (input_location, "unrecognized %s target: %s", optname, target); + arm_print_hint_for_arch_option (target, list); + return NULL; +} + +/* List the permitted architecture option names. If TARGET is a near + miss for an entry, print out the suggested alternative. */ +static void +arm_print_hint_for_fpu_option (const char *target) +{ + auto_vec<const char*> candidates; + for (int i = 0; i < TARGET_FPU_auto; i++) + candidates.safe_push (all_fpus[i].name); + char *s; + const char *hint = candidates_list_and_hint (target, s, candidates); + if (hint) + inform (input_location, "valid arguments are: %s; did you mean %qs?", + s, hint); else - return NULL; + inform (input_location, "valid arguments are: %s", s); + + XDELETEVEC (s); +} + +static const arm_fpu_desc * +arm_parse_fpu_option (const char *opt) +{ + int i; + + for (i = 0; i < TARGET_FPU_auto; i++) + { + if (strcmp (all_fpus[i].name, opt) == 0) + return all_fpus + i; + } + + error_at (input_location, "unrecognized -mfpu target: %s", opt); + arm_print_hint_for_fpu_option (opt); + return NULL; +} + +/* Convert a static initializer array of feature bits to sbitmap + representation. */ +void +arm_initialize_isa (sbitmap isa, const enum isa_feature *isa_bits) +{ + bitmap_clear (isa); + while (*isa_bits != isa_nobit) + bitmap_set_bit (isa, *(isa_bits++)); +} + +/* OPT isn't a recognized feature. Print a suitable error message and + suggest a possible value. Always print the list of permitted + values. */ +static void +arm_unrecognized_feature (const char *opt, size_t len, + const cpu_arch_option *target) +{ + char *this_opt = XALLOCAVEC (char, len+1); + auto_vec<const char*> candidates; + + strncpy (this_opt, opt, len); + this_opt[len] = 0; + + error_at (input_location, "%qs does not support feature %qs", target->name, + this_opt); + for (const cpu_arch_extension *list = target->extensions; + list->name != NULL; + list++) + candidates.safe_push (list->name); + + char *s; + const char *hint = candidates_list_and_hint (this_opt, s, candidates); + + if (hint) + inform (input_location, "valid feature names are: %s; did you mean %qs?", + s, hint); + else + inform (input_location, "valid feature names are: %s", s); + + XDELETEVEC (s); +} + +/* Parse any feature extensions to add to (or remove from) the + permitted ISA selection. */ +void +arm_parse_option_features (sbitmap isa, const cpu_arch_option *target, + const char *opts_in) +{ + const char *opts = opts_in; + + if (!opts) + return; + + if (!target->extensions) + { + error_at (input_location, "%s does not take any feature options", + target->name); + return; + } + + while (opts) + { + gcc_assert (*opts == '+'); + const struct cpu_arch_extension *entry; + const char *end = strchr (++opts, '+'); + size_t len = end ? end - opts : strlen (opts); + bool matched = false; + + for (entry = target->extensions; + !matched && entry->name != NULL; + entry++) + { + if (strncmp (entry->name, opts, len) == 0 + && entry->name[len] == '\0') + { + if (isa) + { + const enum isa_feature *f = entry->isa_bits; + if (entry->remove) + { + while (*f != isa_nobit) + bitmap_clear_bit (isa, *(f++)); + } + else + { + while (*f != isa_nobit) + bitmap_set_bit (isa, *(f++)); + } + } + matched = true; + } + } + + if (!matched) + arm_unrecognized_feature (opts, len, target); + + opts = end; + } +} + +class candidate_extension +{ +public: + const cpu_arch_extension *extension; + sbitmap isa_bits; + bool required; + + candidate_extension (const cpu_arch_extension *ext, sbitmap bits) + : extension (ext), isa_bits (bits), required (true) + {} + ~candidate_extension () + { + sbitmap_free (isa_bits); + } +}; + +/* Generate a canonical representation of the -march option from the + current -march string (if given) and other options on the command + line that might affect the architecture. This aids multilib selection + by ensuring that: + a) the option is always present + b) only the minimal set of options are used + c) when there are multiple extensions, they are in a consistent order. + + The options array consists of couplets of information where the + first item in each couplet is the string describing which option + name was selected (arch, cpu, fpu) and the second is the value + passed for that option. */ +const char * +arm_canon_arch_option (int argc, const char **argv) +{ + const char *arch = NULL; + const char *cpu = NULL; + const char *fpu = NULL; + const char *abi = NULL; + static char *canonical_arch = NULL; + + /* Just in case we're called more than once. */ + if (canonical_arch) + { + free (canonical_arch); + canonical_arch = NULL; + } + + if (argc & 1) + fatal_error (input_location, + "%%:canon_for_mlib takes 1 or more pairs of parameters"); + + while (argc) + { + if (strcmp (argv[0], "arch") == 0) + arch = argv[1]; + else if (strcmp (argv[0], "cpu") == 0) + cpu = argv[1]; + else if (strcmp (argv[0], "fpu") == 0) + fpu = argv[1]; + else if (strcmp (argv[0], "abi") == 0) + abi = argv[1]; + else + fatal_error (input_location, + "unrecognized operand to %%:canon_for_mlib"); + + argc -= 2; + argv += 2; + } + + auto_sbitmap target_isa (isa_num_bits); + auto_sbitmap base_isa (isa_num_bits); + auto_sbitmap fpu_isa (isa_num_bits); + + bitmap_clear (fpu_isa); + + const arch_option *selected_arch = NULL; + + /* At least one of these must be defined by either the specs or the + user. */ + gcc_assert (cpu || arch); + + if (!fpu) + fpu = FPUTYPE_AUTO; + + if (!abi) + { + if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFT) + abi = "soft"; + else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFTFP) + abi = "softfp"; + else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_HARD) + abi = "hard"; + } + + /* First build up a bitmap describing the target architecture. */ + if (arch) + { + selected_arch = arm_parse_arch_option_name (all_architectures, + "-march", arch); + + if (selected_arch == NULL) + return ""; + + arm_initialize_isa (target_isa, selected_arch->common.isa_bits); + arm_parse_option_features (target_isa, &selected_arch->common, + strchr (arch, '+')); + if (fpu && strcmp (fpu, "auto") != 0) + { + /* We assume that architectures do not have any FPU bits + enabled by default. If they did, we would need to strip + these out first. */ + const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu); + if (target_fpu == NULL) + return ""; + + arm_initialize_isa (fpu_isa, target_fpu->isa_bits); + bitmap_ior (target_isa, target_isa, fpu_isa); + } + } + else if (cpu) + { + const cpu_option *selected_cpu + = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu); + + if (selected_cpu == NULL) + return ""; + + arm_initialize_isa (target_isa, selected_cpu->common.isa_bits); + arm_parse_option_features (target_isa, &selected_cpu->common, + strchr (cpu, '+')); + if (fpu && strcmp (fpu, "auto") != 0) + { + /* The easiest and safest way to remove the default fpu + capabilities is to look for a '+no..' option that removes + the base FPU bit (isa_bit_VFPv2). If that doesn't exist + then the best we can do is strip out all the bits that + might be part of the most capable FPU we know about, + which is "crypto-neon-fp-armv8". */ + bool default_fpu_found = false; + if (selected_cpu->common.extensions) + { + const cpu_arch_extension *ext; + for (ext = selected_cpu->common.extensions; ext->name != NULL; + ++ext) + { + if (ext->remove + && check_isa_bits_for (ext->isa_bits, isa_bit_VFPv2)) + { + arm_initialize_isa (fpu_isa, ext->isa_bits); + bitmap_and_compl (target_isa, target_isa, fpu_isa); + default_fpu_found = true; + } + } + + } + + if (!default_fpu_found) + { + arm_initialize_isa + (fpu_isa, + all_fpus[TARGET_FPU_crypto_neon_fp_armv8].isa_bits); + bitmap_and_compl (target_isa, target_isa, fpu_isa); + } + + const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu); + if (target_fpu == NULL) + return ""; + + arm_initialize_isa (fpu_isa, target_fpu->isa_bits); + bitmap_ior (target_isa, target_isa, fpu_isa); + } + + selected_arch = all_architectures + selected_cpu->arch; + } + + /* If we have a soft-float ABI, disable the FPU. */ + if (abi && strcmp (abi, "soft") == 0) + { + /* Clearing the VFPv2 bit is sufficient to stop any extention that + builds on the FPU from matching. */ + bitmap_clear_bit (target_isa, isa_bit_VFPv2); + } + + /* If we don't have a selected architecture by now, something's + badly wrong. */ + gcc_assert (selected_arch); + + arm_initialize_isa (base_isa, selected_arch->common.isa_bits); + + /* Architecture has no extension options, so just return the canonical + architecture name. */ + if (selected_arch->common.extensions == NULL) + return selected_arch->common.name; + + /* We're only interested in extension bits. */ + bitmap_and_compl (target_isa, target_isa, base_isa); + + /* There are no extensions needed. Just return the canonical architecture + name. */ + if (bitmap_empty_p (target_isa)) + return selected_arch->common.name; + + /* What is left is the architecture that the compiler will target. We + now need to map that back into a suitable option+features list. + + The list is built in two passes. First we scan every additive + option feature supported by the architecture. If the option + provides a subset of the features we need we add it to the list + of candidates. We then scan backwards over the list of + candidates and if we find a feature that adds nothing to one that + was later in the list we mark it as redundant. The result is a + minimal list of required features for the target + architecture. */ + + std::list<candidate_extension *> extensions; + + auto_sbitmap target_isa_unsatisfied (isa_num_bits); + bitmap_copy (target_isa_unsatisfied, target_isa); + + sbitmap isa_bits = NULL; + for (const cpu_arch_extension *cand = selected_arch->common.extensions; + cand->name != NULL; + cand++) + { + if (cand->remove || cand->alias) + continue; + + if (isa_bits == NULL) + isa_bits = sbitmap_alloc (isa_num_bits); + + arm_initialize_isa (isa_bits, cand->isa_bits); + if (bitmap_subset_p (isa_bits, target_isa)) + { + extensions.push_back (new candidate_extension (cand, isa_bits)); + bitmap_and_compl (target_isa_unsatisfied, target_isa_unsatisfied, + isa_bits); + isa_bits = NULL; + } + } + + /* There's one extra case to consider, which is that the user has + specified an FPU that is less capable than this architecture + supports. In that case the code above will fail to find a + suitable feature. We handle this by scanning the list of options + again, matching the first option that provides an FPU that is + more capable than the selected FPU. + + Note that the other case (user specified a more capable FPU than + this architecture supports) should end up selecting the most + capable FPU variant that we do support. This is sufficient for + multilib selection. */ + + if (bitmap_bit_p (target_isa_unsatisfied, isa_bit_VFPv2) + && bitmap_bit_p (fpu_isa, isa_bit_VFPv2)) + { + std::list<candidate_extension *>::iterator ipoint = extensions.begin (); + + for (const cpu_arch_extension *cand = selected_arch->common.extensions; + cand->name != NULL; + cand++) + { + if (cand->remove || cand->alias) + continue; + + if (isa_bits == NULL) + isa_bits = sbitmap_alloc (isa_num_bits); + + /* We need to keep the features in canonical order, so move the + insertion point if this feature is a candidate. */ + if (ipoint != extensions.end () + && (*ipoint)->extension == cand) + ++ipoint; + + arm_initialize_isa (isa_bits, cand->isa_bits); + if (bitmap_subset_p (fpu_isa, isa_bits)) + { + extensions.insert (ipoint, + new candidate_extension (cand, isa_bits)); + isa_bits = NULL; + break; + } + } + } + + if (isa_bits) + sbitmap_free (isa_bits); + + bitmap_clear (target_isa); + size_t len = 1; + for (std::list<candidate_extension *>::reverse_iterator riter + = extensions.rbegin (); + riter != extensions.rend (); ++riter) + { + if (bitmap_subset_p ((*riter)->isa_bits, target_isa)) + (*riter)->required = false; + else + { + bitmap_ior (target_isa, target_isa, (*riter)->isa_bits); + len += strlen ((*riter)->extension->name) + 1; + } + } + + canonical_arch + = (char *) xmalloc (len + strlen (selected_arch->common.name)); + + strcpy (canonical_arch, selected_arch->common.name); + + for (std::list<candidate_extension *>::iterator iter = extensions.begin (); + iter != extensions.end (); ++iter) + { + if ((*iter)->required) + { + strcat (canonical_arch, "+"); + strcat (canonical_arch, (*iter)->extension->name); + } + delete (*iter); + } + + return canonical_arch; } #undef ARM_CPU_NAME_LENGTH diff --git a/gcc/config.gcc b/gcc/config.gcc index 99c9c4a3e60..7c083622c1b 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -457,6 +457,7 @@ powerpc*-*-*spe*) ;; powerpc*-*-*) cpu_type=rs6000 + extra_objs="rs6000-string.o" extra_headers="ppc-asm.h altivec.h htmintrin.h htmxlintrin.h" extra_headers="${extra_headers} bmi2intrin.h bmiintrin.h x86intrin.h" extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h" @@ -474,6 +475,7 @@ riscv*) ;; rs6000*-*-*) extra_options="${extra_options} g.opt fused-madd.opt rs6000/rs6000-tables.opt" + extra_objs="rs6000-string.o" ;; sparc*-*-*) cpu_type=sparc @@ -1092,7 +1094,7 @@ arm*-*-freebsd*) # ARM FreeBSD EABI tm_file="${tm_file} arm/bpabi.h arm/freebsd.h arm/aout.h arm/arm.h" case $target in armv6*-*-freebsd*) - target_cpu_cname="arm1176jzfs" + target_cpu_cname="arm1176jzf-s" tm_defines="${tm_defines} TARGET_FREEBSD_ARMv6=1" if test $fbsd_major -ge 11; then tm_defines="${tm_defines} TARGET_FREEBSD_ARM_HARD_FLOAT=1" @@ -1163,8 +1165,8 @@ arm*-*-eabi* | arm*-*-symbianelf* | arm*-*-rtems* | arm*-*-fuchsia*) ;; arm*-*-fuchsia*) tm_file="${tm_file} fuchsia.h arm/fuchsia-elf.h glibc-stdint.h" - tmake_file="${tmake_file} arm/t-bpabi" - target_cpu_cname="genericv7a" + tmake_file="${tmake_file} arm/t-bpabi arm/t-fuchsia" + target_cpu_cname="generic-armv7-a" ;; arm*-*-rtems*) tm_file="${tm_file} rtems.h arm/rtems.h newlib-stdint.h" @@ -3865,11 +3867,15 @@ case "${target}" in echo "Error: You cannot use any of --with-arch/cpu/fpu/float/mode with --with-multilib-list=${with_multilib_list}" 1>&2 exit 1 fi - + # But pass the default value for float-abi + # through to the multilib selector + with_float="soft" tmake_file="${tmake_file} ${tmake_profile_file}" TM_MULTILIB_CONFIG="$with_multilib_list" fi fi + target_cpu_cname=${target_cpu_cname:-arm6} + with_cpu=${with_cpu:-$target_cpu_cname} ;; fr*-*-*linux*) @@ -4521,11 +4527,12 @@ case ${target} in ;; arm*-*-*) - if test x$target_cpu_cname = x + if test x$with_cpu = x then - target_cpu_default2=TARGET_CPU_arm6 + echo "Don't know the target cpu" 1>&2 + exit 1 else - target_cpu_default2=TARGET_CPU_$target_cpu_cname + target_cpu_default2="\\\"$with_cpu\\\"" fi ;; diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 92b57cffb35..f8342ca722d 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -43,7 +43,7 @@ VARIANT is the variant of the CPU. In a GNU/Linux system it can found in /proc/cpuinfo. If this is -1, this means it can match any variant. */ -/* V8 Architecture Processors. */ +/* ARMv8-A Architecture Processors. */ /* ARM ('A') cores. */ AARCH64_CORE("cortex-a35", cortexa35, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa35, 0x41, 0xd04, -1) @@ -52,37 +52,49 @@ AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AA AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, 0x41, 0xd08, -1) AARCH64_CORE("cortex-a73", cortexa73, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa73, 0x41, 0xd09, -1) -/* Samsung ('S') cores. */ -AARCH64_CORE("exynos-m1", exynosm1, exynosm1, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, exynosm1, 0x53, 0x001, -1) - -/* Qualcomm ('Q') cores. */ -AARCH64_CORE("falkor", falkor, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, qdf24xx, 0x51, 0xC00, -1) -AARCH64_CORE("qdf24xx", qdf24xx, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, qdf24xx, 0x51, 0xC00, -1) - /* Cavium ('C') cores. */ AARCH64_CORE("thunderx", thunderx, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, 0x43, 0x0a0, -1) /* Do not swap around "thunderxt88p1" and "thunderxt88", this order is required to handle variant correctly. */ -AARCH64_CORE("thunderxt88p1", thunderxt88p1, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, 0x43, 0x0a1, 0) -AARCH64_CORE("thunderxt88", thunderxt88, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, 0x43, 0x0a1, -1) +AARCH64_CORE("thunderxt88p1", thunderxt88p1, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderxt88, 0x43, 0x0a1, 0) +AARCH64_CORE("thunderxt88", thunderxt88, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderxt88, 0x43, 0x0a1, -1) AARCH64_CORE("thunderxt81", thunderxt81, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, 0x43, 0x0a2, -1) AARCH64_CORE("thunderxt83", thunderxt83, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, 0x43, 0x0a3, -1) -AARCH64_CORE("thunderx2t99", thunderx2t99, thunderx2t99, 8_1A, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, thunderx2t99, 0x43, 0x0af, -1) /* APM ('P') cores. */ AARCH64_CORE("xgene1", xgene1, xgene1, 8A, AARCH64_FL_FOR_ARCH8, xgene1, 0x50, 0x000, -1) -/* V8.1 Architecture Processors. */ +/* Qualcomm ('Q') cores. */ +AARCH64_CORE("falkor", falkor, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, qdf24xx, 0x51, 0xC00, -1) +AARCH64_CORE("qdf24xx", qdf24xx, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, qdf24xx, 0x51, 0xC00, -1) + +/* Samsung ('S') cores. */ +AARCH64_CORE("exynos-m1", exynosm1, exynosm1, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, exynosm1, 0x53, 0x001, -1) + +/* ARMv8.1-A Architecture Processors. */ /* Broadcom ('B') cores. */ AARCH64_CORE("thunderx2t99p1", thunderx2t99p1, thunderx2t99, 8_1A, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, thunderx2t99, 0x42, 0x516, -1) AARCH64_CORE("vulcan", vulcan, thunderx2t99, 8_1A, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, thunderx2t99, 0x42, 0x516, -1) -/* V8 big.LITTLE implementations. */ +/* Cavium ('C') cores. */ +AARCH64_CORE("thunderx2t99", thunderx2t99, thunderx2t99, 8_1A, AARCH64_FL_FOR_ARCH8_1 | AARCH64_FL_CRYPTO, thunderx2t99, 0x43, 0x0af, -1) + +/* ARMv8.2-A Architecture Processors. */ + +/* ARM ('A') cores. */ +AARCH64_CORE("cortex-a55", cortexa55, cortexa53, 8_2A, AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_RCPC, cortexa53, 0x41, 0xd05, -1) +AARCH64_CORE("cortex-a75", cortexa75, cortexa57, 8_2A, AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_RCPC, cortexa73, 0x41, 0xd0a, -1) + +/* ARMv8-A big.LITTLE implementations. */ AARCH64_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, 0x41, AARCH64_BIG_LITTLE (0xd07, 0xd03), -1) AARCH64_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, 0x41, AARCH64_BIG_LITTLE (0xd08, 0xd03), -1) AARCH64_CORE("cortex-a73.cortex-a35", cortexa73cortexa35, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa73, 0x41, AARCH64_BIG_LITTLE (0xd09, 0xd04), -1) AARCH64_CORE("cortex-a73.cortex-a53", cortexa73cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa73, 0x41, AARCH64_BIG_LITTLE (0xd09, 0xd03), -1) +/* ARM DynamIQ big.LITTLE configurations. */ + +AARCH64_CORE("cortex-a75.cortex-a55", cortexa75cortexa55, cortexa53, 8_2A, AARCH64_FL_FOR_ARCH8_2 | AARCH64_FL_RCPC, cortexa73, 0x41, AARCH64_BIG_LITTLE (0xd0a, 0xd05), -1) + #undef AARCH64_CORE diff --git a/gcc/config/aarch64/aarch64-cost-tables.h b/gcc/config/aarch64/aarch64-cost-tables.h index 070c083beb3..5d149bd09af 100644 --- a/gcc/config/aarch64/aarch64-cost-tables.h +++ b/gcc/config/aarch64/aarch64-cost-tables.h @@ -136,8 +136,8 @@ const struct cpu_cost_table thunderx_extra_costs = 0, /* Logical. */ 0, /* Shift. */ 0, /* Shift_reg. */ - COSTS_N_INSNS (1), /* Arith_shift. */ - COSTS_N_INSNS (1), /* Arith_shift_reg. */ + COSTS_N_INSNS (1)+1, /* Arith_shift. */ + COSTS_N_INSNS (1)+1, /* Arith_shift_reg. */ COSTS_N_INSNS (1), /* UNUSED: Log_shift. */ COSTS_N_INSNS (1), /* UNUSED: Log_shift_reg. */ 0, /* Extend. */ diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def index 36766d9c48f..c0752ce3470 100644 --- a/gcc/config/aarch64/aarch64-option-extensions.def +++ b/gcc/config/aarch64/aarch64-option-extensions.def @@ -58,6 +58,9 @@ AARCH64_OPT_EXTENSION("lse", AARCH64_FL_LSE, 0, 0, "atomics") /* Enabling "fp16" also enables "fp". Disabling "fp16" just disables "fp16". */ -AARCH64_OPT_EXTENSION("fp16", AARCH64_FL_F16, AARCH64_FL_FP, 0, "fp16") +AARCH64_OPT_EXTENSION("fp16", AARCH64_FL_F16, AARCH64_FL_FP, 0, "fphp asimdhp") + +/* Enabling or disabling "rcpc" only changes "rcpc". */ +AARCH64_OPT_EXTENSION("rcpc", AARCH64_FL_RCPC, 0, 0, "lrcpc") #undef AARCH64_OPT_EXTENSION diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index ac91865b75f..bfe44a75e12 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -203,6 +203,16 @@ struct cpu_approx_modes const unsigned int recip_sqrt; /* Reciprocal square root. */ }; +/* Cache prefetch settings for prefetch-loop-arrays. */ +struct cpu_prefetch_tune +{ + const int num_slots; + const int l1_cache_size; + const int l1_cache_line_size; + const int l2_cache_size; + const int default_opt_level; +}; + struct tune_params { const struct cpu_cost_table *insn_extra_cost; @@ -224,9 +234,6 @@ struct tune_params int min_div_recip_mul_df; /* Value for aarch64_case_values_threshold; or 0 for the default. */ unsigned int max_case_values; - /* Value for PARAM_L1_CACHE_LINE_SIZE; or 0 to use the default. */ - unsigned int cache_line_size; - /* An enum specifying how to take into account CPU autoprefetch capabilities during instruction scheduling: - AUTOPREFETCHER_OFF: Do not take autoprefetch capabilities into account. @@ -244,6 +251,10 @@ struct tune_params } autoprefetcher_model; unsigned int extra_tuning_flags; + + /* Place prefetch struct pointer at the end to enable type checking + errors when tune_params misses elements (e.g., from erroneous merges). */ + const struct cpu_prefetch_tune *prefetch; }; #define AARCH64_FUSION_PAIR(x, name) \ diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index c5a86ff6f71..264a9c047ce 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -44,12 +44,12 @@ (define_insn "aarch64_simd_dup<mode>" [(set (match_operand:VDQ_I 0 "register_operand" "=w, w") (vec_duplicate:VDQ_I - (match_operand:<VEL> 1 "register_operand" "r, w")))] + (match_operand:<VEL> 1 "register_operand" "w,?r")))] "TARGET_SIMD" "@ - dup\\t%0.<Vtype>, %<vw>1 - dup\\t%0.<Vtype>, %1.<Vetype>[0]" - [(set_attr "type" "neon_from_gp<q>, neon_dup<q>")] + dup\\t%0.<Vtype>, %1.<Vetype>[0] + dup\\t%0.<Vtype>, %<vw>1" + [(set_attr "type" "neon_dup<q>, neon_from_gp<q>")] ) (define_insn "aarch64_simd_dup<mode>" @@ -105,7 +105,7 @@ { case 0: return "ldr\\t%d0, %1"; case 1: return "str\\t%d1, %0"; - case 2: return "orr\t%0.<Vbtype>, %1.<Vbtype>, %1.<Vbtype>"; + case 2: return "mov\t%0.<Vbtype>, %1.<Vbtype>"; case 3: return "umov\t%0, %1.d[0]"; case 4: return "fmov\t%d0, %1"; case 5: return "mov\t%0, %1"; @@ -136,7 +136,7 @@ case 1: return "str\\t%q1, %0"; case 2: - return "orr\t%0.<Vbtype>, %1.<Vbtype>, %1.<Vbtype>"; + return "mov\t%0.<Vbtype>, %1.<Vbtype>"; case 3: case 4: case 5: @@ -5831,7 +5831,7 @@ UNSPEC_PMULL))] "TARGET_SIMD && TARGET_CRYPTO" "pmull\\t%0.1q, %1.1d, %2.1d" - [(set_attr "type" "neon_mul_d_long")] + [(set_attr "type" "crypto_pmull")] ) (define_insn "aarch64_crypto_pmullv2di" @@ -5841,5 +5841,5 @@ UNSPEC_PMULL2))] "TARGET_SIMD && TARGET_CRYPTO" "pmull2\\t%0.1q, %1.2d, %2.2d" - [(set_attr "type" "neon_mul_d_long")] + [(set_attr "type" "crypto_pmull")] ) diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md index c948846af7e..7fcd6cb2c2e 100644 --- a/gcc/config/aarch64/aarch64-tune.md +++ b/gcc/config/aarch64/aarch64-tune.md @@ -1,5 +1,5 @@ ;; -*- buffer-read-only: t -*- ;; Generated automatically by gentune.sh from aarch64-cores.def (define_attr "tune" - "cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,exynosm1,falkor,qdf24xx,thunderx,thunderxt88p1,thunderxt88,thunderxt81,thunderxt83,thunderx2t99,xgene1,thunderx2t99p1,vulcan,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53" + "cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,thunderxt81,thunderxt83,xgene1,falkor,qdf24xx,exynosm1,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55" (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) diff --git a/gcc/config/aarch64/aarch64-tuning-flags.def b/gcc/config/aarch64/aarch64-tuning-flags.def index 9f980e3e498..f48642c2808 100644 --- a/gcc/config/aarch64/aarch64-tuning-flags.def +++ b/gcc/config/aarch64/aarch64-tuning-flags.def @@ -35,4 +35,10 @@ two load/stores are not at least 8 byte aligned don't create load/store pairs. */ AARCH64_EXTRA_TUNING_OPTION ("slow_unaligned_ldpw", SLOW_UNALIGNED_LDPW) +/* Some of the optional shift to some arthematic instructions are + considered cheap. Logical shift left <=4 with or without a + zero extend are considered cheap. Sign extend; non logical shift left + are not considered cheap. */ +AARCH64_EXTRA_TUNING_OPTION ("cheap_shift_extend", CHEAP_SHIFT_EXTEND) + #undef AARCH64_EXTRA_TUNING_OPTION diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index bce490ff555..95592f9fa17 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -526,6 +526,61 @@ static const cpu_approx_modes xgene1_approx_modes = AARCH64_APPROX_ALL /* recip_sqrt */ }; +/* Generic prefetch settings (which disable prefetch). */ +static const cpu_prefetch_tune generic_prefetch_tune = +{ + 0, /* num_slots */ + -1, /* l1_cache_size */ + -1, /* l1_cache_line_size */ + -1, /* l2_cache_size */ + -1 /* default_opt_level */ +}; + +static const cpu_prefetch_tune exynosm1_prefetch_tune = +{ + 0, /* num_slots */ + -1, /* l1_cache_size */ + 64, /* l1_cache_line_size */ + -1, /* l2_cache_size */ + -1 /* default_opt_level */ +}; + +static const cpu_prefetch_tune qdf24xx_prefetch_tune = +{ + 4, /* num_slots */ + 32, /* l1_cache_size */ + 64, /* l1_cache_line_size */ + 1024, /* l2_cache_size */ + 3 /* default_opt_level */ +}; + +static const cpu_prefetch_tune thunderxt88_prefetch_tune = +{ + 8, /* num_slots */ + 32, /* l1_cache_size */ + 128, /* l1_cache_line_size */ + 16*1024, /* l2_cache_size */ + 3 /* default_opt_level */ +}; + +static const cpu_prefetch_tune thunderx_prefetch_tune = +{ + 8, /* num_slots */ + 32, /* l1_cache_size */ + 128, /* l1_cache_line_size */ + -1, /* l2_cache_size */ + -1 /* default_opt_level */ +}; + +static const cpu_prefetch_tune thunderx2t99_prefetch_tune = +{ + 8, /* num_slots */ + 32, /* l1_cache_size */ + 64, /* l1_cache_line_size */ + 256, /* l2_cache_size */ + -1 /* default_opt_level */ +}; + static const struct tune_params generic_tunings = { &cortexa57_extra_costs, @@ -546,9 +601,9 @@ static const struct tune_params generic_tunings = 2, /* min_div_recip_mul_sf. */ 2, /* min_div_recip_mul_df. */ 0, /* max_case_values. */ - 0, /* cache_line_size. */ tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */ + (AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */ + &generic_prefetch_tune }; static const struct tune_params cortexa35_tunings = @@ -572,9 +627,9 @@ static const struct tune_params cortexa35_tunings = 2, /* min_div_recip_mul_sf. */ 2, /* min_div_recip_mul_df. */ 0, /* max_case_values. */ - 0, /* cache_line_size. */ tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */ + (AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */ + &generic_prefetch_tune }; static const struct tune_params cortexa53_tunings = @@ -598,9 +653,9 @@ static const struct tune_params cortexa53_tunings = 2, /* min_div_recip_mul_sf. */ 2, /* min_div_recip_mul_df. */ 0, /* max_case_values. */ - 0, /* cache_line_size. */ tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */ + (AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */ + &generic_prefetch_tune }; static const struct tune_params cortexa57_tunings = @@ -624,9 +679,9 @@ static const struct tune_params cortexa57_tunings = 2, /* min_div_recip_mul_sf. */ 2, /* min_div_recip_mul_df. */ 0, /* max_case_values. */ - 0, /* cache_line_size. */ tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_RENAME_FMA_REGS) /* tune_flags. */ + (AARCH64_EXTRA_TUNE_RENAME_FMA_REGS), /* tune_flags. */ + &generic_prefetch_tune }; static const struct tune_params cortexa72_tunings = @@ -650,9 +705,9 @@ static const struct tune_params cortexa72_tunings = 2, /* min_div_recip_mul_sf. */ 2, /* min_div_recip_mul_df. */ 0, /* max_case_values. */ - 0, /* cache_line_size. */ tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */ + (AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */ + &generic_prefetch_tune }; static const struct tune_params cortexa73_tunings = @@ -676,11 +731,13 @@ static const struct tune_params cortexa73_tunings = 2, /* min_div_recip_mul_sf. */ 2, /* min_div_recip_mul_df. */ 0, /* max_case_values. */ - 0, /* cache_line_size. */ tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */ + (AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */ + &generic_prefetch_tune }; + + static const struct tune_params exynosm1_tunings = { &exynosm1_extra_costs, @@ -701,9 +758,34 @@ static const struct tune_params exynosm1_tunings = 2, /* min_div_recip_mul_sf. */ 2, /* min_div_recip_mul_df. */ 48, /* max_case_values. */ - 64, /* cache_line_size. */ tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */ + (AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */ + &exynosm1_prefetch_tune +}; + +static const struct tune_params thunderxt88_tunings = +{ + &thunderx_extra_costs, + &generic_addrcost_table, + &thunderx_regmove_cost, + &thunderx_vector_cost, + &generic_branch_cost, + &generic_approx_modes, + 6, /* memmov_cost */ + 2, /* issue_rate */ + AARCH64_FUSE_CMP_BRANCH, /* fusible_ops */ + 8, /* function_align. */ + 8, /* jump_align. */ + 8, /* loop_align. */ + 2, /* int_reassoc_width. */ + 4, /* fp_reassoc_width. */ + 1, /* vec_reassoc_width. */ + 2, /* min_div_recip_mul_sf. */ + 2, /* min_div_recip_mul_df. */ + 0, /* max_case_values. */ + tune_params::AUTOPREFETCHER_OFF, /* autoprefetcher_model. */ + (AARCH64_EXTRA_TUNE_SLOW_UNALIGNED_LDPW), /* tune_flags. */ + &thunderxt88_prefetch_tune }; static const struct tune_params thunderx_tunings = @@ -726,9 +808,10 @@ static const struct tune_params thunderx_tunings = 2, /* min_div_recip_mul_sf. */ 2, /* min_div_recip_mul_df. */ 0, /* max_case_values. */ - 0, /* cache_line_size. */ tune_params::AUTOPREFETCHER_OFF, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_SLOW_UNALIGNED_LDPW) /* tune_flags. */ + (AARCH64_EXTRA_TUNE_SLOW_UNALIGNED_LDPW + | AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND), /* tune_flags. */ + &thunderx_prefetch_tune }; static const struct tune_params xgene1_tunings = @@ -751,9 +834,9 @@ static const struct tune_params xgene1_tunings = 2, /* min_div_recip_mul_sf. */ 2, /* min_div_recip_mul_df. */ 0, /* max_case_values. */ - 0, /* cache_line_size. */ tune_params::AUTOPREFETCHER_OFF, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */ + (AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */ + &generic_prefetch_tune }; static const struct tune_params qdf24xx_tunings = @@ -777,9 +860,9 @@ static const struct tune_params qdf24xx_tunings = 2, /* min_div_recip_mul_sf. */ 2, /* min_div_recip_mul_df. */ 0, /* max_case_values. */ - 64, /* cache_line_size. */ tune_params::AUTOPREFETCHER_STRONG, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */ + (AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */ + &qdf24xx_prefetch_tune }; static const struct tune_params thunderx2t99_tunings = @@ -802,9 +885,9 @@ static const struct tune_params thunderx2t99_tunings = 2, /* min_div_recip_mul_sf. */ 2, /* min_div_recip_mul_df. */ 0, /* max_case_values. */ - 64, /* cache_line_size. */ - tune_params::AUTOPREFETCHER_OFF, /* autoprefetcher_model. */ - (AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */ + tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */ + (AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */ + &thunderx2t99_prefetch_tune }; /* Support for fine-grained override of the tuning structures. */ @@ -2683,11 +2766,19 @@ aarch64_emit_probe_stack_range (HOST_WIDE_INT first, HOST_WIDE_INT size) plus_constant (Pmode, stack_pointer_rtx, -first)); /* LAST_ADDR = SP + FIRST + ROUNDED_SIZE. */ - emit_set_insn (reg2, - plus_constant (Pmode, stack_pointer_rtx, - -(first + rounded_size))); - - + HOST_WIDE_INT adjustment = - (first + rounded_size); + if (! aarch64_uimm12_shift (adjustment)) + { + aarch64_internal_mov_immediate (reg2, GEN_INT (adjustment), + true, Pmode); + emit_set_insn (reg2, gen_rtx_PLUS (Pmode, stack_pointer_rtx, reg2)); + } + else + { + emit_set_insn (reg2, + plus_constant (Pmode, stack_pointer_rtx, adjustment)); + } + /* Step 3: the loop do @@ -6038,9 +6129,10 @@ aarch64_strip_shift (rtx x) /* Helper function for rtx cost calculation. Strip an extend expression from X. Returns the inner operand if successful, or the original expression on failure. We deal with a number of possible - canonicalization variations here. */ + canonicalization variations here. If STRIP_SHIFT is true, then + we can strip off a shift also. */ static rtx -aarch64_strip_extend (rtx x) +aarch64_strip_extend (rtx x, bool strip_shift) { rtx op = x; @@ -6064,7 +6156,8 @@ aarch64_strip_extend (rtx x) /* Now handle extended register, as this may also have an optional left shift by 1..4. */ - if (GET_CODE (op) == ASHIFT + if (strip_shift + && GET_CODE (op) == ASHIFT && CONST_INT_P (XEXP (op, 1)) && ((unsigned HOST_WIDE_INT) INTVAL (XEXP (op, 1))) <= 4) op = XEXP (op, 0); @@ -6088,6 +6181,39 @@ aarch64_shift_p (enum rtx_code code) return code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT; } + +/* Return true iff X is a cheap shift without a sign extend. */ + +static bool +aarch64_cheap_mult_shift_p (rtx x) +{ + rtx op0, op1; + + op0 = XEXP (x, 0); + op1 = XEXP (x, 1); + + if (!(aarch64_tune_params.extra_tuning_flags + & AARCH64_EXTRA_TUNE_CHEAP_SHIFT_EXTEND)) + return false; + + if (GET_CODE (op0) == SIGN_EXTEND) + return false; + + if (GET_CODE (x) == ASHIFT && CONST_INT_P (op1) + && UINTVAL (op1) <= 4) + return true; + + if (GET_CODE (x) != MULT || !CONST_INT_P (op1)) + return false; + + HOST_WIDE_INT l2 = exact_log2 (INTVAL (op1)); + + if (l2 > 0 && l2 <= 4) + return true; + + return false; +} + /* Helper function for rtx cost calculation. Calculate the cost of a MULT or ASHIFT, which may be part of a compound PLUS/MINUS rtx. Return the calculated cost of the expression, recursing manually in to @@ -6125,7 +6251,11 @@ aarch64_rtx_mult_cost (rtx x, enum rtx_code code, int outer, bool speed) { if (compound_p) { - if (REG_P (op1)) + /* If the shift is considered cheap, + then don't add any cost. */ + if (aarch64_cheap_mult_shift_p (x)) + ; + else if (REG_P (op1)) /* ARITH + shift-by-register. */ cost += extra_cost->alu.arith_shift_reg; else if (is_extend) @@ -6143,7 +6273,7 @@ aarch64_rtx_mult_cost (rtx x, enum rtx_code code, int outer, bool speed) } /* Strip extends as we will have costed them in the case above. */ if (is_extend) - op0 = aarch64_strip_extend (op0); + op0 = aarch64_strip_extend (op0, true); cost += rtx_cost (op0, VOIDmode, code, 0, speed); @@ -6987,13 +7117,13 @@ cost_minus: if (speed) *cost += extra_cost->alu.extend_arith; - op1 = aarch64_strip_extend (op1); + op1 = aarch64_strip_extend (op1, true); *cost += rtx_cost (op1, VOIDmode, (enum rtx_code) GET_CODE (op1), 0, speed); return true; } - rtx new_op1 = aarch64_strip_extend (op1); + rtx new_op1 = aarch64_strip_extend (op1, false); /* Cost this as an FMA-alike operation. */ if ((GET_CODE (new_op1) == MULT @@ -7066,7 +7196,7 @@ cost_plus: if (speed) *cost += extra_cost->alu.extend_arith; - op0 = aarch64_strip_extend (op0); + op0 = aarch64_strip_extend (op0, true); *cost += rtx_cost (op0, VOIDmode, (enum rtx_code) GET_CODE (op0), 0, speed); return true; @@ -7074,7 +7204,7 @@ cost_plus: /* Strip any extend, leave shifts behind as we will cost them through mult_cost. */ - new_op0 = aarch64_strip_extend (op0); + new_op0 = aarch64_strip_extend (op0, false); if (GET_CODE (new_op0) == MULT || aarch64_shift_p (GET_CODE (new_op0))) @@ -8747,13 +8877,39 @@ aarch64_override_options_internal (struct gcc_options *opts) opts->x_param_values, global_options_set.x_param_values); - /* Set the L1 cache line size. */ - if (selected_cpu->tune->cache_line_size != 0) + /* Set up parameters to be used in prefetching algorithm. Do not + override the defaults unless we are tuning for a core we have + researched values for. */ + if (aarch64_tune_params.prefetch->num_slots > 0) + maybe_set_param_value (PARAM_SIMULTANEOUS_PREFETCHES, + aarch64_tune_params.prefetch->num_slots, + opts->x_param_values, + global_options_set.x_param_values); + if (aarch64_tune_params.prefetch->l1_cache_size >= 0) + maybe_set_param_value (PARAM_L1_CACHE_SIZE, + aarch64_tune_params.prefetch->l1_cache_size, + opts->x_param_values, + global_options_set.x_param_values); + if (aarch64_tune_params.prefetch->l1_cache_line_size >= 0) maybe_set_param_value (PARAM_L1_CACHE_LINE_SIZE, - selected_cpu->tune->cache_line_size, + aarch64_tune_params.prefetch->l1_cache_line_size, + opts->x_param_values, + global_options_set.x_param_values); + if (aarch64_tune_params.prefetch->l2_cache_size >= 0) + maybe_set_param_value (PARAM_L2_CACHE_SIZE, + aarch64_tune_params.prefetch->l2_cache_size, opts->x_param_values, global_options_set.x_param_values); + /* Enable sw prefetching at specified optimization level for + CPUS that have prefetch. Lower optimization level threshold by 1 + when profiling is enabled. */ + if (opts->x_flag_prefetch_loop_arrays < 0 + && !opts->x_optimize_size + && aarch64_tune_params.prefetch->default_opt_level >= 0 + && opts->x_optimize >= aarch64_tune_params.prefetch->default_opt_level) + opts->x_flag_prefetch_loop_arrays = 1; + aarch64_override_options_after_change_1 (opts); } @@ -10064,6 +10220,11 @@ aarch64_legitimate_constant_p (machine_mode mode, rtx x) && aarch64_valid_symref (XEXP (x, 0), GET_MODE (XEXP (x, 0)))) return true; + /* Treat symbols as constants. Avoid TLS symbols as they are complex, + so spilling them is better than rematerialization. */ + if (SYMBOL_REF_P (x) && !SYMBOL_REF_TLS_MODEL (x)) + return true; + return aarch64_constant_address_p (x); } @@ -11707,6 +11868,57 @@ aarch64_expand_vector_init (rtx target, rtx vals) return; } + enum insn_code icode = optab_handler (vec_set_optab, mode); + gcc_assert (icode != CODE_FOR_nothing); + + /* If there are only variable elements, try to optimize + the insertion using dup for the most common element + followed by insertions. */ + + /* The algorithm will fill matches[*][0] with the earliest matching element, + and matches[X][1] with the count of duplicate elements (if X is the + earliest element which has duplicates). */ + + if (n_var == n_elts && n_elts <= 16) + { + int matches[16][2] = {0}; + for (int i = 0; i < n_elts; i++) + { + for (int j = 0; j <= i; j++) + { + if (rtx_equal_p (XVECEXP (vals, 0, i), XVECEXP (vals, 0, j))) + { + matches[i][0] = j; + matches[j][1]++; + break; + } + } + } + int maxelement = 0; + int maxv = 0; + for (int i = 0; i < n_elts; i++) + if (matches[i][1] > maxv) + { + maxelement = i; + maxv = matches[i][1]; + } + + /* Create a duplicate of the most common element. */ + rtx x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, maxelement)); + aarch64_emit_move (target, gen_rtx_VEC_DUPLICATE (mode, x)); + + /* Insert the rest. */ + for (int i = 0; i < n_elts; i++) + { + rtx x = XVECEXP (vals, 0, i); + if (matches[i][0] == maxelement) + continue; + x = copy_to_mode_reg (inner_mode, x); + emit_insn (GEN_FCN (icode) (target, x, GEN_INT (i))); + } + return; + } + /* Initialise a vector which is part-variable. We want to first try to build those lanes which are constant in the most efficient way we can. */ @@ -11740,10 +11952,6 @@ aarch64_expand_vector_init (rtx target, rtx vals) } /* Insert the variable lanes directly. */ - - enum insn_code icode = optab_handler (vec_set_optab, mode); - gcc_assert (icode != CODE_FOR_nothing); - for (int i = 0; i < n_elts; i++) { rtx x = XVECEXP (vals, 0, i); diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index e4fb96fd037..3b3f27e2f95 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -140,6 +140,7 @@ extern unsigned aarch64_architecture_version; #define AARCH64_FL_F16 (1 << 9) /* Has ARMv8.2-A FP16 extensions. */ /* ARMv8.3-A architecture extensions. */ #define AARCH64_FL_V8_3 (1 << 10) /* Has ARMv8.3-A features. */ +#define AARCH64_FL_RCPC (1 << 11) /* Has support for RCpc model. */ /* Has FP and SIMD. */ #define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD) diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 1a721bfbe42..6bdbf650d92 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1017,7 +1017,7 @@ # # # - orr\\t%0.16b, %1.16b, %1.16b + mov\\t%0.16b, %1.16b ldp\\t%0, %H0, %1 stp\\t%1, %H1, %0 stp\\txzr, xzr, %0 @@ -1131,7 +1131,7 @@ "TARGET_FLOAT && (register_operand (operands[0], TFmode) || aarch64_reg_or_fp_zero (operands[1], TFmode))" "@ - orr\\t%0.16b, %1.16b, %1.16b + mov\\t%0.16b, %1.16b # # # diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md index 27fc1933ce3..32b7169ffab 100644 --- a/gcc/config/aarch64/atomics.md +++ b/gcc/config/aarch64/atomics.md @@ -94,7 +94,7 @@ (set (match_dup 1) (unspec_volatile:SHORT [(match_operand:SI 2 "aarch64_plus_operand" "rI") ;; expected - (match_operand:SHORT 3 "register_operand" "r") ;; desired + (match_operand:SHORT 3 "aarch64_reg_or_zero" "rZ") ;; desired (match_operand:SI 4 "const_int_operand") ;; is_weak (match_operand:SI 5 "const_int_operand") ;; mod_s (match_operand:SI 6 "const_int_operand")] ;; mod_f @@ -119,7 +119,7 @@ (set (match_dup 1) (unspec_volatile:GPI [(match_operand:GPI 2 "aarch64_plus_operand" "rI") ;; expect - (match_operand:GPI 3 "register_operand" "r") ;; desired + (match_operand:GPI 3 "aarch64_reg_or_zero" "rZ") ;; desired (match_operand:SI 4 "const_int_operand") ;; is_weak (match_operand:SI 5 "const_int_operand") ;; mod_s (match_operand:SI 6 "const_int_operand")] ;; mod_f @@ -616,7 +616,7 @@ (set (match_dup 1) (unspec_volatile:SHORT [(match_dup 0) - (match_operand:SHORT 2 "register_operand" "r") ;; value. + (match_operand:SHORT 2 "aarch64_reg_or_zero" "rZ") ;; value. (match_operand:SI 3 "const_int_operand" "")] ;; model. UNSPECV_ATOMIC_CAS))] "TARGET_LSE && reload_completed" @@ -640,7 +640,7 @@ (set (match_dup 1) (unspec_volatile:GPI [(match_dup 0) - (match_operand:GPI 2 "register_operand" "r") ;; value. + (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ") ;; value. (match_operand:SI 3 "const_int_operand" "")] ;; model. UNSPECV_ATOMIC_CAS))] "TARGET_LSE && reload_completed" diff --git a/gcc/config/aarch64/thunderx2t99.md b/gcc/config/aarch64/thunderx2t99.md index adb010c08cb..71348849fe7 100644 --- a/gcc/config/aarch64/thunderx2t99.md +++ b/gcc/config/aarch64/thunderx2t99.md @@ -461,3 +461,10 @@ (and (eq_attr "tune" "thunderx2t99") (eq_attr "type" "crc")) "thunderx2t99_i1") + +;; PMULL extension. + +(define_insn_reservation "thunderx2t99_pmull" 5 + (and (eq_attr "tune" "thunderx2t99") + (eq_attr "type" "crypto_pmull")) + "thunderx2t99_f1") diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c index a0569ed10c5..8d14e58d916 100644 --- a/gcc/config/arm/arm-builtins.c +++ b/gcc/config/arm/arm-builtins.c @@ -1876,7 +1876,7 @@ arm_init_builtins (void) arm_init_neon_builtins which uses it. */ arm_init_fp16_builtins (); - if (TARGET_HARD_FLOAT) + if (TARGET_MAYBE_HARD_FLOAT) { arm_init_neon_builtins (); arm_init_vfp_builtins (); @@ -1885,7 +1885,7 @@ arm_init_builtins (void) arm_init_acle_builtins (); - if (TARGET_HARD_FLOAT) + if (TARGET_MAYBE_HARD_FLOAT) { tree ftype_set_fpscr = build_function_type_list (void_type_node, unsigned_type_node, NULL); @@ -2245,7 +2245,12 @@ constant_arg: { error ("%Kargument %d must be a constant immediate", exp, argc + 1); - return const0_rtx; + /* We have failed to expand the pattern, and are safely + in to invalid code. But the mid-end will still try to + build an assignment for this node while it expands, + before stopping for the error, just pass it back + TARGET to ensure a valid assignment. */ + return target; } break; diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c index 3abe7d1f1f5..a3daa3220a2 100644 --- a/gcc/config/arm/arm-c.c +++ b/gcc/config/arm/arm-c.c @@ -200,6 +200,22 @@ arm_cpu_builtins (struct cpp_reader* pfile) def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV); def_or_undef_macro (pfile, "__ARM_ASM_SYNTAX_UNIFIED__", inline_asm_unified); + + if (TARGET_32BIT && arm_arch4 && !(arm_arch8 && arm_arch_notm)) + { + int coproc_level = 0x1; + + if (arm_arch5) + coproc_level |= 0x2; + if (arm_arch5e) + coproc_level |= 0x4; + if (arm_arch6) + coproc_level |= 0x8; + + builtin_define_with_int_value ("__ARM_FEATURE_COPROC", coproc_level); + } + else + cpp_undef (pfile, "__ARM_FEATURE_COPROC"); } void diff --git a/gcc/config/arm/arm-cpu-cdata.h b/gcc/config/arm/arm-cpu-cdata.h index b00d83302f6..8406fa05423 100644 --- a/gcc/config/arm/arm-cpu-cdata.h +++ b/gcc/config/arm/arm-cpu-cdata.h @@ -20,1025 +20,2565 @@ License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ -static const struct arm_arch_core_flag arm_arch_core_flags[] = +static const cpu_arch_extension cpu_opttab_arm9e[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_arm946es[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_arm966es[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_arm968es[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_arm10e[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_arm1020e[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_arm1022e[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_arm926ejs[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_arm1026ejs[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_genericv7a[] = { + { + "vfpv3-d16", false, false, + { ISA_VFPv3,ISA_FP_DBL, isa_nobit } + }, + { + "vfpv3", false, false, + { ISA_VFPv3,ISA_FP_D32, isa_nobit } + }, + { + "vfpv3-d16-fp16", false, false, + { ISA_VFPv3,ISA_FP_DBL,isa_bit_fp16conv, isa_nobit } + }, + { + "vfpv3-fp16", false, false, + { ISA_VFPv3,ISA_FP_D32,isa_bit_fp16conv, isa_nobit } + }, + { + "vfpv4-d16", false, false, + { ISA_VFPv4,ISA_FP_DBL, isa_nobit } + }, + { + "vfpv4", false, false, + { ISA_VFPv4,ISA_FP_D32, isa_nobit } + }, + { + "simd", false, false, + { ISA_VFPv3,ISA_NEON, isa_nobit } + }, + { + "neon-fp16", false, false, + { ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, isa_nobit } + }, + { + "neon-vfpv4", false, false, + { ISA_VFPv4,ISA_NEON, isa_nobit } + }, + { + "nosimd", true, false, + { ISA_ALL_SIMD, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "neon", false, true, + { ISA_VFPv3,ISA_NEON, isa_nobit } + }, + { + "neon-vfpv3", false, true, + { ISA_VFPv3,ISA_NEON, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa5[] = { + { + "nosimd", true, false, + { ISA_ALL_SIMD, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa7[] = { + { + "nosimd", true, false, + { ISA_ALL_SIMD, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa8[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa9[] = { + { + "nosimd", true, false, + { ISA_ALL_SIMD, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa12[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa15[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa17[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexr5[] = { + { + "nofp.dp", true, false, + { ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexr7[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexr8[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexm7[] = { + { + "nofp.dp", true, false, + { ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexm4[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa15cortexa7[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa17cortexa7[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa32[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa35[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa53[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa57[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa72[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa73[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_exynosm1[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_xgene1[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa57cortexa53[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa72cortexa53[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa73cortexa35[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexa73cortexa53[] = { + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const cpu_arch_extension cpu_opttab_cortexm33[] = { + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +const cpu_option all_cores[] = { { - "arm2", { - ISA_ARMv2,isa_bit_mode26, - isa_nobit + "arm2", + NULL, + { + ISA_ARMv2,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv2 }, { - "arm250", { - ISA_ARMv2,isa_bit_mode26, - isa_nobit + "arm250", + NULL, + { + ISA_ARMv2,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv2 }, { - "arm3", { - ISA_ARMv2,isa_bit_mode26, - isa_nobit + "arm3", + NULL, + { + ISA_ARMv2,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv2 }, { - "arm6", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm6", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm60", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm60", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm600", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm600", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm610", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm610", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm620", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm620", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm7", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm7", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm7d", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm7d", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm7di", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm7di", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm70", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm70", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm700", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm700", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm700i", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm700i", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm710", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm710", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm720", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm720", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm710c", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm710c", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm7100", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm7100", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm7500", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm7500", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm7500fe", { - ISA_ARMv3,isa_bit_mode26, - isa_nobit + "arm7500fe", + NULL, + { + ISA_ARMv3,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3 }, { - "arm7m", { - ISA_ARMv3m,isa_bit_mode26, - isa_nobit + "arm7m", + NULL, + { + ISA_ARMv3m,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3m }, { - "arm7dm", { - ISA_ARMv3m,isa_bit_mode26, - isa_nobit + "arm7dm", + NULL, + { + ISA_ARMv3m,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3m }, { - "arm7dmi", { - ISA_ARMv3m,isa_bit_mode26, - isa_nobit + "arm7dmi", + NULL, + { + ISA_ARMv3m,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv3m }, { - "arm8", { - ISA_ARMv4,isa_bit_mode26, - isa_nobit + "arm8", + NULL, + { + ISA_ARMv4,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv4 }, { - "arm810", { - ISA_ARMv4,isa_bit_mode26, - isa_nobit + "arm810", + NULL, + { + ISA_ARMv4,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv4 }, { - "strongarm", { - ISA_ARMv4,isa_bit_mode26, - isa_nobit + "strongarm", + NULL, + { + ISA_ARMv4,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv4 }, { - "strongarm110", { - ISA_ARMv4,isa_bit_mode26, - isa_nobit + "strongarm110", + NULL, + { + ISA_ARMv4,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv4 }, { - "strongarm1100", { - ISA_ARMv4,isa_bit_mode26, - isa_nobit + "strongarm1100", + NULL, + { + ISA_ARMv4,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv4 }, { - "strongarm1110", { - ISA_ARMv4,isa_bit_mode26, - isa_nobit + "strongarm1110", + NULL, + { + ISA_ARMv4,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv4 }, { - "fa526", { - ISA_ARMv4,isa_bit_mode26, - isa_nobit + "fa526", + NULL, + { + ISA_ARMv4,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv4 }, { - "fa626", { - ISA_ARMv4,isa_bit_mode26, - isa_nobit + "fa626", + NULL, + { + ISA_ARMv4,isa_bit_mode26, + isa_nobit + } }, + TARGET_ARCH_armv4 }, { - "arm7tdmi", { - ISA_ARMv4t, - isa_nobit + "arm7tdmi", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "arm7tdmi-s", { - ISA_ARMv4t, - isa_nobit + "arm7tdmi-s", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "arm710t", { - ISA_ARMv4t, - isa_nobit + "arm710t", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "arm720t", { - ISA_ARMv4t, - isa_nobit + "arm720t", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "arm740t", { - ISA_ARMv4t, - isa_nobit + "arm740t", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "arm9", { - ISA_ARMv4t, - isa_nobit + "arm9", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "arm9tdmi", { - ISA_ARMv4t, - isa_nobit + "arm9tdmi", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "arm920", { - ISA_ARMv4t, - isa_nobit + "arm920", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "arm920t", { - ISA_ARMv4t, - isa_nobit + "arm920t", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "arm922t", { - ISA_ARMv4t, - isa_nobit + "arm922t", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "arm940t", { - ISA_ARMv4t, - isa_nobit + "arm940t", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "ep9312", { - ISA_ARMv4t, - isa_nobit + "ep9312", + NULL, + { + ISA_ARMv4t, + isa_nobit + } }, + TARGET_ARCH_armv4t }, { - "arm10tdmi", { - ISA_ARMv5t, - isa_nobit + "arm10tdmi", + NULL, + { + ISA_ARMv5t, + isa_nobit + } }, + TARGET_ARCH_armv5t }, { - "arm1020t", { - ISA_ARMv5t, - isa_nobit + "arm1020t", + NULL, + { + ISA_ARMv5t, + isa_nobit + } }, + TARGET_ARCH_armv5t }, { - "arm9e", { - ISA_ARMv5te, - isa_nobit + "arm9e", + cpu_opttab_arm9e, + { + ISA_ARMv5te, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "arm946e-s", { - ISA_ARMv5te, - isa_nobit + "arm946e-s", + cpu_opttab_arm946es, + { + ISA_ARMv5te, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "arm966e-s", { - ISA_ARMv5te, - isa_nobit + "arm966e-s", + cpu_opttab_arm966es, + { + ISA_ARMv5te, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "arm968e-s", { - ISA_ARMv5te, - isa_nobit + "arm968e-s", + cpu_opttab_arm968es, + { + ISA_ARMv5te, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "arm10e", { - ISA_ARMv5te, - isa_nobit + "arm10e", + cpu_opttab_arm10e, + { + ISA_ARMv5te, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "arm1020e", { - ISA_ARMv5te, - isa_nobit + "arm1020e", + cpu_opttab_arm1020e, + { + ISA_ARMv5te, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "arm1022e", { - ISA_ARMv5te, - isa_nobit + "arm1022e", + cpu_opttab_arm1022e, + { + ISA_ARMv5te, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "xscale", { - ISA_ARMv5te, - isa_bit_xscale, - isa_nobit + "xscale", + NULL, + { + ISA_ARMv5te, + isa_bit_xscale, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "iwmmxt", { - ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt, - isa_nobit + "iwmmxt", + NULL, + { + ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt, + isa_nobit + } }, + TARGET_ARCH_iwmmxt }, { - "iwmmxt2", { - ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt,isa_bit_iwmmxt2, - isa_nobit + "iwmmxt2", + NULL, + { + ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt,isa_bit_iwmmxt2, + isa_nobit + } }, + TARGET_ARCH_iwmmxt2 }, { - "fa606te", { - ISA_ARMv5te, - isa_nobit + "fa606te", + NULL, + { + ISA_ARMv5te, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "fa626te", { - ISA_ARMv5te, - isa_nobit + "fa626te", + NULL, + { + ISA_ARMv5te, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "fmp626", { - ISA_ARMv5te, - isa_nobit + "fmp626", + NULL, + { + ISA_ARMv5te, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "fa726te", { - ISA_ARMv5te, - isa_nobit + "fa726te", + NULL, + { + ISA_ARMv5te, + isa_nobit + } }, + TARGET_ARCH_armv5te }, { - "arm926ej-s", { - ISA_ARMv5tej, - isa_nobit + "arm926ej-s", + cpu_opttab_arm926ejs, + { + ISA_ARMv5tej, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv5tej }, { - "arm1026ej-s", { - ISA_ARMv5tej, - isa_nobit + "arm1026ej-s", + cpu_opttab_arm1026ejs, + { + ISA_ARMv5tej, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv5tej }, { - "arm1136j-s", { - ISA_ARMv6j, - isa_nobit + "arm1136j-s", + NULL, + { + ISA_ARMv6j, + isa_nobit + } }, + TARGET_ARCH_armv6j }, { - "arm1136jf-s", { - ISA_ARMv6j, - ISA_VFPv2,ISA_FP_DBL, - isa_nobit + "arm1136jf-s", + NULL, + { + ISA_ARMv6j, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv6j }, { - "arm1176jz-s", { - ISA_ARMv6kz, - isa_nobit + "arm1176jz-s", + NULL, + { + ISA_ARMv6kz, + isa_nobit + } }, + TARGET_ARCH_armv6kz }, { - "arm1176jzf-s", { - ISA_ARMv6kz, - ISA_VFPv2,ISA_FP_DBL, - isa_nobit + "arm1176jzf-s", + NULL, + { + ISA_ARMv6kz, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv6kz }, { - "mpcorenovfp", { - ISA_ARMv6k, - isa_nobit + "mpcorenovfp", + NULL, + { + ISA_ARMv6k, + isa_nobit + } }, + TARGET_ARCH_armv6k }, { - "mpcore", { - ISA_ARMv6k, - ISA_VFPv2,ISA_FP_DBL, - isa_nobit + "mpcore", + NULL, + { + ISA_ARMv6k, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv6k }, { - "arm1156t2-s", { - ISA_ARMv6t2, - isa_nobit + "arm1156t2-s", + NULL, + { + ISA_ARMv6t2, + isa_nobit + } }, + TARGET_ARCH_armv6t2 }, { - "arm1156t2f-s", { - ISA_ARMv6t2, - ISA_VFPv2,ISA_FP_DBL, - isa_nobit + "arm1156t2f-s", + NULL, + { + ISA_ARMv6t2, + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv6t2 }, { - "cortex-m1", { - ISA_ARMv6m, - isa_nobit + "cortex-m1", + NULL, + { + ISA_ARMv6m, + isa_nobit + } }, + TARGET_ARCH_armv6_m }, { - "cortex-m0", { - ISA_ARMv6m, - isa_nobit + "cortex-m0", + NULL, + { + ISA_ARMv6m, + isa_nobit + } }, + TARGET_ARCH_armv6_m }, { - "cortex-m0plus", { - ISA_ARMv6m, - isa_nobit + "cortex-m0plus", + NULL, + { + ISA_ARMv6m, + isa_nobit + } }, + TARGET_ARCH_armv6_m }, { - "cortex-m1.small-multiply", { - ISA_ARMv6m, - isa_nobit + "cortex-m1.small-multiply", + NULL, + { + ISA_ARMv6m, + isa_nobit + } }, + TARGET_ARCH_armv6_m }, { - "cortex-m0.small-multiply", { - ISA_ARMv6m, - isa_nobit + "cortex-m0.small-multiply", + NULL, + { + ISA_ARMv6m, + isa_nobit + } }, + TARGET_ARCH_armv6_m }, { - "cortex-m0plus.small-multiply", { - ISA_ARMv6m, - isa_nobit + "cortex-m0plus.small-multiply", + NULL, + { + ISA_ARMv6m, + isa_nobit + } }, + TARGET_ARCH_armv6_m }, { - "generic-armv7-a", { - ISA_ARMv7a, - isa_nobit + "generic-armv7-a", + cpu_opttab_genericv7a, + { + ISA_ARMv7a, + ISA_VFPv3,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv7_a }, { - "cortex-a5", { - ISA_ARMv7a, - isa_nobit + "cortex-a5", + cpu_opttab_cortexa5, + { + ISA_ARMv7a, + ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, + isa_nobit + } }, + TARGET_ARCH_armv7_a }, { - "cortex-a7", { - ISA_ARMv7ve, - isa_nobit + "cortex-a7", + cpu_opttab_cortexa7, + { + ISA_ARMv7ve, + ISA_VFPv4,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv7ve }, { - "cortex-a8", { - ISA_ARMv7a, - isa_nobit + "cortex-a8", + cpu_opttab_cortexa8, + { + ISA_ARMv7a, + ISA_VFPv3,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv7_a }, { - "cortex-a9", { - ISA_ARMv7a, - isa_nobit + "cortex-a9", + cpu_opttab_cortexa9, + { + ISA_ARMv7a, + ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, + isa_nobit + } }, + TARGET_ARCH_armv7_a }, { - "cortex-a12", { - ISA_ARMv7ve, - isa_nobit + "cortex-a12", + cpu_opttab_cortexa12, + { + ISA_ARMv7ve, + ISA_VFPv4,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv7ve }, { - "cortex-a15", { - ISA_ARMv7ve, - isa_nobit + "cortex-a15", + cpu_opttab_cortexa15, + { + ISA_ARMv7ve, + ISA_VFPv4,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv7ve }, { - "cortex-a17", { - ISA_ARMv7ve, - isa_nobit + "cortex-a17", + cpu_opttab_cortexa17, + { + ISA_ARMv7ve, + ISA_VFPv4,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv7ve }, { - "cortex-r4", { - ISA_ARMv7r, - isa_nobit + "cortex-r4", + NULL, + { + ISA_ARMv7r, + isa_nobit + } }, + TARGET_ARCH_armv7_r }, { - "cortex-r4f", { - ISA_ARMv7r, - isa_nobit + "cortex-r4f", + NULL, + { + ISA_ARMv7r, + ISA_VFPv3,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv7_r }, { - "cortex-r5", { - ISA_ARMv7r, - isa_bit_adiv, - isa_nobit + "cortex-r5", + cpu_opttab_cortexr5, + { + ISA_ARMv7r, + isa_bit_adiv, + ISA_VFPv3,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv7_r }, { - "cortex-r7", { - ISA_ARMv7r, - isa_bit_adiv, - isa_nobit + "cortex-r7", + cpu_opttab_cortexr7, + { + ISA_ARMv7r, + isa_bit_adiv, + ISA_VFPv3,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv7_r }, { - "cortex-r8", { - ISA_ARMv7r, - isa_bit_adiv, - isa_nobit + "cortex-r8", + cpu_opttab_cortexr8, + { + ISA_ARMv7r, + isa_bit_adiv, + ISA_VFPv3,ISA_FP_DBL, + isa_nobit + } }, + TARGET_ARCH_armv7_r }, { - "cortex-m7", { - ISA_ARMv7em, - isa_quirk_no_volatile_ce, - isa_nobit + "cortex-m7", + cpu_opttab_cortexm7, + { + ISA_ARMv7em, + ISA_FPv5,ISA_FP_DBL, + isa_quirk_no_volatile_ce, + isa_nobit + } }, + TARGET_ARCH_armv7e_m }, { - "cortex-m4", { - ISA_ARMv7em, - isa_nobit + "cortex-m4", + cpu_opttab_cortexm4, + { + ISA_ARMv7em, + ISA_VFPv4, + isa_nobit + } }, + TARGET_ARCH_armv7e_m }, { - "cortex-m3", { - ISA_ARMv7m, - isa_quirk_cm3_ldrd, - isa_nobit + "cortex-m3", + NULL, + { + ISA_ARMv7m, + isa_quirk_cm3_ldrd, + isa_nobit + } }, + TARGET_ARCH_armv7_m }, { - "marvell-pj4", { - ISA_ARMv7a, - isa_nobit + "marvell-pj4", + NULL, + { + ISA_ARMv7a, + isa_nobit + } }, + TARGET_ARCH_armv7_a }, { - "cortex-a15.cortex-a7", { - ISA_ARMv7ve, - isa_nobit + "cortex-a15.cortex-a7", + cpu_opttab_cortexa15cortexa7, + { + ISA_ARMv7ve, + ISA_VFPv4,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv7ve }, { - "cortex-a17.cortex-a7", { - ISA_ARMv7ve, - isa_nobit + "cortex-a17.cortex-a7", + cpu_opttab_cortexa17cortexa7, + { + ISA_ARMv7ve, + ISA_VFPv4,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv7ve }, { - "cortex-a32", { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit + "cortex-a32", + cpu_opttab_cortexa32, + { + ISA_ARMv8a, + isa_bit_crc32, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "cortex-a35", { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit + "cortex-a35", + cpu_opttab_cortexa35, + { + ISA_ARMv8a, + isa_bit_crc32, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "cortex-a53", { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit + "cortex-a53", + cpu_opttab_cortexa53, + { + ISA_ARMv8a, + isa_bit_crc32, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "cortex-a57", { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit + "cortex-a57", + cpu_opttab_cortexa57, + { + ISA_ARMv8a, + isa_bit_crc32, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "cortex-a72", { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit + "cortex-a72", + cpu_opttab_cortexa72, + { + ISA_ARMv8a, + isa_bit_crc32, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "cortex-a73", { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit + "cortex-a73", + cpu_opttab_cortexa73, + { + ISA_ARMv8a, + isa_bit_crc32, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "exynos-m1", { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit + "exynos-m1", + cpu_opttab_exynosm1, + { + ISA_ARMv8a, + isa_bit_crc32, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "xgene1", { - ISA_ARMv8a, - isa_nobit + "xgene1", + cpu_opttab_xgene1, + { + ISA_ARMv8a, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "cortex-a57.cortex-a53", { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit + "cortex-a57.cortex-a53", + cpu_opttab_cortexa57cortexa53, + { + ISA_ARMv8a, + isa_bit_crc32, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "cortex-a72.cortex-a53", { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit + "cortex-a72.cortex-a53", + cpu_opttab_cortexa72cortexa53, + { + ISA_ARMv8a, + isa_bit_crc32, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "cortex-a73.cortex-a35", { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit + "cortex-a73.cortex-a35", + cpu_opttab_cortexa73cortexa35, + { + ISA_ARMv8a, + isa_bit_crc32, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "cortex-a73.cortex-a53", { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit + "cortex-a73.cortex-a53", + cpu_opttab_cortexa73cortexa53, + { + ISA_ARMv8a, + isa_bit_crc32, + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } }, + TARGET_ARCH_armv8_a }, { - "cortex-m23", { - ISA_ARMv8m_base, - isa_nobit + "cortex-m23", + NULL, + { + ISA_ARMv8m_base, + isa_nobit + } }, + TARGET_ARCH_armv8_m_base }, { - "cortex-m33", { - ISA_ARMv8m_main,isa_bit_ARMv7em, - isa_nobit + "cortex-m33", + cpu_opttab_cortexm33, + { + ISA_ARMv8m_main, + isa_bit_ARMv7em, + ISA_FPv5, + isa_nobit + } }, + TARGET_ARCH_armv8_m_main + }, + {{NULL, NULL, {isa_nobit}}, TARGET_ARCH_arm_none} +}; +static const struct cpu_arch_extension arch_opttab_armv5e[] = { + { + "fp", false, false, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv5te[] = { + { + "fp", false, false, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv5tej[] = { + { + "fp", false, false, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv6[] = { + { + "fp", false, false, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv6j[] = { + { + "fp", false, false, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv6k[] = { + { + "fp", false, false, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv6z[] = { + { + "fp", false, false, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv6kz[] = { + { + "fp", false, false, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv6zk[] = { + { + "fp", false, false, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv6t2[] = { + { + "fp", false, false, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv2", false, true, + { ISA_VFPv2,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv7[] = { + { + "fp", false, false, + { ISA_VFPv3,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv3-d16", false, true, + { ISA_VFPv3,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv7_a[] = { + { + "fp", false, false, + { ISA_VFPv3,ISA_FP_DBL, isa_nobit } + }, + { + "vfpv3", false, false, + { ISA_VFPv3,ISA_FP_D32, isa_nobit } + }, + { + "vfpv3-d16-fp16", false, false, + { ISA_VFPv3,ISA_FP_DBL,isa_bit_fp16conv, isa_nobit } + }, + { + "vfpv3-fp16", false, false, + { ISA_VFPv3,ISA_FP_DBL,ISA_FP_D32,isa_bit_fp16conv, isa_nobit } + }, + { + "vfpv4-d16", false, false, + { ISA_VFPv4,ISA_FP_DBL, isa_nobit } + }, + { + "vfpv4", false, false, + { ISA_VFPv4,ISA_FP_D32, isa_nobit } + }, + { + "simd", false, false, + { ISA_VFPv3,ISA_NEON, isa_nobit } }, { + "neon-fp16", false, false, + { ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, isa_nobit } + }, + { + "neon-vfpv4", false, false, + { ISA_VFPv4,ISA_NEON, isa_nobit } + }, + { + "nosimd", true, false, + { ISA_ALL_SIMD, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv3-d16", false, true, + { ISA_VFPv3,ISA_FP_DBL, isa_nobit } + }, + { + "neon", false, true, + { ISA_VFPv3,ISA_NEON, isa_nobit } + }, + { + "neon-vfpv3", false, true, + { ISA_VFPv3,ISA_NEON, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv7ve[] = { + { + "vfpv3-d16", false, false, + { ISA_VFPv3,ISA_FP_DBL, isa_nobit } + }, + { + "vfpv3", false, false, + { ISA_VFPv3,ISA_FP_D32, isa_nobit } + }, + { + "vfpv3-d16-fp16", false, false, + { ISA_VFPv3,ISA_FP_DBL,isa_bit_fp16conv, isa_nobit } + }, + { + "vfpv3-fp16", false, false, + { ISA_VFPv3,ISA_FP_DBL,ISA_FP_D32,isa_bit_fp16conv, isa_nobit } + }, + { + "fp", false, false, + { ISA_VFPv4,ISA_FP_DBL, isa_nobit } + }, + { + "vfpv4", false, false, + { ISA_VFPv4,ISA_FP_D32, isa_nobit } + }, + { + "neon", false, false, + { ISA_VFPv3,ISA_NEON, isa_nobit } + }, + { + "neon-fp16", false, false, + { ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, isa_nobit } + }, + { + "simd", false, false, + { ISA_VFPv4,ISA_NEON, isa_nobit } + }, + { + "nosimd", true, false, + { ISA_ALL_SIMD, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv4-d16", false, true, + { ISA_VFPv4,ISA_FP_DBL, isa_nobit } + }, + { + "neon-vfpv3", false, true, + { ISA_VFPv3,ISA_NEON, isa_nobit } + }, + { + "neon-vfpv4", false, true, + { ISA_VFPv4,ISA_NEON, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv7_r[] = { + { + "fp.sp", false, false, + { ISA_VFPv3, isa_nobit } + }, + { + "fp", false, false, + { ISA_VFPv3,ISA_FP_DBL, isa_nobit } + }, + { + "idiv", false, false, + { isa_bit_adiv, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "noidiv", true, false, + { isa_bit_adiv, isa_nobit } + }, + { + "vfpv3xd", false, true, + { ISA_VFPv3, isa_nobit } + }, + { + "vfpv3-d16", false, true, + { ISA_VFPv3,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv7e_m[] = { + { + "fp", false, false, + { ISA_VFPv4, isa_nobit } + }, + { + "fpv5", false, false, + { ISA_FPv5, isa_nobit } + }, + { + "fp.dp", false, false, + { ISA_FPv5,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv8_a[] = { + { + "crc", false, false, + { isa_bit_crc32, isa_nobit } + }, + { + "simd", false, false, + { ISA_FP_ARMv8,ISA_NEON, isa_nobit } + }, + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { + "nocrypto", true, false, + { ISA_ALL_CRYPTO, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv8_1_a[] = { + { + "simd", false, false, + { ISA_FP_ARMv8,ISA_NEON, isa_nobit } + }, + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { + "nocrypto", true, false, + { ISA_ALL_CRYPTO, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "vfpv4-sp-d16", false, true, + { ISA_VFPv4, isa_nobit } + }, + { + "fpv5-d16", false, true, + { ISA_FPv5,ISA_FP_DBL, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv8_2_a[] = { + { + "simd", false, false, + { ISA_FP_ARMv8,ISA_NEON, isa_nobit } + }, + { + "fp16", false, false, + { isa_bit_fp16,ISA_FP_ARMv8,ISA_NEON, isa_nobit } + }, + { + "crypto", false, false, + { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit } + }, + { + "nocrypto", true, false, + { ISA_ALL_CRYPTO, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +static const struct cpu_arch_extension arch_opttab_armv8_m_main[] = { + { + "dsp", false, false, + { isa_bit_ARMv7em, isa_nobit } + }, + { + "fp", false, false, + { ISA_FPv5, isa_nobit } + }, + { + "fp.dp", false, false, + { ISA_FPv5,ISA_FP_DBL, isa_nobit } + }, + { + "nofp", true, false, + { ISA_ALL_FP, isa_nobit } + }, + { + "nodsp", true, false, + { isa_bit_ARMv7em, isa_nobit } + }, + { NULL, false, false, {isa_nobit}} +}; + +const arch_option all_architectures[] = +{ + { "armv2", + NULL, { ISA_ARMv2,isa_bit_mode26, isa_nobit }, + "2", BASE_ARCH_2, + TARGET_CPU_arm2, }, { "armv2a", + NULL, { ISA_ARMv2,isa_bit_mode26, isa_nobit }, + "2", BASE_ARCH_2, + TARGET_CPU_arm2, }, { "armv3", + NULL, { ISA_ARMv3,isa_bit_mode26, isa_nobit }, + "3", BASE_ARCH_3, + TARGET_CPU_arm6, }, { "armv3m", + NULL, { ISA_ARMv3m,isa_bit_mode26, isa_nobit }, + "3M", BASE_ARCH_3M, + TARGET_CPU_arm7m, }, { "armv4", + NULL, { ISA_ARMv4,isa_bit_mode26, isa_nobit }, + "4", BASE_ARCH_4, + TARGET_CPU_arm7tdmi, }, { "armv4t", + NULL, { ISA_ARMv4t, isa_nobit }, + "4T", BASE_ARCH_4T, + TARGET_CPU_arm7tdmi, }, { "armv5", + NULL, { ISA_ARMv5, isa_nobit }, + "5", BASE_ARCH_5, + TARGET_CPU_arm10tdmi, }, { "armv5t", + NULL, { ISA_ARMv5t, isa_nobit }, + "5T", BASE_ARCH_5T, + TARGET_CPU_arm10tdmi, }, { "armv5e", + arch_opttab_armv5e, { ISA_ARMv5e, isa_nobit }, + "5E", BASE_ARCH_5E, + TARGET_CPU_arm1026ejs, }, { "armv5te", + arch_opttab_armv5te, { ISA_ARMv5te, isa_nobit }, + "5TE", BASE_ARCH_5TE, + TARGET_CPU_arm1026ejs, }, { "armv5tej", + arch_opttab_armv5tej, { ISA_ARMv5tej, isa_nobit }, + "5TEJ", BASE_ARCH_5TEJ, + TARGET_CPU_arm1026ejs, }, { "armv6", + arch_opttab_armv6, { ISA_ARMv6, isa_nobit }, + "6", BASE_ARCH_6, + TARGET_CPU_arm1136js, }, { "armv6j", + arch_opttab_armv6j, { ISA_ARMv6j, isa_nobit }, + "6J", BASE_ARCH_6J, + TARGET_CPU_arm1136js, }, { "armv6k", + arch_opttab_armv6k, { ISA_ARMv6k, isa_nobit }, + "6K", BASE_ARCH_6K, + TARGET_CPU_mpcore, }, { "armv6z", + arch_opttab_armv6z, { ISA_ARMv6z, isa_nobit }, + "6Z", BASE_ARCH_6Z, + TARGET_CPU_arm1176jzs, }, { "armv6kz", + arch_opttab_armv6kz, { ISA_ARMv6kz, isa_nobit }, + "6KZ", BASE_ARCH_6KZ, + TARGET_CPU_arm1176jzs, }, { "armv6zk", + arch_opttab_armv6zk, { ISA_ARMv6kz, isa_nobit }, + "6KZ", BASE_ARCH_6KZ, + TARGET_CPU_arm1176jzs, }, { "armv6t2", + arch_opttab_armv6t2, { ISA_ARMv6t2, isa_nobit }, + "6T2", BASE_ARCH_6T2, + TARGET_CPU_arm1156t2s, }, { "armv6-m", + NULL, { ISA_ARMv6m, isa_nobit }, + "6M", BASE_ARCH_6M, + TARGET_CPU_cortexm1, }, { "armv6s-m", + NULL, { ISA_ARMv6m, isa_nobit }, + "6M", BASE_ARCH_6M, + TARGET_CPU_cortexm1, }, { "armv7", + arch_opttab_armv7, { ISA_ARMv7, isa_nobit }, + "7", BASE_ARCH_7, + TARGET_CPU_cortexa8, }, { "armv7-a", + arch_opttab_armv7_a, { ISA_ARMv7a, isa_nobit }, + "7A", BASE_ARCH_7A, + TARGET_CPU_cortexa8, }, { "armv7ve", + arch_opttab_armv7ve, { ISA_ARMv7ve, isa_nobit }, + "7A", BASE_ARCH_7A, + TARGET_CPU_cortexa8, }, { "armv7-r", + arch_opttab_armv7_r, { ISA_ARMv7r, isa_nobit }, + "7R", BASE_ARCH_7R, + TARGET_CPU_cortexr4, }, { "armv7-m", + NULL, { ISA_ARMv7m, isa_nobit }, + "7M", BASE_ARCH_7M, + TARGET_CPU_cortexm3, }, { "armv7e-m", + arch_opttab_armv7e_m, { ISA_ARMv7em, isa_nobit }, + "7EM", BASE_ARCH_7EM, + TARGET_CPU_cortexm4, }, { "armv8-a", + arch_opttab_armv8_a, { ISA_ARMv8a, isa_nobit }, - }, - { - "armv8-a+crc", - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, + "8A", BASE_ARCH_8A, + TARGET_CPU_cortexa53, }, { "armv8.1-a", + arch_opttab_armv8_1_a, { ISA_ARMv8_1a, isa_nobit }, + "8A", BASE_ARCH_8A, + TARGET_CPU_cortexa53, }, { "armv8.2-a", + arch_opttab_armv8_2_a, { ISA_ARMv8_2a, isa_nobit }, - }, - { - "armv8.2-a+fp16", - { - ISA_ARMv8_2a,isa_bit_fp16, - isa_nobit - }, + "8A", BASE_ARCH_8A, + TARGET_CPU_cortexa53, }, { "armv8-m.base", + NULL, { ISA_ARMv8m_base, isa_nobit }, + "8M_BASE", BASE_ARCH_8M_BASE, + TARGET_CPU_cortexm23, }, { "armv8-m.main", + arch_opttab_armv8_m_main, { ISA_ARMv8m_main, isa_nobit }, - }, - { - "armv8-m.main+dsp", - { - ISA_ARMv8m_main,isa_bit_ARMv7em, - isa_nobit - }, + "8M_MAIN", BASE_ARCH_8M_MAIN, + TARGET_CPU_cortexm7, }, { "iwmmxt", + NULL, { ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt, isa_nobit }, + "5TE", BASE_ARCH_5TE, + TARGET_CPU_iwmmxt, }, { "iwmmxt2", + NULL, { ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt,isa_bit_iwmmxt2, isa_nobit }, + "5TE", BASE_ARCH_5TE, + TARGET_CPU_iwmmxt2, }, + {{NULL, NULL, {isa_nobit}}, + NULL, BASE_ARCH_0, TARGET_CPU_arm_none} }; +const arm_fpu_desc all_fpus[] = +{ + { + "vfp", + { + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } + }, + { + "vfpv2", + { + ISA_VFPv2,ISA_FP_DBL, + isa_nobit + } + }, + { + "vfpv3", + { + ISA_VFPv3,ISA_FP_D32, + isa_nobit + } + }, + { + "vfpv3-fp16", + { + ISA_VFPv3,ISA_FP_D32,isa_bit_fp16conv, + isa_nobit + } + }, + { + "vfpv3-d16", + { + ISA_VFPv3,ISA_FP_DBL, + isa_nobit + } + }, + { + "vfpv3-d16-fp16", + { + ISA_VFPv3,ISA_FP_DBL,isa_bit_fp16conv, + isa_nobit + } + }, + { + "vfpv3xd", + { + ISA_VFPv3, + isa_nobit + } + }, + { + "vfpv3xd-fp16", + { + ISA_VFPv3,isa_bit_fp16conv, + isa_nobit + } + }, + { + "neon", + { + ISA_VFPv3,ISA_NEON, + isa_nobit + } + }, + { + "neon-vfpv3", + { + ISA_VFPv3,ISA_NEON, + isa_nobit + } + }, + { + "neon-fp16", + { + ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, + isa_nobit + } + }, + { + "vfpv4", + { + ISA_VFPv4,ISA_FP_D32, + isa_nobit + } + }, + { + "neon-vfpv4", + { + ISA_VFPv4,ISA_NEON, + isa_nobit + } + }, + { + "vfpv4-d16", + { + ISA_VFPv4,ISA_FP_DBL, + isa_nobit + } + }, + { + "fpv4-sp-d16", + { + ISA_VFPv4, + isa_nobit + } + }, + { + "fpv5-sp-d16", + { + ISA_FPv5, + isa_nobit + } + }, + { + "fpv5-d16", + { + ISA_FPv5,ISA_FP_DBL, + isa_nobit + } + }, + { + "fp-armv8", + { + ISA_FP_ARMv8,ISA_FP_D32, + isa_nobit + } + }, + { + "neon-fp-armv8", + { + ISA_FP_ARMv8,ISA_NEON, + isa_nobit + } + }, + { + "crypto-neon-fp-armv8", + { + ISA_FP_ARMv8,ISA_CRYPTO, + isa_nobit + } + }, + { + "vfp3", + { + ISA_VFPv3,ISA_FP_D32, + isa_nobit + } + }, +}; diff --git a/gcc/config/arm/arm-cpu-data.h b/gcc/config/arm/arm-cpu-data.h index 78421adb9e5..d42021d15c7 100644 --- a/gcc/config/arm/arm-cpu-data.h +++ b/gcc/config/arm/arm-cpu-data.h @@ -20,1721 +20,547 @@ License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ -static const struct processors all_cores[] = +static const cpu_tune all_tunes[] = { - { - "arm2", + { /* arm2. */ TARGET_CPU_arm2, (TF_CO_PROC | TF_NO_MODE32), - "2", BASE_ARCH_2, - { - ISA_ARMv2,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm250", + { /* arm250. */ TARGET_CPU_arm250, (TF_CO_PROC | TF_NO_MODE32), - "2", BASE_ARCH_2, - { - ISA_ARMv2,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm3", + { /* arm3. */ TARGET_CPU_arm3, (TF_CO_PROC | TF_NO_MODE32), - "2", BASE_ARCH_2, - { - ISA_ARMv2,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm6", + { /* arm6. */ TARGET_CPU_arm6, (TF_CO_PROC), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm60", + { /* arm60. */ TARGET_CPU_arm60, (TF_CO_PROC), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm600", + { /* arm600. */ TARGET_CPU_arm600, (TF_CO_PROC | TF_WBUF), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm610", + { /* arm610. */ TARGET_CPU_arm610, (TF_WBUF), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm620", + { /* arm620. */ TARGET_CPU_arm620, (TF_CO_PROC | TF_WBUF), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm7", + { /* arm7. */ TARGET_CPU_arm7, (TF_CO_PROC), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm7d", + { /* arm7d. */ TARGET_CPU_arm7d, (TF_CO_PROC), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm7di", + { /* arm7di. */ TARGET_CPU_arm7di, (TF_CO_PROC), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm70", + { /* arm70. */ TARGET_CPU_arm70, (TF_CO_PROC), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm700", + { /* arm700. */ TARGET_CPU_arm700, (TF_CO_PROC | TF_WBUF), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm700i", + { /* arm700i. */ TARGET_CPU_arm700i, (TF_CO_PROC | TF_WBUF), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm710", + { /* arm710. */ TARGET_CPU_arm710, (TF_WBUF), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm720", + { /* arm720. */ TARGET_CPU_arm720, (TF_WBUF), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm710c", + { /* arm710c. */ TARGET_CPU_arm710c, (TF_WBUF), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm7100", + { /* arm7100. */ TARGET_CPU_arm7100, (TF_WBUF), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm7500", + { /* arm7500. */ TARGET_CPU_arm7500, (TF_WBUF), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm7500fe", + { /* arm7500fe. */ TARGET_CPU_arm7500fe, (TF_CO_PROC | TF_WBUF), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, &arm_slowmul_tune }, - { - "arm7m", + { /* arm7m. */ TARGET_CPU_arm7m, (TF_CO_PROC), - "3M", BASE_ARCH_3M, - { - ISA_ARMv3m,isa_bit_mode26, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm7dm", + { /* arm7dm. */ TARGET_CPU_arm7dm, (TF_CO_PROC), - "3M", BASE_ARCH_3M, - { - ISA_ARMv3m,isa_bit_mode26, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm7dmi", + { /* arm7dmi. */ TARGET_CPU_arm7dmi, (TF_CO_PROC), - "3M", BASE_ARCH_3M, - { - ISA_ARMv3m,isa_bit_mode26, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm8", + { /* arm8. */ TARGET_CPU_arm8, (TF_LDSCHED), - "4", BASE_ARCH_4, - { - ISA_ARMv4,isa_bit_mode26, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm810", + { /* arm810. */ TARGET_CPU_arm810, (TF_LDSCHED), - "4", BASE_ARCH_4, - { - ISA_ARMv4,isa_bit_mode26, - isa_nobit - }, &arm_fastmul_tune }, - { - "strongarm", + { /* strongarm. */ TARGET_CPU_strongarm, (TF_LDSCHED | TF_STRONG), - "4", BASE_ARCH_4, - { - ISA_ARMv4,isa_bit_mode26, - isa_nobit - }, &arm_strongarm_tune }, - { - "strongarm110", + { /* strongarm110. */ TARGET_CPU_strongarm110, (TF_LDSCHED | TF_STRONG), - "4", BASE_ARCH_4, - { - ISA_ARMv4,isa_bit_mode26, - isa_nobit - }, &arm_strongarm_tune }, - { - "strongarm1100", + { /* strongarm1100. */ TARGET_CPU_strongarm1100, (TF_LDSCHED | TF_STRONG), - "4", BASE_ARCH_4, - { - ISA_ARMv4,isa_bit_mode26, - isa_nobit - }, &arm_strongarm_tune }, - { - "strongarm1110", + { /* strongarm1110. */ TARGET_CPU_strongarm1110, (TF_LDSCHED | TF_STRONG), - "4", BASE_ARCH_4, - { - ISA_ARMv4,isa_bit_mode26, - isa_nobit - }, &arm_strongarm_tune }, - { - "fa526", + { /* fa526. */ TARGET_CPU_fa526, (TF_LDSCHED), - "4", BASE_ARCH_4, - { - ISA_ARMv4,isa_bit_mode26, - isa_nobit - }, &arm_fastmul_tune }, - { - "fa626", + { /* fa626. */ TARGET_CPU_fa626, (TF_LDSCHED), - "4", BASE_ARCH_4, - { - ISA_ARMv4,isa_bit_mode26, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm7tdmi", + { /* arm7tdmi. */ TARGET_CPU_arm7tdmi, (TF_CO_PROC), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm7tdmi-s", + { /* arm7tdmi-s. */ TARGET_CPU_arm7tdmis, (TF_CO_PROC), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm710t", + { /* arm710t. */ TARGET_CPU_arm710t, (TF_WBUF), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm720t", + { /* arm720t. */ TARGET_CPU_arm720t, (TF_WBUF), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm740t", + { /* arm740t. */ TARGET_CPU_arm740t, (TF_WBUF), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm9", + { /* arm9. */ TARGET_CPU_arm9, (TF_LDSCHED), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm9tdmi", + { /* arm9tdmi. */ TARGET_CPU_arm9tdmi, (TF_LDSCHED), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm920", + { /* arm920. */ TARGET_CPU_arm920, (TF_LDSCHED), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm920t", + { /* arm920t. */ TARGET_CPU_arm920t, (TF_LDSCHED), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm922t", + { /* arm922t. */ TARGET_CPU_arm922t, (TF_LDSCHED), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm940t", + { /* arm940t. */ TARGET_CPU_arm940t, (TF_LDSCHED), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "ep9312", + { /* ep9312. */ TARGET_CPU_ep9312, (TF_LDSCHED), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm10tdmi", + { /* arm10tdmi. */ TARGET_CPU_arm10tdmi, (TF_LDSCHED), - "5T", BASE_ARCH_5T, - { - ISA_ARMv5t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm1020t", + { /* arm1020t. */ TARGET_CPU_arm1020t, (TF_LDSCHED), - "5T", BASE_ARCH_5T, - { - ISA_ARMv5t, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm9e", + { /* arm9e. */ TARGET_CPU_arm9e, (TF_LDSCHED), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, &arm_9e_tune }, - { - "arm946e-s", + { /* arm946e-s. */ TARGET_CPU_arm946es, (TF_LDSCHED), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, &arm_9e_tune }, - { - "arm966e-s", + { /* arm966e-s. */ TARGET_CPU_arm966es, (TF_LDSCHED), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, &arm_9e_tune }, - { - "arm968e-s", + { /* arm968e-s. */ TARGET_CPU_arm968es, (TF_LDSCHED), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, &arm_9e_tune }, - { - "arm10e", + { /* arm10e. */ TARGET_CPU_arm10e, (TF_LDSCHED), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm1020e", + { /* arm1020e. */ TARGET_CPU_arm1020e, (TF_LDSCHED), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, &arm_fastmul_tune }, - { - "arm1022e", + { /* arm1022e. */ TARGET_CPU_arm1022e, (TF_LDSCHED), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, &arm_fastmul_tune }, - { - "xscale", + { /* xscale. */ TARGET_CPU_xscale, (TF_LDSCHED | TF_XSCALE), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_bit_xscale, - isa_nobit - }, &arm_xscale_tune }, - { - "iwmmxt", + { /* iwmmxt. */ TARGET_CPU_iwmmxt, (TF_LDSCHED | TF_XSCALE), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt, - isa_nobit - }, &arm_xscale_tune }, - { - "iwmmxt2", + { /* iwmmxt2. */ TARGET_CPU_iwmmxt2, (TF_LDSCHED | TF_XSCALE), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt,isa_bit_iwmmxt2, - isa_nobit - }, &arm_xscale_tune }, - { - "fa606te", + { /* fa606te. */ TARGET_CPU_fa606te, (TF_LDSCHED), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, &arm_9e_tune }, - { - "fa626te", + { /* fa626te. */ TARGET_CPU_fa626te, (TF_LDSCHED), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, &arm_9e_tune }, - { - "fmp626", + { /* fmp626. */ TARGET_CPU_fmp626, (TF_LDSCHED), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, &arm_9e_tune }, - { - "fa726te", + { /* fa726te. */ TARGET_CPU_fa726te, (TF_LDSCHED), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, &arm_fa726te_tune }, - { - "arm926ej-s", + { /* arm926ej-s. */ TARGET_CPU_arm926ejs, (TF_LDSCHED), - "5TEJ", BASE_ARCH_5TEJ, - { - ISA_ARMv5tej, - isa_nobit - }, &arm_9e_tune }, - { - "arm1026ej-s", + { /* arm1026ej-s. */ TARGET_CPU_arm1026ejs, (TF_LDSCHED), - "5TEJ", BASE_ARCH_5TEJ, - { - ISA_ARMv5tej, - isa_nobit - }, &arm_9e_tune }, - { - "arm1136j-s", + { /* arm1136j-s. */ TARGET_CPU_arm1136js, (TF_LDSCHED), - "6J", BASE_ARCH_6J, - { - ISA_ARMv6j, - isa_nobit - }, &arm_9e_tune }, - { - "arm1136jf-s", + { /* arm1136jf-s. */ TARGET_CPU_arm1136jfs, (TF_LDSCHED), - "6J", BASE_ARCH_6J, - { - ISA_ARMv6j, - ISA_VFPv2,ISA_FP_DBL, - isa_nobit - }, &arm_9e_tune }, - { - "arm1176jz-s", + { /* arm1176jz-s. */ TARGET_CPU_arm1176jzs, (TF_LDSCHED), - "6KZ", BASE_ARCH_6KZ, - { - ISA_ARMv6kz, - isa_nobit - }, &arm_9e_tune }, - { - "arm1176jzf-s", + { /* arm1176jzf-s. */ TARGET_CPU_arm1176jzfs, (TF_LDSCHED), - "6KZ", BASE_ARCH_6KZ, - { - ISA_ARMv6kz, - ISA_VFPv2,ISA_FP_DBL, - isa_nobit - }, &arm_9e_tune }, - { - "mpcorenovfp", + { /* mpcorenovfp. */ TARGET_CPU_mpcorenovfp, (TF_LDSCHED), - "6K", BASE_ARCH_6K, - { - ISA_ARMv6k, - isa_nobit - }, &arm_9e_tune }, - { - "mpcore", + { /* mpcore. */ TARGET_CPU_mpcore, (TF_LDSCHED), - "6K", BASE_ARCH_6K, - { - ISA_ARMv6k, - ISA_VFPv2,ISA_FP_DBL, - isa_nobit - }, &arm_9e_tune }, - { - "arm1156t2-s", + { /* arm1156t2-s. */ TARGET_CPU_arm1156t2s, (TF_LDSCHED), - "6T2", BASE_ARCH_6T2, - { - ISA_ARMv6t2, - isa_nobit - }, &arm_v6t2_tune }, - { - "arm1156t2f-s", + { /* arm1156t2f-s. */ TARGET_CPU_arm1156t2fs, (TF_LDSCHED), - "6T2", BASE_ARCH_6T2, - { - ISA_ARMv6t2, - ISA_VFPv2,ISA_FP_DBL, - isa_nobit - }, &arm_v6t2_tune }, - { - "cortex-m1", + { /* cortex-m1. */ TARGET_CPU_cortexm1, (TF_LDSCHED), - "6M", BASE_ARCH_6M, - { - ISA_ARMv6m, - isa_nobit - }, &arm_v6m_tune }, - { - "cortex-m0", + { /* cortex-m0. */ TARGET_CPU_cortexm0, (TF_LDSCHED), - "6M", BASE_ARCH_6M, - { - ISA_ARMv6m, - isa_nobit - }, &arm_v6m_tune }, - { - "cortex-m0plus", + { /* cortex-m0plus. */ TARGET_CPU_cortexm0plus, (TF_LDSCHED), - "6M", BASE_ARCH_6M, - { - ISA_ARMv6m, - isa_nobit - }, &arm_v6m_tune }, - { - "cortex-m1.small-multiply", + { /* cortex-m1.small-multiply. */ TARGET_CPU_cortexm1, (TF_LDSCHED | TF_SMALLMUL), - "6M", BASE_ARCH_6M, - { - ISA_ARMv6m, - isa_nobit - }, &arm_v6m_tune }, - { - "cortex-m0.small-multiply", + { /* cortex-m0.small-multiply. */ TARGET_CPU_cortexm0, (TF_LDSCHED | TF_SMALLMUL), - "6M", BASE_ARCH_6M, - { - ISA_ARMv6m, - isa_nobit - }, &arm_v6m_tune }, - { - "cortex-m0plus.small-multiply", + { /* cortex-m0plus.small-multiply. */ TARGET_CPU_cortexm0plus, (TF_LDSCHED | TF_SMALLMUL), - "6M", BASE_ARCH_6M, - { - ISA_ARMv6m, - isa_nobit - }, &arm_v6m_tune }, - { - "generic-armv7-a", + { /* generic-armv7-a. */ TARGET_CPU_genericv7a, (TF_LDSCHED), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7a, - isa_nobit - }, &arm_cortex_tune }, - { - "cortex-a5", + { /* cortex-a5. */ TARGET_CPU_cortexa5, (TF_LDSCHED), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7a, - isa_nobit - }, &arm_cortex_a5_tune }, - { - "cortex-a7", + { /* cortex-a7. */ TARGET_CPU_cortexa7, (TF_LDSCHED), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7ve, - isa_nobit - }, &arm_cortex_a7_tune }, - { - "cortex-a8", + { /* cortex-a8. */ TARGET_CPU_cortexa8, (TF_LDSCHED), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7a, - isa_nobit - }, &arm_cortex_a8_tune }, - { - "cortex-a9", + { /* cortex-a9. */ TARGET_CPU_cortexa9, (TF_LDSCHED), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7a, - isa_nobit - }, &arm_cortex_a9_tune }, - { - "cortex-a12", + { /* cortex-a12. */ TARGET_CPU_cortexa17, (TF_LDSCHED), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7ve, - isa_nobit - }, &arm_cortex_a12_tune }, - { - "cortex-a15", + { /* cortex-a15. */ TARGET_CPU_cortexa15, (TF_LDSCHED), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7ve, - isa_nobit - }, &arm_cortex_a15_tune }, - { - "cortex-a17", + { /* cortex-a17. */ TARGET_CPU_cortexa17, (TF_LDSCHED), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7ve, - isa_nobit - }, &arm_cortex_a12_tune }, - { - "cortex-r4", + { /* cortex-r4. */ TARGET_CPU_cortexr4, (TF_LDSCHED), - "7R", BASE_ARCH_7R, - { - ISA_ARMv7r, - isa_nobit - }, &arm_cortex_tune }, - { - "cortex-r4f", + { /* cortex-r4f. */ TARGET_CPU_cortexr4f, (TF_LDSCHED), - "7R", BASE_ARCH_7R, - { - ISA_ARMv7r, - isa_nobit - }, &arm_cortex_tune }, - { - "cortex-r5", + { /* cortex-r5. */ TARGET_CPU_cortexr5, (TF_LDSCHED), - "7R", BASE_ARCH_7R, - { - ISA_ARMv7r, - isa_bit_adiv, - isa_nobit - }, &arm_cortex_tune }, - { - "cortex-r7", + { /* cortex-r7. */ TARGET_CPU_cortexr7, (TF_LDSCHED), - "7R", BASE_ARCH_7R, - { - ISA_ARMv7r, - isa_bit_adiv, - isa_nobit - }, &arm_cortex_tune }, - { - "cortex-r8", + { /* cortex-r8. */ TARGET_CPU_cortexr7, (TF_LDSCHED), - "7R", BASE_ARCH_7R, - { - ISA_ARMv7r, - isa_bit_adiv, - isa_nobit - }, &arm_cortex_tune }, - { - "cortex-m7", + { /* cortex-m7. */ TARGET_CPU_cortexm7, (TF_LDSCHED), - "7EM", BASE_ARCH_7EM, - { - ISA_ARMv7em, - isa_quirk_no_volatile_ce, - isa_nobit - }, &arm_cortex_m7_tune }, - { - "cortex-m4", + { /* cortex-m4. */ TARGET_CPU_cortexm4, (TF_LDSCHED), - "7EM", BASE_ARCH_7EM, - { - ISA_ARMv7em, - isa_nobit - }, &arm_v7m_tune }, - { - "cortex-m3", + { /* cortex-m3. */ TARGET_CPU_cortexm3, (TF_LDSCHED), - "7M", BASE_ARCH_7M, - { - ISA_ARMv7m, - isa_quirk_cm3_ldrd, - isa_nobit - }, &arm_v7m_tune }, - { - "marvell-pj4", + { /* marvell-pj4. */ TARGET_CPU_marvell_pj4, (TF_LDSCHED), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7a, - isa_nobit - }, &arm_marvell_pj4_tune }, - { - "cortex-a15.cortex-a7", + { /* cortex-a15.cortex-a7. */ TARGET_CPU_cortexa7, (TF_LDSCHED), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7ve, - isa_nobit - }, &arm_cortex_a15_tune }, - { - "cortex-a17.cortex-a7", + { /* cortex-a17.cortex-a7. */ TARGET_CPU_cortexa7, (TF_LDSCHED), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7ve, - isa_nobit - }, &arm_cortex_a12_tune }, - { - "cortex-a32", + { /* cortex-a32. */ TARGET_CPU_cortexa53, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, &arm_cortex_a35_tune }, - { - "cortex-a35", + { /* cortex-a35. */ TARGET_CPU_cortexa53, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, &arm_cortex_a35_tune }, - { - "cortex-a53", + { /* cortex-a53. */ TARGET_CPU_cortexa53, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, &arm_cortex_a53_tune }, - { - "cortex-a57", + { /* cortex-a57. */ TARGET_CPU_cortexa57, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, &arm_cortex_a57_tune }, - { - "cortex-a72", + { /* cortex-a72. */ TARGET_CPU_cortexa57, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, &arm_cortex_a57_tune }, - { - "cortex-a73", + { /* cortex-a73. */ TARGET_CPU_cortexa57, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, &arm_cortex_a73_tune }, - { - "exynos-m1", + { /* exynos-m1. */ TARGET_CPU_exynosm1, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, &arm_exynosm1_tune }, - { - "xgene1", + { /* xgene1. */ TARGET_CPU_xgene1, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a, - isa_nobit - }, &arm_xgene1_tune }, - { - "cortex-a57.cortex-a53", + { /* cortex-a57.cortex-a53. */ TARGET_CPU_cortexa53, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, &arm_cortex_a57_tune }, - { - "cortex-a72.cortex-a53", + { /* cortex-a72.cortex-a53. */ TARGET_CPU_cortexa53, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, &arm_cortex_a57_tune }, - { - "cortex-a73.cortex-a35", + { /* cortex-a73.cortex-a35. */ TARGET_CPU_cortexa53, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, &arm_cortex_a73_tune }, - { - "cortex-a73.cortex-a53", + { /* cortex-a73.cortex-a53. */ TARGET_CPU_cortexa53, (TF_LDSCHED), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, &arm_cortex_a73_tune }, - { - "cortex-m23", + { /* cortex-m23. */ TARGET_CPU_cortexm23, (TF_LDSCHED), - "8M_BASE", BASE_ARCH_8M_BASE, - { - ISA_ARMv8m_base, - isa_nobit - }, &arm_v6m_tune }, - { - "cortex-m33", + { /* cortex-m33. */ TARGET_CPU_cortexm33, (TF_LDSCHED), - "8M_MAIN", BASE_ARCH_8M_MAIN, - { - ISA_ARMv8m_main,isa_bit_ARMv7em, - isa_nobit - }, &arm_v7m_tune }, - {NULL, TARGET_CPU_arm_none, 0, NULL, BASE_ARCH_0, {isa_nobit}, NULL} -}; - -static const struct processors all_architectures[] = -{ - { - "armv2", TARGET_CPU_arm2, - (TF_CO_PROC | TF_NO_MODE32), - "2", BASE_ARCH_2, - { - ISA_ARMv2,isa_bit_mode26, - isa_nobit - }, - NULL - }, - { - "armv2a", TARGET_CPU_arm2, - (TF_CO_PROC | TF_NO_MODE32), - "2", BASE_ARCH_2, - { - ISA_ARMv2,isa_bit_mode26, - isa_nobit - }, - NULL - }, - { - "armv3", TARGET_CPU_arm6, - (TF_CO_PROC), - "3", BASE_ARCH_3, - { - ISA_ARMv3,isa_bit_mode26, - isa_nobit - }, - NULL - }, - { - "armv3m", TARGET_CPU_arm7m, - (TF_CO_PROC), - "3M", BASE_ARCH_3M, - { - ISA_ARMv3m,isa_bit_mode26, - isa_nobit - }, - NULL - }, - { - "armv4", TARGET_CPU_arm7tdmi, - (TF_CO_PROC), - "4", BASE_ARCH_4, - { - ISA_ARMv4,isa_bit_mode26, - isa_nobit - }, - NULL - }, - { - "armv4t", TARGET_CPU_arm7tdmi, - (TF_CO_PROC), - "4T", BASE_ARCH_4T, - { - ISA_ARMv4t, - isa_nobit - }, - NULL - }, - { - "armv5", TARGET_CPU_arm10tdmi, - (TF_CO_PROC), - "5", BASE_ARCH_5, - { - ISA_ARMv5, - isa_nobit - }, - NULL - }, - { - "armv5t", TARGET_CPU_arm10tdmi, - (TF_CO_PROC), - "5T", BASE_ARCH_5T, - { - ISA_ARMv5t, - isa_nobit - }, - NULL - }, - { - "armv5e", TARGET_CPU_arm1026ejs, - (TF_CO_PROC), - "5E", BASE_ARCH_5E, - { - ISA_ARMv5e, - isa_nobit - }, - NULL - }, - { - "armv5te", TARGET_CPU_arm1026ejs, - (TF_CO_PROC), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te, - isa_nobit - }, - NULL - }, - { - "armv5tej", TARGET_CPU_arm1026ejs, - (TF_CO_PROC), - "5TEJ", BASE_ARCH_5TEJ, - { - ISA_ARMv5tej, - isa_nobit - }, - NULL - }, - { - "armv6", TARGET_CPU_arm1136js, - (TF_CO_PROC), - "6", BASE_ARCH_6, - { - ISA_ARMv6, - isa_nobit - }, - NULL - }, - { - "armv6j", TARGET_CPU_arm1136js, - (TF_CO_PROC), - "6J", BASE_ARCH_6J, - { - ISA_ARMv6j, - isa_nobit - }, - NULL - }, - { - "armv6k", TARGET_CPU_mpcore, - (TF_CO_PROC), - "6K", BASE_ARCH_6K, - { - ISA_ARMv6k, - isa_nobit - }, - NULL - }, - { - "armv6z", TARGET_CPU_arm1176jzs, - (TF_CO_PROC), - "6Z", BASE_ARCH_6Z, - { - ISA_ARMv6z, - isa_nobit - }, - NULL - }, - { - "armv6kz", TARGET_CPU_arm1176jzs, - (TF_CO_PROC), - "6KZ", BASE_ARCH_6KZ, - { - ISA_ARMv6kz, - isa_nobit - }, - NULL - }, - { - "armv6zk", TARGET_CPU_arm1176jzs, - (TF_CO_PROC), - "6KZ", BASE_ARCH_6KZ, - { - ISA_ARMv6kz, - isa_nobit - }, - NULL - }, - { - "armv6t2", TARGET_CPU_arm1156t2s, - (TF_CO_PROC), - "6T2", BASE_ARCH_6T2, - { - ISA_ARMv6t2, - isa_nobit - }, - NULL - }, - { - "armv6-m", TARGET_CPU_cortexm1, - 0, - "6M", BASE_ARCH_6M, - { - ISA_ARMv6m, - isa_nobit - }, - NULL - }, - { - "armv6s-m", TARGET_CPU_cortexm1, - 0, - "6M", BASE_ARCH_6M, - { - ISA_ARMv6m, - isa_nobit - }, - NULL - }, - { - "armv7", TARGET_CPU_cortexa8, - (TF_CO_PROC), - "7", BASE_ARCH_7, - { - ISA_ARMv7, - isa_nobit - }, - NULL - }, - { - "armv7-a", TARGET_CPU_cortexa8, - (TF_CO_PROC), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7a, - isa_nobit - }, - NULL - }, - { - "armv7ve", TARGET_CPU_cortexa8, - (TF_CO_PROC), - "7A", BASE_ARCH_7A, - { - ISA_ARMv7ve, - isa_nobit - }, - NULL - }, - { - "armv7-r", TARGET_CPU_cortexr4, - (TF_CO_PROC), - "7R", BASE_ARCH_7R, - { - ISA_ARMv7r, - isa_nobit - }, - NULL - }, - { - "armv7-m", TARGET_CPU_cortexm3, - (TF_CO_PROC), - "7M", BASE_ARCH_7M, - { - ISA_ARMv7m, - isa_nobit - }, - NULL - }, - { - "armv7e-m", TARGET_CPU_cortexm4, - (TF_CO_PROC), - "7EM", BASE_ARCH_7EM, - { - ISA_ARMv7em, - isa_nobit - }, - NULL - }, - { - "armv8-a", TARGET_CPU_cortexa53, - (TF_CO_PROC), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a, - isa_nobit - }, - NULL - }, - { - "armv8-a+crc", TARGET_CPU_cortexa53, - (TF_CO_PROC), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8a,isa_bit_crc32, - isa_nobit - }, - NULL - }, - { - "armv8.1-a", TARGET_CPU_cortexa53, - (TF_CO_PROC), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8_1a, - isa_nobit - }, - NULL - }, - { - "armv8.2-a", TARGET_CPU_cortexa53, - (TF_CO_PROC), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8_2a, - isa_nobit - }, - NULL - }, - { - "armv8.2-a+fp16", TARGET_CPU_cortexa53, - (TF_CO_PROC), - "8A", BASE_ARCH_8A, - { - ISA_ARMv8_2a,isa_bit_fp16, - isa_nobit - }, - NULL - }, - { - "armv8-m.base", TARGET_CPU_cortexm23, - 0, - "8M_BASE", BASE_ARCH_8M_BASE, - { - ISA_ARMv8m_base, - isa_nobit - }, - NULL - }, - { - "armv8-m.main", TARGET_CPU_cortexm7, - (TF_CO_PROC), - "8M_MAIN", BASE_ARCH_8M_MAIN, - { - ISA_ARMv8m_main, - isa_nobit - }, - NULL - }, - { - "armv8-m.main+dsp", TARGET_CPU_cortexm33, - (TF_CO_PROC), - "8M_MAIN", BASE_ARCH_8M_MAIN, - { - ISA_ARMv8m_main,isa_bit_ARMv7em, - isa_nobit - }, - NULL - }, - { - "iwmmxt", TARGET_CPU_iwmmxt, - (TF_LDSCHED | TF_STRONG | TF_XSCALE), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt, - isa_nobit - }, - NULL - }, - { - "iwmmxt2", TARGET_CPU_iwmmxt2, - (TF_LDSCHED | TF_STRONG | TF_XSCALE), - "5TE", BASE_ARCH_5TE, - { - ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt,isa_bit_iwmmxt2, - isa_nobit - }, - NULL - }, - {NULL, TARGET_CPU_arm_none, 0, NULL, BASE_ARCH_0, {isa_nobit}, NULL} -}; - -const struct arm_fpu_desc all_fpus[] = -{ - { - "vfp", - { - ISA_VFPv2,ISA_FP_DBL, - isa_nobit - } - }, - { - "vfpv2", - { - ISA_VFPv2,ISA_FP_DBL, - isa_nobit - } - }, - { - "vfpv3", - { - ISA_VFPv3,ISA_FP_D32, - isa_nobit - } - }, - { - "vfpv3-fp16", - { - ISA_VFPv3,ISA_FP_D32,isa_bit_fp16conv, - isa_nobit - } - }, - { - "vfpv3-d16", - { - ISA_VFPv3,ISA_FP_DBL, - isa_nobit - } - }, - { - "vfpv3-d16-fp16", - { - ISA_VFPv3,ISA_FP_DBL,isa_bit_fp16conv, - isa_nobit - } - }, - { - "vfpv3xd", - { - ISA_VFPv3, - isa_nobit - } - }, - { - "vfpv3xd-fp16", - { - ISA_VFPv3,isa_bit_fp16conv, - isa_nobit - } - }, - { - "neon", - { - ISA_VFPv3,ISA_NEON, - isa_nobit - } - }, - { - "neon-vfpv3", - { - ISA_VFPv3,ISA_NEON, - isa_nobit - } - }, - { - "neon-fp16", - { - ISA_VFPv3,ISA_NEON,isa_bit_fp16conv, - isa_nobit - } - }, - { - "vfpv4", - { - ISA_VFPv4,ISA_FP_D32, - isa_nobit - } - }, - { - "neon-vfpv4", - { - ISA_VFPv4,ISA_NEON, - isa_nobit - } - }, - { - "vfpv4-d16", - { - ISA_VFPv4,ISA_FP_DBL, - isa_nobit - } - }, - { - "fpv4-sp-d16", - { - ISA_VFPv4, - isa_nobit - } - }, - { - "fpv5-sp-d16", - { - ISA_FPv5, - isa_nobit - } - }, - { - "fpv5-d16", - { - ISA_FPv5,ISA_FP_DBL, - isa_nobit - } - }, - { - "fp-armv8", - { - ISA_FP_ARMv8,ISA_FP_D32, - isa_nobit - } - }, - { - "neon-fp-armv8", - { - ISA_FP_ARMv8,ISA_NEON, - isa_nobit - } - }, - { - "crypto-neon-fp-armv8", - { - ISA_FP_ARMv8,ISA_CRYPTO, - isa_nobit - } - }, - { - "vfp3", - { - ISA_VFPv3,ISA_FP_D32, - isa_nobit - } - }, + {TARGET_CPU_arm_none, 0, NULL} }; diff --git a/gcc/config/arm/arm-cpu.h b/gcc/config/arm/arm-cpu.h index cc0cb0017eb..e27634c6dd9 100644 --- a/gcc/config/arm/arm-cpu.h +++ b/gcc/config/arm/arm-cpu.h @@ -133,6 +133,44 @@ enum processor_type TARGET_CPU_arm_none }; +enum arch_type +{ + TARGET_ARCH_armv2, + TARGET_ARCH_armv2a, + TARGET_ARCH_armv3, + TARGET_ARCH_armv3m, + TARGET_ARCH_armv4, + TARGET_ARCH_armv4t, + TARGET_ARCH_armv5, + TARGET_ARCH_armv5t, + TARGET_ARCH_armv5e, + TARGET_ARCH_armv5te, + TARGET_ARCH_armv5tej, + TARGET_ARCH_armv6, + TARGET_ARCH_armv6j, + TARGET_ARCH_armv6k, + TARGET_ARCH_armv6z, + TARGET_ARCH_armv6kz, + TARGET_ARCH_armv6zk, + TARGET_ARCH_armv6t2, + TARGET_ARCH_armv6_m, + TARGET_ARCH_armv6s_m, + TARGET_ARCH_armv7, + TARGET_ARCH_armv7_a, + TARGET_ARCH_armv7ve, + TARGET_ARCH_armv7_r, + TARGET_ARCH_armv7_m, + TARGET_ARCH_armv7e_m, + TARGET_ARCH_armv8_a, + TARGET_ARCH_armv8_1_a, + TARGET_ARCH_armv8_2_a, + TARGET_ARCH_armv8_m_base, + TARGET_ARCH_armv8_m_main, + TARGET_ARCH_iwmmxt, + TARGET_ARCH_iwmmxt2, + TARGET_ARCH_arm_none +}; + enum fpu_type { TARGET_FPU_vfp, diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index 1100f3a5411..43f4ebcc5f7 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -113,6 +113,9 @@ begin arch armv5e tune flags CO_PROC base 5E isa ARMv5e + option fp add VFPv2 FP_DBL + optalias vfpv2 fp + option nofp remove ALL_FP end arch armv5e begin arch armv5te @@ -120,6 +123,9 @@ begin arch armv5te tune flags CO_PROC base 5TE isa ARMv5te + option fp add VFPv2 FP_DBL + optalias vfpv2 fp + option nofp remove ALL_FP end arch armv5te begin arch armv5tej @@ -127,6 +133,9 @@ begin arch armv5tej tune flags CO_PROC base 5TEJ isa ARMv5tej + option fp add VFPv2 FP_DBL + optalias vfpv2 fp + option nofp remove ALL_FP end arch armv5tej begin arch armv6 @@ -134,6 +143,9 @@ begin arch armv6 tune flags CO_PROC base 6 isa ARMv6 + option fp add VFPv2 FP_DBL + optalias vfpv2 fp + option nofp remove ALL_FP end arch armv6 begin arch armv6j @@ -141,6 +153,9 @@ begin arch armv6j tune flags CO_PROC base 6J isa ARMv6j + option fp add VFPv2 FP_DBL + optalias vfpv2 fp + option nofp remove ALL_FP end arch armv6j begin arch armv6k @@ -148,6 +163,9 @@ begin arch armv6k tune flags CO_PROC base 6K isa ARMv6k + option fp add VFPv2 FP_DBL + optalias vfpv2 fp + option nofp remove ALL_FP end arch armv6k begin arch armv6z @@ -155,6 +173,9 @@ begin arch armv6z tune flags CO_PROC base 6Z isa ARMv6z + option fp add VFPv2 FP_DBL + optalias vfpv2 fp + option nofp remove ALL_FP end arch armv6z begin arch armv6kz @@ -162,6 +183,9 @@ begin arch armv6kz tune flags CO_PROC base 6KZ isa ARMv6kz + option fp add VFPv2 FP_DBL + optalias vfpv2 fp + option nofp remove ALL_FP end arch armv6kz begin arch armv6zk @@ -169,6 +193,9 @@ begin arch armv6zk tune flags CO_PROC base 6KZ isa ARMv6kz + option fp add VFPv2 FP_DBL + optalias vfpv2 fp + option nofp remove ALL_FP end arch armv6zk begin arch armv6t2 @@ -176,6 +203,9 @@ begin arch armv6t2 tune flags CO_PROC base 6T2 isa ARMv6t2 + option fp add VFPv2 FP_DBL + optalias vfpv2 fp + option nofp remove ALL_FP end arch armv6t2 begin arch armv6-m @@ -195,6 +225,10 @@ begin arch armv7 tune flags CO_PROC base 7 isa ARMv7 +# fp => VFPv3-d16 (only useful for the A+R profile subset). + option fp add VFPv3 FP_DBL + optalias vfpv3-d16 fp + option nofp remove ALL_FP end arch armv7 begin arch armv7-a @@ -202,6 +236,21 @@ begin arch armv7-a tune flags CO_PROC base 7A isa ARMv7a +# fp => VFPv3-d16, simd => neon-vfpv3 + option fp add VFPv3 FP_DBL + optalias vfpv3-d16 fp + option vfpv3 add VFPv3 FP_D32 + option vfpv3-d16-fp16 add VFPv3 FP_DBL bit_fp16conv + option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 bit_fp16conv + option vfpv4-d16 add VFPv4 FP_DBL + option vfpv4 add VFPv4 FP_D32 + option simd add VFPv3 NEON + optalias neon simd + optalias neon-vfpv3 simd + option neon-fp16 add VFPv3 NEON bit_fp16conv + option neon-vfpv4 add VFPv4 NEON + option nosimd remove ALL_SIMD + option nofp remove ALL_FP end arch armv7-a begin arch armv7ve @@ -209,6 +258,21 @@ begin arch armv7ve tune flags CO_PROC base 7A isa ARMv7ve +# fp => VFPv4-d16, simd => neon-vfpv4 + option vfpv3-d16 add VFPv3 FP_DBL + option vfpv3 add VFPv3 FP_D32 + option vfpv3-d16-fp16 add VFPv3 FP_DBL bit_fp16conv + option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 bit_fp16conv + option fp add VFPv4 FP_DBL + optalias vfpv4-d16 fp + option vfpv4 add VFPv4 FP_D32 + option neon add VFPv3 NEON + optalias neon-vfpv3 neon + option neon-fp16 add VFPv3 NEON bit_fp16conv + option simd add VFPv4 NEON + optalias neon-vfpv4 simd + option nosimd remove ALL_SIMD + option nofp remove ALL_FP end arch armv7ve begin arch armv7-r @@ -216,6 +280,14 @@ begin arch armv7-r tune flags CO_PROC base 7R isa ARMv7r +# ARMv7-r uses VFPv3-d16 + option fp.sp add VFPv3 + optalias vfpv3xd fp.sp + option fp add VFPv3 FP_DBL + optalias vfpv3-d16 fp + option idiv add bit_adiv + option nofp remove ALL_FP + option noidiv remove bit_adiv end arch armv7-r begin arch armv7-m @@ -223,6 +295,8 @@ begin arch armv7-m tune flags CO_PROC base 7M isa ARMv7m +# In theory FP is permitted in v7-m, but in practice no implementations exist. +# leave it out for now. end arch armv7-m begin arch armv7e-m @@ -230,6 +304,13 @@ begin arch armv7e-m tune flags CO_PROC base 7EM isa ARMv7em +# fp => VFPv4-sp-d16; fpv5 => FPv5-sp-d16; fp.dp => FPv5-d16 + option fp add VFPv4 + optalias vfpv4-sp-d16 fp + option fpv5 add FPv5 + option fp.dp add FPv5 FP_DBL + optalias fpv5-d16 fp.dp + option nofp remove ALL_FP end arch armv7e-m begin arch armv8-a @@ -237,20 +318,22 @@ begin arch armv8-a tune flags CO_PROC base 8A isa ARMv8a + option crc add bit_crc32 + option simd add FP_ARMv8 NEON + option crypto add FP_ARMv8 CRYPTO + option nocrypto remove ALL_CRYPTO + option nofp remove ALL_FP end arch armv8-a -begin arch armv8-a+crc - tune for cortex-a53 - tune flags CO_PROC - base 8A - isa ARMv8a bit_crc32 -end arch armv8-a+crc - begin arch armv8.1-a tune for cortex-a53 tune flags CO_PROC base 8A isa ARMv8_1a + option simd add FP_ARMv8 NEON + option crypto add FP_ARMv8 CRYPTO + option nocrypto remove ALL_CRYPTO + option nofp remove ALL_FP end arch armv8.1-a begin arch armv8.2-a @@ -258,15 +341,13 @@ begin arch armv8.2-a tune flags CO_PROC base 8A isa ARMv8_2a + option simd add FP_ARMv8 NEON + option fp16 add bit_fp16 FP_ARMv8 NEON + option crypto add FP_ARMv8 CRYPTO + option nocrypto remove ALL_CRYPTO + option nofp remove ALL_FP end arch armv8.2-a -begin arch armv8.2-a+fp16 - tune for cortex-a53 - tune flags CO_PROC - base 8A - isa ARMv8_2a bit_fp16 -end arch armv8.2-a+fp16 - begin arch armv8-m.base tune for cortex-m23 base 8M_BASE @@ -278,15 +359,14 @@ begin arch armv8-m.main tune flags CO_PROC base 8M_MAIN isa ARMv8m_main + option dsp add bit_ARMv7em +# fp => FPv5-sp-d16; fp.dp => FPv5-d16 + option fp add FPv5 + option fp.dp add FPv5 FP_DBL + option nofp remove ALL_FP + option nodsp remove bit_ARMv7em end arch armv8-m.main -begin arch armv8-m.main+dsp - tune for cortex-m33 - tune flags CO_PROC - base 8M_MAIN - isa ARMv8m_main bit_ARMv7em -end arch armv8-m.main+dsp - begin arch iwmmxt tune for iwmmxt tune flags LDSCHED STRONG XSCALE @@ -310,6 +390,8 @@ end arch iwmmxt2 # architecture <name> # [fpu <name>] # [isa <additional-isa-flags-list>] +# [option <name> add|remove <isa-list>]* +# [optalias <name> <optname>]* # [costs <name>] # end cpu <name> # @@ -317,7 +399,9 @@ end arch iwmmxt2 # non-valid punctuation characters to '_'. # If specified, tune for specifies a CPU target to use for tuning this core. # isa flags are appended to those defined by the architecture. - +# Each add option must have a distinct feature set and each remove +# option must similarly have a distinct feature set. Option aliases can be +# added with the optalias statement # V2/V2A Architecture Processors begin cpu arm2 @@ -593,6 +677,7 @@ end cpu ep9312 # V5T Architecture Processors +# These used VFPv1 which isn't supported by GCC begin cpu arm10tdmi tune flags LDSCHED architecture armv5t @@ -610,6 +695,8 @@ end cpu arm1020t begin cpu arm9e tune flags LDSCHED architecture armv5te + fpu vfpv2 + option nofp remove ALL_FP costs 9e end cpu arm9e @@ -617,6 +704,8 @@ begin cpu arm946e-s cname arm946es tune flags LDSCHED architecture armv5te + fpu vfpv2 + option nofp remove ALL_FP costs 9e end cpu arm946e-s @@ -624,6 +713,8 @@ begin cpu arm966e-s cname arm966es tune flags LDSCHED architecture armv5te + fpu vfpv2 + option nofp remove ALL_FP costs 9e end cpu arm966e-s @@ -631,24 +722,32 @@ begin cpu arm968e-s cname arm968es tune flags LDSCHED architecture armv5te + fpu vfpv2 + option nofp remove ALL_FP costs 9e end cpu arm968e-s begin cpu arm10e tune flags LDSCHED architecture armv5te + fpu vfpv2 + option nofp remove ALL_FP costs fastmul end cpu arm10e begin cpu arm1020e tune flags LDSCHED architecture armv5te + fpu vfpv2 + option nofp remove ALL_FP costs fastmul end cpu arm1020e begin cpu arm1022e tune flags LDSCHED architecture armv5te + fpu vfpv2 + option nofp remove ALL_FP costs fastmul end cpu arm1022e @@ -701,6 +800,8 @@ begin cpu arm926ej-s cname arm926ejs tune flags LDSCHED architecture armv5tej + fpu vfpv2 + option nofp remove ALL_FP costs 9e end cpu arm926ej-s @@ -708,6 +809,8 @@ begin cpu arm1026ej-s cname arm1026ejs tune flags LDSCHED architecture armv5tej + fpu vfpv2 + option nofp remove ALL_FP costs 9e end cpu arm1026ej-s @@ -826,6 +929,20 @@ begin cpu generic-armv7-a cname genericv7a tune flags LDSCHED architecture armv7-a + fpu vfpv3-d16 + option vfpv3-d16 add VFPv3 FP_DBL + option vfpv3 add VFPv3 FP_D32 + option vfpv3-d16-fp16 add VFPv3 FP_DBL bit_fp16conv + option vfpv3-fp16 add VFPv3 FP_D32 bit_fp16conv + option vfpv4-d16 add VFPv4 FP_DBL + option vfpv4 add VFPv4 FP_D32 + option simd add VFPv3 NEON + optalias neon simd + optalias neon-vfpv3 simd + option neon-fp16 add VFPv3 NEON bit_fp16conv + option neon-vfpv4 add VFPv4 NEON + option nosimd remove ALL_SIMD + option nofp remove ALL_FP costs cortex end cpu generic-armv7-a @@ -833,6 +950,9 @@ begin cpu cortex-a5 cname cortexa5 tune flags LDSCHED architecture armv7-a + fpu neon-fp16 + option nosimd remove ALL_SIMD + option nofp remove ALL_FP costs cortex_a5 end cpu cortex-a5 @@ -840,6 +960,9 @@ begin cpu cortex-a7 cname cortexa7 tune flags LDSCHED architecture armv7ve + fpu neon-vfpv4 + option nosimd remove ALL_SIMD + option nofp remove ALL_FP costs cortex_a7 end cpu cortex-a7 @@ -847,6 +970,8 @@ begin cpu cortex-a8 cname cortexa8 tune flags LDSCHED architecture armv7-a + fpu neon-vfpv3 + option nofp remove ALL_FP costs cortex_a8 end cpu cortex-a8 @@ -854,6 +979,9 @@ begin cpu cortex-a9 cname cortexa9 tune flags LDSCHED architecture armv7-a + fpu neon-fp16 + option nosimd remove ALL_SIMD + option nofp remove ALL_FP costs cortex_a9 end cpu cortex-a9 @@ -862,6 +990,8 @@ begin cpu cortex-a12 tune for cortex-a17 tune flags LDSCHED architecture armv7ve + fpu neon-vfpv4 + option nofp remove ALL_FP costs cortex_a12 end cpu cortex-a12 @@ -869,6 +999,8 @@ begin cpu cortex-a15 cname cortexa15 tune flags LDSCHED architecture armv7ve + fpu neon-vfpv4 + option nofp remove ALL_FP costs cortex_a15 end cpu cortex-a15 @@ -876,6 +1008,8 @@ begin cpu cortex-a17 cname cortexa17 tune flags LDSCHED architecture armv7ve + fpu neon-vfpv4 + option nofp remove ALL_FP costs cortex_a12 end cpu cortex-a17 @@ -890,22 +1024,26 @@ begin cpu cortex-r4f cname cortexr4f tune flags LDSCHED architecture armv7-r + fpu vfpv3-d16 costs cortex end cpu cortex-r4f begin cpu cortex-r5 cname cortexr5 tune flags LDSCHED - architecture armv7-r - isa bit_adiv + architecture armv7-r+idiv + fpu vfpv3-d16 + option nofp.dp remove FP_DBL + option nofp remove ALL_FP costs cortex end cpu cortex-r5 begin cpu cortex-r7 cname cortexr7 tune flags LDSCHED - architecture armv7-r - isa bit_adiv + architecture armv7-r+idiv + fpu vfpv3-d16 + option nofp remove ALL_FP costs cortex end cpu cortex-r7 @@ -913,8 +1051,9 @@ begin cpu cortex-r8 cname cortexr8 tune for cortex-r7 tune flags LDSCHED - architecture armv7-r - isa bit_adiv + architecture armv7-r+idiv + fpu vfpv3-d16 + option nofp remove ALL_FP costs cortex end cpu cortex-r8 @@ -923,6 +1062,9 @@ begin cpu cortex-m7 tune flags LDSCHED architecture armv7e-m isa quirk_no_volatile_ce + fpu fpv5-d16 + option nofp.dp remove FP_DBL + option nofp remove ALL_FP costs cortex_m7 end cpu cortex-m7 @@ -930,6 +1072,8 @@ begin cpu cortex-m4 cname cortexm4 tune flags LDSCHED architecture armv7e-m + fpu fpv4-sp-d16 + option nofp remove ALL_FP costs v7m end cpu cortex-m4 @@ -954,6 +1098,8 @@ begin cpu cortex-a15.cortex-a7 tune for cortex-a7 tune flags LDSCHED architecture armv7ve + fpu neon-vfpv4 + option nofp remove ALL_FP costs cortex_a15 end cpu cortex-a15.cortex-a7 @@ -962,6 +1108,8 @@ begin cpu cortex-a17.cortex-a7 tune for cortex-a7 tune flags LDSCHED architecture armv7ve + fpu neon-vfpv4 + option nofp remove ALL_FP costs cortex_a12 end cpu cortex-a17.cortex-a7 @@ -972,6 +1120,9 @@ begin cpu cortex-a32 tune for cortex-a53 tune flags LDSCHED architecture armv8-a+crc + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO + option nofp remove ALL_FP costs cortex_a35 end cpu cortex-a32 @@ -980,6 +1131,9 @@ begin cpu cortex-a35 tune for cortex-a53 tune flags LDSCHED architecture armv8-a+crc + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO + option nofp remove ALL_FP costs cortex_a35 end cpu cortex-a35 @@ -987,6 +1141,9 @@ begin cpu cortex-a53 cname cortexa53 tune flags LDSCHED architecture armv8-a+crc + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO + option nofp remove ALL_FP costs cortex_a53 end cpu cortex-a53 @@ -994,6 +1151,8 @@ begin cpu cortex-a57 cname cortexa57 tune flags LDSCHED architecture armv8-a+crc + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO costs cortex_a57 end cpu cortex-a57 @@ -1002,6 +1161,8 @@ begin cpu cortex-a72 tune for cortex-a57 tune flags LDSCHED architecture armv8-a+crc + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO costs cortex_a57 end cpu cortex-a72 @@ -1010,6 +1171,8 @@ begin cpu cortex-a73 tune for cortex-a57 tune flags LDSCHED architecture armv8-a+crc + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO costs cortex_a73 end cpu cortex-a73 @@ -1017,12 +1180,16 @@ begin cpu exynos-m1 cname exynosm1 tune flags LDSCHED architecture armv8-a+crc + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO costs exynosm1 end cpu exynos-m1 begin cpu xgene1 tune flags LDSCHED architecture armv8-a + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO costs xgene1 end cpu xgene1 @@ -1033,6 +1200,8 @@ begin cpu cortex-a57.cortex-a53 tune for cortex-a53 tune flags LDSCHED architecture armv8-a+crc + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO costs cortex_a57 end cpu cortex-a57.cortex-a53 @@ -1041,6 +1210,8 @@ begin cpu cortex-a72.cortex-a53 tune for cortex-a53 tune flags LDSCHED architecture armv8-a+crc + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO costs cortex_a57 end cpu cortex-a72.cortex-a53 @@ -1049,6 +1220,8 @@ begin cpu cortex-a73.cortex-a35 tune for cortex-a53 tune flags LDSCHED architecture armv8-a+crc + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO costs cortex_a73 end cpu cortex-a73.cortex-a35 @@ -1057,6 +1230,8 @@ begin cpu cortex-a73.cortex-a53 tune for cortex-a53 tune flags LDSCHED architecture armv8-a+crc + fpu neon-fp-armv8 + option crypto add FP_ARMv8 CRYPTO costs cortex_a73 end cpu cortex-a73.cortex-a53 @@ -1073,6 +1248,8 @@ begin cpu cortex-m33 cname cortexm33 tune flags LDSCHED architecture armv8-m.main+dsp + fpu fpv5-sp-d16 + option nofp remove ALL_FP costs v7m end cpu cortex-m33 diff --git a/gcc/config/arm/arm-isa.h b/gcc/config/arm/arm-isa.h index 7d1e23be0a2..4b5a0f658e6 100644 --- a/gcc/config/arm/arm-isa.h +++ b/gcc/config/arm/arm-isa.h @@ -127,11 +127,25 @@ enum isa_feature #define ISA_ARMv8m_base ISA_ARMv6m, isa_bit_ARMv8, isa_bit_cmse, isa_bit_tdiv #define ISA_ARMv8m_main ISA_ARMv7m, isa_bit_ARMv8, isa_bit_cmse +/* List of all cryptographic extensions to stripout if crypto is + disabled. Currently, that's trivial, but we define it anyway for + consistency with the SIMD and FP disable lists. */ +#define ISA_ALL_CRYPTO isa_bit_crypto + +/* List of all SIMD bits to strip out if SIMD is disabled. This does + strip off 32 D-registers, but does not remove support for + double-precision FP. */ +#define ISA_ALL_SIMD isa_bit_fp_d32, isa_bit_neon, ISA_ALL_CRYPTO + /* List of all FPU bits to strip out if -mfpu is used to override the default. isa_bit_fp16 is deliberately missing from this list. */ -#define ISA_ALL_FPU isa_bit_VFPv2, isa_bit_VFPv3, isa_bit_VFPv4, \ - isa_bit_FPv5, isa_bit_FP_ARMv8, isa_bit_neon, isa_bit_fp16conv, \ - isa_bit_fp_dbl, isa_bit_fp_d32, isa_bit_crypto +#define ISA_ALL_FPU_INTERNAL \ + isa_bit_VFPv2, isa_bit_VFPv3, isa_bit_VFPv4, isa_bit_FPv5, \ + isa_bit_FP_ARMv8, isa_bit_fp16conv, isa_bit_fp_dbl, ISA_ALL_SIMD + +/* Similarly, but including fp16 and other extensions that aren't part of + -mfpu support. */ +#define ISA_ALL_FP isa_bit_fp16, ISA_ALL_FPU_INTERNAL /* Useful combinations. */ #define ISA_VFPv2 isa_bit_VFPv2 diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index cf8b43714d8..25210e2375a 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -462,8 +462,6 @@ struct arm_build_target const char *arch_name; /* Preprocessor substring (never NULL). */ const char *arch_pp_name; - /* CPU identifier for the core we're compiling for (architecturally). */ - enum processor_type arch_core; /* The base architecture value. */ enum base_architecture base_arch; /* Bitmap encapsulating the isa_bits for the target environment. */ @@ -478,5 +476,59 @@ struct arm_build_target extern struct arm_build_target arm_active_target; +struct cpu_arch_extension +{ + /* Feature name. */ + const char *const name; + /* True if the option is negative (removes extensions). */ + bool remove; + /* True if the option is an alias for another option with identical effect; + the option will be ignored for canonicalization. */ + bool alias; + /* The modifier bits. */ + const enum isa_feature isa_bits[isa_num_bits]; +}; + +struct cpu_arch_option +{ + /* Name for this option. */ + const char *name; + /* List of feature extensions permitted. */ + const struct cpu_arch_extension *extensions; + /* Standard feature bits. */ + enum isa_feature isa_bits[isa_num_bits]; +}; + +struct arch_option +{ + /* Common option fields. */ + cpu_arch_option common; + /* Short string for this architecture. */ + const char *arch; + /* Base architecture, from which this specific architecture is derived. */ + enum base_architecture base_arch; + /* Default tune target (in the absence of any more specific data). */ + enum processor_type tune_id; +}; + +struct cpu_option +{ + /* Common option fields. */ + cpu_arch_option common; + /* Architecture upon which this CPU is based. */ + enum arch_type arch; +}; + +extern const arch_option all_architectures[]; +extern const cpu_option all_cores[]; + +const cpu_option *arm_parse_cpu_option_name (const cpu_option *, const char *, + const char *); +const arch_option *arm_parse_arch_option_name (const arch_option *, + const char *, const char *); +void arm_parse_option_features (sbitmap, const cpu_arch_option *, + const char *); + +void arm_initialize_isa (sbitmap, const enum isa_feature *); #endif /* ! GCC_ARM_PROTOS_H */ diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index cb45e097c90..0f50c64f4b1 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -434,31 +434,22 @@ EnumValue Enum(arm_arch) String(armv8-a) Value(26) EnumValue -Enum(arm_arch) String(armv8-a+crc) Value(27) +Enum(arm_arch) String(armv8.1-a) Value(27) EnumValue -Enum(arm_arch) String(armv8.1-a) Value(28) +Enum(arm_arch) String(armv8.2-a) Value(28) EnumValue -Enum(arm_arch) String(armv8.2-a) Value(29) +Enum(arm_arch) String(armv8-m.base) Value(29) EnumValue -Enum(arm_arch) String(armv8.2-a+fp16) Value(30) +Enum(arm_arch) String(armv8-m.main) Value(30) EnumValue -Enum(arm_arch) String(armv8-m.base) Value(31) +Enum(arm_arch) String(iwmmxt) Value(31) EnumValue -Enum(arm_arch) String(armv8-m.main) Value(32) - -EnumValue -Enum(arm_arch) String(armv8-m.main+dsp) Value(33) - -EnumValue -Enum(arm_arch) String(iwmmxt) Value(34) - -EnumValue -Enum(arm_arch) String(iwmmxt2) Value(35) +Enum(arm_arch) String(iwmmxt2) Value(32) Enum Name(arm_fpu) Type(enum fpu_type) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 259597d8890..f3b2715185b 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -65,6 +65,7 @@ #include "optabs-libfuncs.h" #include "gimplify.h" #include "gimple.h" +#include "selftest.h" /* This file should be included last. */ #include "target-def.h" @@ -233,6 +234,7 @@ static tree arm_build_builtin_va_list (void); static void arm_expand_builtin_va_start (tree, rtx); static tree arm_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *); static void arm_option_override (void); +static void arm_option_save (struct cl_target_option *, struct gcc_options *); static void arm_option_restore (struct gcc_options *, struct cl_target_option *); static void arm_override_options_after_change (void); @@ -413,6 +415,9 @@ static const struct attribute_spec arm_attribute_table[] = #undef TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE #define TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE arm_override_options_after_change +#undef TARGET_OPTION_SAVE +#define TARGET_OPTION_SAVE arm_option_save + #undef TARGET_OPTION_RESTORE #define TARGET_OPTION_RESTORE arm_option_restore @@ -770,7 +775,6 @@ static const struct attribute_spec arm_attribute_table[] = #undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS #define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2 -struct gcc_target targetm = TARGET_INITIALIZER; /* Obstack for minipool constant handling. */ static struct obstack minipool_obstack; @@ -971,18 +975,13 @@ int arm_regs_in_sequence[] = /* Initialization code. */ -struct processors +struct cpu_tune { - const char *const name; - enum processor_type core; + enum processor_type scheduler; unsigned int tune_flags; - const char *arch; - enum base_architecture base_arch; - enum isa_feature isa_bits[isa_num_bits]; - const struct tune_params *const tune; + const struct tune_params *tune; }; - #define ARM_PREFETCH_NOT_BENEFICIAL { 0, -1, -1 } #define ARM_PREFETCH_BENEFICIAL(num_slots,l1_size,l1_line_size) \ { \ @@ -2902,9 +2901,22 @@ arm_override_options_after_change (void) arm_override_options_after_change_1 (&global_options); } +/* Implement TARGET_OPTION_SAVE. */ static void -arm_option_restore (struct gcc_options *, struct cl_target_option *ptr) +arm_option_save (struct cl_target_option *ptr, struct gcc_options *opts) { + ptr->x_arm_arch_string = opts->x_arm_arch_string; + ptr->x_arm_cpu_string = opts->x_arm_cpu_string; + ptr->x_arm_tune_string = opts->x_arm_tune_string; +} + +/* Implement TARGET_OPTION_RESTORE. */ +static void +arm_option_restore (struct gcc_options *opts, struct cl_target_option *ptr) +{ + opts->x_arm_arch_string = ptr->x_arm_arch_string; + opts->x_arm_cpu_string = ptr->x_arm_cpu_string; + opts->x_arm_tune_string = ptr->x_arm_tune_string; arm_configure_build_target (&arm_active_target, ptr, &global_options_set, false); } @@ -3012,16 +3024,6 @@ arm_option_override_internal (struct gcc_options *opts, #endif } -/* Convert a static initializer array of feature bits to sbitmap - representation. */ -static void -arm_initialize_isa (sbitmap isa, const enum isa_feature *isa_bits) -{ - bitmap_clear (isa); - while (*isa_bits != isa_nobit) - bitmap_set_bit (isa, *(isa_bits++)); -} - static sbitmap isa_all_fpubits; static sbitmap isa_quirkbits; @@ -3034,86 +3036,117 @@ arm_configure_build_target (struct arm_build_target *target, struct gcc_options *opts_set, bool warn_compatible) { - const struct processors *arm_selected_tune = NULL; - const struct processors *arm_selected_arch = NULL; - const struct processors *arm_selected_cpu = NULL; - const struct arm_fpu_desc *arm_selected_fpu = NULL; + const cpu_option *arm_selected_tune = NULL; + const arch_option *arm_selected_arch = NULL; + const cpu_option *arm_selected_cpu = NULL; + const arm_fpu_desc *arm_selected_fpu = NULL; + const char *tune_opts = NULL; + const char *arch_opts = NULL; + const char *cpu_opts = NULL; bitmap_clear (target->isa); target->core_name = NULL; target->arch_name = NULL; - if (opts_set->x_arm_arch_option) - arm_selected_arch = &all_architectures[opts->x_arm_arch_option]; + if (opts_set->x_arm_arch_string) + { + arm_selected_arch = arm_parse_arch_option_name (all_architectures, + "-march", + opts->x_arm_arch_string); + arch_opts = strchr (opts->x_arm_arch_string, '+'); + } - if (opts_set->x_arm_cpu_option) + if (opts_set->x_arm_cpu_string) { - arm_selected_cpu = &all_cores[(int) opts->x_arm_cpu_option]; - arm_selected_tune = &all_cores[(int) opts->x_arm_cpu_option]; + arm_selected_cpu = arm_parse_cpu_option_name (all_cores, "-mcpu", + opts->x_arm_cpu_string); + cpu_opts = strchr (opts->x_arm_cpu_string, '+'); + arm_selected_tune = arm_selected_cpu; + /* If taking the tuning from -mcpu, we don't need to rescan the + options for tuning. */ } - if (opts_set->x_arm_tune_option) - arm_selected_tune = &all_cores[(int) opts->x_arm_tune_option]; + if (opts_set->x_arm_tune_string) + { + arm_selected_tune = arm_parse_cpu_option_name (all_cores, "-mtune", + opts->x_arm_tune_string); + tune_opts = strchr (opts->x_arm_tune_string, '+'); + } if (arm_selected_arch) { - arm_initialize_isa (target->isa, arm_selected_arch->isa_bits); + arm_initialize_isa (target->isa, arm_selected_arch->common.isa_bits); + arm_parse_option_features (target->isa, &arm_selected_arch->common, + arch_opts); if (arm_selected_cpu) { auto_sbitmap cpu_isa (isa_num_bits); + auto_sbitmap isa_delta (isa_num_bits); - arm_initialize_isa (cpu_isa, arm_selected_cpu->isa_bits); - bitmap_xor (cpu_isa, cpu_isa, target->isa); + arm_initialize_isa (cpu_isa, arm_selected_cpu->common.isa_bits); + arm_parse_option_features (cpu_isa, &arm_selected_cpu->common, + cpu_opts); + bitmap_xor (isa_delta, cpu_isa, target->isa); /* Ignore any bits that are quirk bits. */ - bitmap_and_compl (cpu_isa, cpu_isa, isa_quirkbits); + bitmap_and_compl (isa_delta, isa_delta, isa_quirkbits); /* Ignore (for now) any bits that might be set by -mfpu. */ - bitmap_and_compl (cpu_isa, cpu_isa, isa_all_fpubits); + bitmap_and_compl (isa_delta, isa_delta, isa_all_fpubits); - if (!bitmap_empty_p (cpu_isa)) + if (!bitmap_empty_p (isa_delta)) { if (warn_compatible) warning (0, "switch -mcpu=%s conflicts with -march=%s switch", - arm_selected_cpu->name, arm_selected_arch->name); + arm_selected_cpu->common.name, + arm_selected_arch->common.name); /* -march wins for code generation. -mcpu wins for default tuning. */ if (!arm_selected_tune) arm_selected_tune = arm_selected_cpu; - arm_selected_cpu = arm_selected_arch; - target->arch_name = arm_selected_arch->name; + arm_selected_cpu = all_cores + arm_selected_arch->tune_id; + target->arch_name = arm_selected_arch->common.name; } else { /* Architecture and CPU are essentially the same. Prefer the CPU setting. */ - arm_selected_arch = NULL; - target->core_name = arm_selected_cpu->name; + arm_selected_arch = all_architectures + arm_selected_cpu->arch; + target->core_name = arm_selected_cpu->common.name; + /* Copy the CPU's capabilities, so that we inherit the + appropriate extensions and quirks. */ + bitmap_copy (target->isa, cpu_isa); } } else { /* Pick a CPU based on the architecture. */ - arm_selected_cpu = arm_selected_arch; - target->arch_name = arm_selected_arch->name; + arm_selected_cpu = all_cores + arm_selected_arch->tune_id; + target->arch_name = arm_selected_arch->common.name; /* Note: target->core_name is left unset in this path. */ } } else if (arm_selected_cpu) { - target->core_name = arm_selected_cpu->name; - arm_initialize_isa (target->isa, arm_selected_cpu->isa_bits); + target->core_name = arm_selected_cpu->common.name; + arm_initialize_isa (target->isa, arm_selected_cpu->common.isa_bits); + arm_parse_option_features (target->isa, &arm_selected_cpu->common, + cpu_opts); + arm_selected_arch = all_architectures + arm_selected_cpu->arch; } - /* If the user did not specify a processor, choose one for them. */ + /* If the user did not specify a processor or architecture, choose + one for them. */ else { - const struct processors * sel; + const cpu_option *sel; auto_sbitmap sought_isa (isa_num_bits); bitmap_clear (sought_isa); auto_sbitmap default_isa (isa_num_bits); - arm_selected_cpu = &all_cores[TARGET_CPU_DEFAULT]; - gcc_assert (arm_selected_cpu->name); + arm_selected_cpu = arm_parse_cpu_option_name (all_cores, "default CPU", + TARGET_CPU_DEFAULT); + cpu_opts = strchr (TARGET_CPU_DEFAULT, '+'); + gcc_assert (arm_selected_cpu->common.name); /* RWE: All of the selection logic below (to the end of this 'if' clause) looks somewhat suspect. It appears to be mostly @@ -3122,7 +3155,9 @@ arm_configure_build_target (struct arm_build_target *target, user might be expecting). I think it should be removed once support for the pre-thumb era cores is removed. */ sel = arm_selected_cpu; - arm_initialize_isa (default_isa, sel->isa_bits); + arm_initialize_isa (default_isa, sel->common.isa_bits); + arm_parse_option_features (default_isa, &arm_selected_cpu->common, + cpu_opts); /* Now check to see if the user has specified any command line switches that require certain abilities from the cpu. */ @@ -3155,18 +3190,18 @@ arm_configure_build_target (struct arm_build_target *target, /* Try to locate a CPU type that supports all of the abilities of the default CPU, plus the extra abilities requested by the user. */ - for (sel = all_cores; sel->name != NULL; sel++) + for (sel = all_cores; sel->common.name != NULL; sel++) { - arm_initialize_isa (candidate_isa, sel->isa_bits); + arm_initialize_isa (candidate_isa, sel->common.isa_bits); /* An exact match? */ if (bitmap_equal_p (default_isa, candidate_isa)) break; } - if (sel->name == NULL) + if (sel->common.name == NULL) { unsigned current_bit_count = isa_num_bits; - const struct processors * best_fit = NULL; + const cpu_option *best_fit = NULL; /* Ideally we would like to issue an error message here saying that it was not possible to find a CPU compatible @@ -3180,9 +3215,9 @@ arm_configure_build_target (struct arm_build_target *target, command line options we scan the array again looking for a best match. The best match must have at least the capabilities of the perfect match. */ - for (sel = all_cores; sel->name != NULL; sel++) + for (sel = all_cores; sel->common.name != NULL; sel++) { - arm_initialize_isa (candidate_isa, sel->isa_bits); + arm_initialize_isa (candidate_isa, sel->common.isa_bits); if (bitmap_subset_p (default_isa, candidate_isa)) { @@ -3208,11 +3243,15 @@ arm_configure_build_target (struct arm_build_target *target, /* Now we know the CPU, we can finally initialize the target structure. */ - target->core_name = arm_selected_cpu->name; - arm_initialize_isa (target->isa, arm_selected_cpu->isa_bits); + target->core_name = arm_selected_cpu->common.name; + arm_initialize_isa (target->isa, arm_selected_cpu->common.isa_bits); + arm_parse_option_features (target->isa, &arm_selected_cpu->common, + cpu_opts); + arm_selected_arch = all_architectures + arm_selected_cpu->arch; } gcc_assert (arm_selected_cpu); + gcc_assert (arm_selected_arch); if (opts->x_arm_fpu_index != TARGET_FPU_auto) { @@ -3223,30 +3262,29 @@ arm_configure_build_target (struct arm_build_target *target, bitmap_and_compl (target->isa, target->isa, isa_all_fpubits); bitmap_ior (target->isa, target->isa, fpu_bits); } - else if (target->core_name == NULL) - /* To support this we need to be able to parse FPU feature options - from the architecture string. */ - sorry ("-mfpu=auto not currently supported without an explicit CPU."); - /* The selected cpu may be an architecture, so lookup tuning by core ID. */ if (!arm_selected_tune) - arm_selected_tune = &all_cores[arm_selected_cpu->core]; + arm_selected_tune = arm_selected_cpu; + else /* Validate the features passed to -mtune. */ + arm_parse_option_features (NULL, &arm_selected_tune->common, tune_opts); + + const cpu_tune *tune_data = &all_tunes[arm_selected_tune - all_cores]; /* Finish initializing the target structure. */ - target->arch_pp_name = arm_selected_cpu->arch; - target->base_arch = arm_selected_cpu->base_arch; - target->arch_core = arm_selected_cpu->core; + target->arch_pp_name = arm_selected_arch->arch; + target->base_arch = arm_selected_arch->base_arch; - target->tune_flags = arm_selected_tune->tune_flags; - target->tune = arm_selected_tune->tune; - target->tune_core = arm_selected_tune->core; + target->tune_flags = tune_data->tune_flags; + target->tune = tune_data->tune; + target->tune_core = tune_data->scheduler; } /* Fix up any incompatible options that the user has specified. */ static void arm_option_override (void) { - static const enum isa_feature fpu_bitlist[] = { ISA_ALL_FPU, isa_nobit }; + static const enum isa_feature fpu_bitlist[] + = { ISA_ALL_FPU_INTERNAL, isa_nobit }; static const enum isa_feature quirk_bitlist[] = { ISA_ALL_QUIRKS, isa_nobit}; cl_target_option opts; @@ -3260,17 +3298,10 @@ arm_option_override (void) if (!global_options_set.x_arm_fpu_index) { - const char *target_fpu_name; bool ok; int fpu_index; -#ifdef FPUTYPE_DEFAULT - target_fpu_name = FPUTYPE_DEFAULT; -#else - target_fpu_name = "vfp"; -#endif - - ok = opt_enum_arg_to_value (OPT_mfpu_, target_fpu_name, &fpu_index, + ok = opt_enum_arg_to_value (OPT_mfpu_, FPUTYPE_AUTO, &fpu_index, CL_TARGET); gcc_assert (ok); arm_fpu_index = (enum fpu_type) fpu_index; @@ -3411,8 +3442,7 @@ arm_option_override (void) { if (arm_abi == ARM_ABI_IWMMXT) arm_pcs_default = ARM_PCS_AAPCS_IWMMXT; - else if (arm_float_abi == ARM_FLOAT_ABI_HARD - && TARGET_HARD_FLOAT) + else if (TARGET_HARD_FLOAT_ABI) { arm_pcs_default = ARM_PCS_AAPCS_VFP; if (!bitmap_bit_p (arm_active_target.isa, isa_bit_VFPv2)) @@ -26105,6 +26135,41 @@ arm_print_tune_info (void) (int) current_tune->sched_autopref); } +/* Print .arch and .arch_extension directives corresponding to the + current architecture configuration. */ +static void +arm_print_asm_arch_directives () +{ + const arch_option *arch + = arm_parse_arch_option_name (all_architectures, "-march", + arm_active_target.arch_name); + auto_sbitmap opt_bits (isa_num_bits); + + gcc_assert (arch); + + asm_fprintf (asm_out_file, "\t.arch %s\n", arm_active_target.arch_name); + if (!arch->common.extensions) + return; + + for (const struct cpu_arch_extension *opt = arch->common.extensions; + opt->name != NULL; + opt++) + { + if (!opt->remove) + { + arm_initialize_isa (opt_bits, opt->isa_bits); + + /* If every feature bit of this option is set in the target + ISA specification, print out the option name. However, + don't print anything if all the bits are part of the + FPU specification. */ + if (bitmap_subset_p (opt_bits, arm_active_target.isa) + && !bitmap_subset_p (opt_bits, isa_all_fpubits)) + asm_fprintf (asm_out_file, "\t.arch_extension %s\n", opt->name); + } + } +} + static void arm_file_start (void) { @@ -26119,7 +26184,7 @@ arm_file_start (void) assembler would not need to know about all new CPU names as they are added. */ if (!arm_active_target.core_name) - { + { /* armv7ve doesn't support any extensions. */ if (strcmp (arm_active_target.arch_name, "armv7ve") == 0) { @@ -26132,24 +26197,8 @@ arm_file_start (void) asm_fprintf (asm_out_file, "\t.arch_extension mp\n"); } else - { - const char* pos = strchr (arm_active_target.arch_name, '+'); - if (pos) - { - char buf[32]; - gcc_assert (strlen (arm_active_target.arch_name) - <= sizeof (buf) / sizeof (*pos)); - strncpy (buf, arm_active_target.arch_name, - (pos - arm_active_target.arch_name) * sizeof (*pos)); - buf[pos - arm_active_target.arch_name] = '\0'; - asm_fprintf (asm_out_file, "\t.arch %s\n", buf); - asm_fprintf (asm_out_file, "\t.arch_extension %s\n", pos + 1); - } - else - asm_fprintf (asm_out_file, "\t.arch %s\n", - arm_active_target.arch_name); - } - } + arm_print_asm_arch_directives (); + } else if (strncmp (arm_active_target.core_name, "generic", 7) == 0) asm_fprintf (asm_out_file, "\t.arch %s\n", arm_active_target.core_name + 8); @@ -26173,7 +26222,7 @@ arm_file_start (void) } /* Some of these attributes only apply when the corresponding features - are used. However we don't have any easy way of figuring this out. + are used. However we don't have any easy way of figuring this out. Conservatively record the setting that would have been used. */ if (flag_rounding_math) @@ -30368,11 +30417,23 @@ arm_option_print (FILE *file, int indent, struct cl_target_option *ptr) fpu_name = (ptr->x_arm_fpu_index == TARGET_FPU_auto ? "auto" : all_fpus[ptr->x_arm_fpu_index].name); - fprintf (file, "%*sselected arch %s\n", indent, "", + fprintf (file, "%*sselected isa %s\n", indent, "", TARGET_THUMB2_P (flags) ? "thumb2" : TARGET_THUMB_P (flags) ? "thumb1" : "arm"); + if (ptr->x_arm_arch_string) + fprintf (file, "%*sselected architecture %s\n", indent, "", + ptr->x_arm_arch_string); + + if (ptr->x_arm_cpu_string) + fprintf (file, "%*sselected CPU %s\n", indent, "", + ptr->x_arm_cpu_string); + + if (ptr->x_arm_tune_string) + fprintf (file, "%*sselected tune %s\n", indent, "", + ptr->x_arm_tune_string); + fprintf (file, "%*sselected fpu %s\n", indent, "", fpu_name); } @@ -30635,7 +30696,7 @@ arm_identify_fpu_from_isa (sbitmap isa) if (bitmap_empty_p (fpubits)) return "softvfp"; - for (unsigned int i = 0; i < ARRAY_SIZE (all_fpus); i++) + for (unsigned int i = 0; i < TARGET_FPU_auto; i++) { arm_initialize_isa (cand_fpubits, all_fpus[i].isa_bits); if (bitmap_equal_p (fpubits, cand_fpubits)) @@ -31145,4 +31206,84 @@ arm_coproc_ldc_stc_legitimate_address (rtx op) } return false; } + +#if CHECKING_P +namespace selftest { + +/* Scan the static data tables generated by parsecpu.awk looking for + potential issues with the data. We primarily check for + inconsistencies in the option extensions at present (extensions + that duplicate others but aren't marked as aliases). Furthermore, + for correct canonicalization later options must never be a subset + of an earlier option. */ +static void +arm_test_cpu_arch_data (void) +{ + const arch_option *arch; + const cpu_option *cpu; + auto_sbitmap isa1 (isa_num_bits); + auto_sbitmap isa2 (isa_num_bits); + + for (arch = all_architectures; arch->common.name != NULL; ++arch) + { + const cpu_arch_extension *ext1, *ext2; + + if (arch->common.extensions == NULL) + continue; + + for (ext1 = arch->common.extensions; ext1->name != NULL; ++ext1) + { + if (ext1->alias) + continue; + + arm_initialize_isa (isa1, ext1->isa_bits); + for (ext2 = ext1 + 1; ext2->name != NULL; ++ext2) + { + if (ext2->alias || ext1->remove != ext2->remove) + continue; + + arm_initialize_isa (isa2, ext2->isa_bits); + ASSERT_TRUE (!bitmap_subset_p (isa2, isa1)); + } + } + } + + for (cpu = all_cores; cpu->common.name != NULL; ++cpu) + { + const cpu_arch_extension *ext1, *ext2; + + if (cpu->common.extensions == NULL) + continue; + + for (ext1 = cpu->common.extensions; ext1->name != NULL; ++ext1) + { + if (ext1->alias) + continue; + + arm_initialize_isa (isa1, ext1->isa_bits); + for (ext2 = ext1 + 1; ext2->name != NULL; ++ext2) + { + if (ext2->alias || ext1->remove != ext2->remove) + continue; + + arm_initialize_isa (isa2, ext2->isa_bits); + ASSERT_TRUE (!bitmap_subset_p (isa2, isa1)); + } + } + } +} + +static void +arm_run_selftests (void) +{ + arm_test_cpu_arch_data (); +} +} /* Namespace selftest. */ + +#undef TARGET_RUN_TARGET_SELFTESTS +#define TARGET_RUN_TARGET_SELFTESTS selftest::arm_run_selftests +#endif /* CHECKING_P */ + +struct gcc_target targetm = TARGET_INITIALIZER; + #include "gt-arm.h" diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index f9e4356756a..43d44778bdc 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -119,9 +119,14 @@ extern tree arm_fp16_type_node; #define TARGET_32BIT_P(flags) (TARGET_ARM_P (flags) || TARGET_THUMB2_P (flags)) /* Run-time Target Specification. */ -#define TARGET_SOFT_FLOAT (arm_float_abi == ARM_FLOAT_ABI_SOFT) /* Use hardware floating point instructions. */ -#define TARGET_HARD_FLOAT (arm_float_abi != ARM_FLOAT_ABI_SOFT) +#define TARGET_HARD_FLOAT (arm_float_abi != ARM_FLOAT_ABI_SOFT \ + && bitmap_bit_p (arm_active_target.isa, \ + isa_bit_VFPv2)) +#define TARGET_SOFT_FLOAT (!TARGET_HARD_FLOAT) +/* User has permitted use of FP instructions, if they exist for this + target. */ +#define TARGET_MAYBE_HARD_FLOAT (arm_float_abi != ARM_FLOAT_ABI_SOFT) /* Use hardware floating point calling convention. */ #define TARGET_HARD_FLOAT_ABI (arm_float_abi == ARM_FLOAT_ABI_HARD) #define TARGET_IWMMXT (arm_arch_iwmmxt) @@ -2215,46 +2220,55 @@ extern int making_const_table; (TARGET_NEON ? (TARGET_ARM_FP & (0xff ^ 0x08)) \ : 0) +/* Name of the automatic fpu-selection option. */ +#define FPUTYPE_AUTO "auto" + /* The maximum number of parallel loads or stores we support in an ldm/stm instruction. */ #define MAX_LDM_STM_OPS 4 -#define BIG_LITTLE_SPEC \ - " %{mcpu=*:-mcpu=%:rewrite_mcpu(%{mcpu=*:%*})}" - extern const char *arm_rewrite_mcpu (int argc, const char **argv); -#define BIG_LITTLE_CPU_SPEC_FUNCTIONS \ - { "rewrite_mcpu", arm_rewrite_mcpu }, +extern const char *arm_rewrite_march (int argc, const char **argv); +#define ASM_CPU_SPEC_FUNCTIONS \ + { "rewrite_mcpu", arm_rewrite_mcpu }, \ + { "rewrite_march", arm_rewrite_march }, -#define ASM_CPU_SPEC \ - " %{mcpu=generic-*:-march=%*;" \ - " :%{march=*:-march=%*}}" \ - BIG_LITTLE_SPEC +#define ASM_CPU_SPEC \ + " %{mcpu=generic-*:-march=%:rewrite_march(%{mcpu=generic-*:%*});" \ + " march=*:-march=%:rewrite_march(%{march=*:%*});" \ + " mcpu=*:-mcpu=%:rewrite_mcpu(%{mcpu=*:%*})" \ + " }" extern const char *arm_target_thumb_only (int argc, const char **argv); -#define TARGET_MODE_SPEC_FUNCTIONS \ +#define TARGET_MODE_SPEC_FUNCTIONS \ { "target_mode_check", arm_target_thumb_only }, /* -mcpu=native handling only makes sense with compiler running on an ARM chip. */ #if defined(__arm__) extern const char *host_detect_local_cpu (int argc, const char **argv); -# define EXTRA_SPEC_FUNCTIONS \ - { "local_cpu_detect", host_detect_local_cpu }, \ - BIG_LITTLE_CPU_SPEC_FUNCTIONS \ - TARGET_MODE_SPEC_FUNCTIONS - -# define MCPU_MTUNE_NATIVE_SPECS \ - " %{march=native:%<march=native %:local_cpu_detect(arch)}" \ - " %{mcpu=native:%<mcpu=native %:local_cpu_detect(cpu)}" \ +# define MCPU_MTUNE_NATIVE_FUNCTIONS \ + { "local_cpu_detect", host_detect_local_cpu }, +# define MCPU_MTUNE_NATIVE_SPECS \ + " %{march=native:%<march=native %:local_cpu_detect(arch)}" \ + " %{mcpu=native:%<mcpu=native %:local_cpu_detect(cpu)}" \ " %{mtune=native:%<mtune=native %:local_cpu_detect(tune)}" #else +# define MCPU_MTUNE_NATIVE_FUNCTIONS # define MCPU_MTUNE_NATIVE_SPECS "" -# define EXTRA_SPEC_FUNCTIONS \ - BIG_LITTLE_CPU_SPEC_FUNCTIONS \ - TARGET_MODE_SPEC_FUNCTIONS #endif +const char *arm_canon_arch_option (int argc, const char **argv); + +#define CANON_ARCH_SPEC_FUNCTION \ + { "canon_arch", arm_canon_arch_option }, + +# define EXTRA_SPEC_FUNCTIONS \ + MCPU_MTUNE_NATIVE_FUNCTIONS \ + ASM_CPU_SPEC_FUNCTIONS \ + CANON_ARCH_SPEC_FUNCTION \ + TARGET_MODE_SPEC_FUNCTIONS + /* Automatically add -mthumb for Thumb-only targets if mode isn't specified via the configuration option --with-mode or via the command line. The function target_mode_check is called to do the check with either: @@ -2262,9 +2276,21 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); - an array of -mcpu values if any is given; - an empty array. */ #define TARGET_MODE_SPECS \ - " %{!marm:%{!mthumb:%:target_mode_check(%{march=*:%*;mcpu=*:%*;:})}}" + " %{!marm:%{!mthumb:%:target_mode_check(%{march=*:arch %*;mcpu=*:cpu %*;:})}}" + +/* Generate a canonical string to represent the architecture selected. */ +#define ARCH_CANONICAL_SPECS \ + " -march=%:canon_arch(%{mcpu=*: cpu %*} " \ + " %{march=*: arch %*} " \ + " %{mfpu=*: fpu %*} " \ + " %{mfloat-abi=*: abi %*}" \ + " %<march=*) " + +#define DRIVER_SELF_SPECS \ + MCPU_MTUNE_NATIVE_SPECS \ + TARGET_MODE_SPECS \ + ARCH_CANONICAL_SPECS -#define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS TARGET_MODE_SPECS #define TARGET_SUPPORTS_WIDE_INT 1 /* For switching between functions with different target attributes. */ diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 9f8116ddf25..dad52576872 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -21,6 +21,15 @@ HeaderInclude config/arm/arm-opts.h +TargetSave +const char *x_arm_arch_string + +TargetSave +const char *x_arm_cpu_string + +TargetSave +const char *x_arm_tune_string + Enum Name(tls_type) Type(enum arm_tls_type) TLS dialect to use: @@ -73,7 +82,7 @@ mapcs-stack-check Target Report Mask(APCS_STACK) Undocumented march= -Target RejectNegative ToLower Joined Enum(arm_arch) Var(arm_arch_option) Save +Target RejectNegative ToLower Joined Var(arm_arch_string) Specify the name of the target architecture. ; Other arm_arch values are loaded from arm-tables.opt @@ -82,7 +91,7 @@ EnumValue Enum(arm_arch) String(native) Value(-1) DriverOnly marm -Target Report RejectNegative InverseMask(THUMB) +Target Report RejectNegative Negative(mthumb) InverseMask(THUMB) Generate code in 32 bit ARM state. mbig-endian @@ -98,7 +107,7 @@ Target Report Mask(CALLER_INTERWORKING) Thumb: Assume function pointers may go to non-Thumb aware code. mcpu= -Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_cpu_option) Init(TARGET_CPU_arm_none) Save +Target RejectNegative ToLower Joined Var(arm_cpu_string) Specify the name of the target CPU. mfloat-abi= @@ -186,7 +195,7 @@ Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFA Specify the minimum bit alignment of structures. mthumb -Target Report RejectNegative Mask(THUMB) Save +Target Report RejectNegative Negative(marm) Mask(THUMB) Save Generate code for Thumb state. mthumb-interwork @@ -223,7 +232,7 @@ Target Report Mask(TPCS_LEAF_FRAME) Thumb: Generate (leaf) stack frames even if not needed. mtune= -Target RejectNegative ToLower Joined Enum(processor_type) Var(arm_tune_option) Init(TARGET_CPU_arm_none) Save +Target RejectNegative ToLower Joined Var(arm_tune_string) Tune code for the given processor. mprint-tune-info diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h index f9f9a9248d4..d38863a3cd3 100644 --- a/gcc/config/arm/bpabi.h +++ b/gcc/config/arm/bpabi.h @@ -33,10 +33,6 @@ #undef ARM_UNWIND_INFO #define ARM_UNWIND_INFO 1 -/* Section 4.1 of the AAPCS requires the use of VFP format. */ -#undef FPUTYPE_DEFAULT -#define FPUTYPE_DEFAULT "vfp" - /* TARGET_BIG_ENDIAN_DEFAULT is set in config.gcc for big endian configurations. */ #if TARGET_BIG_ENDIAN_DEFAULT diff --git a/gcc/config/arm/cortex-a53.md b/gcc/config/arm/cortex-a53.md index b7e0c9257f7..3c613375756 100644 --- a/gcc/config/arm/cortex-a53.md +++ b/gcc/config/arm/cortex-a53.md @@ -389,7 +389,7 @@ neon_sat_mul_b_long, neon_sat_mul_h_long,\ neon_sat_mul_s_long, neon_sat_mul_h_scalar_q,\ neon_sat_mul_s_scalar_q, neon_sat_mul_h_scalar_long,\ - neon_sat_mul_s_scalar_long, neon_mla_b_q,\ + neon_sat_mul_s_scalar_long, crypto_pmull, neon_mla_b_q,\ neon_mla_h_q, neon_mla_s_q, neon_mla_b_long,\ neon_mla_h_long, neon_mla_s_long,\ neon_mla_h_scalar_q, neon_mla_s_scalar_q,\ @@ -511,19 +511,19 @@ ;; Floating-point arithmetic. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(define_insn_reservation "cortex_a53_fpalu" 5 +(define_insn_reservation "cortex_a53_fpalu" 4 (and (eq_attr "tune" "cortexa53") (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fmov, f_cvt, fcmps, fcmpd, fccmps, fccmpd, fcsel, f_rints, f_rintd, f_minmaxs, f_minmaxd")) "cortex_a53_slot_any,cortex_a53_fp_alu") -(define_insn_reservation "cortex_a53_fconst" 3 +(define_insn_reservation "cortex_a53_fconst" 2 (and (eq_attr "tune" "cortexa53") (eq_attr "type" "fconsts,fconstd")) "cortex_a53_slot_any,cortex_a53_fp_alu") -(define_insn_reservation "cortex_a53_fpmul" 5 +(define_insn_reservation "cortex_a53_fpmul" 4 (and (eq_attr "tune" "cortexa53") (eq_attr "type" "fmuls,fmuld")) "cortex_a53_slot_any,cortex_a53_fp_mul") @@ -574,7 +574,7 @@ ;; Floating-point load/store. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -(define_insn_reservation "cortex_a53_f_load_64" 4 +(define_insn_reservation "cortex_a53_f_load_64" 3 (and (eq_attr "tune" "cortexa53") (ior (eq_attr "type" "f_loads,f_loadd") (eq_attr "cortex_a53_advsimd_type" @@ -582,7 +582,7 @@ "cortex_a53_slot_any+cortex_a53_ls_agen, cortex_a53_load") -(define_insn_reservation "cortex_a53_f_load_many" 5 +(define_insn_reservation "cortex_a53_f_load_many" 4 (and (eq_attr "tune" "cortexa53") (eq_attr "cortex_a53_advsimd_type" "advsimd_load_128,advsimd_load_lots")) @@ -616,22 +616,22 @@ ;; or a 128-bit operation in which case we require in our model that we ;; issue from slot 0. -(define_insn_reservation "cortex_a53_advsimd_alu" 5 +(define_insn_reservation "cortex_a53_advsimd_alu" 4 (and (eq_attr "tune" "cortexa53") (eq_attr "cortex_a53_advsimd_type" "advsimd_alu")) "cortex_a53_slot_any,cortex_a53_fp_alu") -(define_insn_reservation "cortex_a53_advsimd_alu_q" 5 +(define_insn_reservation "cortex_a53_advsimd_alu_q" 4 (and (eq_attr "tune" "cortexa53") (eq_attr "cortex_a53_advsimd_type" "advsimd_alu_q")) "cortex_a53_slot0,cortex_a53_fp_alu_q") -(define_insn_reservation "cortex_a53_advsimd_mul" 5 +(define_insn_reservation "cortex_a53_advsimd_mul" 4 (and (eq_attr "tune" "cortexa53") (eq_attr "cortex_a53_advsimd_type" "advsimd_mul")) "cortex_a53_slot_any,cortex_a53_fp_mul") -(define_insn_reservation "cortex_a53_advsimd_mul_q" 5 +(define_insn_reservation "cortex_a53_advsimd_mul_q" 4 (and (eq_attr "tune" "cortexa53") (eq_attr "cortex_a53_advsimd_type" "advsimd_mul_q")) "cortex_a53_slot0,cortex_a53_fp_mul_q") @@ -710,20 +710,18 @@ ;; multiply-accumulate operations as a bypass reducing the latency ;; of producing instructions to near zero. -(define_bypass 1 "cortex_a53_fp*, +(define_bypass 1 "cortex_a53_fpalu, + cortex_a53_fpmul, cortex_a53_r2f, + cortex_a53_r2f_cvt, + cortex_a53_fconst, cortex_a53_f_load*" "cortex_a53_fpmac" "aarch_accumulator_forwarding") -;; Model a bypass from the result of an FP operation to a use. - -(define_bypass 4 "cortex_a53_fpalu, - cortex_a53_fpmul" - "cortex_a53_fpalu, - cortex_a53_fpmul, - cortex_a53_fpmac, - cortex_a53_advsimd_div*") +(define_bypass 4 "cortex_a53_fpmac" + "cortex_a53_fpmac" + "aarch_accumulator_forwarding") ;; We want AESE and AESMC to end up consecutive to one another. diff --git a/gcc/config/arm/cortex-a57.md b/gcc/config/arm/cortex-a57.md index fd307582812..ebf4a49a066 100644 --- a/gcc/config/arm/cortex-a57.md +++ b/gcc/config/arm/cortex-a57.md @@ -76,7 +76,7 @@ neon_mul_h_scalar_long, neon_mul_s_scalar_long,\ neon_sat_mul_b_long, neon_sat_mul_h_long,\ neon_sat_mul_s_long, neon_sat_mul_h_scalar_long,\ - neon_sat_mul_s_scalar_long") + neon_sat_mul_s_scalar_long, crypto_pmull") (const_string "neon_multiply") (eq_attr "type" "neon_mul_b_q, neon_mul_h_q, neon_mul_s_q,\ neon_mul_h_scalar_q, neon_mul_s_scalar_q,\ diff --git a/gcc/config/arm/crypto.md b/gcc/config/arm/crypto.md index 46b0715932b..a5e558b0c28 100644 --- a/gcc/config/arm/crypto.md +++ b/gcc/config/arm/crypto.md @@ -81,7 +81,7 @@ UNSPEC_VMULLP64))] "TARGET_CRYPTO" "vmull.p64\\t%q0, %P1, %P2" - [(set_attr "type" "neon_mul_d_long")] + [(set_attr "type" "crypto_pmull")] ) (define_insn "crypto_<crypto_pattern>" diff --git a/gcc/config/arm/elf.h b/gcc/config/arm/elf.h index f119b87116f..85fdee61e6b 100644 --- a/gcc/config/arm/elf.h +++ b/gcc/config/arm/elf.h @@ -64,7 +64,7 @@ %{mapcs-*:-mapcs-%*} \ %(subtarget_asm_float_spec) \ %{mthumb-interwork:-mthumb-interwork} \ -%{mfloat-abi=*} %{mfpu=*} \ +%{mfloat-abi=*} %{!mfpu=auto: %{mfpu=*}} \ %(subtarget_extra_asm_spec)" #endif @@ -107,10 +107,6 @@ #define TARGET_DEFAULT (MASK_APCS_FRAME) #endif -#ifndef MULTILIB_DEFAULTS -#define MULTILIB_DEFAULTS \ - { "marm", "mlittle-endian", "mfloat-abi=soft", "mno-thumb-interwork", "fno-leading-underscore" } -#endif #define TARGET_ASM_FILE_START_FILE_DIRECTIVE true diff --git a/gcc/config/arm/exynos-m1.md b/gcc/config/arm/exynos-m1.md index 5d397cc50eb..b54d4c82ef0 100644 --- a/gcc/config/arm/exynos-m1.md +++ b/gcc/config/arm/exynos-m1.md @@ -78,7 +78,7 @@ neon_sat_mul_s_scalar, neon_sat_mul_s_scalar_q,\ neon_sat_mul_b_long, neon_sat_mul_h_long,\ neon_sat_mul_s_long, neon_sat_mul_h_scalar_long,\ - neon_sat_mul_s_scalar_long") + neon_sat_mul_s_scalar_long, crypto_pmull") (const_string "neon_multiply") (eq_attr "type" "neon_mla_b, neon_mla_h, neon_mla_s,\ diff --git a/gcc/config/arm/linux-elf.h b/gcc/config/arm/linux-elf.h index 3d62367ae68..cd4fc3b347b 100644 --- a/gcc/config/arm/linux-elf.h +++ b/gcc/config/arm/linux-elf.h @@ -83,9 +83,6 @@ } \ while (0) -#undef FPUTYPE_DEFAULT -#define FPUTYPE_DEFAULT "vfp" - /* Call the function profiler with a given profile label. */ #undef ARM_FUNCTION_PROFILER #define ARM_FUNCTION_PROFILER(STREAM, LABELNO) \ diff --git a/gcc/config/arm/netbsd-elf.h b/gcc/config/arm/netbsd-elf.h index 8811af7ecca..02ff3163c6c 100644 --- a/gcc/config/arm/netbsd-elf.h +++ b/gcc/config/arm/netbsd-elf.h @@ -153,7 +153,3 @@ do \ (void) sysarch (0, &s); \ } \ while (0) - -#undef FPUTYPE_DEFAULT -#define FPUTYPE_DEFAULT "vfp" - diff --git a/gcc/config/arm/parsecpu.awk b/gcc/config/arm/parsecpu.awk index dac11a009ee..b6e50932ddc 100644 --- a/gcc/config/arm/parsecpu.awk +++ b/gcc/config/arm/parsecpu.awk @@ -102,6 +102,17 @@ function gen_headers () { print " TARGET_CPU_arm_none" print "};\n" + print "enum arch_type" + print "{" + + narchs = split (arch_list, archs) + + for (n = 1; n <= narchs; n++) { + print " TARGET_ARCH_"arch_cnames[archs[n]]"," + } + print " TARGET_ARCH_arm_none" + print "};\n" + print "enum fpu_type" print "{" @@ -117,14 +128,14 @@ function gen_headers () { function gen_data () { boilerplate("C") - print "static const struct processors all_cores[] =" + print "static const cpu_tune all_tunes[] =" print "{" ncpus = split (cpu_list, cpus) for (n = 1; n <= ncpus; n++) { - print " {" - print " \"" cpus[n] "\"," + print " { /* " cpus[n] ". */" + # scheduler if (cpus[n] in cpu_tune_for) { if (! (cpu_tune_for[cpus[n]] in cpu_cnames)) { fatal("unknown \"tune for\" target " cpu_tune_for[cpus[n]] \ @@ -134,59 +145,170 @@ function gen_data () { } else { print " TARGET_CPU_" cpu_cnames[cpus[n]] "," } + # tune_flags if (cpus[n] in cpu_tune_flags) { print " (" cpu_tune_flags[cpus[n]] ")," } else print " 0," - if (! (cpu_arch[cpus[n]] in arch_isa)) { - fatal("unknown arch " cpu_arch[cpus[n]] " for cpu " cpus[n]) - } - print " \"" arch_base[cpu_arch[cpus[n]]] "\", BASE_ARCH_" \ - arch_base[cpu_arch[cpus[n]]] "," - print " {" - print " " arch_isa[cpu_arch[cpus[n]]] "," - if (cpus[n] in cpu_fpu) print " " fpu_isa[cpu_fpu[cpus[n]]] "," - if (cpus[n] in cpu_isa) print " " cpu_isa[cpus[n]] "," - print " isa_nobit" - print " }," + # tune print " &arm_" cpu_cost[cpus[n]] "_tune" print " }," } + print " {TARGET_CPU_arm_none, 0, NULL}" + print "};" + +} - print " {NULL, TARGET_CPU_arm_none, 0, NULL, BASE_ARCH_0," \ - " {isa_nobit}, NULL}" - print "};\n" +function gen_comm_data () { + boilerplate("C") + + ncpus = split (cpu_list, cpus) + + for (n = 1; n <= ncpus; n++) { + if (cpus[n] in cpu_opts) { + print "static const cpu_arch_extension cpu_opttab_" \ + cpu_cnames[cpus[n]] "[] = {" + nopts = split (cpu_opts[cpus[n]], opts) + for (opt = 1; opt <= nopts; opt++) { + print " {" + print " \"" opts[opt] "\", " \ + cpu_opt_remove[cpus[n],opts[opt]] ", false," + print " { " cpu_opt_isa[cpus[n],opts[opt]] ", isa_nobit }" + print " }," + } + if (cpus[n] in cpu_optaliases) { + naliases = split (cpu_optaliases[cpus[n]], aliases) + for (alias = 1; alias <= naliases; alias++) { + if (! ((cpus[n], \ + cpu_opt_alias[cpus[n],aliases[alias]]) in \ + cpu_opt_isa)) { + fatal("Alias " aliases[alias] " target not defined " \ + "for CPU " cpus[n]) + } + equiv=cpu_opt_alias[cpus[n],aliases[alias]] + print " {" + print " \"" aliases[alias] "\", " \ + cpu_opt_remove[cpus[n],equiv] ", true, " + print " { " cpu_opt_isa[cpus[n],equiv] ", isa_nobit }" + print " }," + } + } + print " { NULL, false, false, {isa_nobit}}" + print "};\n" + } + } - print "static const struct processors all_architectures[] =" + print "const cpu_option all_cores[] =" print "{" + for (n = 1; n <= ncpus; n++) { + print " {" + print " {" + # common.name + print " \"" cpus[n] "\"," + # common.extensions + if (cpus[n] in cpu_opts) { + print " cpu_opttab_" cpu_cnames[cpus[n]] "," + } else print " NULL," + # common.isa_bits + nfeats = split (cpu_arch[cpus[n]], feats, "+") + if (! (feats[1] in arch_isa)) { + fatal("unknown arch " feats[1] " for cpu " cpus[n]) + } + print " {" + print " " arch_isa[feats[1]] "," + for (m = 2; m <= nfeats; m++) { + if (! ((feats[1], feats[m]) in arch_opt_isa)) { + fatal("unknown feature " feats[m] " for architecture " feats[1]) + } + if (arch_opt_remove[feats[1],feats[m]] == "true") { + fatal("cannot remove features from architecture specs") + } + print " " arch_opt_isa[feats[1],feats[m]] "," + } + if (cpus[n] in cpu_fpu) print " " fpu_isa[cpu_fpu[cpus[n]]] "," + if (cpus[n] in cpu_isa) print " " cpu_isa[cpus[n]] "," + print " isa_nobit" + print " }" + print " }," + # arch + print " TARGET_ARCH_" arch_cnames[feats[1]] + print " }," + } + + print " {{NULL, NULL, {isa_nobit}}, TARGET_ARCH_arm_none}" + print "};" + narchs = split (arch_list, archs) for (n = 1; n <= narchs; n++) { + if (archs[n] in arch_opts) { + print "static const struct cpu_arch_extension arch_opttab_" \ + arch_cnames[archs[n]] "[] = {" + nopts = split (arch_opts[archs[n]], opts) + for (opt = 1; opt <= nopts; opt++) { + print " {" + print " \"" opts[opt] "\", " \ + arch_opt_remove[archs[n],opts[opt]] ", false," + print " { " arch_opt_isa[archs[n],opts[opt]] ", isa_nobit }" + print " }," + } + if (archs[n] in arch_optaliases) { + naliases = split (arch_optaliases[archs[n]], aliases) + for (alias = 1; alias <= naliases; alias++) { + if (! ((archs[n], \ + arch_opt_alias[archs[n],aliases[alias]]) in \ + arch_opt_isa)) { + fatal("Alias " aliases[alias] " target not defined " \ + "for architecture " archs[n]) + } + equiv=arch_opt_alias[archs[n],aliases[alias]] + print " {" + print " \"" aliases[alias] "\", " \ + arch_opt_remove[archs[n],equiv] ", true, " + print " { " arch_opt_isa[archs[n],equiv] ", isa_nobit }" + print " }," + } + } + print " { NULL, false, false, {isa_nobit}}" + print "};\n" + } else if (archs[n] in arch_optaliases) { + fatal("Architecture " archs[n] " has option aliases but no options") + } + } + + print "const arch_option all_architectures[] =" + print "{" + + for (n = 1; n <= narchs; n++) { print " {" if (! (arch_tune_for[archs[n]] in cpu_cnames)) { fatal("unknown \"tune for\" target " arch_tune_for[archs[n]] \ " for architecture " archs[n]) } - print " \"" archs[n] \ - "\", TARGET_CPU_" cpu_cnames[arch_tune_for[archs[n]]] "," - if (archs[n] in arch_tune_flags) { - print " (" arch_tune_flags[archs[n]] ")," - } else print " 0," - print " \"" arch_base[archs[n]] "\", BASE_ARCH_" \ - arch_base[archs[n]] "," + # common.name + print " \"" archs[n] "\"," + # common.extensions + if (archs[n] in arch_opts) { + print " arch_opttab_" arch_cnames[archs[n]] "," + } else print " NULL," + # common.isa_bits print " {" print " " arch_isa[archs[n]] "," print " isa_nobit" print " }," - print " NULL" + # arch, base_arch + print " \"" arch_base[archs[n]] "\", BASE_ARCH_" \ + arch_base[archs[n]] "," + # tune_id + print " TARGET_CPU_" cpu_cnames[arch_tune_for[archs[n]]] "," print " }," } - print " {NULL, TARGET_CPU_arm_none, 0, NULL, BASE_ARCH_0," \ - " {isa_nobit}, NULL}" + print " {{NULL, NULL, {isa_nobit}}," + print " NULL, BASE_ARCH_0, TARGET_CPU_arm_none}" print "};\n" - print "const struct arm_fpu_desc all_fpus[] =" + print "const arm_fpu_desc all_fpus[] =" print "{" nfpus = split (fpu_list, fpus) @@ -204,44 +326,6 @@ function gen_data () { print "};" } -function gen_comm_data () { - boilerplate("C") - - print "static const struct arm_arch_core_flag arm_arch_core_flags[] =" - print "{" - - ncpus = split (cpu_list, cpus) - - for (n = 1; n <= ncpus; n++) { - print " {" - print " \"" cpus[n] "\"," - if (! (cpu_arch[cpus[n]] in arch_isa)) { - fatal("unknown arch " cpu_arch[cpus[n]] " for cpu " cpus[n]) - } - print " {" - print " " arch_isa[cpu_arch[cpus[n]]] "," - if (cpus[n] in cpu_fpu) print " " fpu_isa[cpu_fpu[cpus[n]]] "," - if (cpus[n] in cpu_isa) print " " cpu_isa[cpus[n]] "," - print " isa_nobit" - print " }," - print " }," - } - - narchs = split (arch_list, archs) - - for (n = 1; n <= narchs; n++) { - print " {" - print " \"" archs[n] "\"," - print " {" - print " " arch_isa[archs[n]] "," - print " isa_nobit" - print " }," - print " }," - } - - print "};\n" -} - function gen_md () { boilerplate("md") @@ -309,9 +393,19 @@ function gen_opt () { } function check_cpu (name) { - if (name in cpu_cnames) { - print cpu_cnames[name] - } else print "error" + exts = split (name, extensions, "+") + + if (! extensions[1] in cpu_cnames) { + return "error" + } + + for (n = 2; n <= exts; n++) { + if (!((extensions[1], extensions[n]) in cpu_opt_remove) \ + && !((extensions[1], extensions[n]) in cpu_optaliases)) { + return "error" + } + } + return name } function check_fpu (name) { @@ -321,9 +415,19 @@ function check_fpu (name) { } function check_arch (name) { - if (name in arch_isa) { - print name - } else print "error" + exts = split (name, extensions, "+") + + if (! extensions[1] in arch_isa) { + return "error" + } + + for (n = 2; n <= exts; n++) { + if (!((extensions[1], extensions[n]) in arch_opt_remove) \ + && !((extensions[1], extensions[n]) in arch_optaliases)) { + return "error" + } + } + return name } BEGIN { @@ -382,6 +486,8 @@ BEGIN { fatal("arch definition lacks an \"isa\" statement") } arch_list = arch_list " " arch_name + arch_cnames[arch_name] = arch_name + gsub(/[-+.]/, "_", arch_cnames[arch_name]) arch_name = "" parse_ok = 1 } @@ -453,6 +559,45 @@ BEGIN { parse_ok = 1 } +/^[ ]*option / { + name=$2 + if ($3 == "add") { + remove = "false" + } else if ($3 == "remove") { + remove = "true" + } else fatal("syntax: option <name> add|remove isa-list") + flags="" + flag_count = NF + for (n = 4; n <= flag_count; n++) { + if (n == 4) { + flags = isa_pfx($n) + } else flags = flags "," isa_pfx($n) + } + if (cpu_name != "") { + cpu_opts[cpu_name] = cpu_opts[cpu_name] " " name + cpu_opt_remove[cpu_name,name] = remove + cpu_opt_isa[cpu_name,name] = flags + } else if (arch_name != "") { + arch_opts[arch_name] = arch_opts[arch_name] " " name + arch_opt_remove[arch_name,name] = remove + arch_opt_isa[arch_name,name] = flags + } else fatal("\"option\" outside of cpu or arch block") + parse_ok = 1 +} + +/^[ ]*optalias / { + name=$2 + alias=$3 + if (cpu_name != "") { + cpu_optaliases[cpu_name] = cpu_optaliases[cpu_name] " " name + cpu_opt_alias[cpu_name,name] = alias + } else if (arch_name != "") { + arch_optaliases[arch_name] = arch_optaliases[arch_name] " " name + arch_opt_alias[arch_name,name] = alias + } else fatal("\"optalias\" outside of cpu or arch block") + parse_ok = 1 +} + /^[ ]*costs / { if (cpu_name == "") fatal("\"costs\" outside of cpu block") cpu_cost[cpu_name] = $2 @@ -489,10 +634,10 @@ END { gen_opt() } else if (cmd ~ /^chk(cpu|tune) /) { split (cmd, target) - check_cpu(target[2]) + print check_cpu(target[2]) } else if (cmd ~ /^chkarch /) { split (cmd, target) - check_arch(target[2]) + print check_arch(target[2]) } else if (cmd ~ /^chkfpu /) { split (cmd, target) check_fpu(target[2]) diff --git a/gcc/config/arm/t-aprofile b/gcc/config/arm/t-aprofile index 10e2d34062d..0a36d05911d 100644 --- a/gcc/config/arm/t-aprofile +++ b/gcc/config/arm/t-aprofile @@ -26,143 +26,83 @@ # Arch and FPU variants to build libraries with -MULTI_ARCH_OPTS_A = march=armv7-a/march=armv7ve/march=armv8-a -MULTI_ARCH_DIRS_A = v7-a v7ve v8-a +MULTI_ARCH_OPTS_A = march=armv7-a/march=armv7-a+fp/march=armv7-a+simd/march=armv7ve+simd/march=armv8-a/march=armv8-a+simd +MULTI_ARCH_DIRS_A = v7-a v7-a+fp v7-a+simd v7ve+simd v8-a v8-a+simd -MULTI_FPU_OPTS_A = mfpu=vfpv3-d16/mfpu=neon/mfpu=vfpv4-d16/mfpu=neon-vfpv4/mfpu=neon-fp-armv8 -MULTI_FPU_DIRS_A = fpv3 simdv1 fpv4 simdvfpv4 simdv8 +# ARMv7-A - build nofp, fp-d16 and SIMD variants +MULTILIB_REQUIRED += mthumb/march=armv7-a/mfloat-abi=soft +MULTILIB_REQUIRED += mthumb/march=armv7-a+fp/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7-a+fp/mfloat-abi=softfp +MULTILIB_REQUIRED += mthumb/march=armv7-a+simd/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7-a+simd/mfloat-abi=softfp -# Option combinations to build library with +# ARMv7VE - only build a SIMD (+VFPv4) variant. +MULTILIB_REQUIRED += mthumb/march=armv7ve+simd/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7ve+simd/mfloat-abi=softfp -# Default CPU/Arch (ARM is implicitly included because it uses the default -# multilib) -MULTILIB_REQUIRED += mthumb +# ARMv8-A - build nofp and SIMD variants. +MULTILIB_REQUIRED += mthumb/march=armv8-a/mfloat-abi=soft +MULTILIB_REQUIRED += mthumb/march=armv8-a+simd/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv8-a+simd/mfloat-abi=softfp -# ARMv7-A -MULTILIB_REQUIRED += *march=armv7-a -MULTILIB_REQUIRED += *march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=* -MULTILIB_REQUIRED += *march=armv7-a/mfpu=neon/mfloat-abi=* +# Matches -# ARMv7VE -MULTILIB_REQUIRED += *march=armv7ve -MULTILIB_REQUIRED += *march=armv7ve/mfpu=vfpv4-d16/mfloat-abi=* -MULTILIB_REQUIRED += *march=armv7ve/mfpu=neon-vfpv4/mfloat-abi=* +# Arch Matches +# Map all v7-a FP variants to vfpv3-d16 (+fp) +MULTILIB_MATCHES += $(foreach ARCH, $(filter-out +fp, $(v7_a_nosimd_variants)), \ + march?armv7-a+fp=march?armv7-a$(ARCH)) -# ARMv8-A -MULTILIB_REQUIRED += *march=armv8-a -MULTILIB_REQUIRED += *march=armv8-a/mfpu=neon-fp-armv8/mfloat-abi=* +# Map all v7-a SIMD variants to neon-vfpv3 (+simd) +MULTILIB_MATCHES += $(foreach ARCH, $(filter-out +simd, $(v7_a_simd_variants)), \ + march?armv7-a+simd=march?armv7-a$(ARCH)) +# Neither FP nor SIMD: map v7ve to v7-a +MULTILIB_MATCHES += march?armv7-a=march?armv7ve -# Matches +# ARMv7ve FP-only variants: map down to v7-a+fp +MULTILIB_MATCHES += $(foreach ARCH, $(v7ve_nosimd_variants), \ + march?armv7-a+fp=march?armv7ve$(ARCH)) -# CPU Matches -MULTILIB_MATCHES += march?armv7-a=mcpu?marvell-pj4 -MULTILIB_MATCHES += march?armv7-a=mcpu?generic-armv7-a -MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a8 -MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a9 -MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a5 -MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a7 -MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a15 -MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a12 -MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a17 -MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a15.cortex-a7 -MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a17.cortex-a7 -MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a32 -MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a35 -MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a53 -MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57 -MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57.cortex-a53 -MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a72 -MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a72.cortex-a53 -MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a73 -MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a73.cortex-a35 -MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a73.cortex-a53 -MULTILIB_MATCHES += march?armv8-a=mcpu?exynos-m1 -MULTILIB_MATCHES += march?armv8-a=mcpu?xgene1 +# ARMv7ve with SIMD, but SIMD is less capable than the default - map down to v7-a+simd +MULTILIB_MATCHES += $(foreach ARCH, $(v7ve_vfpv3_simd_variants), \ + march?armv7-a+simd=march?armv7ve$(ARCH)) -# Arch Matches -MULTILIB_MATCHES += march?armv8-a=march?armv8-a+crc -MULTILIB_MATCHES += march?armv8-a=march?armv8.1-a -MULTILIB_MATCHES += march?armv8-a=march?armv8.1-a+crc -MULTILIB_MATCHES += march?armv8-a=march?armv8.2-a -MULTILIB_MATCHES += march?armv8-a=march?armv8.2-a+fp16 - -# FPU matches -MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3 -MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-fp16 -MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-d16-fp16 -MULTILIB_MATCHES += mfpu?neon=mfpu?neon-fp16 -MULTILIB_MATCHES += mfpu?vfpv4-d16=mfpu?vfpv4 -MULTILIB_MATCHES += mfpu?vfpv4-d16=mfpu?fpv5-d16 -MULTILIB_MATCHES += mfpu?vfpv4-d16=mfpu?fp-armv8 -MULTILIB_MATCHES += mfpu?neon-fp-armv8=mfpu?crypto-neon-fp-armv8 -MULTILIB_MATCHES += mfpu?vfp=mfpu?vfpv2 -MULTILIB_MATCHES += mfpu?neon=mfpu?neon-vfpv3 - - -# Map all requests for vfpv3 with a later CPU to vfpv3-d16 v7-a. -# So if new CPUs are added above at the newer architecture levels, -# do something to map them below here. -# We take the approach of mapping down to v7-a regardless of what -# the fp option is if the integer architecture brings things down. -# This applies to any similar combination at the v7ve and v8-a arch -# levels. - -MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.hard -MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.softfp -MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.hard -MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.softfp -MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.hard -MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.softfp - - -MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7ve/mfpu.neon/mfloat-abi.hard -MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7ve/mfpu.neon/mfloat-abi.softfp -MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv8-a/mfpu.neon/mfloat-abi.hard -MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv8-a/mfpu.neon/mfloat-abi.softfp -MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.hard -MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.softfp -MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.hard -MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.softfp - - -MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard -MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp - - -MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard -MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp -MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.hard -MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.softfp - - - -# And again for mthumb. - -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.softfp -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.softfp -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.softfp - - -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.neon/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.neon/mfloat-abi.softfp -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.neon/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.neon/mfloat-abi.softfp -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.softfp -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.softfp - - -MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp - - -MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp -MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.softfp +# ARMv8 without SIMD: map down to base architecture +MULTILIB_MATCHES += $(foreach ARCH, $(v8_a_nosimd_variants), \ + march?armv8-a=march?armv8-a$(ARCH)) + +# ARMv8 with SIMD: map down to base arch + simd +MULTILIB_MATCHES += march?armv8-a+simd=march?armv8-a+crc+simd \ + $(foreach ARCH, $(filter-out +simd, $(v8_a_simd_variants)), \ + march?armv8-a+simd=march?armv8-a$(ARCH) \ + march?armv8-a+simd=march?armv8-a+crc$(ARCH)) + +# Baseline v8.1-a: map down to baseline v8-a +MULTILIB_MATCHES += march?armv8-a=march?armv8.1-a + +# Map all v8.1-a SIMD variants to v8-a+simd +MULTILIB_MATCHES += $(foreach ARCH, $(v8_1_a_simd_variants), \ + march?armv8-a+simd=march?armv8.1-a$(ARCH)) + +# Baseline v8.2-a: map down to baseline v8-a +MULTILIB_MATCHES += march?armv8-a=march?armv8.2-a + +# Map all v8.2-a SIMD variants to v8-a+simd +MULTILIB_MATCHES += $(foreach ARCH, $(v8_2_a_simd_variants), \ + march?armv8-a+simd=march?armv8.2-a$(ARCH)) + +# Use Thumb libraries for everything. + +MULTILIB_REUSE += mthumb/march.armv7-a/mfloat-abi.soft=marm/march.armv7-a/mfloat-abi.soft + +MULTILIB_REUSE += mthumb/march.armv8-a/mfloat-abi.soft=marm/march.armv8-a/mfloat-abi.soft + +MULTILIB_REUSE += $(foreach ABI, hard softfp, \ + $(foreach ARCH, armv7-a+fp armv7-a+simd armv7ve+simd armv8-a+simd, \ + mthumb/march.$(ARCH)/mfloat-abi.$(ABI)=marm/march.$(ARCH)/mfloat-abi.$(ABI))) + +# Softfp but no FP, use the soft-float libraries. +MULTILIB_REUSE += $(foreach MODE, arm thumb, \ + $(foreach ARCH, armv7-a armv8-a, \ + mthumb/march.$(ARCH)/mfloat-abi.soft=m$(MODE)/march.$(ARCH)/mfloat-abi.softfp)) diff --git a/gcc/config/arm/t-arm-elf b/gcc/config/arm/t-arm-elf index f3ad3f7b246..13378410117 100644 --- a/gcc/config/arm/t-arm-elf +++ b/gcc/config/arm/t-arm-elf @@ -16,75 +16,110 @@ # along with GCC; see the file COPYING3. If not see # <http://www.gnu.org/licenses/>. -MULTILIB_OPTIONS = marm/mthumb -MULTILIB_DIRNAMES = arm thumb +# Build a very basic set of libraries that should cater for most cases. + +# Single-precision floating-point is NOT supported; we don't build a +# suitable library for that. Use the rm-profile config in that case. + +# PART 1 - Useful groups of options + +dp_fpus := vfp vfpv2 vfpv3 vfpv3-fp16 vfpv3-d16 vfpv3-d16-fp16 \ + neon neon-vfpv3 neon-fp16 vfpv4 neon-vfpv4 vfpv4-d16 \ + fpv5-d16 fp-armv8 neon-fp-armv8 crypto-neon-fp-armv8 \ + vfp3 + +sp_fpus := vfpv3xd vfpv3xd-fp16 fpv4-sp-d16 fpv5-sp-d16 + +v7a_fps := vfpv3 vfpv3-fp16 vfpv4 simd neon-fp16 neon-vfpv4 +v7ve_fps := vfpv3-d16 vfpv3 vfpv3-d16-fp16 vfpv3-fp16 vfpv4 neon \ + neon-fp16 simd + +# Not all these permutations exist for all architecture variants, but +# it seems to work ok. +v8_fps := simd fp16 crypto fp16+crypto + +# We don't do anything special with these. Pre-v4t probably doesn't work. +all_early_nofp := armv2 armv2a armv3 armv3m armv4 armv4t armv5 armv5t + +all_early_arch := armv5e armv5tej armv6 armv6j armv6k armv6z armv6kz \ + armv6zk armv6t2 iwmmxt iwmmxt2 + +all_v7_a_r := armv7-a armv7ve armv7-r + +all_v8_archs := armv8-a armv8-a+crc armv8.1-a armv8.2-a + +# No floating point variants, require thumb1 softfp +all_nofp_t := armv6-m armv6s-m armv8-m.base + +all_nofp_t2 := armv7-m + +all_sp_only := armv7e-m armv8-m.main + +MULTILIB_OPTIONS = +MULTILIB_DIRNAMES = MULTILIB_EXCEPTIONS = MULTILIB_MATCHES = +MULTILIB_REUSE = + +# PART 2 - multilib build rules + +MULTILIB_OPTIONS += marm/mthumb +MULTILIB_DIRNAMES += arm thumb + +MULTILIB_OPTIONS += mfpu=auto +MULTILIB_DIRNAMES += autofp + +MULTILIB_OPTIONS += march=armv5te+fp/march=armv7+fp +MULTILIB_DIRNAMES += v5te v7 + +MULTILIB_OPTIONS += mfloat-abi=hard +MULTILIB_DIRNAMES += fpu + +# Build a total of 4 library variants (base options plus the following): +MULTILIB_REQUIRED += mthumb +MULTILIB_REQUIRED += marm/mfpu=auto/march=armv5te+fp/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/mfpu=auto/march=armv7+fp/mfloat-abi=hard + +# PART 3 - Match rules + +# Map all supported FPUs onto mfpu=auto +MULTILIB_MATCHES += $(foreach FPU, $(dp_fpus), \ + mfpu?auto=mfpu?$(FPU)) + +MULTILIB_MATCHES += march?armv5te+fp=march?armv5te + +MULTILIB_MATCHES += $(foreach ARCH, $(all_early_arch), \ + march?armv5te+fp=march?$(ARCH) \ + march?armv5te+fp=march?$(ARCH)+fp) + +MULTILIB_MATCHES += march?armv7+fp=march?armv7 + +MULTILIB_MATCHES += $(foreach FPARCH, $(v7a_fps), \ + march?armv7+fp=march?armv7-a+$(FPARCH)) + +MULTILIB_MATCHES += $(foreach FPARCH, $(v7ve_fps), \ + march?armv7+fp=march?armv7ve+$(FPARCH)) + +MULTILIB_MATCHES += $(foreach ARCH, $(all_v7_a_r), \ + march?armv7+fp=march?$(ARCH) \ + march?armv7+fp=march?$(ARCH)+fp) + +MULTILIB_MATCHES += $(foreach ARCH, $(all_v8_archs), \ + march?armv7+fp=march?$(ARCH) \ + $(foreach FPARCH, $(v8_fps), \ + march?armv7+fp=march?$(ARCH)+$(FPARCH))) + +MULTILIB_MATCHES += $(foreach ARCH, armv7e-m armv8-m.mainline, \ + march?armv7+fp=march?$(ARCH)+fp.dp) + +# PART 4 - Reuse rules -#MULTILIB_OPTIONS += mcpu=fa526/mcpu=fa626/mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te -#MULTILIB_DIRNAMES += fa526 fa626 fa606te fa626te fmp626 fa726te -#MULTILIB_EXCEPTIONS += *mthumb*/*mcpu=fa526 *mthumb*/*mcpu=fa626 - -#MULTILIB_OPTIONS += march=armv7 -#MULTILIB_DIRNAMES += thumb2 -#MULTILIB_EXCEPTIONS += march=armv7* marm/*march=armv7* -#MULTILIB_MATCHES += march?armv7=march?armv7-a -#MULTILIB_MATCHES += march?armv7=march?armv7-r -#MULTILIB_MATCHES += march?armv7=march?armv7-m -#MULTILIB_MATCHES += march?armv7=mcpu?cortex-a8 -#MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4 -#MULTILIB_MATCHES += march?armv7=mcpu?cortex-m3 - -# Not quite true. We can support hard-vfp calling in Thumb2, but how do we -# express that here? Also, we really need architecture v5e or later -# (mcrr etc). -MULTILIB_OPTIONS += mfloat-abi=hard -MULTILIB_DIRNAMES += fpu -MULTILIB_EXCEPTIONS += *mthumb/*mfloat-abi=hard* -#MULTILIB_EXCEPTIONS += *mcpu=fa526/*mfloat-abi=hard* -#MULTILIB_EXCEPTIONS += *mcpu=fa626/*mfloat-abi=hard* - -# MULTILIB_OPTIONS += mcpu=ep9312 -# MULTILIB_DIRNAMES += ep9312 -# MULTILIB_EXCEPTIONS += *mthumb/*mcpu=ep9312* -# -# MULTILIB_OPTIONS += mlittle-endian/mbig-endian -# MULTILIB_DIRNAMES += le be -# MULTILIB_MATCHES += mbig-endian=mbe mlittle-endian=mle -# -# MULTILIB_OPTIONS += mfloat-abi=hard/mfloat-abi=soft -# MULTILIB_DIRNAMES += fpu soft -# MULTILIB_EXCEPTIONS += *mthumb/*mfloat-abi=hard* -# -# MULTILIB_OPTIONS += mno-thumb-interwork/mthumb-interwork -# MULTILIB_DIRNAMES += normal interwork -# -# MULTILIB_OPTIONS += fno-leading-underscore/fleading-underscore -# MULTILIB_DIRNAMES += elf under -# -# MULTILIB_OPTIONS += mcpu=arm7 -# MULTILIB_DIRNAMES += nofmult -# MULTILIB_EXCEPTIONS += *mthumb*/*mcpu=arm7* -# # Note: the multilib_exceptions matches both -mthumb and -# # -mthumb-interwork -# # -# # We have to match all the arm cpu variants which do not have the -# # multiply instruction and treat them as if the user had specified -# # -mcpu=arm7. Note that in the following the ? is interpreted as -# # an = for the purposes of matching command line options. -# # FIXME: There ought to be a better way to do this. -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7d -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7di -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm70 -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm700 -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm700i -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm710 -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm710c -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7100 -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7500 -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm7500fe -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm6 -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm60 -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm600 -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm610 -# MULTILIB_MATCHES += mcpu?arm7=mcpu?arm620 +MULTILIB_REUSE += mthumb=mthumb/mfpu.auto +MULTILIB_REUSE += mthumb=mthumb/mfpu.auto/march.armv5te+fp +MULTILIB_REUSE += mthumb=mthumb/march.armv5te+fp +MULTILIB_REUSE += marm/mfpu.auto/march.armv5te+fp/mfloat-abi.hard=marm/march.armv5te+fp/mfloat-abi.hard +MULTILIB_REUSE += marm/mfpu.auto/march.armv5te+fp/mfloat-abi.hard=march.armv5te+fp/mfloat-abi.hard +MULTILIB_REUSE += marm/mfpu.auto/march.armv5te+fp/mfloat-abi.hard=mfpu.auto/march.armv5te+fp/mfloat-abi.hard +MULTILIB_REUSE += mthumb/mfpu.auto/march.armv7+fp/mfloat-abi.hard=mthumb/march.armv7+fp/mfloat-abi.hard +MULTILIB_REUSE += mthumb/mfpu.auto/march.armv7+fp/mfloat-abi.hard=mfpu.auto/march.armv7+fp/mfloat-abi.hard +MULTILIB_REUSE += mthumb/mfpu.auto/march.armv7+fp/mfloat-abi.hard=march.armv7+fp/mfloat-abi.hard diff --git a/gcc/config/arm/t-fuchsia b/gcc/config/arm/t-fuchsia new file mode 100644 index 00000000000..18fc5181f62 --- /dev/null +++ b/gcc/config/arm/t-fuchsia @@ -0,0 +1,33 @@ +# Copyright (C) 2017 Free Software Foundation, Inc. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + +# Reset all the multilib variables. +MULTILIB_OPTIONS = +MULTILIB_DIRNAMES = +MULTILIB_EXCEPTIONS = +MULTILIB_REUSE = +MULTILIB_MATCHES = +MULTILIB_REQUIRED = + +# For compatibility with gcc-7 we build the following multilibs +MULTILIB_OPTIONS += marm/mthumb +MULTILIB_DIRNAMES += arm thumb + +MULTILIB_OPTIONS += mfloat-abi=hard +MULTILIB_DIRNAMES += fpu +MULTILIB_EXCEPTIONS += *mthumb/*mfloat-abi=hard* diff --git a/gcc/config/arm/t-linux-eabi b/gcc/config/arm/t-linux-eabi index 117c0eba948..c11af7a92de 100644 --- a/gcc/config/arm/t-linux-eabi +++ b/gcc/config/arm/t-linux-eabi @@ -22,6 +22,10 @@ # MULTILIB_DEFAULTS in linux-elf.h. MULTILIB_OPTIONS = MULTILIB_DIRNAMES = +MULTILIB_EXCEPTIONS = +MULTILIB_REUSE = +MULTILIB_MATCHES = +MULTILIB_REQUIRED = #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te diff --git a/gcc/config/arm/t-multilib b/gcc/config/arm/t-multilib index 642e7317655..ec4b76dbc8f 100644 --- a/gcc/config/arm/t-multilib +++ b/gcc/config/arm/t-multilib @@ -29,6 +29,7 @@ MULTILIB_DIRNAMES = MULTILIB_EXCEPTIONS = MULTILIB_MATCHES = MULTILIB_REUSE = +MULTILIB_REQUIRED = comma := , tm_multilib_list := $(subst $(comma), ,$(TM_MULTILIB_CONFIG)) @@ -36,6 +37,40 @@ tm_multilib_list := $(subst $(comma), ,$(TM_MULTILIB_CONFIG)) HAS_APROFILE := $(filter aprofile,$(tm_multilib_list)) HAS_RMPROFILE := $(filter rmprofile,$(tm_multilib_list)) +# Produce the combinatorial list of extensions. Where there are +# multiple permutations for a combination, the ordering is the +# selected by the forward ordering of the original list. This matches +# the canonical ordering generated by the canonicalizer in the driver. +# +# For example, +# $(call all_feat_combs, a b) +# will produce +# +a +a+b +b +# but will not include +# +b+a +# The rule is recursive and can be called with any (reasonable) list of +# extensions. +all_feat_combs = +$(firstword $(1)) \ + $(if $(wordlist 2, $(words $(1)), $(1)), \ + $(foreach OPT, \ + $(call all_feat_combs, \ + $(wordlist 2, $(words $(1)), $(1))), \ + +$(firstword $(1))$(OPT) $(OPT)),) + +# Variables used. +all_early_arch := armv5e armv5tej armv6 armv6j armv6k armv6z armv6kz \ + armv6zk armv6t2 iwmmxt iwmmxt2 +v7_a_nosimd_variants := +fp +vfpv3 +vfpv3-d16-fp16 +vfpv3-fp16 +vfpv4-d16 +vfpv4 +v7_a_simd_variants := +simd +neon-fp16 +neon-vfpv4 +v7ve_nosimd_variants := +vfpv3-d16 +vfpv3 +vfpv3-d16-fp16 +vfpv3-fp16 +fp +vfpv4 +v7ve_vfpv3_simd_variants := +neon +neon-fp16 +v7ve_vfpv4_simd_variants := +simd +v8_a_nosimd_variants := +crc +v8_a_simd_variants := $(call all_feat_combs, simd crypto) +v8_1_a_simd_variants := $(call all_feat_combs, simd crypto) +v8_2_a_simd_variants := $(call all_feat_combs, simd fp16 crypto) + + ifneq (,$(HAS_APROFILE)) include $(srcdir)/config/arm/t-aprofile endif @@ -45,25 +80,80 @@ endif SEP := $(and $(HAS_APROFILE),$(HAS_RMPROFILE),/) -# We have the following hierachy: -# ISA: A32 (.) or T16/T32 (thumb) -# Architecture: ARMv6-M (v6-m), ARMv7-M (v7-m), ARMv7E-M (v7e-m), -# ARMv7 (v7-ar), ARMv7-A (v7-a), ARMv7VE (v7ve), -# ARMv8-M Baseline (v8-m.base), ARMv8-M Mainline (v8-m.main) -# or ARMv8-A (v8-a). -# FPU: VFPv3-D16 (fpv3), NEONv1 (simdv1), FPV4-SP-D16 (fpv4-sp), -# VFPv4-D16 (fpv4), NEON-VFPV4 (simdvfpv4), FPV5-SP-D16 (fpv5-sp), -# VFPv5-D16 (fpv5), NEON for ARMv8 (simdv8), or None (.). -# Float-abi: Soft (.), softfp (softfp), or hard (hard). +MULTILIB_OPTIONS += marm/mthumb +MULTILIB_DIRNAMES += arm thumb + +MULTILIB_OPTIONS += march=armv5te+fp/march=armv7/march=armv7+fp/$(MULTI_ARCH_OPTS_A)$(SEP)$(MULTI_ARCH_OPTS_RM) +MULTILIB_DIRNAMES += v5te v7 v7+fp $(MULTI_ARCH_DIRS_A) $(MULTI_ARCH_DIRS_RM) + +MULTILIB_OPTIONS += mfloat-abi=soft/mfloat-abi=softfp/mfloat-abi=hard +MULTILIB_DIRNAMES += nofp softfp hard + +MULTILIB_REQUIRED += mthumb/mfloat-abi=soft +MULTILIB_REQUIRED += marm/march=armv5te+fp/mfloat-abi=softfp +MULTILIB_REQUIRED += marm/march=armv5te+fp/mfloat-abi=hard + +MULTILIB_REQUIRED += mthumb/march=armv7/mfloat-abi=soft +MULTILIB_REQUIRED += mthumb/march=armv7+fp/mfloat-abi=softfp +MULTILIB_REQUIRED += mthumb/march=armv7+fp/mfloat-abi=hard + +# Map v7-r down onto common v7 code. +MULTILIB_MATCHES += march?armv7=march?armv7-r +MULTILIB_MATCHES += march?armv7=march?armv7-r+idiv +MULTILIB_MATCHES += march?armv7+fp=march?armv7-r+fp +MULTILIB_MATCHES += march?armv7+fp=march?armv7-r+fp+idiv + +MULTILIB_MATCHES += $(foreach ARCH, $(all_early_arch), \ + march?armv5te+fp=march?$(ARCH)+fp) + +ifeq (,$(HAS_APROFILE)) +# Map all v7-a +MULTILIB_MATCHES += march?armv7=march?armv7-a +MULTILIB_MATCHES += $(foreach ARCH, $(v7_a_nosimd_variants) $(v7_a_simd_variants), \ + march?armv7+fp=march?armv7-a$(ARCH)) + +MULTILIB_MATCHES += march?armv7=march?armv7ve + +# ARMv7ve FP/SIMD variants: map down to v7+fp +MULTILIB_MATCHES += $(foreach ARCH, $(v7ve_nosimd_variants) $(v7ve_vfpv3_simd_variants) $(v7ve_vfpv4_simd_variants), \ + march?armv7+fp=march?armv7ve$(ARCH)) + +# ARMv8 +MULTILIB_MATCHES += march?armv7=march?armv8-a +MULTILIB_MATCHES += $(foreach ARCH, $(v8_a_nosimd_variants), \ + march?armv7=march?armv8-a$(ARCH)) + +# ARMv8 with SIMD +MULTILIB_MATCHES += march?armv7+fp=march?armv8-a+crc+simd \ + $(foreach ARCH, $(v8_a_simd_variants), \ + march?armv7+fp=march?armv8-a$(ARCH) \ + march?armv7+fp=march?armv8-a+crc$(ARCH)) + +# Baseline v8.1-a +MULTILIB_MATCHES += march?armv7=march?armv8.1-a + +# Map all v8.1-a SIMD variants +MULTILIB_MATCHES += $(foreach ARCH, $(v8_1_a_simd_variants), \ + march?armv7+fp=march?armv8.1-a$(ARCH)) + +# Baseline v8.2-a: map down to baseline v8-a +MULTILIB_MATCHES += march?armv7=march?armv8.2-a + +# Map all v8.2-a SIMD variants +MULTILIB_MATCHES += $(foreach ARCH, $(v8_2_a_simd_variants), \ + march?armv7+fp=march?armv8.2-a$(ARCH)) + +# Use Thumb libraries for everything. -MULTILIB_OPTIONS += mthumb -MULTILIB_DIRNAMES += thumb +MULTILIB_REUSE += mthumb/march.armv7/mfloat-abi.soft=marm/march.armv7/mfloat-abi.soft -MULTILIB_OPTIONS += $(MULTI_ARCH_OPTS_A)$(SEP)$(MULTI_ARCH_OPTS_RM) -MULTILIB_DIRNAMES += $(MULTI_ARCH_DIRS_A) $(MULTI_ARCH_DIRS_RM) +MULTILIB_REUSE += $(foreach ABI, hard softfp, \ + $(foreach ARCH, armv7+fp, \ + mthumb/march.$(ARCH)/mfloat-abi.$(ABI)=marm/march.$(ARCH)/mfloat-abi.$(ABI))) -MULTILIB_OPTIONS += $(MULTI_FPU_OPTS_A)$(SEP)$(MULTI_FPU_OPTS_RM) -MULTILIB_DIRNAMES += $(MULTI_FPU_DIRS_A) $(MULTI_FPU_DIRS_RM) +# Softfp but no FP, use the soft-float libraries. +MULTILIB_REUSE += $(foreach MODE, arm thumb, \ + $(foreach ARCH, armv7, \ + mthumb/march.$(ARCH)/mfloat-abi.soft=m$(MODE)/march.$(ARCH)/mfloat-abi.softfp)) -MULTILIB_OPTIONS += mfloat-abi=softfp/mfloat-abi=hard -MULTILIB_DIRNAMES += softfp hard +endif # Not APROFILE.
\ No newline at end of file diff --git a/gcc/config/arm/t-phoenix b/gcc/config/arm/t-phoenix index dea52570f63..4930ba87158 100644 --- a/gcc/config/arm/t-phoenix +++ b/gcc/config/arm/t-phoenix @@ -16,14 +16,16 @@ # along with GCC; see the file COPYING3. If not see # <http://www.gnu.org/licenses/>. -MULTILIB_OPTIONS = marm/mthumb -MULTILIB_DIRNAMES = arm thumb -MULTILIB_EXCEPTIONS = -MULTILIB_MATCHES = +MULTILIB_OPTIONS = marm/mthumb +MULTILIB_DIRNAMES = arm thumb +MULTILIB_EXCEPTIONS = +MULTILIB_MATCHES = +MULTILIB_REUSE = +MULTILIB_REQUIRED = -MULTILIB_OPTIONS += mfloat-abi=hard -MULTILIB_DIRNAMES += fpu -MULTILIB_MATCHES += mfloat-abi?hard=mhard-float +MULTILIB_OPTIONS += mfloat-abi=hard +MULTILIB_DIRNAMES += fpu +MULTILIB_MATCHES += mfloat-abi?hard=mhard-float -MULTILIB_OPTIONS += mno-thumb-interwork/mthumb-interwork -MULTILIB_DIRNAMES += normal interwork +MULTILIB_OPTIONS += mno-thumb-interwork/mthumb-interwork +MULTILIB_DIRNAMES += normal interwork diff --git a/gcc/config/arm/t-rmprofile b/gcc/config/arm/t-rmprofile index ee869b761f7..1ad8eac3b34 100644 --- a/gcc/config/arm/t-rmprofile +++ b/gcc/config/arm/t-rmprofile @@ -27,130 +27,42 @@ # Arch and FPU variants to build libraries with -MULTI_ARCH_OPTS_RM = march=armv6s-m/march=armv7-m/march=armv7e-m/march=armv7/march=armv8-m.base/march=armv8-m.main -MULTI_ARCH_DIRS_RM = v6-m v7-m v7e-m v7-ar v8-m.base v8-m.main +MULTI_ARCH_OPTS_RM = march=armv6s-m/march=armv7-m/march=armv7e-m/march=armv7e-m+fp/march=armv7e-m+fp.dp/march=armv8-m.base/march=armv8-m.main/march=armv8-m.main+fp/march=armv8-m.main+fp.dp +MULTI_ARCH_DIRS_RM = v6-m v7-m v7e-m v7e-m+fp v7e-m+dp v8-m.base v8-m.main v8-m.main+fp v8-m.main+dp -MULTI_FPU_OPTS_RM = mfpu=vfpv3-d16/mfpu=fpv4-sp-d16/mfpu=fpv5-sp-d16/mfpu=fpv5-d16 -MULTI_FPU_DIRS_RM = fpv3 fpv4-sp fpv5-sp fpv5 +# Base M-profile (no fp) +MULTILIB_REQUIRED += mthumb/march=armv6s-m/mfloat-abi=soft +MULTILIB_REQUIRED += mthumb/march=armv7-m/mfloat-abi=soft +MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfloat-abi=soft +MULTILIB_REQUIRED += mthumb/march=armv8-m.base/mfloat-abi=soft +MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfloat-abi=soft +# ARMv7e-M with FP (single and double precision variants) +MULTILIB_REQUIRED += mthumb/march=armv7e-m+fp/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7e-m+fp/mfloat-abi=softfp +MULTILIB_REQUIRED += mthumb/march=armv7e-m+fp.dp/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7e-m+fp.dp/mfloat-abi=softfp -# Option combinations to build library with +# ARMv8-M with FP (single and double precision variants) +MULTILIB_REQUIRED += mthumb/march=armv8-m.main+fp/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv8-m.main+fp/mfloat-abi=softfp +MULTILIB_REQUIRED += mthumb/march=armv8-m.main+fp.dp/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv8-m.main+fp.dp/mfloat-abi=softfp -# Default CPU/Arch -MULTILIB_REQUIRED += mthumb -MULTILIB_REQUIRED += mfloat-abi=hard -# ARMv6-M -MULTILIB_REQUIRED += mthumb/march=armv6s-m - -# ARMv8-M Baseline -MULTILIB_REQUIRED += mthumb/march=armv8-m.base - -# ARMv7-M -MULTILIB_REQUIRED += mthumb/march=armv7-m - -# ARMv7E-M -MULTILIB_REQUIRED += mthumb/march=armv7e-m -MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv4-sp-d16/mfloat-abi=softfp -MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-d16/mfloat-abi=softfp -MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-d16/mfloat-abi=hard -MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-sp-d16/mfloat-abi=softfp -MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-sp-d16/mfloat-abi=hard - -# ARMv8-M Mainline -MULTILIB_REQUIRED += mthumb/march=armv8-m.main -MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-d16/mfloat-abi=softfp -MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-d16/mfloat-abi=hard -MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-sp-d16/mfloat-abi=softfp -MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-sp-d16/mfloat-abi=hard - -# ARMv7-R as well as ARMv7-A and ARMv8-A if aprofile was not specified -MULTILIB_REQUIRED += mthumb/march=armv7 -MULTILIB_REQUIRED += mthumb/march=armv7/mfpu=vfpv3-d16/mfloat-abi=softfp -MULTILIB_REQUIRED += mthumb/march=armv7/mfpu=vfpv3-d16/mfloat-abi=hard - - -# Matches - -# CPU Matches -MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0 -MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0.small-multiply -MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0plus -MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0plus.small-multiply -MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m1 -MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m1.small-multiply -MULTILIB_MATCHES += march?armv7-m=mcpu?cortex-m3 -MULTILIB_MATCHES += march?armv7e-m=mcpu?cortex-m4 -MULTILIB_MATCHES += march?armv7e-m=mcpu?cortex-m7 -MULTILIB_MATCHES += march?armv8-m.base=mcpu?cortex-m23 -MULTILIB_MATCHES += march?armv8-m.main=mcpu?cortex-m33 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4f -MULTILIB_MATCHES += march?armv7=mcpu?cortex-r5 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-r7 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-r8 -MULTILIB_MATCHES += march?armv7=mcpu?marvell-pj4 -MULTILIB_MATCHES += march?armv7=mcpu?generic-armv7-a -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a8 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a9 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a5 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a7 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a15 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a12 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a17 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a15.cortex-a7 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a17.cortex-a7 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a32 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a35 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a53 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a57 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a57.cortex-a53 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a72 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a72.cortex-a53 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a73 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a73.cortex-a35 -MULTILIB_MATCHES += march?armv7=mcpu?cortex-a73.cortex-a53 -MULTILIB_MATCHES += march?armv7=mcpu?exynos-m1 -MULTILIB_MATCHES += march?armv7=mcpu?xgene1 # Arch Matches -MULTILIB_MATCHES += march?armv6s-m=march?armv6-m -MULTILIB_MATCHES += march?armv8-m.main=march?armv8-m.main+dsp -MULTILIB_MATCHES += march?armv7=march?armv7-r -ifeq (,$(HAS_APROFILE)) -MULTILIB_MATCHES += march?armv7=march?armv7-a -MULTILIB_MATCHES += march?armv7=march?armv7ve -MULTILIB_MATCHES += march?armv7=march?armv8-a -MULTILIB_MATCHES += march?armv7=march?armv8-a+crc -MULTILIB_MATCHES += march?armv7=march?armv8.1-a -MULTILIB_MATCHES += march?armv7=march?armv8.1-a+crc -MULTILIB_MATCHES += march?armv7=march?armv8.2-a -MULTILIB_MATCHES += march?armv7=march?armv8.2-a+fp16 -endif +MULTILIB_MATCHES += march?armv6s-m=march?armv6-m + +# Map all v8-m.main+dsp FP variants down the the variant without DSP. +MULTILIB_MATCHES += march?armv8-m.main=march?armv8-m.main+dsp \ + $(foreach FP, +fp +fp.dp, \ + march?armv8-m.main$(FP)=march?armv8-m.main+dsp$(FP)) -# FPU matches -ifeq (,$(HAS_APROFILE)) -MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3 -MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-fp16 -MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-d16-fp16 -MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon -MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon-fp16 -MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv4 -MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv4-d16 -MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon-vfpv4 -MULTILIB_MATCHES += mfpu?fpv5-d16=mfpu?fp-armv8 -MULTILIB_MATCHES += mfpu?fpv5-d16=mfpu?neon-fp-armv8 -MULTILIB_MATCHES += mfpu?fpv5-d16=mfpu?crypto-neon-fp-armv8 -endif +# For single-precision only fpv5, use the base fp libraries +MULTILIB_MATCHES += march?armv7e-m+fp=march?armv7e-m+fpv5 +# Softfp but no FP. Use the soft-float libraries. +MULTILIB_REUSE += $(foreach ARCH, armv6s-m armv7-m armv7e-m armv8-m\.base armv8-m\.main, \ + mthumb/march.$(ARCH)/mfloat-abi.soft=mthumb/march.$(ARCH)/mfloat-abi.softfp) -# We map all requests for ARMv7-R or ARMv7-A in ARM mode to Thumb mode and -# any FPU to VFPv3-d16 if possible. -MULTILIB_REUSE += mthumb/march.armv7=march.armv7 -MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp -MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7/mfpu.fpv5-d16/mfloat-abi.softfp -MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7/mfpu.fpv5-d16/mfloat-abi.hard -MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7/mfpu.fpv5-d16/mfloat-abi.softfp -MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7/mfpu.fpv5-d16/mfloat-abi.hard diff --git a/gcc/config/arm/t-rtems b/gcc/config/arm/t-rtems index 026a5895662..c07378657c8 100644 --- a/gcc/config/arm/t-rtems +++ b/gcc/config/arm/t-rtems @@ -1,22 +1,37 @@ # Custom RTEMS multilibs for ARM -MULTILIB_OPTIONS = mbig-endian mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m/mcpu=cortex-m7 mfpu=neon/mfpu=vfp/mfpu=vfpv3-d16/mfpu=fpv4-sp-d16/mfpu=fpv5-d16 mfloat-abi=hard -MULTILIB_DIRNAMES = eb thumb armv6-m armv7-a armv7-r armv7-m cortex-m7 neon vfp vfpv3-d16 fpv4-sp-d16 fpv5-d16 hard +# Reset all MULTILIB variables + +MULTILIB_OPTIONS = +MULTILIB_DIRNAMES = +MULTILIB_EXCEPTIONS = +MULTILIB_REUSE = +MULTILIB_MATCHES = +MULTILIB_REQUIRED = # Enumeration of multilibs -MULTILIB_EXCEPTIONS = - -MULTILIB_REQUIRED = -MULTILIB_REQUIRED += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_REQUIRED += mbig-endian/mthumb/march=armv7-r -MULTILIB_REQUIRED += mfpu=vfp/mfloat-abi=hard -MULTILIB_REQUIRED += mthumb/march=armv6-m -MULTILIB_REQUIRED += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard -MULTILIB_REQUIRED += mthumb/march=armv7-a -MULTILIB_REQUIRED += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard -MULTILIB_REQUIRED += mthumb/march=armv7-r -MULTILIB_REQUIRED += mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard -MULTILIB_REQUIRED += mthumb/mcpu=cortex-m7/mfpu=fpv5-d16/mfloat-abi=hard -MULTILIB_REQUIRED += mthumb/march=armv7-m -MULTILIB_REQUIRED += mthumb +MULTILIB_OPTIONS += mbig-endian +MULTILIB_DIRNAMES += eb + +MULTILIB_OPTIONS += mthumb +MULTILIB_DIRNAMES += thumb + +MULTILIB_OPTIONS += march=armv5te+fp/march=armv6-m/march=armv7-a/march=armv7-a+simd/march=armv7-r/march=armv7-r+fp/march=armv7-m/march=armv7e-m+fp/march=armv7e-m+fp.dp +MULTILIB_DIRNAMES += armv5te+fp armv6-m armv7-a armv7-a+simd armv7-r armv7-r+fp armv7-m armv7e-m+fp armv7e-m+fp.dp + +MULTILIB_OPTIONS += mfloat-abi=hard +MULTILIB_DIRNAMES += hard + +MULTILIB_REQUIRED += mbig-endian/mthumb/march=armv7-r+fp/mfloat-abi=hard +MULTILIB_REQUIRED += mbig-endian/mthumb/march=armv7-r +MULTILIB_REQUIRED += march=armv5te+fp/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv6-m +MULTILIB_REQUIRED += mthumb/march=armv7-a+simd/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7-a +MULTILIB_REQUIRED += mthumb/march=armv7-r+fp/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7-r +MULTILIB_REQUIRED += mthumb/march=armv7e-m+fp/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7e-m+fp.dp/mfloat-abi=hard +MULTILIB_REQUIRED += mthumb/march=armv7-m +MULTILIB_REQUIRED += mthumb diff --git a/gcc/config/arm/t-symbian b/gcc/config/arm/t-symbian index bc10b5856d8..003651ebfe1 100644 --- a/gcc/config/arm/t-symbian +++ b/gcc/config/arm/t-symbian @@ -22,5 +22,35 @@ EXTRA_HEADERS += $(srcdir)/ginclude/unwind-arm-common.h # multilib for those without -- using the soft-float ABI in both # cases. Symbian OS object should be compiled with interworking # enabled, so there are no separate thumb-mode libraries. -MULTILIB_OPTIONS = mfloat-abi=softfp -MULTILIB_DIRNAMES = softfp + +# Reset all the multilib variables. +MULTILIB_OPTIONS = +MULTILIB_DIRNAMES = +MULTILIB_EXCEPTIONS = +MULTILIB_REUSE = +MULTILIB_MATCHES = +MULTILIB_REQUIRED = + +MULTILIB_OPTIONS += march=armv5te+fp +MULTILIB_DIRNAMES += v5te + +MULTILIB_OPTIONS += mfloat-abi=softfp +MULTILIB_DIRNAMES += softfp + +MULTLILIB_REQUIRED += march=armv5te+fp/mfloat-abi=softfp + +MULTILIB_MATCHES += $(foreach ARCH, $(all_early_arch), \ + march?armv5te+fp=march?$(ARCH)+fp) + +MULTILIB_MATCHES += $(foreach FPARCH, $(v7a_fps), \ + march?armv5te+fp=march?armv7-a+$(FPARCH)) + +MULTILIB_MATCHES += $(foreach FPARCH, $(v7ve_fps), \ + march?armv5te+fp=march?armv7ve+$(FPARCH)) + +MULTILIB_MATCHES += $(foreach ARCH, $(all_v7_a_r), \ + march?armv5te+fp=march?$(ARCH)+fp) + +MULTILIB_MATCHES += $(foreach ARCH, $(all_v8_archs), \ + $(foreach FPARCH, $(v8_fps), \ + march?armv5te+fp=march?$(ARCH)+$(FPARCH))) diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md index b0b375c6ddf..253f4968d12 100644 --- a/gcc/config/arm/types.md +++ b/gcc/config/arm/types.md @@ -539,6 +539,7 @@ ; crypto_sha1_slow ; crypto_sha256_fast ; crypto_sha256_slow +; crypto_pmull ; ; The classification below is for coprocessor instructions ; @@ -1078,6 +1079,7 @@ crypto_sha1_slow,\ crypto_sha256_fast,\ crypto_sha256_slow,\ + crypto_pmull,\ coproc" (const_string "untyped")) diff --git a/gcc/config/arm/vxworks.h b/gcc/config/arm/vxworks.h index 107863bc9a2..9af37c7f4f5 100644 --- a/gcc/config/arm/vxworks.h +++ b/gcc/config/arm/vxworks.h @@ -92,8 +92,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see /* There is no default multilib. */ #undef MULTILIB_DEFAULTS -#define FPUTYPE_DEFAULT "vfp" - #undef FUNCTION_PROFILER #define FUNCTION_PROFILER VXWORKS_FUNCTION_PROFILER diff --git a/gcc/config/arm/xgene1.md b/gcc/config/arm/xgene1.md index 62a0732181e..34a13f4eae0 100644 --- a/gcc/config/arm/xgene1.md +++ b/gcc/config/arm/xgene1.md @@ -527,5 +527,6 @@ (define_insn_reservation "xgene1_neon_pmull" 5 (and (eq_attr "tune" "xgene1") (eq_attr "type" "neon_mul_d_long,\ - ")) + crypto_pmull,\ + ")) "xgene1_decode2op") diff --git a/gcc/config/avr/avr-devices.c b/gcc/config/avr/avr-devices.c index 6810ff1cc0f..c391ef9cd8e 100644 --- a/gcc/config/avr/avr-devices.c +++ b/gcc/config/avr/avr-devices.c @@ -98,7 +98,7 @@ avr_texinfo[] = "of program memory." }, { ARCH_AVRXMEGA3, "``XMEGA'' devices with up to 64@tie{}KiB of combined program memory " - "and RAM, and with program memory visible in the RAM address space." }, + "and RAM, and with program memory visible in the RAM address space." }, { ARCH_AVRXMEGA4, "``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB " "of program memory." }, diff --git a/gcc/config/avr/gen-avr-mmcu-specs.c b/gcc/config/avr/gen-avr-mmcu-specs.c index a25ac6f9e50..db17eeb41d7 100644 --- a/gcc/config/avr/gen-avr-mmcu-specs.c +++ b/gcc/config/avr/gen-avr-mmcu-specs.c @@ -170,7 +170,7 @@ print_mcu (const avr_mcu_t *mcu) fprintf (f, "core architecture %s\n", arch->name); else fprintf (f, "device %s (core %s, %d-bit SP%s)\n", mcu->name, - arch->name, sp8 ? 8 : 16, rcall ? ", short-calls" : ""); + arch->name, sp8 ? 8 : 16, rcall ? ", short-calls" : ""); fprintf (f, "%s\n", header); if (is_device) diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index 6c812514239..570c49031bd 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -781,6 +781,9 @@ const char *host_detect_local_cpu (int argc, const char **argv) case 0x4e: case 0x5e: /* Skylake. */ + case 0x8e: + case 0x9e: + /* Kaby Lake. */ cpu = "skylake"; break; case 0x57: @@ -794,6 +797,9 @@ const char *host_detect_local_cpu (int argc, const char **argv) /* Assume Knights Landing. */ if (has_avx512f) cpu = "knl"; + /* Assume Skylake. */ + else if (has_clflushopt) + cpu = "skylake"; /* Assume Broadwell. */ else if (has_adx) cpu = "broadwell"; diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index d5c2d46bf5e..3caeeb0e377 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -31935,11 +31935,12 @@ static GTY(()) tree ix86_builtins[(int) IX86_BUILTIN_MAX]; but are waiting to be built until a function is declared to use that ISA. */ struct builtin_isa { - const char *name; /* function name */ - enum ix86_builtin_func_type tcode; /* type to use in the declaration */ HOST_WIDE_INT isa; /* isa_flags this builtin is defined for */ HOST_WIDE_INT isa2; /* additional isa_flags this builtin is defined for */ - bool const_p; /* true if the declaration is constant */ + const char *name; /* function name */ + enum ix86_builtin_func_type tcode; /* type to use in the declaration */ + unsigned char const_p:1; /* true if the declaration is constant */ + unsigned char pure_p:1; /* true if the declaration has pure attribute */ bool leaf_p; /* true if the declaration has leaf attribute */ bool nothrow_p; /* true if the declaration has nothrow attribute */ bool set_and_not_built_p; @@ -32010,6 +32011,7 @@ def_builtin (HOST_WIDE_INT mask, const char *name, ix86_builtins_isa[(int) code].leaf_p = false; ix86_builtins_isa[(int) code].nothrow_p = false; ix86_builtins_isa[(int) code].const_p = false; + ix86_builtins_isa[(int) code].pure_p = false; ix86_builtins_isa[(int) code].set_and_not_built_p = true; } } @@ -32032,6 +32034,21 @@ def_builtin_const (HOST_WIDE_INT mask, const char *name, return decl; } +/* Like def_builtin, but also marks the function decl "pure". */ + +static inline tree +def_builtin_pure (HOST_WIDE_INT mask, const char *name, + enum ix86_builtin_func_type tcode, enum ix86_builtins code) +{ + tree decl = def_builtin (mask, name, tcode, code); + if (decl) + DECL_PURE_P (decl) = 1; + else + ix86_builtins_isa[(int) code].pure_p = true; + + return decl; +} + /* Like def_builtin, but for additional isa2 flags. */ static inline tree @@ -32066,6 +32083,7 @@ def_builtin2 (HOST_WIDE_INT mask, const char *name, ix86_builtins_isa[(int) code].leaf_p = false; ix86_builtins_isa[(int) code].nothrow_p = false; ix86_builtins_isa[(int) code].const_p = false; + ix86_builtins_isa[(int) code].pure_p = false; ix86_builtins_isa[(int) code].set_and_not_built_p = true; } @@ -32087,6 +32105,21 @@ def_builtin_const2 (HOST_WIDE_INT mask, const char *name, return decl; } +/* Like def_builtin, but also marks the function decl "pure". */ + +static inline tree +def_builtin_pure2 (HOST_WIDE_INT mask, const char *name, + enum ix86_builtin_func_type tcode, enum ix86_builtins code) +{ + tree decl = def_builtin2 (mask, name, tcode, code); + if (decl) + DECL_PURE_P (decl) = 1; + else + ix86_builtins_isa[(int) code].pure_p = true; + + return decl; +} + /* Add any new builtin functions for a given ISA that may not have been declared. This saves a bit of space compared to adding all of the declarations to the tree, even if we didn't use them. */ @@ -32125,6 +32158,8 @@ ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2) ix86_builtins[i] = decl; if (ix86_builtins_isa[i].const_p) TREE_READONLY (decl) = 1; + if (ix86_builtins_isa[i].pure_p) + DECL_PURE_P (decl) = 1; if (ix86_builtins_isa[i].leaf_p) DECL_ATTRIBUTES (decl) = build_tree_list (get_identifier ("leaf"), NULL_TREE); @@ -32478,8 +32513,8 @@ ix86_init_mmx_sse_builtins (void) /* SSE */ def_builtin (OPTION_MASK_ISA_SSE, "__builtin_ia32_ldmxcsr", VOID_FTYPE_UNSIGNED, IX86_BUILTIN_LDMXCSR); - def_builtin (OPTION_MASK_ISA_SSE, "__builtin_ia32_stmxcsr", - UNSIGNED_FTYPE_VOID, IX86_BUILTIN_STMXCSR); + def_builtin_pure (OPTION_MASK_ISA_SSE, "__builtin_ia32_stmxcsr", + UNSIGNED_FTYPE_VOID, IX86_BUILTIN_STMXCSR); /* SSE or 3DNow!A */ def_builtin (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A, @@ -36597,8 +36632,8 @@ ix86_expand_sse_comi_round (const struct builtin_description *d, } else { - gcc_assert (GET_CODE (XVECEXP (pat, 0, 0)) == SET); - set_dst = SET_DEST (XVECEXP (pat, 0, 0)); + gcc_assert (GET_CODE (pat) == SET); + set_dst = SET_DEST (pat); } emit_insn (pat); diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index adc13a9afbc..40a20d0ec6e 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -5290,7 +5290,8 @@ (define_split [(set (match_operand:MODEF 0 "sse_reg_operand") (float:MODEF (match_operand:SI 1 "nonimmediate_operand")))] - "TARGET_USE_VECTOR_CONVERTS + "TARGET_SSE2 + && TARGET_USE_VECTOR_CONVERTS && optimize_function_for_speed_p (cfun) && reload_completed && (MEM_P (operands[1]) || TARGET_INTER_UNIT_MOVES_TO_VEC) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 29a039d5b36..f61ae2bb927 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -15638,13 +15638,13 @@ (set_attr "mode" "<MODE>")]) (define_expand "round<mode>2" - [(set (match_dup 4) + [(set (match_dup 3) (plus:VF (match_operand:VF 1 "register_operand") - (match_dup 3))) + (match_dup 2))) (set (match_operand:VF 0 "register_operand") (unspec:VF - [(match_dup 4) (match_dup 5)] + [(match_dup 3) (match_dup 4)] UNSPEC_ROUND))] "TARGET_ROUND && !flag_trapping_math" { @@ -15664,11 +15664,11 @@ vec_half = ix86_build_const_vector (<MODE>mode, true, half); vec_half = force_reg (<MODE>mode, vec_half); - operands[3] = gen_reg_rtx (<MODE>mode); - emit_insn (gen_copysign<mode>3 (operands[3], vec_half, operands[1])); + operands[2] = gen_reg_rtx (<MODE>mode); + emit_insn (gen_copysign<mode>3 (operands[2], vec_half, operands[1])); - operands[4] = gen_reg_rtx (<MODE>mode); - operands[5] = GEN_INT (ROUND_TRUNC); + operands[3] = gen_reg_rtx (<MODE>mode); + operands[4] = GEN_INT (ROUND_TRUNC); }) (define_expand "round<mode>2_sfix" diff --git a/gcc/config/i386/subst.md b/gcc/config/i386/subst.md index 57fb0d471a4..4685db302b9 100644 --- a/gcc/config/i386/subst.md +++ b/gcc/config/i386/subst.md @@ -177,10 +177,11 @@ [(set (match_operand:SUBST_A 0) (match_operand:SUBST_A 1))] "TARGET_AVX512F" - [(parallel[ - (set (match_dup 0) - (match_dup 1)) - (unspec [(match_operand:SI 2 "const48_operand")] UNSPEC_EMBEDDED_ROUNDING)])]) + [(set (match_dup 0) + (unspec:SUBST_A [(match_dup 1) + (match_operand:SI 2 "const48_operand")] + UNSPEC_EMBEDDED_ROUNDING)) +]) (define_subst_attr "round_expand_name" "round_expand" "" "_round") (define_subst_attr "round_expand_nimm_predicate" "round_expand" "nonimmediate_operand" "register_operand") diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 5bf6c92d3d5..7933f8eb253 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -5337,7 +5337,7 @@ [(set_attr "type" "bitrw")]) (define_insn "*bsetdreg" - [(set (match_operand:SI 0 "register_operand" "+d") + [(set (match_operand:SI 0 "register_operand" "=d") (ior:SI (ashift:SI (const_int 1) (and:SI (match_operand:SI 1 "register_operand" "d") (const_int 31))) @@ -5350,7 +5350,7 @@ [(set_attr "type" "bitrw")]) (define_insn "*bchgdreg" - [(set (match_operand:SI 0 "register_operand" "+d") + [(set (match_operand:SI 0 "register_operand" "=d") (xor:SI (ashift:SI (const_int 1) (and:SI (match_operand:SI 1 "register_operand" "d") (const_int 31))) @@ -5363,7 +5363,7 @@ [(set_attr "type" "bitrw")]) (define_insn "*bclrdreg" - [(set (match_operand:SI 0 "register_operand" "+d") + [(set (match_operand:SI 0 "register_operand" "=d") (and:SI (rotate:SI (const_int -2) (and:SI (match_operand:SI 1 "register_operand" "d") (const_int 31))) diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 28e0a444ba9..971af6f8e09 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -162,7 +162,6 @@ [(TLS_GET_TP_REGNUM 3) (GET_FCSR_REGNUM 2) (SET_FCSR_REGNUM 4) - (MIPS16_T_REGNUM 24) (PIC_FUNCTION_ADDR_REGNUM 25) (RETURN_ADDR_REGNUM 31) (CPRESTORE_SLOT_REGNUM 76) @@ -6389,68 +6388,57 @@ if (!arith_operand (operands[0], SImode)) operands[0] = force_reg (SImode, operands[0]); - operands[2] = GEN_INT (INTVAL (operands[2]) + 1); - + emit_cmp_and_jump_insns (operands[0], operands[2], GTU, + NULL_RTX, SImode, 1, operands[4]); emit_jump_insn (PMODE_INSN (gen_casesi_internal_mips16, - (operands[0], operands[2], - operands[3], operands[4]))); - + (operands[0], operands[3]))); DONE; }) (define_insn "casesi_internal_mips16_<mode>" [(set (pc) - (if_then_else - (ltu (match_operand:SI 0 "register_operand" "d") - (match_operand:SI 1 "arith_operand" "dI")) - (unspec:P - [(match_dup 0) - (label_ref (match_operand 2 "" ""))] - UNSPEC_CASESI_DISPATCH) - (label_ref (match_operand 3 "" "")))) - (clobber (match_scratch:P 4 "=d")) - (clobber (match_scratch:P 5 "=d")) - (clobber (reg:SI MIPS16_T_REGNUM))] + (unspec:P [(match_operand:SI 0 "register_operand" "d") + (label_ref (match_operand 1 "" ""))] + UNSPEC_CASESI_DISPATCH)) + (clobber (match_scratch:P 2 "=d")) + (clobber (match_scratch:P 3 "=d"))] "TARGET_MIPS16_SHORT_JUMP_TABLES" { - rtx diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[2]))); + rtx diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[1]))); gcc_assert (GET_CODE (diff_vec) == ADDR_DIFF_VEC); - - output_asm_insn ("sltu\t%0, %1", operands); - output_asm_insn ("bteqz\t%3", operands); - + switch (GET_MODE (diff_vec)) { case HImode: - output_asm_insn ("sll\t%5, %0, 1", operands); - output_asm_insn ("<d>la\t%4, %2", operands); - output_asm_insn ("<d>addu\t%5, %4, %5", operands); - output_asm_insn ("lh\t%5, 0(%5)", operands); + output_asm_insn ("sll\t%3,%0,1", operands); + output_asm_insn ("<d>la\t%2,%1", operands); + output_asm_insn ("<d>addu\t%3,%2,%3", operands); + output_asm_insn ("lh\t%3,0(%3)", operands); break; case SImode: - output_asm_insn ("sll\t%5, %0, 2", operands); - output_asm_insn ("<d>la\t%4, %2", operands); - output_asm_insn ("<d>addu\t%5, %4, %5", operands); - output_asm_insn ("lw\t%5, 0(%5)", operands); + output_asm_insn ("sll\t%3,%0,2", operands); + output_asm_insn ("<d>la\t%2,%1", operands); + output_asm_insn ("<d>addu\t%3,%2,%3", operands); + output_asm_insn ("lw\t%3,0(%3)", operands); break; default: gcc_unreachable (); } - output_asm_insn ("<d>addu\t%4, %4, %5", operands); + output_asm_insn ("<d>addu\t%2,%2,%3", operands); if (GENERATE_MIPS16E) - return "jrc\t%4"; + return "jrc\t%2"; else - return "jr\t%4"; + return "jr\t%2"; } [(set (attr "insn_count") (if_then_else (match_test "GENERATE_MIPS16E") - (const_string "10") - (const_string "11")))]) + (const_string "6") + (const_string "7")))]) ;; For TARGET_USE_GOT, we save the gp in the jmp_buf as well. ;; While it is possible to either pull it off the stack (in the diff --git a/gcc/config/msp430/msp430.c b/gcc/config/msp430/msp430.c index dd53dea685b..6acab1e70cb 100644 --- a/gcc/config/msp430/msp430.c +++ b/gcc/config/msp430/msp430.c @@ -40,6 +40,7 @@ #include "expr.h" #include "langhooks.h" #include "builtins.h" +#include "intl.h" /* This file should be included last. */ #include "target-def.h" @@ -1993,10 +1994,24 @@ msp430_data_attr (tree * node, gcc_assert (args == NULL); if (TREE_CODE (* node) != VAR_DECL) - message = "%qE attribute only applies to variables"; - - if (DECL_SECTION_NAME (* node)) - message = "%qE attribute cannot be applied to variables with specific sections"; + message = G_("%qE attribute only applies to variables"); + + /* Check that it's possible for the variable to have a section. */ + if ((TREE_STATIC (* node) || DECL_EXTERNAL (* node) || in_lto_p) + && DECL_SECTION_NAME (* node)) + message = G_("%qE attribute cannot be applied to variables with specific sections"); + + if (!message && TREE_NAME_EQ (name, ATTR_PERSIST) && !TREE_STATIC (* node) + && !TREE_PUBLIC (* node) && !DECL_EXTERNAL (* node)) + message = G_("%qE attribute has no effect on automatic variables"); + + /* It's not clear if there is anything that can be set here to prevent the + front end placing the variable before the back end can handle it, in a + similar way to how DECL_COMMON is used below. + So just place the variable in the .persistent section now. */ + if ((TREE_STATIC (* node) || DECL_EXTERNAL (* node) || in_lto_p) + && TREE_NAME_EQ (name, ATTR_PERSIST)) + set_decl_section_name (* node, ".persistent"); /* If this var is thought to be common, then change this. Common variables are assigned to sections before the backend has a chance to process them. */ diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h index 20050ebde22..d542315b99d 100644 --- a/gcc/config/rs6000/altivec.h +++ b/gcc/config/rs6000/altivec.h @@ -133,6 +133,10 @@ #define vec_doublel __builtin_vec_doublel #define vec_doubleh __builtin_vec_doubleh #define vec_expte __builtin_vec_expte +#define vec_float __builtin_vec_float +#define vec_float2 __builtin_vec_float2 +#define vec_floate __builtin_vec_floate +#define vec_floato __builtin_vec_floato #define vec_floor __builtin_vec_floor #define vec_loge __builtin_vec_loge #define vec_madd __builtin_vec_madd diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 487b9a4d21d..0e3d96528b9 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -36,10 +36,14 @@ UNSPEC_VMULESB UNSPEC_VMULEUH UNSPEC_VMULESH + UNSPEC_VMULEUW + UNSPEC_VMULESW UNSPEC_VMULOUB UNSPEC_VMULOSB UNSPEC_VMULOUH UNSPEC_VMULOSH + UNSPEC_VMULOUW + UNSPEC_VMULOSW UNSPEC_VPKPX UNSPEC_VPACK_SIGN_SIGN_SAT UNSPEC_VPACK_SIGN_UNS_SAT @@ -1316,13 +1320,13 @@ } [(set_attr "type" "vecperm")]) -;; Power8 vector merge even/odd -(define_insn "p8_vmrgew" - [(set (match_operand:V4SI 0 "register_operand" "=v") - (vec_select:V4SI - (vec_concat:V8SI - (match_operand:V4SI 1 "register_operand" "v") - (match_operand:V4SI 2 "register_operand" "v")) +;; Power8 vector merge two V4SF/V4SI even words to V4SF +(define_insn "p8_vmrgew_<mode>" + [(set (match_operand:VSX_W 0 "register_operand" "=v") + (vec_select:VSX_W + (vec_concat:<VS_double> + (match_operand:VSX_W 1 "register_operand" "v") + (match_operand:VSX_W 2 "register_operand" "v")) (parallel [(const_int 0) (const_int 4) (const_int 2) (const_int 6)])))] "TARGET_P8_VECTOR" @@ -1412,6 +1416,32 @@ DONE; }) +(define_expand "vec_widen_umult_even_v4si" + [(use (match_operand:V2DI 0 "register_operand" "")) + (use (match_operand:V4SI 1 "register_operand" "")) + (use (match_operand:V4SI 2 "register_operand" ""))] + "TARGET_ALTIVEC" +{ + if (VECTOR_ELT_ORDER_BIG) + emit_insn (gen_altivec_vmuleuw (operands[0], operands[1], operands[2])); + else + emit_insn (gen_altivec_vmulouw (operands[0], operands[1], operands[2])); + DONE; +}) + +(define_expand "vec_widen_smult_even_v4si" + [(use (match_operand:V2DI 0 "register_operand" "")) + (use (match_operand:V4SI 1 "register_operand" "")) + (use (match_operand:V4SI 2 "register_operand" ""))] + "TARGET_ALTIVEC" +{ + if (VECTOR_ELT_ORDER_BIG) + emit_insn (gen_altivec_vmulesw (operands[0], operands[1], operands[2])); + else + emit_insn (gen_altivec_vmulosw (operands[0], operands[1], operands[2])); + DONE; +}) + (define_expand "vec_widen_umult_odd_v16qi" [(use (match_operand:V8HI 0 "register_operand" "")) (use (match_operand:V16QI 1 "register_operand" "")) @@ -1464,6 +1494,34 @@ DONE; }) +(define_expand "vec_widen_umult_odd_v4si" + [(use (match_operand:V2DI 0 "register_operand" "")) + (use (match_operand:V4SI 1 "register_operand" "")) + (use (match_operand:V4SI 2 "register_operand" ""))] + "TARGET_ALTIVEC" +{ + if (VECTOR_ELT_ORDER_BIG) + emit_insn (gen_altivec_vmulouw (operands[0], operands[1], operands[2])); + else + emit_insn (gen_altivec_vmuleuw (operands[0], operands[1], operands[2])); + DONE; +}) + +(define_expand "vec_widen_smult_odd_v4si" + [(use (match_operand:V2DI 0 "register_operand" "")) + (use (match_operand:V4SI 1 "register_operand" "")) + (use (match_operand:V4SI 2 "register_operand" ""))] + "TARGET_ALTIVEC" +{ + if (VECTOR_ELT_ORDER_BIG) + emit_insn (gen_altivec_vmulosw (operands[0], operands[1], + operands[2])); + else + emit_insn (gen_altivec_vmulesw (operands[0], operands[1], + operands[2])); + DONE; +}) + (define_insn "altivec_vmuleub" [(set (match_operand:V8HI 0 "register_operand" "=v") (unspec:V8HI [(match_operand:V16QI 1 "register_operand" "v") @@ -1536,6 +1594,41 @@ "vmulosh %0,%1,%2" [(set_attr "type" "veccomplex")]) +(define_insn "altivec_vmuleuw" + [(set (match_operand:V2DI 0 "register_operand" "=v") + (unspec:V2DI [(match_operand:V4SI 1 "register_operand" "v") + (match_operand:V4SI 2 "register_operand" "v")] + UNSPEC_VMULEUW))] + "TARGET_ALTIVEC" + "vmuleuw %0,%1,%2" + [(set_attr "type" "veccomplex")]) + +(define_insn "altivec_vmulouw" + [(set (match_operand:V2DI 0 "register_operand" "=v") + (unspec:V2DI [(match_operand:V4SI 1 "register_operand" "v") + (match_operand:V4SI 2 "register_operand" "v")] + UNSPEC_VMULOUW))] + "TARGET_ALTIVEC" + "vmulouw %0,%1,%2" + [(set_attr "type" "veccomplex")]) + +(define_insn "altivec_vmulesw" + [(set (match_operand:V2DI 0 "register_operand" "=v") + (unspec:V2DI [(match_operand:V4SI 1 "register_operand" "v") + (match_operand:V4SI 2 "register_operand" "v")] + UNSPEC_VMULESW))] + "TARGET_ALTIVEC" + "vmulesw %0,%1,%2" + [(set_attr "type" "veccomplex")]) + +(define_insn "altivec_vmulosw" + [(set (match_operand:V2DI 0 "register_operand" "=v") + (unspec:V2DI [(match_operand:V4SI 1 "register_operand" "v") + (match_operand:V4SI 2 "register_operand" "v")] + UNSPEC_VMULOSW))] + "TARGET_ALTIVEC" + "vmulosw %0,%1,%2" + [(set_attr "type" "veccomplex")]) ;; Vector pack/unpack (define_insn "altivec_vpkpx" diff --git a/gcc/config/rs6000/eabispe.h b/gcc/config/rs6000/eabispe.h deleted file mode 100644 index db8030a791b..00000000000 --- a/gcc/config/rs6000/eabispe.h +++ /dev/null @@ -1,26 +0,0 @@ -/* Core target definitions for GNU compiler - for PowerPC embedded targeted systems with SPE support. - Copyright (C) 2002-2017 Free Software Foundation, Inc. - Contributed by Aldy Hernandez (aldyh@redhat.com). - - This file is part of GCC. - - GCC is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published - by the Free Software Foundation; either version 3, or (at your - option) any later version. - - GCC is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public - License for more details. - - You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING3. If not see - <http://www.gnu.org/licenses/>. */ - -#undef TARGET_DEFAULT -#define TARGET_DEFAULT (MASK_STRICT_ALIGN | MASK_EABI) - -#undef ASM_DEFAULT_SPEC -#define ASM_DEFAULT_SPEC "-mppc -mspe -me500" diff --git a/gcc/config/rs6000/rs6000-builtin.def b/gcc/config/rs6000/rs6000-builtin.def index 241c4395ce9..963b9a892fa 100644 --- a/gcc/config/rs6000/rs6000-builtin.def +++ b/gcc/config/rs6000/rs6000-builtin.def @@ -1031,10 +1031,14 @@ BU_ALTIVEC_2 (VMULEUB, "vmuleub", CONST, vec_widen_umult_even_v16qi) BU_ALTIVEC_2 (VMULESB, "vmulesb", CONST, vec_widen_smult_even_v16qi) BU_ALTIVEC_2 (VMULEUH, "vmuleuh", CONST, vec_widen_umult_even_v8hi) BU_ALTIVEC_2 (VMULESH, "vmulesh", CONST, vec_widen_smult_even_v8hi) +BU_ALTIVEC_2 (VMULEUW, "vmuleuw", CONST, vec_widen_umult_even_v4si) +BU_ALTIVEC_2 (VMULESW, "vmulesw", CONST, vec_widen_smult_even_v4si) BU_ALTIVEC_2 (VMULOUB, "vmuloub", CONST, vec_widen_umult_odd_v16qi) BU_ALTIVEC_2 (VMULOSB, "vmulosb", CONST, vec_widen_smult_odd_v16qi) BU_ALTIVEC_2 (VMULOUH, "vmulouh", CONST, vec_widen_umult_odd_v8hi) BU_ALTIVEC_2 (VMULOSH, "vmulosh", CONST, vec_widen_smult_odd_v8hi) +BU_ALTIVEC_2 (VMULOUW, "vmulouw", CONST, vec_widen_umult_odd_v4si) +BU_ALTIVEC_2 (VMULOSW, "vmulosw", CONST, vec_widen_smult_odd_v4si) BU_ALTIVEC_2 (VNOR, "vnor", CONST, norv4si3) BU_ALTIVEC_2 (VOR, "vor", CONST, iorv4si3) BU_ALTIVEC_2 (VPKUHUM, "vpkuhum", CONST, altivec_vpkuhum) @@ -1346,12 +1350,16 @@ BU_ALTIVEC_OVERLOAD_2 (VMRGLH, "vmrglh") BU_ALTIVEC_OVERLOAD_2 (VMRGLW, "vmrglw") BU_ALTIVEC_OVERLOAD_2 (VMULESB, "vmulesb") BU_ALTIVEC_OVERLOAD_2 (VMULESH, "vmulesh") +BU_ALTIVEC_OVERLOAD_2 (VMULESW, "vmulesw") BU_ALTIVEC_OVERLOAD_2 (VMULEUB, "vmuleub") BU_ALTIVEC_OVERLOAD_2 (VMULEUH, "vmuleuh") +BU_ALTIVEC_OVERLOAD_2 (VMULEUW, "vmuleuw") BU_ALTIVEC_OVERLOAD_2 (VMULOSB, "vmulosb") BU_ALTIVEC_OVERLOAD_2 (VMULOSH, "vmulosh") +BU_ALTIVEC_OVERLOAD_2 (VMULOSW, "vmulosw") BU_ALTIVEC_OVERLOAD_2 (VMULOUB, "vmuloub") BU_ALTIVEC_OVERLOAD_2 (VMULOUH, "vmulouh") +BU_ALTIVEC_OVERLOAD_2 (VMULOUW, "vmulouw") BU_ALTIVEC_OVERLOAD_2 (VPKSHSS, "vpkshss") BU_ALTIVEC_OVERLOAD_2 (VPKSHUS, "vpkshus") BU_ALTIVEC_OVERLOAD_2 (VPKSWSS, "vpkswss") @@ -1591,6 +1599,8 @@ BU_VSX_2 (CMPLE_U16QI, "cmple_u16qi", CONST, vector_ngtuv16qi) BU_VSX_2 (CMPLE_U8HI, "cmple_u8hi", CONST, vector_ngtuv8hi) BU_VSX_2 (CMPLE_U4SI, "cmple_u4si", CONST, vector_ngtuv4si) BU_VSX_2 (CMPLE_U2DI, "cmple_u2di", CONST, vector_ngtuv2di) +BU_VSX_2 (FLOAT2_V2DI, "float2_v2di", CONST, float2_v2di) +BU_VSX_2 (UNS_FLOAT2_V2DI, "uns_float2_v2di", CONST, uns_float2_v2di) /* VSX abs builtin functions. */ BU_VSX_A (XVABSDP, "xvabsdp", CONST, absv2df2) @@ -1648,6 +1658,16 @@ BU_VSX_1 (XVCVSPSXDS, "xvcvspsxds", CONST, vsx_xvcvspsxds) BU_VSX_1 (XVCVSPUXDS, "xvcvspuxds", CONST, vsx_xvcvspuxds) BU_VSX_1 (XVCVSXDSP, "xvcvsxdsp", CONST, vsx_xvcvsxdsp) BU_VSX_1 (XVCVUXDSP, "xvcvuxdsp", CONST, vsx_xvcvuxdsp) + +BU_VSX_1 (XVCVSXWSP_V4SF, "vsx_xvcvsxwsp", CONST, vsx_xvcvsxwsp) +BU_VSX_1 (XVCVUXWSP_V4SF, "vsx_xvcvuxwsp", CONST, vsx_xvcvuxwsp) +BU_VSX_1 (FLOATE_V2DI, "floate_v2di", CONST, floatev2di) +BU_VSX_1 (FLOATE_V2DF, "floate_v2df", CONST, floatev2df) +BU_VSX_1 (FLOATO_V2DI, "floato_v2di", CONST, floatov2di) +BU_VSX_1 (FLOATO_V2DF, "floato_v2df", CONST, floatov2df) +BU_VSX_1 (UNS_FLOATO_V2DI, "uns_floato_v2di", CONST, unsfloatov2di) +BU_VSX_1 (UNS_FLOATE_V2DI, "uns_floate_v2di", CONST, unsfloatev2di) + BU_VSX_1 (XVRSPI, "xvrspi", CONST, vsx_xvrspi) BU_VSX_1 (XVRSPIC, "xvrspic", CONST, vsx_xvrspic) BU_VSX_1 (XVRSPIM, "xvrspim", CONST, vsx_floorv4sf2) @@ -1760,6 +1780,8 @@ BU_VSX_OVERLOAD_2 (XXMRGHW, "xxmrghw") BU_VSX_OVERLOAD_2 (XXMRGLW, "xxmrglw") BU_VSX_OVERLOAD_2 (XXSPLTD, "xxspltd") BU_VSX_OVERLOAD_2 (XXSPLTW, "xxspltw") +BU_VSX_OVERLOAD_2 (FLOAT2, "float2") +BU_VSX_OVERLOAD_2 (UNS_FLOAT2, "uns_float2") /* 1 argument VSX overloaded builtin functions. */ BU_VSX_OVERLOAD_1 (DOUBLE, "double") @@ -1771,6 +1793,9 @@ BU_VSX_OVERLOAD_1 (DOUBLEH, "doubleh") BU_VSX_OVERLOAD_1 (UNS_DOUBLEH, "uns_doubleh") BU_VSX_OVERLOAD_1 (DOUBLEL, "doublel") BU_VSX_OVERLOAD_1 (UNS_DOUBLEL, "uns_doublel") +BU_VSX_OVERLOAD_1 (FLOAT, "float") +BU_VSX_OVERLOAD_1 (FLOATE, "floate") +BU_VSX_OVERLOAD_1 (FLOATO, "floato") /* VSX builtins that are handled as special cases. */ BU_VSX_OVERLOAD_X (LD, "ld") @@ -1812,7 +1837,7 @@ BU_P8V_AV_2 (VMINSD, "vminsd", CONST, sminv2di3) BU_P8V_AV_2 (VMAXSD, "vmaxsd", CONST, smaxv2di3) BU_P8V_AV_2 (VMINUD, "vminud", CONST, uminv2di3) BU_P8V_AV_2 (VMAXUD, "vmaxud", CONST, umaxv2di3) -BU_P8V_AV_2 (VMRGEW, "vmrgew", CONST, p8_vmrgew) +BU_P8V_AV_2 (VMRGEW_V4SI, "vmrgew_v4si", CONST, p8_vmrgew_v4si) BU_P8V_AV_2 (VMRGOW, "vmrgow", CONST, p8_vmrgow) BU_P8V_AV_2 (VBPERMQ, "vbpermq", CONST, altivec_vbpermq) BU_P8V_AV_2 (VBPERMQ2, "vbpermq2", CONST, altivec_vbpermq2) diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index f1e8d3d2d5e..cfd74abdf7e 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -1538,6 +1538,28 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { { VSX_BUILTIN_VEC_DOUBLEL, VSX_BUILTIN_DOUBLEL_V4SF, RS6000_BTI_V2DF, RS6000_BTI_V4SF, 0, 0 }, + { VSX_BUILTIN_VEC_FLOAT, VSX_BUILTIN_XVCVSXWSP_V4SF, + RS6000_BTI_V4SF, RS6000_BTI_V4SI, 0, 0 }, + { VSX_BUILTIN_VEC_FLOAT, VSX_BUILTIN_XVCVUXWSP_V4SF, + RS6000_BTI_V4SF, RS6000_BTI_unsigned_V4SI, 0, 0 }, + { VSX_BUILTIN_VEC_FLOAT2, VSX_BUILTIN_FLOAT2_V2DI, + RS6000_BTI_V4SF, RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0 }, + { VSX_BUILTIN_VEC_FLOAT2, VSX_BUILTIN_UNS_FLOAT2_V2DI, + RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, + RS6000_BTI_unsigned_V2DI, 0 }, + { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_FLOATE_V2DF, + RS6000_BTI_V4SF, RS6000_BTI_V2DF, 0, 0 }, + { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_FLOATE_V2DI, + RS6000_BTI_V4SF, RS6000_BTI_V2DI, 0, 0 }, + { VSX_BUILTIN_VEC_FLOATE, VSX_BUILTIN_UNS_FLOATE_V2DI, + RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, 0, 0 }, + { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_FLOATO_V2DF, + RS6000_BTI_V4SF, RS6000_BTI_V2DF, 0, 0 }, + { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_FLOATO_V2DI, + RS6000_BTI_V4SF, RS6000_BTI_V2DI, 0, 0 }, + { VSX_BUILTIN_VEC_FLOATO, VSX_BUILTIN_UNS_FLOATO_V2DI, + RS6000_BTI_V4SF, RS6000_BTI_unsigned_V2DI, 0, 0 }, + { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DF, RS6000_BTI_V2DF, RS6000_BTI_INTSI, ~RS6000_BTI_V2DF, 0 }, { ALTIVEC_BUILTIN_VEC_LD, ALTIVEC_BUILTIN_LVX_V2DI, @@ -2207,9 +2229,9 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH, RS6000_BTI_V4SI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESH, + { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULESW, RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUH, + { ALTIVEC_BUILTIN_VEC_MULE, ALTIVEC_BUILTIN_VMULEUW, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, { ALTIVEC_BUILTIN_VEC_VMULEUB, ALTIVEC_BUILTIN_VMULEUB, @@ -2226,9 +2248,9 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { RS6000_BTI_V8HI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 }, { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH, + { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSW, RS6000_BTI_V2DI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUH, + { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOUW, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, { ALTIVEC_BUILTIN_VEC_MULO, ALTIVEC_BUILTIN_VMULOSH, @@ -5262,12 +5284,12 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = { RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW, + { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW, + { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 }, - { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW, + { P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VMRGEW_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0 }, { P8V_BUILTIN_VEC_VMRGOW, P8V_BUILTIN_VMRGOW, diff --git a/gcc/config/rs6000/rs6000-modes.def b/gcc/config/rs6000/rs6000-modes.def index fc66fca7300..65f890e2dca 100644 --- a/gcc/config/rs6000/rs6000-modes.def +++ b/gcc/config/rs6000/rs6000-modes.def @@ -41,15 +41,20 @@ CC_MODE (CCFP); CC_MODE (CCEQ); /* Vector modes. */ -VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */ + +/* VMX/VSX. */ VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */ -VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI */ -VECTOR_MODE (INT, DI, 1); -VECTOR_MODE (INT, TI, 1); -VECTOR_MODES (FLOAT, 8); /* V4HF V2SF */ +VECTOR_MODE (INT, TI, 1); /* V1TI */ VECTOR_MODES (FLOAT, 16); /* V8HF V4SF V2DF */ + +/* Two VMX/VSX vectors (for permute, select, concat, etc.) */ +VECTOR_MODES (INT, 32); /* V32QI V16HI V8SI V4DI */ VECTOR_MODES (FLOAT, 32); /* V16HF V8SF V4DF */ +/* Paired single. */ +VECTOR_MODE (FLOAT, SF, 2); /* The only valid paired-single mode. */ +VECTOR_MODE (INT, SI, 2); /* For paired-single permutes. */ + /* Replacement for TImode that only is allowed in GPRs. We also use PTImode for quad memory atomic operations to force getting an even/odd register combination. */ diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h index 086217a37f7..6dffe8dcaff 100644 --- a/gcc/config/rs6000/rs6000-opts.h +++ b/gcc/config/rs6000/rs6000-opts.h @@ -150,7 +150,6 @@ enum rs6000_vector { VECTOR_VSX, /* Use VSX for vector processing */ VECTOR_P8_VECTOR, /* Use ISA 2.07 VSX for vector processing */ VECTOR_PAIRED, /* Use paired floating point for vectors */ - VECTOR_SPE, /* Use SPE for vector processing */ VECTOR_OTHER /* Some other vector unit */ }; diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 8a231f5166c..e3132049270 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -72,6 +72,7 @@ extern void altivec_expand_stvex_be (rtx, rtx, machine_mode, unsigned); extern void rs6000_expand_extract_even (rtx, rtx, rtx); extern void rs6000_expand_interleave (rtx, rtx, rtx, bool); extern void rs6000_scale_v2df (rtx, rtx, int); +extern void rs6000_generate_float2_code (bool, rtx, rtx, rtx); extern int expand_block_clear (rtx[]); extern int expand_block_move (rtx[]); extern bool expand_block_compare (rtx[]); @@ -133,6 +134,7 @@ extern void rs6000_emit_sCOND (machine_mode, rtx[]); extern void rs6000_emit_cbranch (machine_mode, rtx[]); extern char * output_cbranch (rtx, const char *, int, rtx_insn *); extern const char * output_probe_stack_range (rtx, rtx); +extern void rs6000_emit_dot_insn (rtx dst, rtx src, int dot, rtx ccreg); extern bool rs6000_emit_set_const (rtx, rtx); extern int rs6000_emit_cmove (rtx, rtx, rtx, rtx); extern int rs6000_emit_vector_cond_expr (rtx, rtx, rtx, rtx, rtx, rtx); diff --git a/gcc/config/rs6000/rs6000-string.c b/gcc/config/rs6000/rs6000-string.c new file mode 100644 index 00000000000..c2fd056fb46 --- /dev/null +++ b/gcc/config/rs6000/rs6000-string.c @@ -0,0 +1,1465 @@ +/* Subroutines used to expand string and block move, clear, + compare and other operations for PowerPC. + Copyright (C) 1991-2017 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + <http://www.gnu.org/licenses/>. */ + +#include "config.h" +#include "system.h" +#include "coretypes.h" +#include "backend.h" +#include "rtl.h" +#include "tree.h" +#include "memmodel.h" +#include "tm_p.h" +#include "ira.h" +#include "print-tree.h" +#include "varasm.h" +#include "explow.h" +#include "expr.h" +#include "output.h" + +/* Expand a block clear operation, and return 1 if successful. Return 0 + if we should let the compiler generate normal code. + + operands[0] is the destination + operands[1] is the length + operands[3] is the alignment */ + +int +expand_block_clear (rtx operands[]) +{ + rtx orig_dest = operands[0]; + rtx bytes_rtx = operands[1]; + rtx align_rtx = operands[3]; + bool constp = (GET_CODE (bytes_rtx) == CONST_INT); + HOST_WIDE_INT align; + HOST_WIDE_INT bytes; + int offset; + int clear_bytes; + int clear_step; + + /* If this is not a fixed size move, just call memcpy */ + if (! constp) + return 0; + + /* This must be a fixed size alignment */ + gcc_assert (GET_CODE (align_rtx) == CONST_INT); + align = INTVAL (align_rtx) * BITS_PER_UNIT; + + /* Anything to clear? */ + bytes = INTVAL (bytes_rtx); + if (bytes <= 0) + return 1; + + /* Use the builtin memset after a point, to avoid huge code bloat. + When optimize_size, avoid any significant code bloat; calling + memset is about 4 instructions, so allow for one instruction to + load zero and three to do clearing. */ + if (TARGET_ALTIVEC && align >= 128) + clear_step = 16; + else if (TARGET_POWERPC64 && (align >= 64 || !STRICT_ALIGNMENT)) + clear_step = 8; + else + clear_step = 4; + + if (optimize_size && bytes > 3 * clear_step) + return 0; + if (! optimize_size && bytes > 8 * clear_step) + return 0; + + for (offset = 0; bytes > 0; offset += clear_bytes, bytes -= clear_bytes) + { + machine_mode mode = BLKmode; + rtx dest; + + if (bytes >= 16 && TARGET_ALTIVEC && align >= 128) + { + clear_bytes = 16; + mode = V4SImode; + } + else if (bytes >= 8 && TARGET_POWERPC64 + && (align >= 64 || !STRICT_ALIGNMENT)) + { + clear_bytes = 8; + mode = DImode; + if (offset == 0 && align < 64) + { + rtx addr; + + /* If the address form is reg+offset with offset not a + multiple of four, reload into reg indirect form here + rather than waiting for reload. This way we get one + reload, not one per store. */ + addr = XEXP (orig_dest, 0); + if ((GET_CODE (addr) == PLUS || GET_CODE (addr) == LO_SUM) + && GET_CODE (XEXP (addr, 1)) == CONST_INT + && (INTVAL (XEXP (addr, 1)) & 3) != 0) + { + addr = copy_addr_to_reg (addr); + orig_dest = replace_equiv_address (orig_dest, addr); + } + } + } + else if (bytes >= 4 && (align >= 32 || !STRICT_ALIGNMENT)) + { /* move 4 bytes */ + clear_bytes = 4; + mode = SImode; + } + else if (bytes >= 2 && (align >= 16 || !STRICT_ALIGNMENT)) + { /* move 2 bytes */ + clear_bytes = 2; + mode = HImode; + } + else /* move 1 byte at a time */ + { + clear_bytes = 1; + mode = QImode; + } + + dest = adjust_address (orig_dest, mode, offset); + + emit_move_insn (dest, CONST0_RTX (mode)); + } + + return 1; +} + +/* Figure out the correct instructions to generate to load data for + block compare. MODE is used for the read from memory, and + data is zero extended if REG is wider than MODE. If LE code + is being generated, bswap loads are used. + + REG is the destination register to move the data into. + MEM is the memory block being read. + MODE is the mode of memory to use for the read. */ +static void +do_load_for_compare (rtx reg, rtx mem, machine_mode mode) +{ + switch (GET_MODE (reg)) + { + case DImode: + switch (mode) + { + case QImode: + emit_insn (gen_zero_extendqidi2 (reg, mem)); + break; + case HImode: + { + rtx src = mem; + if (!BYTES_BIG_ENDIAN) + { + src = gen_reg_rtx (HImode); + emit_insn (gen_bswaphi2 (src, mem)); + } + emit_insn (gen_zero_extendhidi2 (reg, src)); + break; + } + case SImode: + { + rtx src = mem; + if (!BYTES_BIG_ENDIAN) + { + src = gen_reg_rtx (SImode); + emit_insn (gen_bswapsi2 (src, mem)); + } + emit_insn (gen_zero_extendsidi2 (reg, src)); + } + break; + case DImode: + if (!BYTES_BIG_ENDIAN) + emit_insn (gen_bswapdi2 (reg, mem)); + else + emit_insn (gen_movdi (reg, mem)); + break; + default: + gcc_unreachable (); + } + break; + + case SImode: + switch (mode) + { + case QImode: + emit_insn (gen_zero_extendqisi2 (reg, mem)); + break; + case HImode: + { + rtx src = mem; + if (!BYTES_BIG_ENDIAN) + { + src = gen_reg_rtx (HImode); + emit_insn (gen_bswaphi2 (src, mem)); + } + emit_insn (gen_zero_extendhisi2 (reg, src)); + break; + } + case SImode: + if (!BYTES_BIG_ENDIAN) + emit_insn (gen_bswapsi2 (reg, mem)); + else + emit_insn (gen_movsi (reg, mem)); + break; + case DImode: + /* DImode is larger than the destination reg so is not expected. */ + gcc_unreachable (); + break; + default: + gcc_unreachable (); + } + break; + default: + gcc_unreachable (); + break; + } +} + +/* Select the mode to be used for reading the next chunk of bytes + in the compare. + + OFFSET is the current read offset from the beginning of the block. + BYTES is the number of bytes remaining to be read. + ALIGN is the minimum alignment of the memory blocks being compared in bytes. + WORD_MODE_OK indicates using WORD_MODE is allowed, else SImode is + the largest allowable mode. */ +static machine_mode +select_block_compare_mode (unsigned HOST_WIDE_INT offset, + unsigned HOST_WIDE_INT bytes, + unsigned HOST_WIDE_INT align, bool word_mode_ok) +{ + /* First see if we can do a whole load unit + as that will be more efficient than a larger load + shift. */ + + /* If big, use biggest chunk. + If exactly chunk size, use that size. + If remainder can be done in one piece with shifting, do that. + Do largest chunk possible without violating alignment rules. */ + + /* The most we can read without potential page crossing. */ + unsigned HOST_WIDE_INT maxread = ROUND_UP (bytes, align); + + if (word_mode_ok && bytes >= UNITS_PER_WORD) + return word_mode; + else if (bytes == GET_MODE_SIZE (SImode)) + return SImode; + else if (bytes == GET_MODE_SIZE (HImode)) + return HImode; + else if (bytes == GET_MODE_SIZE (QImode)) + return QImode; + else if (bytes < GET_MODE_SIZE (SImode) + && offset >= GET_MODE_SIZE (SImode) - bytes) + /* This matches the case were we have SImode and 3 bytes + and offset >= 1 and permits us to move back one and overlap + with the previous read, thus avoiding having to shift + unwanted bytes off of the input. */ + return SImode; + else if (word_mode_ok && bytes < UNITS_PER_WORD + && offset >= UNITS_PER_WORD-bytes) + /* Similarly, if we can use DImode it will get matched here and + can do an overlapping read that ends at the end of the block. */ + return word_mode; + else if (word_mode_ok && maxread >= UNITS_PER_WORD) + /* It is safe to do all remaining in one load of largest size, + possibly with a shift to get rid of unwanted bytes. */ + return word_mode; + else if (maxread >= GET_MODE_SIZE (SImode)) + /* It is safe to do all remaining in one SImode load, + possibly with a shift to get rid of unwanted bytes. */ + return SImode; + else if (bytes > GET_MODE_SIZE (SImode)) + return SImode; + else if (bytes > GET_MODE_SIZE (HImode)) + return HImode; + + /* final fallback is do one byte */ + return QImode; +} + +/* Compute the alignment of pointer+OFFSET where the original alignment + of pointer was BASE_ALIGN. */ +static unsigned HOST_WIDE_INT +compute_current_alignment (unsigned HOST_WIDE_INT base_align, + unsigned HOST_WIDE_INT offset) +{ + if (offset == 0) + return base_align; + return MIN (base_align, offset & -offset); +} + +/* Expand a block compare operation, and return true if successful. + Return false if we should let the compiler generate normal code, + probably a memcmp call. + + OPERANDS[0] is the target (result). + OPERANDS[1] is the first source. + OPERANDS[2] is the second source. + OPERANDS[3] is the length. + OPERANDS[4] is the alignment. */ +bool +expand_block_compare (rtx operands[]) +{ + rtx target = operands[0]; + rtx orig_src1 = operands[1]; + rtx orig_src2 = operands[2]; + rtx bytes_rtx = operands[3]; + rtx align_rtx = operands[4]; + HOST_WIDE_INT cmp_bytes = 0; + rtx src1 = orig_src1; + rtx src2 = orig_src2; + + /* This case is complicated to handle because the subtract + with carry instructions do not generate the 64-bit + carry and so we must emit code to calculate it ourselves. + We choose not to implement this yet. */ + if (TARGET_32BIT && TARGET_POWERPC64) + return false; + + /* If this is not a fixed size compare, just call memcmp. */ + if (!CONST_INT_P (bytes_rtx)) + return false; + + /* This must be a fixed size alignment. */ + if (!CONST_INT_P (align_rtx)) + return false; + + unsigned int base_align = UINTVAL (align_rtx) / BITS_PER_UNIT; + + /* SLOW_UNALIGNED_ACCESS -- don't do unaligned stuff. */ + if (SLOW_UNALIGNED_ACCESS (word_mode, MEM_ALIGN (orig_src1)) + || SLOW_UNALIGNED_ACCESS (word_mode, MEM_ALIGN (orig_src2))) + return false; + + gcc_assert (GET_MODE (target) == SImode); + + /* Anything to move? */ + unsigned HOST_WIDE_INT bytes = UINTVAL (bytes_rtx); + if (bytes == 0) + return true; + + /* The code generated for p7 and older is not faster than glibc + memcmp if alignment is small and length is not short, so bail + out to avoid those conditions. */ + if (!TARGET_EFFICIENT_OVERLAPPING_UNALIGNED + && ((base_align == 1 && bytes > 16) + || (base_align == 2 && bytes > 32))) + return false; + + rtx tmp_reg_src1 = gen_reg_rtx (word_mode); + rtx tmp_reg_src2 = gen_reg_rtx (word_mode); + /* P7/P8 code uses cond for subfc. but P9 uses + it for cmpld which needs CCUNSmode. */ + rtx cond; + if (TARGET_P9_MISC) + cond = gen_reg_rtx (CCUNSmode); + else + cond = gen_reg_rtx (CCmode); + + /* If we have an LE target without ldbrx and word_mode is DImode, + then we must avoid using word_mode. */ + int word_mode_ok = !(!BYTES_BIG_ENDIAN && !TARGET_LDBRX + && word_mode == DImode); + + /* Strategy phase. How many ops will this take and should we expand it? */ + + unsigned HOST_WIDE_INT offset = 0; + machine_mode load_mode = + select_block_compare_mode (offset, bytes, base_align, word_mode_ok); + unsigned int load_mode_size = GET_MODE_SIZE (load_mode); + + /* We don't want to generate too much code. */ + unsigned HOST_WIDE_INT max_bytes = + load_mode_size * (unsigned HOST_WIDE_INT) rs6000_block_compare_inline_limit; + if (!IN_RANGE (bytes, 1, max_bytes)) + return false; + + bool generate_6432_conversion = false; + rtx convert_label = NULL; + rtx final_label = NULL; + + /* Example of generated code for 18 bytes aligned 1 byte. + Compiled with -fno-reorder-blocks for clarity. + ldbrx 10,31,8 + ldbrx 9,7,8 + subfc. 9,9,10 + bne 0,.L6487 + addi 9,12,8 + addi 5,11,8 + ldbrx 10,0,9 + ldbrx 9,0,5 + subfc. 9,9,10 + bne 0,.L6487 + addi 9,12,16 + lhbrx 10,0,9 + addi 9,11,16 + lhbrx 9,0,9 + subf 9,9,10 + b .L6488 + .p2align 4,,15 + .L6487: #convert_label + popcntd 9,9 + subfe 10,10,10 + or 9,9,10 + .L6488: #final_label + extsw 10,9 + + We start off with DImode for two blocks that jump to the DI->SI conversion + if the difference is found there, then a final block of HImode that skips + the DI->SI conversion. */ + + while (bytes > 0) + { + unsigned int align = compute_current_alignment (base_align, offset); + if (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED) + load_mode = select_block_compare_mode (offset, bytes, align, + word_mode_ok); + else + load_mode = select_block_compare_mode (0, bytes, align, word_mode_ok); + load_mode_size = GET_MODE_SIZE (load_mode); + if (bytes >= load_mode_size) + cmp_bytes = load_mode_size; + else if (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED) + { + /* Move this load back so it doesn't go past the end. + P8/P9 can do this efficiently. */ + unsigned int extra_bytes = load_mode_size - bytes; + cmp_bytes = bytes; + if (extra_bytes < offset) + { + offset -= extra_bytes; + cmp_bytes = load_mode_size; + bytes = cmp_bytes; + } + } + else + /* P7 and earlier can't do the overlapping load trick fast, + so this forces a non-overlapping load and a shift to get + rid of the extra bytes. */ + cmp_bytes = bytes; + + src1 = adjust_address (orig_src1, load_mode, offset); + src2 = adjust_address (orig_src2, load_mode, offset); + + if (!REG_P (XEXP (src1, 0))) + { + rtx src1_reg = copy_addr_to_reg (XEXP (src1, 0)); + src1 = replace_equiv_address (src1, src1_reg); + } + set_mem_size (src1, cmp_bytes); + + if (!REG_P (XEXP (src2, 0))) + { + rtx src2_reg = copy_addr_to_reg (XEXP (src2, 0)); + src2 = replace_equiv_address (src2, src2_reg); + } + set_mem_size (src2, cmp_bytes); + + do_load_for_compare (tmp_reg_src1, src1, load_mode); + do_load_for_compare (tmp_reg_src2, src2, load_mode); + + if (cmp_bytes < load_mode_size) + { + /* Shift unneeded bytes off. */ + rtx sh = GEN_INT (BITS_PER_UNIT * (load_mode_size - cmp_bytes)); + if (word_mode == DImode) + { + emit_insn (gen_lshrdi3 (tmp_reg_src1, tmp_reg_src1, sh)); + emit_insn (gen_lshrdi3 (tmp_reg_src2, tmp_reg_src2, sh)); + } + else + { + emit_insn (gen_lshrsi3 (tmp_reg_src1, tmp_reg_src1, sh)); + emit_insn (gen_lshrsi3 (tmp_reg_src2, tmp_reg_src2, sh)); + } + } + + int remain = bytes - cmp_bytes; + if (GET_MODE_SIZE (GET_MODE (target)) > GET_MODE_SIZE (load_mode)) + { + /* Target is larger than load size so we don't need to + reduce result size. */ + + /* We previously did a block that need 64->32 conversion but + the current block does not, so a label is needed to jump + to the end. */ + if (generate_6432_conversion && !final_label) + final_label = gen_label_rtx (); + + if (remain > 0) + { + /* This is not the last block, branch to the end if the result + of this subtract is not zero. */ + if (!final_label) + final_label = gen_label_rtx (); + rtx fin_ref = gen_rtx_LABEL_REF (VOIDmode, final_label); + rtx tmp = gen_rtx_MINUS (word_mode, tmp_reg_src1, tmp_reg_src2); + rtx cr = gen_reg_rtx (CCmode); + rs6000_emit_dot_insn (tmp_reg_src2, tmp, 2, cr); + emit_insn (gen_movsi (target, + gen_lowpart (SImode, tmp_reg_src2))); + rtx ne_rtx = gen_rtx_NE (VOIDmode, cr, const0_rtx); + rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, ne_rtx, + fin_ref, pc_rtx); + rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse)); + JUMP_LABEL (j) = final_label; + LABEL_NUSES (final_label) += 1; + } + else + { + if (word_mode == DImode) + { + emit_insn (gen_subdi3 (tmp_reg_src2, tmp_reg_src1, + tmp_reg_src2)); + emit_insn (gen_movsi (target, + gen_lowpart (SImode, tmp_reg_src2))); + } + else + emit_insn (gen_subsi3 (target, tmp_reg_src1, tmp_reg_src2)); + + if (final_label) + { + rtx fin_ref = gen_rtx_LABEL_REF (VOIDmode, final_label); + rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, fin_ref)); + JUMP_LABEL(j) = final_label; + LABEL_NUSES (final_label) += 1; + emit_barrier (); + } + } + } + else + { + /* Do we need a 64->32 conversion block? We need the 64->32 + conversion even if target size == load_mode size because + the subtract generates one extra bit. */ + generate_6432_conversion = true; + + if (remain > 0) + { + if (!convert_label) + convert_label = gen_label_rtx (); + + /* Compare to zero and branch to convert_label if not zero. */ + rtx cvt_ref = gen_rtx_LABEL_REF (VOIDmode, convert_label); + if (TARGET_P9_MISC) + { + /* Generate a compare, and convert with a setb later. */ + rtx cmp = gen_rtx_COMPARE (CCUNSmode, tmp_reg_src1, + tmp_reg_src2); + emit_insn (gen_rtx_SET (cond, cmp)); + } + else + /* Generate a subfc. and use the longer + sequence for conversion. */ + if (TARGET_64BIT) + emit_insn (gen_subfdi3_carry_dot2 (tmp_reg_src2, tmp_reg_src2, + tmp_reg_src1, cond)); + else + emit_insn (gen_subfsi3_carry_dot2 (tmp_reg_src2, tmp_reg_src2, + tmp_reg_src1, cond)); + rtx ne_rtx = gen_rtx_NE (VOIDmode, cond, const0_rtx); + rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, ne_rtx, + cvt_ref, pc_rtx); + rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse)); + JUMP_LABEL(j) = convert_label; + LABEL_NUSES (convert_label) += 1; + } + else + { + /* Just do the subtract/compare. Since this is the last block + the convert code will be generated immediately following. */ + if (TARGET_P9_MISC) + { + rtx cmp = gen_rtx_COMPARE (CCUNSmode, tmp_reg_src1, + tmp_reg_src2); + emit_insn (gen_rtx_SET (cond, cmp)); + } + else + if (TARGET_64BIT) + emit_insn (gen_subfdi3_carry (tmp_reg_src2, tmp_reg_src2, + tmp_reg_src1)); + else + emit_insn (gen_subfsi3_carry (tmp_reg_src2, tmp_reg_src2, + tmp_reg_src1)); + } + } + + offset += cmp_bytes; + bytes -= cmp_bytes; + } + + if (generate_6432_conversion) + { + if (convert_label) + emit_label (convert_label); + + /* We need to produce DI result from sub, then convert to target SI + while maintaining <0 / ==0 / >0 properties. This sequence works: + subfc L,A,B + subfe H,H,H + popcntd L,L + rldimi L,H,6,0 + + This is an alternate one Segher cooked up if somebody + wants to expand this for something that doesn't have popcntd: + subfc L,a,b + subfe H,x,x + addic t,L,-1 + subfe v,t,L + or z,v,H + + And finally, p9 can just do this: + cmpld A,B + setb r */ + + if (TARGET_P9_MISC) + { + emit_insn (gen_setb_unsigned (target, cond)); + } + else + { + if (TARGET_64BIT) + { + rtx tmp_reg_ca = gen_reg_rtx (DImode); + emit_insn (gen_subfdi3_carry_in_xx (tmp_reg_ca)); + emit_insn (gen_popcntddi2 (tmp_reg_src2, tmp_reg_src2)); + emit_insn (gen_iordi3 (tmp_reg_src2, tmp_reg_src2, tmp_reg_ca)); + emit_insn (gen_movsi (target, gen_lowpart (SImode, tmp_reg_src2))); + } + else + { + rtx tmp_reg_ca = gen_reg_rtx (SImode); + emit_insn (gen_subfsi3_carry_in_xx (tmp_reg_ca)); + emit_insn (gen_popcntdsi2 (tmp_reg_src2, tmp_reg_src2)); + emit_insn (gen_iorsi3 (target, tmp_reg_src2, tmp_reg_ca)); + } + } + } + + if (final_label) + emit_label (final_label); + + gcc_assert (bytes == 0); + return true; +} + +/* Generate alignment check and branch code to set up for + strncmp when we don't have DI alignment. + STRNCMP_LABEL is the label to branch if there is a page crossing. + SRC is the string pointer to be examined. + BYTES is the max number of bytes to compare. */ +static void +expand_strncmp_align_check (rtx strncmp_label, rtx src, HOST_WIDE_INT bytes) +{ + rtx lab_ref = gen_rtx_LABEL_REF (VOIDmode, strncmp_label); + rtx src_check = copy_addr_to_reg (XEXP (src, 0)); + if (GET_MODE (src_check) == SImode) + emit_insn (gen_andsi3 (src_check, src_check, GEN_INT (0xfff))); + else + emit_insn (gen_anddi3 (src_check, src_check, GEN_INT (0xfff))); + rtx cond = gen_reg_rtx (CCmode); + emit_move_insn (cond, gen_rtx_COMPARE (CCmode, src_check, + GEN_INT (4096 - bytes))); + + rtx cmp_rtx = gen_rtx_LT (VOIDmode, cond, const0_rtx); + + rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, cmp_rtx, + pc_rtx, lab_ref); + rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse)); + JUMP_LABEL (j) = strncmp_label; + LABEL_NUSES (strncmp_label) += 1; +} + +/* Expand a string compare operation with length, and return + true if successful. Return false if we should let the + compiler generate normal code, probably a strncmp call. + + OPERANDS[0] is the target (result). + OPERANDS[1] is the first source. + OPERANDS[2] is the second source. + If NO_LENGTH is zero, then: + OPERANDS[3] is the length. + OPERANDS[4] is the alignment in bytes. + If NO_LENGTH is nonzero, then: + OPERANDS[3] is the alignment in bytes. */ +bool +expand_strn_compare (rtx operands[], int no_length) +{ + rtx target = operands[0]; + rtx orig_src1 = operands[1]; + rtx orig_src2 = operands[2]; + rtx bytes_rtx, align_rtx; + if (no_length) + { + bytes_rtx = NULL; + align_rtx = operands[3]; + } + else + { + bytes_rtx = operands[3]; + align_rtx = operands[4]; + } + unsigned HOST_WIDE_INT cmp_bytes = 0; + rtx src1 = orig_src1; + rtx src2 = orig_src2; + + /* If we have a length, it must be constant. This simplifies things + a bit as we don't have to generate code to check if we've exceeded + the length. Later this could be expanded to handle this case. */ + if (!no_length && !CONST_INT_P (bytes_rtx)) + return false; + + /* This must be a fixed size alignment. */ + if (!CONST_INT_P (align_rtx)) + return false; + + unsigned int base_align = UINTVAL (align_rtx); + int align1 = MEM_ALIGN (orig_src1) / BITS_PER_UNIT; + int align2 = MEM_ALIGN (orig_src2) / BITS_PER_UNIT; + + /* SLOW_UNALIGNED_ACCESS -- don't do unaligned stuff. */ + if (SLOW_UNALIGNED_ACCESS (word_mode, align1) + || SLOW_UNALIGNED_ACCESS (word_mode, align2)) + return false; + + gcc_assert (GET_MODE (target) == SImode); + + /* If we have an LE target without ldbrx and word_mode is DImode, + then we must avoid using word_mode. */ + int word_mode_ok = !(!BYTES_BIG_ENDIAN && !TARGET_LDBRX + && word_mode == DImode); + + unsigned int word_mode_size = GET_MODE_SIZE (word_mode); + + unsigned HOST_WIDE_INT offset = 0; + unsigned HOST_WIDE_INT bytes; /* N from the strncmp args if available. */ + unsigned HOST_WIDE_INT compare_length; /* How much to compare inline. */ + if (no_length) + /* Use this as a standin to determine the mode to use. */ + bytes = rs6000_string_compare_inline_limit * word_mode_size; + else + bytes = UINTVAL (bytes_rtx); + + machine_mode load_mode = + select_block_compare_mode (offset, bytes, base_align, word_mode_ok); + unsigned int load_mode_size = GET_MODE_SIZE (load_mode); + compare_length = rs6000_string_compare_inline_limit * load_mode_size; + + /* If we have equality at the end of the last compare and we have not + found the end of the string, we need to call strcmp/strncmp to + compare the remainder. */ + bool equality_compare_rest = false; + + if (no_length) + { + bytes = compare_length; + equality_compare_rest = true; + } + else + { + if (bytes <= compare_length) + compare_length = bytes; + else + equality_compare_rest = true; + } + + rtx result_reg = gen_reg_rtx (word_mode); + rtx final_move_label = gen_label_rtx (); + rtx final_label = gen_label_rtx (); + rtx begin_compare_label = NULL; + + if (base_align < 8) + { + /* Generate code that checks distance to 4k boundary for this case. */ + begin_compare_label = gen_label_rtx (); + rtx strncmp_label = gen_label_rtx (); + rtx jmp; + + /* Strncmp for power8 in glibc does this: + rldicl r8,r3,0,52 + cmpldi cr7,r8,4096-16 + bgt cr7,L(pagecross) */ + + /* Make sure that the length we use for the alignment test and + the subsequent code generation are in agreement so we do not + go past the length we tested for a 4k boundary crossing. */ + unsigned HOST_WIDE_INT align_test = compare_length; + if (align_test < 8) + { + align_test = HOST_WIDE_INT_1U << ceil_log2 (align_test); + base_align = align_test; + } + else + { + align_test = ROUND_UP (align_test, 8); + base_align = 8; + } + + if (align1 < 8) + expand_strncmp_align_check (strncmp_label, src1, align_test); + if (align2 < 8) + expand_strncmp_align_check (strncmp_label, src2, align_test); + + /* Now generate the following sequence: + - branch to begin_compare + - strncmp_label + - call to strncmp + - branch to final_label + - begin_compare_label */ + + rtx cmp_ref = gen_rtx_LABEL_REF (VOIDmode, begin_compare_label); + jmp = emit_jump_insn (gen_rtx_SET (pc_rtx, cmp_ref)); + JUMP_LABEL (jmp) = begin_compare_label; + LABEL_NUSES (begin_compare_label) += 1; + emit_barrier (); + + emit_label (strncmp_label); + + if (!REG_P (XEXP (src1, 0))) + { + rtx src1_reg = copy_addr_to_reg (XEXP (src1, 0)); + src1 = replace_equiv_address (src1, src1_reg); + } + + if (!REG_P (XEXP (src2, 0))) + { + rtx src2_reg = copy_addr_to_reg (XEXP (src2, 0)); + src2 = replace_equiv_address (src2, src2_reg); + } + + if (no_length) + { + tree fun = builtin_decl_explicit (BUILT_IN_STRCMP); + emit_library_call_value (XEXP (DECL_RTL (fun), 0), + target, LCT_NORMAL, GET_MODE (target), 2, + force_reg (Pmode, XEXP (src1, 0)), Pmode, + force_reg (Pmode, XEXP (src2, 0)), Pmode); + } + else + { + /* -m32 -mpowerpc64 results in word_mode being DImode even + though otherwise it is 32-bit. The length arg to strncmp + is a size_t which will be the same size as pointers. */ + rtx len_rtx; + if (TARGET_64BIT) + len_rtx = gen_reg_rtx (DImode); + else + len_rtx = gen_reg_rtx (SImode); + + emit_move_insn (len_rtx, bytes_rtx); + + tree fun = builtin_decl_explicit (BUILT_IN_STRNCMP); + emit_library_call_value (XEXP (DECL_RTL (fun), 0), + target, LCT_NORMAL, GET_MODE (target), 3, + force_reg (Pmode, XEXP (src1, 0)), Pmode, + force_reg (Pmode, XEXP (src2, 0)), Pmode, + len_rtx, GET_MODE (len_rtx)); + } + + rtx fin_ref = gen_rtx_LABEL_REF (VOIDmode, final_label); + jmp = emit_jump_insn (gen_rtx_SET (pc_rtx, fin_ref)); + JUMP_LABEL (jmp) = final_label; + LABEL_NUSES (final_label) += 1; + emit_barrier (); + emit_label (begin_compare_label); + } + + rtx cleanup_label = NULL; + rtx tmp_reg_src1 = gen_reg_rtx (word_mode); + rtx tmp_reg_src2 = gen_reg_rtx (word_mode); + + /* Generate sequence of ld/ldbrx, cmpb to compare out + to the length specified. */ + unsigned HOST_WIDE_INT bytes_to_compare = compare_length; + while (bytes_to_compare > 0) + { + /* Compare sequence: + check each 8B with: ld/ld cmpd bne + If equal, use rldicr/cmpb to check for zero byte. + cleanup code at end: + cmpb get byte that differs + cmpb look for zero byte + orc combine + cntlzd get bit of first zero/diff byte + subfic convert for rldcl use + rldcl rldcl extract diff/zero byte + subf subtract for final result + + The last compare can branch around the cleanup code if the + result is zero because the strings are exactly equal. */ + unsigned int align = compute_current_alignment (base_align, offset); + if (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED) + load_mode = select_block_compare_mode (offset, bytes_to_compare, align, + word_mode_ok); + else + load_mode = select_block_compare_mode (0, bytes_to_compare, align, + word_mode_ok); + load_mode_size = GET_MODE_SIZE (load_mode); + if (bytes_to_compare >= load_mode_size) + cmp_bytes = load_mode_size; + else if (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED) + { + /* Move this load back so it doesn't go past the end. + P8/P9 can do this efficiently. */ + unsigned int extra_bytes = load_mode_size - bytes_to_compare; + cmp_bytes = bytes_to_compare; + if (extra_bytes < offset) + { + offset -= extra_bytes; + cmp_bytes = load_mode_size; + bytes_to_compare = cmp_bytes; + } + } + else + /* P7 and earlier can't do the overlapping load trick fast, + so this forces a non-overlapping load and a shift to get + rid of the extra bytes. */ + cmp_bytes = bytes_to_compare; + + src1 = adjust_address (orig_src1, load_mode, offset); + src2 = adjust_address (orig_src2, load_mode, offset); + + if (!REG_P (XEXP (src1, 0))) + { + rtx src1_reg = copy_addr_to_reg (XEXP (src1, 0)); + src1 = replace_equiv_address (src1, src1_reg); + } + set_mem_size (src1, cmp_bytes); + + if (!REG_P (XEXP (src2, 0))) + { + rtx src2_reg = copy_addr_to_reg (XEXP (src2, 0)); + src2 = replace_equiv_address (src2, src2_reg); + } + set_mem_size (src2, cmp_bytes); + + do_load_for_compare (tmp_reg_src1, src1, load_mode); + do_load_for_compare (tmp_reg_src2, src2, load_mode); + + /* We must always left-align the data we read, and + clear any bytes to the right that are beyond the string. + Otherwise the cmpb sequence won't produce the correct + results. The beginning of the compare will be done + with word_mode so will not have any extra shifts or + clear rights. */ + + if (load_mode_size < word_mode_size) + { + /* Rotate left first. */ + rtx sh = GEN_INT (BITS_PER_UNIT * (word_mode_size - load_mode_size)); + if (word_mode == DImode) + { + emit_insn (gen_rotldi3 (tmp_reg_src1, tmp_reg_src1, sh)); + emit_insn (gen_rotldi3 (tmp_reg_src2, tmp_reg_src2, sh)); + } + else + { + emit_insn (gen_rotlsi3 (tmp_reg_src1, tmp_reg_src1, sh)); + emit_insn (gen_rotlsi3 (tmp_reg_src2, tmp_reg_src2, sh)); + } + } + + if (cmp_bytes < word_mode_size) + { + /* Now clear right. This plus the rotate can be + turned into a rldicr instruction. */ + HOST_WIDE_INT mb = BITS_PER_UNIT * (word_mode_size - cmp_bytes); + rtx mask = GEN_INT (HOST_WIDE_INT_M1U << mb); + if (word_mode == DImode) + { + emit_insn (gen_anddi3_mask (tmp_reg_src1, tmp_reg_src1, mask)); + emit_insn (gen_anddi3_mask (tmp_reg_src2, tmp_reg_src2, mask)); + } + else + { + emit_insn (gen_andsi3_mask (tmp_reg_src1, tmp_reg_src1, mask)); + emit_insn (gen_andsi3_mask (tmp_reg_src2, tmp_reg_src2, mask)); + } + } + + /* Cases to handle. A and B are chunks of the two strings. + 1: Not end of comparison: + A != B: branch to cleanup code to compute result. + A == B: check for 0 byte, next block if not found. + 2: End of the inline comparison: + A != B: branch to cleanup code to compute result. + A == B: check for 0 byte, call strcmp/strncmp + 3: compared requested N bytes: + A == B: branch to result 0. + A != B: cleanup code to compute result. */ + + unsigned HOST_WIDE_INT remain = bytes_to_compare - cmp_bytes; + + rtx dst_label; + if (remain > 0 || equality_compare_rest) + { + /* Branch to cleanup code, otherwise fall through to do + more compares. */ + if (!cleanup_label) + cleanup_label = gen_label_rtx (); + dst_label = cleanup_label; + } + else + /* Branch to end and produce result of 0. */ + dst_label = final_move_label; + + rtx lab_ref = gen_rtx_LABEL_REF (VOIDmode, dst_label); + rtx cond = gen_reg_rtx (CCmode); + + /* Always produce the 0 result, it is needed if + cmpb finds a 0 byte in this chunk. */ + rtx tmp = gen_rtx_MINUS (word_mode, tmp_reg_src1, tmp_reg_src2); + rs6000_emit_dot_insn (result_reg, tmp, 1, cond); + + rtx cmp_rtx; + if (remain == 0 && !equality_compare_rest) + cmp_rtx = gen_rtx_EQ (VOIDmode, cond, const0_rtx); + else + cmp_rtx = gen_rtx_NE (VOIDmode, cond, const0_rtx); + + rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, cmp_rtx, + lab_ref, pc_rtx); + rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse)); + JUMP_LABEL (j) = dst_label; + LABEL_NUSES (dst_label) += 1; + + if (remain > 0 || equality_compare_rest) + { + /* Generate a cmpb to test for a 0 byte and branch + to final result if found. */ + rtx cmpb_zero = gen_reg_rtx (word_mode); + rtx lab_ref_fin = gen_rtx_LABEL_REF (VOIDmode, final_move_label); + rtx condz = gen_reg_rtx (CCmode); + rtx zero_reg = gen_reg_rtx (word_mode); + if (word_mode == SImode) + { + emit_insn (gen_movsi (zero_reg, GEN_INT (0))); + emit_insn (gen_cmpbsi3 (cmpb_zero, tmp_reg_src1, zero_reg)); + if (cmp_bytes < word_mode_size) + { + /* Don't want to look at zero bytes past end. */ + HOST_WIDE_INT mb = + BITS_PER_UNIT * (word_mode_size - cmp_bytes); + rtx mask = GEN_INT (HOST_WIDE_INT_M1U << mb); + emit_insn (gen_andsi3_mask (cmpb_zero, cmpb_zero, mask)); + } + } + else + { + emit_insn (gen_movdi (zero_reg, GEN_INT (0))); + emit_insn (gen_cmpbdi3 (cmpb_zero, tmp_reg_src1, zero_reg)); + if (cmp_bytes < word_mode_size) + { + /* Don't want to look at zero bytes past end. */ + HOST_WIDE_INT mb = + BITS_PER_UNIT * (word_mode_size - cmp_bytes); + rtx mask = GEN_INT (HOST_WIDE_INT_M1U << mb); + emit_insn (gen_anddi3_mask (cmpb_zero, cmpb_zero, mask)); + } + } + + emit_move_insn (condz, gen_rtx_COMPARE (CCmode, cmpb_zero, zero_reg)); + rtx cmpnz_rtx = gen_rtx_NE (VOIDmode, condz, const0_rtx); + rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, cmpnz_rtx, + lab_ref_fin, pc_rtx); + rtx j2 = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse)); + JUMP_LABEL (j2) = final_move_label; + LABEL_NUSES (final_move_label) += 1; + + } + + offset += cmp_bytes; + bytes_to_compare -= cmp_bytes; + } + + if (equality_compare_rest) + { + /* Update pointers past what has been compared already. */ + src1 = adjust_address (orig_src1, load_mode, offset); + src2 = adjust_address (orig_src2, load_mode, offset); + + if (!REG_P (XEXP (src1, 0))) + { + rtx src1_reg = copy_addr_to_reg (XEXP (src1, 0)); + src1 = replace_equiv_address (src1, src1_reg); + } + set_mem_size (src1, cmp_bytes); + + if (!REG_P (XEXP (src2, 0))) + { + rtx src2_reg = copy_addr_to_reg (XEXP (src2, 0)); + src2 = replace_equiv_address (src2, src2_reg); + } + set_mem_size (src2, cmp_bytes); + + /* Construct call to strcmp/strncmp to compare the rest of the string. */ + if (no_length) + { + tree fun = builtin_decl_explicit (BUILT_IN_STRCMP); + emit_library_call_value (XEXP (DECL_RTL (fun), 0), + target, LCT_NORMAL, GET_MODE (target), 2, + force_reg (Pmode, XEXP (src1, 0)), Pmode, + force_reg (Pmode, XEXP (src2, 0)), Pmode); + } + else + { + rtx len_rtx; + if (TARGET_64BIT) + len_rtx = gen_reg_rtx (DImode); + else + len_rtx = gen_reg_rtx (SImode); + + emit_move_insn (len_rtx, GEN_INT (bytes - compare_length)); + tree fun = builtin_decl_explicit (BUILT_IN_STRNCMP); + emit_library_call_value (XEXP (DECL_RTL (fun), 0), + target, LCT_NORMAL, GET_MODE (target), 3, + force_reg (Pmode, XEXP (src1, 0)), Pmode, + force_reg (Pmode, XEXP (src2, 0)), Pmode, + len_rtx, GET_MODE (len_rtx)); + } + + rtx fin_ref = gen_rtx_LABEL_REF (VOIDmode, final_label); + rtx jmp = emit_jump_insn (gen_rtx_SET (pc_rtx, fin_ref)); + JUMP_LABEL (jmp) = final_label; + LABEL_NUSES (final_label) += 1; + emit_barrier (); + } + + if (cleanup_label) + emit_label (cleanup_label); + + /* Generate the final sequence that identifies the differing + byte and generates the final result, taking into account + zero bytes: + + cmpb cmpb_result1, src1, src2 + cmpb cmpb_result2, src1, zero + orc cmpb_result1, cmp_result1, cmpb_result2 + cntlzd get bit of first zero/diff byte + addi convert for rldcl use + rldcl rldcl extract diff/zero byte + subf subtract for final result + */ + + rtx cmpb_diff = gen_reg_rtx (word_mode); + rtx cmpb_zero = gen_reg_rtx (word_mode); + rtx rot_amt = gen_reg_rtx (word_mode); + rtx zero_reg = gen_reg_rtx (word_mode); + + rtx rot1_1 = gen_reg_rtx (word_mode); + rtx rot1_2 = gen_reg_rtx (word_mode); + rtx rot2_1 = gen_reg_rtx (word_mode); + rtx rot2_2 = gen_reg_rtx (word_mode); + + if (word_mode == SImode) + { + emit_insn (gen_cmpbsi3 (cmpb_diff, tmp_reg_src1, tmp_reg_src2)); + emit_insn (gen_movsi (zero_reg, GEN_INT (0))); + emit_insn (gen_cmpbsi3 (cmpb_zero, tmp_reg_src1, zero_reg)); + emit_insn (gen_one_cmplsi2 (cmpb_diff,cmpb_diff)); + emit_insn (gen_iorsi3 (cmpb_diff, cmpb_diff, cmpb_zero)); + emit_insn (gen_clzsi2 (rot_amt, cmpb_diff)); + emit_insn (gen_addsi3 (rot_amt, rot_amt, GEN_INT (8))); + emit_insn (gen_rotlsi3 (rot1_1, tmp_reg_src1, + gen_lowpart (SImode, rot_amt))); + emit_insn (gen_andsi3_mask (rot1_2, rot1_1, GEN_INT (0xff))); + emit_insn (gen_rotlsi3 (rot2_1, tmp_reg_src2, + gen_lowpart (SImode, rot_amt))); + emit_insn (gen_andsi3_mask (rot2_2, rot2_1, GEN_INT (0xff))); + emit_insn (gen_subsi3 (result_reg, rot1_2, rot2_2)); + } + else + { + emit_insn (gen_cmpbdi3 (cmpb_diff, tmp_reg_src1, tmp_reg_src2)); + emit_insn (gen_movdi (zero_reg, GEN_INT (0))); + emit_insn (gen_cmpbdi3 (cmpb_zero, tmp_reg_src1, zero_reg)); + emit_insn (gen_one_cmpldi2 (cmpb_diff,cmpb_diff)); + emit_insn (gen_iordi3 (cmpb_diff, cmpb_diff, cmpb_zero)); + emit_insn (gen_clzdi2 (rot_amt, cmpb_diff)); + emit_insn (gen_adddi3 (rot_amt, rot_amt, GEN_INT (8))); + emit_insn (gen_rotldi3 (rot1_1, tmp_reg_src1, + gen_lowpart (SImode, rot_amt))); + emit_insn (gen_anddi3_mask (rot1_2, rot1_1, GEN_INT (0xff))); + emit_insn (gen_rotldi3 (rot2_1, tmp_reg_src2, + gen_lowpart (SImode, rot_amt))); + emit_insn (gen_anddi3_mask (rot2_2, rot2_1, GEN_INT (0xff))); + emit_insn (gen_subdi3 (result_reg, rot1_2, rot2_2)); + } + + emit_label (final_move_label); + emit_insn (gen_movsi (target, + gen_lowpart (SImode, result_reg))); + emit_label (final_label); + return true; +} + +/* Expand a block move operation, and return 1 if successful. Return 0 + if we should let the compiler generate normal code. + + operands[0] is the destination + operands[1] is the source + operands[2] is the length + operands[3] is the alignment */ + +#define MAX_MOVE_REG 4 + +int +expand_block_move (rtx operands[]) +{ + rtx orig_dest = operands[0]; + rtx orig_src = operands[1]; + rtx bytes_rtx = operands[2]; + rtx align_rtx = operands[3]; + int constp = (GET_CODE (bytes_rtx) == CONST_INT); + int align; + int bytes; + int offset; + int move_bytes; + rtx stores[MAX_MOVE_REG]; + int num_reg = 0; + + /* If this is not a fixed size move, just call memcpy */ + if (! constp) + return 0; + + /* This must be a fixed size alignment */ + gcc_assert (GET_CODE (align_rtx) == CONST_INT); + align = INTVAL (align_rtx) * BITS_PER_UNIT; + + /* Anything to move? */ + bytes = INTVAL (bytes_rtx); + if (bytes <= 0) + return 1; + + if (bytes > rs6000_block_move_inline_limit) + return 0; + + for (offset = 0; bytes > 0; offset += move_bytes, bytes -= move_bytes) + { + union { + rtx (*movmemsi) (rtx, rtx, rtx, rtx); + rtx (*mov) (rtx, rtx); + } gen_func; + machine_mode mode = BLKmode; + rtx src, dest; + + /* Altivec first, since it will be faster than a string move + when it applies, and usually not significantly larger. */ + if (TARGET_ALTIVEC && bytes >= 16 && align >= 128) + { + move_bytes = 16; + mode = V4SImode; + gen_func.mov = gen_movv4si; + } + else if (TARGET_STRING + && bytes > 24 /* move up to 32 bytes at a time */ + && ! fixed_regs[5] + && ! fixed_regs[6] + && ! fixed_regs[7] + && ! fixed_regs[8] + && ! fixed_regs[9] + && ! fixed_regs[10] + && ! fixed_regs[11] + && ! fixed_regs[12]) + { + move_bytes = (bytes > 32) ? 32 : bytes; + gen_func.movmemsi = gen_movmemsi_8reg; + } + else if (TARGET_STRING + && bytes > 16 /* move up to 24 bytes at a time */ + && ! fixed_regs[5] + && ! fixed_regs[6] + && ! fixed_regs[7] + && ! fixed_regs[8] + && ! fixed_regs[9] + && ! fixed_regs[10]) + { + move_bytes = (bytes > 24) ? 24 : bytes; + gen_func.movmemsi = gen_movmemsi_6reg; + } + else if (TARGET_STRING + && bytes > 8 /* move up to 16 bytes at a time */ + && ! fixed_regs[5] + && ! fixed_regs[6] + && ! fixed_regs[7] + && ! fixed_regs[8]) + { + move_bytes = (bytes > 16) ? 16 : bytes; + gen_func.movmemsi = gen_movmemsi_4reg; + } + else if (bytes >= 8 && TARGET_POWERPC64 + && (align >= 64 || !STRICT_ALIGNMENT)) + { + move_bytes = 8; + mode = DImode; + gen_func.mov = gen_movdi; + if (offset == 0 && align < 64) + { + rtx addr; + + /* If the address form is reg+offset with offset not a + multiple of four, reload into reg indirect form here + rather than waiting for reload. This way we get one + reload, not one per load and/or store. */ + addr = XEXP (orig_dest, 0); + if ((GET_CODE (addr) == PLUS || GET_CODE (addr) == LO_SUM) + && GET_CODE (XEXP (addr, 1)) == CONST_INT + && (INTVAL (XEXP (addr, 1)) & 3) != 0) + { + addr = copy_addr_to_reg (addr); + orig_dest = replace_equiv_address (orig_dest, addr); + } + addr = XEXP (orig_src, 0); + if ((GET_CODE (addr) == PLUS || GET_CODE (addr) == LO_SUM) + && GET_CODE (XEXP (addr, 1)) == CONST_INT + && (INTVAL (XEXP (addr, 1)) & 3) != 0) + { + addr = copy_addr_to_reg (addr); + orig_src = replace_equiv_address (orig_src, addr); + } + } + } + else if (TARGET_STRING && bytes > 4 && !TARGET_POWERPC64) + { /* move up to 8 bytes at a time */ + move_bytes = (bytes > 8) ? 8 : bytes; + gen_func.movmemsi = gen_movmemsi_2reg; + } + else if (bytes >= 4 && (align >= 32 || !STRICT_ALIGNMENT)) + { /* move 4 bytes */ + move_bytes = 4; + mode = SImode; + gen_func.mov = gen_movsi; + } + else if (bytes >= 2 && (align >= 16 || !STRICT_ALIGNMENT)) + { /* move 2 bytes */ + move_bytes = 2; + mode = HImode; + gen_func.mov = gen_movhi; + } + else if (TARGET_STRING && bytes > 1) + { /* move up to 4 bytes at a time */ + move_bytes = (bytes > 4) ? 4 : bytes; + gen_func.movmemsi = gen_movmemsi_1reg; + } + else /* move 1 byte at a time */ + { + move_bytes = 1; + mode = QImode; + gen_func.mov = gen_movqi; + } + + src = adjust_address (orig_src, mode, offset); + dest = adjust_address (orig_dest, mode, offset); + + if (mode != BLKmode) + { + rtx tmp_reg = gen_reg_rtx (mode); + + emit_insn ((*gen_func.mov) (tmp_reg, src)); + stores[num_reg++] = (*gen_func.mov) (dest, tmp_reg); + } + + if (mode == BLKmode || num_reg >= MAX_MOVE_REG || bytes == move_bytes) + { + int i; + for (i = 0; i < num_reg; i++) + emit_insn (stores[i]); + num_reg = 0; + } + + if (mode == BLKmode) + { + /* Move the address into scratch registers. The movmemsi + patterns require zero offset. */ + if (!REG_P (XEXP (src, 0))) + { + rtx src_reg = copy_addr_to_reg (XEXP (src, 0)); + src = replace_equiv_address (src, src_reg); + } + set_mem_size (src, move_bytes); + + if (!REG_P (XEXP (dest, 0))) + { + rtx dest_reg = copy_addr_to_reg (XEXP (dest, 0)); + dest = replace_equiv_address (dest, dest_reg); + } + set_mem_size (dest, move_bytes); + + emit_insn ((*gen_func.movmemsi) (dest, src, + GEN_INT (move_bytes & 31), + align_rtx)); + } + } + + return 1; +} + + +/* Return a string to perform a load_multiple operation. + operands[0] is the vector. + operands[1] is the source address. + operands[2] is the first destination register. */ + +const char * +rs6000_output_load_multiple (rtx operands[3]) +{ + /* We have to handle the case where the pseudo used to contain the address + is assigned to one of the output registers. */ + int i, j; + int words = XVECLEN (operands[0], 0); + rtx xop[10]; + + if (XVECLEN (operands[0], 0) == 1) + return "lwz %2,0(%1)"; + + for (i = 0; i < words; i++) + if (refers_to_regno_p (REGNO (operands[2]) + i, operands[1])) + { + if (i == words-1) + { + xop[0] = GEN_INT (4 * (words-1)); + xop[1] = operands[1]; + xop[2] = operands[2]; + output_asm_insn ("lswi %2,%1,%0\n\tlwz %1,%0(%1)", xop); + return ""; + } + else if (i == 0) + { + xop[0] = GEN_INT (4 * (words-1)); + xop[1] = operands[1]; + xop[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); + output_asm_insn ("addi %1,%1,4\n\tlswi %2,%1,%0\n\tlwz %1,-4(%1)", xop); + return ""; + } + else + { + for (j = 0; j < words; j++) + if (j != i) + { + xop[0] = GEN_INT (j * 4); + xop[1] = operands[1]; + xop[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + j); + output_asm_insn ("lwz %2,%0(%1)", xop); + } + xop[0] = GEN_INT (i * 4); + xop[1] = operands[1]; + output_asm_insn ("lwz %1,%0(%1)", xop); + return ""; + } + } + + return "lswi %2,%1,%N0"; +} + diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 8e825704266..79dccba1dce 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -77,6 +77,7 @@ #endif #include "case-cfn-macros.h" #include "ppc-auxv.h" +#include "tree-ssa-propagate.h" /* This file should be included last. */ #include "target-def.h" @@ -2014,10 +2015,6 @@ rs6000_cpu_name_lookup (const char *name) This is ordinarily the length in words of a value of mode MODE but can be less for certain modes in special long registers. - For the SPE, GPRs are 64 bits but only 32 bits are visible in - scalar instructions. The upper 32 bits are only available to the - SIMD instructions. - POWER and PowerPC GPRs hold 32 bits worth; PowerPC64 GPRs and FPRs point register holds 64 bits worth. */ @@ -2236,7 +2233,6 @@ rs6000_debug_vector_unit (enum rs6000_vector v) case VECTOR_VSX: ret = "vsx"; break; case VECTOR_P8_VECTOR: ret = "p8_vector"; break; case VECTOR_PAIRED: ret = "paired"; break; - case VECTOR_SPE: ret = "spe"; break; case VECTOR_OTHER: ret = "other"; break; default: ret = "unknown"; break; } @@ -2450,8 +2446,6 @@ rs6000_debug_reg_global (void) SDmode, DDmode, TDmode, - V8QImode, - V4HImode, V2SImode, V16QImode, V8HImode, @@ -2904,9 +2898,7 @@ rs6000_setup_reg_addr_masks (void) addr_mask |= RELOAD_REG_INDEXED; /* Figure out if we can do PRE_INC, PRE_DEC, or PRE_MODIFY - addressing. Restrict addressing on SPE for 64-bit types - because of the SUBREG hackery used to address 64-bit floats in - '32-bit' GPRs. If we allow scalars into Altivec registers, + addressing. If we allow scalars into Altivec registers, don't allow PRE_INC, PRE_DEC, or PRE_MODIFY. */ if (TARGET_UPDATE @@ -3174,7 +3166,7 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p) rs6000_vector_align[TImode] = align64; } - /* TODO add SPE and paired floating point vector support. */ + /* TODO add paired floating point vector support. */ /* Register class constraints for the constraints that depend on compile switches. When the VSX code was added, different constraints were added @@ -3830,8 +3822,7 @@ darwin_rs6000_override_options (void) /* Return the builtin mask of the various options used that could affect which builtins were used. In the past we used target_flags, but we've run out of - bits, and some options like SPE and PAIRED are no longer in - target_flags. */ + bits, and some options like PAIRED are no longer in target_flags. */ HOST_WIDE_INT rs6000_builtin_mask_calculate (void) @@ -5482,8 +5473,7 @@ rs6000_option_override_internal (bool global_init_p) /* Set the builtin mask of the various options used that could affect which builtins were used. In the past we used target_flags, but we've run out - of bits, and some options like SPE and PAIRED are no longer in - target_flags. */ + of bits, and some options like PAIRED are no longer in target_flags. */ rs6000_builtin_mask = rs6000_builtin_mask_calculate (); if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET) rs6000_print_builtin_options (stderr, 0, "builtin mask", @@ -7462,6 +7452,8 @@ rs6000_expand_vector_set (rtx target, rtx val, int elt) insn = gen_vsx_set_v8hi_p9 (target, target, val, elt_rtx); else if (mode == V16QImode) insn = gen_vsx_set_v16qi_p9 (target, target, val, elt_rtx); + else if (mode == V4SFmode) + insn = gen_vsx_set_v4sf_p9 (target, target, val, elt_rtx); } if (insn) @@ -8490,9 +8482,7 @@ reg_offset_addressing_ok_p (machine_mode mode) return mode_supports_vsx_dform_quad (mode); break; - case V4HImode: case V2SImode: - case V1DImode: case V2SFmode: /* Paired vector modes. Only reg+reg addressing is valid. */ if (TARGET_PAIRED_FLOAT) @@ -8701,9 +8691,6 @@ legitimate_small_data_p (machine_mode mode, rtx x) && small_data_operand (x, mode)); } -/* SPE offset addressing is limited to 5-bits worth of double words. */ -#define SPE_CONST_OFFSET_OK(x) (((x) & ~0xf8) == 0) - bool rs6000_legitimate_offset_address_p (machine_mode mode, rtx x, bool strict, bool worst_case) @@ -8730,12 +8717,10 @@ rs6000_legitimate_offset_address_p (machine_mode mode, rtx x, extra = 0; switch (mode) { - case V4HImode: case V2SImode: - case V1DImode: case V2SFmode: - /* SPE vector modes. */ - return SPE_CONST_OFFSET_OK (offset); + /* Paired single modes: offset addressing isn't valid. */ + return false; case DFmode: case DDmode: @@ -10981,10 +10966,8 @@ rs6000_emit_move (rtx dest, rtx source, machine_mode mode) case V8HImode: case V4SFmode: case V4SImode: - case V4HImode: case V2SFmode: case V2SImode: - case V1DImode: case V2DFmode: case V2DImode: case V1TImode: @@ -11779,7 +11762,6 @@ function_arg_padding (machine_mode mode, const_tree type) However, we're stuck with this because changing the ABI might break existing library interfaces. - Doubleword align SPE vectors. Quadword align Altivec/VSX vectors. Quadword align large synthetic vector types. */ @@ -12200,18 +12182,17 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, machine_mode mode, int n_words = rs6000_arg_size (mode, type); int gregno = cum->sysv_gregno; - /* Long long and SPE vectors are put in (r3,r4), (r5,r6), - (r7,r8) or (r9,r10). As does any other 2 word item such - as complex int due to a historical mistake. */ + /* Long long is put in (r3,r4), (r5,r6), (r7,r8) or (r9,r10). + As does any other 2 word item such as complex int due to a + historical mistake. */ if (n_words == 2) gregno += (1 - gregno) & 1; /* Multi-reg args are not split between registers and stack. */ if (gregno + n_words - 1 > GP_ARG_MAX_REG) { - /* Long long and SPE vectors are aligned on the stack. - So are other 2 word items such as complex int due to - a historical mistake. */ + /* Long long is aligned on the stack. So are other 2 word + items such as complex int due to a historical mistake. */ if (n_words == 2) cum->words += cum->words & 1; cum->words += n_words; @@ -12748,9 +12729,9 @@ rs6000_function_arg (cumulative_args_t cum_v, machine_mode mode, int n_words = rs6000_arg_size (mode, type); int gregno = cum->sysv_gregno; - /* Long long and SPE vectors are put in (r3,r4), (r5,r6), - (r7,r8) or (r9,r10). As does any other 2 word item such - as complex int due to a historical mistake. */ + /* Long long is put in (r3,r4), (r5,r6), (r7,r8) or (r9,r10). + As does any other 2 word item such as complex int due to a + historical mistake. */ if (n_words == 2) gregno += (1 - gregno) & 1; @@ -13687,9 +13668,8 @@ rs6000_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, lab_false = create_artificial_label (input_location); lab_over = create_artificial_label (input_location); - /* Long long and SPE vectors are aligned in the registers. - As are any other 2 gpr item such as complex int due to a - historical mistake. */ + /* Long long is aligned in the registers. As are any other 2 gpr + item such as complex int due to a historical mistake. */ u = reg; if (n_reg == 2 && reg == gpr) { @@ -16355,9 +16335,11 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) /* Even element flavors of vec_mul (signed). */ case ALTIVEC_BUILTIN_VMULESB: case ALTIVEC_BUILTIN_VMULESH: + case ALTIVEC_BUILTIN_VMULESW: /* Even element flavors of vec_mul (unsigned). */ case ALTIVEC_BUILTIN_VMULEUB: case ALTIVEC_BUILTIN_VMULEUH: + case ALTIVEC_BUILTIN_VMULEUW: { arg0 = gimple_call_arg (stmt, 0); arg1 = gimple_call_arg (stmt, 1); @@ -16370,9 +16352,11 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) /* Odd element flavors of vec_mul (signed). */ case ALTIVEC_BUILTIN_VMULOSB: case ALTIVEC_BUILTIN_VMULOSH: + case ALTIVEC_BUILTIN_VMULOSW: /* Odd element flavors of vec_mul (unsigned). */ case ALTIVEC_BUILTIN_VMULOUB: case ALTIVEC_BUILTIN_VMULOUH: + case ALTIVEC_BUILTIN_VMULOUW: { arg0 = gimple_call_arg (stmt, 0); arg1 = gimple_call_arg (stmt, 1); @@ -16588,6 +16572,76 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) gsi_replace (gsi, g, true); return true; } + /* Flavors of vec_rotate_left. */ + case ALTIVEC_BUILTIN_VRLB: + case ALTIVEC_BUILTIN_VRLH: + case ALTIVEC_BUILTIN_VRLW: + case P8V_BUILTIN_VRLD: + { + arg0 = gimple_call_arg (stmt, 0); + arg1 = gimple_call_arg (stmt, 1); + lhs = gimple_call_lhs (stmt); + gimple *g = gimple_build_assign (lhs, LROTATE_EXPR, arg0, arg1); + gimple_set_location (g, gimple_location (stmt)); + gsi_replace (gsi, g, true); + return true; + } + /* Flavors of vector shift right algebraic. + vec_sra{b,h,w} -> vsra{b,h,w}. */ + case ALTIVEC_BUILTIN_VSRAB: + case ALTIVEC_BUILTIN_VSRAH: + case ALTIVEC_BUILTIN_VSRAW: + case P8V_BUILTIN_VSRAD: + { + arg0 = gimple_call_arg (stmt, 0); + arg1 = gimple_call_arg (stmt, 1); + lhs = gimple_call_lhs (stmt); + gimple *g = gimple_build_assign (lhs, RSHIFT_EXPR, arg0, arg1); + gimple_set_location (g, gimple_location (stmt)); + gsi_replace (gsi, g, true); + return true; + } + /* Flavors of vector shift left. + builtin_altivec_vsl{b,h,w} -> vsl{b,h,w}. */ + case ALTIVEC_BUILTIN_VSLB: + case ALTIVEC_BUILTIN_VSLH: + case ALTIVEC_BUILTIN_VSLW: + case P8V_BUILTIN_VSLD: + { + arg0 = gimple_call_arg (stmt, 0); + if (INTEGRAL_TYPE_P (TREE_TYPE (TREE_TYPE (arg0))) + && !TYPE_OVERFLOW_WRAPS (TREE_TYPE (TREE_TYPE (arg0)))) + return false; + arg1 = gimple_call_arg (stmt, 1); + lhs = gimple_call_lhs (stmt); + gimple *g = gimple_build_assign (lhs, LSHIFT_EXPR, arg0, arg1); + gimple_set_location (g, gimple_location (stmt)); + gsi_replace (gsi, g, true); + return true; + } + /* Flavors of vector shift right. */ + case ALTIVEC_BUILTIN_VSRB: + case ALTIVEC_BUILTIN_VSRH: + case ALTIVEC_BUILTIN_VSRW: + case P8V_BUILTIN_VSRD: + { + arg0 = gimple_call_arg (stmt, 0); + arg1 = gimple_call_arg (stmt, 1); + lhs = gimple_call_lhs (stmt); + gimple_seq stmts = NULL; + /* Convert arg0 to unsigned. */ + tree arg0_unsigned + = gimple_build (&stmts, VIEW_CONVERT_EXPR, + unsigned_type_for (TREE_TYPE (arg0)), arg0); + tree res + = gimple_build (&stmts, RSHIFT_EXPR, + TREE_TYPE (arg0_unsigned), arg0_unsigned, arg1); + /* Convert result back to the lhs type. */ + res = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res); + gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT); + update_call_from_tree (gsi, res); + return true; + } default: break; } @@ -16635,7 +16689,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, case RS6000_BTC_TERNARY: name3 = "ternary"; break; case RS6000_BTC_PREDICATE: name3 = "predicate"; break; case RS6000_BTC_ABS: name3 = "abs"; break; - case RS6000_BTC_EVSEL: name3 = "evsel"; break; case RS6000_BTC_DST: name3 = "dst"; break; } @@ -16843,7 +16896,6 @@ rs6000_init_builtins (void) : "__vector long long", intDI_type_node, 2); V2DF_type_node = rs6000_vector_type ("__vector double", double_type_node, 2); - V4HI_type_node = build_vector_type (intHI_type_node, 4); V4SI_type_node = rs6000_vector_type ("__vector signed int", intSI_type_node, 4); V4SF_type_node = rs6000_vector_type ("__vector float", float_type_node, 4); @@ -16991,7 +17043,6 @@ rs6000_init_builtins (void) builtin_mode_to_type[V2DImode][0] = V2DI_type_node; builtin_mode_to_type[V2DImode][1] = unsigned_V2DI_type_node; builtin_mode_to_type[V2DFmode][0] = V2DF_type_node; - builtin_mode_to_type[V4HImode][0] = V4HI_type_node; builtin_mode_to_type[V4SImode][0] = V4SI_type_node; builtin_mode_to_type[V4SImode][1] = unsigned_V4SI_type_node; builtin_mode_to_type[V4SFmode][0] = V4SF_type_node; @@ -17025,11 +17076,11 @@ rs6000_init_builtins (void) pixel_V8HI_type_node = rs6000_vector_type ("__vector __pixel", pixel_type_node, 8); - /* Paired and SPE builtins are only available if you build a compiler with - the appropriate options, so only create those builtins with the - appropriate compiler option. Create Altivec and VSX builtins on machines - with at least the general purpose extensions (970 and newer) to allow the - use of the target attribute. */ + /* Paired builtins are only available if you build a compiler with the + appropriate options, so only create those builtins with the appropriate + compiler option. Create Altivec and VSX builtins on machines with at + least the general purpose extensions (970 and newer) to allow the use of + the target attribute. */ if (TARGET_PAIRED_FLOAT) paired_init_builtins (); if (TARGET_EXTRA_BUILTINS) @@ -17991,8 +18042,10 @@ builtin_function_type (machine_mode mode_ret, machine_mode mode_arg0, /* unsigned 2 argument functions. */ case ALTIVEC_BUILTIN_VMULEUB: case ALTIVEC_BUILTIN_VMULEUH: + case ALTIVEC_BUILTIN_VMULEUW: case ALTIVEC_BUILTIN_VMULOUB: case ALTIVEC_BUILTIN_VMULOUH: + case ALTIVEC_BUILTIN_VMULOUW: case CRYPTO_BUILTIN_VCIPHER: case CRYPTO_BUILTIN_VCIPHERLAST: case CRYPTO_BUILTIN_VNCIPHER: @@ -18090,6 +18143,14 @@ builtin_function_type (machine_mode mode_ret, machine_mode mode_arg0, h.uns_p[2] = 1; break; + /* unsigned second arguments (vector shift right). */ + case ALTIVEC_BUILTIN_VSRB: + case ALTIVEC_BUILTIN_VSRH: + case ALTIVEC_BUILTIN_VSRW: + case P8V_BUILTIN_VSRD: + h.uns_p[2] = 1; + break; + default: break; } @@ -18161,11 +18222,11 @@ rs6000_common_init_builtins (void) builtin_mode_to_type[V2SFmode][0] = opaque_V2SF_type_node; } - /* Paired and SPE builtins are only available if you build a compiler with - the appropriate options, so only create those builtins with the - appropriate compiler option. Create Altivec and VSX builtins on machines - with at least the general purpose extensions (970 and newer) to allow the - use of the target attribute.. */ + /* Paired builtins are only available if you build a compiler with the + appropriate options, so only create those builtins with the appropriate + compiler option. Create Altivec and VSX builtins on machines with at + least the general purpose extensions (970 and newer) to allow the use of + the target attribute.. */ if (TARGET_EXTRA_BUILTINS) builtin_mask |= RS6000_BTM_COMMON; @@ -18409,7 +18470,7 @@ rs6000_common_init_builtins (void) mode0 = insn_data[icode].operand[0].mode; if (mode0 == V2SImode) { - /* code for SPE */ + /* code for paired single */ if (! (type = v2si_ftype)) { v2si_ftype @@ -18603,113 +18664,6 @@ rs6000_init_libfuncs (void) } } - -/* Expand a block clear operation, and return 1 if successful. Return 0 - if we should let the compiler generate normal code. - - operands[0] is the destination - operands[1] is the length - operands[3] is the alignment */ - -int -expand_block_clear (rtx operands[]) -{ - rtx orig_dest = operands[0]; - rtx bytes_rtx = operands[1]; - rtx align_rtx = operands[3]; - bool constp = (GET_CODE (bytes_rtx) == CONST_INT); - HOST_WIDE_INT align; - HOST_WIDE_INT bytes; - int offset; - int clear_bytes; - int clear_step; - - /* If this is not a fixed size move, just call memcpy */ - if (! constp) - return 0; - - /* This must be a fixed size alignment */ - gcc_assert (GET_CODE (align_rtx) == CONST_INT); - align = INTVAL (align_rtx) * BITS_PER_UNIT; - - /* Anything to clear? */ - bytes = INTVAL (bytes_rtx); - if (bytes <= 0) - return 1; - - /* Use the builtin memset after a point, to avoid huge code bloat. - When optimize_size, avoid any significant code bloat; calling - memset is about 4 instructions, so allow for one instruction to - load zero and three to do clearing. */ - if (TARGET_ALTIVEC && align >= 128) - clear_step = 16; - else if (TARGET_POWERPC64 && (align >= 64 || !STRICT_ALIGNMENT)) - clear_step = 8; - else - clear_step = 4; - - if (optimize_size && bytes > 3 * clear_step) - return 0; - if (! optimize_size && bytes > 8 * clear_step) - return 0; - - for (offset = 0; bytes > 0; offset += clear_bytes, bytes -= clear_bytes) - { - machine_mode mode = BLKmode; - rtx dest; - - if (bytes >= 16 && TARGET_ALTIVEC && align >= 128) - { - clear_bytes = 16; - mode = V4SImode; - } - else if (bytes >= 8 && TARGET_POWERPC64 - && (align >= 64 || !STRICT_ALIGNMENT)) - { - clear_bytes = 8; - mode = DImode; - if (offset == 0 && align < 64) - { - rtx addr; - - /* If the address form is reg+offset with offset not a - multiple of four, reload into reg indirect form here - rather than waiting for reload. This way we get one - reload, not one per store. */ - addr = XEXP (orig_dest, 0); - if ((GET_CODE (addr) == PLUS || GET_CODE (addr) == LO_SUM) - && GET_CODE (XEXP (addr, 1)) == CONST_INT - && (INTVAL (XEXP (addr, 1)) & 3) != 0) - { - addr = copy_addr_to_reg (addr); - orig_dest = replace_equiv_address (orig_dest, addr); - } - } - } - else if (bytes >= 4 && (align >= 32 || !STRICT_ALIGNMENT)) - { /* move 4 bytes */ - clear_bytes = 4; - mode = SImode; - } - else if (bytes >= 2 && (align >= 16 || !STRICT_ALIGNMENT)) - { /* move 2 bytes */ - clear_bytes = 2; - mode = HImode; - } - else /* move 1 byte at a time */ - { - clear_bytes = 1; - mode = QImode; - } - - dest = adjust_address (orig_dest, mode, offset); - - emit_move_insn (dest, CONST0_RTX (mode)); - } - - return 1; -} - /* Emit a potentially record-form instruction, setting DST from SRC. If DOT is 0, that is all; otherwise, set CCREG to the result of the signed comparison of DST with zero. If DOT is 1, the generated RTL @@ -18717,7 +18671,7 @@ expand_block_clear (rtx operands[]) is CR0 do a single dot insn (as a PARALLEL); otherwise, do a SET and a separate COMPARE. */ -static void +void rs6000_emit_dot_insn (rtx dst, rtx src, int dot, rtx ccreg) { if (dot == 0) @@ -18746,1330 +18700,6 @@ rs6000_emit_dot_insn (rtx dst, rtx src, int dot, rtx ccreg) } } -/* Figure out the correct instructions to generate to load data for - block compare. MODE is used for the read from memory, and - data is zero extended if REG is wider than MODE. If LE code - is being generated, bswap loads are used. - - REG is the destination register to move the data into. - MEM is the memory block being read. - MODE is the mode of memory to use for the read. */ -static void -do_load_for_compare (rtx reg, rtx mem, machine_mode mode) -{ - switch (GET_MODE (reg)) - { - case DImode: - switch (mode) - { - case QImode: - emit_insn (gen_zero_extendqidi2 (reg, mem)); - break; - case HImode: - { - rtx src = mem; - if (!BYTES_BIG_ENDIAN) - { - src = gen_reg_rtx (HImode); - emit_insn (gen_bswaphi2 (src, mem)); - } - emit_insn (gen_zero_extendhidi2 (reg, src)); - break; - } - case SImode: - { - rtx src = mem; - if (!BYTES_BIG_ENDIAN) - { - src = gen_reg_rtx (SImode); - emit_insn (gen_bswapsi2 (src, mem)); - } - emit_insn (gen_zero_extendsidi2 (reg, src)); - } - break; - case DImode: - if (!BYTES_BIG_ENDIAN) - emit_insn (gen_bswapdi2 (reg, mem)); - else - emit_insn (gen_movdi (reg, mem)); - break; - default: - gcc_unreachable (); - } - break; - - case SImode: - switch (mode) - { - case QImode: - emit_insn (gen_zero_extendqisi2 (reg, mem)); - break; - case HImode: - { - rtx src = mem; - if (!BYTES_BIG_ENDIAN) - { - src = gen_reg_rtx (HImode); - emit_insn (gen_bswaphi2 (src, mem)); - } - emit_insn (gen_zero_extendhisi2 (reg, src)); - break; - } - case SImode: - if (!BYTES_BIG_ENDIAN) - emit_insn (gen_bswapsi2 (reg, mem)); - else - emit_insn (gen_movsi (reg, mem)); - break; - case DImode: - /* DImode is larger than the destination reg so is not expected. */ - gcc_unreachable (); - break; - default: - gcc_unreachable (); - } - break; - default: - gcc_unreachable (); - break; - } -} - -/* Select the mode to be used for reading the next chunk of bytes - in the compare. - - OFFSET is the current read offset from the beginning of the block. - BYTES is the number of bytes remaining to be read. - ALIGN is the minimum alignment of the memory blocks being compared in bytes. - WORD_MODE_OK indicates using WORD_MODE is allowed, else SImode is - the largest allowable mode. */ -static machine_mode -select_block_compare_mode (unsigned HOST_WIDE_INT offset, - unsigned HOST_WIDE_INT bytes, - unsigned HOST_WIDE_INT align, bool word_mode_ok) -{ - /* First see if we can do a whole load unit - as that will be more efficient than a larger load + shift. */ - - /* If big, use biggest chunk. - If exactly chunk size, use that size. - If remainder can be done in one piece with shifting, do that. - Do largest chunk possible without violating alignment rules. */ - - /* The most we can read without potential page crossing. */ - unsigned HOST_WIDE_INT maxread = ROUND_UP (bytes, align); - - if (word_mode_ok && bytes >= UNITS_PER_WORD) - return word_mode; - else if (bytes == GET_MODE_SIZE (SImode)) - return SImode; - else if (bytes == GET_MODE_SIZE (HImode)) - return HImode; - else if (bytes == GET_MODE_SIZE (QImode)) - return QImode; - else if (bytes < GET_MODE_SIZE (SImode) - && offset >= GET_MODE_SIZE (SImode) - bytes) - /* This matches the case were we have SImode and 3 bytes - and offset >= 1 and permits us to move back one and overlap - with the previous read, thus avoiding having to shift - unwanted bytes off of the input. */ - return SImode; - else if (word_mode_ok && bytes < UNITS_PER_WORD - && offset >= UNITS_PER_WORD-bytes) - /* Similarly, if we can use DImode it will get matched here and - can do an overlapping read that ends at the end of the block. */ - return word_mode; - else if (word_mode_ok && maxread >= UNITS_PER_WORD) - /* It is safe to do all remaining in one load of largest size, - possibly with a shift to get rid of unwanted bytes. */ - return word_mode; - else if (maxread >= GET_MODE_SIZE (SImode)) - /* It is safe to do all remaining in one SImode load, - possibly with a shift to get rid of unwanted bytes. */ - return SImode; - else if (bytes > GET_MODE_SIZE (SImode)) - return SImode; - else if (bytes > GET_MODE_SIZE (HImode)) - return HImode; - - /* final fallback is do one byte */ - return QImode; -} - -/* Compute the alignment of pointer+OFFSET where the original alignment - of pointer was BASE_ALIGN. */ -static unsigned HOST_WIDE_INT -compute_current_alignment (unsigned HOST_WIDE_INT base_align, - unsigned HOST_WIDE_INT offset) -{ - if (offset == 0) - return base_align; - return min (base_align, offset & -offset); -} - -/* Expand a block compare operation, and return true if successful. - Return false if we should let the compiler generate normal code, - probably a memcmp call. - - OPERANDS[0] is the target (result). - OPERANDS[1] is the first source. - OPERANDS[2] is the second source. - OPERANDS[3] is the length. - OPERANDS[4] is the alignment. */ -bool -expand_block_compare (rtx operands[]) -{ - rtx target = operands[0]; - rtx orig_src1 = operands[1]; - rtx orig_src2 = operands[2]; - rtx bytes_rtx = operands[3]; - rtx align_rtx = operands[4]; - HOST_WIDE_INT cmp_bytes = 0; - rtx src1 = orig_src1; - rtx src2 = orig_src2; - - /* This case is complicated to handle because the subtract - with carry instructions do not generate the 64-bit - carry and so we must emit code to calculate it ourselves. - We choose not to implement this yet. */ - if (TARGET_32BIT && TARGET_POWERPC64) - return false; - - /* If this is not a fixed size compare, just call memcmp. */ - if (!CONST_INT_P (bytes_rtx)) - return false; - - /* This must be a fixed size alignment. */ - if (!CONST_INT_P (align_rtx)) - return false; - - unsigned int base_align = UINTVAL (align_rtx) / BITS_PER_UNIT; - - /* SLOW_UNALIGNED_ACCESS -- don't do unaligned stuff. */ - if (SLOW_UNALIGNED_ACCESS (word_mode, MEM_ALIGN (orig_src1)) - || SLOW_UNALIGNED_ACCESS (word_mode, MEM_ALIGN (orig_src2))) - return false; - - gcc_assert (GET_MODE (target) == SImode); - - /* Anything to move? */ - unsigned HOST_WIDE_INT bytes = UINTVAL (bytes_rtx); - if (bytes == 0) - return true; - - /* The code generated for p7 and older is not faster than glibc - memcmp if alignment is small and length is not short, so bail - out to avoid those conditions. */ - if (!TARGET_EFFICIENT_OVERLAPPING_UNALIGNED - && ((base_align == 1 && bytes > 16) - || (base_align == 2 && bytes > 32))) - return false; - - rtx tmp_reg_src1 = gen_reg_rtx (word_mode); - rtx tmp_reg_src2 = gen_reg_rtx (word_mode); - /* P7/P8 code uses cond for subfc. but P9 uses - it for cmpld which needs CCUNSmode. */ - rtx cond; - if (TARGET_P9_MISC) - cond = gen_reg_rtx (CCUNSmode); - else - cond = gen_reg_rtx (CCmode); - - /* If we have an LE target without ldbrx and word_mode is DImode, - then we must avoid using word_mode. */ - int word_mode_ok = !(!BYTES_BIG_ENDIAN && !TARGET_LDBRX - && word_mode == DImode); - - /* Strategy phase. How many ops will this take and should we expand it? */ - - unsigned HOST_WIDE_INT offset = 0; - machine_mode load_mode = - select_block_compare_mode (offset, bytes, base_align, word_mode_ok); - unsigned int load_mode_size = GET_MODE_SIZE (load_mode); - - /* We don't want to generate too much code. */ - unsigned HOST_WIDE_INT max_bytes = - load_mode_size * (unsigned HOST_WIDE_INT) rs6000_block_compare_inline_limit; - if (!IN_RANGE (bytes, 1, max_bytes)) - return false; - - bool generate_6432_conversion = false; - rtx convert_label = NULL; - rtx final_label = NULL; - - /* Example of generated code for 18 bytes aligned 1 byte. - Compiled with -fno-reorder-blocks for clarity. - ldbrx 10,31,8 - ldbrx 9,7,8 - subfc. 9,9,10 - bne 0,.L6487 - addi 9,12,8 - addi 5,11,8 - ldbrx 10,0,9 - ldbrx 9,0,5 - subfc. 9,9,10 - bne 0,.L6487 - addi 9,12,16 - lhbrx 10,0,9 - addi 9,11,16 - lhbrx 9,0,9 - subf 9,9,10 - b .L6488 - .p2align 4,,15 - .L6487: #convert_label - popcntd 9,9 - subfe 10,10,10 - or 9,9,10 - .L6488: #final_label - extsw 10,9 - - We start off with DImode for two blocks that jump to the DI->SI conversion - if the difference is found there, then a final block of HImode that skips - the DI->SI conversion. */ - - while (bytes > 0) - { - unsigned int align = compute_current_alignment (base_align, offset); - if (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED) - load_mode = select_block_compare_mode (offset, bytes, align, - word_mode_ok); - else - load_mode = select_block_compare_mode (0, bytes, align, word_mode_ok); - load_mode_size = GET_MODE_SIZE (load_mode); - if (bytes >= load_mode_size) - cmp_bytes = load_mode_size; - else if (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED) - { - /* Move this load back so it doesn't go past the end. - P8/P9 can do this efficiently. */ - unsigned int extra_bytes = load_mode_size - bytes; - cmp_bytes = bytes; - if (extra_bytes < offset) - { - offset -= extra_bytes; - cmp_bytes = load_mode_size; - bytes = cmp_bytes; - } - } - else - /* P7 and earlier can't do the overlapping load trick fast, - so this forces a non-overlapping load and a shift to get - rid of the extra bytes. */ - cmp_bytes = bytes; - - src1 = adjust_address (orig_src1, load_mode, offset); - src2 = adjust_address (orig_src2, load_mode, offset); - - if (!REG_P (XEXP (src1, 0))) - { - rtx src1_reg = copy_addr_to_reg (XEXP (src1, 0)); - src1 = replace_equiv_address (src1, src1_reg); - } - set_mem_size (src1, cmp_bytes); - - if (!REG_P (XEXP (src2, 0))) - { - rtx src2_reg = copy_addr_to_reg (XEXP (src2, 0)); - src2 = replace_equiv_address (src2, src2_reg); - } - set_mem_size (src2, cmp_bytes); - - do_load_for_compare (tmp_reg_src1, src1, load_mode); - do_load_for_compare (tmp_reg_src2, src2, load_mode); - - if (cmp_bytes < load_mode_size) - { - /* Shift unneeded bytes off. */ - rtx sh = GEN_INT (BITS_PER_UNIT * (load_mode_size - cmp_bytes)); - if (word_mode == DImode) - { - emit_insn (gen_lshrdi3 (tmp_reg_src1, tmp_reg_src1, sh)); - emit_insn (gen_lshrdi3 (tmp_reg_src2, tmp_reg_src2, sh)); - } - else - { - emit_insn (gen_lshrsi3 (tmp_reg_src1, tmp_reg_src1, sh)); - emit_insn (gen_lshrsi3 (tmp_reg_src2, tmp_reg_src2, sh)); - } - } - - int remain = bytes - cmp_bytes; - if (GET_MODE_SIZE (GET_MODE (target)) > GET_MODE_SIZE (load_mode)) - { - /* Target is larger than load size so we don't need to - reduce result size. */ - - /* We previously did a block that need 64->32 conversion but - the current block does not, so a label is needed to jump - to the end. */ - if (generate_6432_conversion && !final_label) - final_label = gen_label_rtx (); - - if (remain > 0) - { - /* This is not the last block, branch to the end if the result - of this subtract is not zero. */ - if (!final_label) - final_label = gen_label_rtx (); - rtx fin_ref = gen_rtx_LABEL_REF (VOIDmode, final_label); - rtx tmp = gen_rtx_MINUS (word_mode, tmp_reg_src1, tmp_reg_src2); - rtx cr = gen_reg_rtx (CCmode); - rs6000_emit_dot_insn (tmp_reg_src2, tmp, 2, cr); - emit_insn (gen_movsi (target, - gen_lowpart (SImode, tmp_reg_src2))); - rtx ne_rtx = gen_rtx_NE (VOIDmode, cr, const0_rtx); - rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, ne_rtx, - fin_ref, pc_rtx); - rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse)); - JUMP_LABEL (j) = final_label; - LABEL_NUSES (final_label) += 1; - } - else - { - if (word_mode == DImode) - { - emit_insn (gen_subdi3 (tmp_reg_src2, tmp_reg_src1, - tmp_reg_src2)); - emit_insn (gen_movsi (target, - gen_lowpart (SImode, tmp_reg_src2))); - } - else - emit_insn (gen_subsi3 (target, tmp_reg_src1, tmp_reg_src2)); - - if (final_label) - { - rtx fin_ref = gen_rtx_LABEL_REF (VOIDmode, final_label); - rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, fin_ref)); - JUMP_LABEL(j) = final_label; - LABEL_NUSES (final_label) += 1; - emit_barrier (); - } - } - } - else - { - /* Do we need a 64->32 conversion block? We need the 64->32 - conversion even if target size == load_mode size because - the subtract generates one extra bit. */ - generate_6432_conversion = true; - - if (remain > 0) - { - if (!convert_label) - convert_label = gen_label_rtx (); - - /* Compare to zero and branch to convert_label if not zero. */ - rtx cvt_ref = gen_rtx_LABEL_REF (VOIDmode, convert_label); - if (TARGET_P9_MISC) - { - /* Generate a compare, and convert with a setb later. */ - rtx cmp = gen_rtx_COMPARE (CCUNSmode, tmp_reg_src1, - tmp_reg_src2); - emit_insn (gen_rtx_SET (cond, cmp)); - } - else - /* Generate a subfc. and use the longer - sequence for conversion. */ - if (TARGET_64BIT) - emit_insn (gen_subfdi3_carry_dot2 (tmp_reg_src2, tmp_reg_src2, - tmp_reg_src1, cond)); - else - emit_insn (gen_subfsi3_carry_dot2 (tmp_reg_src2, tmp_reg_src2, - tmp_reg_src1, cond)); - rtx ne_rtx = gen_rtx_NE (VOIDmode, cond, const0_rtx); - rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, ne_rtx, - cvt_ref, pc_rtx); - rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse)); - JUMP_LABEL(j) = convert_label; - LABEL_NUSES (convert_label) += 1; - } - else - { - /* Just do the subtract/compare. Since this is the last block - the convert code will be generated immediately following. */ - if (TARGET_P9_MISC) - { - rtx cmp = gen_rtx_COMPARE (CCUNSmode, tmp_reg_src1, - tmp_reg_src2); - emit_insn (gen_rtx_SET (cond, cmp)); - } - else - if (TARGET_64BIT) - emit_insn (gen_subfdi3_carry (tmp_reg_src2, tmp_reg_src2, - tmp_reg_src1)); - else - emit_insn (gen_subfsi3_carry (tmp_reg_src2, tmp_reg_src2, - tmp_reg_src1)); - } - } - - offset += cmp_bytes; - bytes -= cmp_bytes; - } - - if (generate_6432_conversion) - { - if (convert_label) - emit_label (convert_label); - - /* We need to produce DI result from sub, then convert to target SI - while maintaining <0 / ==0 / >0 properties. This sequence works: - subfc L,A,B - subfe H,H,H - popcntd L,L - rldimi L,H,6,0 - - This is an alternate one Segher cooked up if somebody - wants to expand this for something that doesn't have popcntd: - subfc L,a,b - subfe H,x,x - addic t,L,-1 - subfe v,t,L - or z,v,H - - And finally, p9 can just do this: - cmpld A,B - setb r */ - - if (TARGET_P9_MISC) - { - emit_insn (gen_setb_unsigned (target, cond)); - } - else - { - if (TARGET_64BIT) - { - rtx tmp_reg_ca = gen_reg_rtx (DImode); - emit_insn (gen_subfdi3_carry_in_xx (tmp_reg_ca)); - emit_insn (gen_popcntddi2 (tmp_reg_src2, tmp_reg_src2)); - emit_insn (gen_iordi3 (tmp_reg_src2, tmp_reg_src2, tmp_reg_ca)); - emit_insn (gen_movsi (target, gen_lowpart (SImode, tmp_reg_src2))); - } - else - { - rtx tmp_reg_ca = gen_reg_rtx (SImode); - emit_insn (gen_subfsi3_carry_in_xx (tmp_reg_ca)); - emit_insn (gen_popcntdsi2 (tmp_reg_src2, tmp_reg_src2)); - emit_insn (gen_iorsi3 (target, tmp_reg_src2, tmp_reg_ca)); - } - } - } - - if (final_label) - emit_label (final_label); - - gcc_assert (bytes == 0); - return true; -} - -/* Generate alignment check and branch code to set up for - strncmp when we don't have DI alignment. - STRNCMP_LABEL is the label to branch if there is a page crossing. - SRC is the string pointer to be examined. - BYTES is the max number of bytes to compare. */ -static void -expand_strncmp_align_check (rtx strncmp_label, rtx src, HOST_WIDE_INT bytes) -{ - rtx lab_ref = gen_rtx_LABEL_REF (VOIDmode, strncmp_label); - rtx src_check = copy_addr_to_reg (XEXP (src, 0)); - if (GET_MODE (src_check) == SImode) - emit_insn (gen_andsi3 (src_check, src_check, GEN_INT (0xfff))); - else - emit_insn (gen_anddi3 (src_check, src_check, GEN_INT (0xfff))); - rtx cond = gen_reg_rtx (CCmode); - emit_move_insn (cond, gen_rtx_COMPARE (CCmode, src_check, - GEN_INT (4096 - bytes))); - - rtx cmp_rtx = gen_rtx_LT (VOIDmode, cond, const0_rtx); - - rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, cmp_rtx, - pc_rtx, lab_ref); - rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse)); - JUMP_LABEL (j) = strncmp_label; - LABEL_NUSES (strncmp_label) += 1; -} - -/* Expand a string compare operation with length, and return - true if successful. Return false if we should let the - compiler generate normal code, probably a strncmp call. - - OPERANDS[0] is the target (result). - OPERANDS[1] is the first source. - OPERANDS[2] is the second source. - If NO_LENGTH is zero, then: - OPERANDS[3] is the length. - OPERANDS[4] is the alignment in bytes. - If NO_LENGTH is nonzero, then: - OPERANDS[3] is the alignment in bytes. */ -bool -expand_strn_compare (rtx operands[], int no_length) -{ - rtx target = operands[0]; - rtx orig_src1 = operands[1]; - rtx orig_src2 = operands[2]; - rtx bytes_rtx, align_rtx; - if (no_length) - { - bytes_rtx = NULL; - align_rtx = operands[3]; - } - else - { - bytes_rtx = operands[3]; - align_rtx = operands[4]; - } - unsigned HOST_WIDE_INT cmp_bytes = 0; - rtx src1 = orig_src1; - rtx src2 = orig_src2; - - /* If we have a length, it must be constant. This simplifies things - a bit as we don't have to generate code to check if we've exceeded - the length. Later this could be expanded to handle this case. */ - if (!no_length && !CONST_INT_P (bytes_rtx)) - return false; - - /* This must be a fixed size alignment. */ - if (!CONST_INT_P (align_rtx)) - return false; - - unsigned int base_align = UINTVAL (align_rtx); - int align1 = MEM_ALIGN (orig_src1) / BITS_PER_UNIT; - int align2 = MEM_ALIGN (orig_src2) / BITS_PER_UNIT; - - /* SLOW_UNALIGNED_ACCESS -- don't do unaligned stuff. */ - if (SLOW_UNALIGNED_ACCESS (word_mode, align1) - || SLOW_UNALIGNED_ACCESS (word_mode, align2)) - return false; - - gcc_assert (GET_MODE (target) == SImode); - - /* If we have an LE target without ldbrx and word_mode is DImode, - then we must avoid using word_mode. */ - int word_mode_ok = !(!BYTES_BIG_ENDIAN && !TARGET_LDBRX - && word_mode == DImode); - - unsigned int word_mode_size = GET_MODE_SIZE (word_mode); - - unsigned HOST_WIDE_INT offset = 0; - unsigned HOST_WIDE_INT bytes; /* N from the strncmp args if available. */ - unsigned HOST_WIDE_INT compare_length; /* How much to compare inline. */ - if (no_length) - /* Use this as a standin to determine the mode to use. */ - bytes = rs6000_string_compare_inline_limit * word_mode_size; - else - bytes = UINTVAL (bytes_rtx); - - machine_mode load_mode = - select_block_compare_mode (offset, bytes, base_align, word_mode_ok); - unsigned int load_mode_size = GET_MODE_SIZE (load_mode); - compare_length = rs6000_string_compare_inline_limit * load_mode_size; - - /* If we have equality at the end of the last compare and we have not - found the end of the string, we need to call strcmp/strncmp to - compare the remainder. */ - bool equality_compare_rest = false; - - if (no_length) - { - bytes = compare_length; - equality_compare_rest = true; - } - else - { - if (bytes <= compare_length) - compare_length = bytes; - else - equality_compare_rest = true; - } - - rtx result_reg = gen_reg_rtx (word_mode); - rtx final_move_label = gen_label_rtx (); - rtx final_label = gen_label_rtx (); - rtx begin_compare_label = NULL; - - if (base_align < 8) - { - /* Generate code that checks distance to 4k boundary for this case. */ - begin_compare_label = gen_label_rtx (); - rtx strncmp_label = gen_label_rtx (); - rtx jmp; - - /* Strncmp for power8 in glibc does this: - rldicl r8,r3,0,52 - cmpldi cr7,r8,4096-16 - bgt cr7,L(pagecross) */ - - /* Make sure that the length we use for the alignment test and - the subsequent code generation are in agreement so we do not - go past the length we tested for a 4k boundary crossing. */ - unsigned HOST_WIDE_INT align_test = compare_length; - if (align_test < 8) - { - align_test = HOST_WIDE_INT_1U << ceil_log2 (align_test); - base_align = align_test; - } - else - { - align_test = ROUND_UP (align_test, 8); - base_align = 8; - } - - if (align1 < 8) - expand_strncmp_align_check (strncmp_label, src1, align_test); - if (align2 < 8) - expand_strncmp_align_check (strncmp_label, src2, align_test); - - /* Now generate the following sequence: - - branch to begin_compare - - strncmp_label - - call to strncmp - - branch to final_label - - begin_compare_label */ - - rtx cmp_ref = gen_rtx_LABEL_REF (VOIDmode, begin_compare_label); - jmp = emit_jump_insn (gen_rtx_SET (pc_rtx, cmp_ref)); - JUMP_LABEL (jmp) = begin_compare_label; - LABEL_NUSES (begin_compare_label) += 1; - emit_barrier (); - - emit_label (strncmp_label); - - if (!REG_P (XEXP (src1, 0))) - { - rtx src1_reg = copy_addr_to_reg (XEXP (src1, 0)); - src1 = replace_equiv_address (src1, src1_reg); - } - - if (!REG_P (XEXP (src2, 0))) - { - rtx src2_reg = copy_addr_to_reg (XEXP (src2, 0)); - src2 = replace_equiv_address (src2, src2_reg); - } - - if (no_length) - { - tree fun = builtin_decl_explicit (BUILT_IN_STRCMP); - emit_library_call_value (XEXP (DECL_RTL (fun), 0), - target, LCT_NORMAL, GET_MODE (target), 2, - force_reg (Pmode, XEXP (src1, 0)), Pmode, - force_reg (Pmode, XEXP (src2, 0)), Pmode); - } - else - { - /* -m32 -mpowerpc64 results in word_mode being DImode even - though otherwise it is 32-bit. The length arg to strncmp - is a size_t which will be the same size as pointers. */ - rtx len_rtx; - if (TARGET_64BIT) - len_rtx = gen_reg_rtx (DImode); - else - len_rtx = gen_reg_rtx (SImode); - - emit_move_insn (len_rtx, bytes_rtx); - - tree fun = builtin_decl_explicit (BUILT_IN_STRNCMP); - emit_library_call_value (XEXP (DECL_RTL (fun), 0), - target, LCT_NORMAL, GET_MODE (target), 3, - force_reg (Pmode, XEXP (src1, 0)), Pmode, - force_reg (Pmode, XEXP (src2, 0)), Pmode, - len_rtx, GET_MODE (len_rtx)); - } - - rtx fin_ref = gen_rtx_LABEL_REF (VOIDmode, final_label); - jmp = emit_jump_insn (gen_rtx_SET (pc_rtx, fin_ref)); - JUMP_LABEL (jmp) = final_label; - LABEL_NUSES (final_label) += 1; - emit_barrier (); - emit_label (begin_compare_label); - } - - rtx cleanup_label = NULL; - rtx tmp_reg_src1 = gen_reg_rtx (word_mode); - rtx tmp_reg_src2 = gen_reg_rtx (word_mode); - - /* Generate sequence of ld/ldbrx, cmpb to compare out - to the length specified. */ - unsigned HOST_WIDE_INT bytes_to_compare = compare_length; - while (bytes_to_compare > 0) - { - /* Compare sequence: - check each 8B with: ld/ld cmpd bne - If equal, use rldicr/cmpb to check for zero byte. - cleanup code at end: - cmpb get byte that differs - cmpb look for zero byte - orc combine - cntlzd get bit of first zero/diff byte - subfic convert for rldcl use - rldcl rldcl extract diff/zero byte - subf subtract for final result - - The last compare can branch around the cleanup code if the - result is zero because the strings are exactly equal. */ - unsigned int align = compute_current_alignment (base_align, offset); - if (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED) - load_mode = select_block_compare_mode (offset, bytes_to_compare, align, - word_mode_ok); - else - load_mode = select_block_compare_mode (0, bytes_to_compare, align, - word_mode_ok); - load_mode_size = GET_MODE_SIZE (load_mode); - if (bytes_to_compare >= load_mode_size) - cmp_bytes = load_mode_size; - else if (TARGET_EFFICIENT_OVERLAPPING_UNALIGNED) - { - /* Move this load back so it doesn't go past the end. - P8/P9 can do this efficiently. */ - unsigned int extra_bytes = load_mode_size - bytes_to_compare; - cmp_bytes = bytes_to_compare; - if (extra_bytes < offset) - { - offset -= extra_bytes; - cmp_bytes = load_mode_size; - bytes_to_compare = cmp_bytes; - } - } - else - /* P7 and earlier can't do the overlapping load trick fast, - so this forces a non-overlapping load and a shift to get - rid of the extra bytes. */ - cmp_bytes = bytes_to_compare; - - src1 = adjust_address (orig_src1, load_mode, offset); - src2 = adjust_address (orig_src2, load_mode, offset); - - if (!REG_P (XEXP (src1, 0))) - { - rtx src1_reg = copy_addr_to_reg (XEXP (src1, 0)); - src1 = replace_equiv_address (src1, src1_reg); - } - set_mem_size (src1, cmp_bytes); - - if (!REG_P (XEXP (src2, 0))) - { - rtx src2_reg = copy_addr_to_reg (XEXP (src2, 0)); - src2 = replace_equiv_address (src2, src2_reg); - } - set_mem_size (src2, cmp_bytes); - - do_load_for_compare (tmp_reg_src1, src1, load_mode); - do_load_for_compare (tmp_reg_src2, src2, load_mode); - - /* We must always left-align the data we read, and - clear any bytes to the right that are beyond the string. - Otherwise the cmpb sequence won't produce the correct - results. The beginning of the compare will be done - with word_mode so will not have any extra shifts or - clear rights. */ - - if (load_mode_size < word_mode_size) - { - /* Rotate left first. */ - rtx sh = GEN_INT (BITS_PER_UNIT * (word_mode_size - load_mode_size)); - if (word_mode == DImode) - { - emit_insn (gen_rotldi3 (tmp_reg_src1, tmp_reg_src1, sh)); - emit_insn (gen_rotldi3 (tmp_reg_src2, tmp_reg_src2, sh)); - } - else - { - emit_insn (gen_rotlsi3 (tmp_reg_src1, tmp_reg_src1, sh)); - emit_insn (gen_rotlsi3 (tmp_reg_src2, tmp_reg_src2, sh)); - } - } - - if (cmp_bytes < word_mode_size) - { - /* Now clear right. This plus the rotate can be - turned into a rldicr instruction. */ - HOST_WIDE_INT mb = BITS_PER_UNIT * (word_mode_size - cmp_bytes); - rtx mask = GEN_INT (HOST_WIDE_INT_M1U << mb); - if (word_mode == DImode) - { - emit_insn (gen_anddi3_mask (tmp_reg_src1, tmp_reg_src1, mask)); - emit_insn (gen_anddi3_mask (tmp_reg_src2, tmp_reg_src2, mask)); - } - else - { - emit_insn (gen_andsi3_mask (tmp_reg_src1, tmp_reg_src1, mask)); - emit_insn (gen_andsi3_mask (tmp_reg_src2, tmp_reg_src2, mask)); - } - } - - /* Cases to handle. A and B are chunks of the two strings. - 1: Not end of comparison: - A != B: branch to cleanup code to compute result. - A == B: check for 0 byte, next block if not found. - 2: End of the inline comparison: - A != B: branch to cleanup code to compute result. - A == B: check for 0 byte, call strcmp/strncmp - 3: compared requested N bytes: - A == B: branch to result 0. - A != B: cleanup code to compute result. */ - - unsigned HOST_WIDE_INT remain = bytes_to_compare - cmp_bytes; - - rtx dst_label; - if (remain > 0 || equality_compare_rest) - { - /* Branch to cleanup code, otherwise fall through to do - more compares. */ - if (!cleanup_label) - cleanup_label = gen_label_rtx (); - dst_label = cleanup_label; - } - else - /* Branch to end and produce result of 0. */ - dst_label = final_move_label; - - rtx lab_ref = gen_rtx_LABEL_REF (VOIDmode, dst_label); - rtx cond = gen_reg_rtx (CCmode); - - /* Always produce the 0 result, it is needed if - cmpb finds a 0 byte in this chunk. */ - rtx tmp = gen_rtx_MINUS (word_mode, tmp_reg_src1, tmp_reg_src2); - rs6000_emit_dot_insn (result_reg, tmp, 1, cond); - - rtx cmp_rtx; - if (remain == 0 && !equality_compare_rest) - cmp_rtx = gen_rtx_EQ (VOIDmode, cond, const0_rtx); - else - cmp_rtx = gen_rtx_NE (VOIDmode, cond, const0_rtx); - - rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, cmp_rtx, - lab_ref, pc_rtx); - rtx j = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse)); - JUMP_LABEL (j) = dst_label; - LABEL_NUSES (dst_label) += 1; - - if (remain > 0 || equality_compare_rest) - { - /* Generate a cmpb to test for a 0 byte and branch - to final result if found. */ - rtx cmpb_zero = gen_reg_rtx (word_mode); - rtx lab_ref_fin = gen_rtx_LABEL_REF (VOIDmode, final_move_label); - rtx condz = gen_reg_rtx (CCmode); - rtx zero_reg = gen_reg_rtx (word_mode); - if (word_mode == SImode) - { - emit_insn (gen_movsi (zero_reg, GEN_INT (0))); - emit_insn (gen_cmpbsi3 (cmpb_zero, tmp_reg_src1, zero_reg)); - if (cmp_bytes < word_mode_size) - { - /* Don't want to look at zero bytes past end. */ - HOST_WIDE_INT mb = - BITS_PER_UNIT * (word_mode_size - cmp_bytes); - rtx mask = GEN_INT (HOST_WIDE_INT_M1U << mb); - emit_insn (gen_andsi3_mask (cmpb_zero, cmpb_zero, mask)); - } - } - else - { - emit_insn (gen_movdi (zero_reg, GEN_INT (0))); - emit_insn (gen_cmpbdi3 (cmpb_zero, tmp_reg_src1, zero_reg)); - if (cmp_bytes < word_mode_size) - { - /* Don't want to look at zero bytes past end. */ - HOST_WIDE_INT mb = - BITS_PER_UNIT * (word_mode_size - cmp_bytes); - rtx mask = GEN_INT (HOST_WIDE_INT_M1U << mb); - emit_insn (gen_anddi3_mask (cmpb_zero, cmpb_zero, mask)); - } - } - - emit_move_insn (condz, gen_rtx_COMPARE (CCmode, cmpb_zero, zero_reg)); - rtx cmpnz_rtx = gen_rtx_NE (VOIDmode, condz, const0_rtx); - rtx ifelse = gen_rtx_IF_THEN_ELSE (VOIDmode, cmpnz_rtx, - lab_ref_fin, pc_rtx); - rtx j2 = emit_jump_insn (gen_rtx_SET (pc_rtx, ifelse)); - JUMP_LABEL (j2) = final_move_label; - LABEL_NUSES (final_move_label) += 1; - - } - - offset += cmp_bytes; - bytes_to_compare -= cmp_bytes; - } - - if (equality_compare_rest) - { - /* Update pointers past what has been compared already. */ - src1 = adjust_address (orig_src1, load_mode, offset); - src2 = adjust_address (orig_src2, load_mode, offset); - - if (!REG_P (XEXP (src1, 0))) - { - rtx src1_reg = copy_addr_to_reg (XEXP (src1, 0)); - src1 = replace_equiv_address (src1, src1_reg); - } - set_mem_size (src1, cmp_bytes); - - if (!REG_P (XEXP (src2, 0))) - { - rtx src2_reg = copy_addr_to_reg (XEXP (src2, 0)); - src2 = replace_equiv_address (src2, src2_reg); - } - set_mem_size (src2, cmp_bytes); - - /* Construct call to strcmp/strncmp to compare the rest of the string. */ - if (no_length) - { - tree fun = builtin_decl_explicit (BUILT_IN_STRCMP); - emit_library_call_value (XEXP (DECL_RTL (fun), 0), - target, LCT_NORMAL, GET_MODE (target), 2, - force_reg (Pmode, XEXP (src1, 0)), Pmode, - force_reg (Pmode, XEXP (src2, 0)), Pmode); - } - else - { - rtx len_rtx; - if (TARGET_64BIT) - len_rtx = gen_reg_rtx (DImode); - else - len_rtx = gen_reg_rtx (SImode); - - emit_move_insn (len_rtx, GEN_INT (bytes - compare_length)); - tree fun = builtin_decl_explicit (BUILT_IN_STRNCMP); - emit_library_call_value (XEXP (DECL_RTL (fun), 0), - target, LCT_NORMAL, GET_MODE (target), 3, - force_reg (Pmode, XEXP (src1, 0)), Pmode, - force_reg (Pmode, XEXP (src2, 0)), Pmode, - len_rtx, GET_MODE (len_rtx)); - } - - rtx fin_ref = gen_rtx_LABEL_REF (VOIDmode, final_label); - rtx jmp = emit_jump_insn (gen_rtx_SET (pc_rtx, fin_ref)); - JUMP_LABEL (jmp) = final_label; - LABEL_NUSES (final_label) += 1; - emit_barrier (); - } - - if (cleanup_label) - emit_label (cleanup_label); - - /* Generate the final sequence that identifies the differing - byte and generates the final result, taking into account - zero bytes: - - cmpb cmpb_result1, src1, src2 - cmpb cmpb_result2, src1, zero - orc cmpb_result1, cmp_result1, cmpb_result2 - cntlzd get bit of first zero/diff byte - addi convert for rldcl use - rldcl rldcl extract diff/zero byte - subf subtract for final result - */ - - rtx cmpb_diff = gen_reg_rtx (word_mode); - rtx cmpb_zero = gen_reg_rtx (word_mode); - rtx rot_amt = gen_reg_rtx (word_mode); - rtx zero_reg = gen_reg_rtx (word_mode); - - rtx rot1_1 = gen_reg_rtx (word_mode); - rtx rot1_2 = gen_reg_rtx (word_mode); - rtx rot2_1 = gen_reg_rtx (word_mode); - rtx rot2_2 = gen_reg_rtx (word_mode); - - if (word_mode == SImode) - { - emit_insn (gen_cmpbsi3 (cmpb_diff, tmp_reg_src1, tmp_reg_src2)); - emit_insn (gen_movsi (zero_reg, GEN_INT (0))); - emit_insn (gen_cmpbsi3 (cmpb_zero, tmp_reg_src1, zero_reg)); - emit_insn (gen_one_cmplsi2 (cmpb_diff,cmpb_diff)); - emit_insn (gen_iorsi3 (cmpb_diff, cmpb_diff, cmpb_zero)); - emit_insn (gen_clzsi2 (rot_amt, cmpb_diff)); - emit_insn (gen_addsi3 (rot_amt, rot_amt, GEN_INT (8))); - emit_insn (gen_rotlsi3 (rot1_1, tmp_reg_src1, - gen_lowpart (SImode, rot_amt))); - emit_insn (gen_andsi3_mask (rot1_2, rot1_1, GEN_INT (0xff))); - emit_insn (gen_rotlsi3 (rot2_1, tmp_reg_src2, - gen_lowpart (SImode, rot_amt))); - emit_insn (gen_andsi3_mask (rot2_2, rot2_1, GEN_INT (0xff))); - emit_insn (gen_subsi3 (result_reg, rot1_2, rot2_2)); - } - else - { - emit_insn (gen_cmpbdi3 (cmpb_diff, tmp_reg_src1, tmp_reg_src2)); - emit_insn (gen_movdi (zero_reg, GEN_INT (0))); - emit_insn (gen_cmpbdi3 (cmpb_zero, tmp_reg_src1, zero_reg)); - emit_insn (gen_one_cmpldi2 (cmpb_diff,cmpb_diff)); - emit_insn (gen_iordi3 (cmpb_diff, cmpb_diff, cmpb_zero)); - emit_insn (gen_clzdi2 (rot_amt, cmpb_diff)); - emit_insn (gen_adddi3 (rot_amt, rot_amt, GEN_INT (8))); - emit_insn (gen_rotldi3 (rot1_1, tmp_reg_src1, - gen_lowpart (SImode, rot_amt))); - emit_insn (gen_anddi3_mask (rot1_2, rot1_1, GEN_INT (0xff))); - emit_insn (gen_rotldi3 (rot2_1, tmp_reg_src2, - gen_lowpart (SImode, rot_amt))); - emit_insn (gen_anddi3_mask (rot2_2, rot2_1, GEN_INT (0xff))); - emit_insn (gen_subdi3 (result_reg, rot1_2, rot2_2)); - } - - emit_label (final_move_label); - emit_insn (gen_movsi (target, - gen_lowpart (SImode, result_reg))); - emit_label (final_label); - return true; -} - -/* Expand a block move operation, and return 1 if successful. Return 0 - if we should let the compiler generate normal code. - - operands[0] is the destination - operands[1] is the source - operands[2] is the length - operands[3] is the alignment */ - -#define MAX_MOVE_REG 4 - -int -expand_block_move (rtx operands[]) -{ - rtx orig_dest = operands[0]; - rtx orig_src = operands[1]; - rtx bytes_rtx = operands[2]; - rtx align_rtx = operands[3]; - int constp = (GET_CODE (bytes_rtx) == CONST_INT); - int align; - int bytes; - int offset; - int move_bytes; - rtx stores[MAX_MOVE_REG]; - int num_reg = 0; - - /* If this is not a fixed size move, just call memcpy */ - if (! constp) - return 0; - - /* This must be a fixed size alignment */ - gcc_assert (GET_CODE (align_rtx) == CONST_INT); - align = INTVAL (align_rtx) * BITS_PER_UNIT; - - /* Anything to move? */ - bytes = INTVAL (bytes_rtx); - if (bytes <= 0) - return 1; - - if (bytes > rs6000_block_move_inline_limit) - return 0; - - for (offset = 0; bytes > 0; offset += move_bytes, bytes -= move_bytes) - { - union { - rtx (*movmemsi) (rtx, rtx, rtx, rtx); - rtx (*mov) (rtx, rtx); - } gen_func; - machine_mode mode = BLKmode; - rtx src, dest; - - /* Altivec first, since it will be faster than a string move - when it applies, and usually not significantly larger. */ - if (TARGET_ALTIVEC && bytes >= 16 && align >= 128) - { - move_bytes = 16; - mode = V4SImode; - gen_func.mov = gen_movv4si; - } - else if (TARGET_STRING - && bytes > 24 /* move up to 32 bytes at a time */ - && ! fixed_regs[5] - && ! fixed_regs[6] - && ! fixed_regs[7] - && ! fixed_regs[8] - && ! fixed_regs[9] - && ! fixed_regs[10] - && ! fixed_regs[11] - && ! fixed_regs[12]) - { - move_bytes = (bytes > 32) ? 32 : bytes; - gen_func.movmemsi = gen_movmemsi_8reg; - } - else if (TARGET_STRING - && bytes > 16 /* move up to 24 bytes at a time */ - && ! fixed_regs[5] - && ! fixed_regs[6] - && ! fixed_regs[7] - && ! fixed_regs[8] - && ! fixed_regs[9] - && ! fixed_regs[10]) - { - move_bytes = (bytes > 24) ? 24 : bytes; - gen_func.movmemsi = gen_movmemsi_6reg; - } - else if (TARGET_STRING - && bytes > 8 /* move up to 16 bytes at a time */ - && ! fixed_regs[5] - && ! fixed_regs[6] - && ! fixed_regs[7] - && ! fixed_regs[8]) - { - move_bytes = (bytes > 16) ? 16 : bytes; - gen_func.movmemsi = gen_movmemsi_4reg; - } - else if (bytes >= 8 && TARGET_POWERPC64 - && (align >= 64 || !STRICT_ALIGNMENT)) - { - move_bytes = 8; - mode = DImode; - gen_func.mov = gen_movdi; - if (offset == 0 && align < 64) - { - rtx addr; - - /* If the address form is reg+offset with offset not a - multiple of four, reload into reg indirect form here - rather than waiting for reload. This way we get one - reload, not one per load and/or store. */ - addr = XEXP (orig_dest, 0); - if ((GET_CODE (addr) == PLUS || GET_CODE (addr) == LO_SUM) - && GET_CODE (XEXP (addr, 1)) == CONST_INT - && (INTVAL (XEXP (addr, 1)) & 3) != 0) - { - addr = copy_addr_to_reg (addr); - orig_dest = replace_equiv_address (orig_dest, addr); - } - addr = XEXP (orig_src, 0); - if ((GET_CODE (addr) == PLUS || GET_CODE (addr) == LO_SUM) - && GET_CODE (XEXP (addr, 1)) == CONST_INT - && (INTVAL (XEXP (addr, 1)) & 3) != 0) - { - addr = copy_addr_to_reg (addr); - orig_src = replace_equiv_address (orig_src, addr); - } - } - } - else if (TARGET_STRING && bytes > 4 && !TARGET_POWERPC64) - { /* move up to 8 bytes at a time */ - move_bytes = (bytes > 8) ? 8 : bytes; - gen_func.movmemsi = gen_movmemsi_2reg; - } - else if (bytes >= 4 && (align >= 32 || !STRICT_ALIGNMENT)) - { /* move 4 bytes */ - move_bytes = 4; - mode = SImode; - gen_func.mov = gen_movsi; - } - else if (bytes >= 2 && (align >= 16 || !STRICT_ALIGNMENT)) - { /* move 2 bytes */ - move_bytes = 2; - mode = HImode; - gen_func.mov = gen_movhi; - } - else if (TARGET_STRING && bytes > 1) - { /* move up to 4 bytes at a time */ - move_bytes = (bytes > 4) ? 4 : bytes; - gen_func.movmemsi = gen_movmemsi_1reg; - } - else /* move 1 byte at a time */ - { - move_bytes = 1; - mode = QImode; - gen_func.mov = gen_movqi; - } - - src = adjust_address (orig_src, mode, offset); - dest = adjust_address (orig_dest, mode, offset); - - if (mode != BLKmode) - { - rtx tmp_reg = gen_reg_rtx (mode); - - emit_insn ((*gen_func.mov) (tmp_reg, src)); - stores[num_reg++] = (*gen_func.mov) (dest, tmp_reg); - } - - if (mode == BLKmode || num_reg >= MAX_MOVE_REG || bytes == move_bytes) - { - int i; - for (i = 0; i < num_reg; i++) - emit_insn (stores[i]); - num_reg = 0; - } - - if (mode == BLKmode) - { - /* Move the address into scratch registers. The movmemsi - patterns require zero offset. */ - if (!REG_P (XEXP (src, 0))) - { - rtx src_reg = copy_addr_to_reg (XEXP (src, 0)); - src = replace_equiv_address (src, src_reg); - } - set_mem_size (src, move_bytes); - - if (!REG_P (XEXP (dest, 0))) - { - rtx dest_reg = copy_addr_to_reg (XEXP (dest, 0)); - dest = replace_equiv_address (dest, dest_reg); - } - set_mem_size (dest, move_bytes); - - emit_insn ((*gen_func.movmemsi) (dest, src, - GEN_INT (move_bytes & 31), - align_rtx)); - } - } - - return 1; -} - - -/* Return a string to perform a load_multiple operation. - operands[0] is the vector. - operands[1] is the source address. - operands[2] is the first destination register. */ - -const char * -rs6000_output_load_multiple (rtx operands[3]) -{ - /* We have to handle the case where the pseudo used to contain the address - is assigned to one of the output registers. */ - int i, j; - int words = XVECLEN (operands[0], 0); - rtx xop[10]; - - if (XVECLEN (operands[0], 0) == 1) - return "lwz %2,0(%1)"; - - for (i = 0; i < words; i++) - if (refers_to_regno_p (REGNO (operands[2]) + i, operands[1])) - { - if (i == words-1) - { - xop[0] = GEN_INT (4 * (words-1)); - xop[1] = operands[1]; - xop[2] = operands[2]; - output_asm_insn ("lswi %2,%1,%0\n\tlwz %1,%0(%1)", xop); - return ""; - } - else if (i == 0) - { - xop[0] = GEN_INT (4 * (words-1)); - xop[1] = operands[1]; - xop[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); - output_asm_insn ("addi %1,%1,4\n\tlswi %2,%1,%0\n\tlwz %1,-4(%1)", xop); - return ""; - } - else - { - for (j = 0; j < words; j++) - if (j != i) - { - xop[0] = GEN_INT (j * 4); - xop[1] = operands[1]; - xop[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + j); - output_asm_insn ("lwz %2,%0(%1)", xop); - } - xop[0] = GEN_INT (i * 4); - xop[1] = operands[1]; - output_asm_insn ("lwz %1,%0(%1)", xop); - return ""; - } - } - - return "lswi %2,%1,%N0"; -} - /* A validation routine: say whether CODE, a condition code, and MODE match. The other alternatives either don't make sense or should @@ -23123,7 +21753,7 @@ print_operand (FILE *file, rtx x, int code) } return; - /* Print AltiVec or SPE memory operand. */ + /* Print AltiVec memory operand. */ case 'y': { rtx tmp; @@ -26169,10 +24799,6 @@ rs6000_savres_strategy (rs6000_stack_t *info, +---------------------------------------+ | Save area for VRSAVE register (Z) | 8+P+A+V+L+X+W+Y +---------------------------------------+ - | SPE: area for 64-bit GP registers | - +---------------------------------------+ - | SPE alignment padding | - +---------------------------------------+ | saved CR (C) | 8+P+A+V+L+X+W+Y+Z +---------------------------------------+ | Save area for GP registers (G) | 8+P+A+V+L+X+W+Y+Z+C @@ -29970,7 +28596,6 @@ rs6000_emit_epilogue (int sibcall) if (regno == INVALID_REGNUM) break; - /* Note: possible use of r0 here to address SPE regs. */ mem = gen_frame_mem_offset (reg_mode, frame_reg_rtx, info->ehrd_offset + frame_off + reg_size * (int) i); @@ -36817,7 +35442,7 @@ altivec_expand_vec_perm_const (rtx operands[4]) (BYTES_BIG_ENDIAN ? CODE_FOR_altivec_vmrglw_direct : CODE_FOR_altivec_vmrghw_direct), { 8, 9, 10, 11, 24, 25, 26, 27, 12, 13, 14, 15, 28, 29, 30, 31 } }, - { OPTION_MASK_P8_VECTOR, CODE_FOR_p8_vmrgew, + { OPTION_MASK_P8_VECTOR, CODE_FOR_p8_vmrgew_v4si, { 0, 1, 2, 3, 16, 17, 18, 19, 8, 9, 10, 11, 24, 25, 26, 27 } }, { OPTION_MASK_P8_VECTOR, CODE_FOR_p8_vmrgow, { 4, 5, 6, 7, 20, 21, 22, 23, 12, 13, 14, 15, 28, 29, 30, 31 } } @@ -37000,7 +35625,7 @@ altivec_expand_vec_perm_const (rtx operands[4]) return false; } -/* Expand a Paired Single, VSX Permute Doubleword, or SPE constant permutation. +/* Expand a Paired Single or VSX Permute Doubleword constant permutation. Return true if we match an efficient implementation. */ static bool @@ -37227,10 +35852,8 @@ rs6000_parallel_return (machine_mode mode, /* Target hook for TARGET_FUNCTION_VALUE. - On the SPE, both FPs and vectors are returned in r3. - - On RS/6000 an integer value is in r3 and a floating-point value is in - fp1, unless -msoft-float. */ + An integer value is in r3 and a floating-point value is in fp1, + unless -msoft-float. */ static rtx rs6000_function_value (const_tree valtype, @@ -37442,7 +36065,7 @@ rs6000_initial_elimination_offset (int from, int to) return offset; } -/* Fill in sizes for SPE register high parts in table used by unwinder. */ +/* Fill in sizes of registers used by unwinder. */ static void rs6000_init_dwarf_reg_sizes_extra (tree address) @@ -42408,6 +41031,49 @@ rs6000_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update) *update = build2 (COMPOUND_EXPR, void_type_node, update_mffs, update_mtfsf); } +void +rs6000_generate_float2_code (bool signed_convert, rtx dst, rtx src1, rtx src2) +{ + rtx rtx_tmp0, rtx_tmp1, rtx_tmp2, rtx_tmp3; + + rtx_tmp0 = gen_reg_rtx (V2DImode); + rtx_tmp1 = gen_reg_rtx (V2DImode); + + /* The destination of the vmrgew instruction layout is: + rtx_tmp2[0] rtx_tmp3[0] rtx_tmp2[1] rtx_tmp3[0]. + Setup rtx_tmp0 and rtx_tmp1 to ensure the order of the elements after the + vmrgew instruction will be correct. */ + if (VECTOR_ELT_ORDER_BIG) + { + emit_insn (gen_vsx_xxpermdi_v2di_be (rtx_tmp0, src1, src2, GEN_INT (0))); + emit_insn (gen_vsx_xxpermdi_v2di_be (rtx_tmp1, src1, src2, GEN_INT (3))); + } + else + { + emit_insn (gen_vsx_xxpermdi_v2di (rtx_tmp0, src1, src2, GEN_INT (3))); + emit_insn (gen_vsx_xxpermdi_v2di (rtx_tmp1, src1, src2, GEN_INT (0))); + } + + rtx_tmp2 = gen_reg_rtx (V4SFmode); + rtx_tmp3 = gen_reg_rtx (V4SFmode); + + if (signed_convert) + { + emit_insn (gen_vsx_xvcvsxdsp (rtx_tmp2, rtx_tmp0)); + emit_insn (gen_vsx_xvcvsxdsp (rtx_tmp3, rtx_tmp1)); + } + else + { + emit_insn (gen_vsx_xvcvuxdsp (rtx_tmp2, rtx_tmp0)); + emit_insn (gen_vsx_xvcvuxdsp (rtx_tmp3, rtx_tmp1)); + } + + if (VECTOR_ELT_ORDER_BIG) + emit_insn (gen_p8_vmrgew_v4sf (dst, rtx_tmp2, rtx_tmp3)); + else + emit_insn (gen_p8_vmrgew_v4sf (dst, rtx_tmp3, rtx_tmp2)); +} + /* Implement the TARGET_OPTAB_SUPPORTED_P hook. */ static bool diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index edfa54603f7..9b73be1e176 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -698,8 +698,8 @@ extern int rs6000_vector_align[]; /* For power systems, we want to enable Altivec and VSX builtins even if the user did not use -maltivec or -mvsx to allow the builtins to be used inside of #pragma GCC target or the target attribute to change the code level for a - given system. The SPE and Paired builtins are only enabled if you configure - the compiler for those builtins, and those machines don't support altivec or + given system. The Paired builtins are only enabled if you configure the + compiler for those builtins, and those machines don't support altivec or VSX. */ #define TARGET_EXTRA_BUILTINS (!TARGET_PAIRED_FLOAT \ @@ -1330,13 +1330,6 @@ enum data_align { align_abi, align_opt, align_both }; #define LOGICAL_OP_NON_SHORT_CIRCUIT 0 -/* A fixed register used at epilogue generation to address SPE registers - with negative offsets. The 64-bit load/store instructions on the SPE - only take positive offsets (and small ones at that), so we need to - reserve a register for consing up negative offsets. */ - -#define FIXED_SCRATCH 0 - /* Specify the registers used for certain standard purposes. The values of these macros are register numbers. */ @@ -2560,7 +2553,6 @@ extern int frame_pointer_needed; #define RS6000_BTC_TERNARY 0x00000003 /* normal ternary function. */ #define RS6000_BTC_PREDICATE 0x00000004 /* predicate function. */ #define RS6000_BTC_ABS 0x00000005 /* Altivec/VSX ABS function. */ -#define RS6000_BTC_EVSEL 0x00000006 /* SPE EVSEL function. */ #define RS6000_BTC_DST 0x00000007 /* Altivec DST function. */ #define RS6000_BTC_TYPE_MASK 0x0000000f /* Mask to isolate types */ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index dedb2e3c193..f78dbf913ec 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -690,7 +690,9 @@ ;; Iterator to optimize the following cases: ;; D-form load to FPR register & move to Altivec register ;; Move Altivec register to FPR register and store -(define_mode_iterator ALTIVEC_DFORM [DI DF SF]) +(define_mode_iterator ALTIVEC_DFORM [DF + SF + (DI "TARGET_POWERPC64")]) ;; Start with fixed-point load and store insns. Here we put only the more @@ -1631,7 +1633,7 @@ /* Adding a constant to r0 is not a valid insn, so use a different strategy in that case. */ - if (REGNO (operands[1]) == 0 || REGNO (tmp) == 0) + if (reg_or_subregno (operands[1]) == 0 || reg_or_subregno (tmp) == 0) { if (operands[0] == operands[1]) FAIL; @@ -7391,8 +7393,8 @@ ;; except for 0.0 which can be created on VSX with an xor instruction. (define_insn "*mov<mode>_hardfloat32" - [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,<f64_av>,Z,<f64_p9>,wY,<f64_vsx>,<f64_vsx>,!r,Y,r,!r") - (match_operand:FMOVE64 1 "input_operand" "d,m,d,Z,<f64_av>,wY,<f64_p9>,<f64_vsx>,<zero_fp>,<zero_fp>,r,Y,r"))] + [(set (match_operand:FMOVE64 0 "nonimmediate_operand" "=m,d,d,<f64_p9>,wY,<f64_av>,Z,<f64_vsx>,<f64_vsx>,!r,Y,r,!r") + (match_operand:FMOVE64 1 "input_operand" "d,m,d,wY,<f64_p9>,Z,<f64_av>,<f64_vsx>,<zero_fp>,<zero_fp>,r,Y,r"))] "! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT && (gpc_reg_operand (operands[0], <MODE>mode) || gpc_reg_operand (operands[1], <MODE>mode))" @@ -7400,10 +7402,10 @@ stfd%U0%X0 %1,%0 lfd%U1%X1 %0,%1 fmr %0,%1 - lxsd%U1x %x0,%y1 - stxsd%U0x %x1,%y0 lxsd %0,%1 stxsd %1,%0 + lxsd%U1x %x0,%y1 + stxsd%U0x %x1,%y0 xxlor %x0,%x1,%x1 xxlxor %x0,%x0,%x0 # @@ -13967,13 +13969,13 @@ ;; LXSDX 32,3,9 (define_peephole2 - [(match_scratch:DI 0 "b") + [(match_scratch:P 0 "b") (set (match_operand:ALTIVEC_DFORM 1 "fpr_reg_operand") (match_operand:ALTIVEC_DFORM 2 "simple_offsettable_mem_operand")) (set (match_operand:ALTIVEC_DFORM 3 "altivec_register_operand") (match_dup 1))] - "TARGET_VSX && TARGET_POWERPC64 && TARGET_UPPER_REGS_<MODE> - && !TARGET_P9_DFORM_SCALAR && peep2_reg_dead_p (2, operands[1])" + "TARGET_VSX && TARGET_UPPER_REGS_<MODE> && !TARGET_P9_DFORM_SCALAR + && peep2_reg_dead_p (2, operands[1])" [(set (match_dup 0) (match_dup 4)) (set (match_dup 3) @@ -13988,7 +13990,7 @@ add_op0 = XEXP (addr, 0); add_op1 = XEXP (addr, 1); gcc_assert (REG_P (add_op0)); - new_addr = gen_rtx_PLUS (DImode, add_op0, tmp_reg); + new_addr = gen_rtx_PLUS (Pmode, add_op0, tmp_reg); operands[4] = add_op1; operands[5] = change_address (mem, <MODE>mode, new_addr); @@ -14004,13 +14006,13 @@ ;; STXSDX 32,3,9 (define_peephole2 - [(match_scratch:DI 0 "b") + [(match_scratch:P 0 "b") (set (match_operand:ALTIVEC_DFORM 1 "fpr_reg_operand") (match_operand:ALTIVEC_DFORM 2 "altivec_register_operand")) (set (match_operand:ALTIVEC_DFORM 3 "simple_offsettable_mem_operand") (match_dup 1))] - "TARGET_VSX && TARGET_POWERPC64 && TARGET_UPPER_REGS_<MODE> - && !TARGET_P9_DFORM_SCALAR && peep2_reg_dead_p (2, operands[1])" + "TARGET_VSX && TARGET_UPPER_REGS_<MODE> && !TARGET_P9_DFORM_SCALAR + && peep2_reg_dead_p (2, operands[1])" [(set (match_dup 0) (match_dup 4)) (set (match_dup 5) @@ -14025,7 +14027,7 @@ add_op0 = XEXP (addr, 0); add_op1 = XEXP (addr, 1); gcc_assert (REG_P (add_op0)); - new_addr = gen_rtx_PLUS (DImode, add_op0, tmp_reg); + new_addr = gen_rtx_PLUS (Pmode, add_op0, tmp_reg); operands[4] = add_op1; operands[5] = change_address (mem, <MODE>mode, new_addr); diff --git a/gcc/config/rs6000/t-linux b/gcc/config/rs6000/t-linux index 4cb63bdca5d..acfde1f48ae 100644 --- a/gcc/config/rs6000/t-linux +++ b/gcc/config/rs6000/t-linux @@ -4,12 +4,8 @@ ifeq (,$(filter $(with_cpu),$(SOFT_FLOAT_CPUS))$(findstring soft,$(with_float))) ifneq (,$(findstring powerpc64,$(target))) MULTILIB_OSDIRNAMES := .=../lib64$(call if_multiarch,:powerpc64-linux-gnu) else -ifneq (,$(findstring spe,$(target))) -MULTIARCH_DIRNAME := powerpc-linux-gnuspe$(if $(findstring 8548,$(with_cpu)),,v1) -else MULTIARCH_DIRNAME := powerpc-linux-gnu endif -endif ifneq (,$(findstring powerpcle,$(target))) MULTIARCH_DIRNAME := $(subst -linux,le-linux,$(MULTIARCH_DIRNAME)) endif diff --git a/gcc/config/rs6000/t-rs6000 b/gcc/config/rs6000/t-rs6000 index a1dca3c42b2..a47091ad1b4 100644 --- a/gcc/config/rs6000/t-rs6000 +++ b/gcc/config/rs6000/t-rs6000 @@ -26,6 +26,10 @@ rs6000-c.o: $(srcdir)/config/rs6000/rs6000-c.c $(COMPILE) $< $(POSTCOMPILE) +rs6000-string.o: $(srcdir)/config/rs6000/rs6000-string.c + $(COMPILE) $< + $(POSTCOMPILE) + $(srcdir)/config/rs6000/rs6000-tables.opt: $(srcdir)/config/rs6000/genopt.sh \ $(srcdir)/config/rs6000/rs6000-cpus.def $(SHELL) $(srcdir)/config/rs6000/genopt.sh $(srcdir)/config/rs6000 > \ diff --git a/gcc/config/rs6000/t-rtems b/gcc/config/rs6000/t-rtems index 723c6a37aaa..8290f5c5bdd 100644 --- a/gcc/config/rs6000/t-rtems +++ b/gcc/config/rs6000/t-rtems @@ -33,8 +33,8 @@ MULTILIB_DIRNAMES += m32 MULTILIB_OPTIONS += msoft-float MULTILIB_DIRNAMES += nof -MULTILIB_OPTIONS += mno-spe/mno-altivec -MULTILIB_DIRNAMES += nospe noaltivec +MULTILIB_OPTIONS += mno-altivec +MULTILIB_DIRNAMES += noaltivec MULTILIB_MATCHES += ${MULTILIB_MATCHES_ENDIAN} MULTILIB_MATCHES += ${MULTILIB_MATCHES_SYSV} @@ -68,7 +68,7 @@ MULTILIB_REQUIRED += mcpu=604/msoft-float MULTILIB_REQUIRED += mcpu=7400 MULTILIB_REQUIRED += mcpu=7400/msoft-float MULTILIB_REQUIRED += mcpu=8540 -MULTILIB_REQUIRED += mcpu=8540/msoft-float/mno-spe +MULTILIB_REQUIRED += mcpu=8540/msoft-float MULTILIB_REQUIRED += mcpu=860 MULTILIB_REQUIRED += mcpu=e6500/m32 MULTILIB_REQUIRED += mcpu=e6500/m32/msoft-float/mno-altivec diff --git a/gcc/config/rs6000/t-spe b/gcc/config/rs6000/t-spe deleted file mode 100644 index fe5de534be2..00000000000 --- a/gcc/config/rs6000/t-spe +++ /dev/null @@ -1,72 +0,0 @@ -# Multilibs for e500 -# -# Copyright (C) 2003-2017 Free Software Foundation, Inc. -# -# This file is part of GCC. -# -# GCC is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GCC is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GCC; see the file COPYING3. If not see -# <http://www.gnu.org/licenses/>. - -# What we really want are these variants: -# -mcpu=7400 -# -mcpu=7400 -maltivec -mabi=altivec -# -mcpu=7400 -msoft-float -# -msoft-float -# -mno-spe -mabi=no-spe -# -mno-spe -mabi=no-spe -mno-isel -# so we'll need to create exceptions later below. - -MULTILIB_OPTIONS = mcpu=7400 \ - maltivec \ - mabi=altivec \ - msoft-float \ - mno-spe \ - mabi=no-spe \ - mno-isel \ - mlittle - -MULTILIB_DIRNAMES = mpc7400 altivec abi-altivec \ - nof no-spe no-abi-spe no-isel le - -MULTILIB_EXCEPTIONS = maltivec mabi=altivec mno-spe mabi=no-spe mno-isel \ - maltivec/mabi=altivec \ - mcpu=7400/maltivec \ - mcpu=7400/mabi=altivec \ - *mcpu=7400/*mno-spe* \ - *mcpu=7400/*mabi=no-spe* \ - *mcpu=7400/*mno-isel* \ - *maltivec/*msoft-float* \ - *maltivec/*mno-spe* \ - *maltivec/*mabi=no-spe* \ - *maltivec/*mno-isel* \ - *mabi=altivec/*msoft-float* \ - *mabi=altivec/*mno-spe* \ - *mabi=altivec/*mabi=no-spe* \ - *mabi=altivec/*mno-isel* \ - *msoft-float/*mno-spe* \ - *msoft-float/*mabi=no-spe* \ - *msoft-float/*mno-isel* \ - mno-spe/mno-isel \ - mabi=no-spe/mno-isel \ - mno-isel/mlittle \ - mabi=no-spe/mno-isel/mlittle \ - mno-spe/mlittle \ - mabi=spe/mlittle \ - mcpu=7400/mabi=altivec/mlittle \ - mcpu=7400/maltivec/mlittle \ - mabi=no-spe/mlittle \ - mno-spe/mno-isel/mlittle \ - mabi=altivec/mlittle \ - maltivec/mlittle \ - maltivec/mabi=altivec/mlittle diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 141aa4237c3..4d73f0abe0a 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -21,6 +21,9 @@ ;; Iterator for comparison types (define_code_iterator CMP_TEST [eq lt gt unordered]) +;; Mode attribute for vector floate and floato conversions +(define_mode_attr VF_sxddp [(V2DI "sxd") (V2DF "dp")]) + ;; Iterator for both scalar and vector floating point types supported by VSX (define_mode_iterator VSX_B [DF V4SF V2DF]) @@ -331,6 +334,14 @@ UNSPEC_VSX_CVUXDSP UNSPEC_VSX_CVSPSXDS UNSPEC_VSX_CVSPUXDS + UNSPEC_VSX_CVSXWSP + UNSPEC_VSX_CVUXWSP + UNSPEC_VSX_FLOAT2 + UNSPEC_VSX_UNS_FLOAT2 + UNSPEC_VSX_FLOATE + UNSPEC_VSX_UNS_FLOATE + UNSPEC_VSX_FLOATO + UNSPEC_VSX_UNS_FLOATO UNSPEC_VSX_TDIV UNSPEC_VSX_TSQRT UNSPEC_VSX_SET @@ -1976,6 +1987,156 @@ "xvcvspuxds %x0,%x1" [(set_attr "type" "vecdouble")]) +(define_insn "vsx_xvcvsxwsp" + [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa") + (unspec:V4SF [(match_operand:V4SI 1 "vsx_register_operand" "wa")] + UNSPEC_VSX_CVSXWSP))] + "VECTOR_UNIT_VSX_P (V4SFmode)" + "xvcvsxwsp %x0,%x1" + [(set_attr "type" "vecfloat")]) + +(define_insn "vsx_xvcvuxwsp" + [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa") + (unspec:V4SF[(match_operand:V4SI 1 "vsx_register_operand" "wa")] + UNSPEC_VSX_CVUXWSP))] + "VECTOR_UNIT_VSX_P (V4SFmode)" + "xvcvuxwsp %x0,%x1" + [(set_attr "type" "vecfloat")]) + +;; Generate float2 +;; convert two long long signed ints to float +(define_expand "float2_v2di" + [(use (match_operand:V4SF 0 "register_operand" "=wa")) + (use (match_operand:V2DI 1 "register_operand" "wa")) + (use (match_operand:V2DI 2 "register_operand" "wa"))] + "VECTOR_UNIT_VSX_P (V4SFmode)" +{ + rtx rtx_src1, rtx_src2, rtx_dst; + + rtx_dst = operands[0]; + rtx_src1 = operands[1]; + rtx_src2 = operands[2]; + + rs6000_generate_float2_code (true, rtx_dst, rtx_src1, rtx_src2); + DONE; +}) + +;; Generate uns_float2 +;; convert two long long unsigned ints to float +(define_expand "uns_float2_v2di" + [(use (match_operand:V4SF 0 "register_operand" "=wa")) + (use (match_operand:V2DI 1 "register_operand" "wa")) + (use (match_operand:V2DI 2 "register_operand" "wa"))] + "VECTOR_UNIT_VSX_P (V4SFmode)" +{ + rtx rtx_src1, rtx_src2, rtx_dst; + + rtx_dst = operands[0]; + rtx_src1 = operands[1]; + rtx_src2 = operands[2]; + + rs6000_generate_float2_code (true, rtx_dst, rtx_src1, rtx_src2); + DONE; +}) + +;; Generate floate +;; convert double or long long signed to float +;; (Only even words are valid, BE numbering) +(define_expand "floate<mode>" + [(use (match_operand:V4SF 0 "register_operand" "=wa")) + (use (match_operand:VSX_D 1 "register_operand" "wa"))] + "VECTOR_UNIT_VSX_P (V4SFmode)" +{ + if (VECTOR_ELT_ORDER_BIG) + { + /* Shift left one word to put even word correct location */ + rtx rtx_tmp; + rtx rtx_val = GEN_INT (4); + + rtx_tmp = gen_reg_rtx (V4SFmode); + emit_insn (gen_vsx_xvcv<VF_sxddp>sp (rtx_tmp, operands[1])); + emit_insn (gen_altivec_vsldoi_v4sf (operands[0], + rtx_tmp, rtx_tmp, rtx_val)); + } + else + emit_insn (gen_vsx_xvcv<VF_sxddp>sp (operands[0], operands[1])); + + DONE; +}) + +;; Generate uns_floate +;; convert long long unsigned to float +;; (Only even words are valid, BE numbering) +(define_expand "unsfloatev2di" + [(use (match_operand:V4SF 0 "register_operand" "=wa")) + (use (match_operand:V2DI 1 "register_operand" "wa"))] + "VECTOR_UNIT_VSX_P (V4SFmode)" +{ + if (VECTOR_ELT_ORDER_BIG) + { + /* Shift left one word to put even word correct location */ + rtx rtx_tmp; + rtx rtx_val = GEN_INT (4); + + rtx_tmp = gen_reg_rtx (V4SFmode); + emit_insn (gen_vsx_xvcvuxdsp (rtx_tmp, operands[1])); + emit_insn (gen_altivec_vsldoi_v4sf (operands[0], + rtx_tmp, rtx_tmp, rtx_val)); + } + else + emit_insn (gen_vsx_xvcvuxdsp (operands[0], operands[1])); + + DONE; +}) + +;; Generate floato +;; convert double or long long signed to float +;; Only odd words are valid, BE numbering) +(define_expand "floato<mode>" + [(use (match_operand:V4SF 0 "register_operand" "=wa")) + (use (match_operand:VSX_D 1 "register_operand" "wa"))] + "VECTOR_UNIT_VSX_P (V4SFmode)" +{ + if (VECTOR_ELT_ORDER_BIG) + emit_insn (gen_vsx_xvcv<VF_sxddp>sp (operands[0], operands[1])); + else + { + /* Shift left one word to put odd word correct location */ + rtx rtx_tmp; + rtx rtx_val = GEN_INT (4); + + rtx_tmp = gen_reg_rtx (V4SFmode); + emit_insn (gen_vsx_xvcv<VF_sxddp>sp (rtx_tmp, operands[1])); + emit_insn (gen_altivec_vsldoi_v4sf (operands[0], + rtx_tmp, rtx_tmp, rtx_val)); + } + DONE; +}) + +;; Generate uns_floato +;; convert long long unsigned to float +;; (Only odd words are valid, BE numbering) +(define_expand "unsfloatov2di" + [(use (match_operand:V4SF 0 "register_operand" "=wa")) + (use (match_operand:V2DI 1 "register_operand" "wa"))] + "VECTOR_UNIT_VSX_P (V4SFmode)" +{ + if (VECTOR_ELT_ORDER_BIG) + emit_insn (gen_vsx_xvcvuxdsp (operands[0], operands[1])); + else + { + /* Shift left one word to put odd word correct location */ + rtx rtx_tmp; + rtx rtx_val = GEN_INT (4); + + rtx_tmp = gen_reg_rtx (V4SFmode); + emit_insn (gen_vsx_xvcvuxdsp (rtx_tmp, operands[1])); + emit_insn (gen_altivec_vsldoi_v4sf (operands[0], + rtx_tmp, rtx_tmp, rtx_val)); + } + DONE; +}) + ;; Only optimize (float (fix x)) -> frz if we are in fast-math mode, since ;; since the xvrdpiz instruction does not truncate the value if the floating ;; point value is < LONG_MIN or > LONG_MAX. @@ -3012,6 +3173,134 @@ } [(set_attr "type" "vecperm")]) +(define_insn_and_split "vsx_set_v4sf_p9" + [(set (match_operand:V4SF 0 "gpc_reg_operand" "=wa") + (unspec:V4SF + [(match_operand:V4SF 1 "gpc_reg_operand" "0") + (match_operand:SF 2 "gpc_reg_operand" "ww") + (match_operand:QI 3 "const_0_to_3_operand" "n")] + UNSPEC_VSX_SET)) + (clobber (match_scratch:SI 4 "=&wJwK"))] + "VECTOR_MEM_VSX_P (V4SFmode) && TARGET_P9_VECTOR && TARGET_VSX_SMALL_INTEGER + && TARGET_UPPER_REGS_DI && TARGET_POWERPC64" + "#" + "&& reload_completed" + [(set (match_dup 5) + (unspec:V4SF [(match_dup 2)] + UNSPEC_VSX_CVDPSPN)) + (parallel [(set (match_dup 4) + (vec_select:SI (match_dup 6) + (parallel [(match_dup 7)]))) + (clobber (scratch:SI))]) + (set (match_dup 8) + (unspec:V4SI [(match_dup 8) + (match_dup 4) + (match_dup 3)] + UNSPEC_VSX_SET))] +{ + unsigned int tmp_regno = reg_or_subregno (operands[4]); + + operands[5] = gen_rtx_REG (V4SFmode, tmp_regno); + operands[6] = gen_rtx_REG (V4SImode, tmp_regno); + operands[7] = GEN_INT (VECTOR_ELT_ORDER_BIG ? 1 : 2); + operands[8] = gen_rtx_REG (V4SImode, reg_or_subregno (operands[0])); +} + [(set_attr "type" "vecperm") + (set_attr "length" "12")]) + +;; Special case setting 0.0f to a V4SF element +(define_insn_and_split "*vsx_set_v4sf_p9_zero" + [(set (match_operand:V4SF 0 "gpc_reg_operand" "=wa") + (unspec:V4SF + [(match_operand:V4SF 1 "gpc_reg_operand" "0") + (match_operand:SF 2 "zero_fp_constant" "j") + (match_operand:QI 3 "const_0_to_3_operand" "n")] + UNSPEC_VSX_SET)) + (clobber (match_scratch:SI 4 "=&wJwK"))] + "VECTOR_MEM_VSX_P (V4SFmode) && TARGET_P9_VECTOR && TARGET_VSX_SMALL_INTEGER + && TARGET_UPPER_REGS_DI && TARGET_POWERPC64" + "#" + "&& reload_completed" + [(set (match_dup 4) + (const_int 0)) + (set (match_dup 5) + (unspec:V4SI [(match_dup 5) + (match_dup 4) + (match_dup 3)] + UNSPEC_VSX_SET))] +{ + operands[5] = gen_rtx_REG (V4SImode, reg_or_subregno (operands[0])); +} + [(set_attr "type" "vecperm") + (set_attr "length" "8")]) + +;; Optimize x = vec_insert (vec_extract (v2, n), v1, m) if n is the element +;; that is in the default scalar position (1 for big endian, 2 for little +;; endian). We just need to do an xxinsertw since the element is in the +;; correct location. + +(define_insn "*vsx_insert_extract_v4sf_p9" + [(set (match_operand:V4SF 0 "gpc_reg_operand" "=wa") + (unspec:V4SF + [(match_operand:V4SF 1 "gpc_reg_operand" "0") + (vec_select:SF (match_operand:V4SF 2 "gpc_reg_operand" "wa") + (parallel + [(match_operand:QI 3 "const_0_to_3_operand" "n")])) + (match_operand:QI 4 "const_0_to_3_operand" "n")] + UNSPEC_VSX_SET))] + "VECTOR_MEM_VSX_P (V4SFmode) && TARGET_P9_VECTOR && TARGET_VSX_SMALL_INTEGER + && TARGET_UPPER_REGS_DI && TARGET_POWERPC64 + && (INTVAL (operands[3]) == (VECTOR_ELT_ORDER_BIG ? 1 : 2))" +{ + int ele = INTVAL (operands[4]); + + if (!VECTOR_ELT_ORDER_BIG) + ele = GET_MODE_NUNITS (V4SFmode) - 1 - ele; + + operands[4] = GEN_INT (GET_MODE_SIZE (SFmode) * ele); + return "xxinsertw %x0,%x2,%4"; +} + [(set_attr "type" "vecperm")]) + +;; Optimize x = vec_insert (vec_extract (v2, n), v1, m) if n is not the element +;; that is in the default scalar position (1 for big endian, 2 for little +;; endian). Convert the insert/extract to int and avoid doing the conversion. + +(define_insn_and_split "*vsx_insert_extract_v4sf_p9_2" + [(set (match_operand:V4SF 0 "gpc_reg_operand" "=wa") + (unspec:V4SF + [(match_operand:V4SF 1 "gpc_reg_operand" "0") + (vec_select:SF (match_operand:V4SF 2 "gpc_reg_operand" "wa") + (parallel + [(match_operand:QI 3 "const_0_to_3_operand" "n")])) + (match_operand:QI 4 "const_0_to_3_operand" "n")] + UNSPEC_VSX_SET)) + (clobber (match_scratch:SI 5 "=&wJwK"))] + "VECTOR_MEM_VSX_P (V4SFmode) && VECTOR_MEM_VSX_P (V4SImode) + && TARGET_P9_VECTOR && TARGET_VSX_SMALL_INTEGER + && TARGET_UPPER_REGS_DI && TARGET_POWERPC64 + && (INTVAL (operands[3]) != (VECTOR_ELT_ORDER_BIG ? 1 : 2))" + "#" + "&& 1" + [(parallel [(set (match_dup 5) + (vec_select:SI (match_dup 6) + (parallel [(match_dup 3)]))) + (clobber (scratch:SI))]) + (set (match_dup 7) + (unspec:V4SI [(match_dup 8) + (match_dup 5) + (match_dup 4)] + UNSPEC_VSX_SET))] +{ + if (GET_CODE (operands[5]) == SCRATCH) + operands[5] = gen_reg_rtx (SImode); + + operands[6] = gen_lowpart (V4SImode, operands[2]); + operands[7] = gen_lowpart (V4SImode, operands[0]); + operands[8] = gen_lowpart (V4SImode, operands[1]); +} + [(set_attr "type" "vecperm")]) + ;; Expanders for builtins (define_expand "vsx_mergel_<mode>" [(use (match_operand:VSX_D 0 "vsx_register_operand" "")) diff --git a/gcc/config/rs6000/vxworks.h b/gcc/config/rs6000/vxworks.h index ccf6a666752..97cc349efa1 100644 --- a/gcc/config/rs6000/vxworks.h +++ b/gcc/config/rs6000/vxworks.h @@ -60,12 +60,6 @@ along with GCC; see the file COPYING3. If not see #define SUBTARGET_EXTRA_SPECS /* none needed */ -/* VxWorks and VxWorksAE (aka 653) expect different CPU values to designate - SPE on 8548. We define a dedicated macro for the base VxWorks here, which - the AE configuration will override. */ - -#define VXCPU_FOR_8548 "PPC85XX" - /* FIXME: The only reason we allow no -mcpu switch at all is because config-ml.in insists on a "." multilib. */ #define CPP_SPEC \ @@ -79,7 +73,7 @@ along with GCC; see the file COPYING3. If not see mcpu=604 : -DCPU=PPC604 ; \ mcpu=860 : -DCPU=PPC860 ; \ mcpu=8540: -DCPU=PPC85XX ; \ - mcpu=8548: -DCPU=" VXCPU_FOR_8548 "; \ + mcpu=8548: -DCPU=PPC85XX ; \ : -DCPU=PPC604 }}" \ VXWORKS_ADDITIONAL_CPP_SPEC diff --git a/gcc/config/rs6000/vxworksae.h b/gcc/config/rs6000/vxworksae.h index 27bf470828b..9f21e913aa7 100644 --- a/gcc/config/rs6000/vxworksae.h +++ b/gcc/config/rs6000/vxworksae.h @@ -18,10 +18,6 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ -/* VxWorksAE for E500V2 expects a specific CPU value to designate 8548. */ -#undef VXCPU_FOR_8548 -#define VXCPU_FOR_8548 "PPCE500V2" - /* This platform supports the probing method of stack checking and requires 4K of space for executing a possible last chance handler. */ #undef STACK_CHECK_PROTECT diff --git a/gcc/config/rs6000/vxworksmils.h b/gcc/config/rs6000/vxworksmils.h index 7b1e2cc4e4c..a14deb45d16 100644 --- a/gcc/config/rs6000/vxworksmils.h +++ b/gcc/config/rs6000/vxworksmils.h @@ -23,7 +23,3 @@ along with GCC; see the file COPYING3. If not see requires 4K of space for executing a possible last chance handler. */ #undef STACK_CHECK_PROTECT #define STACK_CHECK_PROTECT 4096 - -/* VxWorksMILS for E500V2 expects a specific CPU value to designate 8548. */ -#undef VXCPU_FOR_8548 -#define VXCPU_FOR_8548 "PPC85XX" diff --git a/gcc/config/sol2.h b/gcc/config/sol2.h index 1ae7f9f0e01..b8398d082a9 100644 --- a/gcc/config/sol2.h +++ b/gcc/config/sol2.h @@ -331,6 +331,11 @@ along with GCC; see the file COPYING3. If not see #endif #ifndef USE_GLD +/* Prefer native form with Solaris ld. */ +#define SYSROOT_SPEC "-z sysroot=%R" +#endif + +#ifndef USE_GLD /* With Sun ld, use mapfile to enforce direct binding to libgcc_s unwinder. */ #define LINK_LIBGCC_MAPFILE_SPEC \ "%{shared|shared-libgcc:-M %slibgcc-unwind.map}" diff --git a/gcc/config/sparc/driver-sparc.c b/gcc/config/sparc/driver-sparc.c index 9eca20dfebc..b96ef47ac60 100644 --- a/gcc/config/sparc/driver-sparc.c +++ b/gcc/config/sparc/driver-sparc.c @@ -57,6 +57,7 @@ static const struct cpu_names { { "UltraSPARC-T2+", "niagara2" }, { "SPARC-T3", "niagara3" }, { "SPARC-T4", "niagara4" }, + { "SPARC-T5", "niagara4" }, #else { "SuperSparc", "supersparc" }, { "HyperSparc", "hypersparc" }, @@ -73,6 +74,7 @@ static const struct cpu_names { { "UltraSparc T2", "niagara2" }, { "UltraSparc T3", "niagara3" }, { "UltraSparc T4", "niagara4" }, + { "UltraSparc T5", "niagara4" }, { "LEON", "leon3" }, #endif { "SPARC-M7", "niagara7" }, diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 95a64a41f98..790a0367b67 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -1341,7 +1341,6 @@ sparc_option_override (void) }; const struct cpu_table *cpu; unsigned int i; - int fpu; if (sparc_debug_string != NULL) { @@ -1433,8 +1432,6 @@ sparc_option_override (void) call_used_regs [i] = 1; } - fpu = target_flags & MASK_FPU; /* save current -mfpu status */ - /* Set the default CPU. */ if (!global_options_set.x_sparc_cpu_and_features) { @@ -1473,22 +1470,18 @@ sparc_option_override (void) #ifndef HAVE_AS_LEON & ~(MASK_LEON | MASK_LEON3) #endif + & ~(target_flags_explicit & MASK_FEATURES) ); - /* If -mfpu or -mno-fpu was explicitly used, don't override with - the processor default. */ - if (target_flags_explicit & MASK_FPU) - target_flags = (target_flags & ~MASK_FPU) | fpu; - - /* -mvis2 implies -mvis */ + /* -mvis2 implies -mvis. */ if (TARGET_VIS2) target_flags |= MASK_VIS; - /* -mvis3 implies -mvis2 and -mvis */ + /* -mvis3 implies -mvis2 and -mvis. */ if (TARGET_VIS3) target_flags |= MASK_VIS2 | MASK_VIS; - /* -mvis4 implies -mvis3, -mvis2 and -mvis */ + /* -mvis4 implies -mvis3, -mvis2 and -mvis. */ if (TARGET_VIS4) target_flags |= MASK_VIS3 | MASK_VIS2 | MASK_VIS; @@ -1499,15 +1492,14 @@ sparc_option_override (void) | MASK_FMAF); /* -mvis assumes UltraSPARC+, so we are sure v9 instructions - are available. - -m64 also implies v9. */ + are available; -m64 also implies v9. */ if (TARGET_VIS || TARGET_ARCH64) { target_flags |= MASK_V9; target_flags &= ~(MASK_V8 | MASK_SPARCLET | MASK_SPARCLITE); } - /* -mvis also implies -mv8plus on 32-bit */ + /* -mvis also implies -mv8plus on 32-bit. */ if (TARGET_VIS && ! TARGET_ARCH64) target_flags |= MASK_V8PLUS; diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 686a3d52193..581774e586b 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -423,10 +423,15 @@ extern enum cmodel sparc_cmodel; #define WCHAR_TYPE_SIZE 16 /* Mask of all CPU selection flags. */ -#define MASK_ISA \ - (MASK_SPARCLITE + MASK_SPARCLET \ +#define MASK_ISA \ + (MASK_SPARCLITE + MASK_SPARCLET + MASK_LEON + MASK_LEON3 \ + MASK_V8 + MASK_V9 + MASK_DEPRECATED_V8_INSNS) +/* Mask of all CPU feature flags. */ +#define MASK_FEATURES \ + (MASK_FPU + MASK_HARD_QUAD + MASK_VIS + MASK_VIS2 + MASK_VIS3 \ + + MASK_VIS4 + MASK_CBCOND + MASK_FMAF + MASK_POPC + MASK_SUBXC) + /* TARGET_HARD_MUL: Use 32-bit hardware multiply instructions but not %y. */ #define TARGET_HARD_MUL \ (TARGET_SPARCLITE || TARGET_SPARCLET \ diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 737bdb37543..5c5096bca2a 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -7098,7 +7098,10 @@ (define_expand "return" [(return)] "sparc_can_use_return_insn_p ()" - "") +{ + if (cfun->calls_alloca) + emit_insn (gen_frame_blockage ()); +}) (define_insn "*return_internal" [(return)] diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c index 16f83119d52..cf9a3a79388 100644 --- a/gcc/config/xtensa/xtensa.c +++ b/gcc/config/xtensa/xtensa.c @@ -2182,6 +2182,13 @@ xtensa_option_override (void) int regno; machine_mode mode; + /* Use CONST16 in the absence of L32R. + Set it in the TARGET_OPTION_OVERRIDE to avoid dependency on xtensa + configuration in the xtensa-common.c */ + + if (!TARGET_L32R) + target_flags |= MASK_CONST16; + if (!TARGET_BOOLEANS && TARGET_HARD_FLOAT) error ("boolean registers required for the floating-point option"); @@ -4078,8 +4085,6 @@ xtensa_invalid_within_doloop (const rtx_insn *insn) /* Optimize LOOP. */ -#if TARGET_LOOPS - static bool hwloop_optimize (hwloop_info loop) { @@ -4266,14 +4271,9 @@ static struct hw_doloop_hooks xtensa_doloop_hooks = static void xtensa_reorg_loops (void) { - reorg_loops (false, &xtensa_doloop_hooks); -} -#else -static inline void -xtensa_reorg_loops (void) -{ + if (TARGET_LOOPS) + reorg_loops (false, &xtensa_doloop_hooks); } -#endif /* Implement the TARGET_MACHINE_DEPENDENT_REORG pass. */ diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h index 08457a435a2..06dc82cd070 100644 --- a/gcc/config/xtensa/xtensa.h +++ b/gcc/config/xtensa/xtensa.h @@ -66,10 +66,9 @@ along with GCC; see the file COPYING3. If not see #define TARGET_LOOPS XCHAL_HAVE_LOOPS #define TARGET_WINDOWED_ABI (XSHAL_ABI == XTHAL_ABI_WINDOWED) #define TARGET_DEBUG XCHAL_HAVE_DEBUG +#define TARGET_L32R XCHAL_HAVE_L32R -#define TARGET_DEFAULT \ - ((XCHAL_HAVE_L32R ? 0 : MASK_CONST16) | \ - MASK_SERIALIZE_VOLATILE) +#define TARGET_DEFAULT (MASK_SERIALIZE_VOLATILE) #ifndef HAVE_AS_TLS #define HAVE_AS_TLS 0 @@ -362,6 +361,12 @@ extern char xtensa_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER]; /* Base register for access to arguments of the function. */ #define ARG_POINTER_REGNUM (GP_REG_FIRST + 17) +/* Hard frame pointer is neither frame nor arg pointer. + The definitions are here because actual hard frame pointer register + definition is not a preprocessor constant. */ +#define HARD_FRAME_POINTER_IS_FRAME_POINTER 0 +#define HARD_FRAME_POINTER_IS_ARG_POINTER 0 + /* For now we don't try to use the full set of boolean registers. Without software pipelining of FP operations, there's not much to gain and it's a real pain to get them reloaded. */ diff --git a/gcc/configure b/gcc/configure index cc542ac4da5..317517c1ab0 100755 --- a/gcc/configure +++ b/gcc/configure @@ -24372,8 +24372,8 @@ if test $in_tree_ld = yes ; then fi elif test x$gcc_cv_ld != x; then # Check if linker supports -Bstatic/-Bdynamic option - if $gcc_cv_ld --help 2>/dev/null | grep -- -Bstatic > /dev/null \ - && $gcc_cv_ld --help 2>/dev/null | grep -- -Bdynamic > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep -- -Bstatic > /dev/null \ + && $gcc_cv_ld --help 2>&1 | grep -- -Bdynamic > /dev/null; then gcc_cv_ld_static_dynamic=yes else case "$target" in @@ -24426,7 +24426,7 @@ $as_echo_n "checking linker --demangle support... " >&6; } fi elif test x$gcc_cv_ld != x -a x"$gnu_ld" = xyes; then # Check if the GNU linker supports --demangle option - if $gcc_cv_ld --help 2>/dev/null | grep no-demangle > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep no-demangle > /dev/null; then gcc_cv_ld_demangle=yes fi fi @@ -28058,7 +28058,7 @@ if test $in_tree_ld = yes ; then elif test x$gcc_cv_ld != x; then if echo "$ld_ver" | grep GNU > /dev/null; then # Check if linker supports --eh-frame-hdr option - if $gcc_cv_ld --help 2>/dev/null | grep eh-frame-hdr > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep eh-frame-hdr > /dev/null; then gcc_cv_ld_eh_frame_hdr=yes fi else @@ -28136,7 +28136,7 @@ if test $in_tree_ld = yes ; then fi elif test x$gcc_cv_ld != x; then # Check if linker supports -pie option - if $gcc_cv_ld --help 2>/dev/null | grep -- -pie > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep -- -pie > /dev/null; then gcc_cv_ld_pie=yes case "$target" in *-*-solaris2*) @@ -28493,19 +28493,19 @@ if test $in_tree_ld = yes ; then gcc_cv_ld_as_needed=yes fi elif test x$gcc_cv_ld != x; then - # Check if linker supports --as-needed and --no-as-needed options - if $gcc_cv_ld --help 2>/dev/null | grep as-needed > /dev/null; then - gcc_cv_ld_as_needed=yes - else - case "$target" in - # Solaris 2 ld always supports -z ignore/-z record. - *-*-solaris2*) - gcc_cv_ld_as_needed=yes - gcc_cv_ld_as_needed_option="-z ignore" - gcc_cv_ld_no_as_needed_option="-z record" - ;; - esac - fi + # Check if linker supports --as-needed and --no-as-needed options + if $gcc_cv_ld --help 2>&1 | grep as-needed > /dev/null; then + gcc_cv_ld_as_needed=yes + fi + case "$target:$gnu_ld" in + *-*-solaris2*:no) + # Solaris 2 ld always supports -z ignore/-z record. Prefer the native + # forms. + gcc_cv_ld_as_needed=yes + gcc_cv_ld_as_needed_option="-z ignore" + gcc_cv_ld_no_as_needed_option="-z record" + ;; + esac fi # --as-needed/-z ignore can only be used if libgcc_s.so.1 uses # dl_iterate_phdr, i.e. since Solaris 11. @@ -28808,7 +28808,7 @@ else gcc_cv_ld_buildid=yes fi elif test x$gcc_cv_ld != x; then - if $gcc_cv_ld --help 2>/dev/null | grep build-id > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep build-id > /dev/null; then gcc_cv_ld_buildid=yes fi fi @@ -28881,7 +28881,7 @@ else gcc_cv_ld_sysroot=yes fi elif test x$gcc_cv_ld != x; then - if $gcc_cv_ld --help 2>/dev/null | grep sysroot > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep sysroot > /dev/null; then gcc_cv_ld_sysroot=yes fi fi @@ -29857,7 +29857,7 @@ if test x"$ld_is_gold" = xno; then fi elif test x$gcc_cv_ld != x; then # Check if linker supports -a bndplt option - if $gcc_cv_ld --help 2>/dev/null | grep -- '-z bndplt' > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep -- '-z bndplt' > /dev/null; then ld_bndplt_support=yes fi fi @@ -29881,7 +29881,7 @@ if test x"$ld_is_gold" = xno; then fi elif test x$gcc_cv_ld != x; then # Check if linker supports --push-state/--pop-state options - if $gcc_cv_ld --help 2>/dev/null | grep -- '--push-state' > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep -- '--push-state' > /dev/null; then ld_pushpopstate_support=yes fi fi diff --git a/gcc/configure.ac b/gcc/configure.ac index b54f797b4b9..e1b03a9ac96 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac @@ -3569,8 +3569,8 @@ if test $in_tree_ld = yes ; then fi elif test x$gcc_cv_ld != x; then # Check if linker supports -Bstatic/-Bdynamic option - if $gcc_cv_ld --help 2>/dev/null | grep -- -Bstatic > /dev/null \ - && $gcc_cv_ld --help 2>/dev/null | grep -- -Bdynamic > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep -- -Bstatic > /dev/null \ + && $gcc_cv_ld --help 2>&1 | grep -- -Bdynamic > /dev/null; then gcc_cv_ld_static_dynamic=yes else case "$target" in @@ -3614,7 +3614,7 @@ if test x"$demangler_in_ld" = xyes; then fi elif test x$gcc_cv_ld != x -a x"$gnu_ld" = xyes; then # Check if the GNU linker supports --demangle option - if $gcc_cv_ld --help 2>/dev/null | grep no-demangle > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep no-demangle > /dev/null; then gcc_cv_ld_demangle=yes fi fi @@ -4985,7 +4985,7 @@ if test $in_tree_ld = yes ; then elif test x$gcc_cv_ld != x; then if echo "$ld_ver" | grep GNU > /dev/null; then # Check if linker supports --eh-frame-hdr option - if $gcc_cv_ld --help 2>/dev/null | grep eh-frame-hdr > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep eh-frame-hdr > /dev/null; then gcc_cv_ld_eh_frame_hdr=yes fi else @@ -5056,7 +5056,7 @@ if test $in_tree_ld = yes ; then fi elif test x$gcc_cv_ld != x; then # Check if linker supports -pie option - if $gcc_cv_ld --help 2>/dev/null | grep -- -pie > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep -- -pie > /dev/null; then gcc_cv_ld_pie=yes case "$target" in *-*-solaris2*) @@ -5382,19 +5382,19 @@ if test $in_tree_ld = yes ; then gcc_cv_ld_as_needed=yes fi elif test x$gcc_cv_ld != x; then - # Check if linker supports --as-needed and --no-as-needed options - if $gcc_cv_ld --help 2>/dev/null | grep as-needed > /dev/null; then - gcc_cv_ld_as_needed=yes - else - case "$target" in - # Solaris 2 ld always supports -z ignore/-z record. - *-*-solaris2*) - gcc_cv_ld_as_needed=yes - gcc_cv_ld_as_needed_option="-z ignore" - gcc_cv_ld_no_as_needed_option="-z record" - ;; - esac - fi + # Check if linker supports --as-needed and --no-as-needed options + if $gcc_cv_ld --help 2>&1 | grep as-needed > /dev/null; then + gcc_cv_ld_as_needed=yes + fi + case "$target:$gnu_ld" in + *-*-solaris2*:no) + # Solaris 2 ld always supports -z ignore/-z record. Prefer the native + # forms. + gcc_cv_ld_as_needed=yes + gcc_cv_ld_as_needed_option="-z ignore" + gcc_cv_ld_no_as_needed_option="-z record" + ;; + esac fi # --as-needed/-z ignore can only be used if libgcc_s.so.1 uses # dl_iterate_phdr, i.e. since Solaris 11. @@ -5634,7 +5634,7 @@ AC_CACHE_CHECK(linker --build-id support, gcc_cv_ld_buildid=yes fi elif test x$gcc_cv_ld != x; then - if $gcc_cv_ld --help 2>/dev/null | grep build-id > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep build-id > /dev/null; then gcc_cv_ld_buildid=yes fi fi]) @@ -5689,7 +5689,7 @@ AC_CACHE_CHECK(linker --sysroot support, gcc_cv_ld_sysroot=yes fi elif test x$gcc_cv_ld != x; then - if $gcc_cv_ld --help 2>/dev/null | grep sysroot > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep sysroot > /dev/null; then gcc_cv_ld_sysroot=yes fi fi]) @@ -6363,7 +6363,7 @@ if test x"$ld_is_gold" = xno; then fi elif test x$gcc_cv_ld != x; then # Check if linker supports -a bndplt option - if $gcc_cv_ld --help 2>/dev/null | grep -- '-z bndplt' > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep -- '-z bndplt' > /dev/null; then ld_bndplt_support=yes fi fi @@ -6384,7 +6384,7 @@ if test x"$ld_is_gold" = xno; then fi elif test x$gcc_cv_ld != x; then # Check if linker supports --push-state/--pop-state options - if $gcc_cv_ld --help 2>/dev/null | grep -- '--push-state' > /dev/null; then + if $gcc_cv_ld --help 2>&1 | grep -- '--push-state' > /dev/null; then ld_pushpopstate_support=yes fi fi diff --git a/gcc/convert.c b/gcc/convert.c index af8dfda0eb4..429f988cbde 100644 --- a/gcc/convert.c +++ b/gcc/convert.c @@ -33,6 +33,7 @@ along with GCC; see the file COPYING3. If not see #include "langhooks.h" #include "builtins.h" #include "ubsan.h" +#include "asan.h" #define maybe_fold_build1_loc(FOLD_P, LOC, CODE, TYPE, EXPR) \ ((FOLD_P) ? fold_build1_loc (LOC, CODE, TYPE, EXPR) \ @@ -937,8 +938,7 @@ convert_to_integer_1 (tree type, tree expr, bool dofold) return build1 (CONVERT_EXPR, type, expr); case REAL_TYPE: - if (flag_sanitize & SANITIZE_FLOAT_CAST - && do_ubsan_in_current_function ()) + if (sanitize_flags_p (SANITIZE_FLOAT_CAST)) { expr = save_expr (expr); tree check = ubsan_instrument_float_cast (loc, type, expr); diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 6d2f28b8751..a06de8ba8c7 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,288 @@ +2017-06-24 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/62315 + * parser.c (cp_parser_diagnose_invalid_type_name): Don't print + 'typename' in error messages about missing 'typename'. + +2017-06-23 Jason Merrill <jason@redhat.com> + + PR c++/79056 - C++17 ICE with invalid template syntax. + * parser.c (cp_parser_simple_type_specifier): Don't assume that type + is a TYPE_DECL. + (cp_parser_check_for_invalid_template_id): Handle TYPE_DECL. + * pt.c (template_placeholder_p): New. + * cp-tree.h: Declare it. + +2017-06-23 Marc Glisse <marc.glisse@inria.fr> + + * decl.c (duplicate_decls): Use builtin_structptr_types. + +2017-06-22 Nathan Sidwell <nathan@acm.org> + + Reorder IDENTIFIER flags + gcc/cp/ + * cp-tree.h (enum cp_identifier_kind): New. + (IDENTIFIER_KIND_BIT_0, IDENTIFIER_KIND_BIT_1, + IDENTIFIER_KIND_BIT_2): New. + (IDENTIFIER_MARKED): Move to TREE_LANG_FLAG_4. + (IDENTIFIER_VIRTUAL_P, IDENTIFIER_REPO_CHOSEN): Add IDENTIFIER_CHECK. + (C_IS_RESERVED_WORD): Replace with ... + (IDENTIFIER_KEYWORD_P): ... this. + (IDENTIFIER_CTOR_OR_DTOR_P): Replace with ... + (IDENTIFIER_CDTOR_P): ... this. + (IDENTIFIER_CTOR_P, IDENTIFIER_DTOR_P): New. + (IDENTIFIER_OPNAME_P): Replace with ... + (IDENTIFIER_ANY_OP_P): ... this. + (IDENTIFIER_ASSIGN_OP_P): New. + (IDENTIFIER_TYPENAME_P): Replace with ... + (IDENTIFIER_CONV_OP_P): ... this. + (NEW_DELETE_OPNAME_P): Replace with ... + (IDENTIFIER_NEWDEL_OP_P): ... this. + (DECL_CONV_FN_P, DECL_OVERLOADED_OPERATOR_P): Adjust. + (get_identifier_kind_name, set_identifier_kind): Declare. + * lex.c (get_identifier_kind_name, set_identifier_kind): New. + (init_operators): Adjust to avoid keywords, use + set_identifier_kind. Copy TYPE_EXPR slot. + (init_reswords): Call set_identifier_kind. + (unqualified_name_lookup_error): Adjust. + * operators.def (TYPE_EXPR): Remove. + * decl.c (struct predefined_identifier): Move into ... + (initialize_predefined_identifiers): ... here. Call + set_identifier_kind. + (grokfndecl, check_var_type, grokdeclarator): Adjust. + (grok_op_properties): Use IDENTIFIER_ANY_ASSIGN_OP to halve search + space. Adjust. + * call.c (name_as_c_string): Adjust. + (build_new_method_call_1): Likewise. + * cp-cilkplus.c (is_conversion_operator_function_decl_p): Likewise. + * cxx-pretty-print.c (pp_cxx_unqualified_id): Adjust. + * dump.c (cp_dump_tree): Adjust. + * error.c (dump_decl_name): Adjust. + * mangle.c (write_unqualified_id, write_member_name, + write_expression): Adjust. + (mangle_conv_op_name_for_type): Use set_identifier_kind. + * name-lookup.c (do_class_using_decl): Adjust. + (lookup_name_fuzzy, lookup_name_real_1): Likewise. + * parser.c (cp_lexer_get_preprocessor_token, + cp_parser_direct_declarator): Likewise. + * pt.c (push_template_decl_real, tsubst_decl, tsubst_baselink, + tsubst_copy, tsubst_copy_and_build): Adjust. + * ptree.c (cxx_print_identifier): Print identifier kind. + * search.c (lookup_field_r, lookup_member, + lookup_fnfields_idx_nolazy): Adjust. + * semantics.c (finish_id_expression): Adjust.. + * typeck.c (cp_build_addr_expr_1): Adjust. + +2017-06-21 Jakub Jelinek <jakub@redhat.com> + + PR c++/81154 + * semantics.c (handle_omp_array_sections_1, finish_omp_clauses): + Complain about t not being a variable if t is OVERLOAD even + when processing_template_decl. + +2017-06-21 David Malcolm <dmalcolm@redhat.com> + + * parser.c (get_cast_suggestion): New function. + (maybe_add_cast_fixit): New function. + (cp_parser_cast_expression): Capture the location of the closing + parenthesis. Call maybe_add_cast_fixit when emitting warnings + about old-style casts. + +2017-06-20 Jason Merrill <jason@redhat.com> + + PR c++/80972 - C++17 ICE with attribute packed. + * call.c (build_over_call): Allow a TARGET_EXPR from reference + binding. + +2017-06-20 Nathan Sidwell <nathan@acm.org> + + * cp-tree.h (CPTI_NELTS_IDENTIFIER): Delete. + (nelts_identifier): Delete. + * decl.c (initialize_predefined_identifiers): Remove nelts. + + PR c++/67074 - namespace aliases + * decl.c (duplicate_decls): Don't error here on mismatched + namespace alias. + * name-lookup.c (name_lookup::add_value): Matching namespaces are + not ambiguous. + (diagnose_name_conflict): Namespaces are never redeclarations. + (update_binding): An alias can match a real namespace. + +2017-06-19 Jason Merrill <jason@redhat.com> + + PR c++/80562 - ICE with constexpr if. + * semantics.c (finish_if_stmt_cond): Call + instantiate_non_dependent_expr. + + PR c++/80829 - ICE with constexpr copy of base subobject. + * constexpr.c (clear_no_implicit_zero): New. + (cxx_eval_call_expression): Call it. + +2017-06-19 Nathan Sidwell <nathan@acm.org> + + PR c++/81124 + PR c++/79766 + * name-lookup.c (set_decl_namespace): Don't follow using + directives and ignore using decls. Only check overly-explicit + scope after discovering decl. + +2017-06-19 Jason Merrill <jason@redhat.com> + + PR c++/81073 - constexpr and static var in statement-expression. + * typeck2.c (store_init_value): Always call + require_potential_constant_expression. + * pt.c (convert_nontype_argument): Likewise. + * constexpr.c (potential_constant_expression_1): Adjust message. + Use decl_maybe_constant_var_p instead of decl_constant_var_p. + * decl2.c (decl_maybe_constant_var_p): Consider initializer. + +2017-06-19 Nathan Sidwell <nathan@acm.org> + + * pt.c (coerce_template_parms): Fix indentation. + (tsubst_decl): Remove repeated SET_DECL_RTL. Move VAR_P handling + in to single block. + + PR c++/81119 + * name-lookup.c (update_binding): Only warn about constructors + hidden by functions. + +2017-06-17 Jason Merrill <jason@redhat.com> + + PR c++/60063 - -Wunused-local-typedefs and templates. + * decl2.c (is_late_template_attribute): Return false for "used". + + PR c++/70844 - -Wuseless-cast and inheriting constructor. + * method.c (forward_parm): Suppress warn_useless_cast. + +2017-06-16 Jason Merrill <jason@redhat.com> + + PR c++/81045 - Wrong type-dependence with auto return type. + * pt.c (type_dependent_expression_p): An undeduced auto outside the + template isn't dependent. + * call.c (build_over_call): Instantiate undeduced auto even in a + template. + + PR c++/80465 - ICE with generic lambda with noexcept-specifier. + * lambda.c (maybe_add_lambda_conv_op): Keep processing_template_decl + set longer for a generic lambda. + + PR c++/80614 - Wrong mangling for C++17 noexcept type + * mangle.c (write_type): Put the eh spec back on the function type. + + PR c++/81102 - Wrong error with partial specialization. + * pt.c (unify) [TEMPLATE_PARM_INDEX]: Strip reference when comparing + types. Do type deduction later. + + PR c++/81074 - ICE with partial specialization of member template. + PR c++/71747 + * pt.c (get_partial_spec_bindings): Only coerce innermost args. + + PR c++/80831 - ICE with -fsyntax-only. + * decl2.c (c_parse_final_cleanups): Use cgraph_node::get_create. + + PR c++/80639 - ICE with invalid PMF initialization. + PR c++/80043 - ICE with -fpermissive + * typeck.c (convert_for_assignment): Recurse when instantiate_type + returns without an error. + +2017-06-16 Nathan Sidwell <nathan@acm.org> + + * pt.c (tsubst_baselink): Fix & clarify formatting. + + * cp-tree.h (build_this_parm, cp_build_parm_decl, + build_artificial_parm): Add FN parm. + * decl.c (start_cleanup_fn): Adjust. + (build_this_parm): Add FN parm, pass it through. + (grokfndecl): Adjust parm building. + * decl2.c (cp_build_parm_decl): Add FN parm, set context. + (build_artificial_parm): Add FN parm, pass through. + (maybe_retrofit_in_chrg): Adjust parm building. + (start_static_storage_duration_function): Likwise. + * lambda.c (maybe_aadd_lambda_conv_op): Likewise. + * method.c (implicitly_declare_fn): Likewise. + * parser.c (inject_this_parameter): Likewise. + + Symbol tables are insert only. + * cp-tree.h (default_hash_traits <lang_identifier *>): Don't + derive from pointer_hash. Make undeletable. + + * class.c (resort_type_method_vec): Avoid potential unsigned + overflow. + + Don't defer noexcept_deferred_spec. + * cp-tree.h (unevaluated_noexcept_spec): Don't declare. + * decl.c (cxx_init_decl_processing): Initialize + noexcept_deferred_spec. + * except.c (unevaluated_noexcept_spec): Delete. + * class.c (deduce_noexcept_on_destructor): Use + noexcept_deferred_spec directly. + * method.c (implicitly_declare_fn): Likewise. + + Make keyed_classes a vector. + * cp-tree.h (CPTI_KEYED_CLASSES, keyed_classes): Delete. + (keyed_classes): Declare as vector. + * decl.c (keyed_classes): Define. + (cxx_init_decl_processing): Allocate it. + (record_key_method_defined): Use vec_safe_push. + * class.c (finish_struct_1): Likewise. + * pt.c (instantiate_class_template_1): Likewise. + * decl2.c (c_parse_final_cleanups): Reverse iterate keyed_classes. + + Make rtti lazier + * rtti.c (enum tinfo_kind): Add TK_DERIVED_TYPES, + TK_VMI_CLASS_TYPES, TK_MAX. Delete TK_FIXED. + (tinfo_names): New. + (typeid_ok_p): Add quotes to error messages. Use get_tinfo_desc. + (get_tinfo_decl): Use get_tinfo_desc. + (get_pseudo_ti_init): Likewise. Adjust VMI construction. + (create_pseudo_type_info): Delete. + (get_pseudo_ti_index): Just determine the index. + (get_tinfo_desc): New. Create all types lazily. + (create_tinfo_types): Just allocate the descriptor array. + (emit_support_tinfos): Use non-inserting type lookup. Set builtin + location. + +2017-06-15 Martin Sebor <msebor@redhat.com> + + PR c++/80560 + * call.c (first_non_public_field, maybe_warn_class_memaccess): New + functions. + (has_trivial_copy_assign_p, has_trivial_copy_p): Ditto. + (build_cxx_call): Call maybe_warn_class_memaccess. + +2017-06-14 Jakub Jelinek <jakub@redhat.com> + + * cp-gimplify.c (cp_genericize_r): Turn most of the function + into a switch (TREE_CODE (stmt)) statement from long else if + sequence. + +2017-06-13 Jakub Jelinek <jakub@redhat.com> + + PR c++/80973 + * cp-gimplify.c (cp_genericize_r): Don't instrument MEM_REF second + argument even if it has REFERENCE_TYPE. + + PR c++/80984 + * cp-gimplify.c (cp_genericize): Only look for VAR_DECLs in + BLOCK_VARS (outer) chain. + (cxx_omp_const_qual_no_mutable): Likewise. + +2017-06-13 Martin Liska <mliska@suse.cz> + + PR sanitize/78204 + * class.c (build_base_path): Use sanitize_flags_p. + * cp-gimplify.c (cp_genericize_r): Likewise. + (cp_genericize_tree): Likewise. + (cp_genericize): Likewise. + * cp-ubsan.c (cp_ubsan_instrument_vptr_p): Likewise. + * decl.c (compute_array_index_type): Likewise. + (start_preparsed_function): Likewise. + * decl2.c (one_static_initialization_or_destruction): Likewise. + * init.c (finish_length_check): Likewise. + * lambda.c (maybe_add_lambda_conv_op): Likewise. + * typeck.c (cp_build_binary_op): Likewise. + (build_static_cast_1): Likewise. + 2017-06-11 Jason Merrill <jason@redhat.com> * error.c (dump_expr): Use is_this_parameter. diff --git a/gcc/cp/call.c b/gcc/cp/call.c index ef9968340c6..2fc29da1c7a 100644 --- a/gcc/cp/call.c +++ b/gcc/cp/call.c @@ -7584,6 +7584,9 @@ build_over_call (struct z_candidate *cand, int flags, tsubst_flags_t complain) const tree *argarray; unsigned int nargs; + if (undeduced_auto_decl (fn)) + mark_used (fn, complain); + return_type = TREE_TYPE (TREE_TYPE (fn)); nargs = vec_safe_length (args); if (first_arg == NULL_TREE) @@ -8022,6 +8025,8 @@ build_over_call (struct z_candidate *cand, int flags, tsubst_flags_t complain) subobject. */ if (CHECKING_P && cxx_dialect >= cxx1z) gcc_assert (TREE_CODE (arg) != TARGET_EXPR + /* It's from binding the ref parm to a packed field. */ + || convs[0]->need_temporary_p || seen_error () /* See unsafe_copy_elision_p. */ || DECL_BASE_CONSTRUCTOR_P (fn)); @@ -8184,6 +8189,393 @@ build_over_call (struct z_candidate *cand, int flags, tsubst_flags_t complain) return call; } +/* Return the DECL of the first non-public data member of class TYPE + or null if none can be found. */ + +static tree +first_non_public_field (tree type) +{ + if (!CLASS_TYPE_P (type)) + return NULL_TREE; + + for (tree field = TYPE_FIELDS (type); field; field = DECL_CHAIN (field)) + { + if (TREE_CODE (field) != FIELD_DECL) + continue; + if (TREE_STATIC (field)) + continue; + if (TREE_PRIVATE (field) || TREE_PROTECTED (field)) + return field; + } + + int i = 0; + + for (tree base_binfo, binfo = TYPE_BINFO (type); + BINFO_BASE_ITERATE (binfo, i, base_binfo); i++) + { + tree base = TREE_TYPE (base_binfo); + + if (tree field = first_non_public_field (base)) + return field; + } + + return NULL_TREE; +} + +/* Return true if all copy and move assignment operator overloads for + class TYPE are trivial and at least one of them is not deleted and, + when ACCESS is set, accessible. Return false otherwise. Set + HASASSIGN to true when the TYPE has a (not necessarily trivial) + copy or move assignment. */ + +static bool +has_trivial_copy_assign_p (tree type, bool access, bool *hasassign) +{ + tree fns = cp_assignment_operator_id (NOP_EXPR); + fns = lookup_fnfields_slot (type, fns); + + bool all_trivial = true; + + /* Iterate over overloads of the assignment operator, checking + accessible copy assignments for triviality. */ + + for (ovl_iterator oi (fns); oi; ++oi) + { + tree f = *oi; + + /* Skip operators that aren't copy assignments. */ + if (!copy_fn_p (f)) + continue; + + bool accessible = (!access || !(TREE_PRIVATE (f) || TREE_PROTECTED (f)) + || accessible_p (TYPE_BINFO (type), f, true)); + + /* Skip template assignment operators and deleted functions. */ + if (TREE_CODE (f) != FUNCTION_DECL || DECL_DELETED_FN (f)) + continue; + + if (accessible) + *hasassign = true; + + if (!accessible || !trivial_fn_p (f)) + all_trivial = false; + + /* Break early when both properties have been determined. */ + if (*hasassign && !all_trivial) + break; + } + + /* Return true if they're all trivial and one of the expressions + TYPE() = TYPE() or TYPE() = (TYPE&)() is valid. */ + tree ref = cp_build_reference_type (type, false); + return (all_trivial + && (is_trivially_xible (MODIFY_EXPR, type, type) + || is_trivially_xible (MODIFY_EXPR, type, ref))); +} + +/* Return true if all copy and move ctor overloads for class TYPE are + trivial and at least one of them is not deleted and, when ACCESS is + set, accessible. Return false otherwise. Set each element of HASCTOR[] + to true when the TYPE has a (not necessarily trivial) default and copy + (or move) ctor, respectively. */ + +static bool +has_trivial_copy_p (tree type, bool access, bool hasctor[2]) +{ + tree fns = lookup_fnfields_slot (type, complete_ctor_identifier); + + bool all_trivial = true; + + for (ovl_iterator oi (fns); oi; ++oi) + { + tree f = *oi; + + /* Skip template constructors. */ + if (TREE_CODE (f) != FUNCTION_DECL) + continue; + + bool cpy_or_move_ctor_p = copy_fn_p (f); + + /* Skip ctors other than default, copy, and move. */ + if (!cpy_or_move_ctor_p && !default_ctor_p (f)) + continue; + + if (DECL_DELETED_FN (f)) + continue; + + bool accessible = (!access || !(TREE_PRIVATE (f) || TREE_PROTECTED (f)) + || accessible_p (TYPE_BINFO (type), f, true)); + + if (accessible) + hasctor[cpy_or_move_ctor_p] = true; + + if (cpy_or_move_ctor_p && (!accessible || !trivial_fn_p (f))) + all_trivial = false; + + /* Break early when both properties have been determined. */ + if (hasctor[0] && hasctor[1] && !all_trivial) + break; + } + + return all_trivial; +} + +/* Issue a warning on a call to the built-in function FNDECL if it is + a raw memory write whose destination is not an object of (something + like) trivial or standard layout type with a non-deleted assignment + and copy ctor. Detects const correctness violations, corrupting + references, virtual table pointers, and bypassing non-trivial + assignments. */ + +static void +maybe_warn_class_memaccess (location_t loc, tree fndecl, tree *args) +{ + /* Except for bcopy where it's second, the destination pointer is + the first argument for all functions handled here. Compute + the index of the destination and source arguments. */ + unsigned dstidx = DECL_FUNCTION_CODE (fndecl) == BUILT_IN_BCOPY; + unsigned srcidx = !dstidx; + + tree dest = args[dstidx]; + if (!dest || !TREE_TYPE (dest) || !POINTER_TYPE_P (TREE_TYPE (dest))) + return; + + STRIP_NOPS (dest); + + tree srctype = NULL_TREE; + + /* Determine the type of the pointed-to object and whether it's + a complete class type. */ + tree desttype = TREE_TYPE (TREE_TYPE (dest)); + + if (!desttype || !COMPLETE_TYPE_P (desttype) || !CLASS_TYPE_P (desttype)) + return; + + /* Check to see if the raw memory call is made by a ctor or dtor + with this as the destination argument for the destination type. + If so, be more permissive. */ + if (current_function_decl + && (DECL_CONSTRUCTOR_P (current_function_decl) + || DECL_DESTRUCTOR_P (current_function_decl)) + && is_this_parameter (dest)) + { + tree ctx = DECL_CONTEXT (current_function_decl); + bool special = same_type_ignoring_top_level_qualifiers_p (ctx, desttype); + + tree binfo = TYPE_BINFO (ctx); + + /* A ctor and dtor for a class with no bases and no virtual functions + can do whatever they want. Bail early with no further checking. */ + if (special && !BINFO_VTABLE (binfo) && !BINFO_N_BASE_BINFOS (binfo)) + return; + } + + /* True if the class is trivial. */ + bool trivial = trivial_type_p (desttype); + + /* Set to true if DESTYPE has an accessible copy assignment. */ + bool hasassign = false; + /* True if all of the class' overloaded copy assignment operators + are all trivial (and not deleted) and at least one of them is + accessible. */ + bool trivassign = has_trivial_copy_assign_p (desttype, true, &hasassign); + + /* Set to true if DESTTYPE has an accessible default and copy ctor, + respectively. */ + bool hasctors[2] = { false, false }; + + /* True if all of the class' overloaded copy constructors are all + trivial (and not deleted) and at least one of them is accessible. */ + bool trivcopy = has_trivial_copy_p (desttype, true, hasctors); + + /* Set FLD to the first private/protected member of the class. */ + tree fld = trivial ? first_non_public_field (desttype) : NULL_TREE; + + /* The warning format string. */ + const char *warnfmt = NULL; + /* A suggested alternative to offer instead of the raw memory call. + Empty string when none can be come up with. */ + const char *suggest = ""; + bool warned = false; + + switch (DECL_FUNCTION_CODE (fndecl)) + { + case BUILT_IN_MEMSET: + if (!integer_zerop (args[1])) + { + /* Diagnose setting non-copy-assignable or non-trivial types, + or types with a private member, to (potentially) non-zero + bytes. Since the value of the bytes being written is unknown, + suggest using assignment instead (if one exists). Also warn + for writes into objects for which zero-initialization doesn't + mean all bits clear (pointer-to-member data, where null is all + bits set). Since the value being written is (most likely) + non-zero, simply suggest assignment (but not copy assignment). */ + suggest = "; use assignment instead"; + if (!trivassign) + warnfmt = G_("%qD writing to an object of type %#qT with " + "no trivial copy-assignment"); + else if (!trivial) + warnfmt = G_("%qD writing to an object of non-trivial type %#qT%s"); + else if (fld) + { + const char *access = TREE_PRIVATE (fld) ? "private" : "protected"; + warned = warning_at (loc, OPT_Wclass_memaccess, + "%qD writing to an object of type %#qT with " + "%qs member %qD", + fndecl, desttype, access, fld); + } + else if (!zero_init_p (desttype)) + warnfmt = G_("%qD writing to an object of type %#qT containing " + "a pointer to data member%s"); + + break; + } + /* Fall through. */ + + case BUILT_IN_BZERO: + /* Similarly to the above, diagnose clearing non-trivial or non- + standard layout objects, or objects of types with no assignmenmt. + Since the value being written is known to be zero, suggest either + copy assignment, copy ctor, or default ctor as an alternative, + depending on what's available. */ + + if (hasassign && hasctors[0]) + suggest = G_("; use assignment or value-initialization instead"); + else if (hasassign) + suggest = G_("; use assignment instead"); + else if (hasctors[0]) + suggest = G_("; use value-initialization instead"); + + if (!trivassign) + warnfmt = G_("%qD clearing an object of type %#qT with " + "no trivial copy-assignment%s"); + else if (!trivial) + warnfmt = G_("%qD clearing an object of non-trivial type %#qT%s"); + else if (!zero_init_p (desttype)) + warnfmt = G_("%qD clearing an object of type %#qT containing " + "a pointer-to-member%s"); + break; + + case BUILT_IN_BCOPY: + case BUILT_IN_MEMCPY: + case BUILT_IN_MEMMOVE: + case BUILT_IN_MEMPCPY: + /* Determine the type of the source object. */ + srctype = STRIP_NOPS (args[srcidx]); + srctype = TREE_TYPE (TREE_TYPE (srctype)); + + /* Since it's impossible to determine wheter the byte copy is + being used in place of assignment to an existing object or + as a substitute for initialization, assume it's the former. + Determine the best alternative to use instead depending on + what's not deleted. */ + if (hasassign && hasctors[1]) + suggest = G_("; use copy-assignment or copy-initialization instead"); + else if (hasassign) + suggest = G_("; use copy-assignment instead"); + else if (hasctors[1]) + suggest = G_("; use copy-initialization instead"); + + if (!trivassign) + warnfmt = G_("%qD writing to an object of type %#qT with no trivial " + "copy-assignment%s"); + else if (!trivially_copyable_p (desttype)) + warnfmt = G_("%qD writing to an object of non-trivially copyable " + "type %#qT%s"); + else if (!trivcopy) + warnfmt = G_("%qD writing to an object with a deleted copy constructor"); + + else if (!trivial + && !VOID_TYPE_P (srctype) + && !char_type_p (TYPE_MAIN_VARIANT (srctype)) + && !same_type_ignoring_top_level_qualifiers_p (desttype, + srctype)) + { + /* Warn when copying into a non-trivial object from an object + of a different type other than void or char. */ + warned = warning_at (loc, OPT_Wclass_memaccess, + "%qD copying an object of non-trivial type " + "%#qT from an array of %#qT", + fndecl, desttype, srctype); + } + else if (fld + && !VOID_TYPE_P (srctype) + && !char_type_p (TYPE_MAIN_VARIANT (srctype)) + && !same_type_ignoring_top_level_qualifiers_p (desttype, + srctype)) + { + const char *access = TREE_PRIVATE (fld) ? "private" : "protected"; + warned = warning_at (loc, OPT_Wclass_memaccess, + "%qD copying an object of type %#qT with " + "%qs member %qD from an array of %#qT; use " + "assignment or copy-initialization instead", + fndecl, desttype, access, fld, srctype); + } + else if (!trivial && TREE_CODE (args[2]) == INTEGER_CST) + { + /* Finally, warn on partial copies. */ + unsigned HOST_WIDE_INT typesize + = tree_to_uhwi (TYPE_SIZE_UNIT (desttype)); + if (unsigned HOST_WIDE_INT partial + = tree_to_uhwi (args[2]) % typesize) + warned = warning_at (loc, OPT_Wclass_memaccess, + (typesize - partial > 1 + ? G_("%qD writing to an object of " + "a non-trivial type %#qT leaves %wu " + "bytes unchanged") + : G_("%qD writing to an object of " + "a non-trivial type %#qT leaves %wu " + "byte unchanged")), + fndecl, desttype, typesize - partial); + } + break; + + case BUILT_IN_REALLOC: + + if (!trivially_copyable_p (desttype)) + warnfmt = G_("%qD moving an object of non-trivially copyable type " + "%#qT; use %<new%> and %<delete%> instead"); + else if (!trivcopy) + warnfmt = G_("%qD moving an object of type %#qT with deleted copy " + "constructor; use %<new%> and %<delete%> instead"); + else if (!get_dtor (desttype, tf_none)) + warnfmt = G_("%qD moving an object of type %#qT with deleted " + "destructor"); + else if (!trivial + && TREE_CODE (args[1]) == INTEGER_CST + && tree_int_cst_lt (args[1], TYPE_SIZE_UNIT (desttype))) + { + /* Finally, warn on reallocation into insufficient space. */ + warned = warning_at (loc, OPT_Wclass_memaccess, + "%qD moving an object of non-trivial type " + "%#qT and size %E into a region of size %E", + fndecl, desttype, TYPE_SIZE_UNIT (desttype), + args[1]); + } + break; + + default: + return; + } + + if (!warned && !warnfmt) + return; + + if (warnfmt) + { + if (suggest) + warned = warning_at (loc, OPT_Wclass_memaccess, + warnfmt, fndecl, desttype, suggest); + else + warned = warning_at (loc, OPT_Wclass_memaccess, + warnfmt, fndecl, desttype); + } + + if (warned) + inform (location_of (desttype), "%#qT declared here", desttype); +} + /* Build and return a call to FN, using NARGS arguments in ARGARRAY. This function performs no overload resolution, conversion, or other high-level operations. */ @@ -8216,6 +8608,10 @@ build_cxx_call (tree fn, int nargs, tree *argarray, if (!check_builtin_function_arguments (EXPR_LOCATION (fn), vNULL, fndecl, nargs, argarray)) return error_mark_node; + + /* Warn if the built-in writes to an object of a non-trivial type. */ + if (nargs) + maybe_warn_class_memaccess (loc, fndecl, argarray); } /* If it is a built-in array notation function, then the return type of @@ -8488,21 +8884,19 @@ name_as_c_string (tree name, tree type, bool *free_p) /* Assume that we will not allocate memory. */ *free_p = false; /* Constructors and destructors are special. */ - if (IDENTIFIER_CTOR_OR_DTOR_P (name)) + if (IDENTIFIER_CDTOR_P (name)) { pretty_name = CONST_CAST (char *, identifier_to_locale (IDENTIFIER_POINTER (constructor_name (type)))); /* For a destructor, add the '~'. */ - if (name == complete_dtor_identifier - || name == base_dtor_identifier - || name == deleting_dtor_identifier) + if (IDENTIFIER_DTOR_P (name)) { pretty_name = concat ("~", pretty_name, NULL); /* Remember that we need to free the memory allocated. */ *free_p = true; } } - else if (IDENTIFIER_TYPENAME_P (name)) + else if (IDENTIFIER_CONV_OP_P (name)) { pretty_name = concat ("operator ", type_as_string_translate (TREE_TYPE (name), @@ -8619,7 +9013,7 @@ build_new_method_call_1 (tree instance, tree fns, vec<tree, va_gc> **args, pointer if this is a call to a base-class constructor or destructor. */ skip_first_for_error = false; - if (IDENTIFIER_CTOR_OR_DTOR_P (name)) + if (IDENTIFIER_CDTOR_P (name)) { /* Callers should explicitly indicate whether they want to construct the complete object or just the part without virtual bases. */ @@ -8747,7 +9141,7 @@ build_new_method_call_1 (tree instance, tree fns, vec<tree, va_gc> **args, { tree arglist = build_tree_list_vec (user_args); tree errname = name; - if (IDENTIFIER_CTOR_OR_DTOR_P (errname)) + if (IDENTIFIER_CDTOR_P (errname)) { tree fn = DECL_ORIGIN (OVL_FIRST (fns)); errname = DECL_NAME (fn); diff --git a/gcc/cp/class.c b/gcc/cp/class.c index 66f42627715..1243f33605f 100644 --- a/gcc/cp/class.c +++ b/gcc/cp/class.c @@ -36,6 +36,7 @@ along with GCC; see the file COPYING3. If not see #include "dumpfile.h" #include "gimplify.h" #include "intl.h" +#include "asan.h" /* Id for dumping the class hierarchy. */ int class_dump_id; @@ -462,7 +463,8 @@ build_base_path (enum tree_code code, else { tree t = expr; - if ((flag_sanitize & SANITIZE_VPTR) && fixed_type_p == 0) + if (sanitize_flags_p (SANITIZE_VPTR) + && fixed_type_p == 0) { t = cp_ubsan_maybe_instrument_cast_to_vbase (input_location, probe, expr); @@ -2326,25 +2328,25 @@ resort_type_method_vec (void* obj, gt_pointer_operator new_value, void* cookie) { - vec<tree, va_gc> *method_vec = (vec<tree, va_gc> *) obj; - int len = vec_safe_length (method_vec); - size_t slot; - tree fn; + if (vec<tree, va_gc> *method_vec = (vec<tree, va_gc> *) obj) + { + int len = method_vec->length (); + int slot; - /* The type conversion ops have to live at the front of the vec, so we - can't sort them. */ - for (slot = CLASSTYPE_FIRST_CONVERSION_SLOT; - vec_safe_iterate (method_vec, slot, &fn); - ++slot) - if (!DECL_CONV_FN_P (OVL_FIRST (fn))) - break; + /* The type conversion ops have to live at the front of the vec, so we + can't sort them. */ + for (slot = CLASSTYPE_FIRST_CONVERSION_SLOT; + slot < len; slot++) + if (!DECL_CONV_FN_P (OVL_FIRST ((*method_vec)[slot]))) + break; - if (len - slot > 1) - { - resort_data.new_value = new_value; - resort_data.cookie = cookie; - qsort (method_vec->address () + slot, len - slot, sizeof (tree), - resort_method_name_cmp); + if (len > slot + 1) + { + resort_data.new_value = new_value; + resort_data.cookie = cookie; + qsort (method_vec->address () + slot, len - slot, sizeof (tree), + resort_method_name_cmp); + } } } @@ -5023,10 +5025,8 @@ void deduce_noexcept_on_destructor (tree dtor) { if (!TYPE_RAISES_EXCEPTIONS (TREE_TYPE (dtor))) - { - tree eh_spec = unevaluated_noexcept_spec (); - TREE_TYPE (dtor) = build_exception_variant (TREE_TYPE (dtor), eh_spec); - } + TREE_TYPE (dtor) = build_exception_variant (TREE_TYPE (dtor), + noexcept_deferred_spec); } /* For each destructor in T, deduce noexcept: @@ -7187,8 +7187,8 @@ finish_struct_1 (tree t) in every translation unit where the class definition appears. If we're devirtualizing, we can look into the vtable even if we aren't emitting it. */ - if (CLASSTYPE_KEY_METHOD (t) == NULL_TREE) - keyed_classes = tree_cons (NULL_TREE, t, keyed_classes); + if (!CLASSTYPE_KEY_METHOD (t)) + vec_safe_push (keyed_classes, t); } /* Layout the class itself. */ diff --git a/gcc/cp/constexpr.c b/gcc/cp/constexpr.c index ae24e4010ff..5a574524866 100644 --- a/gcc/cp/constexpr.c +++ b/gcc/cp/constexpr.c @@ -1394,6 +1394,21 @@ cxx_eval_internal_function (const constexpr_ctx *ctx, tree t, return t; } +/* Clean CONSTRUCTOR_NO_IMPLICIT_ZERO from CTOR and its sub-aggregates. */ + +static void +clear_no_implicit_zero (tree ctor) +{ + if (CONSTRUCTOR_NO_IMPLICIT_ZERO (ctor)) + { + CONSTRUCTOR_NO_IMPLICIT_ZERO (ctor) = false; + tree elt; unsigned HOST_WIDE_INT idx; + FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (ctor), idx, elt) + if (TREE_CODE (elt) == CONSTRUCTOR) + clear_no_implicit_zero (elt); + } +} + /* Subroutine of cxx_eval_constant_expression. Evaluate the call expression tree T in the context of OLD_CALL expression evaluation. */ @@ -1697,7 +1712,7 @@ cxx_eval_call_expression (const constexpr_ctx *ctx, tree t, /* The result of a constexpr function must be completely initialized. */ if (TREE_CODE (result) == CONSTRUCTOR) - CONSTRUCTOR_NO_IMPLICIT_ZERO (result) = false; + clear_no_implicit_zero (result); pop_cx_call_context (); return unshare_constructor (result); @@ -5212,10 +5227,11 @@ potential_constant_expression_1 (tree t, bool want_rval, bool strict, if (want_rval && !var_in_maybe_constexpr_fn (t) && !type_dependent_expression_p (t) - && !decl_constant_var_p (t) + && !decl_maybe_constant_var_p (t) && (strict || !CP_TYPE_CONST_NON_VOLATILE_P (TREE_TYPE (t)) - || !DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (t)) + || (DECL_INITIAL (t) + && !DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (t))) && COMPLETE_TYPE_P (TREE_TYPE (t)) && !is_really_empty_class (TREE_TYPE (t))) { @@ -5540,21 +5556,21 @@ potential_constant_expression_1 (tree t, bool want_rval, bool strict, { if (flags & tf_error) error_at (DECL_SOURCE_LOCATION (tmp), "%qD declared " - "%<static%> in %<constexpr%> function", tmp); + "%<static%> in %<constexpr%> context", tmp); return false; } else if (CP_DECL_THREAD_LOCAL_P (tmp)) { if (flags & tf_error) error_at (DECL_SOURCE_LOCATION (tmp), "%qD declared " - "%<thread_local%> in %<constexpr%> function", tmp); + "%<thread_local%> in %<constexpr%> context", tmp); return false; } else if (!DECL_NONTRIVIALLY_INITIALIZED_P (tmp)) { if (flags & tf_error) error_at (DECL_SOURCE_LOCATION (tmp), "uninitialized " - "variable %qD in %<constexpr%> function", tmp); + "variable %qD in %<constexpr%> context", tmp); return false; } } diff --git a/gcc/cp/cp-cilkplus.c b/gcc/cp/cp-cilkplus.c index 7c664482371..5ccf5d3385d 100644 --- a/gcc/cp/cp-cilkplus.c +++ b/gcc/cp/cp-cilkplus.c @@ -36,7 +36,7 @@ is_conversion_operator_function_decl_p (tree t) if (TREE_CODE (t) != FUNCTION_DECL) return false; - return DECL_NAME (t) && IDENTIFIER_TYPENAME_P (DECL_NAME (t)); + return DECL_CONV_FN_P (t); } /* Recursively traverse EXP to search for a CILK_SPAWN_STMT subtree. diff --git a/gcc/cp/cp-gimplify.c b/gcc/cp/cp-gimplify.c index e3802f1820b..f010f6c63be 100644 --- a/gcc/cp/cp-gimplify.c +++ b/gcc/cp/cp-gimplify.c @@ -33,6 +33,7 @@ along with GCC; see the file COPYING3. If not see #include "c-family/c-ubsan.h" #include "cilk.h" #include "cp-cilkplus.h" +#include "asan.h" /* Forward declarations. */ @@ -1117,132 +1118,135 @@ cp_genericize_r (tree *stmt_p, int *walk_subtrees, void *data) return NULL_TREE; } - if (TREE_CODE (stmt) == ADDR_EXPR - && is_invisiref_parm (TREE_OPERAND (stmt, 0))) + switch (TREE_CODE (stmt)) { - /* If in an OpenMP context, note var uses. */ - if (__builtin_expect (wtd->omp_ctx != NULL, 0) - && omp_var_to_track (TREE_OPERAND (stmt, 0))) - omp_cxx_notice_variable (wtd->omp_ctx, TREE_OPERAND (stmt, 0)); - *stmt_p = fold_convert (TREE_TYPE (stmt), TREE_OPERAND (stmt, 0)); - *walk_subtrees = 0; - } - else if (TREE_CODE (stmt) == RETURN_EXPR - && TREE_OPERAND (stmt, 0) - && is_invisiref_parm (TREE_OPERAND (stmt, 0))) - /* Don't dereference an invisiref RESULT_DECL inside a RETURN_EXPR. */ - *walk_subtrees = 0; - else if (TREE_CODE (stmt) == OMP_CLAUSE) - switch (OMP_CLAUSE_CODE (stmt)) - { - case OMP_CLAUSE_LASTPRIVATE: - /* Don't dereference an invisiref in OpenMP clauses. */ - if (is_invisiref_parm (OMP_CLAUSE_DECL (stmt))) - { - *walk_subtrees = 0; - if (OMP_CLAUSE_LASTPRIVATE_STMT (stmt)) - cp_walk_tree (&OMP_CLAUSE_LASTPRIVATE_STMT (stmt), - cp_genericize_r, data, NULL); - } - break; - case OMP_CLAUSE_PRIVATE: - /* Don't dereference an invisiref in OpenMP clauses. */ - if (is_invisiref_parm (OMP_CLAUSE_DECL (stmt))) + case ADDR_EXPR: + if (is_invisiref_parm (TREE_OPERAND (stmt, 0))) + { + /* If in an OpenMP context, note var uses. */ + if (__builtin_expect (wtd->omp_ctx != NULL, 0) + && omp_var_to_track (TREE_OPERAND (stmt, 0))) + omp_cxx_notice_variable (wtd->omp_ctx, TREE_OPERAND (stmt, 0)); + *stmt_p = fold_convert (TREE_TYPE (stmt), TREE_OPERAND (stmt, 0)); *walk_subtrees = 0; - else if (wtd->omp_ctx != NULL) - { - /* Private clause doesn't cause any references to the - var in outer contexts, avoid calling - omp_cxx_notice_variable for it. */ - struct cp_genericize_omp_taskreg *old = wtd->omp_ctx; - wtd->omp_ctx = NULL; - cp_walk_tree (&OMP_CLAUSE_DECL (stmt), cp_genericize_r, - data, NULL); - wtd->omp_ctx = old; + } + break; + + case RETURN_EXPR: + if (TREE_OPERAND (stmt, 0) && is_invisiref_parm (TREE_OPERAND (stmt, 0))) + /* Don't dereference an invisiref RESULT_DECL inside a RETURN_EXPR. */ + *walk_subtrees = 0; + break; + + case OMP_CLAUSE: + switch (OMP_CLAUSE_CODE (stmt)) + { + case OMP_CLAUSE_LASTPRIVATE: + /* Don't dereference an invisiref in OpenMP clauses. */ + if (is_invisiref_parm (OMP_CLAUSE_DECL (stmt))) + { + *walk_subtrees = 0; + if (OMP_CLAUSE_LASTPRIVATE_STMT (stmt)) + cp_walk_tree (&OMP_CLAUSE_LASTPRIVATE_STMT (stmt), + cp_genericize_r, data, NULL); + } + break; + case OMP_CLAUSE_PRIVATE: + /* Don't dereference an invisiref in OpenMP clauses. */ + if (is_invisiref_parm (OMP_CLAUSE_DECL (stmt))) *walk_subtrees = 0; - } - break; - case OMP_CLAUSE_SHARED: - case OMP_CLAUSE_FIRSTPRIVATE: - case OMP_CLAUSE_COPYIN: - case OMP_CLAUSE_COPYPRIVATE: - /* Don't dereference an invisiref in OpenMP clauses. */ - if (is_invisiref_parm (OMP_CLAUSE_DECL (stmt))) - *walk_subtrees = 0; - break; - case OMP_CLAUSE_REDUCTION: - /* Don't dereference an invisiref in reduction clause's - OMP_CLAUSE_DECL either. OMP_CLAUSE_REDUCTION_{INIT,MERGE} - still needs to be genericized. */ - if (is_invisiref_parm (OMP_CLAUSE_DECL (stmt))) - { + else if (wtd->omp_ctx != NULL) + { + /* Private clause doesn't cause any references to the + var in outer contexts, avoid calling + omp_cxx_notice_variable for it. */ + struct cp_genericize_omp_taskreg *old = wtd->omp_ctx; + wtd->omp_ctx = NULL; + cp_walk_tree (&OMP_CLAUSE_DECL (stmt), cp_genericize_r, + data, NULL); + wtd->omp_ctx = old; + *walk_subtrees = 0; + } + break; + case OMP_CLAUSE_SHARED: + case OMP_CLAUSE_FIRSTPRIVATE: + case OMP_CLAUSE_COPYIN: + case OMP_CLAUSE_COPYPRIVATE: + /* Don't dereference an invisiref in OpenMP clauses. */ + if (is_invisiref_parm (OMP_CLAUSE_DECL (stmt))) *walk_subtrees = 0; - if (OMP_CLAUSE_REDUCTION_INIT (stmt)) - cp_walk_tree (&OMP_CLAUSE_REDUCTION_INIT (stmt), - cp_genericize_r, data, NULL); - if (OMP_CLAUSE_REDUCTION_MERGE (stmt)) - cp_walk_tree (&OMP_CLAUSE_REDUCTION_MERGE (stmt), - cp_genericize_r, data, NULL); - } - break; - default: - break; - } - else if (IS_TYPE_OR_DECL_P (stmt)) - *walk_subtrees = 0; - - /* Due to the way voidify_wrapper_expr is written, we don't get a chance - to lower this construct before scanning it, so we need to lower these - before doing anything else. */ - else if (TREE_CODE (stmt) == CLEANUP_STMT) - *stmt_p = build2_loc (EXPR_LOCATION (stmt), - CLEANUP_EH_ONLY (stmt) ? TRY_CATCH_EXPR - : TRY_FINALLY_EXPR, - void_type_node, - CLEANUP_BODY (stmt), - CLEANUP_EXPR (stmt)); - - else if (TREE_CODE (stmt) == IF_STMT) - { + break; + case OMP_CLAUSE_REDUCTION: + /* Don't dereference an invisiref in reduction clause's + OMP_CLAUSE_DECL either. OMP_CLAUSE_REDUCTION_{INIT,MERGE} + still needs to be genericized. */ + if (is_invisiref_parm (OMP_CLAUSE_DECL (stmt))) + { + *walk_subtrees = 0; + if (OMP_CLAUSE_REDUCTION_INIT (stmt)) + cp_walk_tree (&OMP_CLAUSE_REDUCTION_INIT (stmt), + cp_genericize_r, data, NULL); + if (OMP_CLAUSE_REDUCTION_MERGE (stmt)) + cp_walk_tree (&OMP_CLAUSE_REDUCTION_MERGE (stmt), + cp_genericize_r, data, NULL); + } + break; + default: + break; + } + break; + + /* Due to the way voidify_wrapper_expr is written, we don't get a chance + to lower this construct before scanning it, so we need to lower these + before doing anything else. */ + case CLEANUP_STMT: + *stmt_p = build2_loc (EXPR_LOCATION (stmt), + CLEANUP_EH_ONLY (stmt) ? TRY_CATCH_EXPR + : TRY_FINALLY_EXPR, + void_type_node, + CLEANUP_BODY (stmt), + CLEANUP_EXPR (stmt)); + break; + + case IF_STMT: genericize_if_stmt (stmt_p); /* *stmt_p has changed, tail recurse to handle it again. */ return cp_genericize_r (stmt_p, walk_subtrees, data); - } - /* COND_EXPR might have incompatible types in branches if one or both - arms are bitfields. Fix it up now. */ - else if (TREE_CODE (stmt) == COND_EXPR) - { - tree type_left - = (TREE_OPERAND (stmt, 1) - ? is_bitfield_expr_with_lowered_type (TREE_OPERAND (stmt, 1)) - : NULL_TREE); - tree type_right - = (TREE_OPERAND (stmt, 2) - ? is_bitfield_expr_with_lowered_type (TREE_OPERAND (stmt, 2)) - : NULL_TREE); - if (type_left - && !useless_type_conversion_p (TREE_TYPE (stmt), - TREE_TYPE (TREE_OPERAND (stmt, 1)))) - { - TREE_OPERAND (stmt, 1) - = fold_convert (type_left, TREE_OPERAND (stmt, 1)); - gcc_assert (useless_type_conversion_p (TREE_TYPE (stmt), - type_left)); - } - if (type_right - && !useless_type_conversion_p (TREE_TYPE (stmt), - TREE_TYPE (TREE_OPERAND (stmt, 2)))) - { - TREE_OPERAND (stmt, 2) - = fold_convert (type_right, TREE_OPERAND (stmt, 2)); - gcc_assert (useless_type_conversion_p (TREE_TYPE (stmt), - type_right)); - } - } + /* COND_EXPR might have incompatible types in branches if one or both + arms are bitfields. Fix it up now. */ + case COND_EXPR: + { + tree type_left + = (TREE_OPERAND (stmt, 1) + ? is_bitfield_expr_with_lowered_type (TREE_OPERAND (stmt, 1)) + : NULL_TREE); + tree type_right + = (TREE_OPERAND (stmt, 2) + ? is_bitfield_expr_with_lowered_type (TREE_OPERAND (stmt, 2)) + : NULL_TREE); + if (type_left + && !useless_type_conversion_p (TREE_TYPE (stmt), + TREE_TYPE (TREE_OPERAND (stmt, 1)))) + { + TREE_OPERAND (stmt, 1) + = fold_convert (type_left, TREE_OPERAND (stmt, 1)); + gcc_assert (useless_type_conversion_p (TREE_TYPE (stmt), + type_left)); + } + if (type_right + && !useless_type_conversion_p (TREE_TYPE (stmt), + TREE_TYPE (TREE_OPERAND (stmt, 2)))) + { + TREE_OPERAND (stmt, 2) + = fold_convert (type_right, TREE_OPERAND (stmt, 2)); + gcc_assert (useless_type_conversion_p (TREE_TYPE (stmt), + type_right)); + } + } + break; - else if (TREE_CODE (stmt) == BIND_EXPR) - { + case BIND_EXPR: if (__builtin_expect (wtd->omp_ctx != NULL, 0)) { tree decl; @@ -1262,8 +1266,7 @@ cp_genericize_r (tree *stmt_p, int *walk_subtrees, void *data) : OMP_CLAUSE_DEFAULT_PRIVATE); } } - if (flag_sanitize - & (SANITIZE_NULL | SANITIZE_ALIGNMENT | SANITIZE_VPTR)) + if (sanitize_flags_p (SANITIZE_NULL | SANITIZE_ALIGNMENT | SANITIZE_VPTR)) { /* The point here is to not sanitize static initializers. */ bool no_sanitize_p = wtd->no_sanitize_p; @@ -1281,113 +1284,118 @@ cp_genericize_r (tree *stmt_p, int *walk_subtrees, void *data) cp_walk_tree (&BIND_EXPR_BODY (stmt), cp_genericize_r, data, NULL); wtd->bind_expr_stack.pop (); - } + break; - else if (TREE_CODE (stmt) == USING_STMT) - { - tree block = NULL_TREE; + case USING_STMT: + { + tree block = NULL_TREE; + + /* Get the innermost inclosing GIMPLE_BIND that has a non NULL + BLOCK, and append an IMPORTED_DECL to its + BLOCK_VARS chained list. */ + if (wtd->bind_expr_stack.exists ()) + { + int i; + for (i = wtd->bind_expr_stack.length () - 1; i >= 0; i--) + if ((block = BIND_EXPR_BLOCK (wtd->bind_expr_stack[i]))) + break; + } + if (block) + { + tree using_directive; + gcc_assert (TREE_OPERAND (stmt, 0)); - /* Get the innermost inclosing GIMPLE_BIND that has a non NULL - BLOCK, and append an IMPORTED_DECL to its - BLOCK_VARS chained list. */ - if (wtd->bind_expr_stack.exists ()) + using_directive = make_node (IMPORTED_DECL); + TREE_TYPE (using_directive) = void_type_node; + + IMPORTED_DECL_ASSOCIATED_DECL (using_directive) + = TREE_OPERAND (stmt, 0); + DECL_CHAIN (using_directive) = BLOCK_VARS (block); + BLOCK_VARS (block) = using_directive; + } + /* The USING_STMT won't appear in GENERIC. */ + *stmt_p = build1 (NOP_EXPR, void_type_node, integer_zero_node); + *walk_subtrees = 0; + } + break; + + case DECL_EXPR: + if (TREE_CODE (DECL_EXPR_DECL (stmt)) == USING_DECL) { - int i; - for (i = wtd->bind_expr_stack.length () - 1; i >= 0; i--) - if ((block = BIND_EXPR_BLOCK (wtd->bind_expr_stack[i]))) - break; + /* Using decls inside DECL_EXPRs are just dropped on the floor. */ + *stmt_p = build1 (NOP_EXPR, void_type_node, integer_zero_node); + *walk_subtrees = 0; } - if (block) + else { - tree using_directive; - gcc_assert (TREE_OPERAND (stmt, 0)); - - using_directive = make_node (IMPORTED_DECL); - TREE_TYPE (using_directive) = void_type_node; - - IMPORTED_DECL_ASSOCIATED_DECL (using_directive) - = TREE_OPERAND (stmt, 0); - DECL_CHAIN (using_directive) = BLOCK_VARS (block); - BLOCK_VARS (block) = using_directive; + tree d = DECL_EXPR_DECL (stmt); + if (VAR_P (d)) + gcc_assert (CP_DECL_THREAD_LOCAL_P (d) == DECL_THREAD_LOCAL_P (d)); } - /* The USING_STMT won't appear in GENERIC. */ - *stmt_p = build1 (NOP_EXPR, void_type_node, integer_zero_node); - *walk_subtrees = 0; - } - - else if (TREE_CODE (stmt) == DECL_EXPR - && TREE_CODE (DECL_EXPR_DECL (stmt)) == USING_DECL) - { - /* Using decls inside DECL_EXPRs are just dropped on the floor. */ - *stmt_p = build1 (NOP_EXPR, void_type_node, integer_zero_node); - *walk_subtrees = 0; - } - else if (TREE_CODE (stmt) == DECL_EXPR) - { - tree d = DECL_EXPR_DECL (stmt); - if (VAR_P (d)) - gcc_assert (CP_DECL_THREAD_LOCAL_P (d) == DECL_THREAD_LOCAL_P (d)); - } - else if (TREE_CODE (stmt) == OMP_PARALLEL - || TREE_CODE (stmt) == OMP_TASK - || TREE_CODE (stmt) == OMP_TASKLOOP) - { - struct cp_genericize_omp_taskreg omp_ctx; - tree c, decl; - splay_tree_node n; + break; - *walk_subtrees = 0; - cp_walk_tree (&OMP_CLAUSES (stmt), cp_genericize_r, data, NULL); - omp_ctx.is_parallel = TREE_CODE (stmt) == OMP_PARALLEL; - omp_ctx.default_shared = omp_ctx.is_parallel; - omp_ctx.outer = wtd->omp_ctx; - omp_ctx.variables = splay_tree_new (splay_tree_compare_decl_uid, 0, 0); - wtd->omp_ctx = &omp_ctx; - for (c = OMP_CLAUSES (stmt); c; c = OMP_CLAUSE_CHAIN (c)) - switch (OMP_CLAUSE_CODE (c)) - { - case OMP_CLAUSE_SHARED: - case OMP_CLAUSE_PRIVATE: - case OMP_CLAUSE_FIRSTPRIVATE: - case OMP_CLAUSE_LASTPRIVATE: - decl = OMP_CLAUSE_DECL (c); - if (decl == error_mark_node || !omp_var_to_track (decl)) + case OMP_PARALLEL: + case OMP_TASK: + case OMP_TASKLOOP: + { + struct cp_genericize_omp_taskreg omp_ctx; + tree c, decl; + splay_tree_node n; + + *walk_subtrees = 0; + cp_walk_tree (&OMP_CLAUSES (stmt), cp_genericize_r, data, NULL); + omp_ctx.is_parallel = TREE_CODE (stmt) == OMP_PARALLEL; + omp_ctx.default_shared = omp_ctx.is_parallel; + omp_ctx.outer = wtd->omp_ctx; + omp_ctx.variables = splay_tree_new (splay_tree_compare_decl_uid, 0, 0); + wtd->omp_ctx = &omp_ctx; + for (c = OMP_CLAUSES (stmt); c; c = OMP_CLAUSE_CHAIN (c)) + switch (OMP_CLAUSE_CODE (c)) + { + case OMP_CLAUSE_SHARED: + case OMP_CLAUSE_PRIVATE: + case OMP_CLAUSE_FIRSTPRIVATE: + case OMP_CLAUSE_LASTPRIVATE: + decl = OMP_CLAUSE_DECL (c); + if (decl == error_mark_node || !omp_var_to_track (decl)) + break; + n = splay_tree_lookup (omp_ctx.variables, (splay_tree_key) decl); + if (n != NULL) + break; + splay_tree_insert (omp_ctx.variables, (splay_tree_key) decl, + OMP_CLAUSE_CODE (c) == OMP_CLAUSE_SHARED + ? OMP_CLAUSE_DEFAULT_SHARED + : OMP_CLAUSE_DEFAULT_PRIVATE); + if (OMP_CLAUSE_CODE (c) != OMP_CLAUSE_PRIVATE && omp_ctx.outer) + omp_cxx_notice_variable (omp_ctx.outer, decl); break; - n = splay_tree_lookup (omp_ctx.variables, (splay_tree_key) decl); - if (n != NULL) + case OMP_CLAUSE_DEFAULT: + if (OMP_CLAUSE_DEFAULT_KIND (c) == OMP_CLAUSE_DEFAULT_SHARED) + omp_ctx.default_shared = true; + default: break; - splay_tree_insert (omp_ctx.variables, (splay_tree_key) decl, - OMP_CLAUSE_CODE (c) == OMP_CLAUSE_SHARED - ? OMP_CLAUSE_DEFAULT_SHARED - : OMP_CLAUSE_DEFAULT_PRIVATE); - if (OMP_CLAUSE_CODE (c) != OMP_CLAUSE_PRIVATE - && omp_ctx.outer) - omp_cxx_notice_variable (omp_ctx.outer, decl); - break; - case OMP_CLAUSE_DEFAULT: - if (OMP_CLAUSE_DEFAULT_KIND (c) == OMP_CLAUSE_DEFAULT_SHARED) - omp_ctx.default_shared = true; - default: - break; - } - if (TREE_CODE (stmt) == OMP_TASKLOOP) - genericize_omp_for_stmt (stmt_p, walk_subtrees, data); - else - cp_walk_tree (&OMP_BODY (stmt), cp_genericize_r, data, NULL); - wtd->omp_ctx = omp_ctx.outer; - splay_tree_delete (omp_ctx.variables); - } - else if (TREE_CODE (stmt) == TRY_BLOCK) - { - *walk_subtrees = 0; - tree try_block = wtd->try_block; - wtd->try_block = stmt; - cp_walk_tree (&TRY_STMTS (stmt), cp_genericize_r, data, NULL); - wtd->try_block = try_block; - cp_walk_tree (&TRY_HANDLERS (stmt), cp_genericize_r, data, NULL); - } - else if (TREE_CODE (stmt) == MUST_NOT_THROW_EXPR) - { + } + if (TREE_CODE (stmt) == OMP_TASKLOOP) + genericize_omp_for_stmt (stmt_p, walk_subtrees, data); + else + cp_walk_tree (&OMP_BODY (stmt), cp_genericize_r, data, NULL); + wtd->omp_ctx = omp_ctx.outer; + splay_tree_delete (omp_ctx.variables); + } + break; + + case TRY_BLOCK: + { + *walk_subtrees = 0; + tree try_block = wtd->try_block; + wtd->try_block = stmt; + cp_walk_tree (&TRY_STMTS (stmt), cp_genericize_r, data, NULL); + wtd->try_block = try_block; + cp_walk_tree (&TRY_HANDLERS (stmt), cp_genericize_r, data, NULL); + } + break; + + case MUST_NOT_THROW_EXPR: /* MUST_NOT_THROW_COND might be something else with TM. */ if (MUST_NOT_THROW_COND (stmt) == NULL_TREE) { @@ -1397,68 +1405,99 @@ cp_genericize_r (tree *stmt_p, int *walk_subtrees, void *data) cp_walk_tree (&TREE_OPERAND (stmt, 0), cp_genericize_r, data, NULL); wtd->try_block = try_block; } - } - else if (TREE_CODE (stmt) == THROW_EXPR) - { - location_t loc = location_of (stmt); - if (TREE_NO_WARNING (stmt)) - /* Never mind. */; - else if (wtd->try_block) - { - if (TREE_CODE (wtd->try_block) == MUST_NOT_THROW_EXPR - && warning_at (loc, OPT_Wterminate, - "throw will always call terminate()") - && cxx_dialect >= cxx11 - && DECL_DESTRUCTOR_P (current_function_decl)) - inform (loc, "in C++11 destructors default to noexcept"); - } - else - { - if (warn_cxx11_compat && cxx_dialect < cxx11 - && DECL_DESTRUCTOR_P (current_function_decl) - && (TYPE_RAISES_EXCEPTIONS (TREE_TYPE (current_function_decl)) - == NULL_TREE) - && (get_defaulted_eh_spec (current_function_decl) - == empty_except_spec)) - warning_at (loc, OPT_Wc__11_compat, - "in C++11 this throw will terminate because " - "destructors default to noexcept"); - } - } - else if (TREE_CODE (stmt) == CONVERT_EXPR) - gcc_assert (!CONVERT_EXPR_VBASE_PATH (stmt)); - else if (TREE_CODE (stmt) == FOR_STMT) - genericize_for_stmt (stmt_p, walk_subtrees, data); - else if (TREE_CODE (stmt) == WHILE_STMT) - genericize_while_stmt (stmt_p, walk_subtrees, data); - else if (TREE_CODE (stmt) == DO_STMT) - genericize_do_stmt (stmt_p, walk_subtrees, data); - else if (TREE_CODE (stmt) == SWITCH_STMT) - genericize_switch_stmt (stmt_p, walk_subtrees, data); - else if (TREE_CODE (stmt) == CONTINUE_STMT) - genericize_continue_stmt (stmt_p); - else if (TREE_CODE (stmt) == BREAK_STMT) - genericize_break_stmt (stmt_p); - else if (TREE_CODE (stmt) == OMP_FOR - || TREE_CODE (stmt) == OMP_SIMD - || TREE_CODE (stmt) == OMP_DISTRIBUTE) - genericize_omp_for_stmt (stmt_p, walk_subtrees, data); - else if (TREE_CODE (stmt) == PTRMEM_CST) - { + break; + + case THROW_EXPR: + { + location_t loc = location_of (stmt); + if (TREE_NO_WARNING (stmt)) + /* Never mind. */; + else if (wtd->try_block) + { + if (TREE_CODE (wtd->try_block) == MUST_NOT_THROW_EXPR + && warning_at (loc, OPT_Wterminate, + "throw will always call terminate()") + && cxx_dialect >= cxx11 + && DECL_DESTRUCTOR_P (current_function_decl)) + inform (loc, "in C++11 destructors default to noexcept"); + } + else + { + if (warn_cxx11_compat && cxx_dialect < cxx11 + && DECL_DESTRUCTOR_P (current_function_decl) + && (TYPE_RAISES_EXCEPTIONS (TREE_TYPE (current_function_decl)) + == NULL_TREE) + && (get_defaulted_eh_spec (current_function_decl) + == empty_except_spec)) + warning_at (loc, OPT_Wc__11_compat, + "in C++11 this throw will terminate because " + "destructors default to noexcept"); + } + } + break; + + case CONVERT_EXPR: + gcc_assert (!CONVERT_EXPR_VBASE_PATH (stmt)); + break; + + case FOR_STMT: + genericize_for_stmt (stmt_p, walk_subtrees, data); + break; + + case WHILE_STMT: + genericize_while_stmt (stmt_p, walk_subtrees, data); + break; + + case DO_STMT: + genericize_do_stmt (stmt_p, walk_subtrees, data); + break; + + case SWITCH_STMT: + genericize_switch_stmt (stmt_p, walk_subtrees, data); + break; + + case CONTINUE_STMT: + genericize_continue_stmt (stmt_p); + break; + + case BREAK_STMT: + genericize_break_stmt (stmt_p); + break; + + case OMP_FOR: + case OMP_SIMD: + case OMP_DISTRIBUTE: + genericize_omp_for_stmt (stmt_p, walk_subtrees, data); + break; + + case PTRMEM_CST: /* By the time we get here we're handing off to the back end, so we don't need or want to preserve PTRMEM_CST anymore. */ *stmt_p = cplus_expand_constant (stmt); *walk_subtrees = 0; - } - else if ((flag_sanitize - & (SANITIZE_NULL | SANITIZE_ALIGNMENT | SANITIZE_VPTR)) - && !wtd->no_sanitize_p) - { - if ((flag_sanitize & (SANITIZE_NULL | SANITIZE_ALIGNMENT)) - && TREE_CODE (stmt) == NOP_EXPR + break; + + case MEM_REF: + /* For MEM_REF, make sure not to sanitize the second operand even + if it has reference type. It is just an offset with a type + holding other information. There is no other processing we + need to do for INTEGER_CSTs, so just ignore the second argument + unconditionally. */ + cp_walk_tree (&TREE_OPERAND (stmt, 0), cp_genericize_r, data, NULL); + *walk_subtrees = 0; + break; + + case NOP_EXPR: + if (!wtd->no_sanitize_p + && sanitize_flags_p (SANITIZE_NULL | SANITIZE_ALIGNMENT) && TREE_CODE (TREE_TYPE (stmt)) == REFERENCE_TYPE) ubsan_maybe_instrument_reference (stmt_p); - else if (TREE_CODE (stmt) == CALL_EXPR) + break; + + case CALL_EXPR: + if (!wtd->no_sanitize_p + && sanitize_flags_p ((SANITIZE_NULL + | SANITIZE_ALIGNMENT | SANITIZE_VPTR))) { tree fn = CALL_EXPR_FN (stmt); if (fn != NULL_TREE @@ -1470,12 +1509,18 @@ cp_genericize_r (tree *stmt_p, int *walk_subtrees, void *data) = TREE_CODE (fn) == ADDR_EXPR && TREE_CODE (TREE_OPERAND (fn, 0)) == FUNCTION_DECL && DECL_CONSTRUCTOR_P (TREE_OPERAND (fn, 0)); - if (flag_sanitize & (SANITIZE_NULL | SANITIZE_ALIGNMENT)) + if (sanitize_flags_p (SANITIZE_NULL | SANITIZE_ALIGNMENT)) ubsan_maybe_instrument_member_call (stmt, is_ctor); - if ((flag_sanitize & SANITIZE_VPTR) && !is_ctor) + if (sanitize_flags_p (SANITIZE_VPTR) && !is_ctor) cp_ubsan_maybe_instrument_member_call (stmt); } } + break; + + default: + if (IS_TYPE_OR_DECL_P (stmt)) + *walk_subtrees = 0; + break; } p_set->add (*stmt_p); @@ -1499,7 +1544,7 @@ cp_genericize_tree (tree* t_p, bool handle_invisiref_parm_p) cp_walk_tree (t_p, cp_genericize_r, &wtd, NULL); delete wtd.p_set; wtd.bind_expr_stack.release (); - if (flag_sanitize & SANITIZE_VPTR) + if (sanitize_flags_p (SANITIZE_VPTR)) cp_ubsan_instrument_member_accesses (t_p); } @@ -1590,7 +1635,8 @@ cp_genericize (tree fndecl) if (outer) for (var = BLOCK_VARS (outer); var; var = DECL_CHAIN (var)) - if (DECL_NAME (t) == DECL_NAME (var) + if (VAR_P (var) + && DECL_NAME (t) == DECL_NAME (var) && DECL_HAS_VALUE_EXPR_P (var) && DECL_VALUE_EXPR (var) == t) { @@ -1622,8 +1668,7 @@ cp_genericize (tree fndecl) walk_tree's hash functionality. */ cp_genericize_tree (&DECL_SAVED_TREE (fndecl), true); - if (flag_sanitize & SANITIZE_RETURN - && do_ubsan_in_current_function ()) + if (sanitize_flags_p (SANITIZE_RETURN)) cp_ubsan_maybe_instrument_return (fndecl); /* Do everything else. */ @@ -1837,7 +1882,8 @@ cxx_omp_const_qual_no_mutable (tree decl) if (outer) for (var = BLOCK_VARS (outer); var; var = DECL_CHAIN (var)) - if (DECL_NAME (decl) == DECL_NAME (var) + if (VAR_P (var) + && DECL_NAME (decl) == DECL_NAME (var) && (TYPE_MAIN_VARIANT (type) == TYPE_MAIN_VARIANT (TREE_TYPE (var)))) { diff --git a/gcc/cp/cp-tree.h b/gcc/cp/cp-tree.h index 5dd6023be16..33dde158dae 100644 --- a/gcc/cp/cp-tree.h +++ b/gcc/cp/cp-tree.h @@ -136,7 +136,6 @@ enum cp_tree_index CPTI_DELTA_IDENTIFIER, CPTI_IN_CHARGE_IDENTIFIER, CPTI_VTT_PARM_IDENTIFIER, - CPTI_NELTS_IDENTIFIER, CPTI_THIS_IDENTIFIER, CPTI_PFN_IDENTIFIER, CPTI_VPTR_IDENTIFIER, @@ -169,8 +168,6 @@ enum cp_tree_index CPTI_DSO_HANDLE, CPTI_DCAST, - CPTI_KEYED_CLASSES, - CPTI_NULLPTR, CPTI_NULLPTR_TYPE, @@ -236,7 +233,6 @@ extern GTY(()) tree cp_global_trees[CPTI_MAX]; /* The name of the parameter that contains a pointer to the VTT to use for this subobject constructor or destructor. */ #define vtt_parm_identifier cp_global_trees[CPTI_VTT_PARM_IDENTIFIER] -#define nelts_identifier cp_global_trees[CPTI_NELTS_IDENTIFIER] #define this_identifier cp_global_trees[CPTI_THIS_IDENTIFIER] #define pfn_identifier cp_global_trees[CPTI_PFN_IDENTIFIER] #define vptr_identifier cp_global_trees[CPTI_VPTR_IDENTIFIER] @@ -290,11 +286,6 @@ extern GTY(()) tree cp_global_trees[CPTI_MAX]; destructors. */ #define vtt_parm_type cp_global_trees[CPTI_VTT_PARM_TYPE] -/* A TREE_LIST of the dynamic classes whose vtables may have to be - emitted in this translation unit. */ - -#define keyed_classes cp_global_trees[CPTI_KEYED_CLASSES] - /* A node which matches any template argument. */ #define any_targ_node cp_global_trees[CPTI_ANY_TARG] @@ -307,7 +298,7 @@ extern GTY(()) tree cp_global_trees[CPTI_MAX]; #include "name-lookup.h" /* Usage of TREE_LANG_FLAG_?: - 0: IDENTIFIER_MARKED (IDENTIFIER_NODEs) + 0: IDENTIFIER_KIND_BIT_0 (in IDENTIFIER_NODE) NEW_EXPR_USE_GLOBAL (in NEW_EXPR). COND_EXPR_IS_VEC_DELETE (in COND_EXPR). DELETE_EXPR_USE_GLOBAL (in DELETE_EXPR). @@ -348,7 +339,7 @@ extern GTY(()) tree cp_global_trees[CPTI_MAX]; IF_STMT_CONSTEXPR_P (IF_STMT) TEMPLATE_TYPE_PARM_FOR_CLASS (TEMPLATE_TYPE_PARM) DECL_NAMESPACE_INLINE_P (in NAMESPACE_DECL) - 1: IDENTIFIER_VIRTUAL_P (in IDENTIFIER_NODE) + 1: IDENTIFIER_KIND_BIT_1 (in IDENTIFIER_NODE) TI_PENDING_TEMPLATE_FLAG. TEMPLATE_PARMS_FOR_INLINE. DELETE_EXPR_USE_VEC (in DELETE_EXPR). @@ -366,7 +357,7 @@ extern GTY(()) tree cp_global_trees[CPTI_MAX]; TINFO_USED_TEMPLATE_ID (in TEMPLATE_INFO) PACK_EXPANSION_SIZEOF_P (in *_PACK_EXPANSION) OVL_USING_P (in OVERLOAD) - 2: IDENTIFIER_OPNAME_P (in IDENTIFIER_NODE) + 2: IDENTIFIER_KIND_BIT_2 (in IDENTIFIER_NODE) ICS_THIS_FLAG (in _CONV) DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (in VAR_DECL) STATEMENT_LIST_TRY_BLOCK (in STATEMENT_LIST) @@ -381,21 +372,20 @@ extern GTY(()) tree cp_global_trees[CPTI_MAX]; 3: (TREE_REFERENCE_EXPR) (in NON_LVALUE_EXPR) (commented-out). ICS_BAD_FLAG (in _CONV) FN_TRY_BLOCK_P (in TRY_BLOCK) - IDENTIFIER_CTOR_OR_DTOR_P (in IDENTIFIER_NODE) BIND_EXPR_BODY_BLOCK (in BIND_EXPR) DECL_NON_TRIVIALLY_INITIALIZED_P (in VAR_DECL) CALL_EXPR_ORDERED_ARGS (in CALL_EXPR, AGGR_INIT_EXPR) DECLTYPE_FOR_REF_CAPTURE (in DECLTYPE_TYPE) CONSTUCTOR_C99_COMPOUND_LITERAL (in CONSTRUCTOR) OVL_NESTED_P (in OVERLOAD) - 4: TREE_HAS_CONSTRUCTOR (in INDIRECT_REF, SAVE_EXPR, CONSTRUCTOR, + 4: IDENTIFIER_MARKED (IDENTIFIER_NODEs) + TREE_HAS_CONSTRUCTOR (in INDIRECT_REF, SAVE_EXPR, CONSTRUCTOR, CALL_EXPR, or FIELD_DECL). - IDENTIFIER_TYPENAME_P (in IDENTIFIER_NODE) DECL_TINFO_P (in VAR_DECL) FUNCTION_REF_QUALIFIED (in FUNCTION_TYPE, METHOD_TYPE) OVL_LOOKUP_P (in OVERLOAD) LOOKUP_FOUND_P (in RECORD_TYPE, UNION_TYPE, NAMESPACE_DECL) - 5: C_IS_RESERVED_WORD (in IDENTIFIER_NODE) + 5: IDENTIFIER_VIRTUAL_P (in IDENTIFIER_NODE) DECL_VTABLE_OR_VTT_P (in VAR_DECL) FUNCTION_RVALUE_QUALIFIED (in FUNCTION_TYPE, METHOD_TYPE) CALL_EXPR_REVERSE_ARGS (in CALL_EXPR, AGGR_INIT_EXPR) @@ -557,7 +547,7 @@ identifier_p (tree t) template <> struct default_hash_traits <lang_identifier *> - : pointer_hash <tree_node>, ggc_remove <tree> + : pointer_hash <tree_node> { /* Use a regular tree as the type, to make using the hash table simpler. We'll get dynamic type checking with the hash function @@ -565,16 +555,15 @@ struct default_hash_traits <lang_identifier *> GTY((skip)) typedef tree value_type; GTY((skip)) typedef tree compare_type; - static hashval_t hash (const value_type &id) + static hashval_t hash (const value_type id) { return IDENTIFIER_HASH_VALUE (id); } -}; - -/* In an IDENTIFIER_NODE, nonzero if this identifier is actually a - keyword. C_RID_CODE (node) is then the RID_* value of the keyword. */ -#define C_IS_RESERVED_WORD(ID) TREE_LANG_FLAG_5 (ID) + /* Nothing is deletable. Everything is insertable. */ + static bool is_deleted (value_type) { return false; } + static void remove (value_type) { gcc_unreachable (); } +}; #define LANG_IDENTIFIER_CAST(NODE) \ ((struct lang_identifier*)IDENTIFIER_NODE_CHECK (NODE)) @@ -992,29 +981,89 @@ enum GTY(()) abstract_class_use { #define SET_IDENTIFIER_LABEL_VALUE(NODE, VALUE) \ IDENTIFIER_LABEL_VALUE (NODE) = (VALUE) -/* Nonzero if this identifier is used as a virtual function name somewhere - (optimizes searches). */ -#define IDENTIFIER_VIRTUAL_P(NODE) TREE_LANG_FLAG_1 (NODE) +/* Kinds of identifiers. Values are carefully chosen. */ +enum cp_identifier_kind { + cik_normal = 0, /* Not a special identifier. */ + cik_keyword = 1, /* A keyword. */ + cik_ctor = 2, /* Constructor (in-chg, complete or base). */ + cik_dtor = 3, /* Destructor (in-chg, deleting, complete or + base). */ + cik_simple_op = 4, /* Non-assignment operator name. */ + cik_newdel_op = 5, /* New or delete operator name. */ + cik_assign_op = 6, /* An assignment operator name. */ + cik_conv_op = 7, /* Conversion operator name. */ + cik_max +}; -/* Nonzero if this identifier is the prefix for a mangled C++ operator - name. */ -#define IDENTIFIER_OPNAME_P(NODE) TREE_LANG_FLAG_2 (NODE) +/* Kind bits. */ +#define IDENTIFIER_KIND_BIT_0(NODE) \ + TREE_LANG_FLAG_0 (IDENTIFIER_NODE_CHECK (NODE)) +#define IDENTIFIER_KIND_BIT_1(NODE) \ + TREE_LANG_FLAG_1 (IDENTIFIER_NODE_CHECK (NODE)) +#define IDENTIFIER_KIND_BIT_2(NODE) \ + TREE_LANG_FLAG_2 (IDENTIFIER_NODE_CHECK (NODE)) -/* Nonzero if this identifier is the name of a type-conversion - operator. */ -#define IDENTIFIER_TYPENAME_P(NODE) \ - TREE_LANG_FLAG_4 (NODE) +/* Used by various search routines. */ +#define IDENTIFIER_MARKED(NODE) \ + TREE_LANG_FLAG_4 (IDENTIFIER_NODE_CHECK (NODE)) -/* Nonzero if this identifier is the name of a constructor or - destructor. */ -#define IDENTIFIER_CTOR_OR_DTOR_P(NODE) \ - TREE_LANG_FLAG_3 (NODE) +/* Nonzero if this identifier is used as a virtual function name somewhere + (optimizes searches). */ +#define IDENTIFIER_VIRTUAL_P(NODE) \ + TREE_LANG_FLAG_5 (IDENTIFIER_NODE_CHECK (NODE)) /* True iff NAME is the DECL_ASSEMBLER_NAME for an entity with vague linkage which the prelinker has assigned to this translation unit. */ #define IDENTIFIER_REPO_CHOSEN(NAME) \ - (TREE_LANG_FLAG_6 (NAME)) + (TREE_LANG_FLAG_6 (IDENTIFIER_NODE_CHECK (NAME))) + +/* True if this identifier is a reserved word. C_RID_CODE (node) is + then the RID_* value of the keyword. Value 1. */ +#define IDENTIFIER_KEYWORD_P(NODE) \ + ((!IDENTIFIER_KIND_BIT_2 (NODE)) \ + & (!IDENTIFIER_KIND_BIT_1 (NODE)) \ + & IDENTIFIER_KIND_BIT_0 (NODE)) + +/* True if this identifier is the name of a constructor or + destructor. Value 2 or 3. */ +#define IDENTIFIER_CDTOR_P(NODE) \ + ((!IDENTIFIER_KIND_BIT_2 (NODE)) \ + & IDENTIFIER_KIND_BIT_1 (NODE)) + +/* True if this identifier is the name of a constructor. Value 2. */ +#define IDENTIFIER_CTOR_P(NODE) \ + (IDENTIFIER_CDTOR_P(NODE) \ + & (!IDENTIFIER_KIND_BIT_0 (NODE))) + +/* True if this identifier is the name of a destructor. Value 3. */ +#define IDENTIFIER_DTOR_P(NODE) \ + (IDENTIFIER_CDTOR_P(NODE) \ + & IDENTIFIER_KIND_BIT_0 (NODE)) + +/* True if this identifier is for any operator name (including + conversions). Value 4, 5, 6 or 7. */ +#define IDENTIFIER_ANY_OP_P(NODE) \ + (IDENTIFIER_KIND_BIT_2 (NODE)) + +/* True if this identifier is for new or delete operator. Value 5. */ +#define IDENTIFIER_NEWDEL_OP_P(NODE) \ + (IDENTIFIER_KIND_BIT_2 (NODE) \ + & (!IDENTIFIER_KIND_BIT_1 (NODE)) \ + & IDENTIFIER_KIND_BIT_0 (NODE)) + +/* True if this identifier is for any assignment. Values 6. */ +#define IDENTIFIER_ASSIGN_OP_P(NODE) \ + (IDENTIFIER_KIND_BIT_2 (NODE) \ + & IDENTIFIER_KIND_BIT_1 (NODE) \ + & (!IDENTIFIER_KIND_BIT_0 (NODE))) + +/* True if this identifier is the name of a type-conversion + operator. Value 7. */ +#define IDENTIFIER_CONV_OP_P(NODE) \ + (IDENTIFIER_KIND_BIT_2 (NODE) \ + & IDENTIFIER_KIND_BIT_1 (NODE) \ + & IDENTIFIER_KIND_BIT_0 (NODE)) /* In a RECORD_TYPE or UNION_TYPE, nonzero if any component is read-only. */ #define C_TYPE_FIELDS_READONLY(TYPE) \ @@ -1723,14 +1772,6 @@ struct GTY(()) language_function { #define current_function_auto_return_pattern \ (cp_function_chain->x_auto_return_pattern) -/* True if NAME is the IDENTIFIER_NODE for an overloaded "operator - new" or "operator delete". */ -#define NEW_DELETE_OPNAME_P(NAME) \ - ((NAME) == cp_operator_id (NEW_EXPR) \ - || (NAME) == cp_operator_id (VEC_NEW_EXPR) \ - || (NAME) == cp_operator_id (DELETE_EXPR) \ - || (NAME) == cp_operator_id (VEC_DELETE_EXPR)) - #define cp_operator_id(CODE) \ (operator_name_info[(int) (CODE)].identifier) #define cp_assignment_operator_id(CODE) \ @@ -2318,9 +2359,6 @@ struct GTY(()) lang_type { /* Nonzero if this BINFO is a primary base class. */ #define BINFO_PRIMARY_P(NODE) BINFO_FLAG_5(NODE) - -/* Used by various search routines. */ -#define IDENTIFIER_MARKED(NODE) TREE_LANG_FLAG_0 (NODE) /* A vec<tree_pair_s> of the vcall indices associated with the class NODE. The PURPOSE of each element is a FUNCTION_DECL for a virtual @@ -2771,7 +2809,7 @@ struct GTY(()) lang_decl { /* Nonzero if NODE is a user-defined conversion operator. */ #define DECL_CONV_FN_P(NODE) \ - (DECL_NAME (NODE) && IDENTIFIER_TYPENAME_P (DECL_NAME (NODE))) + (DECL_NAME (NODE) && IDENTIFIER_CONV_OP_P (DECL_NAME (NODE))) /* If FN is a conversion operator, the type to which it converts. Otherwise, NULL_TREE. */ @@ -2805,7 +2843,7 @@ struct GTY(()) lang_decl { value of ERROR_MARK is zero, this macro can be used as a predicate to test whether or not NODE is an overloaded operator. */ #define DECL_OVERLOADED_OPERATOR_P(NODE) \ - (IDENTIFIER_OPNAME_P (DECL_NAME (NODE)) \ + (IDENTIFIER_ANY_OP_P (DECL_NAME (NODE)) \ ? LANG_DECL_FN_CHECK (NODE)->operator_code : ERROR_MARK) /* Nonzero if NODE is an assignment operator (including += and such). */ @@ -5107,6 +5145,10 @@ extern GTY(()) vec<tree, va_gc> *local_classes; /* An array of static vars & fns. */ extern GTY(()) vec<tree, va_gc> *static_decls; +/* An array of vtable-needing types that have no key function, or have + an emitted key function. */ +extern GTY(()) vec<tree, va_gc> *keyed_classes; + /* Here's where we control how name mangling takes place. */ @@ -6077,7 +6119,7 @@ extern int cp_complete_array_type_or_error (tree *, tree, bool, tsubst_flags_t); extern tree build_ptrmemfunc_type (tree); extern tree build_ptrmem_type (tree, tree); /* the grokdeclarator prototype is in decl.h */ -extern tree build_this_parm (tree, cp_cv_quals); +extern tree build_this_parm (tree, tree, cp_cv_quals); extern tree grokparms (tree, tree *); extern int copy_fn_p (const_tree); extern bool move_fn_p (const_tree); @@ -6178,7 +6220,7 @@ extern void check_default_args (tree); extern bool mark_used (tree); extern bool mark_used (tree, tsubst_flags_t); extern void finish_static_data_member_decl (tree, tree, bool, tree, int); -extern tree cp_build_parm_decl (tree, tree); +extern tree cp_build_parm_decl (tree, tree, tree); extern tree get_guard (tree); extern tree get_guard_cond (tree, bool); extern tree set_guard (tree); @@ -6187,7 +6229,7 @@ extern void mark_needed (tree); extern bool decl_needed_p (tree); extern void note_vague_linkage_fn (tree); extern void note_variable_template_instantiation (tree); -extern tree build_artificial_parm (tree, tree); +extern tree build_artificial_parm (tree, tree, tree); extern bool possibly_inlined_p (tree); extern int parm_index (tree); extern tree vtv_start_verification_constructor_init_function (void); @@ -6306,6 +6348,8 @@ extern tree copy_decl (tree CXX_MEM_STAT_INFO); extern tree copy_type (tree CXX_MEM_STAT_INFO); extern tree cxx_make_type (enum tree_code); extern tree make_class_type (enum tree_code); +extern const char *get_identifier_kind_name (tree); +extern void set_identifier_kind (tree, cp_identifier_kind); extern bool cxx_init (void); extern void cxx_finish (void); extern bool in_main_input_context (void); @@ -6320,7 +6364,6 @@ extern tree forward_parm (tree); extern bool is_trivially_xible (enum tree_code, tree, tree); extern bool is_xible (enum tree_code, tree, tree); extern tree get_defaulted_eh_spec (tree); -extern tree unevaluated_noexcept_spec (void); extern void after_nsdmi_defaulted_late_checks (tree); extern bool maybe_explain_implicit_delete (tree); extern void explain_implicit_non_constexpr (tree); @@ -6370,6 +6413,7 @@ extern void check_template_variable (tree); extern tree make_auto (void); extern tree make_decltype_auto (void); extern tree make_template_placeholder (tree); +extern bool template_placeholder_p (tree); extern tree do_auto_deduction (tree, tree, tree); extern tree do_auto_deduction (tree, tree, tree, tsubst_flags_t, diff --git a/gcc/cp/cp-ubsan.c b/gcc/cp/cp-ubsan.c index 71d315ec2b4..f00f870bd3e 100644 --- a/gcc/cp/cp-ubsan.c +++ b/gcc/cp/cp-ubsan.c @@ -23,6 +23,7 @@ along with GCC; see the file COPYING3. If not see #include "coretypes.h" #include "cp-tree.h" #include "ubsan.h" +#include "asan.h" /* Test if we should instrument vptr access. */ @@ -32,7 +33,7 @@ cp_ubsan_instrument_vptr_p (tree type) if (!flag_rtti || flag_sanitize_undefined_trap_on_error) return false; - if (!do_ubsan_in_current_function ()) + if (!sanitize_flags_p (SANITIZE_VPTR)) return false; if (type) diff --git a/gcc/cp/cxx-pretty-print.c b/gcc/cp/cxx-pretty-print.c index b74a56f4200..5398e3dd87d 100644 --- a/gcc/cp/cxx-pretty-print.c +++ b/gcc/cp/cxx-pretty-print.c @@ -159,7 +159,7 @@ pp_cxx_unqualified_id (cxx_pretty_printer *pp, tree t) case IDENTIFIER_NODE: if (t == NULL) pp->translate_string ("<unnamed>"); - else if (IDENTIFIER_TYPENAME_P (t)) + else if (IDENTIFIER_CONV_OP_P (t)) pp_cxx_conversion_function_id (pp, t); else { diff --git a/gcc/cp/decl.c b/gcc/cp/decl.c index b0df3c9835c..0361357a14e 100644 --- a/gcc/cp/decl.c +++ b/gcc/cp/decl.c @@ -51,6 +51,7 @@ along with GCC; see the file COPYING3. If not see #include "cilk.h" #include "builtins.h" #include "gimplify.h" +#include "asan.h" /* Possible cases of bad specifiers type used by bad_specifiers. */ enum bad_spec_place { @@ -159,6 +160,9 @@ tree integer_two_node; /* vector of static decls. */ vec<tree, va_gc> *static_decls; +/* vector of keyed classes. */ +vec<tree, va_gc> *keyed_classes; + /* Used only for jumps to as-yet undefined labels, since jumps to defined labels can have their validity checked immediately. */ @@ -1466,53 +1470,41 @@ duplicate_decls (tree newdecl, tree olddecl, bool newdecl_is_friend) t2 = TYPE_ARG_TYPES (TREE_TYPE (olddecl)); t1 || t2; t1 = TREE_CHAIN (t1), t2 = TREE_CHAIN (t2)) - if (!t1 || !t2) - break; - /* Deal with fileptr_type_node. FILE type is not known - at the time we create the builtins. */ - else if (TREE_VALUE (t2) == fileptr_type_node) - { - tree t = TREE_VALUE (t1); - - if (TYPE_PTR_P (t) - && TYPE_IDENTIFIER (TREE_TYPE (t)) - == get_identifier ("FILE") - && compparms (TREE_CHAIN (t1), TREE_CHAIN (t2))) + { + if (!t1 || !t2) + break; + /* FILE, tm types are not known at the time + we create the builtins. */ + for (unsigned i = 0; + i < sizeof (builtin_structptr_types) + / sizeof (builtin_structptr_type); + ++i) + if (TREE_VALUE (t2) == builtin_structptr_types[i].node) { - tree oldargs = TYPE_ARG_TYPES (TREE_TYPE (olddecl)); - - TYPE_ARG_TYPES (TREE_TYPE (olddecl)) - = TYPE_ARG_TYPES (TREE_TYPE (newdecl)); - types_match = decls_match (newdecl, olddecl); - if (types_match) - return duplicate_decls (newdecl, olddecl, - newdecl_is_friend); - TYPE_ARG_TYPES (TREE_TYPE (olddecl)) = oldargs; - } - } - /* Likewise for const struct tm*. */ - else if (TREE_VALUE (t2) == const_tm_ptr_type_node) - { - tree t = TREE_VALUE (t1); + tree t = TREE_VALUE (t1); - if (TYPE_PTR_P (t) - && TYPE_IDENTIFIER (TREE_TYPE (t)) - == get_identifier ("tm") - && compparms (TREE_CHAIN (t1), TREE_CHAIN (t2))) - { - tree oldargs = TYPE_ARG_TYPES (TREE_TYPE (olddecl)); - - TYPE_ARG_TYPES (TREE_TYPE (olddecl)) - = TYPE_ARG_TYPES (TREE_TYPE (newdecl)); - types_match = decls_match (newdecl, olddecl); - if (types_match) - return duplicate_decls (newdecl, olddecl, - newdecl_is_friend); - TYPE_ARG_TYPES (TREE_TYPE (olddecl)) = oldargs; + if (TYPE_PTR_P (t) + && TYPE_IDENTIFIER (TREE_TYPE (t)) + == get_identifier (builtin_structptr_types[i].str) + && compparms (TREE_CHAIN (t1), TREE_CHAIN (t2))) + { + tree oldargs = TYPE_ARG_TYPES (TREE_TYPE (olddecl)); + + TYPE_ARG_TYPES (TREE_TYPE (olddecl)) + = TYPE_ARG_TYPES (TREE_TYPE (newdecl)); + types_match = decls_match (newdecl, olddecl); + if (types_match) + return duplicate_decls (newdecl, olddecl, + newdecl_is_friend); + TYPE_ARG_TYPES (TREE_TYPE (olddecl)) = oldargs; + } + goto next_arg; } - } - else if (! same_type_p (TREE_VALUE (t1), TREE_VALUE (t2))) - break; + + if (! same_type_p (TREE_VALUE (t1), TREE_VALUE (t2))) + break; +next_arg:; + } warning_at (DECL_SOURCE_LOCATION (newdecl), OPT_Wbuiltin_declaration_mismatch, @@ -1747,17 +1739,9 @@ duplicate_decls (tree newdecl, tree olddecl, bool newdecl_is_friend) && (DECL_NAMESPACE_ALIAS (newdecl) == DECL_NAMESPACE_ALIAS (olddecl))) return olddecl; - /* [namespace.alias] - - A namespace-name or namespace-alias shall not be declared as - the name of any other entity in the same declarative region. - A namespace-name defined at global scope shall not be - declared as the name of any other entity in any global scope - of the program. */ - error ("conflicting declaration of namespace %q+D", newdecl); - inform (DECL_SOURCE_LOCATION (olddecl), - "previous declaration of namespace %qD here", olddecl); - return error_mark_node; + + /* Leave it to update_binding to merge or report error. */ + return NULL_TREE; } else { @@ -3952,63 +3936,56 @@ record_unknown_type (tree type, const char* name) SET_TYPE_MODE (type, TYPE_MODE (void_type_node)); } -/* A string for which we should create an IDENTIFIER_NODE at - startup. */ - -struct predefined_identifier -{ - /* The name of the identifier. */ - const char *const name; - /* The place where the IDENTIFIER_NODE should be stored. */ - tree *const node; - /* Nonzero if this is the name of a constructor or destructor. */ - const int ctor_or_dtor_p; -}; - /* Create all the predefined identifiers. */ static void initialize_predefined_identifiers (void) { - const predefined_identifier *pid; + struct predefined_identifier + { + const char *name; /* Name. */ + tree *node; /* Node to store it in. */ + cp_identifier_kind kind; /* Kind of identifier. */ + }; /* A table of identifiers to create at startup. */ static const predefined_identifier predefined_identifiers[] = { - { "C++", &lang_name_cplusplus, 0 }, - { "C", &lang_name_c, 0 }, + {"C++", &lang_name_cplusplus, cik_normal}, + {"C", &lang_name_c, cik_normal}, /* Some of these names have a trailing space so that it is impossible for them to conflict with names written by users. */ - { "__ct ", &ctor_identifier, 1 }, - { "__base_ctor ", &base_ctor_identifier, 1 }, - { "__comp_ctor ", &complete_ctor_identifier, 1 }, - { "__dt ", &dtor_identifier, 1 }, - { "__comp_dtor ", &complete_dtor_identifier, 1 }, - { "__base_dtor ", &base_dtor_identifier, 1 }, - { "__deleting_dtor ", &deleting_dtor_identifier, 1 }, - { IN_CHARGE_NAME, &in_charge_identifier, 0 }, - { "nelts", &nelts_identifier, 0 }, - { THIS_NAME, &this_identifier, 0 }, - { VTABLE_DELTA_NAME, &delta_identifier, 0 }, - { VTABLE_PFN_NAME, &pfn_identifier, 0 }, - { "_vptr", &vptr_identifier, 0 }, - { "__vtt_parm", &vtt_parm_identifier, 0 }, - { "::", &global_identifier, 0 }, - { "std", &std_identifier, 0 }, + {"__ct ", &ctor_identifier, cik_ctor}, + {"__base_ctor ", &base_ctor_identifier, cik_ctor}, + {"__comp_ctor ", &complete_ctor_identifier, cik_ctor}, + {"__dt ", &dtor_identifier, cik_dtor}, + {"__comp_dtor ", &complete_dtor_identifier, cik_dtor}, + {"__base_dtor ", &base_dtor_identifier, cik_dtor}, + {"__deleting_dtor ", &deleting_dtor_identifier, cik_dtor}, + {IN_CHARGE_NAME, &in_charge_identifier, cik_normal}, + {THIS_NAME, &this_identifier, cik_normal}, + {VTABLE_DELTA_NAME, &delta_identifier, cik_normal}, + {VTABLE_PFN_NAME, &pfn_identifier, cik_normal}, + {"_vptr", &vptr_identifier, cik_normal}, + {"__vtt_parm", &vtt_parm_identifier, cik_normal}, + {"::", &global_identifier, cik_normal}, + {"std", &std_identifier, cik_normal}, /* The demangler expects anonymous namespaces to be called something starting with '_GLOBAL__N_'. It no longer needs to be unique to the TU. */ - { "_GLOBAL__N_1", &anon_identifier, 0 }, - { "auto", &auto_identifier, 0 }, - { "decltype(auto)", &decltype_auto_identifier, 0 }, - { "initializer_list", &init_list_identifier, 0 }, - { NULL, NULL, 0 } + {"_GLOBAL__N_1", &anon_identifier, cik_normal}, + {"auto", &auto_identifier, cik_normal}, + {"decltype(auto)", &decltype_auto_identifier, cik_normal}, + {"initializer_list", &init_list_identifier, cik_normal}, + {NULL, NULL, cik_normal} }; - for (pid = predefined_identifiers; pid->name; ++pid) + for (const predefined_identifier *pid = predefined_identifiers; + pid->name; ++pid) { *pid->node = get_identifier (pid->name); - if (pid->ctor_or_dtor_p) - IDENTIFIER_CTOR_OR_DTOR_P (*pid->node) = 1; + /* Some of these identifiers already have a special kind. */ + if (pid->kind != cik_normal) + set_identifier_kind (*pid->node, pid->kind); } } @@ -4063,6 +4040,9 @@ cxx_init_decl_processing (void) /* Guess at the initial static decls size. */ vec_alloc (static_decls, 500); + /* ... and keyed classes. */ + vec_alloc (keyed_classes, 100); + record_builtin_type (RID_BOOL, "bool", boolean_type_node); truthvalue_type_node = boolean_type_node; truthvalue_false_node = boolean_false_node; @@ -4071,6 +4051,8 @@ cxx_init_decl_processing (void) empty_except_spec = build_tree_list (NULL_TREE, NULL_TREE); noexcept_true_spec = build_tree_list (boolean_true_node, NULL_TREE); noexcept_false_spec = build_tree_list (boolean_false_node, NULL_TREE); + noexcept_deferred_spec = build_tree_list (make_node (DEFERRED_NOEXCEPT), + NULL_TREE); #if 0 record_builtin_type (RID_MAX, NULL, string_type_node); @@ -7814,10 +7796,7 @@ start_cleanup_fn (void) /* Build the parameter. */ if (use_cxa_atexit) { - tree parmdecl; - - parmdecl = cp_build_parm_decl (NULL_TREE, ptr_type_node); - DECL_CONTEXT (parmdecl) = fndecl; + tree parmdecl = cp_build_parm_decl (fndecl, NULL_TREE, ptr_type_node); TREE_USED (parmdecl) = 1; DECL_READ_P (parmdecl) = 1; DECL_ARGUMENTS (fndecl) = parmdecl; @@ -8358,12 +8337,12 @@ check_class_member_definition_namespace (tree decl) decl, DECL_CONTEXT (decl)); } -/* Build a PARM_DECL for the "this" parameter. TYPE is the +/* Build a PARM_DECL for the "this" parameter of FN. TYPE is the METHOD_TYPE for a non-static member function; QUALS are the cv-qualifiers that apply to the function. */ tree -build_this_parm (tree type, cp_cv_quals quals) +build_this_parm (tree fn, tree type, cp_cv_quals quals) { tree this_type; tree qual_type; @@ -8382,7 +8361,7 @@ build_this_parm (tree type, cp_cv_quals quals) assigned to. */ this_quals = (quals & TYPE_QUAL_RESTRICT) | TYPE_QUAL_CONST; qual_type = cp_build_qualified_type (this_type, this_quals); - parm = build_artificial_parm (this_identifier, qual_type); + parm = build_artificial_parm (fn, this_identifier, qual_type); cp_apply_type_quals_to_decl (this_quals, parm); return parm; } @@ -8516,8 +8495,7 @@ grokfndecl (tree ctype, if (TREE_CODE (type) == METHOD_TYPE) { - tree parm; - parm = build_this_parm (type, quals); + tree parm = build_this_parm (decl, type, quals); DECL_CHAIN (parm) = parms; parms = parm; @@ -8725,7 +8703,7 @@ grokfndecl (tree ctype, error_at (location, "deduction guide %qD must not have a function body", decl); } - else if (IDENTIFIER_OPNAME_P (DECL_NAME (decl)) + else if (IDENTIFIER_ANY_OP_P (DECL_NAME (decl)) && !grok_op_properties (decl, /*complain=*/true)) return NULL_TREE; else if (UDLIT_OPER_P (DECL_NAME (decl))) @@ -9524,8 +9502,7 @@ compute_array_index_type (tree name, tree size, tsubst_flags_t complain) stabilize_vla_size (itype); - if (flag_sanitize & SANITIZE_VLA - && do_ubsan_in_current_function ()) + if (sanitize_flags_p (SANITIZE_VLA)) { /* We have to add 1 -- in the ubsan routine we generate LE_EXPR rather than LT_EXPR. */ @@ -9778,7 +9755,7 @@ check_var_type (tree identifier, tree type) error ("unnamed variable or field declared void"); else if (identifier_p (identifier)) { - gcc_assert (!IDENTIFIER_OPNAME_P (identifier)); + gcc_assert (!IDENTIFIER_ANY_OP_P (identifier)); error ("variable or field %qE declared void", identifier); } else @@ -10119,12 +10096,7 @@ grokdeclarator (const cp_declarator *declarator, dname = fns; if (!identifier_p (dname)) - { - if (variable_template_p (dname)) - dname = DECL_NAME (dname); - else - dname = OVL_NAME (dname); - } + dname = OVL_NAME (dname); } /* Fall through. */ @@ -10132,13 +10104,13 @@ grokdeclarator (const cp_declarator *declarator, if (identifier_p (decl)) dname = decl; - if (C_IS_RESERVED_WORD (dname)) + if (IDENTIFIER_KEYWORD_P (dname)) { error ("declarator-id missing; using reserved word %qD", dname); name = identifier_to_locale (IDENTIFIER_POINTER (dname)); } - else if (!IDENTIFIER_TYPENAME_P (dname)) + else if (!IDENTIFIER_CONV_OP_P (dname)) name = identifier_to_locale (IDENTIFIER_POINTER (dname)); else { @@ -10197,26 +10169,27 @@ grokdeclarator (const cp_declarator *declarator, return error_mark_node; } - if (dname - && identifier_p (dname) - && UDLIT_OPER_P (dname) - && innermost_code != cdk_function) + if (dname && identifier_p (dname)) { - error ("declaration of %qD as non-function", dname); - return error_mark_node; - } - - if (dname && IDENTIFIER_OPNAME_P (dname)) - { - if (typedef_p) + if (UDLIT_OPER_P (dname) + && innermost_code != cdk_function) { - error ("declaration of %qD as %<typedef%>", dname); + error ("declaration of %qD as non-function", dname); return error_mark_node; } - else if (decl_context == PARM || decl_context == CATCHPARM) + + if (IDENTIFIER_ANY_OP_P (dname)) { - error ("declaration of %qD as parameter", dname); - return error_mark_node; + if (typedef_p) + { + error ("declaration of %qD as %<typedef%>", dname); + return error_mark_node; + } + else if (decl_context == PARM || decl_context == CATCHPARM) + { + error ("declaration of %qD as parameter", dname); + return error_mark_node; + } } } @@ -11617,7 +11590,8 @@ grokdeclarator (const cp_declarator *declarator, args && args != void_list_node; args = TREE_CHAIN (args)) { - tree decl = cp_build_parm_decl (NULL_TREE, TREE_VALUE (args)); + tree decl = cp_build_parm_decl (NULL_TREE, NULL_TREE, + TREE_VALUE (args)); DECL_CHAIN (decl) = decls; decls = decl; @@ -11712,22 +11686,20 @@ grokdeclarator (const cp_declarator *declarator, return error_mark_node; } - /* Only functions may be declared using an operator-function-id. */ - if (unqualified_id - && IDENTIFIER_OPNAME_P (unqualified_id) - && TREE_CODE (type) != FUNCTION_TYPE - && TREE_CODE (type) != METHOD_TYPE) + if (!FUNC_OR_METHOD_TYPE_P (type)) { - error ("declaration of %qD as non-function", unqualified_id); - return error_mark_node; - } + /* Only functions may be declared using an operator-function-id. */ + if (dname && IDENTIFIER_ANY_OP_P (dname)) + { + error ("declaration of %qD as non-function", dname); + return error_mark_node; + } - if (reqs - && TREE_CODE (type) != FUNCTION_TYPE - && TREE_CODE (type) != METHOD_TYPE) - error_at (location_of (reqs), - "requires-clause on declaration of non-function type %qT", - type); + if (reqs) + error_at (location_of (reqs), + "requires-clause on declaration of non-function type %qT", + type); + } /* We don't check parameter types here because we can emit a better error message later. */ @@ -11772,7 +11744,8 @@ grokdeclarator (const cp_declarator *declarator, } if (ctype && TREE_CODE (type) == FUNCTION_TYPE && staticp < 2 - && !NEW_DELETE_OPNAME_P (unqualified_id)) + && !(identifier_p (unqualified_id) + && IDENTIFIER_NEWDEL_OP_P (unqualified_id))) { cp_cv_quals real_quals = memfn_quals; if (cxx_dialect < cxx14 && constexpr_p @@ -11786,7 +11759,7 @@ grokdeclarator (const cp_declarator *declarator, if (decl_context == PARM) { - decl = cp_build_parm_decl (unqualified_id, type); + decl = cp_build_parm_decl (NULL_TREE, unqualified_id, type); DECL_ARRAY_PARAMETER_P (decl) = array_parameter_p; bad_specifiers (decl, BSP_PARM, virtualp, @@ -11883,15 +11856,13 @@ grokdeclarator (const cp_declarator *declarator, return error_mark_node; } - if (NEW_DELETE_OPNAME_P (unqualified_id)) + if (virtualp + && identifier_p (unqualified_id) + && IDENTIFIER_NEWDEL_OP_P (unqualified_id)) { - if (virtualp) - { - error ("%qD cannot be declared %<virtual%>, since it " - "is always static", - unqualified_id); - virtualp = 0; - } + error ("%qD cannot be declared %<virtual%>, since it " + "is always static", unqualified_id); + virtualp = 0; } } @@ -12153,6 +12124,7 @@ grokdeclarator (const cp_declarator *declarator, original_name = dname; else original_name = unqualified_id; + // FIXME:gcc_assert (original_name == dname); if (storage_class == sc_auto) error ("storage class %<auto%> invalid for function %qs", name); @@ -12947,27 +12919,24 @@ grok_op_properties (tree decl, bool complain) if (class_type && !CLASS_TYPE_P (class_type)) class_type = NULL_TREE; - if (DECL_CONV_FN_P (decl)) + if (IDENTIFIER_CONV_OP_P (name)) operator_code = TYPE_EXPR; else - do - { -#define DEF_OPERATOR(NAME, CODE, MANGLING, ARITY, ASSN_P) \ - if (cp_operator_id (CODE) == name) \ - { \ - operator_code = (CODE); \ - break; \ - } \ - else if (cp_assignment_operator_id (CODE) == name) \ - { \ - operator_code = (CODE); \ - DECL_ASSIGNMENT_OPERATOR_P (decl) = 1; \ - break; \ - } - + { + /* It'd be nice to hang something else of the identifier to + find CODE more directly. */ + const operator_name_info_t *oni + = (IDENTIFIER_ASSIGN_OP_P (name) + ? assignment_operator_name_info : operator_name_info); + DECL_ASSIGNMENT_OPERATOR_P (decl) = IDENTIFIER_ASSIGN_OP_P (name); + if (false) + ; +#define DEF_OPERATOR(NAME, CODE, MANGLING, ARITY, KIND) \ + else if (oni[int (CODE)].identifier == name) \ + operator_code = (CODE); #include "operators.def" #undef DEF_OPERATOR - + else gcc_unreachable (); } while (0); @@ -13086,7 +13055,7 @@ grok_op_properties (tree decl, bool complain) return true; /* Warn about conversion operators that will never be used. */ - if (IDENTIFIER_TYPENAME_P (name) + if (IDENTIFIER_CONV_OP_P (name) && ! DECL_TEMPLATE_INFO (decl) && warn_conversion /* Warn only declaring the function; there is no need to @@ -15108,7 +15077,7 @@ start_preparsed_function (tree decl1, tree attrs, int flags) if (!processing_template_decl && DECL_CONSTRUCTOR_P (decl1) - && (flag_sanitize & SANITIZE_VPTR) + && sanitize_flags_p (SANITIZE_VPTR) && !DECL_CLONED_FUNCTION_P (decl1) && !implicit_default_ctor_p (decl1)) cp_ubsan_maybe_initialize_vtbl_ptrs (current_class_ptr); @@ -15438,7 +15407,7 @@ record_key_method_defined (tree fndecl) { tree fnclass = DECL_CONTEXT (fndecl); if (fndecl == CLASSTYPE_KEY_METHOD (fnclass)) - keyed_classes = tree_cons (NULL_TREE, fnclass, keyed_classes); + vec_safe_push (keyed_classes, fnclass); } } diff --git a/gcc/cp/decl2.c b/gcc/cp/decl2.c index d3d90020c05..a4751460e06 100644 --- a/gcc/cp/decl2.c +++ b/gcc/cp/decl2.c @@ -192,14 +192,16 @@ change_return_type (tree new_ret, tree fntype) return newtype; } -/* Build a PARM_DECL with NAME and TYPE, and set DECL_ARG_TYPE +/* Build a PARM_DECL of FN with NAME and TYPE, and set DECL_ARG_TYPE appropriately. */ tree -cp_build_parm_decl (tree name, tree type) +cp_build_parm_decl (tree fn, tree name, tree type) { tree parm = build_decl (input_location, PARM_DECL, name, type); + DECL_CONTEXT (parm) = fn; + /* DECL_ARG_TYPE is only used by the back end and the back end never sees templates. */ if (!processing_template_decl) @@ -208,13 +210,13 @@ cp_build_parm_decl (tree name, tree type) return parm; } -/* Returns a PARM_DECL for a parameter of the indicated TYPE, with the +/* Returns a PARM_DECL of FN for a parameter of the indicated TYPE, with the indicated NAME. */ tree -build_artificial_parm (tree name, tree type) +build_artificial_parm (tree fn, tree name, tree type) { - tree parm = cp_build_parm_decl (name, type); + tree parm = cp_build_parm_decl (fn, name, type); DECL_ARTIFICIAL (parm) = 1; /* All our artificial parms are implicitly `const'; they cannot be assigned to. */ @@ -265,7 +267,7 @@ maybe_retrofit_in_chrg (tree fn) pass us a pointer to our VTT. */ if (CLASSTYPE_VBASECLASSES (DECL_CONTEXT (fn))) { - parm = build_artificial_parm (vtt_parm_identifier, vtt_parm_type); + parm = build_artificial_parm (fn, vtt_parm_identifier, vtt_parm_type); /* First add it to DECL_ARGUMENTS between 'this' and the real args... */ DECL_CHAIN (parm) = parms; @@ -278,7 +280,7 @@ maybe_retrofit_in_chrg (tree fn) } /* Then add the in-charge parm (before the VTT parm). */ - parm = build_artificial_parm (in_charge_identifier, integer_type_node); + parm = build_artificial_parm (fn, in_charge_identifier, integer_type_node); DECL_CHAIN (parm) = parms; parms = parm; arg_types = hash_tree_chain (integer_type_node, arg_types); @@ -1089,9 +1091,10 @@ is_late_template_attribute (tree attr, tree decl) if (is_attribute_p ("weak", name)) return true; - /* Attribute unused is applied directly, as it appertains to + /* Attributes used and unused are applied directly, as they appertain to decls. */ - if (is_attribute_p ("unused", name)) + if (is_attribute_p ("unused", name) + || is_attribute_p ("used", name)) return false; /* Attribute tls_model wants to modify the symtab. */ @@ -3502,12 +3505,10 @@ start_static_storage_duration_function (unsigned count) /* Create the argument list. */ initialize_p_decl = cp_build_parm_decl - (get_identifier (INITIALIZE_P_IDENTIFIER), integer_type_node); - DECL_CONTEXT (initialize_p_decl) = ssdf_decl; + (ssdf_decl, get_identifier (INITIALIZE_P_IDENTIFIER), integer_type_node); TREE_USED (initialize_p_decl) = 1; priority_decl = cp_build_parm_decl - (get_identifier (PRIORITY_IDENTIFIER), integer_type_node); - DECL_CONTEXT (priority_decl) = ssdf_decl; + (ssdf_decl, get_identifier (PRIORITY_IDENTIFIER), integer_type_node); TREE_USED (priority_decl) = 1; DECL_CHAIN (initialize_p_decl) = priority_decl; @@ -3737,7 +3738,7 @@ one_static_initialization_or_destruction (tree decl, tree init, bool initp) if (init) { finish_expr_stmt (init); - if (flag_sanitize & SANITIZE_ADDRESS) + if (sanitize_flags_p (SANITIZE_ADDRESS, decl)) { varpool_node *vnode = varpool_node::get (decl); if (vnode) @@ -4144,10 +4145,19 @@ decl_maybe_constant_var_p (tree decl) /* A proxy isn't constant. */ return false; if (TREE_CODE (type) == REFERENCE_TYPE) - /* References can be constant. */ + /* References can be constant. */; + else if (CP_TYPE_CONST_NON_VOLATILE_P (type) + && INTEGRAL_OR_ENUMERATION_TYPE_P (type)) + /* And const integers. */; + else + return false; + + if (DECL_INITIAL (decl) + && !DECL_INITIALIZED_BY_CONSTANT_EXPRESSION_P (decl)) + /* We know the initializer, and it isn't constant. */ + return false; + else return true; - return (CP_TYPE_CONST_NON_VOLATILE_P (type) - && INTEGRAL_OR_ENUMERATION_TYPE_P (type)); } /* Complain that DECL uses a type with no linkage. In C++98 mode this is @@ -4511,37 +4521,18 @@ c_parse_final_cleanups (void) instantiate_pending_templates (retries); ggc_collect (); - /* Write out virtual tables as required. Note that writing out - the virtual table for a template class may cause the + /* Write out virtual tables as required. Writing out the + virtual table for a template class may cause the instantiation of members of that class. If we write out vtables then we remove the class from our list so we don't have to look at it again. */ - - while (keyed_classes != NULL_TREE - && maybe_emit_vtables (TREE_VALUE (keyed_classes))) - { - reconsider = true; - keyed_classes = TREE_CHAIN (keyed_classes); - } - - t = keyed_classes; - if (t != NULL_TREE) - { - tree next = TREE_CHAIN (t); - - while (next) - { - if (maybe_emit_vtables (TREE_VALUE (next))) - { - reconsider = true; - TREE_CHAIN (t) = TREE_CHAIN (next); - } - else - t = next; - - next = TREE_CHAIN (t); - } - } + for (i = keyed_classes->length (); + keyed_classes->iterate (--i, &t);) + if (maybe_emit_vtables (t)) + { + reconsider = true; + keyed_classes->unordered_remove (i); + } /* Write out needed type info variables. We have to be careful looping through unemitted decls, because emit_tinfo_decl may @@ -4646,6 +4637,8 @@ c_parse_final_cleanups (void) if (!DECL_SAVED_TREE (decl)) continue; + cgraph_node *node = cgraph_node::get_create (decl); + /* We lie to the back end, pretending that some functions are not defined when they really are. This keeps these functions from being put out unnecessarily. But, we must @@ -4666,9 +4659,6 @@ c_parse_final_cleanups (void) && DECL_INITIAL (decl) && decl_needed_p (decl)) { - struct cgraph_node *node, *next; - - node = cgraph_node::get (decl); if (node->cpp_implicit_alias) node = node->get_alias_target (); @@ -4678,7 +4668,8 @@ c_parse_final_cleanups (void) group, we need to mark all symbols in the same comdat group that way. */ if (node->same_comdat_group) - for (next = dyn_cast<cgraph_node *> (node->same_comdat_group); + for (cgraph_node *next + = dyn_cast<cgraph_node *> (node->same_comdat_group); next != node; next = dyn_cast<cgraph_node *> (next->same_comdat_group)) next->call_for_symbol_thunks_and_aliases (clear_decl_external, @@ -4692,7 +4683,7 @@ c_parse_final_cleanups (void) if (!DECL_EXTERNAL (decl) && decl_needed_p (decl) && !TREE_ASM_WRITTEN (decl) - && !cgraph_node::get (decl)->definition) + && !node->definition) { /* We will output the function; no longer consider it in this loop. */ diff --git a/gcc/cp/dump.c b/gcc/cp/dump.c index 080fa1a978d..6fafa5b792e 100644 --- a/gcc/cp/dump.c +++ b/gcc/cp/dump.c @@ -226,12 +226,12 @@ cp_dump_tree (void* dump_info, tree t) switch (code) { case IDENTIFIER_NODE: - if (IDENTIFIER_OPNAME_P (t)) + if (IDENTIFIER_ANY_OP_P (t)) { dump_string_field (di, "note", "operator"); return true; } - else if (IDENTIFIER_TYPENAME_P (t)) + else if (IDENTIFIER_CONV_OP_P (t)) { dump_child ("tynm", TREE_TYPE (t)); return true; diff --git a/gcc/cp/error.c b/gcc/cp/error.c index e53afa7522a..86fa804b317 100644 --- a/gcc/cp/error.c +++ b/gcc/cp/error.c @@ -1051,7 +1051,7 @@ dump_decl_name (cxx_pretty_printer *pp, tree t, int flags) { /* These special cases are duplicated here so that other functions can feed identifiers to error and get them demangled properly. */ - if (IDENTIFIER_TYPENAME_P (t)) + if (IDENTIFIER_CONV_OP_P (t)) { pp_cxx_ws_string (pp, "operator"); /* Not exactly IDENTIFIER_TYPE_VALUE. */ diff --git a/gcc/cp/except.c b/gcc/cp/except.c index ab7ab5db158..9e41ec451af 100644 --- a/gcc/cp/except.c +++ b/gcc/cp/except.c @@ -1197,18 +1197,6 @@ build_noexcept_spec (tree expr, int complain) } } -/* Returns a noexcept-specifier to be evaluated later, for an - implicitly-declared or explicitly defaulted special member function. */ - -tree -unevaluated_noexcept_spec (void) -{ - if (!noexcept_deferred_spec) - noexcept_deferred_spec - = build_noexcept_spec (make_node (DEFERRED_NOEXCEPT), tf_none); - return noexcept_deferred_spec; -} - /* Returns a TRY_CATCH_EXPR that will put TRY_LIST and CATCH_LIST in the TRY and CATCH locations. CATCH_LIST must be a STATEMENT_LIST */ diff --git a/gcc/cp/init.c b/gcc/cp/init.c index 4ad2cae541e..90abd23a267 100644 --- a/gcc/cp/init.c +++ b/gcc/cp/init.c @@ -30,6 +30,7 @@ along with GCC; see the file COPYING3. If not see #include "gimplify.h" #include "c-family/c-ubsan.h" #include "intl.h" +#include "asan.h" static bool begin_init_stmts (tree *, tree *); static tree finish_init_stmts (bool, tree, tree); @@ -3911,8 +3912,7 @@ finish_length_check (tree atype, tree iterator, tree obase, unsigned n) } /* Don't check an array new when -fno-exceptions. */ } - else if (flag_sanitize & SANITIZE_BOUNDS - && do_ubsan_in_current_function ()) + else if (sanitize_flags_p (SANITIZE_BOUNDS)) { /* Make sure the last element of the initializer is in bounds. */ finish_expr_stmt diff --git a/gcc/cp/lambda.c b/gcc/cp/lambda.c index 5587f6021ea..41d4921c1db 100644 --- a/gcc/cp/lambda.c +++ b/gcc/cp/lambda.c @@ -987,6 +987,8 @@ maybe_add_lambda_conv_op (tree type) null_pointer_node); if (generic_lambda_p) { + ++processing_template_decl; + /* Prepare the dependent member call for the static member function '_FUN' and, potentially, prepare another call to be used in a decltype return expression for a deduced return call op to allow for simple @@ -1036,9 +1038,7 @@ maybe_add_lambda_conv_op (tree type) if (generic_lambda_p) { - ++processing_template_decl; tree a = forward_parm (tgt); - --processing_template_decl; CALL_EXPR_ARG (call, ix) = a; if (decltype_call) @@ -1062,11 +1062,9 @@ maybe_add_lambda_conv_op (tree type) { if (decltype_call) { - ++processing_template_decl; fn_result = finish_decltype_type (decltype_call, /*id_expression_or_member_access_p=*/false, tf_warning_or_error); - --processing_template_decl; } } else @@ -1084,6 +1082,9 @@ maybe_add_lambda_conv_op (tree type) && TYPE_NOTHROW_P (TREE_TYPE (callop))) stattype = build_exception_variant (stattype, noexcept_true_spec); + if (generic_lambda_p) + --processing_template_decl; + /* First build up the conversion op. */ tree rettype = build_pointer_type (stattype); @@ -1102,7 +1103,8 @@ maybe_add_lambda_conv_op (tree type) DECL_ARTIFICIAL (fn) = 1; DECL_NOT_REALLY_EXTERN (fn) = 1; DECL_DECLARED_INLINE_P (fn) = 1; - DECL_ARGUMENTS (fn) = build_this_parm (fntype, TYPE_QUAL_CONST); + DECL_ARGUMENTS (fn) = build_this_parm (fn, fntype, TYPE_QUAL_CONST); + if (nested_def) DECL_INTERFACE_KNOWN (fn) = 1; @@ -1150,9 +1152,7 @@ maybe_add_lambda_conv_op (tree type) { /* Don't UBsan this function; we're deliberately calling op() with a null object argument. */ - tree attrs = build_tree_list (get_identifier ("no_sanitize_undefined"), - NULL_TREE); - cplus_decl_attributes (&fn, attrs, 0); + add_no_sanitize_value (fn, SANITIZE_UNDEFINED); } add_method (type, fn, false); diff --git a/gcc/cp/lex.c b/gcc/cp/lex.c index cf7c0d11ab3..2fa26739c80 100644 --- a/gcc/cp/lex.c +++ b/gcc/cp/lex.c @@ -89,6 +89,37 @@ operator_name_info_t assignment_operator_name_info[(int) MAX_TREE_CODES]; #include "operators.def" #undef DEF_OPERATOR +/* Get the name of the kind of identifier T. */ + +const char * +get_identifier_kind_name (tree id) +{ + /* Keep in sync with cp_id_kind enumeration. */ + static const char *const names[cik_max] = { + "normal", "keyword", "constructor", "destructor", + "assign-op", "op-assign-op", "simple-op", "conv-op", }; + + unsigned kind = 0; + kind |= IDENTIFIER_KIND_BIT_2 (id) << 2; + kind |= IDENTIFIER_KIND_BIT_1 (id) << 1; + kind |= IDENTIFIER_KIND_BIT_0 (id) << 0; + + return names[kind]; +} + +/* Set the identifier kind, which we expect to currently be zero. */ + +void +set_identifier_kind (tree id, cp_identifier_kind kind) +{ + gcc_checking_assert (!IDENTIFIER_KIND_BIT_2 (id) + & !IDENTIFIER_KIND_BIT_1 (id) + & !IDENTIFIER_KIND_BIT_0 (id)); + IDENTIFIER_KIND_BIT_2 (id) |= (kind >> 2) & 1; + IDENTIFIER_KIND_BIT_1 (id) |= (kind >> 1) & 1; + IDENTIFIER_KIND_BIT_0 (id) |= (kind >> 0) & 1; +} + static void init_operators (void) { @@ -96,22 +127,26 @@ init_operators (void) char buffer[256]; struct operator_name_info_t *oni; -#define DEF_OPERATOR(NAME, CODE, MANGLING, ARITY, ASSN_P) \ - sprintf (buffer, ISALPHA (NAME[0]) ? "operator %s" : "operator%s", NAME); \ - identifier = get_identifier (buffer); \ - IDENTIFIER_OPNAME_P (identifier) = 1; \ - \ - oni = (ASSN_P \ - ? &assignment_operator_name_info[(int) CODE] \ - : &operator_name_info[(int) CODE]); \ - oni->identifier = identifier; \ - oni->name = NAME; \ - oni->mangled_name = MANGLING; \ +#define DEF_OPERATOR(NAME, CODE, MANGLING, ARITY, KIND) \ + sprintf (buffer, "operator%s%s", !NAME[0] \ + || NAME[0] == '_' || ISALPHA (NAME[0]) ? " " : "", NAME); \ + identifier = get_identifier (buffer); \ + \ + if (KIND != cik_simple_op || !IDENTIFIER_ANY_OP_P (identifier)) \ + set_identifier_kind (identifier, KIND); \ + \ + oni = (KIND == cik_assign_op \ + ? &assignment_operator_name_info[(int) CODE] \ + : &operator_name_info[(int) CODE]); \ + oni->identifier = identifier; \ + oni->name = NAME; \ + oni->mangled_name = MANGLING; \ oni->arity = ARITY; #include "operators.def" #undef DEF_OPERATOR + operator_name_info[(int) TYPE_EXPR] = operator_name_info[(int) CAST_EXPR]; operator_name_info[(int) ERROR_MARK].identifier = get_identifier ("<invalid operator>"); @@ -123,6 +158,7 @@ init_operators (void) operator_name_info [(int) INIT_EXPR].name = operator_name_info [(int) MODIFY_EXPR].name; + operator_name_info [(int) EXACT_DIV_EXPR].name = "(ceiling /)"; operator_name_info [(int) CEIL_DIV_EXPR].name = "(ceiling /)"; operator_name_info [(int) FLOOR_DIV_EXPR].name = "(floor /)"; @@ -130,26 +166,20 @@ init_operators (void) operator_name_info [(int) CEIL_MOD_EXPR].name = "(ceiling %)"; operator_name_info [(int) FLOOR_MOD_EXPR].name = "(floor %)"; operator_name_info [(int) ROUND_MOD_EXPR].name = "(round %)"; + operator_name_info [(int) ABS_EXPR].name = "abs"; operator_name_info [(int) TRUTH_AND_EXPR].name = "strict &&"; operator_name_info [(int) TRUTH_OR_EXPR].name = "strict ||"; operator_name_info [(int) RANGE_EXPR].name = "..."; operator_name_info [(int) UNARY_PLUS_EXPR].name = "+"; - assignment_operator_name_info [(int) EXACT_DIV_EXPR].name - = "(exact /=)"; - assignment_operator_name_info [(int) CEIL_DIV_EXPR].name - = "(ceiling /=)"; - assignment_operator_name_info [(int) FLOOR_DIV_EXPR].name - = "(floor /=)"; - assignment_operator_name_info [(int) ROUND_DIV_EXPR].name - = "(round /=)"; - assignment_operator_name_info [(int) CEIL_MOD_EXPR].name - = "(ceiling %=)"; - assignment_operator_name_info [(int) FLOOR_MOD_EXPR].name - = "(floor %=)"; - assignment_operator_name_info [(int) ROUND_MOD_EXPR].name - = "(round %=)"; + assignment_operator_name_info [(int) EXACT_DIV_EXPR].name = "(exact /=)"; + assignment_operator_name_info [(int) CEIL_DIV_EXPR].name = "(ceiling /=)"; + assignment_operator_name_info [(int) FLOOR_DIV_EXPR].name = "(floor /=)"; + assignment_operator_name_info [(int) ROUND_DIV_EXPR].name = "(round /=)"; + assignment_operator_name_info [(int) CEIL_MOD_EXPR].name = "(ceiling %=)"; + assignment_operator_name_info [(int) FLOOR_MOD_EXPR].name = "(floor %=)"; + assignment_operator_name_info [(int) ROUND_MOD_EXPR].name = "(round %=)"; } /* Initialize the reserved words. */ @@ -184,7 +214,7 @@ init_reswords (void) C_SET_RID_CODE (id, c_common_reswords[i].rid); ridpointers [(int) c_common_reswords[i].rid] = id; if (! (c_common_reswords[i].disable & mask)) - C_IS_RESERVED_WORD (id) = 1; + set_identifier_kind (id, cik_keyword); } for (i = 0; i < NUM_INT_N_ENTS; i++) @@ -193,7 +223,7 @@ init_reswords (void) sprintf (name, "__int%d", int_n_data[i].bitsize); id = get_identifier (name); C_SET_RID_CODE (id, RID_FIRST_INT_N + i); - C_IS_RESERVED_WORD (id) = 1; + set_identifier_kind (id, cik_keyword); } } @@ -431,7 +461,7 @@ unqualified_name_lookup_error (tree name, location_t loc) if (loc == UNKNOWN_LOCATION) loc = EXPR_LOC_OR_LOC (name, input_location); - if (IDENTIFIER_OPNAME_P (name)) + if (IDENTIFIER_ANY_OP_P (name)) { if (name != cp_operator_id (ERROR_MARK)) error_at (loc, "%qD not defined", name); diff --git a/gcc/cp/mangle.c b/gcc/cp/mangle.c index e866675bed9..e23591315c9 100644 --- a/gcc/cp/mangle.c +++ b/gcc/cp/mangle.c @@ -1261,9 +1261,9 @@ write_template_prefix (const tree node) static void write_unqualified_id (tree identifier) { - if (IDENTIFIER_TYPENAME_P (identifier)) + if (IDENTIFIER_CONV_OP_P (identifier)) write_conversion_operator_name (TREE_TYPE (identifier)); - else if (IDENTIFIER_OPNAME_P (identifier)) + else if (IDENTIFIER_ANY_OP_P (identifier)) { int i; const char *mangled_name = NULL; @@ -2100,6 +2100,11 @@ write_type (tree type) || TREE_CODE (t) == METHOD_TYPE) { t = build_ref_qualified_type (t, type_memfn_rqual (type)); + if (flag_noexcept_type) + { + tree r = TYPE_RAISES_EXCEPTIONS (type); + t = build_exception_variant (t, r); + } if (abi_version_at_least (8) || type == TYPE_MAIN_VARIANT (type)) /* Avoid adding the unqualified function type as a substitution. */ @@ -2820,14 +2825,16 @@ write_template_args (tree args) static void write_member_name (tree member) { - if (abi_version_at_least (11) && IDENTIFIER_OPNAME_P (member)) + if (identifier_p (member)) { - write_string ("on"); - if (abi_warn_or_compat_version_crosses (11)) - G.need_abi_warning = 1; + if (abi_version_at_least (11) && IDENTIFIER_ANY_OP_P (member)) + { + write_string ("on"); + if (abi_warn_or_compat_version_crosses (11)) + G.need_abi_warning = 1; + } + write_unqualified_id (member); } - if (identifier_p (member)) - write_unqualified_id (member); else if (DECL_P (member)) write_unqualified_name (member); else if (TREE_CODE (member) == TEMPLATE_ID_EXPR) @@ -3045,7 +3052,7 @@ write_expression (tree expr) /* An operator name appearing as a dependent name needs to be specially marked to disambiguate between a use of the operator name and a use of the operator in an expression. */ - if (IDENTIFIER_OPNAME_P (expr)) + if (IDENTIFIER_ANY_OP_P (expr)) write_string ("on"); write_unqualified_id (expr); } @@ -3053,7 +3060,7 @@ write_expression (tree expr) { tree fn = TREE_OPERAND (expr, 0); fn = OVL_NAME (fn); - if (IDENTIFIER_OPNAME_P (fn)) + if (IDENTIFIER_ANY_OP_P (fn)) write_string ("on"); write_unqualified_id (fn); write_template_args (TREE_OPERAND (expr, 1)); @@ -4236,9 +4243,8 @@ mangle_conv_op_name_for_type (const tree type) when performing conversions. */ TREE_TYPE (identifier) = type; - /* Set bits on the identifier so we know later it's a conversion. */ - IDENTIFIER_OPNAME_P (identifier) = 1; - IDENTIFIER_TYPENAME_P (identifier) = 1; + /* Set the identifier kind so we know later it's a conversion. */ + set_identifier_kind (identifier, cik_conv_op); } return identifier; diff --git a/gcc/cp/method.c b/gcc/cp/method.c index aa607d53346..fe4b2afe7db 100644 --- a/gcc/cp/method.c +++ b/gcc/cp/method.c @@ -486,6 +486,7 @@ forward_parm (tree parm) type = PACK_EXPANSION_PATTERN (type); if (TREE_CODE (type) != REFERENCE_TYPE) type = cp_build_reference_type (type, /*rval=*/true); + warning_sentinel w (warn_useless_cast); exp = build_static_cast (type, exp, tf_warning_or_error); if (DECL_PACK_P (parm)) exp = make_pack_expansion (exp); @@ -2023,7 +2024,7 @@ implicitly_declare_fn (special_function_kind kind, tree type, } else if (cxx_dialect >= cxx11) { - raises = unevaluated_noexcept_spec (); + raises = noexcept_deferred_spec; synthesized_method_walk (type, kind, const_p, NULL, &trivial_p, &deleted_p, &constexpr_p, false, inherited_ctor, inherited_parms); @@ -2072,7 +2073,7 @@ implicitly_declare_fn (special_function_kind kind, tree type, /* Note that this parameter is *not* marked DECL_ARTIFICIAL; we want its type to be included in the mangled function name. */ - tree decl = cp_build_parm_decl (NULL_TREE, rhs_parm_type); + tree decl = cp_build_parm_decl (fn, NULL_TREE, rhs_parm_type); TREE_READONLY (decl) = 1; retrofit_lang_decl (decl); DECL_PARM_INDEX (decl) = DECL_PARM_LEVEL (decl) = 1; @@ -2085,11 +2086,10 @@ implicitly_declare_fn (special_function_kind kind, tree type, for (tree parm = inherited_parms; parm && parm != void_list_node; parm = TREE_CHAIN (parm)) { - *p = cp_build_parm_decl (NULL_TREE, TREE_VALUE (parm)); + *p = cp_build_parm_decl (fn, NULL_TREE, TREE_VALUE (parm)); retrofit_lang_decl (*p); DECL_PARM_LEVEL (*p) = 1; DECL_PARM_INDEX (*p) = index++; - DECL_CONTEXT (*p) = fn; p = &DECL_CHAIN (*p); } SET_DECL_INHERITED_CTOR (fn, inherited_ctor); @@ -2103,7 +2103,7 @@ implicitly_declare_fn (special_function_kind kind, tree type, constexpr_p = DECL_DECLARED_CONSTEXPR_P (inherited_ctor); } /* Add the "this" parameter. */ - this_parm = build_this_parm (fn_type, TYPE_UNQUALIFIED); + this_parm = build_this_parm (fn, fn_type, TYPE_UNQUALIFIED); DECL_CHAIN (this_parm) = DECL_ARGUMENTS (fn); DECL_ARGUMENTS (fn) = this_parm; diff --git a/gcc/cp/name-lookup.c b/gcc/cp/name-lookup.c index 6ed164d4645..0df546a2e6a 100644 --- a/gcc/cp/name-lookup.c +++ b/gcc/cp/name-lookup.c @@ -450,7 +450,13 @@ name_lookup::add_value (tree new_val) else if ((TREE_CODE (value) == TYPE_DECL && TREE_CODE (new_val) == TYPE_DECL && same_type_p (TREE_TYPE (value), TREE_TYPE (new_val)))) - ; + /* Typedefs to the same type. */; + else if (TREE_CODE (value) == NAMESPACE_DECL + && TREE_CODE (new_val) == NAMESPACE_DECL + && ORIGINAL_NAMESPACE (value) == ORIGINAL_NAMESPACE (new_val)) + /* Namespace (possibly aliased) to the same namespace. Locate + the namespace*/ + value = ORIGINAL_NAMESPACE (value); else { if (deduping) @@ -1630,10 +1636,10 @@ static void diagnose_name_conflict (tree decl, tree bval) { if (TREE_CODE (decl) == TREE_CODE (bval) - && (TREE_CODE (decl) != TYPE_DECL - || (DECL_ARTIFICIAL (decl) && DECL_ARTIFICIAL (bval)) - || (!DECL_ARTIFICIAL (decl) && !DECL_ARTIFICIAL (bval))) + && TREE_CODE (decl) != NAMESPACE_DECL && !DECL_DECLARES_FUNCTION_P (decl) + && (TREE_CODE (decl) != TYPE_DECL + || DECL_ARTIFICIAL (decl) == DECL_ARTIFICIAL (bval)) && CP_DECL_CONTEXT (decl) == CP_DECL_CONTEXT (bval)) error ("redeclaration of %q#D", decl); else @@ -1784,6 +1790,14 @@ update_binding (cp_binding_level *level, cxx_binding *binding, tree *slot, else goto conflict; + if (to_type != old_type + && warn_shadow + && MAYBE_CLASS_TYPE_P (TREE_TYPE (to_type)) + && !(DECL_IN_SYSTEM_HEADER (decl) + && DECL_IN_SYSTEM_HEADER (to_type))) + warning (OPT_Wshadow, "%q#D hides constructor for %q#D", + decl, to_type); + to_val = ovl_insert (decl, old); } else if (!old) @@ -1801,15 +1815,14 @@ update_binding (cp_binding_level *level, cxx_binding *binding, tree *slot, } else if (TREE_CODE (old) == NAMESPACE_DECL) { - if (DECL_NAMESPACE_ALIAS (old) && DECL_NAMESPACE_ALIAS (decl) - && ORIGINAL_NAMESPACE (old) == ORIGINAL_NAMESPACE (decl)) - /* In a declarative region, a namespace-alias-definition can be - used to redefine a namespace-alias declared in that declarative - region to refer only to the namespace to which it already - refers. [namespace.alias] */ - return old; - else + /* Two maybe-aliased namespaces. If they're to the same target + namespace, that's ok. */ + if (ORIGINAL_NAMESPACE (old) != ORIGINAL_NAMESPACE (decl)) goto conflict; + + /* The new one must be an alias at this point. */ + gcc_assert (DECL_NAMESPACE_ALIAS (decl)); + return old; } else if (TREE_CODE (old) == VAR_DECL) { @@ -1849,21 +1862,6 @@ update_binding (cp_binding_level *level, cxx_binding *binding, tree *slot, add_decl_to_level (level, to_add); } - if (to_type != old_type) - { - gcc_checking_assert (!old_type - && TREE_CODE (to_type) == TYPE_DECL - && DECL_ARTIFICIAL (to_type)); - - tree type = TREE_TYPE (to_type); - if (to_type != decl - && MAYBE_CLASS_TYPE_P (type) && warn_shadow - && (!DECL_IN_SYSTEM_HEADER (decl) - || !DECL_IN_SYSTEM_HEADER (to_type))) - warning (OPT_Wshadow, "%q#D hides constructor for %q#T", - decl, type); - } - if (slot) { if (STAT_HACK_P (*slot)) @@ -4163,7 +4161,7 @@ do_class_using_decl (tree scope, tree name) scope_dependent_p = dependent_scope_p (scope); name_dependent_p = (scope_dependent_p - || (IDENTIFIER_TYPENAME_P (name) + || (IDENTIFIER_CONV_OP_P (name) && dependent_type_p (TREE_TYPE (name)))); bases_dependent_p = any_dependent_bases_p (); @@ -4273,8 +4271,6 @@ set_global_binding (tree name, tree val) void set_decl_namespace (tree decl, tree scope, bool friendp) { - tree old; - /* Get rid of namespace aliases. */ scope = ORIGINAL_NAMESPACE (scope); @@ -4284,41 +4280,49 @@ set_decl_namespace (tree decl, tree scope, bool friendp) decl, scope); DECL_CONTEXT (decl) = FROB_CONTEXT (scope); - /* Writing "int N::i" to declare a variable within "N" is invalid. */ - if (scope == current_namespace) - { - if (at_namespace_scope_p ()) - error ("explicit qualification in declaration of %qD", - decl); - return; - } + /* See whether this has been declared in the namespace or inline + children. */ + tree old = NULL_TREE; + { + name_lookup lookup (DECL_NAME (decl), LOOKUP_HIDDEN); + if (!lookup.search_qualified (scope, /*usings=*/false)) + /* No old declaration at all. */ + goto not_found; + old = lookup.value; + } - /* See whether this has been declared in the namespace. */ - old = lookup_qualified_name (scope, DECL_NAME (decl), /*type*/false, - /*complain*/true, /*hidden*/true); - if (old == error_mark_node) - /* No old declaration at all. */ - goto complain; /* If it's a TREE_LIST, the result of the lookup was ambiguous. */ if (TREE_CODE (old) == TREE_LIST) { + ambiguous: + DECL_CONTEXT (decl) = FROB_CONTEXT (scope); error ("reference to %qD is ambiguous", decl); print_candidates (old); return; } - if (!OVL_P (decl)) + + if (!DECL_DECLARES_FUNCTION_P (decl)) { - /* We might have found OLD in an inline namespace inside SCOPE. */ - if (TREE_CODE (decl) == TREE_CODE (old)) - DECL_CONTEXT (decl) = DECL_CONTEXT (old); /* Don't compare non-function decls with decls_match here, since it can't check for the correct constness at this - point. pushdecl will find those errors later. */ + point. pushdecl will find those errors later. */ + + /* We might have found it in an inline namespace child of SCOPE. */ + if (TREE_CODE (decl) == TREE_CODE (old)) + DECL_CONTEXT (decl) = DECL_CONTEXT (old); + + found: + /* Writing "N::i" to declare something directly in "N" is invalid. */ + if (CP_DECL_CONTEXT (decl) == current_namespace + && at_namespace_scope_p ()) + error ("explicit qualification in declaration of %qD", decl); return; } + /* Since decl is a function, old should contain a function decl. */ if (!OVL_P (old)) - goto complain; + goto not_found; + /* We handle these in check_explicit_instantiation_namespace. */ if (processing_explicit_instantiation) return; @@ -4332,53 +4336,48 @@ set_decl_namespace (tree decl, tree scope, bool friendp) friends in any namespace. */ if (friendp && DECL_USE_TEMPLATE (decl)) return; - if (OVL_P (old)) + + tree found; + found = NULL_TREE; + + for (lkp_iterator iter (old); iter; ++iter) { - tree found = NULL_TREE; + if (iter.using_p ()) + continue; - for (ovl_iterator iter (old); iter; ++iter) - { - tree ofn = *iter; - /* Adjust DECL_CONTEXT first so decls_match will return true - if DECL will match a declaration in an inline namespace. */ - DECL_CONTEXT (decl) = DECL_CONTEXT (ofn); - if (decls_match (decl, ofn)) - { - if (found && !decls_match (found, ofn)) - { - DECL_CONTEXT (decl) = FROB_CONTEXT (scope); - error ("reference to %qD is ambiguous", decl); - print_candidates (old); - return; - } - found = ofn; - } - } - if (found) + tree ofn = *iter; + + /* Adjust DECL_CONTEXT first so decls_match will return true + if DECL will match a declaration in an inline namespace. */ + DECL_CONTEXT (decl) = DECL_CONTEXT (ofn); + if (decls_match (decl, ofn)) { - if (!is_nested_namespace (scope, CP_DECL_CONTEXT (found), true)) - goto complain; - if (DECL_HIDDEN_FRIEND_P (found)) + if (found) { - pedwarn (DECL_SOURCE_LOCATION (decl), 0, - "%qD has not been declared within %qD", decl, scope); - inform (DECL_SOURCE_LOCATION (found), - "only here as a %<friend%>"); + /* We found more than one matching declaration. */ + DECL_CONTEXT (decl) = FROB_CONTEXT (scope); + goto ambiguous; } - DECL_CONTEXT (decl) = DECL_CONTEXT (found); - return; + found = ofn; } } - else + + if (found) { - DECL_CONTEXT (decl) = DECL_CONTEXT (old); - if (decls_match (decl, old)) - return; + if (DECL_HIDDEN_FRIEND_P (found)) + { + pedwarn (DECL_SOURCE_LOCATION (decl), 0, + "%qD has not been declared within %qD", decl, scope); + inform (DECL_SOURCE_LOCATION (found), + "only here as a %<friend%>"); + } + DECL_CONTEXT (decl) = DECL_CONTEXT (found); + goto found; } + not_found: /* It didn't work, go back to the explicit scope. */ DECL_CONTEXT (decl) = FROB_CONTEXT (scope); - complain: error ("%qD should have been declared inside %qD", decl, scope); } @@ -5067,7 +5066,7 @@ lookup_name_fuzzy (tree name, enum lookup_name_fuzzy_kind kind) /* Only consider reserved words that survived the filtering in init_reswords (e.g. for -std). */ - if (!C_IS_RESERVED_WORD (resword_identifier)) + if (!IDENTIFIER_KEYWORD_P (resword_identifier)) continue; bm.consider (IDENTIFIER_POINTER (resword_identifier)); @@ -5229,7 +5228,7 @@ lookup_name_real_1 (tree name, int prefer_type, int nonclass, bool block_p, /* Conversion operators are handled specially because ordinary unqualified name lookup will not find template conversion operators. */ - if (IDENTIFIER_TYPENAME_P (name)) + if (IDENTIFIER_CONV_OP_P (name)) { cp_binding_level *level; diff --git a/gcc/cp/operators.def b/gcc/cp/operators.def index d26f2a1a15a..7dfdd227241 100644 --- a/gcc/cp/operators.def +++ b/gcc/cp/operators.def @@ -67,20 +67,20 @@ along with GCC; see the file COPYING3. If not see an ASSIGNMENT_P argument; it is always zero. */ #define DEF_SIMPLE_OPERATOR(NAME, CODE, MANGLING, ARITY) \ - DEF_OPERATOR(NAME, CODE, MANGLING, ARITY, 0) + DEF_OPERATOR(NAME, CODE, MANGLING, ARITY, cik_simple_op) /* Use DEF_ASSN_OPERATOR to define an assignment operator. Its arguments are as for DEF_OPERATOR, but there is no need to provide an ASSIGNMENT_P argument; it is always one. */ #define DEF_ASSN_OPERATOR(NAME, CODE, MANGLING, ARITY) \ - DEF_OPERATOR(NAME, CODE, MANGLING, ARITY, 1) + DEF_OPERATOR(NAME, CODE, MANGLING, ARITY, cik_assign_op) /* Memory allocation operators. */ -DEF_SIMPLE_OPERATOR ("new", NEW_EXPR, "nw", -1) -DEF_SIMPLE_OPERATOR ("new []", VEC_NEW_EXPR, "na", -1) -DEF_SIMPLE_OPERATOR ("delete", DELETE_EXPR, "dl", -1) -DEF_SIMPLE_OPERATOR ("delete []", VEC_DELETE_EXPR, "da", -1) +DEF_OPERATOR ("new", NEW_EXPR, "nw", -1, cik_newdel_op) +DEF_OPERATOR ("new []", VEC_NEW_EXPR, "na", -1, cik_newdel_op) +DEF_OPERATOR ("delete", DELETE_EXPR, "dl", -1, cik_newdel_op) +DEF_OPERATOR ("delete []", VEC_DELETE_EXPR, "da", -1, cik_newdel_op) /* Unary operators. */ DEF_SIMPLE_OPERATOR ("+", UNARY_PLUS_EXPR, "ps", 1) @@ -97,8 +97,7 @@ DEF_SIMPLE_OPERATOR ("alignof", ALIGNOF_EXPR, "az", 1) DEF_SIMPLE_OPERATOR ("__imag__", IMAGPART_EXPR, "v18__imag__", 1) DEF_SIMPLE_OPERATOR ("__real__", REALPART_EXPR, "v18__real__", 1) -/* The cast operator. */ -DEF_SIMPLE_OPERATOR ("", TYPE_EXPR, "cv", 1) +/* The cast operators. */ DEF_SIMPLE_OPERATOR ("", CAST_EXPR, "cv", 1) DEF_SIMPLE_OPERATOR ("dynamic_cast", DYNAMIC_CAST_EXPR, "dc", 1) DEF_SIMPLE_OPERATOR ("reinterpret_cast", REINTERPRET_CAST_EXPR, "rc", 1) diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c index d02ad360d16..634047e5d05 100644 --- a/gcc/cp/parser.c +++ b/gcc/cp/parser.c @@ -806,7 +806,7 @@ cp_lexer_get_preprocessor_token (cp_lexer *lexer, cp_token *token) /* Check to see if this token is a keyword. */ if (token->type == CPP_NAME) { - if (C_IS_RESERVED_WORD (token->u.value)) + if (IDENTIFIER_KEYWORD_P (token->u.value)) { /* Mark this token as a keyword. */ token->type = CPP_KEYWORD; @@ -2983,7 +2983,9 @@ cp_parser_check_for_invalid_template_id (cp_parser* parser, if (cp_lexer_next_token_is (parser->lexer, CPP_LESS)) { - if (TYPE_P (type)) + if (TREE_CODE (type) == TYPE_DECL) + type = TREE_TYPE (type); + if (TYPE_P (type) && !template_placeholder_p (type)) error_at (location, "%qT is not a template", type); else if (identifier_p (type)) { @@ -3270,9 +3272,21 @@ cp_parser_diagnose_invalid_type_name (cp_parser *parser, tree id, } else if (TYPE_P (parser->scope) && dependent_scope_p (parser->scope)) - error_at (location, "need %<typename%> before %<%T::%E%> because " - "%qT is a dependent scope", - parser->scope, id, parser->scope); + { + if (TREE_CODE (parser->scope) == TYPENAME_TYPE) + error_at (location, + "need %<typename%> before %<%T::%D::%E%> because " + "%<%T::%D%> is a dependent scope", + TYPE_CONTEXT (parser->scope), + TYPENAME_TYPE_FULLNAME (parser->scope), + id, + TYPE_CONTEXT (parser->scope), + TYPENAME_TYPE_FULLNAME (parser->scope)); + else + error_at (location, "need %<typename%> before %<%T::%E%> because " + "%qT is a dependent scope", + parser->scope, id, parser->scope); + } else if (TYPE_P (parser->scope)) { if (!COMPLETE_TYPE_P (parser->scope)) @@ -8636,6 +8650,85 @@ cp_parser_tokens_start_cast_expression (cp_parser *parser) } } +/* Try to find a legal C++-style cast to DST_TYPE for ORIG_EXPR, trying them + in the order: const_cast, static_cast, reinterpret_cast. + + Don't suggest dynamic_cast. + + Return the first legal cast kind found, or NULL otherwise. */ + +static const char * +get_cast_suggestion (tree dst_type, tree orig_expr) +{ + tree trial; + + /* Reuse the parser logic by attempting to build the various kinds of + cast, with "complain" disabled. + Identify the first such cast that is valid. */ + + /* Don't attempt to run such logic within template processing. */ + if (processing_template_decl) + return NULL; + + /* First try const_cast. */ + trial = build_const_cast (dst_type, orig_expr, tf_none); + if (trial != error_mark_node) + return "const_cast"; + + /* If that fails, try static_cast. */ + trial = build_static_cast (dst_type, orig_expr, tf_none); + if (trial != error_mark_node) + return "static_cast"; + + /* Finally, try reinterpret_cast. */ + trial = build_reinterpret_cast (dst_type, orig_expr, tf_none); + if (trial != error_mark_node) + return "reinterpret_cast"; + + /* No such cast possible. */ + return NULL; +} + +/* If -Wold-style-cast is enabled, add fix-its to RICHLOC, + suggesting how to convert a C-style cast of the form: + + (DST_TYPE)ORIG_EXPR + + to a C++-style cast. + + The primary range of RICHLOC is asssumed to be that of the original + expression. OPEN_PAREN_LOC and CLOSE_PAREN_LOC give the locations + of the parens in the C-style cast. */ + +static void +maybe_add_cast_fixit (rich_location *rich_loc, location_t open_paren_loc, + location_t close_paren_loc, tree orig_expr, + tree dst_type) +{ + /* This function is non-trivial, so bail out now if the warning isn't + going to be emitted. */ + if (!warn_old_style_cast) + return; + + /* Try to find a legal C++ cast, trying them in order: + const_cast, static_cast, reinterpret_cast. */ + const char *cast_suggestion = get_cast_suggestion (dst_type, orig_expr); + if (!cast_suggestion) + return; + + /* Replace the open paren with "CAST_SUGGESTION<". */ + pretty_printer pp; + pp_printf (&pp, "%s<", cast_suggestion); + rich_loc->add_fixit_replace (open_paren_loc, pp_formatted_text (&pp)); + + /* Replace the close paren with "> (". */ + rich_loc->add_fixit_replace (close_paren_loc, "> ("); + + /* Add a closing paren after the expr (the primary range of RICH_LOC). */ + rich_loc->add_fixit_insert_after (")"); +} + + /* Parse a cast-expression. cast-expression: @@ -8671,6 +8764,7 @@ cp_parser_cast_expression (cp_parser *parser, bool address_p, bool cast_p, /* Consume the `('. */ cp_token *open_paren = cp_lexer_consume_token (parser->lexer); location_t open_paren_loc = open_paren->location; + location_t close_paren_loc = UNKNOWN_LOCATION; /* A very tricky bit is that `(struct S) { 3 }' is a compound-literal (which we permit in C++ as an extension). @@ -8733,7 +8827,10 @@ cp_parser_cast_expression (cp_parser *parser, bool address_p, bool cast_p, /* Look for the type-id. */ type = cp_parser_type_id (parser); /* Look for the closing `)'. */ - cp_parser_require (parser, CPP_CLOSE_PAREN, RT_CLOSE_PAREN); + cp_token *close_paren + = cp_parser_require (parser, CPP_CLOSE_PAREN, RT_CLOSE_PAREN); + if (close_paren) + close_paren_loc = close_paren->location; parser->in_type_id_in_expr_p = saved_in_type_id_in_expr_p; } @@ -8763,8 +8860,13 @@ cp_parser_cast_expression (cp_parser *parser, bool address_p, bool cast_p, && !in_system_header_at (input_location) && !VOID_TYPE_P (type) && current_lang_name != lang_name_c) - warning (OPT_Wold_style_cast, - "use of old-style cast to %qT", type); + { + gcc_rich_location rich_loc (input_location); + maybe_add_cast_fixit (&rich_loc, open_paren_loc, close_paren_loc, + expr, type); + warning_at_rich_loc (&rich_loc, OPT_Wold_style_cast, + "use of old-style cast to %qT", type); + } /* Only type conversions to integral or enumeration types can be used in constant-expressions. */ @@ -16972,7 +17074,7 @@ cp_parser_simple_type_specifier (cp_parser* parser, /* There is no valid C++ program where a non-template type is followed by a "<". That usually indicates that the user thought that the type was a template. */ - cp_parser_check_for_invalid_template_id (parser, TREE_TYPE (type), + cp_parser_check_for_invalid_template_id (parser, type, none_type, token->location); } @@ -20001,7 +20103,8 @@ cp_parser_direct_declarator (cp_parser* parser, { if (TREE_CODE (unqualified_name) == BIT_NOT_EXPR) sfk = sfk_destructor; - else if (IDENTIFIER_TYPENAME_P (unqualified_name)) + else if (identifier_p (unqualified_name) + && IDENTIFIER_CONV_OP_P (unqualified_name)) sfk = sfk_conversion; else if (/* There's no way to declare a constructor for an unnamed type, even if the type @@ -20451,7 +20554,7 @@ inject_this_parameter (tree ctype, cp_cv_quals quals) return; } - this_parm = build_this_parm (ctype, quals); + this_parm = build_this_parm (NULL_TREE, ctype, quals); /* Clear this first to avoid shortcut in cp_build_indirect_ref. */ current_class_ptr = NULL_TREE; current_class_ref diff --git a/gcc/cp/pt.c b/gcc/cp/pt.c index 8a61b74a149..392fba07714 100644 --- a/gcc/cp/pt.c +++ b/gcc/cp/pt.c @@ -5333,11 +5333,11 @@ push_template_decl_real (tree decl, bool is_friend) error ("destructor %qD declared as member template", decl); return error_mark_node; } - if (NEW_DELETE_OPNAME_P (DECL_NAME (decl)) + if (IDENTIFIER_NEWDEL_OP_P (DECL_NAME (decl)) && (!prototype_p (TREE_TYPE (decl)) || TYPE_ARG_TYPES (TREE_TYPE (decl)) == void_list_node || !TREE_CHAIN (TYPE_ARG_TYPES (TREE_TYPE (decl))) - || (TREE_CHAIN (TYPE_ARG_TYPES ((TREE_TYPE (decl)))) + || (TREE_CHAIN (TYPE_ARG_TYPES (TREE_TYPE (decl))) == void_list_node))) { /* [basic.stc.dynamic.allocation] @@ -6585,10 +6585,10 @@ convert_nontype_argument (tree type, tree expr, tsubst_flags_t complain) if (complain & tf_error) { int errs = errorcount, warns = warningcount + werrorcount; - if (processing_template_decl - && !require_potential_constant_expression (expr)) - return NULL_TREE; - expr = cxx_constant_value (expr); + if (!require_potential_constant_expression (expr)) + expr = error_mark_node; + else + expr = cxx_constant_value (expr); if (errorcount > errs || warningcount + werrorcount > warns) inform (loc, "in template argument for type %qT ", type); if (expr == error_mark_node) @@ -8101,10 +8101,10 @@ coerce_template_parms (tree parms, parm = TREE_VEC_ELT (parms, parm_idx); if (parm == error_mark_node) - { - TREE_VEC_ELT (new_inner_args, arg_idx) = error_mark_node; - continue; - } + { + TREE_VEC_ELT (new_inner_args, arg_idx) = error_mark_node; + continue; + } /* Calculate the next argument. */ if (arg_idx < nargs) @@ -10864,9 +10864,9 @@ instantiate_class_template_1 (tree type) /* The vtable for a template class can be emitted in any translation unit in which the class is instantiated. When there is no key method, however, finish_struct_1 will already have added TYPE to - the keyed_classes list. */ + the keyed_classes. */ if (TYPE_CONTAINS_VPTR_P (type) && CLASSTYPE_KEY_METHOD (type)) - keyed_classes = tree_cons (NULL_TREE, type, keyed_classes); + vec_safe_push (keyed_classes, type); return type; } @@ -12416,7 +12416,7 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) /* If we aren't complaining now, return on error before we register the specialization so that we'll complain eventually. */ if ((complain & tf_error) == 0 - && IDENTIFIER_OPNAME_P (DECL_NAME (r)) + && IDENTIFIER_ANY_OP_P (DECL_NAME (r)) && !grok_op_properties (r, /*complain=*/false)) RETURN (error_mark_node); @@ -12487,7 +12487,7 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) clone_function_decl (r, /*update_methods=*/false); } else if ((complain & tf_error) != 0 - && IDENTIFIER_OPNAME_P (DECL_NAME (r)) + && IDENTIFIER_ANY_OP_P (DECL_NAME (r)) && !grok_op_properties (r, /*complain=*/true)) RETURN (error_mark_node); @@ -12947,13 +12947,11 @@ tsubst_decl (tree t, tree args, tsubst_flags_t complain) /* The initializer must not be expanded until it is required; see [temp.inst]. */ DECL_INITIAL (r) = NULL_TREE; - if (VAR_P (r)) - SET_DECL_MODE (r, VOIDmode); - if (CODE_CONTAINS_STRUCT (TREE_CODE (t), TS_DECL_WRTL)) - SET_DECL_RTL (r, NULL); DECL_SIZE (r) = DECL_SIZE_UNIT (r) = 0; if (VAR_P (r)) { + SET_DECL_MODE (r, VOIDmode); + /* Possibly limit visibility based on template args. */ DECL_VISIBILITY (r) = VISIBILITY_DEFAULT; if (DECL_VISIBILITY_SPECIFIED (t)) @@ -14215,93 +14213,89 @@ tsubst (tree t, tree args, tsubst_flags_t complain, tree in_decl) } } -/* Like tsubst_expr for a BASELINK. OBJECT_TYPE, if non-NULL, is the - type of the expression on the left-hand side of the "." or "->" - operator. */ +/* tsubst a BASELINK. OBJECT_TYPE, if non-NULL, is the type of the + expression on the left-hand side of the "." or "->" operator. A + baselink indicates a function from a base class. Both the + BASELINK_ACCESS_BINFO and the base class referenced may indicate + bases of the template class, rather than the instantiated class. + In addition, lookups that were not ambiguous before may be + ambiguous now. Therefore, we perform the lookup again. */ static tree tsubst_baselink (tree baselink, tree object_type, tree args, tsubst_flags_t complain, tree in_decl) { - tree name; - tree qualifying_scope; - tree fns; - tree optype; - tree template_args = 0; - bool template_id_p = false; - bool qualified = BASELINK_QUALIFIED_P (baselink); - - /* A baselink indicates a function from a base class. Both the - BASELINK_ACCESS_BINFO and the base class referenced may - indicate bases of the template class, rather than the - instantiated class. In addition, lookups that were not - ambiguous before may be ambiguous now. Therefore, we perform - the lookup again. */ - qualifying_scope = BINFO_TYPE (BASELINK_ACCESS_BINFO (baselink)); - qualifying_scope = tsubst (qualifying_scope, args, - complain, in_decl); - fns = BASELINK_FUNCTIONS (baselink); - optype = tsubst (BASELINK_OPTYPE (baselink), args, complain, in_decl); - if (TREE_CODE (fns) == TEMPLATE_ID_EXPR) - { - template_id_p = true; - template_args = TREE_OPERAND (fns, 1); - fns = TREE_OPERAND (fns, 0); - if (template_args) - template_args = tsubst_template_args (template_args, args, - complain, in_decl); - } - name = OVL_NAME (fns); - if (IDENTIFIER_TYPENAME_P (name)) - name = mangle_conv_op_name_for_type (optype); - baselink = lookup_fnfields (qualifying_scope, name, /*protect=*/1); - if (!baselink) - { - if (constructor_name_p (name, qualifying_scope)) - { - if (complain & tf_error) - error ("cannot call constructor %<%T::%D%> directly", - qualifying_scope, name); - } - return error_mark_node; - } + bool qualified = BASELINK_QUALIFIED_P (baselink); + + tree qualifying_scope = BINFO_TYPE (BASELINK_ACCESS_BINFO (baselink)); + qualifying_scope = tsubst (qualifying_scope, args, complain, in_decl); - /* If lookup found a single function, mark it as used at this - point. (If it lookup found multiple functions the one selected - later by overload resolution will be marked as used at that - point.) */ - if (BASELINK_P (baselink)) - fns = BASELINK_FUNCTIONS (baselink); - if (!template_id_p && !really_overloaded_fn (fns) - && !mark_used (OVL_FIRST (fns), complain) && !(complain & tf_error)) + tree optype = BASELINK_OPTYPE (baselink); + optype = tsubst (optype, args, complain, in_decl); + + tree template_args = NULL_TREE; + bool template_id_p = false; + tree fns = BASELINK_FUNCTIONS (baselink); + if (TREE_CODE (fns) == TEMPLATE_ID_EXPR) + { + template_id_p = true; + template_args = TREE_OPERAND (fns, 1); + fns = TREE_OPERAND (fns, 0); + if (template_args) + template_args = tsubst_template_args (template_args, args, + complain, in_decl); + } + + tree name = OVL_NAME (fns); + if (IDENTIFIER_CONV_OP_P (name)) + name = mangle_conv_op_name_for_type (optype); + + baselink = lookup_fnfields (qualifying_scope, name, /*protect=*/1); + if (!baselink) + { + if ((complain & tf_error) && constructor_name_p (name, qualifying_scope)) + error ("cannot call constructor %<%T::%D%> directly", + qualifying_scope, name); return error_mark_node; + } + + /* If lookup found a single function, mark it as used at this point. + (If it lookup found multiple functions the one selected later by + overload resolution will be marked as used at that point.) */ + if (BASELINK_P (baselink)) + fns = BASELINK_FUNCTIONS (baselink); + if (!template_id_p && !really_overloaded_fn (fns) + && !mark_used (OVL_FIRST (fns), complain) && !(complain & tf_error)) + return error_mark_node; + + if (BASELINK_P (baselink)) + { + /* Add back the template arguments, if present. */ + if (template_id_p) + BASELINK_FUNCTIONS (baselink) + = build2 (TEMPLATE_ID_EXPR, unknown_type_node, + BASELINK_FUNCTIONS (baselink), template_args); - /* Add back the template arguments, if present. */ - if (BASELINK_P (baselink) && template_id_p) - BASELINK_FUNCTIONS (baselink) - = build2 (TEMPLATE_ID_EXPR, - unknown_type_node, - BASELINK_FUNCTIONS (baselink), - template_args); - /* Update the conversion operator type. */ - if (BASELINK_P (baselink)) + /* Update the conversion operator type. */ BASELINK_OPTYPE (baselink) = optype; + } - if (!object_type) - object_type = current_class_type; + if (!object_type) + object_type = current_class_type; - if (qualified || name == complete_dtor_identifier) - { - baselink = adjust_result_of_qualified_name_lookup (baselink, - qualifying_scope, - object_type); - if (!qualified) - /* We need to call adjust_result_of_qualified_name_lookup in case the - destructor names a base class, but we unset BASELINK_QUALIFIED_P - so that we still get virtual function binding. */ - BASELINK_QUALIFIED_P (baselink) = false; - } - return baselink; + if (qualified || name == complete_dtor_identifier) + { + baselink = adjust_result_of_qualified_name_lookup (baselink, + qualifying_scope, + object_type); + if (!qualified) + /* We need to call adjust_result_of_qualified_name_lookup in case the + destructor names a base class, but we unset BASELINK_QUALIFIED_P + so that we still get virtual function binding. */ + BASELINK_QUALIFIED_P (baselink) = false; + } + + return baselink; } /* Like tsubst_expr for a SCOPE_REF, given by QUALIFIED_ID. DONE is @@ -15041,7 +15035,7 @@ tsubst_copy (tree t, tree args, tsubst_flags_t complain, tree in_decl) t = DECL_NAME (t); /* Fall through. */ case IDENTIFIER_NODE: - if (IDENTIFIER_TYPENAME_P (t)) + if (IDENTIFIER_CONV_OP_P (t)) { tree new_type = tsubst (TREE_TYPE (t), args, complain, in_decl); return mangle_conv_op_name_for_type (new_type); @@ -16674,7 +16668,7 @@ tsubst_copy_and_build (tree t, bool non_integral_constant_expression_p; const char *error_msg; - if (IDENTIFIER_TYPENAME_P (t)) + if (IDENTIFIER_CONV_OP_P (t)) { tree new_type = tsubst (TREE_TYPE (t), args, complain, in_decl); t = mangle_conv_op_name_for_type (new_type); @@ -20632,18 +20626,6 @@ unify (tree tparms, tree targs, tree parm, tree arg, int strict, return x; } - if (cxx_dialect >= cxx1z - /* We deduce from array bounds in try_array_deduction. */ - && !(strict & UNIFY_ALLOW_INTEGER) - && uses_template_parms (TREE_TYPE (parm)) - && !type_uses_auto (TREE_TYPE (parm))) - { - tree atype = TREE_TYPE (arg); - RECUR_AND_CHECK_FAILURE (tparms, targs, - TREE_TYPE (parm), atype, - UNIFY_ALLOW_NONE, explain_p); - } - /* [temp.deduct.type] If, in the declaration of a function template with a non-type template-parameter, the non-type template-parameter is used in an expression in the function @@ -20664,7 +20646,8 @@ unify (tree tparms, tree targs, tree parm, tree arg, int strict, /* Template-parameter dependent expression. Just accept it for now. It will later be processed in convert_template_argument. */ ; - else if (same_type_p (TREE_TYPE (arg), tparm)) + else if (same_type_p (non_reference (TREE_TYPE (arg)), + non_reference (tparm))) /* OK */; else if ((strict & UNIFY_ALLOW_INTEGER) && CP_INTEGRAL_TYPE_P (tparm)) @@ -20673,9 +20656,22 @@ unify (tree tparms, tree targs, tree parm, tree arg, int strict, corresponding parameter. */ arg = fold (build_nop (tparm, arg)); else if (uses_template_parms (tparm)) - /* We haven't deduced the type of this parameter yet. Try again - later. */ - return unify_success (explain_p); + { + /* We haven't deduced the type of this parameter yet. */ + if (cxx_dialect >= cxx1z + /* We deduce from array bounds in try_array_deduction. */ + && !(strict & UNIFY_ALLOW_INTEGER)) + { + /* Deduce it from the non-type argument. */ + tree atype = TREE_TYPE (arg); + RECUR_AND_CHECK_FAILURE (tparms, targs, + tparm, atype, + UNIFY_ALLOW_NONE, explain_p); + } + else + /* Try again later. */ + return unify_success (explain_p); + } else return unify_type_mismatch (explain_p, tparm, TREE_TYPE (arg)); @@ -21676,9 +21672,11 @@ get_partial_spec_bindings (tree tmpl, tree spec_tmpl, tree args) `T' is `A' but unify () does not check whether `typename T::X' is `int'. */ spec_args = tsubst (spec_args, deduced_args, tf_none, NULL_TREE); - spec_args = coerce_template_parms (DECL_INNERMOST_TEMPLATE_PARMS (tmpl), - spec_args, tmpl, - tf_none, false, false); + + if (spec_args != error_mark_node) + spec_args = coerce_template_parms (DECL_INNERMOST_TEMPLATE_PARMS (tmpl), + INNERMOST_TEMPLATE_ARGS (spec_args), + tmpl, tf_none, false, false); pop_tinst_level (); @@ -24011,17 +24009,35 @@ type_dependent_expression_p (tree expression) return true; /* A function or variable template-id is type-dependent if it has any - dependent template arguments. Note that we only consider the innermost - template arguments here, since those are the ones that come from the - template-id; the template arguments for the enclosing class do not make it - type-dependent, they only make a member function value-dependent. */ + dependent template arguments. */ if (VAR_OR_FUNCTION_DECL_P (expression) && DECL_LANG_SPECIFIC (expression) - && DECL_TEMPLATE_INFO (expression) - && PRIMARY_TEMPLATE_P (DECL_TI_TEMPLATE (expression)) - && (any_dependent_template_arguments_p - (INNERMOST_TEMPLATE_ARGS (DECL_TI_ARGS (expression))))) - return true; + && DECL_TEMPLATE_INFO (expression)) + { + /* Consider the innermost template arguments, since those are the ones + that come from the template-id; the template arguments for the + enclosing class do not make it type-dependent unless they are used in + the type of the decl. */ + if (PRIMARY_TEMPLATE_P (DECL_TI_TEMPLATE (expression)) + && (any_dependent_template_arguments_p + (INNERMOST_TEMPLATE_ARGS (DECL_TI_ARGS (expression))))) + return true; + + /* Otherwise, if the decl isn't from a dependent scope, it can't be + type-dependent. Checking this is important for functions with auto + return type, which looks like a dependent type. */ + if (TREE_CODE (expression) == FUNCTION_DECL + && (!DECL_CLASS_SCOPE_P (expression) + || !dependent_type_p (DECL_CONTEXT (expression))) + && (!DECL_FRIEND_CONTEXT (expression) + || !dependent_type_p (DECL_FRIEND_CONTEXT (expression))) + && !DECL_LOCAL_FUNCTION_P (expression)) + { + gcc_assert (!dependent_type_p (TREE_TYPE (expression)) + || undeduced_auto_decl (expression)); + return false; + } + } /* Always dependent, on the number of arguments if nothing else. */ if (TREE_CODE (expression) == EXPR_PACK_EXPANSION) @@ -24783,6 +24799,14 @@ make_template_placeholder (tree tmpl) return t; } +/* True iff T is a C++17 class template deduction placeholder. */ + +bool +template_placeholder_p (tree t) +{ + return is_auto (t) && CLASS_PLACEHOLDER_TEMPLATE (t); +} + /* Make a "constrained auto" type-specifier. This is an auto type with constraints that must be associated after deduction. The constraint is formed from the given diff --git a/gcc/cp/ptree.c b/gcc/cp/ptree.c index 5775e07dbbd..7b69dbe2b89 100644 --- a/gcc/cp/ptree.c +++ b/gcc/cp/ptree.c @@ -178,7 +178,8 @@ cxx_print_identifier (FILE *file, tree node, int indent) fprintf (file, " "); else indent_to (file, indent + 4); - fprintf (file, "local bindings <%p>", (void *) IDENTIFIER_BINDING (node)); + fprintf (file, "%s local bindings <%p>", get_identifier_kind_name (node), + (void *) IDENTIFIER_BINDING (node)); print_node (file, "label", IDENTIFIER_LABEL_VALUE (node), indent + 4); print_node (file, "template", IDENTIFIER_TEMPLATE (node), indent + 4); } diff --git a/gcc/cp/rtti.c b/gcc/cp/rtti.c index 89d18914adf..ff72ce538b2 100644 --- a/gcc/cp/rtti.c +++ b/gcc/cp/rtti.c @@ -75,7 +75,8 @@ enum tinfo_kind { TK_TYPE_INFO_TYPE, /* abi::__type_info_pseudo */ TK_BASE_TYPE, /* abi::__base_class_type_info */ - TK_BUILTIN_TYPE, /* abi::__fundamental_type_info */ + TK_DERIVED_TYPES, /* Start of types derived from abi::__type_info */ + TK_BUILTIN_TYPE = TK_DERIVED_TYPES, /* abi::__fundamental_type_info */ TK_ARRAY_TYPE, /* abi::__array_type_info */ TK_FUNCTION_TYPE, /* abi::__function_type_info */ TK_ENUMERAL_TYPE, /* abi::__enum_type_info */ @@ -83,8 +84,26 @@ enum tinfo_kind TK_POINTER_MEMBER_TYPE, /* abi::__pointer_to_member_type_info */ TK_CLASS_TYPE, /* abi::__class_type_info */ TK_SI_CLASS_TYPE, /* abi::__si_class_type_info */ - TK_FIXED /* end of fixed descriptors. */ - /* ... abi::__vmi_type_info<I> */ + TK_VMI_CLASS_TYPES, /* abi::__vmi_class_type_info<int> */ + TK_MAX +}; + +/* Names of the tinfo types. Must be same order as TK enumeration + above. */ + +static const char *const tinfo_names[TK_MAX] = +{ + "__type_info", + "__base_class_type_info", + "__fundamental_type_info", + "__array_type_info", + "__function_type_info", + "__enum_type_info", + "__pointer_type_info", + "__pointer_to_member_type_info", + "__class_type_info", + "__si_class_type_info", + "__vmi_class_type_info" }; /* Helper macro to get maximum scalar-width of pointer or of the 'long'-type. @@ -115,9 +134,9 @@ static tree generic_initializer (tinfo_s *, tree); static tree ptr_initializer (tinfo_s *, tree); static tree ptm_initializer (tinfo_s *, tree); static tree class_initializer (tinfo_s *, tree, unsigned, ...); -static void create_pseudo_type_info (int, const char *, ...); static tree get_pseudo_ti_init (tree, unsigned); static unsigned get_pseudo_ti_index (tree); +static tinfo_s *get_tinfo_desc (unsigned); static void create_tinfo_types (void); static bool typeinfo_in_lib_p (tree); @@ -289,30 +308,27 @@ get_tinfo_decl_dynamic (tree exp, tsubst_flags_t complain) static bool typeid_ok_p (void) { - tree pseudo_type_info, type_info_type; - if (! flag_rtti) { - error ("cannot use typeid with -fno-rtti"); + error ("cannot use %<typeid%> with -fno-rtti"); return false; } if (!COMPLETE_TYPE_P (const_type_info_type_node)) { - error ("must #include <typeinfo> before using typeid"); + error ("must %<#include <typeinfo>%> before using %<typeid%>"); return false; } - pseudo_type_info = (*tinfo_descs)[TK_TYPE_INFO_TYPE].type; - type_info_type = TYPE_MAIN_VARIANT (const_type_info_type_node); + tree pseudo = TYPE_MAIN_VARIANT (get_tinfo_desc (TK_TYPE_INFO_TYPE)->type); + tree real = TYPE_MAIN_VARIANT (const_type_info_type_node); /* Make sure abi::__type_info_pseudo has the same alias set as std::type_info. */ - if (! TYPE_ALIAS_SET_KNOWN_P (pseudo_type_info)) - TYPE_ALIAS_SET (pseudo_type_info) = get_alias_set (type_info_type); + if (! TYPE_ALIAS_SET_KNOWN_P (pseudo)) + TYPE_ALIAS_SET (pseudo) = get_alias_set (real); else - gcc_assert (TYPE_ALIAS_SET (pseudo_type_info) - == get_alias_set (type_info_type)); + gcc_assert (TYPE_ALIAS_SET (pseudo) == get_alias_set (real)); return true; } @@ -428,8 +444,8 @@ get_tinfo_decl (tree type) if (!d) { int ix = get_pseudo_ti_index (type); - tinfo_s *ti = &(*tinfo_descs)[ix]; - + const tinfo_s *ti = get_tinfo_desc (ix); + d = build_lang_decl (VAR_DECL, name, ti->type); SET_DECL_ASSEMBLER_NAME (d, name); /* Remember the type it is for. */ @@ -1105,7 +1121,7 @@ typeinfo_in_lib_p (tree type) static tree get_pseudo_ti_init (tree type, unsigned tk_index) { - tinfo_s *ti = &(*tinfo_descs)[tk_index]; + tinfo_s *ti = get_tinfo_desc (tk_index); gcc_assert (at_eof); switch (tk_index) @@ -1140,22 +1156,18 @@ get_pseudo_ti_init (tree type, unsigned tk_index) int hint = ((CLASSTYPE_REPEATED_BASE_P (type) << 0) | (CLASSTYPE_DIAMOND_SHAPED_P (type) << 1)); tree binfo = TYPE_BINFO (type); - int nbases = BINFO_N_BASE_BINFOS (binfo); + unsigned nbases = BINFO_N_BASE_BINFOS (binfo); vec<tree, va_gc> *base_accesses = BINFO_BASE_ACCESSES (binfo); tree offset_type = LONGPTR_T; - tree base_inits = NULL_TREE; - int ix; vec<constructor_elt, va_gc> *init_vec = NULL; - constructor_elt *e; - gcc_assert (tk_index >= TK_FIXED); + gcc_assert (tk_index - TK_VMI_CLASS_TYPES + 1 == nbases); vec_safe_grow (init_vec, nbases); /* Generate the base information initializer. */ - for (ix = nbases; ix--;) + for (unsigned ix = nbases; ix--;) { tree base_binfo = BINFO_BASE_BINFO (binfo, ix); - tree base_init; int flags = 0; tree tinfo; tree offset; @@ -1185,12 +1197,12 @@ get_pseudo_ti_init (tree type, unsigned tk_index) vec_alloc (v, 2); CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, tinfo); CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, offset); - base_init = build_constructor (init_list_type_node, v); - e = &(*init_vec)[ix]; + tree base_init = build_constructor (init_list_type_node, v); + constructor_elt *e = &(*init_vec)[ix]; e->index = NULL_TREE; e->value = base_init; } - base_inits = build_constructor (init_list_type_node, init_vec); + tree base_inits = build_constructor (init_list_type_node, init_vec); /* get_tinfo_ptr might have reallocated the tinfo_descs vector. */ ti = &(*tinfo_descs)[tk_index]; @@ -1202,69 +1214,6 @@ get_pseudo_ti_init (tree type, unsigned tk_index) } } -/* Generate the RECORD_TYPE containing the data layout of a type_info - derivative as used by the runtime. This layout must be consistent with - that defined in the runtime support. Also generate the VAR_DECL for the - type's vtable. We explicitly manage the vtable member, and name it for - real type as used in the runtime. The RECORD type has a different name, - to avoid collisions. Return a TREE_LIST who's TINFO_PSEUDO_TYPE - is the generated type and TINFO_VTABLE_NAME is the name of the - vtable. We have to delay generating the VAR_DECL of the vtable - until the end of the translation, when we'll have seen the library - definition, if there was one. - - REAL_NAME is the runtime's name of the type. Trailing arguments are - additional FIELD_DECL's for the structure. The final argument must be - NULL. */ - -static void -create_pseudo_type_info (int tk, const char *real_name, ...) -{ - tinfo_s *ti; - tree pseudo_type; - char *pseudo_name; - tree fields; - tree field_decl; - va_list ap; - - va_start (ap, real_name); - - /* Generate the pseudo type name. */ - pseudo_name = (char *) alloca (strlen (real_name) + 30); - strcpy (pseudo_name, real_name); - strcat (pseudo_name, "_pseudo"); - if (tk >= TK_FIXED) - sprintf (pseudo_name + strlen (pseudo_name), "%d", tk - TK_FIXED); - - /* First field is the pseudo type_info base class. */ - fields = build_decl (input_location, - FIELD_DECL, NULL_TREE, - (*tinfo_descs)[TK_TYPE_INFO_TYPE].type); - - /* Now add the derived fields. */ - while ((field_decl = va_arg (ap, tree))) - { - DECL_CHAIN (field_decl) = fields; - fields = field_decl; - } - - /* Create the pseudo type. */ - pseudo_type = make_class_type (RECORD_TYPE); - finish_builtin_struct (pseudo_type, pseudo_name, fields, NULL_TREE); - CLASSTYPE_AS_BASE (pseudo_type) = pseudo_type; - - ti = &(*tinfo_descs)[tk]; - ti->type = cp_build_qualified_type (pseudo_type, TYPE_QUAL_CONST); - ti->name = get_identifier (real_name); - ti->vtable = NULL_TREE; - - /* Pretend this is public so determine_visibility doesn't give vtables - internal linkage. */ - TREE_PUBLIC (TYPE_MAIN_DECL (ti->type)) = 1; - - va_end (ap); -} - /* Return the index of a pseudo type info type node used to describe TYPE. TYPE must be a complete type (or cv void), except at the end of the translation unit. */ @@ -1299,23 +1248,16 @@ get_pseudo_ti_index (tree type) case UNION_TYPE: case RECORD_TYPE: if (TYPE_PTRMEMFUNC_P (type)) - { - ix = TK_POINTER_MEMBER_TYPE; - break; - } + ix = TK_POINTER_MEMBER_TYPE; else if (!COMPLETE_TYPE_P (type)) { if (!at_eof) cxx_incomplete_type_error (NULL_TREE, type); ix = TK_CLASS_TYPE; - break; } else if (!TYPE_BINFO (type) || !BINFO_N_BASE_BINFOS (TYPE_BINFO (type))) - { - ix = TK_CLASS_TYPE; - break; - } + ix = TK_CLASS_TYPE; else { tree binfo = TYPE_BINFO (type); @@ -1327,49 +1269,13 @@ get_pseudo_ti_index (tree type) && (*base_accesses)[0] == access_public_node && !BINFO_VIRTUAL_P (base_binfo) && integer_zerop (BINFO_OFFSET (base_binfo))) - { - /* single non-virtual public. */ - ix = TK_SI_CLASS_TYPE; - break; - } + /* single non-virtual public. */ + ix = TK_SI_CLASS_TYPE; else - { - tinfo_s *ti; - tree array_domain, base_array; - - ix = TK_FIXED + num_bases; - if (vec_safe_length (tinfo_descs) <= ix) - { - /* too short, extend. */ - unsigned len = vec_safe_length (tinfo_descs); - - vec_safe_grow (tinfo_descs, ix + 1); - while (tinfo_descs->iterate (len++, &ti)) - ti->type = ti->vtable = ti->name = NULL_TREE; - } - else if ((*tinfo_descs)[ix].type) - /* already created. */ - break; - - /* Create the array of __base_class_type_info entries. */ - array_domain = build_index_type (size_int (num_bases - 1)); - base_array = build_array_type ((*tinfo_descs)[TK_BASE_TYPE].type, - array_domain); - - push_abi_namespace (); - create_pseudo_type_info - (ix, "__vmi_class_type_info", - build_decl (input_location, - FIELD_DECL, NULL_TREE, integer_type_node), - build_decl (input_location, - FIELD_DECL, NULL_TREE, integer_type_node), - build_decl (input_location, - FIELD_DECL, NULL_TREE, base_array), - NULL); - pop_abi_namespace (); - break; - } + ix = TK_VMI_CLASS_TYPES + num_bases - 1; } + break; + default: ix = TK_BUILTIN_TYPE; break; @@ -1377,107 +1283,202 @@ get_pseudo_ti_index (tree type) return ix; } -/* Make sure the required builtin types exist for generating the type_info - variable definitions. */ +/* Return pointer to tinfo descriptor. Possibly creating the tinfo + descriptor in the first place. */ -static void -create_tinfo_types (void) +static tinfo_s * +get_tinfo_desc (unsigned ix) { - tinfo_s *ti; + unsigned len = tinfo_descs->length (); - gcc_assert (!tinfo_descs); + if (len <= ix) + { + /* too short, extend. */ + len = ix + 1 - len; + vec_safe_reserve (tinfo_descs, len); + tinfo_s elt; + elt.type = elt.vtable = elt.name = NULL_TREE; + while (len--) + tinfo_descs->quick_push (elt); + } - vec_safe_grow (tinfo_descs, TK_FIXED); + tinfo_s *res = &(*tinfo_descs)[ix]; - push_abi_namespace (); + if (res->type) + return res; - /* Create the internal type_info structure. This is used as a base for - the other structures. */ - { - tree field, fields; - - field = build_decl (BUILTINS_LOCATION, - FIELD_DECL, NULL_TREE, const_ptr_type_node); - fields = field; - - field = build_decl (BUILTINS_LOCATION, - FIELD_DECL, NULL_TREE, const_string_type_node); - DECL_CHAIN (field) = fields; - fields = field; - - ti = &(*tinfo_descs)[TK_TYPE_INFO_TYPE]; - ti->type = make_class_type (RECORD_TYPE); - ti->vtable = NULL_TREE; - ti->name = NULL_TREE; - finish_builtin_struct (ti->type, "__type_info_pseudo", - fields, NULL_TREE); - } + /* Ok, we have to create it. This layout must be consistent with + that defined in the runtime support. We explicitly manage the + vtable member, and name it for real type as used in the runtime. + The RECORD type has a different name, to avoid collisions. We + have to delay generating the VAR_DECL of the vtable until the end + of the translation, when we'll have seen the library definition, + if there was one. */ + + /* Fields to add, chained in reverse order. */ + tree fields = NULL_TREE; + + if (ix >= TK_DERIVED_TYPES) + { + /* First field is the pseudo type_info base class. */ + tree fld_base = build_decl (BUILTINS_LOCATION, FIELD_DECL, NULL_TREE, + get_tinfo_desc (TK_TYPE_INFO_TYPE)->type); + + DECL_CHAIN (fld_base) = fields; + fields = fld_base; + } + + switch (ix) + { + case TK_TYPE_INFO_TYPE: + { + tree fld_ptr = build_decl (BUILTINS_LOCATION, FIELD_DECL, + NULL_TREE, const_ptr_type_node); + fields = fld_ptr; + + tree fld_str = build_decl (BUILTINS_LOCATION, FIELD_DECL, + NULL_TREE, const_string_type_node); + DECL_CHAIN (fld_str) = fields; + fields = fld_str; + break; + } - /* Fundamental type_info */ - create_pseudo_type_info (TK_BUILTIN_TYPE, "__fundamental_type_info", NULL); + case TK_BASE_TYPE: + { + /* Base class internal helper. Pointer to base type, offset to + base, flags. */ + tree fld_ptr = build_decl (BUILTINS_LOCATION, FIELD_DECL, + NULL_TREE, type_info_ptr_type); + DECL_CHAIN (fld_ptr) = fields; + fields = fld_ptr; + + tree fld_flag = build_decl (BUILTINS_LOCATION, FIELD_DECL, + NULL_TREE, LONGPTR_T); + DECL_CHAIN (fld_flag) = fields; + fields = fld_flag; + break; + } - /* Array, function and enum type_info. No additional fields. */ - create_pseudo_type_info (TK_ARRAY_TYPE, "__array_type_info", NULL); - create_pseudo_type_info (TK_FUNCTION_TYPE, "__function_type_info", NULL); - create_pseudo_type_info (TK_ENUMERAL_TYPE, "__enum_type_info", NULL); + case TK_BUILTIN_TYPE: + /* Fundamental type_info */ + break; - /* Class type_info. No additional fields. */ - create_pseudo_type_info (TK_CLASS_TYPE, "__class_type_info", NULL); + case TK_ARRAY_TYPE: + break; - /* Single public non-virtual base class. Add pointer to base class. - This is really a descendant of __class_type_info. */ - create_pseudo_type_info (TK_SI_CLASS_TYPE, "__si_class_type_info", - build_decl (BUILTINS_LOCATION, - FIELD_DECL, NULL_TREE, type_info_ptr_type), - NULL); + case TK_FUNCTION_TYPE: + break; - /* Base class internal helper. Pointer to base type, offset to base, - flags. */ - { - tree field, fields; + case TK_ENUMERAL_TYPE: + break; + + case TK_POINTER_TYPE: + case TK_POINTER_MEMBER_TYPE: + { + /* Pointer type_info. Adds two fields, qualification mask and + pointer to the pointed to type. This is really a + descendant of __pbase_type_info. */ + tree fld_mask = build_decl (BUILTINS_LOCATION, FIELD_DECL, + NULL_TREE, integer_type_node); + DECL_CHAIN (fld_mask) = fields; + fields = fld_mask; + + tree fld_ptr = build_decl (BUILTINS_LOCATION, FIELD_DECL, + NULL_TREE, type_info_ptr_type); + DECL_CHAIN (fld_ptr) = fields; + fields = fld_ptr; + + if (ix == TK_POINTER_MEMBER_TYPE) + { + /* Add a pointer to the class too. */ + tree fld_cls = build_decl (BUILTINS_LOCATION, FIELD_DECL, + NULL_TREE, type_info_ptr_type); + DECL_CHAIN (fld_cls) = fields; + fields = fld_cls; + } + break; + } + + case TK_CLASS_TYPE: + /* Class type_info. No additional fields. */ + break; + + case TK_SI_CLASS_TYPE: + { + /* Single public non-virtual base class. Add pointer to base + class. This is really a descendant of + __class_type_info. */ + tree fld_ptr = build_decl (BUILTINS_LOCATION, FIELD_DECL, + NULL_TREE, type_info_ptr_type); + DECL_CHAIN (fld_ptr) = fields; + fields = fld_ptr; + break; + } - field = build_decl (BUILTINS_LOCATION, - FIELD_DECL, NULL_TREE, type_info_ptr_type); - fields = field; + default: /* Multiple inheritance. */ + { + unsigned num_bases = ix - TK_VMI_CLASS_TYPES + 1; + + tree fld_flg = build_decl (BUILTINS_LOCATION, FIELD_DECL, + NULL_TREE, integer_type_node); + DECL_CHAIN (fld_flg) = fields; + fields = fld_flg; + + tree fld_cnt = build_decl (BUILTINS_LOCATION, FIELD_DECL, + NULL_TREE, integer_type_node); + DECL_CHAIN (fld_cnt) = fields; + fields = fld_cnt; + + /* Create the array of __base_class_type_info entries. */ + tree domain = build_index_type (size_int (num_bases - 1)); + tree array = build_array_type (get_tinfo_desc (TK_BASE_TYPE)->type, + domain); + tree fld_ary = build_decl (BUILTINS_LOCATION, FIELD_DECL, + NULL_TREE, array); + DECL_CHAIN (fld_ary) = fields; + fields = fld_ary; + break; + } + } - field = build_decl (BUILTINS_LOCATION, - FIELD_DECL, NULL_TREE, LONGPTR_T); - DECL_CHAIN (field) = fields; - fields = field; + push_abi_namespace (); - ti = &(*tinfo_descs)[TK_BASE_TYPE]; + /* Generate the pseudo type name. */ + const char *real_name = tinfo_names[ix < TK_VMI_CLASS_TYPES + ? ix : unsigned (TK_VMI_CLASS_TYPES)]; + size_t name_len = strlen (real_name); + char *pseudo_name = (char *) alloca (name_len + 30); + memcpy (pseudo_name, real_name, name_len); + /* Those >= TK_VMI_CLASS_TYPES need a discriminator, may as well + apply it to all. See get_peudo_tinfo_index where we make use of + this. */ + sprintf (pseudo_name + name_len, "_pseudo_%d", ix); - ti->type = make_class_type (RECORD_TYPE); - ti->vtable = NULL_TREE; - ti->name = NULL_TREE; - finish_builtin_struct (ti->type, "__base_class_type_info_pseudo", - fields, NULL_TREE); - } + /* Create the pseudo type. */ + tree pseudo_type = make_class_type (RECORD_TYPE); + /* Pass the fields chained in reverse. */ + finish_builtin_struct (pseudo_type, pseudo_name, fields, NULL_TREE); + CLASSTYPE_AS_BASE (pseudo_type) = pseudo_type; - /* Pointer type_info. Adds two fields, qualification mask - and pointer to the pointed to type. This is really a descendant of - __pbase_type_info. */ - create_pseudo_type_info (TK_POINTER_TYPE, "__pointer_type_info", - build_decl (BUILTINS_LOCATION, - FIELD_DECL, NULL_TREE, integer_type_node), - build_decl (BUILTINS_LOCATION, - FIELD_DECL, NULL_TREE, type_info_ptr_type), - NULL); - - /* Pointer to member data type_info. Add qualifications flags, - pointer to the member's type info and pointer to the class. - This is really a descendant of __pbase_type_info. */ - create_pseudo_type_info (TK_POINTER_MEMBER_TYPE, - "__pointer_to_member_type_info", - build_decl (BUILTINS_LOCATION, - FIELD_DECL, NULL_TREE, integer_type_node), - build_decl (BUILTINS_LOCATION, - FIELD_DECL, NULL_TREE, type_info_ptr_type), - build_decl (BUILTINS_LOCATION, - FIELD_DECL, NULL_TREE, type_info_ptr_type), - NULL); + res->type = cp_build_qualified_type (pseudo_type, TYPE_QUAL_CONST); + res->name = get_identifier (real_name); + + /* Pretend this is public so determine_visibility doesn't give vtables + internal linkage. */ + TREE_PUBLIC (TYPE_MAIN_DECL (res->type)) = 1; pop_abi_namespace (); + return res; +} + +/* We lazily create the type info types. */ + +static void +create_tinfo_types (void) +{ + gcc_assert (!tinfo_descs); + + vec_alloc (tinfo_descs, TK_MAX + 20); } /* Helper for emit_support_tinfos. Emits the type_info descriptor of @@ -1545,18 +1546,23 @@ emit_support_tinfos (void) 0 }; int ix; - tree bltn_type, dtor; - push_abi_namespace (); - bltn_type = xref_tag (class_type, - get_identifier ("__fundamental_type_info"), - /*tag_scope=*/ts_current, false); - pop_abi_namespace (); + /* Look for a defined class. */ + tree bltn_type = lookup_qualified_name + (abi_node, get_identifier ("__fundamental_type_info"), true, false, false); + if (TREE_CODE (bltn_type) != TYPE_DECL) + return; + + bltn_type = TREE_TYPE (bltn_type); if (!COMPLETE_TYPE_P (bltn_type)) return; - dtor = CLASSTYPE_DESTRUCTORS (bltn_type); + tree dtor = CLASSTYPE_DESTRUCTORS (bltn_type); if (!dtor || DECL_EXTERNAL (dtor)) return; + + /* All these are really builtins. So set the location. */ + location_t saved_loc = input_location; + input_location = BUILTINS_LOCATION; doing_runtime = 1; for (ix = 0; fundamentals[ix]; ix++) emit_support_tinfo_1 (*fundamentals[ix]); @@ -1568,6 +1574,7 @@ emit_support_tinfos (void) } for (tree t = registered_builtin_types; t; t = TREE_CHAIN (t)) emit_support_tinfo_1 (TREE_VALUE (t)); + input_location = saved_loc; } /* Finish a type info decl. DECL_PTR is a pointer to an unemitted diff --git a/gcc/cp/search.c b/gcc/cp/search.c index d8ad40a98a7..00f895c5d7d 100644 --- a/gcc/cp/search.c +++ b/gcc/cp/search.c @@ -1187,7 +1187,7 @@ lookup_field_r (tree binfo, void *data) done: /* Don't look for constructors or destructors in base classes. */ - if (IDENTIFIER_CTOR_OR_DTOR_P (lfi->name)) + if (IDENTIFIER_CDTOR_P (lfi->name)) return dfs_skip_bases; return NULL_TREE; } @@ -1352,7 +1352,7 @@ lookup_member (tree xbasetype, tree name, int protect, bool want_type, if (rval && is_overloaded_fn (rval)) rval = build_baselink (rval_binfo, basetype_path, rval, - (IDENTIFIER_TYPENAME_P (name) + (IDENTIFIER_CONV_OP_P (name) ? TREE_TYPE (name): NULL_TREE)); return rval; } @@ -1595,7 +1595,7 @@ lookup_fnfields_idx_nolazy (tree type, tree name) fn = CLASSTYPE_DESTRUCTORS (type); return fn ? CLASSTYPE_DESTRUCTOR_SLOT : -1; } - if (IDENTIFIER_TYPENAME_P (name)) + if (IDENTIFIER_CONV_OP_P (name)) return lookup_conversion_operator (type, TREE_TYPE (name)); /* Skip the conversion operators. */ diff --git a/gcc/cp/semantics.c b/gcc/cp/semantics.c index 5b5ec5483d1..9589b47dd64 100644 --- a/gcc/cp/semantics.c +++ b/gcc/cp/semantics.c @@ -733,7 +733,10 @@ finish_if_stmt_cond (tree cond, tree if_stmt) if (IF_STMT_CONSTEXPR_P (if_stmt) && require_potential_rvalue_constant_expression (cond) && !value_dependent_expression_p (cond)) - cond = cxx_constant_value (cond, NULL_TREE); + { + cond = instantiate_non_dependent_expr (cond); + cond = cxx_constant_value (cond, NULL_TREE); + } finish_cond (&IF_COND (if_stmt), cond); add_stmt (if_stmt); THEN_CLAUSE (if_stmt) = push_stmt_list (); @@ -3493,7 +3496,7 @@ finish_id_expression (tree id_expression, && (!TYPE_P (scope) || (!dependent_type_p (scope) && !(identifier_p (id_expression) - && IDENTIFIER_TYPENAME_P (id_expression) + && IDENTIFIER_CONV_OP_P (id_expression) && dependent_type_p (TREE_TYPE (id_expression)))))) { /* If the qualifying type is non-dependent (and the name @@ -4586,7 +4589,7 @@ handle_omp_array_sections_1 (tree c, tree t, vec<tree> &types, } if (!VAR_P (t) && TREE_CODE (t) != PARM_DECL) { - if (processing_template_decl) + if (processing_template_decl && TREE_CODE (t) != OVERLOAD) return NULL_TREE; if (DECL_P (t)) error_at (OMP_CLAUSE_LOCATION (c), @@ -6106,7 +6109,7 @@ finish_omp_clauses (tree clauses, enum c_omp_region_type ort) if (!VAR_P (t) && TREE_CODE (t) != PARM_DECL && (!field_ok || TREE_CODE (t) != FIELD_DECL)) { - if (processing_template_decl) + if (processing_template_decl && TREE_CODE (t) != OVERLOAD) break; if (DECL_P (t)) error ("%qD is not a variable in clause %qs", t, @@ -6178,7 +6181,7 @@ finish_omp_clauses (tree clauses, enum c_omp_region_type ort) && ((ort & C_ORT_OMP_DECLARE_SIMD) != C_ORT_OMP || TREE_CODE (t) != FIELD_DECL)) { - if (processing_template_decl) + if (processing_template_decl && TREE_CODE (t) != OVERLOAD) break; if (DECL_P (t)) error ("%qD is not a variable in clause %<firstprivate%>", t); @@ -6221,7 +6224,7 @@ finish_omp_clauses (tree clauses, enum c_omp_region_type ort) && ((ort & C_ORT_OMP_DECLARE_SIMD) != C_ORT_OMP || TREE_CODE (t) != FIELD_DECL)) { - if (processing_template_decl) + if (processing_template_decl && TREE_CODE (t) != OVERLOAD) break; if (DECL_P (t)) error ("%qD is not a variable in clause %<lastprivate%>", t); @@ -6584,7 +6587,7 @@ finish_omp_clauses (tree clauses, enum c_omp_region_type ort) } if (!VAR_P (t) && TREE_CODE (t) != PARM_DECL) { - if (processing_template_decl) + if (processing_template_decl && TREE_CODE (t) != OVERLOAD) break; if (DECL_P (t)) error ("%qD is not a variable in %<aligned%> clause", t); @@ -6666,7 +6669,7 @@ finish_omp_clauses (tree clauses, enum c_omp_region_type ort) remove = true; else if (!VAR_P (t) && TREE_CODE (t) != PARM_DECL) { - if (processing_template_decl) + if (processing_template_decl && TREE_CODE (t) != OVERLOAD) break; if (DECL_P (t)) error ("%qD is not a variable in %<depend%> clause", t); @@ -6797,7 +6800,7 @@ finish_omp_clauses (tree clauses, enum c_omp_region_type ort) } if (!VAR_P (t) && TREE_CODE (t) != PARM_DECL) { - if (processing_template_decl) + if (processing_template_decl && TREE_CODE (t) != OVERLOAD) break; if (OMP_CLAUSE_CODE (c) == OMP_CLAUSE_MAP && (OMP_CLAUSE_MAP_KIND (c) == GOMP_MAP_POINTER diff --git a/gcc/cp/typeck.c b/gcc/cp/typeck.c index 34d475b98f0..1c15f29eb3d 100644 --- a/gcc/cp/typeck.c +++ b/gcc/cp/typeck.c @@ -37,6 +37,7 @@ along with GCC; see the file COPYING3. If not see #include "c-family/c-ubsan.h" #include "params.h" #include "gcc-rich-location.h" +#include "asan.h" static tree cp_build_addr_expr_strict (tree, tsubst_flags_t); static tree cp_build_function_call (tree, tree, tsubst_flags_t); @@ -5253,10 +5254,9 @@ cp_build_binary_op (location_t location, if (build_type == NULL_TREE) build_type = result_type; - if ((flag_sanitize & (SANITIZE_SHIFT | SANITIZE_DIVIDE - | SANITIZE_FLOAT_DIVIDE)) + if (sanitize_flags_p ((SANITIZE_SHIFT + | SANITIZE_DIVIDE | SANITIZE_FLOAT_DIVIDE)) && !processing_template_decl - && do_ubsan_in_current_function () && (doing_div_or_mod || doing_shift)) { /* OP0 and/or OP1 might have side-effects. */ @@ -5264,8 +5264,8 @@ cp_build_binary_op (location_t location, op1 = cp_save_expr (op1); op0 = fold_non_dependent_expr (op0); op1 = fold_non_dependent_expr (op1); - if (doing_div_or_mod && (flag_sanitize & (SANITIZE_DIVIDE - | SANITIZE_FLOAT_DIVIDE))) + if (doing_div_or_mod + && sanitize_flags_p (SANITIZE_DIVIDE | SANITIZE_FLOAT_DIVIDE)) { /* For diagnostics we want to use the promoted types without shorten_binary_op. So convert the arguments to the @@ -5278,7 +5278,7 @@ cp_build_binary_op (location_t location, cop1 = cp_convert (orig_type, op1, complain); instrument_expr = ubsan_instrument_division (location, cop0, cop1); } - else if (doing_shift && (flag_sanitize & SANITIZE_SHIFT)) + else if (doing_shift && sanitize_flags_p (SANITIZE_SHIFT)) instrument_expr = ubsan_instrument_shift (location, code, op0, op1); } @@ -5652,7 +5652,7 @@ cp_build_addr_expr_1 (tree arg, bool strict_lvalue, tsubst_flags_t complain) arg = mark_lvalue_use (arg); argtype = lvalue_type (arg); - gcc_assert (!identifier_p (arg) || !IDENTIFIER_OPNAME_P (arg)); + gcc_assert (!(identifier_p (arg) && IDENTIFIER_ANY_OP_P (arg))); if (TREE_CODE (arg) == COMPONENT_REF && type_unknown_p (arg) && !really_overloaded_fn (arg)) @@ -6823,7 +6823,7 @@ build_static_cast_1 (tree type, tree expr, bool c_cast_p, NULL, complain); expr = build_address (expr); - if (flag_sanitize & SANITIZE_VPTR) + if (sanitize_flags_p (SANITIZE_VPTR)) { tree ubsan_check = cp_ubsan_maybe_instrument_downcast (input_location, type, @@ -6967,7 +6967,7 @@ build_static_cast_1 (tree type, tree expr, bool c_cast_p, expr = build_base_path (MINUS_EXPR, expr, base, /*nonnull=*/false, complain); - if (flag_sanitize & SANITIZE_VPTR) + if (sanitize_flags_p (SANITIZE_VPTR)) { tree ubsan_check = cp_ubsan_maybe_instrument_downcast (input_location, type, @@ -8590,9 +8590,10 @@ convert_for_assignment (tree type, tree rhs, if (rhstype == unknown_type_node) { tree r = instantiate_type (type, rhs, tf_warning_or_error); - /* -fpermissive might allow this. */ + /* -fpermissive might allow this; recurse. */ if (!seen_error ()) - return r; + return convert_for_assignment (type, r, errtype, fndecl, + parmnum, complain, flags); } else if (fndecl) error ("cannot convert %qH to %qI for argument %qP to %qD", diff --git a/gcc/cp/typeck2.c b/gcc/cp/typeck2.c index 4623d6d9197..430ba30536a 100644 --- a/gcc/cp/typeck2.c +++ b/gcc/cp/typeck2.c @@ -821,8 +821,7 @@ store_init_value (tree decl, tree init, vec<tree, va_gc>** cleanups, int flags) || (DECL_IN_AGGR_P (decl) && !DECL_VAR_DECLARED_INLINE_P (decl))) { /* Diagnose a non-constant initializer for constexpr. */ - if (processing_template_decl - && !require_potential_constant_expression (value)) + if (!require_potential_constant_expression (value)) value = error_mark_node; else value = cxx_constant_value (value, decl); diff --git a/gcc/diagnostic-show-locus.c b/gcc/diagnostic-show-locus.c index f410a324b4b..8bf4d9e2c85 100644 --- a/gcc/diagnostic-show-locus.c +++ b/gcc/diagnostic-show-locus.c @@ -2793,6 +2793,53 @@ test_fixit_replace_containing_newline (const line_table_case &case_) pp_formatted_text (dc.printer)); } +/* Fix-it hint, attempting to delete a newline. + This will fail, as we currently only support fix-it hints that + affect one line at a time. */ + +static void +test_fixit_deletion_affecting_newline (const line_table_case &case_) +{ + /* Create a tempfile and write some text to it. + ..........................0000000001111. + ..........................1234567890123. */ + const char *old_content = ("foo = bar (\n" + " );\n"); + + temp_source_file tmp (SELFTEST_LOCATION, ".c", old_content); + line_table_test ltt (case_); + const line_map_ordinary *ord_map = linemap_check_ordinary + (linemap_add (line_table, LC_ENTER, false, tmp.get_filename (), 0)); + linemap_line_start (line_table, 1, 100); + + /* Attempt to delete the " (\n...)". */ + location_t start + = linemap_position_for_line_and_column (line_table, ord_map, 1, 10); + location_t caret + = linemap_position_for_line_and_column (line_table, ord_map, 1, 11); + location_t finish + = linemap_position_for_line_and_column (line_table, ord_map, 2, 7); + location_t loc = make_location (caret, start, finish); + rich_location richloc (line_table, loc); + richloc. add_fixit_remove (); + + /* Fix-it hints that affect more than one line are not yet supported, so + the fix-it should not be displayed. */ + ASSERT_TRUE (richloc.seen_impossible_fixit_p ()); + + if (finish > LINE_MAP_MAX_LOCATION_WITH_COLS) + return; + + test_diagnostic_context dc; + diagnostic_show_locus (&dc, &richloc, DK_ERROR); + ASSERT_STREQ ("\n" + " foo = bar (\n" + " ~^\n" + " );\n" + " ~ \n", + pp_formatted_text (dc.printer)); +} + /* Run all of the selftests within this file. */ void @@ -2813,6 +2860,7 @@ diagnostic_show_locus_c_tests () for_each_line_table_case (test_fixit_insert_containing_newline); for_each_line_table_case (test_fixit_insert_containing_newline_2); for_each_line_table_case (test_fixit_replace_containing_newline); + for_each_line_table_case (test_fixit_deletion_affecting_newline); } } // namespace selftest diff --git a/gcc/doc/contrib.texi b/gcc/doc/contrib.texi index 4f5ffc1710f..60b71026779 100644 --- a/gcc/doc/contrib.texi +++ b/gcc/doc/contrib.texi @@ -761,6 +761,11 @@ clean-ups and porting work, and maintaining the IRIX, Solaris 2, and Tru64 UNIX ports. @item +Steven Pemberton for his contribution of @file{enquire} which allowed GCC to +determine various properties of the floating point unit and generate +@file{float.h} in older versions of GCC. + +@item Hartmut Penner for work on the s390 port. @item diff --git a/gcc/doc/cppdiropts.texi b/gcc/doc/cppdiropts.texi index 1f72649937c..eee2b5cede8 100644 --- a/gcc/doc/cppdiropts.texi +++ b/gcc/doc/cppdiropts.texi @@ -22,8 +22,9 @@ for header files during preprocessing. @ifset cppmanual @xref{Search Path}. @end ifset -If @var{dir} begins with @samp{=}, then the @samp{=} is replaced -by the sysroot prefix; see @option{--sysroot} and @option{-isysroot}. +If @var{dir} begins with @samp{=} or @code{$SYSROOT}, then the @samp{=} +or @code{$SYSROOT} is replaced by the sysroot prefix; see +@option{--sysroot} and @option{-isysroot}. Directories specified with @option{-iquote} apply only to the quote form of the directive, @code{@w{#include "@var{file}"}}. diff --git a/gcc/doc/cppopts.texi b/gcc/doc/cppopts.texi index 0497712bee9..16bf22a6f38 100644 --- a/gcc/doc/cppopts.texi +++ b/gcc/doc/cppopts.texi @@ -125,6 +125,8 @@ preprocessed output. When used with the driver options @option{-MD} or @option{-MMD}, @option{-MF} overrides the default dependency output file. +If @var{file} is @file{-}, then the dependencies are written to @file{stdout}. + @item -MG @opindex MG In conjunction with an option such as @option{-M} requesting diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index ef1ae73954c..43f9ecf2466 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -2911,6 +2911,18 @@ This has a similar effect as the @option{-fno-toplevel-reorder} option, but only applies to the marked symbols. +@item no_sanitize ("@var{sanitize_option}") +@cindex @code{no_sanitize} function attribute +The @code{no_sanitize} attribute on functions is used +to inform the compiler that it should not do sanitization of all options +mentioned in @var{sanitize_option}. A list of values acceptable by +@option{-fsanitize} option can be provided. + +@smallexample +void __attribute__ ((no_sanitize ("alignment", "object-size"))) +f () @{ /* @r{Do something.} */; @} +@end smallexample + @item no_sanitize_address @itemx no_address_safety_analysis @cindex @code{no_sanitize_address} function attribute @@ -15990,6 +16002,20 @@ vector float vec_expte (vector float); vector float vec_floor (vector float); +vector float vec_float (vector signed int); +vector float vec_float (vector unsigned int); + +vector float vec_float2 (vector signed long long, vector signed long long); +vector float vec_float2 (vector unsigned long long, vector signed long long); + +vector float vec_floate (vector double); +vector float vec_floate (vector signed long long); +vector float vec_floate (vector unsigned long long); + +vector float vec_floato (vector double); +vector float vec_floato (vector signed long long); +vector float vec_floato (vector unsigned long long); + vector float vec_ld (int, const vector float *); vector float vec_ld (int, const float *); vector bool int vec_ld (int, const vector bool int *); diff --git a/gcc/doc/fragments.texi b/gcc/doc/fragments.texi index d68be7ad0ed..6aef5537f43 100644 --- a/gcc/doc/fragments.texi +++ b/gcc/doc/fragments.texi @@ -160,10 +160,12 @@ A reuse rule is comprised of two parts connected by equality sign. The left part is the option set used to build multilib and the right part is the option set that will reuse this multilib. Both parts should only use options specified in @code{MULTILIB_OPTIONS} and the equality signs found in options -name should be replaced with periods. The order of options in the left part -matters and should be same with those specified in @code{MULTILIB_REQUIRED} or -aligned with the order in @code{MULTILIB_OPTIONS}. There is no such limitation -for options in the right part as we don't build multilib from them. +name should be replaced with periods. An explicit period in the rule can be +escaped by preceding it with a backslash. The order of options in the left +part matters and should be same with those specified in +@code{MULTILIB_REQUIRED} or aligned with the order in @code{MULTILIB_OPTIONS}. +There is no such limitation for options in the right part as we don't build +multilib from them. @code{MULTILIB_REUSE} is different from @code{MULTILIB_MATCHES} in that it sets up relations between two option sets rather than two options. Here is an diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 8e17bcc1d42..7c9e2f25d44 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -2619,8 +2619,9 @@ bootstrap the compiler with profile feedback, use @code{make profiledbootstrap}. When @samp{make profiledbootstrap} is run, it will first build a @code{stage1} compiler. This compiler is used to build a @code{stageprofile} compiler instrumented to collect execution counts of instruction and branch -probabilities. Then runtime libraries are compiled with profile collected. -Finally a @code{stagefeedback} compiler is built using the information collected. +probabilities. Training run is done by building @code{stagetrain} +compiler. Finally a @code{stagefeedback} compiler is built +using the information collected. Unlike standard bootstrap, several additional restrictions apply. The compiler used to build @code{stage1} needs to support a 64-bit integral type. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 653bc076759..e4ca1b4b4fc 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -215,7 +215,8 @@ in the following sections. -Wabi=@var{n} -Wabi-tag -Wconversion-null -Wctor-dtor-privacy @gol -Wdelete-non-virtual-dtor -Wliteral-suffix -Wmultiple-inheritance @gol -Wnamespaces -Wnarrowing @gol --Wnoexcept -Wnoexcept-type -Wnon-virtual-dtor -Wreorder -Wregister @gol +-Wnoexcept -Wnoexcept-type -Wclass-memaccess @gol +-Wnon-virtual-dtor -Wreorder -Wregister @gol -Weffc++ -Wstrict-null-sentinel -Wtemplates @gol -Wno-non-template-friend -Wold-style-cast @gol -Woverloaded-virtual -Wno-pmf-conversions @gol @@ -2907,7 +2908,7 @@ to a function that does not have a non-throwing exception specification (i.e. @code{throw()} or @code{noexcept}) but is known by the compiler to never throw an exception. -@item -Wnoexcept @r{(C++ and Objective-C++ only)} +@item -Wnoexcept-type @r{(C++ and Objective-C++ only)} @opindex Wnoexcept-type @opindex Wno-noexcept-type Warn if the C++1z feature making @code{noexcept} part of a function @@ -2920,6 +2921,23 @@ void g() noexcept; void h() @{ f(g); @} // in C++14 calls f<void(*)()>, in C++1z calls f<void(*)()noexcept> @end smallexample +@item -Wclass-memaccess @r{(C++ and Objective-C++ only)} +@opindex Wclass-memaccess +Warn when the destination of a call to a raw memory function such as +@code{memset} or @code{memcpy} is an object of class type writing into which +might bypass the class non-trivial or deleted constructor or copy assignment, +violate const-correctness or encapsulation, or corrupt the virtual table. +Modifying the representation of such objects may violate invariants maintained +by member functions of the class. For example, the call to @code{memset} +below is undefined becase it modifies a non-trivial class object and is, +therefore, diagnosed. The safe way to either initialize or clear the storage +of objects of such types is by using the appropriate constructor or assignment +operator, if one is available. +@smallexample +std::string str = "abc"; +memset (&str, 0, 3); +@end smallexample +The @option{-Wclass-memaccess} option is enabled by @option{-Wall}. @item -Wnon-virtual-dtor @r{(C++ and Objective-C++ only)} @opindex Wnon-virtual-dtor @@ -14059,17 +14077,20 @@ processors implementing the target architecture. @opindex mtune Specify the name of the target processor for which GCC should tune the performance of the code. Permissible values for this option are: -@samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57}, -@samp{cortex-a72}, @samp{cortex-a73}, @samp{exynos-m1}, +@samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55}, +@samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75}, +@samp{exynos-m1}, @samp{falkor}, @samp{qdf24xx}, @samp{xgene1}, @samp{vulcan}, @samp{thunderx}, @samp{thunderxt88}, @samp{thunderxt88p1}, @samp{thunderxt81}, @samp{thunderxt83}, @samp{thunderx2t99}, @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}, @samp{cortex-a73.cortex-a35}, -@samp{cortex-a73.cortex-a53}, @samp{native}. +@samp{cortex-a73.cortex-a53}, @samp{cortex-a75.cortex-a55}, +@samp{native}. The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}, -@samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53} -specify that GCC should tune for a big.LITTLE system. +@samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53}, +@samp{cortex-a75.cortex-a55} specify that GCC should tune for a +big.LITTLE system. Additionally on native AArch64 GNU/Linux systems the value @samp{native} tunes performance to the host system. This option has no effect @@ -15140,48 +15161,291 @@ the default for all standard configurations. Generate code for a processor running in big-endian mode; the default is to compile code for a little-endian processor. -@item -march=@var{name} +@item -march=@var{name@r{[}+extension@dots{}@r{]}} @opindex march This specifies the name of the target ARM architecture. GCC uses this name to determine what kind of instructions it can emit when generating assembly code. This option can be used in conjunction with or instead -of the @option{-mcpu=} option. Permissible names are: @samp{armv2}, -@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t}, -@samp{armv5}, @samp{armv5e}, @samp{armv5t}, @samp{armv5te}, -@samp{armv6}, @samp{armv6-m}, @samp{armv6j}, @samp{armv6k}, -@samp{armv6kz}, @samp{armv6s-m}, -@samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, -@samp{armv7}, @samp{armv7-a}, @samp{armv7-m}, @samp{armv7-r}, @samp{armv7e-m}, -@samp{armv7ve}, @samp{armv8-a}, @samp{armv8-a+crc}, @samp{armv8.1-a}, -@samp{armv8.1-a+crc}, @samp{armv8-m.base}, @samp{armv8-m.main}, -@samp{armv8-m.main+dsp}, @samp{iwmmxt}, @samp{iwmmxt2}. +of the @option{-mcpu=} option. + +Permissible names are: +@samp{armv4t}, +@samp{armv5t}, @samp{armv5te}, +@samp{armv6}, @samp{armv6j}, @samp{armv6k}, @samp{armv6kz}, @samp{armv6t2}, +@samp{armv6z}, @samp{armv6zk}, +@samp{armv7}, @samp{armv7-a}, @samp{armv7ve}, +@samp{armv8-a}, @samp{armv8.1-a}, @samp{armv8.2-a}, +@samp{armv7-r}, +@samp{armv6-m}, @samp{armv6s-m}, +@samp{armv7-m}, @samp{armv7e-m}, +@samp{armv8-m.base}, @samp{armv8-m.main}, +@samp{iwmmxt} and @samp{iwmmxt2}. + +Additionally, the following architectures, which lack support for the +Thumb exection state, are recognized but support is deprecated: +@samp{armv2}, @samp{armv2a}, @samp{armv3}, @samp{armv3m}, +@samp{armv4}, @samp{armv5} and @samp{armv5e}. + +Many of the architectures support extensions. These can be added by +appending @samp{+@var{extension}} to the architecture name. Extension +options are processed in order and capabilities accumulate. An extension +will also enable any necessary base extensions +upon which it depends. For example, the @samp{+crypto} extension +will always enable the @samp{+simd} extension. The exception to the +additive construction is for extensions that are prefixed with +@samp{+no@dots{}}: these extensions disable the specified option and +any other extensions that may depend on the presence of that +extension. -Architecture revisions older than @samp{armv4t} are deprecated. +For example, @samp{-march=armv7-a+simd+nofp+vfpv4} is equivalent to +writing @samp{-march=armv7-a+vfpv4} since the @samp{+simd} option is +entirely disabled by the @samp{+nofp} option that follows it. -@option{-march=armv6s-m} is the @samp{armv6-m} architecture with support for -the (now mandatory) SVC instruction. +Most extension names are generically named, but have an effect that is +dependent upon the architecture to which it is applied. For example, +the @samp{+simd} option can be applied to both @samp{armv7-a} and +@samp{armv8-a} architectures, but will enable the original ARMv7 +Advanced SIMD (Neon) extensions for @samp{armv7-a} and the ARMv8-a +variant for @samp{armv8-a}. -@option{-march=armv6zk} is an alias for @samp{armv6kz}, existing for backwards -compatibility. +The table below lists the supported extensions for each architecture. +Architectures not mentioned do not support any extensions. -@option{-march=armv7ve} is the @samp{armv7-a} architecture with virtualization -extensions. +@table @samp +@item armv5e +@itemx armv5te +@itemx armv6 +@itemx armv6j +@itemx armv6k +@itemx armv6kz +@itemx armv6t2 +@itemx armv6z +@itemx armv6zk +@table @samp +@item +fp +The VFPv2 floating-point instructions. The extension @samp{+vfpv2} can be +used as an alias for this extension. -@option{-march=armv8-a+crc} enables code generation for the ARMv8-A -architecture together with the optional CRC32 extensions. +@item +nofp +Disable the floating-point instructions. +@end table -@option{-march=armv8.1-a} enables compiler support for the ARMv8.1-A -architecture. This also enables the features provided by -@option{-march=armv8-a+crc}. +@item armv7 +The common subset of the ARMv7-A, ARMv7-R and ARMv7-M architectures. +@table @samp +@item +fp +The VFPv3 floating-point instructions, with 16 double-precision +registers. The extension @samp{+vfpv3-d16} can be used as an alias +for this extension. Note that floating-point is not supported by the +base ARMv7-M architecture, but is compatible with both the ARMv7-A and +ARMv7-R architectures. + +@item +nofp +Disable the floating-point instructions. +@end table -@option{-march=armv8.2-a} enables compiler support for the ARMv8.2-A -architecture. This also enables the features provided by -@option{-march=armv8.1-a}. +@item armv7-a +@table @samp +@item +fp +The VFPv3 floating-point instructions, with 16 double-precision +registers. The extension @samp{+vfpv3-d16} can be used as an alias +for this extension. + +@item +simd +The Advanced SIMD (Neon) v1 and the VFPv3 floating-point instructions. +The extensions @samp{+neon} and @samp{+neon-vfpv3} can be used as aliases +for this extension. + +@item +vfpv3 +The VFPv3 floating-point instructions, with 32 double-precision +registers. + +@item +vfpv3-d16-fp16 +The VFPv3 floating-point instructions, with 16 double-precision +registers and the half-precision floating-point conversion operations. + +@item +vfpv3-fp16 +The VFPv3 floating-point instructions, with 32 double-precision +registers and the half-precision floating-point conversion operations. + +@item +vfpv4-d16 +The VFPv4 floating-point instructions, with 16 double-precision +registers. + +@item +vfpv4 +The VFPv4 floating-point instructions, with 32 double-precision +registers. + +@item +neon-fp16 +The Advanced SIMD (Neon) v1 and the VFPv3 floating-point instructions, with +the half-precision floating-point conversion operations. + +@item +neon-vfpv4 +The Advanced SIMD (Neon) v2 and the VFPv4 floating-point instructions. + +@item +nosimd +Disable the Advanced SIMD instructions (does not disable floating point). -@option{-march=armv8.2-a+fp16} enables compiler support for the -ARMv8.2-A architecture with the optional FP16 instructions extension. -This also enables the features provided by @option{-march=armv8.1-a} -and implies @option{-mfp16-format=ieee}. +@item +nofp +Disable the floating-point and Advanced SIMD instructions. +@end table + +@item armv7ve +The extended version of the ARMv7-A architecture with support for +virtualization. +@table @samp +@item +fp +The VFPv4 floating-point instructions, with 16 double-precision registers. +The extension @samp{+vfpv4-d16} can be used as an alias for this extension. + +@item +simd +The Advanced SIMD (Neon) v2 and the VFPv4 floating-point instructions. The +extension @samp{+neon-vfpv4} can be used as an alias for this extension. + +@item +vfpv3-d16 +The VFPv3 floating-point instructions, with 16 double-precision +registers. + +@item +vfpv3 +The VFPv3 floating-point instructions, with 32 double-precision +registers. + +@item +vfpv3-d16-fp16 +The VFPv3 floating-point instructions, with 16 double-precision +registers and the half-precision floating-point conversion operations. + +@item +vfpv3-fp16 +The VFPv3 floating-point instructions, with 32 double-precision +registers and the half-precision floating-point conversion operations. + +@item +vfpv4-d16 +The VFPv4 floating-point instructions, with 16 double-precision +registers. + +@item +vfpv4 +The VFPv4 floating-point instructions, with 32 double-precision +registers. + +@item +neon +The Advanced SIMD (Neon) v1 and the VFPv3 floating-point instructions. +The extension @samp{+neon-vfpv3} can be used as an alias for this extension. + +@item +neon-fp16 +The Advanced SIMD (Neon) v1 and the VFPv3 floating-point instructions, with +the half-precision floating-point conversion operations. + +@item +nosimd +Disable the Advanced SIMD instructions (does not disable floating point). + +@item +nofp +Disable the floating-point and Advanced SIMD instructions. +@end table + +@item armv8-a +@table @samp +@item +crc +The Cyclic Redundancy Check (CRC) instructions. +@item +simd +The ARMv8 Advanced SIMD and floating-point instructions. +@item +crypto +The cryptographic instructions. +@item +nocrypto +Disable the cryptographic isntructions. +@item +nofp +Disable the floating-point, Advanced SIMD and cryptographic instructions. +@end table + +@item armv8.1-a +@table @samp +@item +simd +The ARMv8.1 Advanced SIMD and floating-point instructions. + +@item +crypto +The cryptographic instructions. This also enables the Advanced SIMD and +floating-point instructions. + +@item +nocrypto +Disable the cryptographic isntructions. + +@item +nofp +Disable the floating-point, Advanced SIMD and cryptographic instructions. +@end table + +@item armv8.2-a +@table @samp +@item +fp16 +The half-precision floating-point data processing instructions. +This also enables the Advanced SIMD and floating-point instructions. + +@item +simd +The ARMv8.1 Advanced SIMD and floating-point instructions. + +@item +crypto +The cryptographic instructions. This also enables the Advanced SIMD and +floating-point instructions. + +@item +nocrypto +Disable the cryptographic extension. + +@item +nofp +Disable the floating-point, Advanced SIMD and cryptographic instructions. +@end table + +@item armv7-r +@table @samp +@item +fp.sp +The single-precision VFPv3 floating-point instructions. The extension +@samp{+vfpv3xd} can be used as an alias for this extension. + +@item +fp +The VFPv3 floating-point instructions with 16 double-precision registers. +The extension +vfpv3-d16 can be used as an alias for this extension. + +@item +nofp +Disable the floating-point extension. + +@item +idiv +The ARM-state integer division instructions. + +@item +noidiv +Disable the ARM-state integer division extension. +@end table + +@item armv7e-m +@table @samp +@item +fp +The single-precision VFPv4 floating-point instructions. + +@item +fpv5 +The single-precision FPv5 floating-point instructions. + +@item +fp.dp +The single- and double-precision FPv5 floating-point instructions. + +@item +nofp +Disable the floating-point extensions. +@end table + +@item armv8-m.main +@table @samp +@item +dsp +The DSP instructions. + +@item +nodsp +Disable the DSP extension. + +@item +fp +The single-precision floating-point instructions. + +@item +fp.dp +The single- and double-precision floating-point instructions. + +@item +nofp +Disable the floating-point extension. + +@end table + +@end table @option{-march=native} causes the compiler to auto-detect the architecture of the build computer. At present, this feature is only supported on @@ -15228,8 +15492,6 @@ Permissible names are: @samp{arm2}, @samp{arm250}, @samp{cortex-m0.small-multiply}, @samp{cortex-m0plus.small-multiply}, @samp{exynos-m1}, -@samp{falkor}, -@samp{qdf24xx}, @samp{marvell-pj4}, @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}, @samp{fa526}, @samp{fa626}, @@ -15249,12 +15511,15 @@ processors, balancing between optimizations that benefit some CPUs in the range, and avoiding performance pitfalls of other CPUs. The effects of this option may change in future GCC versions as CPU models come and go. +@option{-mtune} permits the same extension options as @option{-mcpu}, but +the extension options do not affect the tuning of the generated code. + @option{-mtune=native} causes the compiler to auto-detect the CPU of the build computer. At present, this feature is only supported on GNU/Linux, and not all architectures are recognized. If the auto-detect is unsuccessful the option has no effect. -@item -mcpu=@var{name} +@item -mcpu=@var{name@r{[}+extension@dots{}@r{]}} @opindex mcpu This specifies the name of the target ARM processor. GCC uses this name to derive the name of the target ARM architecture (as if specified @@ -15263,9 +15528,62 @@ performance (as if specified by @option{-mtune}). Where this option is used in conjunction with @option{-march} or @option{-mtune}, those options take precedence over the appropriate part of this option. +Many of the supported CPUs implement optional architectural +extensions. Where this is so the architectural extensions are +normally enabled by default. If implementations that lack the +extension exist, then the extension syntax can be used to disable +those extensions that have been omitted. For floating-point and +Advanced SIMD (Neon) instructions, the settings of the options +@option{-mfloat-abi} and @option{-mfpu} must also be considered: +floating-point and Advanced SIMD instructions will only be used if +@option{-mfloat-abi} is not set to @samp{soft}; and any setting of +@option{-mfpu} other than @samp{auto} will override the available +floating-point and SIMD extension instructions. + +For example, @samp{cortex-a9} can be found in three major +configurations: integer only, with just a floating-point unit or with +floating-point and Advanced SIMD. The default is to enable all the +instructions, but the extensions @samp{+nosimd} and @samp{+nofp} can +be used to disable just the SIMD or both the SIMD and floating-point +instructions respectively. + Permissible names for this option are the same as those for @option{-mtune}. +The following extension options are common to the listed CPUs: + +@table @samp +@item +nofp +Disables the floating-point instructions on @samp{arm9e}, +@samp{arm946e-s}, @samp{arm966e-s}, @samp{arm968e-s}, @samp{arm10e}, +@samp{arm1020e}, @samp{arm1022e}, @samp{arm926ej-s}, +@samp{arm1026ej-s}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8}, +@samp{cortex-m4}, @samp{cortex-m7} and @samp{cortex-m33}. +Disables the floating-point and SIMD instructions on +@samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7}, +@samp{cortex-a8}, @samp{cortex-a9}, @samp{cortex-a12}, +@samp{cortex-a15}, @samp{cortex-a17}, @samp{cortex-a15.cortex-a7}, +@samp{cortex-a17.cortex-a7}, @samp{cortex-a32}, @samp{cortex-a35} +and @samp{cortex-a53}. + +@item +nofp.dp +Disables the double-precision component of the floating-point instructions +on @samp{cortex-r5} and @samp{cortex-m7}. + +@item +nosimd +Disables the SIMD (but not floating-point) instructions on +@samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7} +and @samp{cortex-a9}. +@end table + +Additionally the @samp{generic-armv7-a} pseudo target defaults to +VFPv3 with 16 double-precision registers. It supports the following +extension options: @samp{vfpv3-d16}, @samp{vfpv3}, +@samp{vfpv3-d16-fp16}, @samp{vfpv3-fp16}, @samp{vfpv4-d16}, +@samp{vfpv4}, @samp{neon}, @samp{neon-vfpv3}, @samp{neon-fp16}, +@samp{neon-vfpv4}. The meanings are the same as for the extensions to +@option{-march=armv7-a}. + @option{-mcpu=generic-@var{arch}} is also permissible, and is equivalent to @option{-march=@var{arch} -mtune=generic-@var{arch}}. See @option{-mtune} for more information. @@ -15278,7 +15596,8 @@ is unsuccessful the option has no effect. @item -mfpu=@var{name} @opindex mfpu This specifies what floating-point hardware (or hardware emulation) is -available on the target. Permissible names are: @samp{vfpv2}, @samp{vfpv3}, +available on the target. Permissible names are: @samp{auto}, @samp{vfpv2}, +@samp{vfpv3}, @samp{vfpv3-fp16}, @samp{vfpv3-d16}, @samp{vfpv3-d16-fp16}, @samp{vfpv3xd}, @samp{vfpv3xd-fp16}, @samp{neon-vfpv3}, @samp{neon-fp16}, @samp{vfpv4}, @samp{vfpv4-d16}, @samp{fpv4-sp-d16}, @samp{neon-vfpv4}, @@ -15287,11 +15606,12 @@ available on the target. Permissible names are: @samp{vfpv2}, @samp{vfpv3}, Note that @samp{neon} is an alias for @samp{neon-vfpv3} and @samp{vfp} is an alias for @samp{vfpv2}. -If @option{-msoft-float} is specified this specifies the format of -floating-point values. +The setting @samp{auto} is the default and is special. It causes the +compiler to select the floating-point and Advanced SIMD instructions +based on the settings of @option{-mcpu} and @option{-march}. If the selected floating-point hardware includes the NEON extension -(e.g. @option{-mfpu}=@samp{neon}), note that floating-point +(e.g. @option{-mfpu=neon}), note that floating-point operations are not generated by GCC's auto-vectorization pass unless @option{-funsafe-math-optimizations} is also specified. This is because NEON hardware does not fully implement the IEEE 754 standard for diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index e5f0da6a49b..7f5c2cf58c4 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -2097,11 +2097,10 @@ Target supports section anchors. Target defaults to short enums. @item stack_size -Target has limited stack size. The stack size limit can be obtained using -@code{[dg-effective-target-value stack_size]}. For example: -@smallexample -/* @{ dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" @{ target @{ stack_size @} @} @} */ -@end smallexample +@anchor{stack_size_et} +Target has limited stack size. The stack size limit can be obtained using the +STACK_SIZE macro defined by @ref{stack_size_ao,,@code{dg-add-options} feature +@code{stack_size}}. @item static Target supports @option{-static}. @@ -2282,6 +2281,12 @@ compliance mode. @code{mips16} function attributes. Only MIPS targets support this feature, and only then in certain modes. +@item stack_size +@anchor{stack_size_ao} +Add the flags needed to define macro STACK_SIZE and set it to the stack size +limit associated with the @ref{stack_size_et,,@code{stack_size} effective +target}. + @item tls Add the target-specific flags needed to use thread-local storage. @end table diff --git a/gcc/dumpfile.c b/gcc/dumpfile.c index c746d0b24ff..6c55f05b677 100644 --- a/gcc/dumpfile.c +++ b/gcc/dumpfile.c @@ -187,9 +187,16 @@ dump_register (const char *suffix, const char *swtch, const char *glob, m_extra_dump_files = XRESIZEVEC (struct dump_file_info, m_extra_dump_files, m_extra_dump_files_alloced); + + /* Construct a new object in the space allocated above. */ + new (m_extra_dump_files + count) dump_file_info (); + } + else + { + /* Zero out the already constructed object. */ + m_extra_dump_files[count] = dump_file_info (); } - memset (&m_extra_dump_files[count], 0, sizeof (struct dump_file_info)); m_extra_dump_files[count].suffix = suffix; m_extra_dump_files[count].swtch = swtch; m_extra_dump_files[count].glob = glob; diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c index 92444e3cd46..c277d27e8e8 100644 --- a/gcc/dwarf2out.c +++ b/gcc/dwarf2out.c @@ -25289,14 +25289,6 @@ gen_decl_die (tree decl, tree origin, struct vlr_context *ctx, break; case FUNCTION_DECL: - /* Don't output any DIEs to represent mere function declarations, - unless they are class members or explicit block externs. */ - if (DECL_INITIAL (decl_or_origin) == NULL_TREE - && DECL_FILE_SCOPE_P (decl_or_origin) - && (current_function_decl == NULL_TREE - || DECL_ARTIFICIAL (decl_or_origin))) - break; - #if 0 /* FIXME */ /* This doesn't work because the C frontend sets DECL_ABSTRACT_ORIGIN @@ -25501,11 +25493,6 @@ dwarf2out_early_global_decl (tree decl) tree save_fndecl = current_function_decl; if (TREE_CODE (decl) == FUNCTION_DECL) { - /* No cfun means the symbol has no body, so there's nothing - to emit. */ - if (!DECL_STRUCT_FUNCTION (decl)) - goto early_decl_exit; - /* For nested functions, make sure we have DIEs for the parents first so that all nested DIEs are generated at the proper scope in the first shot. */ @@ -25522,7 +25509,6 @@ dwarf2out_early_global_decl (tree decl) if (TREE_CODE (decl) == FUNCTION_DECL) current_function_decl = save_fndecl; } - early_decl_exit: symtab->global_info_ready = save; } @@ -25761,42 +25747,6 @@ dwarf2out_decl (tree decl) return; case FUNCTION_DECL: - /* What we would really like to do here is to filter out all mere - file-scope declarations of file-scope functions which are never - referenced later within this translation unit (and keep all of ones - that *are* referenced later on) but we aren't clairvoyant, so we have - no idea which functions will be referenced in the future (i.e. later - on within the current translation unit). So here we just ignore all - file-scope function declarations which are not also definitions. If - and when the debugger needs to know something about these functions, - it will have to hunt around and find the DWARF information associated - with the definition of the function. - - We can't just check DECL_EXTERNAL to find out which FUNCTION_DECL - nodes represent definitions and which ones represent mere - declarations. We have to check DECL_INITIAL instead. That's because - the C front-end supports some weird semantics for "extern inline" - function definitions. These can get inlined within the current - translation unit (and thus, we need to generate Dwarf info for their - abstract instances so that the Dwarf info for the concrete inlined - instances can have something to refer to) but the compiler never - generates any out-of-lines instances of such things (despite the fact - that they *are* definitions). - - The important point is that the C front-end marks these "extern - inline" functions as DECL_EXTERNAL, but we need to generate DWARF for - them anyway. Note that the C++ front-end also plays some similar games - for inline function definitions appearing within include files which - also contain `#pragma interface' pragmas. - - If we are called from dwarf2out_abstract_function output a DIE - anyway. We can end up here this way with early inlining and LTO - where the inlined function is output in a different LTRANS unit - or not at all. */ - if (DECL_INITIAL (decl) == NULL_TREE - && ! DECL_ABSTRACT_P (decl)) - return; - /* If we're a nested function, initially use a parent of NULL; if we're a plain function, this will be fixed up in decls_for_scope. If we're a method, it will be ignored, since we already have a DIE. */ diff --git a/gcc/emit-rtl.h b/gcc/emit-rtl.h index da60a2d808c..b455b4c00fb 100644 --- a/gcc/emit-rtl.h +++ b/gcc/emit-rtl.h @@ -267,7 +267,7 @@ struct GTY(()) rtl_data { /* Nonzero if function being compiled doesn't contain any calls (ignoring the prologue and epilogue). This is set prior to - local register allocation and is valid for the remaining + register allocation in IRA and is valid for the remaining compiler passes. */ bool is_leaf; diff --git a/gcc/flag-types.h b/gcc/flag-types.h index 27a38efdc8e..5faade53975 100644 --- a/gcc/flag-types.h +++ b/gcc/flag-types.h @@ -246,8 +246,8 @@ enum sanitize_code { | SANITIZE_NONNULL_ATTRIBUTE | SANITIZE_RETURNS_NONNULL_ATTRIBUTE | SANITIZE_OBJECT_SIZE | SANITIZE_VPTR, - SANITIZE_NONDEFAULT = SANITIZE_FLOAT_DIVIDE | SANITIZE_FLOAT_CAST - | SANITIZE_BOUNDS_STRICT + SANITIZE_UNDEFINED_NONDEFAULT = SANITIZE_FLOAT_DIVIDE | SANITIZE_FLOAT_CAST + | SANITIZE_BOUNDS_STRICT }; /* flag_vtable_verify initialization levels. */ diff --git a/gcc/fold-const.c b/gcc/fold-const.c index f3975c7391f..379a30ea285 100644 --- a/gcc/fold-const.c +++ b/gcc/fold-const.c @@ -853,9 +853,9 @@ split_tree (location_t loc, tree in, tree type, enum tree_code code, && code == PLUS_EXPR) { /* -X - 1 is folded to ~X, undo that here. Do _not_ do this - when IN is constant. */ - *minus_litp = build_one_cst (TREE_TYPE (in)); - var = negate_expr (TREE_OPERAND (in, 0)); + when IN is constant. Convert to TYPE before negating. */ + *minus_litp = build_one_cst (type); + var = negate_expr (fold_convert_loc (loc, type, TREE_OPERAND (in, 0))); } else var = in; @@ -880,6 +880,13 @@ split_tree (location_t loc, tree in, tree type, enum tree_code code, } } + if (*litp + && TREE_OVERFLOW_P (*litp)) + *litp = drop_tree_overflow (*litp); + if (*minus_litp + && TREE_OVERFLOW_P (*minus_litp)) + *minus_litp = drop_tree_overflow (*minus_litp); + return var; } @@ -4745,6 +4752,40 @@ make_range (tree exp, int *pin_p, tree *plow, tree *phigh, *pin_p = in_p, *plow = low, *phigh = high; return exp; } + +/* Returns TRUE if [LOW, HIGH] range check can be optimized to + a bitwise check i.e. when + LOW == 0xXX...X00...0 + HIGH == 0xXX...X11...1 + Return corresponding mask in MASK and stem in VALUE. */ + +static bool +maskable_range_p (const_tree low, const_tree high, tree type, tree *mask, + tree *value) +{ + if (TREE_CODE (low) != INTEGER_CST + || TREE_CODE (high) != INTEGER_CST) + return false; + + unsigned prec = TYPE_PRECISION (type); + wide_int lo = wi::to_wide (low, prec); + wide_int hi = wi::to_wide (high, prec); + + wide_int end_mask = lo ^ hi; + if ((end_mask & (end_mask + 1)) != 0 + || (lo & end_mask) != 0) + return false; + + wide_int stem_mask = ~end_mask; + wide_int stem = lo & stem_mask; + if (stem != (hi & stem_mask)) + return false; + + *mask = wide_int_to_tree (type, stem_mask); + *value = wide_int_to_tree (type, stem); + + return true; +} /* Given a range, LOW, HIGH, and IN_P, an expression, EXP, and a result type, TYPE, return an expression to test if EXP is in (or out of, depending @@ -4754,7 +4795,7 @@ tree build_range_check (location_t loc, tree type, tree exp, int in_p, tree low, tree high) { - tree etype = TREE_TYPE (exp), value; + tree etype = TREE_TYPE (exp), mask, value; /* Disable this optimization for function pointer expressions on targets that require function pointer canonicalization. */ @@ -4787,6 +4828,13 @@ build_range_check (location_t loc, tree type, tree exp, int in_p, return fold_build2_loc (loc, EQ_EXPR, type, exp, fold_convert_loc (loc, etype, low)); + if (TREE_CODE (exp) == BIT_AND_EXPR + && maskable_range_p (low, high, etype, &mask, &value)) + return fold_build2_loc (loc, EQ_EXPR, type, + fold_build2_loc (loc, BIT_AND_EXPR, etype, + exp, mask), + value); + if (integer_zerop (low)) { if (! TYPE_UNSIGNED (etype)) @@ -6241,11 +6289,6 @@ extract_muldiv_1 (tree t, tree c, enum tree_code code, tree wide_type, if (TYPE_UNSIGNED (ctype) && ctype != type) break; - /* If we were able to eliminate our operation from the first side, - apply our operation to the second side and reform the PLUS. */ - if (t1 != 0 && (TREE_CODE (t1) != code || code == MULT_EXPR)) - return fold_build2 (tcode, ctype, fold_convert (ctype, t1), op1); - /* The last case is if we are a multiply. In that case, we can apply the distributive law to commute the multiply and addition if the multiplication of the constants doesn't overflow @@ -8908,7 +8951,7 @@ fold_addr_of_array_ref_difference (location_t loc, tree type, tree op0 = fold_convert_loc (loc, type, TREE_OPERAND (aref0, 1)); tree op1 = fold_convert_loc (loc, type, TREE_OPERAND (aref1, 1)); tree esz = fold_convert_loc (loc, type, array_ref_element_size (aref0)); - tree diff = build2 (MINUS_EXPR, type, op0, op1); + tree diff = fold_build2_loc (loc, MINUS_EXPR, type, op0, op1); return fold_build2_loc (loc, PLUS_EXPR, type, base_offset, fold_build2_loc (loc, MULT_EXPR, type, @@ -9667,11 +9710,6 @@ fold_binary_loc (location_t loc, + (lit0 != 0) + (lit1 != 0) + (minus_lit0 != 0) + (minus_lit1 != 0)))) { - bool any_overflows = false; - if (lit0) any_overflows |= TREE_OVERFLOW (lit0); - if (lit1) any_overflows |= TREE_OVERFLOW (lit1); - if (minus_lit0) any_overflows |= TREE_OVERFLOW (minus_lit0); - if (minus_lit1) any_overflows |= TREE_OVERFLOW (minus_lit1); var0 = associate_trees (loc, var0, var1, code, atype); con0 = associate_trees (loc, con0, con1, code, atype); lit0 = associate_trees (loc, lit0, lit1, code, atype); @@ -9702,9 +9740,8 @@ fold_binary_loc (location_t loc, } /* Don't introduce overflows through reassociation. */ - if (!any_overflows - && ((lit0 && TREE_OVERFLOW_P (lit0)) - || (minus_lit0 && TREE_OVERFLOW_P (minus_lit0)))) + if ((lit0 && TREE_OVERFLOW_P (lit0)) + || (minus_lit0 && TREE_OVERFLOW_P (minus_lit0))) return NULL_TREE; if (minus_lit0) diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index ec28113820e..88fd0b327d7 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,15 @@ +2017-06-24 Jerry DeLisle <jvdelisle@gcc.gnu.org> + + PR fortran/81160 + * arith.c (wprecision_int_real): Set return value before + mpz_clear and then return after it. + +2017-06-15 Janus Weil <janus@gcc.gnu.org> + + PR fortran/80983 + * trans-expr.c (gfc_conv_procedure_call): Deallocate the result of + scalar allocatable procedure-pointer components. + 2017-06-10 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/80988 diff --git a/gcc/fortran/arith.c b/gcc/fortran/arith.c index 8fa305c6aee..c3be14df522 100644 --- a/gcc/fortran/arith.c +++ b/gcc/fortran/arith.c @@ -2001,13 +2001,14 @@ wprecision_real_real (mpfr_t r, int from_kind, int to_kind) static bool wprecision_int_real (mpz_t n, mpfr_t r) { + bool ret; mpz_t i; mpz_init (i); mpfr_get_z (i, r, GFC_RND_MODE); mpz_sub (i, i, n); - return mpz_cmp_si (i, 0) != 0; + ret = mpz_cmp_si (i, 0) != 0; mpz_clear (i); - + return ret; } /* Convert integers to integers. */ diff --git a/gcc/fortran/trans-expr.c b/gcc/fortran/trans-expr.c index 6af287e648c..acd0428eae6 100644 --- a/gcc/fortran/trans-expr.c +++ b/gcc/fortran/trans-expr.c @@ -6132,7 +6132,8 @@ gfc_conv_procedure_call (gfc_se * se, gfc_symbol * sym, after use. This necessitates the creation of a temporary to hold the result to prevent duplicate calls. */ if (!byref && sym->ts.type != BT_CHARACTER - && sym->attr.allocatable && !sym->attr.dimension && !comp) + && ((sym->attr.allocatable && !sym->attr.dimension && !comp) + || (comp && comp->attr.allocatable && !comp->attr.dimension))) { tmp = gfc_create_var (TREE_TYPE (se->expr), NULL); gfc_add_modify (&se->pre, tmp, se->expr); diff --git a/gcc/gcc.c b/gcc/gcc.c index 4724276a318..6d724b25423 100644 --- a/gcc/gcc.c +++ b/gcc/gcc.c @@ -1259,9 +1259,9 @@ struct compiler const char *cpp_spec; /* If non-NULL, substitute this spec for `%C', rather than the usual cpp_spec. */ - const int combinable; /* If nonzero, compiler can deal with + int combinable; /* If nonzero, compiler can deal with multiple source files at once (IMA). */ - const int needs_preprocessing; /* If nonzero, source files need to + int needs_preprocessing; /* If nonzero, source files need to be run through a preprocessor. */ }; @@ -9398,7 +9398,8 @@ sanitize_spec_function (int argc, const char **argv) if (strcmp (argv[0], "thread") == 0) return (flag_sanitize & SANITIZE_THREAD) ? "" : NULL; if (strcmp (argv[0], "undefined") == 0) - return ((flag_sanitize & (SANITIZE_UNDEFINED | SANITIZE_NONDEFAULT)) + return ((flag_sanitize + & (SANITIZE_UNDEFINED | SANITIZE_UNDEFINED_NONDEFAULT)) && !flag_sanitize_undefined_trap_on_error) ? "" : NULL; if (strcmp (argv[0], "leak") == 0) return ((flag_sanitize diff --git a/gcc/genattrtab.c b/gcc/genattrtab.c index 3629b5fa486..51dfe77401e 100644 --- a/gcc/genattrtab.c +++ b/gcc/genattrtab.c @@ -4703,8 +4703,8 @@ gen_insn_reserv (md_rtx_info *info) struct insn_reserv *decl = oballoc (struct insn_reserv); rtx def = info->def; - struct attr_desc attr; - memset (&attr, 0, sizeof (attr)); + struct attr_desc attr = { }; + attr.name = DEF_ATTR_STRING (XSTR (def, 0)); attr.loc = info->loc; diff --git a/gcc/generic-match-head.c b/gcc/generic-match-head.c index 0c0d1824933..4504401fa8a 100644 --- a/gcc/generic-match-head.c +++ b/gcc/generic-match-head.c @@ -33,6 +33,7 @@ along with GCC; see the file COPYING3. If not see #include "builtins.h" #include "case-cfn-macros.h" #include "gimplify.h" +#include "optabs-tree.h" /* Routine to determine if the types T1 and T2 are effectively diff --git a/gcc/genmultilib b/gcc/genmultilib index 2501f547a93..c8bcdf3935d 100644 --- a/gcc/genmultilib +++ b/gcc/genmultilib @@ -466,8 +466,8 @@ echo "static const char *const multilib_reuse_raw[] = {" for rrule in ${multilib_reuse}; do # The left part of the rule are the options we used to build multilib. # The right part of the rule are the options that can reuse this multilib. - combo=`echo ${rrule} | sed -e 's/=.*$//' -e 's/\./=/g'` - copts=`echo ${rrule} | sed -e 's/^.*=//' -e 's/\./=/g'` + combo=`echo ${rrule} | sed -e 's/=.*$//' -e 's/\([^\\]\)\./\1=/g' -e 's/\\\././g'` + copts=`echo ${rrule} | sed -e 's/^.*=//' -e 's/\([^\\]\)\./\1=/g' -e 's/\\\././g'` # The variable ${combinations} are the option combinations we will build # multilib from. If the combination in the left part of reuse rule isn't # in this variable, it means no multilib will be built for current reuse diff --git a/gcc/gimple-fold.c b/gcc/gimple-fold.c index d12f9d053c9..a00c2c88713 100644 --- a/gcc/gimple-fold.c +++ b/gcc/gimple-fold.c @@ -56,6 +56,7 @@ along with GCC; see the file COPYING3. If not see #include "ipa-chkp.h" #include "tree-cfg.h" #include "fold-const-call.h" +#include "asan.h" /* Return true when DECL can be referenced from current unit. FROM_DECL (if non-null) specify constructor of variable DECL was taken from. @@ -1076,6 +1077,83 @@ done: return true; } +/* Transform a call to built-in bcmp(a, b, len) at *GSI into one + to built-in memcmp (a, b, len). */ + +static bool +gimple_fold_builtin_bcmp (gimple_stmt_iterator *gsi) +{ + tree fn = builtin_decl_implicit (BUILT_IN_MEMCMP); + + if (!fn) + return false; + + /* Transform bcmp (a, b, len) into memcmp (a, b, len). */ + + gimple *stmt = gsi_stmt (*gsi); + tree a = gimple_call_arg (stmt, 0); + tree b = gimple_call_arg (stmt, 1); + tree len = gimple_call_arg (stmt, 2); + + gimple *repl = gimple_build_call (fn, 3, a, b, len); + replace_call_with_call_and_fold (gsi, repl); + + return true; +} + +/* Transform a call to built-in bcopy (src, dest, len) at *GSI into one + to built-in memmove (dest, src, len). */ + +static bool +gimple_fold_builtin_bcopy (gimple_stmt_iterator *gsi) +{ + tree fn = builtin_decl_implicit (BUILT_IN_MEMMOVE); + + if (!fn) + return false; + + /* bcopy has been removed from POSIX in Issue 7 but Issue 6 specifies + it's quivalent to memmove (not memcpy). Transform bcopy (src, dest, + len) into memmove (dest, src, len). */ + + gimple *stmt = gsi_stmt (*gsi); + tree src = gimple_call_arg (stmt, 0); + tree dest = gimple_call_arg (stmt, 1); + tree len = gimple_call_arg (stmt, 2); + + gimple *repl = gimple_build_call (fn, 3, dest, src, len); + gimple_call_set_fntype (as_a <gcall *> (stmt), TREE_TYPE (fn)); + replace_call_with_call_and_fold (gsi, repl); + + return true; +} + +/* Transform a call to built-in bzero (dest, len) at *GSI into one + to built-in memset (dest, 0, len). */ + +static bool +gimple_fold_builtin_bzero (gimple_stmt_iterator *gsi) +{ + tree fn = builtin_decl_implicit (BUILT_IN_MEMSET); + + if (!fn) + return false; + + /* Transform bzero (dest, len) into memset (dest, 0, len). */ + + gimple *stmt = gsi_stmt (*gsi); + tree dest = gimple_call_arg (stmt, 0); + tree len = gimple_call_arg (stmt, 1); + + gimple_seq seq = NULL; + gimple *repl = gimple_build_call (fn, 3, dest, integer_zero_node, len); + gimple_seq_add_stmt_without_update (&seq, repl); + gsi_replace_with_seq_vops (gsi, seq); + fold_stmt (gsi); + + return true; +} + /* Fold function call to builtin memset or bzero at *GSI setting the memory of size LEN to VAL. Return whether a simplification was made. */ @@ -3287,16 +3365,17 @@ gimple_fold_builtin (gimple_stmt_iterator *gsi) enum built_in_function fcode = DECL_FUNCTION_CODE (callee); switch (fcode) { + case BUILT_IN_BCMP: + return gimple_fold_builtin_bcmp (gsi); + case BUILT_IN_BCOPY: + return gimple_fold_builtin_bcopy (gsi); case BUILT_IN_BZERO: - return gimple_fold_builtin_memset (gsi, integer_zero_node, - gimple_call_arg (stmt, 1)); + return gimple_fold_builtin_bzero (gsi); + case BUILT_IN_MEMSET: return gimple_fold_builtin_memset (gsi, gimple_call_arg (stmt, 1), gimple_call_arg (stmt, 2)); - case BUILT_IN_BCOPY: - return gimple_fold_builtin_memory_op (gsi, gimple_call_arg (stmt, 1), - gimple_call_arg (stmt, 0), 3); case BUILT_IN_MEMCPY: return gimple_fold_builtin_memory_op (gsi, gimple_call_arg (stmt, 0), gimple_call_arg (stmt, 1), 0); @@ -3479,7 +3558,7 @@ optimize_atomic_compare_exchange_p (gimple *stmt) if (gimple_call_num_args (stmt) != 6 || !flag_inline_atomics || !optimize - || (flag_sanitize & (SANITIZE_THREAD | SANITIZE_ADDRESS)) != 0 + || sanitize_flags_p (SANITIZE_THREAD | SANITIZE_ADDRESS) || !gimple_call_builtin_p (stmt, BUILT_IN_NORMAL) || !gimple_vdef (stmt) || !gimple_vuse (stmt)) diff --git a/gcc/gimple-low.c b/gcc/gimple-low.c index 619b9d7bfb1..4ea6c3532f3 100644 --- a/gcc/gimple-low.c +++ b/gcc/gimple-low.c @@ -30,6 +30,8 @@ along with GCC; see the file COPYING3. If not see #include "calls.h" #include "gimple-iterator.h" #include "gimple-low.h" +#include "predict.h" +#include "gimple-predict.h" /* The differences between High GIMPLE and Low GIMPLE are the following: diff --git a/gcc/gimple-match-head.c b/gcc/gimple-match-head.c index e7e9839a4b8..5f6aa273b96 100644 --- a/gcc/gimple-match-head.c +++ b/gcc/gimple-match-head.c @@ -39,6 +39,7 @@ along with GCC; see the file COPYING3. If not see #include "internal-fn.h" #include "case-cfn-macros.h" #include "gimplify.h" +#include "optabs-tree.h" /* Forward declarations of the private auto-generated matchers. diff --git a/gcc/gimple-predict.h b/gcc/gimple-predict.h index ba58e12e9e9..0e6c2e1ea01 100644 --- a/gcc/gimple-predict.h +++ b/gcc/gimple-predict.h @@ -80,4 +80,12 @@ gimple_build_predict (enum br_predictor predictor, enum prediction outcome) return p; } +/* Return true if GS is a GIMPLE_PREDICT statement. */ + +static inline bool +is_gimple_predict (const gimple *gs) +{ + return gimple_code (gs) == GIMPLE_PREDICT; +} + #endif /* GCC_GIMPLE_PREDICT_H */ diff --git a/gcc/gimple-pretty-print.c b/gcc/gimple-pretty-print.c index 5ff63a167a1..447921be036 100644 --- a/gcc/gimple-pretty-print.c +++ b/gcc/gimple-pretty-print.c @@ -80,17 +80,22 @@ debug_gimple_stmt (gimple *gs) by xstrdup_for_dump. */ static const char * -dump_probability (int value) +dump_probability (int frequency, profile_count &count) { float minimum = 0.01f; - gcc_assert (0 <= value && value <= REG_BR_PROB_BASE); - float fvalue = value * 100.0f / REG_BR_PROB_BASE; - if (fvalue < minimum && value > 0) + gcc_assert (0 <= frequency && frequency <= REG_BR_PROB_BASE); + float fvalue = frequency * 100.0f / REG_BR_PROB_BASE; + if (fvalue < minimum && frequency > 0) return "[0.01%]"; char *buf; - asprintf (&buf, "[%.2f%%]", fvalue); + if (count.initialized_p ()) + asprintf (&buf, "[%.2f%%] [count: %" PRId64 "]", fvalue, + count.to_gcov_type ()); + else + asprintf (&buf, "[%.2f%%] [count: INV]", fvalue); + const char *ret = xstrdup_for_dump (buf); free (buf); @@ -102,7 +107,7 @@ dump_probability (int value) static void dump_edge_probability (pretty_printer *buffer, edge e) { - pp_scalar (buffer, " %s", dump_probability (e->probability)); + pp_scalar (buffer, " %s", dump_probability (e->probability, e->count)); } /* Print GIMPLE statement G to FILE using SPC indentation spaces and @@ -1085,7 +1090,7 @@ dump_gimple_label (pretty_printer *buffer, glabel *gs, int spc, dump_generic_node (buffer, label, spc, flags, false); basic_block bb = gimple_bb (gs); if (bb && !(flags & TDF_GIMPLE)) - pp_scalar (buffer, " %s", dump_probability (bb->frequency)); + pp_scalar (buffer, " %s", dump_probability (bb->frequency, bb->count)); pp_colon (buffer); } if (flags & TDF_GIMPLE) @@ -2665,7 +2670,8 @@ dump_gimple_bb_header (FILE *outf, basic_block bb, int indent, fprintf (outf, "%*sbb_%d:\n", indent, "", bb->index); else fprintf (outf, "%*s<bb %d> %s:\n", - indent, "", bb->index, dump_probability (bb->frequency)); + indent, "", bb->index, dump_probability (bb->frequency, + bb->count)); } } } diff --git a/gcc/gimple-ssa-isolate-paths.c b/gcc/gimple-ssa-isolate-paths.c index 7babe092362..7ad39b4e09b 100644 --- a/gcc/gimple-ssa-isolate-paths.c +++ b/gcc/gimple-ssa-isolate-paths.c @@ -137,6 +137,15 @@ isolate_path (basic_block bb, basic_block duplicate, gimple_stmt_iterator si, si2; edge_iterator ei; edge e2; + bool impossible = true; + + for (si = gsi_start_bb (bb); gsi_stmt (si) != stmt; gsi_next (&si)) + if (stmt_can_terminate_bb_p (gsi_stmt (si))) + { + impossible = false; + break; + } + force_edge_cold (e, impossible); /* First duplicate BB if we have not done so already and remove all the duplicate's outgoing edges as duplicate is going to unconditionally @@ -145,10 +154,14 @@ isolate_path (basic_block bb, basic_block duplicate, if (!duplicate) { duplicate = duplicate_block (bb, NULL, NULL); + bb->frequency = 0; + bb->count = profile_count::zero (); if (!ret_zero) for (ei = ei_start (duplicate->succs); (e2 = ei_safe_edge (ei)); ) remove_edge (e2); } + bb->frequency += EDGE_FREQUENCY (e); + bb->count += e->count; /* Complete the isolation step by redirecting E to reach DUPLICATE. */ e2 = redirect_edge_and_branch (e, duplicate); diff --git a/gcc/gimplify.c b/gcc/gimplify.c index 653057fd543..641a8210dad 100644 --- a/gcc/gimplify.c +++ b/gcc/gimplify.c @@ -1428,6 +1428,20 @@ gimplify_bind_expr (tree *expr_p, gimple_seq *pre_p) return GS_ALL_DONE; } +/* Maybe add early return predict statement to PRE_P sequence. */ + +static void +maybe_add_early_return_predict_stmt (gimple_seq *pre_p) +{ + /* If we are not in a conditional context, add PREDICT statement. */ + if (gimple_conditional_context ()) + { + gimple *predict = gimple_build_predict (PRED_TREE_EARLY_RETURN, + NOT_TAKEN); + gimplify_seq_add_stmt (pre_p, predict); + } +} + /* Gimplify a RETURN_EXPR. If the expression to be returned is not a GIMPLE value, it is assigned to a new temporary and the statement is re-written to return the temporary. @@ -1458,6 +1472,7 @@ gimplify_return_expr (tree stmt, gimple_seq *pre_p) || TREE_CODE (ret_expr) == RESULT_DECL || ret_expr == error_mark_node) { + maybe_add_early_return_predict_stmt (pre_p); greturn *ret = gimple_build_return (ret_expr); gimple_set_no_warning (ret, TREE_NO_WARNING (stmt)); gimplify_seq_add_stmt (pre_p, ret); @@ -1525,6 +1540,7 @@ gimplify_return_expr (tree stmt, gimple_seq *pre_p) gimplify_and_add (TREE_OPERAND (stmt, 0), pre_p); + maybe_add_early_return_predict_stmt (pre_p); ret = gimple_build_return (result); gimple_set_no_warning (ret, TREE_NO_WARNING (stmt)); gimplify_seq_add_stmt (pre_p, ret); @@ -2279,7 +2295,8 @@ gimplify_switch_expr (tree *expr_p, gimple_seq *pre_p) /* Do not create live_switch_vars if SWITCH_BODY is not a BIND_EXPR. */ saved_live_switch_vars = gimplify_ctxp->live_switch_vars; - if (TREE_CODE (SWITCH_BODY (switch_expr)) == BIND_EXPR) + tree_code body_type = TREE_CODE (SWITCH_BODY (switch_expr)); + if (body_type == BIND_EXPR || body_type == STATEMENT_LIST) gimplify_ctxp->live_switch_vars = new hash_set<tree> (4); else gimplify_ctxp->live_switch_vars = NULL; @@ -2340,10 +2357,18 @@ gimplify_label_expr (tree *expr_p, gimple_seq *pre_p) gcc_assert (decl_function_context (LABEL_EXPR_LABEL (*expr_p)) == current_function_decl); - glabel *label_stmt = gimple_build_label (LABEL_EXPR_LABEL (*expr_p)); + tree label = LABEL_EXPR_LABEL (*expr_p); + glabel *label_stmt = gimple_build_label (label); gimple_set_location (label_stmt, EXPR_LOCATION (*expr_p)); gimplify_seq_add_stmt (pre_p, label_stmt); + if (lookup_attribute ("cold", DECL_ATTRIBUTES (label))) + gimple_seq_add_stmt (pre_p, gimple_build_predict (PRED_COLD_LABEL, + NOT_TAKEN)); + else if (lookup_attribute ("hot", DECL_ATTRIBUTES (label))) + gimple_seq_add_stmt (pre_p, gimple_build_predict (PRED_HOT_LABEL, + TAKEN)); + return GS_ALL_DONE; } @@ -6633,9 +6658,11 @@ omp_add_variable (struct gimplify_omp_ctx *ctx, tree decl, unsigned int flags) return; /* Never elide decls whose type has TREE_ADDRESSABLE set. This means - there are constructors involved somewhere. */ - if (TREE_ADDRESSABLE (TREE_TYPE (decl)) - || TYPE_NEEDS_CONSTRUCTING (TREE_TYPE (decl))) + there are constructors involved somewhere. Exception is a shared clause, + there is nothing privatized in that case. */ + if ((flags & GOVD_SHARED) == 0 + && (TREE_ADDRESSABLE (TREE_TYPE (decl)) + || TYPE_NEEDS_CONSTRUCTING (TREE_TYPE (decl)))) flags |= GOVD_SEEN; n = splay_tree_lookup (ctx->variables, (splay_tree_key)decl); @@ -12647,7 +12674,7 @@ gimplify_function_tree (tree fndecl) && !needs_to_live_in_memory (ret)) DECL_GIMPLE_REG_P (ret) = 1; - if (asan_sanitize_use_after_scope () && !asan_no_sanitize_address_p ()) + if (asan_sanitize_use_after_scope () && sanitize_flags_p (SANITIZE_ADDRESS)) asan_poisoned_variables = new hash_set<tree> (); bind = gimplify_body (fndecl, true); if (asan_poisoned_variables) @@ -12714,8 +12741,7 @@ gimplify_function_tree (tree fndecl) bind = new_bind; } - if ((flag_sanitize & SANITIZE_THREAD) != 0 - && !lookup_attribute ("no_sanitize_thread", DECL_ATTRIBUTES (fndecl))) + if (sanitize_flags_p (SANITIZE_THREAD)) { gcall *call = gimple_build_call_internal (IFN_TSAN_FUNC_EXIT, 0); gimple *tf = gimple_build_try (seq, call, GIMPLE_TRY_FINALLY); diff --git a/gcc/go/gofrontend/MERGE b/gcc/go/gofrontend/MERGE index 1bfac59adef..416a5876da8 100644 --- a/gcc/go/gofrontend/MERGE +++ b/gcc/go/gofrontend/MERGE @@ -1,4 +1,4 @@ -d4875b19266d5f726e0e32843b903075f5c50b4c +0a20181d00d43a423c55f4e772b759fba0619478 The first line of this file holds the git revision number of the last merge done from the gofrontend repository. diff --git a/gcc/go/gofrontend/expressions.cc b/gcc/go/gofrontend/expressions.cc index d6d27eea8d3..12505b23939 100644 --- a/gcc/go/gofrontend/expressions.cc +++ b/gcc/go/gofrontend/expressions.cc @@ -3410,11 +3410,13 @@ Type_conversion_expression::do_get_backend(Translate_context* context) Gogo* gogo = context->gogo(); Btype* btype = type->get_backend(gogo); - Bexpression* bexpr = this->expr_->get_backend(context); Location loc = this->location(); if (Type::are_identical(type, expr_type, false, NULL)) - return gogo->backend()->convert_expression(btype, bexpr, loc); + { + Bexpression* bexpr = this->expr_->get_backend(context); + return gogo->backend()->convert_expression(btype, bexpr, loc); + } else if (type->interface_type() != NULL || expr_type->interface_type() != NULL) { @@ -3483,6 +3485,7 @@ Type_conversion_expression::do_get_backend(Translate_context* context) else if (type->is_numeric_type()) { go_assert(Type::are_convertible(type, expr_type, NULL)); + Bexpression* bexpr = this->expr_->get_backend(context); return gogo->backend()->convert_expression(btype, bexpr, loc); } else if ((type->is_unsafe_pointer_type() @@ -3493,7 +3496,10 @@ Type_conversion_expression::do_get_backend(Translate_context* context) || (this->may_convert_function_types_ && type->function_type() != NULL && expr_type->function_type() != NULL)) - return gogo->backend()->convert_expression(btype, bexpr, loc); + { + Bexpression* bexpr = this->expr_->get_backend(context); + return gogo->backend()->convert_expression(btype, bexpr, loc); + } else { Expression* conversion = @@ -7493,6 +7499,10 @@ Builtin_call_expression::lower_make(Statement_inserter* inserter) } Type* type = first_arg->type(); + if (!type->in_heap()) + go_error_at(first_arg->location(), + "can't make slice of go:notinheap type"); + bool is_slice = false; bool is_map = false; bool is_chan = false; @@ -8736,6 +8746,9 @@ Builtin_call_expression::do_check_types(Gogo*) } Type* element_type = slice_type->array_type()->element_type(); + if (!element_type->in_heap()) + go_error_at(args->front()->location(), + "can't append to slice of go:notinheap type"); if (this->is_varargs()) { if (!args->back()->type()->is_slice_type() @@ -12430,6 +12443,13 @@ Allocation_expression::do_type() return Type::make_pointer_type(this->type_); } +void +Allocation_expression::do_check_types(Gogo*) +{ + if (!this->type_->in_heap()) + go_error_at(this->location(), "can't heap allocate go:notinheap type"); +} + // Make a copy of an allocation expression. Expression* diff --git a/gcc/go/gofrontend/expressions.h b/gcc/go/gofrontend/expressions.h index 43fb854e8d1..a144ff4168b 100644 --- a/gcc/go/gofrontend/expressions.h +++ b/gcc/go/gofrontend/expressions.h @@ -3220,6 +3220,9 @@ class Allocation_expression : public Expression do_determine_type(const Type_context*) { } + void + do_check_types(Gogo*); + Expression* do_copy(); diff --git a/gcc/go/gofrontend/gogo.cc b/gcc/go/gofrontend/gogo.cc index 9071bc8f62d..a9d72ff4aa0 100644 --- a/gcc/go/gofrontend/gogo.cc +++ b/gcc/go/gofrontend/gogo.cc @@ -1504,10 +1504,10 @@ Gogo::write_globals() Bfunction* initfn = func->get_or_make_decl(this, *p); Bexpression* func_code = this->backend()->function_code_expression(initfn, func_loc); - Bexpression* call = this->backend()->call_expression(initfn, func_code, + Bexpression* call = this->backend()->call_expression(init_bfn, func_code, empty_args, NULL, func_loc); - Bstatement* ist = this->backend()->expression_statement(initfn, call); + Bstatement* ist = this->backend()->expression_statement(init_bfn, call); init_stmts.push_back(ist); } diff --git a/gcc/go/gofrontend/gogo.h b/gcc/go/gofrontend/gogo.h index c3e3f30131d..a04a1a36ee3 100644 --- a/gcc/go/gofrontend/gogo.h +++ b/gcc/go/gofrontend/gogo.h @@ -3379,6 +3379,9 @@ static const int RUNTIME_ERROR_MAKE_CHAN_OUT_OF_BOUNDS = 9; // Division by zero. static const int RUNTIME_ERROR_DIVISION_BY_ZERO = 10; +// Go statement with nil function. +static const int RUNTIME_ERROR_GO_NIL = 11; + // This is used by some of the langhooks. extern Gogo* go_get_gogo(); diff --git a/gcc/go/gofrontend/import.cc b/gcc/go/gofrontend/import.cc index f6b4e0c0566..20b077f7f99 100644 --- a/gcc/go/gofrontend/import.cc +++ b/gcc/go/gofrontend/import.cc @@ -82,6 +82,25 @@ Import::open_package(const std::string& filename, Location location, // A special case. fn = relative_import_path; } + else if (fn[0] == '.' && fn[1] == '.' + && (fn[2] == '\0' || IS_DIR_SEPARATOR(fn[2]))) + { + // We are going to join relative_import_path and fn, and it + // will look like DIR/../PATH. But DIR does not necessarily + // exist in this case, and if it doesn't the use of .. will + // fail although it shouldn't. The gc compiler uses + // path.Join here, which cleans up the .., so we need to do + // the same. + size_t index; + for (index = relative_import_path.length() - 1; + index > 0 && !IS_DIR_SEPARATOR(relative_import_path[index]); + index--) + ; + if (index > 0) + fn = relative_import_path.substr(0, index) + fn.substr(2); + else + fn = relative_import_path + '/' + fn; + } else fn = relative_import_path + '/' + fn; is_local = false; diff --git a/gcc/go/gofrontend/lex.cc b/gcc/go/gofrontend/lex.cc index e834c13aaf9..e9f11c2c1c0 100644 --- a/gcc/go/gofrontend/lex.cc +++ b/gcc/go/gofrontend/lex.cc @@ -1897,6 +1897,11 @@ Lex::skip_cpp_comment() // Applies to the next function. Do not inline the function. this->pragmas_ |= GOPRAGMA_NOINLINE; } + else if (verb == "go:notinheap") + { + // Applies to the next type. The type does not live in the heap. + this->pragmas_ |= GOPRAGMA_NOTINHEAP; + } else if (verb == "go:systemstack") { // Applies to the next function. It must run on the system stack. @@ -1909,7 +1914,6 @@ Lex::skip_cpp_comment() // Applies to the next function. If the function needs to use // any write barriers, it should emit an error instead. // FIXME: Should only work when compiling the runtime package. - // FIXME: Not implemented. this->pragmas_ |= GOPRAGMA_NOWRITEBARRIER; } else if (verb == "go:nowritebarrierrec") @@ -1918,7 +1922,7 @@ Lex::skip_cpp_comment() // function that it calls, needs to use any write barriers, it // should emit an error instead. // FIXME: Should only work when compiling the runtime package. - // FIXME: Not implemented. + // FIXME: currently treated the same as go:nowritebarrier this->pragmas_ |= GOPRAGMA_NOWRITEBARRIERREC; } else if (verb == "go:cgo_unsafe_args") diff --git a/gcc/go/gofrontend/lex.h b/gcc/go/gofrontend/lex.h index 0a7a842ba88..a8b7091b584 100644 --- a/gcc/go/gofrontend/lex.h +++ b/gcc/go/gofrontend/lex.h @@ -64,7 +64,8 @@ enum GoPragma GOPRAGMA_NOWRITEBARRIER = 1 << 6, // No write barriers. GOPRAGMA_NOWRITEBARRIERREC = 1 << 7, // No write barriers here or callees. GOPRAGMA_CGOUNSAFEARGS = 1 << 8, // Pointer to arg is pointer to all. - GOPRAGMA_UINTPTRESCAPES = 1 << 9 // uintptr(p) escapes. + GOPRAGMA_UINTPTRESCAPES = 1 << 9, // uintptr(p) escapes. + GOPRAGMA_NOTINHEAP = 1 << 10 // type is not in heap. }; // A token returned from the lexer. diff --git a/gcc/go/gofrontend/parse.cc b/gcc/go/gofrontend/parse.cc index 84840fb79c1..28b1772f084 100644 --- a/gcc/go/gofrontend/parse.cc +++ b/gcc/go/gofrontend/parse.cc @@ -1310,14 +1310,16 @@ Parse::declaration() const Token* token = this->peek_token(); unsigned int pragmas = this->lex_->get_and_clear_pragmas(); - if (pragmas != 0 && !token->is_keyword(KEYWORD_FUNC)) + if (pragmas != 0 + && !token->is_keyword(KEYWORD_FUNC) + && !token->is_keyword(KEYWORD_TYPE)) go_warning_at(token->location(), 0, "ignoring magic comment before non-function"); if (token->is_keyword(KEYWORD_CONST)) this->const_decl(); else if (token->is_keyword(KEYWORD_TYPE)) - this->type_decl(); + this->type_decl(pragmas); else if (token->is_keyword(KEYWORD_VAR)) this->var_decl(); else if (token->is_keyword(KEYWORD_FUNC)) @@ -1342,7 +1344,8 @@ Parse::declaration_may_start_here() // Decl<P> = P | "(" [ List<P> ] ")" . void -Parse::decl(void (Parse::*pfn)(void*), void* varg) +Parse::decl(void (Parse::*pfn)(void*, unsigned int), void* varg, + unsigned int pragmas) { if (this->peek_token()->is_eof()) { @@ -1352,9 +1355,12 @@ Parse::decl(void (Parse::*pfn)(void*), void* varg) } if (!this->peek_token()->is_op(OPERATOR_LPAREN)) - (this->*pfn)(varg); + (this->*pfn)(varg, pragmas); else { + if (pragmas != 0) + go_warning_at(this->location(), 0, + "ignoring magic //go:... comment before group"); if (!this->advance_token()->is_op(OPERATOR_RPAREN)) { this->list(pfn, varg, true); @@ -1378,9 +1384,10 @@ Parse::decl(void (Parse::*pfn)(void*), void* varg) // might follow. This is either a '}' or a ')'. void -Parse::list(void (Parse::*pfn)(void*), void* varg, bool follow_is_paren) +Parse::list(void (Parse::*pfn)(void*, unsigned int), void* varg, + bool follow_is_paren) { - (this->*pfn)(varg); + (this->*pfn)(varg, 0); Operator follow = follow_is_paren ? OPERATOR_RPAREN : OPERATOR_RCURLY; while (this->peek_token()->is_op(OPERATOR_SEMICOLON) || this->peek_token()->is_op(OPERATOR_COMMA)) @@ -1389,7 +1396,7 @@ Parse::list(void (Parse::*pfn)(void*), void* varg, bool follow_is_paren) go_error_at(this->location(), "unexpected comma"); if (this->advance_token()->is_op(follow)) break; - (this->*pfn)(varg); + (this->*pfn)(varg, 0); } } @@ -1508,17 +1515,17 @@ Parse::const_spec(Type** last_type, Expression_list** last_expr_list) // TypeDecl = "type" Decl<TypeSpec> . void -Parse::type_decl() +Parse::type_decl(unsigned int pragmas) { go_assert(this->peek_token()->is_keyword(KEYWORD_TYPE)); this->advance_token(); - this->decl(&Parse::type_spec, NULL); + this->decl(&Parse::type_spec, NULL, pragmas); } // TypeSpec = identifier ["="] Type . void -Parse::type_spec(void*) +Parse::type_spec(void*, unsigned int pragmas) { const Token* token = this->peek_token(); if (!token->is_identifier()) @@ -1592,6 +1599,15 @@ Parse::type_spec(void*) this->gogo_->define_type(named_type, nt); go_assert(named_type->package() == NULL); + + if ((pragmas & GOPRAGMA_NOTINHEAP) != 0) + { + nt->set_not_in_heap(); + pragmas &= ~GOPRAGMA_NOTINHEAP; + } + if (pragmas != 0) + go_warning_at(location, 0, + "ignoring magic //go:... comment before type"); } else { @@ -1608,15 +1624,19 @@ Parse::var_decl() { go_assert(this->peek_token()->is_keyword(KEYWORD_VAR)); this->advance_token(); - this->decl(&Parse::var_spec, NULL); + this->decl(&Parse::var_spec, NULL, 0); } // VarSpec = IdentifierList // ( CompleteType [ "=" ExpressionList ] | "=" ExpressionList ) . void -Parse::var_spec(void*) +Parse::var_spec(void*, unsigned int pragmas) { + if (pragmas != 0) + go_warning_at(this->location(), 0, + "ignoring magic //go:... comment before var"); + // Get the variable names. Typed_identifier_list til; this->identifier_list(&til); @@ -5698,14 +5718,18 @@ Parse::import_decl() { go_assert(this->peek_token()->is_keyword(KEYWORD_IMPORT)); this->advance_token(); - this->decl(&Parse::import_spec, NULL); + this->decl(&Parse::import_spec, NULL, 0); } // ImportSpec = [ "." | PackageName ] PackageFileName . void -Parse::import_spec(void*) +Parse::import_spec(void*, unsigned int pragmas) { + if (pragmas != 0) + go_warning_at(this->location(), 0, + "ignoring magic //go:... comment before import"); + const Token* token = this->peek_token(); Location location = token->location(); diff --git a/gcc/go/gofrontend/parse.h b/gcc/go/gofrontend/parse.h index e13dcc97545..e416072830d 100644 --- a/gcc/go/gofrontend/parse.h +++ b/gcc/go/gofrontend/parse.h @@ -182,14 +182,14 @@ class Parse void method_spec(Typed_identifier_list*); void declaration(); bool declaration_may_start_here(); - void decl(void (Parse::*)(void*), void*); - void list(void (Parse::*)(void*), void*, bool); + void decl(void (Parse::*)(void*, unsigned int), void*, unsigned int pragmas); + void list(void (Parse::*)(void*, unsigned int), void*, bool); void const_decl(); void const_spec(Type**, Expression_list**); - void type_decl(); - void type_spec(void*); + void type_decl(unsigned int pragmas); + void type_spec(void*, unsigned int pragmas); void var_decl(); - void var_spec(void*); + void var_spec(void*, unsigned int pragmas); void init_vars(const Typed_identifier_list*, Type*, Expression_list*, bool is_coloneq, Location); bool init_vars_from_call(const Typed_identifier_list*, Type*, Expression*, @@ -278,7 +278,7 @@ class Parse void goto_stat(); void package_clause(); void import_decl(); - void import_spec(void*); + void import_spec(void*, unsigned int pragmas); void reset_iota(); int iota_value(); diff --git a/gcc/go/gofrontend/statements.cc b/gcc/go/gofrontend/statements.cc index 7a448d7a606..e5921767286 100644 --- a/gcc/go/gofrontend/statements.cc +++ b/gcc/go/gofrontend/statements.cc @@ -2201,6 +2201,15 @@ Thunk_statement::simplify_statement(Gogo* gogo, Named_object* function, Location location = this->location(); + bool is_constant_function = this->is_constant_function(); + Temporary_statement* fn_temp = NULL; + if (!is_constant_function) + { + fn_temp = Statement::make_temporary(NULL, fn, location); + block->insert_statement_before(block->statements()->size() - 1, fn_temp); + fn = Expression::make_temporary_reference(fn_temp, location); + } + std::string thunk_name = Gogo::thunk_name(); // Build the thunk. @@ -2212,7 +2221,7 @@ Thunk_statement::simplify_statement(Gogo* gogo, Named_object* function, // argument to the thunk. Expression_list* vals = new Expression_list(); - if (!this->is_constant_function()) + if (!is_constant_function) vals->push_back(fn); if (interface_method != NULL) @@ -2238,6 +2247,23 @@ Thunk_statement::simplify_statement(Gogo* gogo, Named_object* function, // Allocate the initialized struct on the heap. constructor = Expression::make_heap_expression(constructor, location); + // Throw an error if the function is nil. This is so that for `go + // nil` we get a backtrace from the go statement, rather than a + // useless backtrace from the brand new goroutine. + Expression* param = constructor; + if (!is_constant_function) + { + fn = Expression::make_temporary_reference(fn_temp, location); + Expression* nil = Expression::make_nil(location); + Expression* isnil = Expression::make_binary(OPERATOR_EQEQ, fn, nil, + location); + Expression* crash = gogo->runtime_error(RUNTIME_ERROR_GO_NIL, location); + crash = Expression::make_conditional(isnil, crash, + Expression::make_nil(location), + location); + param = Expression::make_compound(crash, constructor, location); + } + // Look up the thunk. Named_object* named_thunk = gogo->lookup(thunk_name, NULL); go_assert(named_thunk != NULL && named_thunk->is_function()); @@ -2246,7 +2272,7 @@ Thunk_statement::simplify_statement(Gogo* gogo, Named_object* function, Expression* func = Expression::make_func_reference(named_thunk, NULL, location); Expression_list* params = new Expression_list(); - params->push_back(constructor); + params->push_back(param); Call_expression* call = Expression::make_call(func, params, false, location); // Build the simple go or defer statement. diff --git a/gcc/go/gofrontend/types.cc b/gcc/go/gofrontend/types.cc index 61a33635c12..b2756fde048 100644 --- a/gcc/go/gofrontend/types.cc +++ b/gcc/go/gofrontend/types.cc @@ -746,6 +746,20 @@ Type::are_convertible(const Type* lhs, const Type* rhs, std::string* reason) if (Type::are_assignable(lhs, rhs, reason)) return true; + // A pointer to a regular type may not be converted to a pointer to + // a type that may not live in the heap, except when converting to + // unsafe.Pointer. + if (lhs->points_to() != NULL + && rhs->points_to() != NULL + && !rhs->points_to()->in_heap() + && lhs->points_to()->in_heap() + && !lhs->is_unsafe_pointer_type()) + { + if (reason != NULL) + reason->assign(_("conversion from notinheap type to normal type")); + return false; + } + // The types are convertible if they have identical underlying // types, ignoring struct field tags. if ((lhs->named_type() != NULL || rhs->named_type() != NULL) @@ -2570,16 +2584,16 @@ Type::make_gc_symbol_var(Gogo* gogo) bool Type::needs_gcprog(Gogo* gogo, int64_t* ptrsize, int64_t* ptrdata) { + Type* voidptr = Type::make_pointer_type(Type::make_void_type()); + if (!voidptr->backend_type_size(gogo, ptrsize)) + go_unreachable(); + if (!this->backend_type_ptrdata(gogo, ptrdata)) { go_assert(saw_errors()); return false; } - Type* voidptr = Type::make_pointer_type(Type::make_void_type()); - if (!voidptr->backend_type_size(gogo, ptrsize)) - go_unreachable(); - return *ptrdata / *ptrsize > max_ptrmask_bytes; } @@ -2795,7 +2809,13 @@ Bvariable* Type::gc_ptrmask_var(Gogo* gogo, int64_t ptrsize, int64_t ptrdata) { Ptrmask ptrmask(ptrdata / ptrsize); - ptrmask.set_from(gogo, this, ptrsize, 0); + if (ptrdata >= ptrsize) + ptrmask.set_from(gogo, this, ptrsize, 0); + else + { + // This can happen in error cases. Just build an empty gcbits. + go_assert(saw_errors()); + } std::string sym_name = "runtime.gcbits." + ptrmask.symname(); Bvariable* bvnull = NULL; std::pair<GC_gcbits_vars::iterator, bool> ins = @@ -5949,6 +5969,24 @@ Struct_type::do_needs_key_update() return false; } +// Return whether this struct type is permitted to be in the heap. + +bool +Struct_type::do_in_heap() +{ + const Struct_field_list* fields = this->fields_; + if (fields == NULL) + return true; + for (Struct_field_list::const_iterator pf = fields->begin(); + pf != fields->end(); + ++pf) + { + if (!pf->type()->in_heap()) + return false; + } + return true; +} + // Build identity and hash functions for this struct. // Hash code. @@ -7629,12 +7667,19 @@ Array_type::get_value_pointer(Gogo*, Expression* array, bool is_lvalue) const { Temporary_reference_expression* tref = array->temporary_reference_expression(); + Var_expression* ve = array->var_expression(); if (tref != NULL) { tref = tref->copy()->temporary_reference_expression(); tref->set_is_lvalue(); array = tref; } + else if (ve != NULL) + { + ve = new Var_expression(ve->named_object(), ve->location()); + ve->set_in_lvalue_pos(); + array = ve; + } } return Expression::make_slice_info(array, @@ -8013,6 +8058,10 @@ Map_type::do_verify() // The runtime support uses "map[void]void". if (!this->key_type_->is_comparable() && !this->key_type_->is_void_type()) go_error_at(this->location_, "invalid map key type"); + if (!this->key_type_->in_heap()) + go_error_at(this->location_, "go:notinheap map key not allowed"); + if (!this->val_type_->in_heap()) + go_error_at(this->location_, "go:notinheap map value not allowed"); return true; } @@ -8527,6 +8576,19 @@ Type::make_map_type(Type* key_type, Type* val_type, Location location) // Class Channel_type. +// Verify. + +bool +Channel_type::do_verify() +{ + // We have no location for this error, but this is not something the + // ordinary user will see. + if (!this->element_type_->in_heap()) + go_error_at(Linemap::unknown_location(), + "chan of go:notinheap type not allowed"); + return true; +} + // Hash code. unsigned int diff --git a/gcc/go/gofrontend/types.h b/gcc/go/gofrontend/types.h index 3f6240b9fd2..aeb04d6c50f 100644 --- a/gcc/go/gofrontend/types.h +++ b/gcc/go/gofrontend/types.h @@ -636,6 +636,11 @@ class Type needs_key_update() { return this->do_needs_key_update(); } + // Whether the type is permitted in the heap. + bool + in_heap() + { return this->do_in_heap(); } + // Return a hash code for this type for the method hash table. // Types which are equivalent according to are_identical will have // the same hash code. @@ -1051,6 +1056,10 @@ class Type do_needs_key_update() { return false; } + virtual bool + do_in_heap() + { return true; } + virtual unsigned int do_hash_for_method(Gogo*) const; @@ -1343,6 +1352,8 @@ class Type // The GC symbol for this type. This starts out as NULL and // is filled in as needed. Bvariable* gc_symbol_var_; + // Whether this type can appear in the heap. + bool in_heap_; }; // Type hash table operations. @@ -2417,6 +2428,9 @@ class Struct_type : public Type bool do_needs_key_update(); + bool + do_in_heap(); + unsigned int do_hash_for_method(Gogo*) const; @@ -2590,6 +2604,10 @@ class Array_type : public Type do_needs_key_update() { return this->element_type_->needs_key_update(); } + bool + do_in_heap() + { return this->length_ == NULL || this->element_type_->in_heap(); } + unsigned int do_hash_for_method(Gogo*) const; @@ -2811,6 +2829,9 @@ class Channel_type : public Type { return Type::traverse(this->element_type_, traverse); } bool + do_verify(); + + bool do_has_pointer() const { return true; } @@ -3047,7 +3068,7 @@ class Named_type : public Type type_(type), local_methods_(NULL), all_methods_(NULL), interface_method_tables_(NULL), pointer_interface_method_tables_(NULL), location_(location), named_btype_(NULL), dependencies_(), - is_alias_(false), is_visible_(true), is_error_(false), + is_alias_(false), is_visible_(true), is_error_(false), in_heap_(true), is_placeholder_(false), is_converted_(false), is_circular_(false), is_verified_(false), seen_(false), seen_in_compare_is_identity_(false), seen_in_get_backend_(false), seen_alias_(false) @@ -3079,6 +3100,11 @@ class Named_type : public Type set_is_alias() { this->is_alias_ = true; } + // Mark this type as not permitted in the heap. + void + set_not_in_heap() + { this->in_heap_ = false; } + // Return the function in which this type is defined. This will // return NULL for a type defined in global scope. const Named_object* @@ -3277,6 +3303,10 @@ class Named_type : public Type bool do_needs_key_update(); + bool + do_in_heap() + { return this->in_heap_ && this->type_->in_heap(); } + unsigned int do_hash_for_method(Gogo*) const; @@ -3344,6 +3374,9 @@ class Named_type : public Type bool is_visible_; // Whether this type is erroneous. bool is_error_; + // Whether this type is permitted in the heap. This is true by + // default, false if there is a magic //go:notinheap comment. + bool in_heap_; // Whether the current value of named_btype_ is a placeholder for // which the final size of the type is not known. bool is_placeholder_; @@ -3436,6 +3469,10 @@ class Forward_declaration_type : public Type do_needs_key_update() { return this->real_type()->needs_key_update(); } + bool + do_in_heap() + { return this->real_type()->in_heap(); } + unsigned int do_hash_for_method(Gogo* gogo) const { return this->real_type()->hash_for_method(gogo); } diff --git a/gcc/go/gofrontend/wb.cc b/gcc/go/gofrontend/wb.cc index 5a49961aba8..cbefc11c816 100644 --- a/gcc/go/gofrontend/wb.cc +++ b/gcc/go/gofrontend/wb.cc @@ -156,6 +156,13 @@ Write_barriers::variable(Named_object* no) if (!var->has_pre_init() && init->is_static_initializer()) return TRAVERSE_CONTINUE; + // Nothing to do for a type that can not be in the heap, or a + // pointer to a type that can not be in the heap. + if (!var->type()->in_heap()) + return TRAVERSE_CONTINUE; + if (var->type()->points_to() != NULL && !var->type()->points_to()->in_heap()) + return TRAVERSE_CONTINUE; + // Otherwise change the initializer into a pre_init assignment // statement with a write barrier. @@ -215,6 +222,14 @@ Write_barriers::statement(Block* block, size_t* pindex, Statement* s) if (!var->type()->has_pointer()) break; + // Nothing to do for a type that can not be in the heap, or a + // pointer to a type that can not be in the heap. + if (!var->type()->in_heap()) + break; + if (var->type()->points_to() != NULL + && !var->type()->points_to()->in_heap()) + break; + // Otherwise initialize the variable with a write barrier. Function* function = this->function_; @@ -345,6 +360,13 @@ Gogo::assign_needs_write_barrier(Expression* lhs) } } + // Nothing to do for a type that can not be in the heap, or a + // pointer to a type that can not be in the heap. + if (!lhs->type()->in_heap()) + return false; + if (lhs->type()->points_to() != NULL && !lhs->type()->points_to()->in_heap()) + return false; + // Write barrier needed in other cases. return true; } diff --git a/gcc/godump.c b/gcc/godump.c index 4884deead80..3e905319b8f 100644 --- a/gcc/godump.c +++ b/gcc/godump.c @@ -504,7 +504,8 @@ static void go_early_global_decl (tree decl) { go_decl (decl); - real_debug_hooks->early_global_decl (decl); + if (TREE_CODE (decl) != FUNCTION_DECL || DECL_STRUCT_FUNCTION (decl) != NULL) + real_debug_hooks->early_global_decl (decl); } /* A global variable decl. */ diff --git a/gcc/hash-table.h b/gcc/hash-table.h index 0f7e21a2cc5..443d16c1837 100644 --- a/gcc/hash-table.h +++ b/gcc/hash-table.h @@ -803,7 +803,10 @@ hash_table<Descriptor, Allocator>::empty_slow () m_size_prime_index = nindex; } else - memset (entries, 0, size * sizeof (value_type)); + { + for ( ; size; ++entries, --size) + *entries = value_type (); + } m_n_deleted = 0; m_n_elements = 0; } diff --git a/gcc/incpath.c b/gcc/incpath.c index 98fe5ec9ab3..47942e2547d 100644 --- a/gcc/incpath.c +++ b/gcc/incpath.c @@ -314,7 +314,7 @@ remove_duplicates (cpp_reader *pfile, struct cpp_dir *head, } /* Add SYSROOT to any user-supplied paths in CHAIN starting with - "=". */ + "=" or "$SYSROOT". */ static void add_sysroot_to_chain (const char *sysroot, int chain) @@ -322,8 +322,15 @@ add_sysroot_to_chain (const char *sysroot, int chain) struct cpp_dir *p; for (p = heads[chain]; p != NULL; p = p->next) - if (p->name[0] == '=' && p->user_supplied_p) - p->name = concat (sysroot, p->name + 1, NULL); + { + if (p->user_supplied_p) + { + if (p->name[0] == '=') + p->name = concat (sysroot, p->name + 1, NULL); + if (strncmp (p->name, "$SYSROOT", strlen ("$SYSROOT")) == 0) + p->name = concat (sysroot, p->name + strlen ("$SYSROOT"), NULL); + } + } } /* Merge the four include chains together in the order quote, bracket, diff --git a/gcc/ipa-cp.c b/gcc/ipa-cp.c index 3c9c3f29ee0..c7e3c7107ca 100644 --- a/gcc/ipa-cp.c +++ b/gcc/ipa-cp.c @@ -1471,8 +1471,7 @@ allocate_and_init_ipcp_value (tree source) { ipcp_value<tree> *val; - val = ipcp_cst_values_pool.allocate (); - memset (val, 0, sizeof (*val)); + val = new (ipcp_cst_values_pool.allocate ()) ipcp_value<tree>(); val->value = source; return val; } @@ -1486,8 +1485,8 @@ allocate_and_init_ipcp_value (ipa_polymorphic_call_context source) ipcp_value<ipa_polymorphic_call_context> *val; // TODO - val = ipcp_poly_ctx_values_pool.allocate (); - memset (val, 0, sizeof (*val)); + val = new (ipcp_poly_ctx_values_pool.allocate ()) + ipcp_value<ipa_polymorphic_call_context>(); val->value = source; return val; } diff --git a/gcc/ipa-inline-transform.c b/gcc/ipa-inline-transform.c index 9866a55e8b5..dc224f7a394 100644 --- a/gcc/ipa-inline-transform.c +++ b/gcc/ipa-inline-transform.c @@ -54,10 +54,12 @@ int nfunctions_inlined; /* Scale frequency of NODE edges by FREQ_SCALE. */ static void -update_noncloned_frequencies (struct cgraph_node *node, - int freq_scale) +update_noncloned_frequencies (struct cgraph_node *node, + int freq_scale, profile_count num, + profile_count den) { struct cgraph_edge *e; + bool scale = (num == profile_count::zero () || den > 0); /* We do not want to ignore high loop nest after freq drops to 0. */ if (!freq_scale) @@ -68,14 +70,20 @@ update_noncloned_frequencies (struct cgraph_node *node, if (e->frequency > CGRAPH_FREQ_MAX) e->frequency = CGRAPH_FREQ_MAX; if (!e->inline_failed) - update_noncloned_frequencies (e->callee, freq_scale); + update_noncloned_frequencies (e->callee, freq_scale, num, den); + if (scale) + e->count = e->count.apply_scale (num, den); } for (e = node->indirect_calls; e; e = e->next_callee) { e->frequency = e->frequency * (gcov_type) freq_scale / CGRAPH_FREQ_BASE; if (e->frequency > CGRAPH_FREQ_MAX) e->frequency = CGRAPH_FREQ_MAX; + if (scale) + e->count = e->count.apply_scale (num, den); } + if (scale) + node->count = node->count.apply_scale (num, den); } /* We removed or are going to remove the last call to NODE. @@ -212,7 +220,8 @@ clone_inlined_nodes (struct cgraph_edge *e, bool duplicate, } duplicate = false; e->callee->externally_visible = false; - update_noncloned_frequencies (e->callee, e->frequency); + update_noncloned_frequencies (e->callee, e->frequency, + e->count, e->callee->count); dump_callgraph_transformation (e->callee, inlining_into, "inlining to"); diff --git a/gcc/ipa-inline.c b/gcc/ipa-inline.c index 8924f7eb15f..fb20d3723cc 100644 --- a/gcc/ipa-inline.c +++ b/gcc/ipa-inline.c @@ -117,6 +117,7 @@ along with GCC; see the file COPYING3. If not see #include "auto-profile.h" #include "builtins.h" #include "fibonacci_heap.h" +#include "asan.h" typedef fibonacci_heap <sreal, cgraph_edge> edge_heap_t; typedef fibonacci_node <sreal, cgraph_edge> edge_heap_node_t; @@ -257,17 +258,11 @@ report_inline_failed_reason (struct cgraph_edge *e) static bool sanitize_attrs_match_for_inline_p (const_tree caller, const_tree callee) { - /* Don't care if sanitizer is disabled */ - if (!(flag_sanitize & SANITIZE_ADDRESS)) - return true; - if (!caller || !callee) return true; - return !!lookup_attribute ("no_sanitize_address", - DECL_ATTRIBUTES (caller)) == - !!lookup_attribute ("no_sanitize_address", - DECL_ATTRIBUTES (callee)); + return sanitize_flags_p (SANITIZE_ADDRESS, caller) + == sanitize_flags_p (SANITIZE_ADDRESS, callee); } /* Used for flags where it is safe to inline when caller's value is diff --git a/gcc/ipa-prop.c b/gcc/ipa-prop.c index c73ffd7b586..51f62218501 100644 --- a/gcc/ipa-prop.c +++ b/gcc/ipa-prop.c @@ -3013,7 +3013,10 @@ find_constructor_constant_at_offset (tree constructor, HOST_WIDE_INT req_offset) if (index) { - off = wi::to_offset (index); + if (TREE_CODE (index) == RANGE_EXPR) + off = wi::to_offset (TREE_OPERAND (index, 0)); + else + off = wi::to_offset (index); if (TYPE_DOMAIN (type) && TYPE_MIN_VALUE (TYPE_DOMAIN (type))) { tree low_bound = TYPE_MIN_VALUE (TYPE_DOMAIN (type)); @@ -3022,6 +3025,8 @@ find_constructor_constant_at_offset (tree constructor, HOST_WIDE_INT req_offset) TYPE_PRECISION (TREE_TYPE (index))); } off *= wi::to_offset (unit_size); + /* ??? Handle more than just the first index of a + RANGE_EXPR. */ } else off = wi::to_offset (unit_size) * ix; @@ -3711,7 +3716,7 @@ void ipa_free_edge_args_substructures (struct ipa_edge_args *args) { vec_free (args->jump_functions); - memset (args, 0, sizeof (*args)); + *args = ipa_edge_args (); } /* Free all ipa_edge structures. */ diff --git a/gcc/ira-costs.c b/gcc/ira-costs.c index e3bd1d97e82..8c6c1346f3b 100644 --- a/gcc/ira-costs.c +++ b/gcc/ira-costs.c @@ -1744,7 +1744,7 @@ find_costs_and_classes (FILE *dump_file) int best_cost, allocno_cost; enum reg_class best, alt_class; cost_classes_t cost_classes_ptr = regno_cost_classes[i]; - enum reg_class *cost_classes = cost_classes_ptr->classes; + enum reg_class *cost_classes; int *i_costs = temp_costs->cost; int i_mem_cost; int equiv_savings = regno_equiv_gains[i]; @@ -1755,6 +1755,7 @@ find_costs_and_classes (FILE *dump_file) continue; memcpy (temp_costs, COSTS (costs, i), struct_costs_size); i_mem_cost = temp_costs->mem_cost; + cost_classes = cost_classes_ptr->classes; } else { @@ -1762,6 +1763,7 @@ find_costs_and_classes (FILE *dump_file) continue; memset (temp_costs, 0, struct_costs_size); i_mem_cost = 0; + cost_classes = cost_classes_ptr->classes; /* Find cost of all allocnos with the same regno. */ for (a = ira_regno_allocno_map[i]; a != NULL; diff --git a/gcc/ira.c b/gcc/ira.c index d47a2288718..f91fcb9e5fc 100644 --- a/gcc/ira.c +++ b/gcc/ira.c @@ -3553,7 +3553,8 @@ update_equiv_regs (void) if (DF_REG_DEF_COUNT (regno) == 1 && note && !rtx_varies_p (XEXP (note, 0), 0) - && def_dominates_uses (regno)) + && (!may_trap_or_fault_p (XEXP (note, 0)) + || def_dominates_uses (regno))) { rtx note_value = XEXP (note, 0); remove_note (insn, note); diff --git a/gcc/lto/ChangeLog b/gcc/lto/ChangeLog index e63f2037191..41f034372d9 100644 --- a/gcc/lto/ChangeLog +++ b/gcc/lto/ChangeLog @@ -1,3 +1,14 @@ +2017-06-23 Marc Glisse <marc.glisse@inria.fr> + + * lto-lang.c (lto_init): Use builtin_structptr_types. + +2017-06-15 Jan Hubicka <hubicka@ucw.cz> + Thomas Preud'homme <thomas.preudhomme@arm.com> + + PR lto/69866 + * lto-symtab.c (lto_symtab_merge_symbols): Drop useless definitions + that resolved externally. + 2017-05-23 Jan Hubicka <hubicka@ucw.cz> * lto.c (do_whole_program_analysis): Replace inline_free_summary diff --git a/gcc/lto/lto-lang.c b/gcc/lto/lto-lang.c index 52ab2a8cb81..58935172b2c 100644 --- a/gcc/lto/lto-lang.c +++ b/gcc/lto/lto-lang.c @@ -1220,13 +1220,17 @@ lto_init (void) /* In the C++ front-end, fileptr_type_node is defined as a variant copy of ptr_type_node, rather than ptr_node itself. The distinction should only be relevant to the front-end, so we - always use the C definition here in lto1. */ - gcc_assert (fileptr_type_node == ptr_type_node); - gcc_assert (TYPE_MAIN_VARIANT (fileptr_type_node) == ptr_type_node); - /* Likewise for const struct tm*. */ - gcc_assert (const_tm_ptr_type_node == const_ptr_type_node); - gcc_assert (TYPE_MAIN_VARIANT (const_tm_ptr_type_node) - == const_ptr_type_node); + always use the C definition here in lto1. + Likewise for const struct tm*. */ + for (unsigned i = 0; + i < sizeof (builtin_structptr_types) / sizeof (builtin_structptr_type); + ++i) + { + gcc_assert (builtin_structptr_types[i].node + == builtin_structptr_types[i].base); + gcc_assert (TYPE_MAIN_VARIANT (builtin_structptr_types[i].node) + == builtin_structptr_types[i].base); + } lto_build_c_type_nodes (); gcc_assert (va_list_type_node); diff --git a/gcc/lto/lto-symtab.c b/gcc/lto/lto-symtab.c index 9fd94861c6d..019677eaf95 100644 --- a/gcc/lto/lto-symtab.c +++ b/gcc/lto/lto-symtab.c @@ -952,6 +952,42 @@ lto_symtab_merge_symbols (void) if (tgt) node->resolve_alias (tgt, true); } + /* If the symbol was preempted outside IR, see if we want to get rid + of the definition. */ + if (node->analyzed + && !DECL_EXTERNAL (node->decl) + && (node->resolution == LDPR_PREEMPTED_REG + || node->resolution == LDPR_RESOLVED_IR + || node->resolution == LDPR_RESOLVED_EXEC + || node->resolution == LDPR_RESOLVED_DYN)) + { + DECL_EXTERNAL (node->decl) = 1; + /* If alias to local symbol was preempted by external definition, + we know it is not pointing to the local symbol. Remove it. */ + if (node->alias + && !node->weakref + && !node->transparent_alias + && node->get_alias_target ()->binds_to_current_def_p ()) + { + node->alias = false; + node->remove_all_references (); + node->definition = false; + node->analyzed = false; + node->cpp_implicit_alias = false; + } + else if (!node->alias + && node->definition + && node->get_availability () <= AVAIL_INTERPOSABLE) + { + if ((cnode = dyn_cast <cgraph_node *> (node)) != NULL) + cnode->reset (); + else + { + node->analyzed = node->definition = false; + node->remove_all_references (); + } + } + } if (!(cnode = dyn_cast <cgraph_node *> (node)) || !cnode->clone_of diff --git a/gcc/match.pd b/gcc/match.pd index 54a8e0449f8..a4cae113bc8 100644 --- a/gcc/match.pd +++ b/gcc/match.pd @@ -74,6 +74,20 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (FLOOR) DEFINE_INT_AND_FLOAT_ROUND_FN (CEIL) DEFINE_INT_AND_FLOAT_ROUND_FN (ROUND) DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) + +/* As opposed to convert?, this still creates a single pattern, so + it is not a suitable replacement for convert? in all cases. */ +(match (nop_convert @0) + (convert @0) + (if (tree_nop_conversion_p (type, TREE_TYPE (@0))))) +(match (nop_convert @0) + (view_convert @0) + (if (VECTOR_TYPE_P (type) && VECTOR_TYPE_P (TREE_TYPE (@0)) + && TYPE_VECTOR_SUBPARTS (type) == TYPE_VECTOR_SUBPARTS (TREE_TYPE (@0)) + && tree_nop_conversion_p (TREE_TYPE (type), TREE_TYPE (TREE_TYPE (@0)))))) +/* This one has to be last, or it shadows the others. */ +(match (nop_convert @0) + @0) /* Simplifications of operations with one constant operand and simplifications to constants or single values. */ @@ -147,6 +161,18 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (op @0 integer_onep) (non_lvalue @0))) +/* (A / (1 << B)) -> (A >> B). + Only for unsigned A. For signed A, this would not preserve rounding + toward zero. + For example: (-1 / ( 1 << B)) != -1 >> B. */ +(simplify + (trunc_div @0 (lshift integer_onep@1 @2)) + (if ((TYPE_UNSIGNED (type) || tree_expr_nonnegative_p (@0)) + && (!VECTOR_TYPE_P (type) + || target_supports_op_p (type, RSHIFT_EXPR, optab_vector) + || target_supports_op_p (type, RSHIFT_EXPR, optab_scalar))) + (rshift @0 @2))) + /* Preserve explicit divisions by 0: the C++ front-end wants to detect undefined behavior in constexpr evaluation, and assuming that the division traps enables better optimizations than these anyway. */ @@ -1296,18 +1322,44 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) (minus @0 (minus @0 @1)) @1) - /* (A +- CST1) +- CST2 -> A + CST3 */ + /* (A +- CST1) +- CST2 -> A + CST3 + Use view_convert because it is safe for vectors and equivalent for + scalars. */ (for outer_op (plus minus) (for inner_op (plus minus) + neg_inner_op (minus plus) (simplify - (outer_op (inner_op @0 CONSTANT_CLASS_P@1) CONSTANT_CLASS_P@2) - /* If the constant operation overflows we cannot do the transform - as we would introduce undefined overflow, for example - with (a - 1) + INT_MIN. */ - (with { tree cst = const_binop (outer_op == inner_op - ? PLUS_EXPR : MINUS_EXPR, type, @1, @2); } - (if (cst && !TREE_OVERFLOW (cst)) - (inner_op @0 { cst; } )))))) + (outer_op (nop_convert (inner_op @0 CONSTANT_CLASS_P@1)) + CONSTANT_CLASS_P@2) + /* If one of the types wraps, use that one. */ + (if (!ANY_INTEGRAL_TYPE_P (type) || TYPE_OVERFLOW_WRAPS (type)) + (if (outer_op == PLUS_EXPR) + (plus (view_convert @0) (inner_op @2 (view_convert @1))) + (minus (view_convert @0) (neg_inner_op @2 (view_convert @1)))) + (if (!ANY_INTEGRAL_TYPE_P (TREE_TYPE (@0)) + || TYPE_OVERFLOW_WRAPS (TREE_TYPE (@0))) + (if (outer_op == PLUS_EXPR) + (view_convert (plus @0 (inner_op (view_convert @2) @1))) + (view_convert (minus @0 (neg_inner_op (view_convert @2) @1)))) + /* If the constant operation overflows we cannot do the transform + directly as we would introduce undefined overflow, for example + with (a - 1) + INT_MIN. */ + (if (types_match (type, @0)) + (with { tree cst = const_binop (outer_op == inner_op + ? PLUS_EXPR : MINUS_EXPR, + type, @1, @2); } + (if (cst && !TREE_OVERFLOW (cst)) + (inner_op @0 { cst; } ) + /* X+INT_MAX+1 is X-INT_MIN. */ + (if (INTEGRAL_TYPE_P (type) && cst + && wi::eq_p (cst, wi::min_value (type))) + (neg_inner_op @0 { wide_int_to_tree (type, cst); }) + /* Last resort, use some unsigned type. */ + (with { tree utype = unsigned_type_for (type); } + (view_convert (inner_op + (view_convert:utype @0) + (view_convert:utype + { drop_tree_overflow (cst); }))))))))))))) /* (CST1 - A) +- CST2 -> CST3 - A */ (for outer_op (plus minus) @@ -2741,6 +2793,34 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT) || VECTOR_INTEGER_TYPE_P (TREE_TYPE (@0))) { constant_boolean_node (false, type); }))) +/* A & (2**N - 1) <= 2**K - 1 -> A & (2**N - 2**K) == 0 + A & (2**N - 1) > 2**K - 1 -> A & (2**N - 2**K) != 0 + + Note that comparisons + A & (2**N - 1) < 2**K -> A & (2**N - 2**K) == 0 + A & (2**N - 1) >= 2**K -> A & (2**N - 2**K) != 0 + will be canonicalized to above so there's no need to + consider them here. + */ + +(for cmp (le gt) + eqcmp (eq ne) + (simplify + (cmp (bit_and@0 @1 INTEGER_CST@2) INTEGER_CST@3) + (if (INTEGRAL_TYPE_P (TREE_TYPE (@0))) + (with + { + tree ty = TREE_TYPE (@0); + unsigned prec = TYPE_PRECISION (ty); + wide_int mask = wi::to_wide (@2, prec); + wide_int rhs = wi::to_wide (@3, prec); + signop sgn = TYPE_SIGN (ty); + } + (if ((mask & (mask + 1)) == 0 && wi::gt_p (rhs, 0, sgn) + && (rhs & (rhs + 1)) == 0 && wi::ge_p (mask, rhs, sgn)) + (eqcmp (bit_and @1 { wide_int_to_tree (ty, mask - rhs); }) + { build_zero_cst (ty); })))))) + /* -A CMP -B -> B CMP A. */ (for cmp (tcc_comparison) scmp (swapped_tcc_comparison) diff --git a/gcc/multiple_target.c b/gcc/multiple_target.c index 2ee6a9591ba..38d6892af28 100644 --- a/gcc/multiple_target.c +++ b/gcc/multiple_target.c @@ -34,6 +34,27 @@ along with GCC; see the file COPYING3. If not see #include "target.h" #include "attribs.h" #include "pretty-print.h" +#include "gimple-iterator.h" +#include "gimple-walk.h" + +/* Walker callback that replaces all FUNCTION_DECL of a function that's + going to be versioned. */ + +static tree +replace_function_decl (tree *op, int *walk_subtrees, void *data) +{ + struct walk_stmt_info *wi = (struct walk_stmt_info *) data; + cgraph_function_version_info *info = (cgraph_function_version_info *)wi->info; + + if (TREE_CODE (*op) == FUNCTION_DECL + && info->this_node->decl == *op) + { + *op = info->dispatcher_resolver; + *walk_subtrees = 0; + } + + return NULL; +} /* If the call in NODE has multiple target attribute with multiple fields, replace it with dispatcher call and create dispatcher (once). */ @@ -41,51 +62,49 @@ along with GCC; see the file COPYING3. If not see static void create_dispatcher_calls (struct cgraph_node *node) { - cgraph_edge *e; - cgraph_edge *e_next = NULL; + ipa_ref *ref; + + if (!DECL_FUNCTION_VERSIONED (node->decl) + || !is_function_default_version (node->decl)) + return; + + auto_vec<cgraph_edge *> edges_to_redirect; + auto_vec<ipa_ref *> references_to_redirect; + + for (unsigned i = 0; node->iterate_referring (i, ref); i++) + references_to_redirect.safe_push (ref); /* We need to remember NEXT_CALLER as it could be modified in the loop. */ - for (e = node->callers; e ;e = (e == NULL) ? e_next : e->next_caller) - { - tree resolver_decl; - tree idecl; - tree decl; - gimple *call = e->call_stmt; - struct cgraph_node *inode; - - /* Checking if call of function is call of versioned function. - Versioned function are not inlined, so there is no need to - check for inline. */ - if (!call - || !(decl = gimple_call_fndecl (call)) - || !DECL_FUNCTION_VERSIONED (decl)) - continue; + for (cgraph_edge *e = node->callers; e ; e = e->next_caller) + edges_to_redirect.safe_push (e); + if (!edges_to_redirect.is_empty () || !references_to_redirect.is_empty ()) + { if (!targetm.has_ifunc_p ()) { - error_at (gimple_location (call), + error_at (DECL_SOURCE_LOCATION (node->decl), "the call requires ifunc, which is not" " supported by this target"); - break; + return; } else if (!targetm.get_function_versions_dispatcher) { - error_at (gimple_location (call), + error_at (DECL_SOURCE_LOCATION (node->decl), "target does not support function version dispatcher"); - break; + return; } - e_next = e->next_caller; - idecl = targetm.get_function_versions_dispatcher (decl); + tree idecl = targetm.get_function_versions_dispatcher (node->decl); if (!idecl) { - error_at (gimple_location (call), + error_at (DECL_SOURCE_LOCATION (node->decl), "default target_clones attribute was not set"); - break; + return; } - inode = cgraph_node::get (idecl); + + cgraph_node *inode = cgraph_node::get (idecl); gcc_assert (inode); - resolver_decl = targetm.generate_version_dispatcher_body (inode); + tree resolver_decl = targetm.generate_version_dispatcher_body (inode); /* Update aliases. */ inode->alias = true; @@ -93,12 +112,45 @@ create_dispatcher_calls (struct cgraph_node *node) if (!inode->analyzed) inode->resolve_alias (cgraph_node::get (resolver_decl)); - e->redirect_callee (inode); - e->redirect_call_stmt_to_callee (); - /* Since REDIRECT_CALLEE modifies NEXT_CALLER field we move to - previously set NEXT_CALLER. */ - e = NULL; + /* Redirect edges. */ + unsigned i; + cgraph_edge *e; + FOR_EACH_VEC_ELT (edges_to_redirect, i, e) + { + e->redirect_callee (inode); + e->redirect_call_stmt_to_callee (); + } + + /* Redirect references. */ + FOR_EACH_VEC_ELT (references_to_redirect, i, ref) + { + if (ref->use == IPA_REF_ADDR) + { + struct walk_stmt_info wi; + memset (&wi, 0, sizeof (wi)); + wi.info = (void *)node->function_version (); + + if (dyn_cast<varpool_node *> (ref->referring)) + { + hash_set<tree> visited_nodes; + walk_tree (&DECL_INITIAL (ref->referring->decl), + replace_function_decl, &wi, &visited_nodes); + } + else + { + gimple_stmt_iterator it = gsi_for_stmt (ref->stmt); + if (ref->referring->decl != resolver_decl) + walk_gimple_stmt (&it, NULL, replace_function_decl, &wi); + } + } + else + gcc_unreachable (); + } } + + symtab->change_decl_assembler_name (node->decl, + clone_function_name (node->decl, + "default")); } /* Return length of attribute names string, diff --git a/gcc/omp-low.c b/gcc/omp-low.c index 9a1624851c3..dd4a0926c44 100644 --- a/gcc/omp-low.c +++ b/gcc/omp-low.c @@ -6320,7 +6320,11 @@ lower_omp_ordered_clauses (gimple_stmt_iterator *gsi_p, gomp_ordered *ord_stmt, return; wide_int *folded_deps = XALLOCAVEC (wide_int, 2 * len - 1); - memset (folded_deps, 0, sizeof (*folded_deps) * (2 * len - 1)); + + /* wide_int is not a POD so it must be default-constructed. */ + for (unsigned i = 0; i != 2 * len - 1; ++i) + new (static_cast<void*>(folded_deps + i)) wide_int (); + tree folded_dep = NULL_TREE; /* TRUE if the first dimension's offset is negative. */ bool neg_offset_p = false; diff --git a/gcc/optabs-tree.c b/gcc/optabs-tree.c index 4bb54ba4382..c183b14c819 100644 --- a/gcc/optabs-tree.c +++ b/gcc/optabs-tree.c @@ -376,3 +376,18 @@ init_tree_optimization_optabs (tree optnode) ggc_free (tmp_optabs); } } + +/* Return TRUE if the target has support for vector right shift of an + operand of type TYPE. If OT_TYPE is OPTAB_DEFAULT, check for existence + of a shift by either a scalar or a vector. Otherwise, check only + for a shift that matches OT_TYPE. */ + +bool +target_supports_op_p (tree type, enum tree_code code, + enum optab_subtype ot_subtype) +{ + optab ot = optab_for_tree_code (code, type, ot_subtype); + return (ot != unknown_optab + && optab_handler (ot, TYPE_MODE (type)) != CODE_FOR_nothing); +} + diff --git a/gcc/optabs-tree.h b/gcc/optabs-tree.h index d0b27e0e2f7..52e842bfb61 100644 --- a/gcc/optabs-tree.h +++ b/gcc/optabs-tree.h @@ -41,5 +41,7 @@ bool supportable_convert_operation (enum tree_code, tree, tree, tree *, bool expand_vec_cmp_expr_p (tree, tree, enum tree_code); bool expand_vec_cond_expr_p (tree, tree, enum tree_code); void init_tree_optimization_optabs (tree); +bool target_supports_op_p (tree, enum tree_code, + enum optab_subtype = optab_default); #endif diff --git a/gcc/opts.c b/gcc/opts.c index 60ebe56c8a4..4013ea51fd2 100644 --- a/gcc/opts.c +++ b/gcc/opts.c @@ -1656,6 +1656,37 @@ parse_sanitizer_options (const char *p, location_t loc, int scode, return flags; } +/* Parse string values of no_sanitize attribute passed in VALUE. + Values are separated with comma. Wrong argument is stored to + WRONG_ARGUMENT variable. */ + +unsigned int +parse_no_sanitize_attribute (char *value, char **wrong_argument) +{ + unsigned int flags = 0; + unsigned int i; + char *q = strtok (value, ","); + + while (q != NULL) + { + for (i = 0; sanitizer_opts[i].name != NULL; ++i) + if (strcmp (sanitizer_opts[i].name, q) == 0) + { + flags |= sanitizer_opts[i].flag; + if (sanitizer_opts[i].flag == SANITIZE_UNDEFINED) + flags |= SANITIZE_UNDEFINED_NONDEFAULT; + break; + } + + if (sanitizer_opts[i].name == NULL) + *wrong_argument = q; + + q = strtok (NULL, ","); + } + + return flags; +} + /* Handle target- and language-independent options. Return zero to generate an "unknown option" message. Only options that need extra handling need to be listed here; if you simply want @@ -1892,11 +1923,11 @@ common_handle_option (struct gcc_options *opts, case OPT_fsanitize_recover: if (value) opts->x_flag_sanitize_recover - |= (SANITIZE_UNDEFINED | SANITIZE_NONDEFAULT) + |= (SANITIZE_UNDEFINED | SANITIZE_UNDEFINED_NONDEFAULT) & ~(SANITIZE_UNREACHABLE | SANITIZE_RETURN); else opts->x_flag_sanitize_recover - &= ~(SANITIZE_UNDEFINED | SANITIZE_NONDEFAULT); + &= ~(SANITIZE_UNDEFINED | SANITIZE_UNDEFINED_NONDEFAULT); break; case OPT_O: diff --git a/gcc/opts.h b/gcc/opts.h index eb626aa90ec..16371e8141f 100644 --- a/gcc/opts.h +++ b/gcc/opts.h @@ -378,6 +378,8 @@ extern void print_ignored_options (void); extern void handle_common_deferred_options (void); unsigned int parse_sanitizer_options (const char *, location_t, int, unsigned int, int, bool); + +unsigned int parse_no_sanitize_attribute (char *value, char **wrong_argument); extern bool common_handle_option (struct gcc_options *opts, struct gcc_options *opts_set, const struct cl_decoded_option *decoded, diff --git a/gcc/params.h b/gcc/params.h index b61cff94487..8b916607f16 100644 --- a/gcc/params.h +++ b/gcc/params.h @@ -42,7 +42,7 @@ struct param_info { /* The name used with the `--param <name>=<value>' switch to set this value. */ - const char *const option; + const char *option; /* The default value. */ int default_value; @@ -54,7 +54,7 @@ struct param_info int max_value; /* A short description of the option. */ - const char *const help; + const char *help; /* The optional names corresponding to the values. */ const char **value_names; diff --git a/gcc/passes.c b/gcc/passes.c index 64493ba1688..374f6f77897 100644 --- a/gcc/passes.c +++ b/gcc/passes.c @@ -262,17 +262,18 @@ rest_of_decl_compilation (tree decl, finalize_compilation_unit (and by consequence, locally scoped symbols), or by rest_of_type_compilation below. - Also, pick up function prototypes, which will be mostly ignored - by the different early_global_decl() hooks, but will at least be - used by Go's hijack of the debug_hooks to implement - -fdump-go-spec. */ + For Go's hijack of the debug_hooks to implement -fdump-go-spec, pick up + function prototypes. Go's debug_hooks will not forward them to the + wrapped hooks. */ if (!in_lto_p && (TREE_CODE (decl) != FUNCTION_DECL /* This will pick up function prototypes with no bodies, which are not visible in finalize_compilation_unit() while iterating with FOR_EACH_*_FUNCTION through the symbol table. */ - || !DECL_SAVED_TREE (decl)) + || (flag_dump_go_spec != NULL + && !DECL_SAVED_TREE (decl) + && DECL_STRUCT_FUNCTION (decl) == NULL)) /* We need to check both decl_function_context and current_function_decl here to make sure local extern diff --git a/gcc/passes.def b/gcc/passes.def index 25e9d974bc8..316e19d12e3 100644 --- a/gcc/passes.def +++ b/gcc/passes.def @@ -107,6 +107,7 @@ along with GCC; see the file COPYING3. If not see early optimizations again. It is thus good idea to do this late. */ NEXT_PASS (pass_split_functions); + NEXT_PASS (pass_strip_predict_hints); POP_INSERT_PASSES () NEXT_PASS (pass_release_ssa_names); NEXT_PASS (pass_rebuild_cgraph_edges); @@ -276,7 +277,6 @@ along with GCC; see the file COPYING3. If not see /* All unswitching, final value replacement and splitting can expose empty loops. Remove them now. */ NEXT_PASS (pass_cd_dce); - NEXT_PASS (pass_record_bounds); NEXT_PASS (pass_iv_canon); NEXT_PASS (pass_loop_distribution); NEXT_PASS (pass_copy_prop); diff --git a/gcc/predict.c b/gcc/predict.c index 1cb7dc50103..44151bc2e6c 100644 --- a/gcc/predict.c +++ b/gcc/predict.c @@ -2739,73 +2739,9 @@ tree_estimate_probability_bb (basic_block bb, bool local_only) { edge e; edge_iterator ei; - gimple *last; FOR_EACH_EDGE (e, ei, bb->succs) { - /* Predict edges to user labels with attributes. */ - if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)) - { - gimple_stmt_iterator gi; - for (gi = gsi_start_bb (e->dest); !gsi_end_p (gi); gsi_next (&gi)) - { - glabel *label_stmt = dyn_cast <glabel *> (gsi_stmt (gi)); - tree decl; - - if (!label_stmt) - break; - decl = gimple_label_label (label_stmt); - if (DECL_ARTIFICIAL (decl)) - continue; - - /* Finally, we have a user-defined label. */ - if (lookup_attribute ("cold", DECL_ATTRIBUTES (decl))) - predict_edge_def (e, PRED_COLD_LABEL, NOT_TAKEN); - else if (lookup_attribute ("hot", DECL_ATTRIBUTES (decl))) - predict_edge_def (e, PRED_HOT_LABEL, TAKEN); - } - } - - /* Predict early returns to be probable, as we've already taken - care for error returns and other cases are often used for - fast paths through function. - - Since we've already removed the return statements, we are - looking for CFG like: - - if (conditional) - { - .. - goto return_block - } - some other blocks - return_block: - return_stmt. */ - if (e->dest != bb->next_bb - && e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun) - && single_succ_p (e->dest) - && single_succ_edge (e->dest)->dest == EXIT_BLOCK_PTR_FOR_FN (cfun) - && (last = last_stmt (e->dest)) != NULL - && gimple_code (last) == GIMPLE_RETURN) - { - edge e1; - edge_iterator ei1; - - if (single_succ_p (bb)) - { - FOR_EACH_EDGE (e1, ei1, bb->preds) - if (!predicted_by_p (e1->src, PRED_NULL_RETURN) - && !predicted_by_p (e1->src, PRED_CONST_RETURN) - && !predicted_by_p (e1->src, PRED_NEGATIVE_RETURN)) - predict_edge_def (e1, PRED_TREE_EARLY_RETURN, NOT_TAKEN); - } - else - if (!predicted_by_p (e->src, PRED_NULL_RETURN) - && !predicted_by_p (e->src, PRED_CONST_RETURN) - && !predicted_by_p (e->src, PRED_NEGATIVE_RETURN)) - predict_edge_def (e, PRED_TREE_EARLY_RETURN, NOT_TAKEN); - } - /* Look for block we are guarding (ie we dominate it, but it doesn't postdominate us). */ if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun) && e->dest != bb @@ -3968,6 +3904,7 @@ force_edge_cold (edge e, bool impossible) profile_count old_count = e->count; int old_probability = e->probability; int prob_scale = REG_BR_PROB_BASE; + bool uninitialized_exit = false; /* If edge is already improbably or cold, just return. */ if (e->probability <= (impossible ? PROB_VERY_UNLIKELY : 0) @@ -3978,6 +3915,8 @@ force_edge_cold (edge e, bool impossible) { if (e2->count.initialized_p ()) count_sum += e2->count; + else + uninitialized_exit = true; prob_sum += e2->probability; } @@ -3989,7 +3928,7 @@ force_edge_cold (edge e, bool impossible) = MIN (e->probability, impossible ? 0 : PROB_VERY_UNLIKELY); if (impossible) e->count = profile_count::zero (); - if (old_probability) + else if (old_probability) e->count = e->count.apply_scale (e->probability, old_probability); else e->count = e->count.apply_scale (1, REG_BR_PROB_BASE); @@ -4016,6 +3955,34 @@ force_edge_cold (edge e, bool impossible) else { e->probability = REG_BR_PROB_BASE; + if (e->src->count == profile_count::zero ()) + return; + if (count_sum == profile_count::zero () && !uninitialized_exit + && impossible) + { + bool found = false; + for (gimple_stmt_iterator gsi = gsi_start_bb (e->src); + !gsi_end_p (gsi); gsi_next (&gsi)) + { + if (stmt_can_terminate_bb_p (gsi_stmt (gsi))) + { + found = true; + break; + } + } + if (!found) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, + "Making bb %i impossible and dropping count to 0.\n", + e->src->index); + e->count = profile_count::zero (); + e->src->count = profile_count::zero (); + FOR_EACH_EDGE (e2, ei, e->src->preds) + force_edge_cold (e2, impossible); + return; + } + } /* If we did not adjusting, the source basic block has no likely edeges leaving other direction. In that case force that bb cold, too. diff --git a/gcc/predict.def b/gcc/predict.def index fcda6c48f11..f7b2bf7738c 100644 --- a/gcc/predict.def +++ b/gcc/predict.def @@ -128,18 +128,9 @@ DEF_PREDICTOR (PRED_POLYMORPHIC_CALL, "polymorphic call", HITRATE (59), 0) indefinitely. */ DEF_PREDICTOR (PRED_RECURSIVE_CALL, "recursive call", HITRATE (75), 0) -/* Branch causing function to terminate is probably not taken. - FIXME: early return currently predicts code: - int foo (int a) - { - if (a) - bar(); - else - bar2(); - } - even though there is no return statement involved. We probably want to track - this from FE or retire the predictor. */ -DEF_PREDICTOR (PRED_TREE_EARLY_RETURN, "early return (on trees)", HITRATE (54), 0) +/* Branch causing function to terminate is probably not taken. */ +DEF_PREDICTOR (PRED_TREE_EARLY_RETURN, "early return (on trees)", HITRATE (66), + 0) /* Branch containing goto is probably not taken. FIXME: Currently not used. */ diff --git a/gcc/profile-count.c b/gcc/profile-count.c index 5ad7178c159..e64d1b56421 100644 --- a/gcc/profile-count.c +++ b/gcc/profile-count.c @@ -37,7 +37,15 @@ profile_count::dump (FILE *f) const if (!initialized_p ()) fprintf (f, "uninitialized"); else - fprintf (f, "%" PRId64, m_val); + { + fprintf (f, "%" PRId64, m_val); + if (m_quality == count_adjusted) + fprintf (f, "(adjusted)"); + else if (m_quality == count_afdo) + fprintf (f, "(auto FDO)"); + else if (m_quality == count_guessed) + fprintf (f, "(guessed)"); + } } void @@ -51,7 +59,7 @@ profile_count::differs_from_p (profile_count other) const { if (!initialized_p () || !other.initialized_p ()) return false; - if (m_val - other.m_val < 100 && other.m_val - m_val < 100) + if (m_val - other.m_val < 100 || other.m_val - m_val < 100) return false; if (!other.m_val) return true; @@ -64,6 +72,7 @@ profile_count::stream_in (struct lto_input_block *ib) { profile_count ret; ret.m_val = streamer_read_gcov_count (ib); + ret.m_quality = (profile_count_quality) streamer_read_uhwi (ib); return ret; } @@ -71,10 +80,12 @@ void profile_count::stream_out (struct output_block *ob) { streamer_write_gcov_count (ob, m_val); + streamer_write_uhwi (ob, m_quality); } void profile_count::stream_out (struct lto_output_stream *ob) { streamer_write_gcov_count_stream (ob, m_val); + streamer_write_uhwi_stream (ob, m_quality); } diff --git a/gcc/profile-count.h b/gcc/profile-count.h index 78ffee99ad0..0f77e4efc36 100644 --- a/gcc/profile-count.h +++ b/gcc/profile-count.h @@ -21,6 +21,22 @@ along with GCC; see the file COPYING3. If not see #ifndef GCC_PROFILE_COUNT_H #define GCC_PROFILE_COUNT_H +/* Quality of the proflie count. Because gengtype does not support enums + inside of clases, this is in global namespace. */ +enum profile_count_quality { + /* Profile is based on static branch prediction heuristics. It may or may + not reflect the reality. */ + count_guessed = 0, + /* Profile was determined by autofdo. */ + count_afdo = 1, + /* Profile was originally based on feedback but it was adjusted + by code duplicating optimization. It may not precisely reflect the + particular code path. */ + count_adjusted = 2, + /* Profile was read from profile feedback or determined by accurate static + method. */ + count_read = 3 +}; /* The base value for branch probability notes and edge probabilities. */ #define REG_BR_PROB_BASE 10000 @@ -58,17 +74,21 @@ along with GCC; see the file COPYING3. If not see */ - class GTY(()) profile_count { - /* Use int64_t to hold basic block counters. Should be at least + /* Use 62bit to hold basic block counters. Should be at least 64bit. Although a counter cannot be negative, we use a signed type to hold various extra stages. */ - int64_t m_val; + static const int n_bits = 62; + static const uint64_t max_count = ((uint64_t) 1 << n_bits) - 2; + static const uint64_t uninitialized_count = ((uint64_t) 1 << n_bits) - 1; + + uint64_t m_val : n_bits; + enum profile_count_quality m_quality : 2; /* Assume numbers smaller than this to multiply. This is set to make - testsuite pass, in future we may implement precise multiples in higer + testsuite pass, in future we may implement precise multiplication in higer rangers. */ static const int64_t max_safe_multiplier = 131072; public: @@ -87,7 +107,8 @@ public: static profile_count uninitialized () { profile_count c; - c.m_val = -1; + c.m_val = uninitialized_count; + c.m_quality = count_guessed; return c; } @@ -97,8 +118,9 @@ public: static profile_count from_gcov_type (gcov_type v) { profile_count ret; - gcc_checking_assert (v>=0); + gcc_checking_assert (v >= 0 && (uint64_t) v <= max_count); ret.m_val = v; + ret.m_quality = count_read; return ret; } @@ -112,7 +134,7 @@ public: /* Return true if value has been initialized. */ bool initialized_p () const { - return m_val != -1; + return m_val != uninitialized_count; } /* Return true if value can be trusted. */ bool reliable_p () const @@ -123,7 +145,7 @@ public: /* Basic operations. */ bool operator== (const profile_count &other) const { - return m_val == other.m_val; + return m_val == other.m_val && m_quality == other.m_quality; } profile_count operator+ (const profile_count &other) const { @@ -136,6 +158,7 @@ public: profile_count ret; ret.m_val = m_val + other.m_val; + ret.m_quality = MIN (m_quality, other.m_quality); return ret; } profile_count &operator+= (const profile_count &other) @@ -150,7 +173,10 @@ public: if (!initialized_p () || !other.initialized_p ()) return *this = profile_count::uninitialized (); else - m_val += other.m_val; + { + m_val += other.m_val; + m_quality = MIN (m_quality, other.m_quality); + } return *this; } profile_count operator- (const profile_count &other) const @@ -160,7 +186,8 @@ public: if (!initialized_p () || !other.initialized_p ()) return profile_count::uninitialized (); profile_count ret; - ret.m_val = MAX (m_val - other.m_val, 0); + ret.m_val = m_val >= other.m_val ? m_val - other.m_val : 0; + ret.m_quality = MIN (m_quality, other.m_quality); return ret; } profile_count &operator-= (const profile_count &other) @@ -170,14 +197,17 @@ public: if (!initialized_p () || !other.initialized_p ()) return *this = profile_count::uninitialized (); else - m_val = MAX (m_val - other.m_val, 0); + { + m_val = m_val >= other.m_val ? m_val - other.m_val: 0; + m_quality = MIN (m_quality, other.m_quality); + } return *this; } /* Return false if profile_count is bogus. */ bool verify () const { - return m_val >= -1; + return m_val != uninitialized_count || m_quality == count_guessed; } /* Comparsions are three-state and conservative. False is returned if @@ -192,11 +222,13 @@ public: } bool operator< (const gcov_type other) const { - return initialized_p () && m_val < other; + gcc_checking_assert (other >= 0); + return initialized_p () && m_val < (uint64_t) other; } bool operator> (const gcov_type other) const { - return initialized_p () && m_val > other; + gcc_checking_assert (other >= 0); + return initialized_p () && m_val > (uint64_t) other; } bool operator<= (const profile_count &other) const @@ -209,11 +241,13 @@ public: } bool operator<= (const gcov_type other) const { - return initialized_p () && m_val <= other; + gcc_checking_assert (other >= 0); + return initialized_p () && m_val <= (uint64_t) other; } bool operator>= (const gcov_type other) const { - return initialized_p () && m_val >= other; + gcc_checking_assert (other >= 0); + return initialized_p () && m_val >= (uint64_t) other; } /* PROB is a probability in scale 0...REG_BR_PROB_BASE. Scale counter @@ -221,44 +255,51 @@ public: profile_count apply_probability (int prob) const { gcc_checking_assert (prob >= 0 && prob <= REG_BR_PROB_BASE); - if (*this == profile_count::zero ()) + if (m_val == 0) return *this; if (!initialized_p ()) return profile_count::uninitialized (); profile_count ret; ret.m_val = RDIV (m_val * prob, REG_BR_PROB_BASE); + ret.m_quality = MIN (m_quality, count_adjusted); return ret; } /* Return *THIS * NUM / DEN. */ profile_count apply_scale (int64_t num, int64_t den) const { - if (*this == profile_count::zero ()) + if (m_val == 0) return *this; if (!initialized_p ()) return profile_count::uninitialized (); profile_count ret; + gcc_checking_assert (num >= 0 && den > 0); /* FIXME: shrink wrapping violates this sanity check. */ - gcc_checking_assert ((num >= 0 - && (num <= REG_BR_PROB_BASE - || den <= REG_BR_PROB_BASE) - && den > 0) || 1); + gcc_checking_assert ((num <= REG_BR_PROB_BASE + || den <= REG_BR_PROB_BASE) || 1); ret.m_val = RDIV (m_val * num, den); + ret.m_quality = MIN (m_quality, count_adjusted); return ret; } profile_count apply_scale (profile_count num, profile_count den) const { - if (*this == profile_count::zero () || num == profile_count::zero ()) - return profile_count::zero (); + if (m_val == 0) + return *this; + if (num.m_val == 0) + return num; if (!initialized_p () || !num.initialized_p () || !den.initialized_p ()) return profile_count::uninitialized (); - profile_count ret; gcc_checking_assert (den > 0); + if (num == den) + return *this; + + profile_count ret; /* Take care for overflows! */ if (num.m_val < max_safe_multiplier || m_val < max_safe_multiplier) ret.m_val = RDIV (m_val * num.m_val, den.m_val); else ret.m_val = RDIV (m_val * RDIV (num.m_val * max_safe_multiplier, den.m_val), max_safe_multiplier); + ret.m_quality = MIN (m_quality, count_adjusted); return ret; } @@ -266,7 +307,7 @@ public: OVERALL. */ int probability_in (profile_count overall) { - if (*this == profile_count::zero ()) + if (!m_val) return 0; if (!initialized_p () || !overall.initialized_p ()) return REG_BR_PROB_BASE / 2; diff --git a/gcc/profile.c b/gcc/profile.c index 69a2c47006f..51ca248f5ad 100644 --- a/gcc/profile.c +++ b/gcc/profile.c @@ -987,6 +987,27 @@ output_location (char const *file_name, int line, } } +/* Helper for qsort so edges get sorted from highest frequency to smallest. + This controls the weight for minimal spanning tree algorithm */ +static int +compare_freqs (const void *p1, const void *p2) +{ + const_edge e1 = *(const const_edge *)p1; + const_edge e2 = *(const const_edge *)p2; + + /* Critical edges needs to be split which introduce extra control flow. + Make them more heavy. */ + int m1 = EDGE_CRITICAL_P (e1) ? 2 : 1; + int m2 = EDGE_CRITICAL_P (e2) ? 2 : 1; + + if (EDGE_FREQUENCY (e1) * m1 + m1 != EDGE_FREQUENCY (e2) * m2 + m2) + return EDGE_FREQUENCY (e2) * m2 + m2 - EDGE_FREQUENCY (e1) * m1 - m1; + /* Stabilize sort. */ + if (e1->src->index != e2->src->index) + return e2->src->index - e1->src->index; + return e2->dest->index - e1->dest->index; +} + /* Instrument and/or analyze program behavior based on program the CFG. This function creates a representation of the control flow graph (of @@ -1140,6 +1161,7 @@ branch_prob (void) el = create_edge_list (); num_edges = NUM_EDGES (el); + qsort (el->index_to_edge, num_edges, sizeof (edge), compare_freqs); alloc_aux_for_edges (sizeof (struct edge_profile_info)); /* The basic blocks are expected to be numbered sequentially. */ @@ -1431,22 +1453,8 @@ find_spanning_tree (struct edge_list *el) } } - /* Now insert all critical edges to the tree unless they form a cycle. */ - for (i = 0; i < num_edges; i++) - { - edge e = INDEX_EDGE (el, i); - if (EDGE_CRITICAL_P (e) && !EDGE_INFO (e)->ignore - && find_group (e->src) != find_group (e->dest)) - { - if (dump_file) - fprintf (dump_file, "Critical edge %d to %d put to tree\n", - e->src->index, e->dest->index); - EDGE_INFO (e)->on_tree = 1; - union_groups (e->src, e->dest); - } - } - - /* And now the rest. */ + /* And now the rest. Edge list is sorted according to frequencies and + thus we will produce minimal spanning tree. */ for (i = 0; i < num_edges; i++) { edge e = INDEX_EDGE (el, i); diff --git a/gcc/reorg.c b/gcc/reorg.c index 1a6fd86e286..dbd74ab2404 100644 --- a/gcc/reorg.c +++ b/gcc/reorg.c @@ -1694,9 +1694,8 @@ own_thread_p (rtx thread, rtx label, int allow_fallthrough) } /* Called when INSN is being moved from a location near the target of a jump. - We leave a marker of the form (use (INSN)) immediately in front - of WHERE for mark_target_live_regs. These markers will be deleted when - reorg finishes. + We leave a marker of the form (use (INSN)) immediately in front of WHERE + for mark_target_live_regs. These markers will be deleted at the end. We used to try to update the live status of registers if WHERE is at the start of a basic block, but that can't work since we may remove a @@ -1705,16 +1704,10 @@ own_thread_p (rtx thread, rtx label, int allow_fallthrough) static void update_block (rtx_insn *insn, rtx_insn *where) { - /* Ignore if this was in a delay slot and it came from the target of - a branch. */ - if (INSN_FROM_TARGET_P (insn)) - return; - emit_insn_before (gen_rtx_USE (VOIDmode, insn), where); /* INSN might be making a value live in a block where it didn't use to be. So recompute liveness information for this block. */ - incr_ticks_for_insn (insn); } diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c index d9f57c30d8e..bf4183e793d 100644 --- a/gcc/rtlanal.c +++ b/gcc/rtlanal.c @@ -485,7 +485,7 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST_WIDE_INT offset, HOST_WIDE_INT size, case SYMBOL_REF: if (SYMBOL_REF_WEAK (x)) return 1; - if (!CONSTANT_POOL_ADDRESS_P (x)) + if (!CONSTANT_POOL_ADDRESS_P (x) && !SYMBOL_REF_FUNCTION_P (x)) { tree decl; HOST_WIDE_INT decl_size; @@ -644,8 +644,11 @@ rtx_addr_can_trap_p_1 (const_rtx x, HOST_WIDE_INT offset, HOST_WIDE_INT size, case PLUS: /* An address is assumed not to trap if: - - it is the pic register plus a constant. */ - if (XEXP (x, 0) == pic_offset_table_rtx && CONSTANT_P (XEXP (x, 1))) + - it is the pic register plus a const unspec without offset. */ + if (XEXP (x, 0) == pic_offset_table_rtx + && GET_CODE (XEXP (x, 1)) == CONST + && GET_CODE (XEXP (XEXP (x, 1), 0)) == UNSPEC + && offset == 0) return 0; /* - or it is an address that can't trap plus a constant integer. */ diff --git a/gcc/sanopt.c b/gcc/sanopt.c index 70b7aeb80d3..16bdba76042 100644 --- a/gcc/sanopt.c +++ b/gcc/sanopt.c @@ -948,9 +948,7 @@ pass_sanopt::execute (function *fun) switch (DECL_FUNCTION_CODE (callee)) { case BUILT_IN_UNREACHABLE: - if (flag_sanitize & SANITIZE_UNREACHABLE - && !lookup_attribute ("no_sanitize_undefined", - DECL_ATTRIBUTES (fun->decl))) + if (sanitize_flags_p (SANITIZE_UNREACHABLE)) no_next = ubsan_instrument_unreachable (&gsi); break; default: diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 301dd1d8806..a6f9af976e9 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -3194,7 +3194,8 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, case UDIV: /* 0/x is 0 (or x&0 if x has side-effects). */ - if (trueop0 == CONST0_RTX (mode)) + if (trueop0 == CONST0_RTX (mode) + && !cfun->can_throw_non_call_exceptions) { if (side_effects_p (op1)) return simplify_gen_binary (AND, mode, op1, trueop0); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 6568326db63..ad5ccb7dc64 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,570 @@ +2017-06-24 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/62315 + * g++.dg/parse/typedef2.C: Specify a dg-error string. + +2017-06-24 Thomas Koenig <tkoenig@gcc.gnu.org> + + PR fortran/52473 + * gfortran.dg/cshift_2.f90: New test. + +2017-06-23 Jim Wilson <jim.wilson@linaro.org> + + PR middle-end/79794 + * gcc.target/aarch64/pr79794.c: New. + +2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/80510 + * gcc.target/powerpc/pr80510-1.c: Allow test to run on 32-bit. + * gcc.target/powerpc/pr80510-2.c: Likewise. + +2017-06-22 Jeff Law <law@redhat.com> + + * gcc.c-torture/compile/stack-check-1.c: Require "untyped_assembly". + +2017-06-23 Will Schmidt <will_schmidt@vnet.ibm.com> + + * gcc.target/powerpc/fold-vec-shift-char.c: New. + * gcc.target/powerpc/fold-vec-shift-int.c: New. + * gcc.target/powerpc/fold-vec-shift-longlong.c: New. + * gcc.target/powerpc/fold-vec-shift-short.c: New. + * gcc.target/powerpc/fold-vec-shift-left.c: New. + * gcc.target/powerpc/fold-vec-shift-left-fwrapv.c: New. + * gcc.target/powerpc/fold-vec-shift-left-longlong-fwrapv.c: New. + * gcc.target/powerpc/fold-vec-shift-left-longlong.c: New. + +2017-06-23 James Cowgill <James.Cowgill@imgtec.com> + + * go.test/go-test.exp (go-set-goarch): Update MIPS architecture + names. + +2017-06-22 Matt Turner <mattst88@gmail.com> + + * gcc.target/i386/builtin_target.c: Add Kaby Lake models to + skylake check. + +2017-06-22 Carl Love <cel@us.ibm.com> + + * gcc.target/powerpc/builtins-3.c (vmulosh, vmulouh, vmulesh, + vmuleuh): Fix scan-assembler-times should check for word not half word + instructions. + +2017-06-22 Jeff Law <law@redhat.com> + + * gcc.c-torture/compile/stack-check-1.c: New test. + +2016-06-22 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/pr65947-1.c: Remove xfail. + * gcc.dg/vect/pr65947-2.c: Likewise. + * gcc.dg/vect/pr65947-3.c: Likewise. + * gcc.dg/vect/pr65947-4.c: Likewise. + * gcc.dg/vect/pr65947-5.c: Likewise. + * gcc.dg/vect/pr65947-6.c: Likewise. + * gcc.dg/vect/pr65947-8.c: Likewise. + * gcc.dg/vect/pr65947-9.c: Likewise. + * gcc.dg/vect/pr65947-10.c: Likewise. + * gcc.dg/vect/pr65947-12.c: Likewise. + * gcc.dg/vect/pr65947-13.c: Likewise. + * gcc.dg/vect/pr65947-14.c: Likewise. + * gcc.dg/vect/vect-cond-2.c: Likewise. + * gcc.dg/vect/vect-pr69848.c: Likewise. + +2017-06-22 Martin Liska <mliska@suse.cz> + + * gcc.dg/tree-ssa/ipa-split-5.c: Make function bigger in order + to not inline it. + +2017-06-22 James Greenhalgh <james.greenhalgh@arm.com> + + * gcc.dg/tree-ssa/forwprop-37.c: New. + +2017-06-22 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/pr65947-14.c: Fix missing brace. + +2017-06-22 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/pr65947-14.c: New testcase. + +2017-06-21 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/80510 + * gcc.target/powerpc/pr80510-1.c: Restrict test to 64-bit until + 32-bit support is added. Change ITYPE size to 64-bit integer. + * gcc.target/powerpc/pr80510-2.c: Likewise. + +2017-06-21 Jakub Jelinek <jakub@redhat.com> + + PR c++/81154 + * g++.dg/gomp/pr81154.C: New test. + +2017-06-21 David Malcolm <dmalcolm@redhat.com> + + * g++.dg/other/old-style-cast-fixits.C: New test case. + +2017-06-21 Jakub Jelinek <jakub@redhat.com> + + * g++.dg/cpp0x/constexpr-cast.C: Adjust dg-error for ILP32. + +2017-06-21 Tom de Vries <tom@codesourcery.com> + + * lib/profopt.exp (profopt-get-options): Support dg-add-options. + +2017-06-21 Tom de Vries <tom@codesourcery.com> + + * gcc.dg/tree-prof/comp-goto-1.c: Fix 'return type defaults to int' + warning. + +2017-06-21 Martin Liska <mliska@suse.cz> + + * gcc.dg/tree-ssa/attr-hotcold-2.c: Update scanned patterns. + +2017-06-21 Pierre-Marie de Rodat <derodat@adacore.com> + + * gnat.dg/debug11_pkg.adb, gnat.dg/debug11_pkg.ads, + gnat.dg/debug11_pkg2.ads: New testcase. + +2017-06-21 Marc Glisse <marc.glisse@inria.fr> + + * gcc.target/i386/getround.c: New file. + +2017-06-21 Marc Glisse <marc.glisse@inria.fr> + + * gcc.dg/tree-ssa/addadd.c: Un-XFAIL. + * gcc.dg/tree-ssa/addadd-2.c: New file. + +2017-06-21 Tom de Vries <tom@codesourcery.com> + + * lib/target-supports.exp (add_options_for_stack_size): New proc. + * gcc.c-torture/execute/920501-7.c: Use dg-add-options stack_size. + * gcc.c-torture/compile/20080806-1.c: Same. + * gcc.c-torture/compile/920723-1.c: Same. + * gcc.c-torture/compile/930621-1.c: Same. + * gcc.c-torture/compile/991214-2.c: Same. + * gcc.c-torture/compile/bcopy.c: Same. + * gcc.c-torture/compile/memtst.c: Same. + * gcc.c-torture/compile/msp.c: Same. + * gcc.c-torture/compile/stuct.c: Same. + * gcc.c-torture/execute/20011008-3.c: Same. + * gcc.c-torture/execute/20030209-1.c: Same. + * gcc.c-torture/execute/20031012-1.c: Same. + * gcc.c-torture/execute/20040805-1.c: Same. + * gcc.c-torture/execute/920410-1.c: Same. + * gcc.c-torture/execute/921113-1.c: Same. + * gcc.c-torture/execute/921202-1.c: Same. + * gcc.c-torture/execute/921208-2.c: Same. + * gcc.c-torture/execute/930106-1.c: Same. + * gcc.c-torture/execute/930406-1.c: Same. + * gcc.c-torture/execute/950221-1.c: Same. + * gcc.c-torture/execute/960521-1.c: Same. + * gcc.c-torture/execute/980605-1.c: Same. + * gcc.c-torture/execute/comp-goto-1.c: Same. + * gcc.c-torture/execute/comp-goto-2.c: Same. + * gcc.c-torture/execute/memcpy-1.c: Same. + * gcc.c-torture/execute/multi-ix.c: Same. + * gcc.c-torture/execute/nestfunc-4.c: Same. + * gcc.c-torture/execute/pr20621-1.c: Same. + * gcc.c-torture/execute/pr23135.c: Same. + * gcc.c-torture/execute/pr28982b.c: Same. + * gcc.dg/loop-3.c: Same. + * gcc.dg/struct-ret-3.c: Same. + * gcc.dg/torture/stackalign/comp-goto-1.c: Same. + * gcc.dg/torture/stackalign/non-local-goto-4.c: Same. + * gcc.dg/tree-prof/comp-goto-1.c: Same. + * gcc.dg/tree-prof/pr44777.c: Same. + +2017-06-20 David Malcolm <dmalcolm@redhat.com> + + PR jit/81144 + * jit.dg/test-operator-overloading.cc (make_test_quadratic): Replace + memset call with zero-initialization. + * jit.dg/test-quadratic.cc (make_test_quadratic): Likewise. + +2017-06-20 Uros Bizjak <ubizjak@gmail.com> + + * gcc.target/i386/pr80732.c: Include fma4-check.h. + (main): Renamed to ... + (fma4_test): ... this. + +2017-06-20 Julia Koval <julia.koval@intel.com> + + * gcc.target/i386/pr73350-2.c: New test. + +2017-06-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * c-c++-common/fold-masked-cmp-1.c: Allow for i?86-*-* target. + * c-c++-common/fold-masked-cmp-2.c: Likewise. + * c-c++-common/fold-masked-cmp-3.c: Likewise. + * g++.dg/cpp0x/alignas4.C: Allow for i?86-*-* target, don't + restrict to x86_64-*-*-gnu. + Skip scan-assembler on *-*-darwin*. + * g++.dg/vect/pr70944.cc: Allow for i?86-*-* target. + * gcc.dg/loop-invariant.c: Likewise. + * gcc.dg/lto/pr70955_0.c: Likewise. + * gcc.dg/tree-ssa/pr69196-1.c: Likewise. + * gcc.dg/tree-ssa/pr79803.c: Likewise. + * gfortran.dg/pr68078.f90: Allow for i?86-*-linux*. + + * g++.dg/debug/dwarf2/const2b.C: Allow for x86_64-*-* target. + * gcc.dg/attr-ms_struct-1.c: Allow for all i?86-*-*, x86_64-*-* + targets. + * gcc.dg/attr-ms_struct-2.c: Likewise. + * gcc.dg/attr-ms_struct-packed1.c: Likewise. + * gcc.dg/bf-ms-layout.c: Likewise. + * gcc.dg/bf-ms-layout-2.c: Likewise. + * gcc.dg/pic-macro-define.c: Remove target restrictions. + Require fpic support. + * gcc.target/i386/bitfield1.c: Allow for all i?86-*-*, x86_64-*-* + targets. + * gcc.target/i386/bitfield2.c: Likewise. + * gcc.target/i386/darwin-fpmath.c: Allow for x86_64-*-darwin* + targets. + * gfortran.dg/fmt_pf.f90: Remove i?86-*-solaris2.9* from xfail. + +2017-06-20 Nathan Sidwell <nathan@acm.org> + + PR c++/67074 + * g++.dg/lookup/pr67074.C: New. + * g++.dg/parse/namespace-alias-1.C: Adjust. + +2017-06-20 Richard Biener <rguenther@suse.de> + + PR middle-end/81097 + * c-c++-common/ubsan/pr81097.c: New testcase. + +2017-06-20 Richard Biener <rguenther@suse.de> + + * gcc.dg/vect/pr65947-9.c: Adjust. + +2017-06-20 Prakhar Bahuguna <prakhar.bahuguna@arm.com> + + * gcc.target/arm/acle/cdp.c: Add feature macro bitmap test. + * gcc.target/arm/acle/cdp2.c: Likewise. + * gcc.target/arm/acle/ldc.c: Likewise. + * gcc.target/arm/acle/ldc2.c: Likewise. + * gcc.target/arm/acle/ldc2l.c: Likewise. + * gcc.target/arm/acle/ldcl.c: Likewise. + * gcc.target/arm/acle/mcr.c: Likewise. + * gcc.target/arm/acle/mcr2.c: Likewise. + * gcc.target/arm/acle/mcrr.c: Likewise. + * gcc.target/arm/acle/mcrr2.c: Likewise. + * gcc.target/arm/acle/mrc.c: Likewise. + * gcc.target/arm/acle/mrc2.c: Likewise. + * gcc.target/arm/acle/mrrc.c: Likewise. + * gcc.target/arm/acle/mrrc2.c: Likewise. + * gcc.target/arm/acle/stc.c: Likewise. + * gcc.target/arm/acle/stc2.c: Likewise. + * gcc.target/arm/acle/stc2l.c: Likewise. + * gcc.target/arm/acle/stcl.c: Likewise. + +2017-06-20 Jakub Jelinek <jakub@redhat.com> + + PR target/81121 + * gcc.target/i386/pr81121.c: New test. + +2017-06-20 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/79799 + * gcc.target/powerpc/pr79799-1.c: New test. + * gcc.target/powerpc/pr79799-2.c: Likewise. + * gcc.target/powerpc/pr79799-3.c: Likewise. + * gcc.target/powerpc/pr79799-4.c: Likewise. + * gcc.target/powerpc/pr79799-5.c: Likewise. + +2017-06-19 Nathan Sidwell <nathan@acm.org> + + PR c++/81124 + PR c++/79766 + * g++.dg/lookup/pr79766.C: New. + * g++.dg/lookup/pr81124.C: New. + * g++.dg/template/explicit6.C: Adjust. + * g++.old-deja/g++.other/decl5.C: Adjust. + +2017-06-19 Christophe Lyon <christophe.lyon@linaro.org> + + * g++.old-deja/g++.eh/badalloc1.C: Remove code path for + -DSTACK_SIZE. + +2017-06-19 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/81125 + * g++.dg/ubsan/pr81125.C: New test. + + PR sanitizer/81111 + * g++.dg/ubsan/pr81111.C: New test. + +2017-06-19 Richard Biener <rguenther@suse.de> + + PR middle-end/81118 + * gcc.dg/torture/pr81118.c: New testcase. + +2017-06-19 Richard Biener <rguenther@suse.de> + + PR tree-optimization/80887 + * gcc.dg/tree-ssa/pr80887.c: New testcase. + +2017-06-19 Jakub Jelinek <jakub@redhat.com> + + PR ipa/81112 + * g++.dg/torture/pr81112.C: Add -Wno-psabi to dg-additional-options. + +2017-06-19 Nathan Sidwell <nathan@acm.org> + + PR c++/81119 + * g++.dg/warn/pr81119.C: New. + +2017-06-19 Martin Liska <mliska@suse.cz> + + PR sanitizer/80879 + * gcc.dg/asan/use-after-scope-switch-4.c: New test. + +2017-06-19 Martin Liska <mliska@suse.cz> + + PR ipa/80732 + * gcc.target/i386/mvc5.c: Scan indirect_function. + * gcc.target/i386/mvc7.c: Likewise. + * gcc.target/i386/pr80732.c: New test. + +2017-06-19 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/66093 + * g++.dg/cpp1y/constexpr-66093.C: New. + +2017-06-19 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + * g++.dg/other/unused1.C: Remove *-*-solaris2.[56]* from + dg-skip-if list. + +2017-06-19 Richard Biener <rguenther@suse.de> + + PR ipa/81112 + * g++.dg/torture/pr81112.C: New testcase. + +2017-06-18 Jan Hubicka <hubicka@ucw.cz> + + * gcc.dg/lto/pr69866_0.c: This test needs alias. + +2017-06-18 Thomas Koenig <tkoenig@gcc.gnu.org> + + PR fortran/52473 + * gfortran.dg/cshift_1.f90: New test. + +2017-06-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> + + Remove dg-skip-if, dg-xfail-if, dg-xfail-run-if default args. + +2017-06-16 Carl Love <cel@us.ibm.com> + + * gcc.target/powerpc/builtins-3-runnable.c (test_result_sp, + main): Add runnable tests and test checker for vec_float, + vec_float2, vec_floate and vec_floato builtins. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/neon-thumb2-move.c (dg-options): Don't override + the architecture options added by dg-add-options arm_neon. + * gcc.target/arm/thumb2-slow-flash-data-2.c (dg-opitions): Add +fp + to the architecture. + * gcc.target/arm/thumb3-slow-flash-data-3.c (dg-opitions): Likewise. + * gcc.target/arm/thumb4-slow-flash-data-3.c (dg-opitions): Likewise. + * gcc.target/arm/thumb5-slow-flash-data-3.c (dg-opitions): Likewise. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/multilib.exp (rmprofile): New tests when rm-profile + multilibs have been built. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * gcc.dg/pr59418.c: On ARM, change architecture to armv7-a+fp. + * gcc.target/arm/pr51915.c: Likewise. + * gcc.target/arm/pr52006.c: Likewise. + * gcc.target/arm/pr53187.c: Likewise. + +2017-06-16 Richard Earnshaw <rearnsha@arm.com> + + * gcc.target/arm/multilibs.exp: New file. + +2017-06-16 Martin Sebor <msebor@redhat.com> + + PR tree-optimization/80933 + PR tree-optimization/80934 + * gcc.dg/fold-bcopy.c: New test. + * gcc.dg/tree-ssa/ssa-dse-30.c: Likewise.. + * gcc.dg/tree-ssa/alias-36.c: Likewise. + * gcc/testsuite/gcc.dg/pr79214.c: Adjust. + * gcc.dg/tree-prof/val-prof-7.c: Likewise. + * gcc.dg/Wsizeof-pointer-memaccess1.c: Likewise. + * gcc.dg/builtins-nonnull.c: Likewise. + +2017-06-16 James Greenhalgh <james.greenhalgh@arm.com> + + PR target/71778 + * gcc.target/arm/pr71778.c: New. + +2017-06-16 Jan Hubicka <hubicka@ucw.cz> + + * gcc.dg/tree-ssa/ssa-lim-11.c: Disable branch prediction. + +2017-06-16 Richard Biener <rguenther@suse.de> + + PR tree-optimization/81090 + * gcc.dg/graphite/pr81090.c: New testcase. + +2017-06-16 Janus Weil <janus@gcc.gnu.org> + + PR fortran/80983 + * gfortran.dg/proc_ptr_comp_51.f90: Repair test case. + +2017-06-16 Jakub Jelinek <jakub@redhat.com> + + PR sanitizer/81094 + * c-c++-common/ubsan/object-size-11.c: New test. + +2017-06-15 Martin Sebor <msebor@redhat.com> + + PR c++/80560 + * g++.dg/Wclass-memaccess.C: New test. + +2017-06-15 Janus Weil <janus@gcc.gnu.org> + + PR fortran/80983 + * gfortran.dg/proc_ptr_comp_51.f90: New test. + +2017-06-15 Thomas Preud'homme <thomas.preudhomme@arm.com> + + PR lto/69866 + * gcc.dg/lto/pr69866_0.c: New test. + * gcc.dg/lto/pr69866_1.c: Likewise. + +2017-06-15 Jozef Lawrynowicz <jozef.l@somniumtech.com> + + PR target/78818 + * gcc.target/msp430/pr78818-real.c: New template for tests. + * gcc.target/msp430/pr78818-auto.c: New test. + * gcc.target/msp430/pr78818-data-region.c: New test. + * gcc.target/msp430/pr78818-data-sec.c: New test. + * gcc.target/msp430/pr78818-auto-warn.c: New test. + +2017-06-15 Thomas Preud'homme <thomas.preudhomme@arm.com> + + * gcc.target/arm/its.c: Check that no IT blocks has more than 2 + instructions in it rather than the number of IT blocks being 2. + Transfer scan directive arm_thumb2 restriction to the whole + testcase and restrict further to Thumb-only targets. + +2017-06-15 Tamar Christina <tamar.christina@arm.com> + + * gcc.target/arm/sdiv_costs_1.c: + Use dg-add-options. + +2017-06-14 Maciej W. Rozycki <macro@imgtec.com> + + * gcc.target/mips/data-sym-jump.c: Adjust for whitespace changes. + * gcc.target/mips/pr51513-1.c: New test. + * gcc.target/mips/pr51513-2.c: New test. + +2017-06-14 Richard Biener <rguenther@suse.de> + + PR tree-optimization/81083 + * gcc.dg/torture/pr81083.c: Add prototypes. + +2017-06-14 Richard Biener <rguenther@suse.de> + + PR middle-end/81088 + * c-c++-common/ubsan/pr81088.c: New testcase. + +2017-06-14 Eric Botcazou <ebotcazou@adacore.com> + + * gcc.target/sparc/overflow-4.c: Add -mno-vis3. + +2017-06-14 Andrew Pinski <apinski@cavium.com> + Naveen H.S <Naveen.Hurugalawadi@cavium.com> + + PR target/71663 + * gcc.target/aarch64/vect-init-1.c: Newtestcase. + * gcc.target/aarch64/vect-init-2.c: Likewise. + * gcc.target/aarch64/vect-init-3.c: Likewise. + * gcc.target/aarch64/vect-init-4.c: Likewise. + * gcc.target/aarch64/vect-init-5.c: Likewise. + +2017-06-14 Paolo Carlini <paolo.carlini@oracle.com> + + PR c++/58541 + * g++.dg/cpp0x/constexpr-58541.C: New. + +2017-06-14 Richard Biener <rguenther@suse.de> + + PR tree-optimization/81083 + * gcc.dg/torture/pr81083.c: New testcase. + +2017-06-14 Jakub Jelinek <jakub@redhat.com> + + * gcc.dg/tree-ssa/vrp101.c: Fix scan-tree-dump regex. + * gcc.dg/tree-ssa/builtin-sprintf-2.c: Likewise. Adjust comment. + +2017-06-13 Jakub Jelinek <jakub@redhat.com> + + PR c++/80973 + * g++.dg/ubsan/pr80973.C: New test. + + PR c++/80984 + * g++.dg/opt/nrv18.C: New test. + +2017-06-13 Martin Liska <mliska@suse.cz> + + PR sanitize/78204 + * c-c++-common/ubsan/attrib-2.c (float_cast2): Enhance the + test by adding no_sanitize attribute. + * gcc.dg/asan/use-after-scope-4.c: Likewise. + +2017-06-13 Renlin Li <renlin.li@arm.com> + + * gcc.target/arm/cold-lc.c: Update coding style, call dump_stack + conditionally. + +2017-06-13 Martin Jambor <mjambor@suse.cz> + + PR tree-optimization/80803 + PR tree-optimization/81063 + gcc.dg/tree-ssa/pr80803.c: New test. + gcc.dg/tree-ssa/pr81063.c: Likewise. + +2017-06-12 Yury Gribov <tetra2005@gmail.com> + + * c-c++-common/fold-masked-cmp-3.c: New test. + +2017-06-13 Yury Gribov <tetra2005@gmail.com> + + PR tree-optimization/67328 + * c-c++-common/fold-masked-cmp-1.c: New test. + * c-c++-common/fold-masked-cmp-2.c: Likewise. + * gcc.dg/pr46309.c: Fix pattern. + * gcc.dg/pr46309-2.c: Likewise. + +2017-06-13 Tamar Christina <tamar.christina@arm.com> + + * gcc.target/arm/sdiv_costs_1.c: + Require arm_arch_v8a_ok and add march option. + +2017-06-13 Martin Liska <mliska@suse.cz> + + * gcc.dg/tree-ssa/builtin-sprintf-2.c: Adjust scanned pattern. + * gcc.dg/tree-ssa/dump-2.c: Likewise. + * gcc.dg/tree-ssa/vrp101.c: Likewise. + +2017-06-13 Richard Biener <rguenther@suse.de> + + PR middle-end/81065 + * c-c++-common/ubsan/pr81065.c: New testcase. + +2017-06-12 Ian Lance Taylor <iant@golang.org> + + * gcc.dg/tree-prof/split-1.c: Require split_stack, don't require + freorder. Update comment to explain test. + 2017-06-12 Tamar Christina <tamar.christina@arm.com> * gcc.target/aarch64/inline-lrint_1.c: Broaden regexp. diff --git a/gcc/testsuite/c-c++-common/Wconversion-real.c b/gcc/testsuite/c-c++-common/Wconversion-real.c index 464aab05579..4b961ff4a0c 100644 --- a/gcc/testsuite/c-c++-common/Wconversion-real.c +++ b/gcc/testsuite/c-c++-common/Wconversion-real.c @@ -1,7 +1,7 @@ /* Test for diagnostics for Wconversion for floating-point. */ /* { dg-do compile } */ -/* { dg-skip-if "doubles are floats" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "doubles are floats" { "avr-*-*" } } */ /* { dg-options "-std=c99 -Wconversion" { target c } } */ /* { dg-options "-Wconversion" { target c++ } } */ /* { dg-require-effective-target large_double } */ diff --git a/gcc/testsuite/c-c++-common/dfp/convert-bfp-11.c b/gcc/testsuite/c-c++-common/dfp/convert-bfp-11.c index d16919f81ac..95c433d2c24 100644 --- a/gcc/testsuite/c-c++-common/dfp/convert-bfp-11.c +++ b/gcc/testsuite/c-c++-common/dfp/convert-bfp-11.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { ! "powerpc*-*-linux*" } { "*" } { "" } } */ +/* { dg-skip-if "" { ! "powerpc*-*-linux*" } } */ /* Test decimal float conversions to and from IBM 128-bit long double. Checks are skipped at runtime if long double is not 128 bits. diff --git a/gcc/testsuite/c-c++-common/dfp/convert-bfp-6.c b/gcc/testsuite/c-c++-common/dfp/convert-bfp-6.c index 64198a95f2a..e133f3bdac3 100644 --- a/gcc/testsuite/c-c++-common/dfp/convert-bfp-6.c +++ b/gcc/testsuite/c-c++-common/dfp/convert-bfp-6.c @@ -1,4 +1,4 @@ -/* { dg-xfail-run-if "" { lax_strtofp } "*" "" } */ +/* { dg-xfail-run-if "" { lax_strtofp } } */ /* { dg-options "-w" } */ /* This test assumes IEEE float and double. */ diff --git a/gcc/testsuite/c-c++-common/dfp/convert-bfp-9.c b/gcc/testsuite/c-c++-common/dfp/convert-bfp-9.c index e609087525a..87d502a69fb 100644 --- a/gcc/testsuite/c-c++-common/dfp/convert-bfp-9.c +++ b/gcc/testsuite/c-c++-common/dfp/convert-bfp-9.c @@ -1,4 +1,4 @@ -/* { dg-xfail-run-if "" { lax_strtofp } "*" "" } */ +/* { dg-xfail-run-if "" { lax_strtofp } } */ /* { dg-options "-w" } */ /* This test assumes IEEE float and double. */ diff --git a/gcc/testsuite/c-c++-common/fold-masked-cmp-1.c b/gcc/testsuite/c-c++-common/fold-masked-cmp-1.c new file mode 100644 index 00000000000..c56adc4d662 --- /dev/null +++ b/gcc/testsuite/c-c++-common/fold-masked-cmp-1.c @@ -0,0 +1,41 @@ +/* Based on PR 67328 */ + +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O2" } */ + +enum output_type +{ + type_pde, + type_pie, + type_relocatable, + type_dll, +}; + +struct bfd_link_info +{ + enum output_type type : 2; + unsigned int pad : 30; +}; + +#define bfd_link_pde(info) ((info)->type == type_pde) +#define bfd_link_dll(info) ((info)->type == type_dll) +#define bfd_link_relocatable(info) ((info)->type == type_relocatable) +#define bfd_link_pie(info) ((info)->type == type_pie) +#define bfd_link_executable(info) (bfd_link_pde (info) || bfd_link_pie (info)) +#define bfd_link_pic(info) (bfd_link_dll (info) || bfd_link_pie (info)) + +int result; + +void test_pic (struct bfd_link_info *info) +{ + if (bfd_link_pic (info)) + result++; +} + +int test_exe (struct bfd_link_info *info) +{ + if (bfd_link_executable (info)) + result++; +} + +/* { dg-final { scan-assembler-times "testn?b" 2 } } */ diff --git a/gcc/testsuite/c-c++-common/fold-masked-cmp-2.c b/gcc/testsuite/c-c++-common/fold-masked-cmp-2.c new file mode 100644 index 00000000000..a14bceb4566 --- /dev/null +++ b/gcc/testsuite/c-c++-common/fold-masked-cmp-2.c @@ -0,0 +1,42 @@ +/* Based on PR 67328 */ + +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-O2" } */ + +enum output_type +{ + type_pde, + type_relocatable, + type_pie, + type_dll, +}; + +struct bfd_link_info +{ + enum output_type type : 2; + unsigned int pad : 30; +}; + +#define bfd_link_pde(info) ((info)->type == type_pde) +#define bfd_link_dll(info) ((info)->type == type_dll) +#define bfd_link_relocatable(info) ((info)->type == type_relocatable) +#define bfd_link_pie(info) ((info)->type == type_pie) +#define bfd_link_executable(info) (bfd_link_pde (info) || bfd_link_pie (info)) +#define bfd_link_pic(info) (bfd_link_dll (info) || bfd_link_pie (info)) + +int result; + +void test_pic (struct bfd_link_info *info) +{ + if (bfd_link_pic (info)) + result++; +} + +int test_exe (struct bfd_link_info *info) +{ + if (bfd_link_executable (info)) + result++; +} + +/* { dg-final { scan-assembler-times "testn?b" 2 } } */ + diff --git a/gcc/testsuite/c-c++-common/fold-masked-cmp-3.c b/gcc/testsuite/c-c++-common/fold-masked-cmp-3.c new file mode 100644 index 00000000000..5531c359b81 --- /dev/null +++ b/gcc/testsuite/c-c++-common/fold-masked-cmp-3.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ +/* { dg-options "-fdump-tree-original" } */ + +void foo (int *p, int x) +{ + if ((x & 0xff) <= 7) + *p = 0; +} + +void bar (int *p, int x) +{ + if ((x & 0xff) < 8) + *p = 0; +} + +/* { dg-final { scan-tree-dump-times "(x & .*) == 0" 2 "original" } } */ diff --git a/gcc/testsuite/c-c++-common/pr41779.c b/gcc/testsuite/c-c++-common/pr41779.c index 25b0b681ca2..c42a0f58a4b 100644 --- a/gcc/testsuite/c-c++-common/pr41779.c +++ b/gcc/testsuite/c-c++-common/pr41779.c @@ -1,6 +1,6 @@ /* PR41779: Wconversion cannot see through real*integer promotions. */ /* { dg-do compile } */ -/* { dg-skip-if "doubles are floats" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "doubles are floats" { "avr-*-*" } } */ /* { dg-options "-std=c99 -Wconversion" { target c } } */ /* { dg-options "-Wconversion" { target c++ } } */ /* { dg-require-effective-target large_double } */ diff --git a/gcc/testsuite/c-c++-common/pr54486.c b/gcc/testsuite/c-c++-common/pr54486.c index b4bcf3b1015..8c311f8e7f4 100644 --- a/gcc/testsuite/c-c++-common/pr54486.c +++ b/gcc/testsuite/c-c++-common/pr54486.c @@ -1,7 +1,7 @@ /* PR middle-end/54486 */ /* { dg-do compile } */ /* { dg-options "-Wformat" } */ -/* { dg-skip-if "no POSIX printf" { *-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "no POSIX printf" { *-*-mingw* } } */ #ifdef __cplusplus extern "C" { diff --git a/gcc/testsuite/c-c++-common/ubsan/attrib-2.c b/gcc/testsuite/c-c++-common/ubsan/attrib-2.c index 71f2e58ea67..3f0a9c35d98 100644 --- a/gcc/testsuite/c-c++-common/ubsan/attrib-2.c +++ b/gcc/testsuite/c-c++-common/ubsan/attrib-2.c @@ -68,4 +68,14 @@ float_cast (void) c = d; } +__attribute__((no_sanitize(("undefined")))) +static void +float_cast2 (void) +{ + volatile double d = 300; + volatile signed char c; + c = d; +} + + /* { dg-final { scan-assembler-not "__ubsan_handle" } } */ diff --git a/gcc/testsuite/c-c++-common/ubsan/object-size-11.c b/gcc/testsuite/c-c++-common/ubsan/object-size-11.c new file mode 100644 index 00000000000..866c7ed4086 --- /dev/null +++ b/gcc/testsuite/c-c++-common/ubsan/object-size-11.c @@ -0,0 +1,53 @@ +/* PR sanitizer/81094 */ +/* { dg-do run } */ +/* { dg-skip-if "" { *-*-* } { "*" } { "-O2" } } */ +/* { dg-options "-fsanitize=object-size" } */ + +#define N 20 + +struct S { int i; }; + +__attribute__((noinline, noclone)) void +f0 (struct S s) +{ + asm volatile ("" : : "r" (s.i) : "memory"); +} + +__attribute__((noinline, noclone)) void +f1 (int i) +{ + char *orig; + struct S *p; + orig = (char *) __builtin_calloc (N, sizeof (struct S)); + p = (struct S *) orig; + f0 (*(p + i)); + f0 (p[i]); + p++; + f0 (p[i - 1]); + f0 (*(p + i - 1)); + __builtin_free (orig); +} + +/* { dg-output "load of address \[^\n\r]* with insufficient space for an object of type 'struct S'\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*note: pointer points here\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*\\^\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*load of address \[^\n\r]* with insufficient space for an object of type 'struct S'\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*note: pointer points here\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*\\^\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*load of address \[^\n\r]* with insufficient space for an object of type 'struct S'\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*note: pointer points here\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*\\^\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*load of address \[^\n\r]* with insufficient space for an object of type 'struct S'\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*note: pointer points here\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*\[^\n\r]*(\n|\r\n|\r)" } */ +/* { dg-output "\[^\n\r]*\\^" } */ + +int +main () +{ + f1 (N); + return 0; +} diff --git a/gcc/testsuite/c-c++-common/ubsan/pr81065.c b/gcc/testsuite/c-c++-common/ubsan/pr81065.c new file mode 100644 index 00000000000..1b342273f95 --- /dev/null +++ b/gcc/testsuite/c-c++-common/ubsan/pr81065.c @@ -0,0 +1,13 @@ +/* { dg-do run } */ +/* { dg-options "-fsanitize=undefined -fsanitize-undefined-trap-on-error" } */ + +unsigned char x = 154; +int foo() { + // 8575 * (254408 - 9057) = 8575 * 245351 = 2103884825 = 0x7d66bc19 + return 8575 * (1652 * x - 9057); +} + +int main() { + foo(); + return 0; +} diff --git a/gcc/testsuite/c-c++-common/ubsan/pr81088.c b/gcc/testsuite/c-c++-common/ubsan/pr81088.c new file mode 100644 index 00000000000..6753d77fbad --- /dev/null +++ b/gcc/testsuite/c-c++-common/ubsan/pr81088.c @@ -0,0 +1,11 @@ +/* { dg-do run } */ +/* { dg-options "-fsanitize=undefined -fsanitize-undefined-trap-on-error" } */ + +short s = 2; +short y = 1; +int i; +int main() +{ + i = -(s + (int)(~(unsigned)(0 / y))) + 0x7fffffff; + return 0; +} diff --git a/gcc/testsuite/c-c++-common/ubsan/pr81097.c b/gcc/testsuite/c-c++-common/ubsan/pr81097.c new file mode 100644 index 00000000000..cd323ea2acb --- /dev/null +++ b/gcc/testsuite/c-c++-common/ubsan/pr81097.c @@ -0,0 +1,12 @@ +/* { dg-do run } */ +/* { dg-options "-fsanitize=undefined -fsanitize-undefined-trap-on-error" } */ + +unsigned int a = 3309568; +unsigned int b = -1204857327; +short c = -10871; +short x; +int main() +{ + x = ((short)(~a) | ~c) + ((short)(~b) | ~c); + return 0; +} diff --git a/gcc/testsuite/g++.dg/Wclass-memaccess.C b/gcc/testsuite/g++.dg/Wclass-memaccess.C new file mode 100644 index 00000000000..4783438888e --- /dev/null +++ b/gcc/testsuite/g++.dg/Wclass-memaccess.C @@ -0,0 +1,1671 @@ +/* PR c++/80560 - warn on undefined memory operations involving non-trivial + types + { dg-do compile } + { dg-options "-Wclass-memaccess -ftrack-macro-expansion=0" } */ + +typedef __SIZE_TYPE__ size_t; + +extern "C" +{ +void* memcpy (void*, const void*, size_t); +void* memmove (void*, const void*, size_t); +void* mempcpy (void*, const void*, size_t); +void* memset (void*, int, size_t); +void* realloc (void*, size_t); +} + +/* Ordinary bzcopy and bzero aren't recognized as special. */ +#define bcopy __builtin_bcopy +#define bzero __builtin_bzero + +void sink (void*); + +#define T(fn, arglist) ((fn arglist), sink (p)) + +#if !defined TEST || TEST == TEST_TRIVIAL + +/* Trivial can be manipulated by raw memory functions. */ +struct Trivial +{ + int i; unsigned bf: 1; char *s; char a[4]; + + // Non-copy assignment doesn't make the class non-trivial or not + // trivially assignable. + Trivial& operator= (int); + + // Likewise, template assignment doesn't make the class non-trivial + // or not trivially assignable. + template <class U> + Trivial& operator= (U); +}; + +void test (Trivial *p, void *q, int x) +{ + const size_t n = x; + + T (bzero, (p, 1)); + T (bzero, (p, n)); + T (bzero, (p, sizeof *p)); + T (bzero, (q, 1)); + T (bzero, (q, n)); + T (bzero, (q, sizeof *p)); + + T (bcopy, (p, q, 1)); + T (bcopy, (p, q, n)); + T (bcopy, (p, q, sizeof *p)); + T (bcopy, (q, p, 1)); + T (bcopy, (q, p, n)); + T (bcopy, (q, p, sizeof *p)); + + T (memcpy, (p, q, 1)); + T (memcpy, (p, q, n)); + T (memcpy, (p, q, sizeof *p)); + T (memcpy, (q, p, 1)); + T (memcpy, (q, p, n)); + T (memcpy, (q, p, sizeof *p)); + + T (memset, (p, 0, 1)); + T (memset, (p, 0, n)); + T (memset, (p, 0, sizeof *p)); + T (memset, (q, 0, 1)); + T (memset, (q, 0, n)); + T (memset, (q, 0, sizeof *p)); + + T (memset, (p, 1, 1)); + T (memset, (p, 1, n)); + T (memset, (p, 1, sizeof *p)); + T (memset, (q, 1, 1)); + T (memset, (q, 1, n)); + T (memset, (q, 1, sizeof *p)); + + T (memset, (p, x, 1)); + T (memset, (p, x, n)); + T (memset, (p, x, sizeof *p)); + T (memset, (q, x, 1)); + T (memset, (q, x, n)); + T (memset, (q, x, sizeof *p)); + + T (memmove, (p, q, 1)); + T (memmove, (p, q, n)); + T (memmove, (p, q, sizeof *p)); + T (memmove, (q, p, 1)); + T (memmove, (q, p, n)); + T (memmove, (q, p, sizeof *p)); + + T (q = realloc, (p, 1)); + T (q = realloc, (p, n)); + T (q = realloc, (p, sizeof *p)); + + T (q = realloc, (q, 1)); + T (q = realloc, (q, n)); + T (q = realloc, (q, sizeof *p)); +} + +#endif + +#if !defined TEST || TEST == TEST_TRIVIAL_ACCESS + +/* TrivialAccess can be manipulated by raw memory functions in contexts + that have access to the trivial specia functions. */ +struct TrivialAccess +{ + int i; unsigned bf: 1; char *s; char a[4]; + +private: + TrivialAccess () = default; + TrivialAccess (const TrivialAccess&) = default; +protected: + TrivialAccess& operator= (const TrivialAccess&) = default; + + void test_member (const TrivialAccess*, int); + + friend void test_friend (TrivialAccess*, const TrivialAccess*, int); +}; + +void test (TrivialAccess *p, const TrivialAccess *q, int i) +{ + void *pv; + (void)&pv; + + /* Verify that a warning is issued when the copy ctor and copy + assignment are inaccessible. */ + T (bzero, (p, sizeof *p)); // { dg-warning "bzero" } + T (bcopy, (q, p, sizeof *p)); // { dg-warning "bcopy" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (pv = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +void test_friend (TrivialAccess *p, const TrivialAccess *q, int i) +{ + void *pv; + (void)&pv; + + /* Verify that no warning is issued when the otherwise inaccessible + copy ctor and copy assignment can be accessed within the current + context. */ + T (bzero, (p, sizeof *p)); + T (bcopy, (q, p, sizeof *p)); + T (memcpy, (p, q, sizeof *p)); + T (memset, (p, i, sizeof *p)); + T (memmove, (p, q, sizeof *p)); + T (pv = realloc, (p, sizeof *p)); +} + +void TrivialAccess::test_member (const TrivialAccess *q, int i) +{ + void *pv; + (void)&pv; + + TrivialAccess *p = this; + + /* Verify that no warning is issued when the otherwise inaccessible + copy ctor and copy assignment can be accessed within the current + context. */ + T (bzero, (p, sizeof *p)); + T (bcopy, (q, p, sizeof *p)); + T (memcpy, (p, q, sizeof *p)); + T (memset, (p, i, sizeof *p)); + T (memmove, (p, q, sizeof *p)); + T (pv = realloc, (p, sizeof *p)); +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_DEFAULT + +/* HasDefault is trivially copyable but should be initialized by + the ctor, not bzero or memset. */ +struct HasDefault { char a[4]; HasDefault (); }; + +void test (HasDefault *p, const HasDefault &x, + void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // HasDefault is neither trivial nor standard-layout. The warning + // should mention the former since it's more permissive than the latter + // and so more informative. + T (bzero, (p, sizeof *p)); // { dg-warning "bzero(\[^\n\r\]*). clearing an object of non-trivial type .struct HasDefault.; use assignment or value-initialization instead" } + + T (memset, (p, 0, sizeof *p)); // { dg-warning ".void\\* memset(\[^\n\r\]*). clearing an object of non-trivial type .struct HasDefault.; use assignment or value-initialization instead" } + + T (memset, (p, 1, sizeof *p)); // { dg-warning ".void\\* memset(\[^\n\r\]*). writing to an object of non-trivial type .struct HasDefault.; use assignment instead" } + + T (memset, (p, i, sizeof *p)); // { dg-warning ".void\\* memset(\[^\n\r\]*). writing to an object of non-trivial type .struct HasDefault.; use assignment instead" } + + // Copying from another object of the same type is fine. + T (bcopy, (&x, p, sizeof *p)); + T (bcopy, (&x, p, n)); + + T (memcpy, (p, &x, sizeof *p)); + T (memcpy, (p, &x, n)); + + // Copying from a void* or character buffer is also fine. + T (bcopy, (q, p, sizeof *p)); + T (bcopy, (q, p, n)); + T (bcopy, (s, p, sizeof *p)); + T (bcopy, (s, p, n)); + + T (memcpy, (p, q, sizeof *p)); + T (memcpy, (p, q, n)); + T (memcpy, (p, s, sizeof *p)); + T (memcpy, (p, s, n)); + + T (memmove, (p, q, sizeof *p)); + T (memmove, (p, q, n)); + T (memmove, (p, s, sizeof *p)); + T (memmove, (p, s, n)); + + T (mempcpy, (p, q, sizeof *p)); + T (mempcpy, (p, q, n)); + T (mempcpy, (p, s, sizeof *p)); + T (mempcpy, (p, s, n)); + + // ...but partial copies are diagnosed. + T (memcpy, (p, &x, 1)); // { dg-warning "writing to an object of a non-trivial type .struct HasDefault. leaves 3 bytes unchanged" } */ + T (memmove, (p, q, 2)); // { dg-warning "writing to an object of a non-trivial type .struct HasDefault. leaves 2 bytes unchanged" } */ + T (mempcpy, (p, q, 3)); // { dg-warning "writing to an object of a non-trivial type .struct HasDefault. leaves 1 byte unchanged" } */ + + // Otherwise, copying from an object of an unrelated type is diagnosed. + T (memcpy, (p, ia, sizeof *p)); // { dg-warning ".void\\* memcpy(\[^\n\r\]*). copying an object of non-trivial type .struct HasDefault. from an array of .const int." } + extern long *ip; + T (memcpy, (p, ip, sizeof *p)); // { dg-warning ".void\\* memcpy(\[^\n\r\]*). copying an object of non-trivial type .struct HasDefault. from an array of .long." } + + T (memmove, (p, ia, sizeof *p)); // { dg-warning ".void\\* memmove(\[^\n\r\]*). copying an object of non-trivial type .struct HasDefault. from an array of .const int." } + + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning ".void\\* mempcpy(\[^\n\r\]*). copying an object of non-trivial type .struct HasDefault. from an array of .const int." } + + // Reallocating is the same as calling memcpy except that only + // shrinking reallocation is diagnosed. + T (q = realloc, (p, 1)); // { dg-warning "moving an object of non-trivial type .struct HasDefault. and size 4 into a region of size 1" } + T (q = realloc, (p, n)); + T (q = realloc, (p, sizeof *p)); + T (q = realloc, (p, sizeof *p + 1)); +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_TEMPLATE_DEFAULT + +/* HasTemplateDefault should be initialized by means of the ctor, + not zeroed out by bzero/memset. */ +struct HasTemplateDefault +{ + template <class U> + HasTemplateDefault (U); +}; + +void test (HasTemplateDefault *p, const HasTemplateDefault &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed because value initialization is + // invalid (the template ctor makes default ctor unavailable). + T (bzero, (p, sizeof *p)); // { dg-warning "bzero" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying from an object of any type is okay. + T (bcopy, (&x, p, sizeof *p)); + T (bcopy, (q, p, sizeof *p)); + T (bcopy, (s, p, sizeof *p)); + T (bcopy, (ia, p, sizeof *p)); // { dg-warning "bcopy" } + + T (memcpy, (p, &x, sizeof *p)); + T (memcpy, (p, q, sizeof *p)); + T (memcpy, (p, s, sizeof *p)); + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); + T (memmove, (p, q, sizeof *p)); + T (memmove, (p, s, sizeof *p)); + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); + T (mempcpy, (p, q, sizeof *p)); + T (mempcpy, (p, s, sizeof *p)); + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); + T (q = realloc, (p, n)); + T (q = realloc, (p, sizeof *p)); +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_COPY + +/* HasCopy should be copied using the copy ctor or assignment, not + by memcpy or memmove. Since it's non-trivial, it should not be zeroed + out by bzero/memset either and should instead use assignment and/or + value initialization. */ +struct HasCopy { int i; HasCopy (const HasCopy&); }; + +void test (HasCopy *p, const HasCopy &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed because value initialization is invalid + // (the copy ctor makes no default ctor unavailable). Since the type + // has no default ctor verify that the suggested alternative does not + // include value-initialization. + T (bzero, (p, sizeof *p)); // { dg-warning "clearing an object of non-trivial type .struct HasCopy.; use assignment instead" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying from an object of any type is diagnosed. + T (bcopy, (&x, p, sizeof *p)); // { dg-warning "bcopy" } + T (bcopy, (q, p, sizeof *p)); // { dg-warning "bcopy" } + T (bcopy, (s, p, sizeof *p)); // { dg-warning "bcopy" } + T (bcopy, (ia, p, sizeof *p)); // { dg-warning "bcopy" } + + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_DEFAULT_AND_COPY + +/* HasDefaultAndCopy is like HasCopy above but its default ctor takes + a default argument to verify that the suggested alternative offered + by the warning includes the default ctor (i.e., the test verifies + that the default ctor is recognized as such despite taking an argument. */ + +struct HasDefaultAndCopy +{ + HasDefaultAndCopy (int = 0); // default ctor + HasDefaultAndCopy (const HasDefaultAndCopy&); +}; + +void test (HasDefaultAndCopy *p, const HasDefaultAndCopy &x) +{ + T (bzero, (p, sizeof *p)); // { dg-warning "clearing an object of non-trivial type .struct HasDefaultAndCopy.; use assignment or value-initialization instead" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "clearing an object of non-trivial type .struct HasDefaultAndCopy.; use assignment or value-initialization instead" } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_PRIVATE_COPY + +/* HasPrivateCopy cannot be copied using memcpy or memmove. Since it's + non-trivial, it it should not be zeroed out by bzero/memset either + and should instead use assignment and/or value initialization. */ +struct HasPrivateCopy { + int i; +private: + HasPrivateCopy (const HasPrivateCopy&); +}; + +void test (HasPrivateCopy *p, const HasPrivateCopy &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed because value initialization is + // invalid (the copy ctor makes no default ctor unavailable). + // Verify also that the suggestion offers assignment but not + // value initialization (since the lattare is not available). + T (bzero, (p, sizeof *p)); // { dg-warning "clearing an object of non-trivial type .struct HasPrivateCopy.; use assignment instead" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying from an object of any type is diagnosed. + T (memcpy, (p, &x, sizeof *p)); // { dg-warning ".void\\* memcpy(\[^\n\r\]*). writing to an object of non-trivially copyable type .struct HasPrivateCopy.; use copy-assignment instead" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_DTOR + +/* HasDtor should be initialized using aggregate or memberwise intialization, + not bzero or memset. */ +struct HasDtor { int i; ~HasDtor (); }; + +void test (HasDtor *p, const HasDtor &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed only because it's difficult not to. + // Otherwise, a class that's non-trivial only because it has + // a non-trivial dtor can be safely zeroed out (that's what + // value-initializing it does). + T (bzero, (p, sizeof *p)); // { dg-warning "bzero" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying from an object of any type is diagnosed simply because + // a class with a user-defined dtor is not trivially copyable. + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_DELETED_DTOR + +// HasDeletedDtor is trivial so clearing and cpying it is okay. +// Relocation would bypass the deleted dtor and so it's diagnosed. + +struct HasDeletedDtor +{ + int i; + ~HasDeletedDtor () = delete; +}; + +void test (HasDeletedDtor *p, const HasDeletedDtor &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + T (bzero, (p, sizeof *p)); + T (memset, (p, 0, sizeof *p)); + T (memset, (p, 1, sizeof *p)); + T (memset, (p, i, sizeof *p)); + + T (memcpy, (p, &x, sizeof *p)); + T (memcpy, (p, q, sizeof *p)); + T (memcpy, (p, s, sizeof *p)); + T (memcpy, (p, ia, sizeof *p)); + + T (memmove, (p, &x, sizeof *p)); + T (memmove, (p, q, sizeof *p)); + T (memmove, (p, s, sizeof *p)); + T (memmove, (p, ia, sizeof *p)); + + T (mempcpy, (p, &x, sizeof *p)); + T (mempcpy, (p, q, sizeof *p)); + T (mempcpy, (p, s, sizeof *p)); + T (mempcpy, (p, ia, sizeof *p)); + + // Reallocating is diagnosed. + T (q = realloc, (p, 1)); // { dg-warning "moving an object of type .struct HasDeletedDtor. with deleted destructor" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_PRIVATE_DTOR + +// Unlike HasDeletedDtor, HasPrivateDtor is okay to zero-out and copy +// but not relocate because doing so would bypass the deleted dtor.. + +struct HasPrivateDtor +{ + int i; +private: + ~HasPrivateDtor (); +}; + +void test (HasPrivateDtor *p, const HasPrivateDtor &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + T (bzero, (p, sizeof *p)); // { dg-warning "clearing an object of non-trivial type .struct HasPrivateDtor.; use assignment or value-initialization instead" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "writing to an object of non-trivially copyable type .struct HasPrivateDtor.; use copy-assignment or copy-initialization instead" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is diagnosed. + T (q = realloc, (p, 1)); // { dg-warning "moving an object of non-trivially copyable type .struct HasPrivateDtor." } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_COPY_ASSIGN + +/* HasCopyAssign should be copied using the copy ctor or assignment, not + by memcpy or memmove. */ +struct HasCopyAssign { void operator= (HasCopyAssign&); }; + +void test (HasCopyAssign *p, const HasCopyAssign &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed because it when used with an existing + // (already constructed) object in lieu of assigning a new value + // to it would bypass the user-defined assignment. + T (bzero, (p, sizeof *p)); // { dg-warning "bzero" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying from an object of any type is diagnosed. + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_MOVE_ASSIGN + +/* Like HasCopyAssign, HasMoveAssign should be copied using the copy + ctor or assignment, not by memcpy or memmove. */ +struct HasMoveAssign +{ +#if __cplusplus > 199711L + void operator= (HasMoveAssign&&); +#else + // C++ 98 has no reference references. Simply repeat the HasCopyAssign + // test to avoid having to add a conditional to every dg-warning directive. + void operator= (const HasMoveAssign&); +#endif +}; + +void test (HasMoveAssign *p, const HasMoveAssign &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed because it when used with an existing + // (already constructed) object in lieu of assigning a new value + // to it would bypass the user-defined assignment. + T (bzero, (p, sizeof *p)); // { dg-warning "bzero" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying from an object of any type is diagnosed. + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_TRIVIAL_COPY_HAS_MOVE_ASSIGN + +/* TrivialCopyHasMoveAssign should be copied using the copy ctor + or assignment, not by memcpy or memmove. */ +struct TrivialCopyHasMoveAssign +{ + typedef TrivialCopyHasMoveAssign Self; + + Self& operator= (const Self&) = default; + +#if __cplusplus > 199711L + Self& operator= (Self&&); +#else + // C++ 98 has no reference references. Fake the test by adding + // a non-const overload of the assignment operator (which should + // have the same effect). + Self& operator= (Self&); +#endif +}; + +void test (TrivialCopyHasMoveAssign *p, const TrivialCopyHasMoveAssign &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed because it when used with an existing + // (already constructed) object in lieu of assigning a new value + // to it would bypass the user-defined assignment. + T (bzero, (p, sizeof *p)); // { dg-warning "bzero" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying from an object of any type is diagnosed. + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_TRIVIAL_MOVE_HAS_COPY_ASSIGN + +/* TrivialMoveNontrivialCopyAssign should be copied using the copy ctor + or assignment, not by memcpy or memmove. */ +struct TrivialMoveNontrivialCopyAssign +{ + typedef TrivialMoveNontrivialCopyAssign Self; + + Self& operator= (const Self&); +#if __cplusplus > 199711L + // C++ 98 has no reference references. Fake the test by simply + // not declaring the move assignment. + Self& operator= (Self&&) = default; +#endif +}; + +void test (TrivialMoveNontrivialCopyAssign *p, + const TrivialMoveNontrivialCopyAssign &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed because it when used with an existing + // (already constructed) object in lieu of assigning a new value + // to it would bypass the user-defined assignment. + T (bzero, (p, sizeof *p)); // { dg-warning "bzero" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying from an object of any type is diagnosed. + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_TRIVIAL_ASSIGN_REF_OVERLOAD + +/* TrivialAssignRefOverload is a trivial type. */ +struct TrivialAssignRefOverload { + int i; + typedef TrivialAssignRefOverload Self; + + Self& operator= (Self&) = default; + Self& operator= (const Self&) = delete; + Self& operator= (volatile Self&) = delete; + Self& operator= (const volatile Self&) = delete; +}; + +void test (TrivialAssignRefOverload *p, const TrivialAssignRefOverload &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + T (bzero, (p, sizeof *p)); + T (memset, (p, 0, sizeof *p)); + T (memset, (p, 1, sizeof *p)); + T (memset, (p, i, sizeof *p)); + + T (memcpy, (p, &x, sizeof *p)); + T (memcpy, (p, q, sizeof *p)); + T (memcpy, (p, s, sizeof *p)); + T (memcpy, (p, ia, sizeof *p)); + + T (memmove, (p, &x, sizeof *p)); + T (memmove, (p, q, sizeof *p)); + T (memmove, (p, s, sizeof *p)); + T (memmove, (p, ia, sizeof *p)); + + T (mempcpy, (p, &x, sizeof *p)); + T (mempcpy, (p, q, sizeof *p)); + T (mempcpy, (p, s, sizeof *p)); + T (mempcpy, (p, ia, sizeof *p)); + + T (q = realloc, (p, 1)); + T (q = realloc, (p, n)); + T (q = realloc, (p, sizeof *p)); +} + +#endif + +#if !defined TEST || TEST == TEST_TRIVIAL_ASSIGN_CSTREF_OVERLOAD + +/* TrivialAssignCstOverload is a trivial type. */ +struct TrivialAssignCstRefOverload { + int i; + typedef TrivialAssignCstRefOverload Self; + + Self& operator= (Self&) = delete; + Self& operator= (const Self&) = default; + Self& operator= (volatile Self&) = delete; + Self& operator= (const volatile Self&) = delete; +}; + +void test (TrivialAssignCstRefOverload *p, + const TrivialAssignCstRefOverload &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + T (bzero, (p, sizeof *p)); + T (memset, (p, 0, sizeof *p)); + T (memset, (p, 1, sizeof *p)); + T (memset, (p, i, sizeof *p)); + + T (memcpy, (p, &x, sizeof *p)); + T (memcpy, (p, q, sizeof *p)); + T (memcpy, (p, s, sizeof *p)); + T (memcpy, (p, ia, sizeof *p)); + + T (memmove, (p, &x, sizeof *p)); + T (memmove, (p, q, sizeof *p)); + T (memmove, (p, s, sizeof *p)); + T (memmove, (p, ia, sizeof *p)); + + T (mempcpy, (p, &x, sizeof *p)); + T (mempcpy, (p, q, sizeof *p)); + T (mempcpy, (p, s, sizeof *p)); + T (mempcpy, (p, ia, sizeof *p)); + + T (q = realloc, (p, 1)); + T (q = realloc, (p, n)); + T (q = realloc, (p, sizeof *p)); +} + +#endif + +#if !defined TEST || TEST == TEST_TRIVIAL_REF_HAS_VOLREF_ASSIGN + +struct TrivialRefHasVolRefAssign +{ + typedef TrivialRefHasVolRefAssign Self; + + Self& operator= (Self&) = default; + Self& operator= (volatile Self&); +}; + +void test (TrivialRefHasVolRefAssign *p, + const TrivialRefHasVolRefAssign &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed because it when used with an existing + // (already constructed) object in lieu of assigning a new value + // to it would bypass the user-defined assignment. + T (bzero, (p, sizeof *p)); // { dg-warning "bzero" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying from an object of any type is diagnosed. + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_VOLREF_ASSIGN + +struct HasVolRefAssign { + int i; + typedef HasVolRefAssign Self; + + Self& operator= (volatile Self&); +}; + +void test (HasVolRefAssign *p, const HasVolRefAssign &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed because it when used with an existing + // (already constructed) object in lieu of assigning a new value + // to it would bypass the user-defined assignment. + T (bzero, (p, sizeof *p)); // { dg-warning "bzero" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying from an object of any type is diagnosed. + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_VIRTUALS + +/* HasVirtuals should only be manipulated by the special member functions + and not by bzero, memcpy, or any other raw memory function. Doing + otherwse might corrupt the the vtable pointer. */ +struct HasVirtuals { int i; virtual void foo (); }; + +void test (HasVirtuals *p, const HasVirtuals &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed because it corrupts the vtable. + T (bzero, (p, sizeof *p)); // { dg-warning "bzero" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying is diagnosed because when used to initialize an object + // could incorrectly initialize the vtable. + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_CONST_DATA + +/* HasConstData should only be initialized using aggregate initializatoon + and not cleared by bzero, or copied into using memcpy. Since it's not + assignable allowing, raw memory functions to write into it would defeat + const-correctness. */ +struct HasConstData { const char a[4]; }; + +void test (HasConstData *p, const HasConstData &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // The following is ill-formed because HasConstData's cannot + // be assigned (the assignment is implicitly deleted). For + // that reason all raw memory operations are diagnosed. + // *p = x; + + // Zeroing out is diagnosed because if used with an existing + // (already initialized) object could break const correctness. + // Since the default ctor and copy assignment are both deleted, + // verify that they're not suggested as a possible alternative. + T (bzero, (p, sizeof *p)); // { dg-warning "clearing an object of type .struct HasConstData. with no trivial copy-assignment \\\[" "c++ 11 and later" { target { c++11 } } } + // { dg-warning "clearing an object of type .struct HasConstData. with no trivial copy-assignment" "c++ 98" { target { c++98_only } } .-1 } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Copying is also diagnosed. + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "writing to an object of type .struct HasConstData. with no trivial copy-assignment; use copy-initialization instead" "c++ 11 and later" { target { c++11 } } } + // { dg-warning "writing to an object of type .struct HasConstData. with no trivial copy-assignment" "c++ 98" { target { c++98_only } } .-1 } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is not diagnosed except in C++ 98 due to a bug. + T (q = realloc, (p, 1)); // { dg-warning "moving an object of non-trivially copyable type .struct HasConstData.; use .new. and .delete. instead" "c++98" { target { c++98_only } } } + T (q = realloc, (p, n)); // { dg-warning "realloc" "c++98" { target { c++98_only } } } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" "c++98" { target { c++98_only } } } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_REFERENCE + +/* HasReference should only be initialized using aggregate initializatoon + and not cleared by bzero, or copied into using memcpy. Since it's not + assignable, allowing raw memory functions to write into it could + corrupt the reference. */ +struct HasReference { int &ci; }; + +void test (HasReference *p, const HasReference &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Similarly to HasConstData, the following is ill-formed because + // Hasreference cannot be assigned (the assignment is implicitly + // deleted). For that reason all raw memory operations are diagnosed. + // *p = x; + + // Zeroing out is diagnosed because if used with an existing + // (already initialized) object would invalidate the reference. + // Since copy-assignment is deleted verify it's not suggested + // as an alternative. (C++ 11 and later only; C++ 98 is broken). + T (bzero, (p, sizeof *p)); // { dg-warning "clearing an object of type .struct HasReference. with no trivial copy-assignment \\\[" "c++ 11 and later" { target { c++11 } } } + // { dg-warning "clearing an object of type .struct HasReference. with no trivial copy-assignment" "c++ 98" { target { c++98_only } } .-1 } + T (bzero, (p, n)); // { dg-warning "bzero" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 0, n)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, n)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, n)); // { dg-warning "memset" } + + // Copying is also diagnosed. + T (memcpy, (p, &x, sizeof *p)); // { dg-warning "writing to an object of type .struct HasReference. with no trivial copy-assignment; use copy-initialization instead" "c++ 11 and later" { target { c++11 } } } + // { dg-warning "writing to an object of type .struct HasReference. with no trivial copy-assignment" "c++ 98" { target { c++98_only } } .-1 } + T (memcpy, (p, &x, n)); // { dg-warning "memcpy" } + T (memcpy, (p, q, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, q, n)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, n)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, n)); // { dg-warning "memcpy" } + + T (memmove, (p, &x, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + + T (mempcpy, (p, &x, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is not diagnosed because a type with a reference + // is (perhaps surprisingly) trivially copyable. It is diagnosed + // in C++ 98 because of a bug, but it seems like it should be + // diagnosed in all modes. + T (q = realloc, (p, 1)); // { dg-warning "realloc" "c++ 98" { target { c++98_only } } } + T (q = realloc, (p, n)); // { dg-warning "realloc" "c++ 98" { target { c++98_only } } } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" "c++ 98" { target { c++98_only } } } +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_MEM_DATA_PTR + +/* HasMemDataPtr should only be initialized using aggregate initializatoon + and not cleared by bzero or written into using memset because its + representation is different from ordinary scalars (a null member data + pointer is all ones). It can be copied into using memcpy from an object + of the same type or from a character buffer. */ +struct HasMemDataPtr { int HasMemDataPtr::*p; }; + +void test (HasMemDataPtr *p, const HasMemDataPtr &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is diagnosed because a null member data pointer has + // a representation that's all bits set. + T (bzero, (p, sizeof *p)); // { dg-warning "clearing an object of type .struct HasMemDataPtr. containing a pointer-to-member" } + T (bzero, (p, n)); // { dg-warning "bzero" } + T (memset, (p, 0, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 0, n)); // { dg-warning "memset" } + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, 1, n)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, n)); // { dg-warning "memset" } + + // Copying is not diagnosed. + T (memcpy, (p, &x, sizeof *p)); + T (memcpy, (p, &x, n)); + T (memcpy, (p, q, sizeof *p)); + T (memcpy, (p, q, n)); + T (memcpy, (p, s, sizeof *p)); + T (memcpy, (p, s, n)); + T (memcpy, (p, ia, sizeof *p)); + T (memcpy, (p, ia, n)); + + T (memmove, (p, &x, sizeof *p)); + T (memmove, (p, q, sizeof *p)); + T (memmove, (p, s, sizeof *p)); + T (memmove, (p, ia, sizeof *p)); + + T (mempcpy, (p, &x, sizeof *p)); + T (mempcpy, (p, q, sizeof *p)); + T (mempcpy, (p, s, sizeof *p)); + T (mempcpy, (p, ia, sizeof *p)); + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); + T (q = realloc, (p, n)); + T (q = realloc, (p, sizeof *p)); + T (q = realloc, (p, sizeof *p + 1)); +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_SOME_PRIVATE_DATA + +/* HasSomePrivateData can be initialized using value initialization + and should not be written to using memset with a non-zero argument. + Doing otherwise would break encapsulation. */ +struct HasSomePrivateData { char a[2]; private: char b[2]; }; + +void test (HasSomePrivateData *p, const HasSomePrivateData &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is not diagnosed because it's equivalent to value + // initialization. + T (bzero, (p, sizeof *p)); + T (memset, (p, 0, sizeof *p)); + // Calling memset with a (possibly) non-zero argument is diagnosed + // because it breaks encapsulation. + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Calling memcpy to copy from an object of the same type or from + // a character or void buffer is not diagnosed because that's what + // copy construction and copy assignment do. + T (memcpy, (p, &x, sizeof *p)); + T (memcpy, (p, &x, n)); + T (memcpy, (p, q, sizeof *p)); + T (memcpy, (p, s, sizeof *p)); + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, n)); // { dg-warning "memcpy" } + + // Same as memcpy above. + T (memmove, (p, &x, sizeof *p)); + T (memmove, (p, &x, n)); + T (memmove, (p, q, sizeof *p)); + T (memmove, (p, s, sizeof *p)); + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, n)); // { dg-warning "memmove" } + + // Same as memcpy above. + T (mempcpy, (p, &x, sizeof *p)); + T (mempcpy, (p, &x, n)); + T (mempcpy, (p, q, sizeof *p)); + T (mempcpy, (p, q, n)); + T (mempcpy, (p, s, sizeof *p)); + T (mempcpy, (p, s, n)); + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, n)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy except that partial + // copies are not diagnosed. + T (q = realloc, (p, 1)); + T (q = realloc, (p, n)); + T (q = realloc, (p, sizeof *p)); + T (q = realloc, (p, sizeof *p + 1)); +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_SOME_PROTECTED_DATA + +/* Similarly to HasSomePrivateData, HasSomeProtectedData can be + initialized using value initialization and should not be written + to using memset with a non-zero argument. Doing otherwise would + break encapsulation. */ +struct HasSomeProtectedData { char a[2]; protected: char b[2]; }; + +void test (HasSomeProtectedData *p, const HasSomeProtectedData &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is not diagnosed because it's equivalent to value + // initialization. + T (bzero, (p, sizeof *p)); + T (memset, (p, 0, sizeof *p)); + // Calling memset with a (possibly) non-zero argument is diagnosed + // because it breaks encapsulation. + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Calling memcpy to copy from an object of the same type or from + // a character or void buffer is not diagnosed because that's what + // copy construction and copy assignment do. + T (memcpy, (p, &x, sizeof *p)); + T (memcpy, (p, &x, n)); + T (memcpy, (p, q, sizeof *p)); + T (memcpy, (p, s, sizeof *p)); + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, n)); // { dg-warning "memcpy" } + + // Same as memcpy above. + T (memmove, (p, &x, sizeof *p)); + T (memmove, (p, &x, n)); + T (memmove, (p, q, sizeof *p)); + T (memmove, (p, s, sizeof *p)); + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, n)); // { dg-warning "memmove" } + + // Same as memcpy above. + T (mempcpy, (p, &x, sizeof *p)); + T (mempcpy, (p, &x, n)); + T (mempcpy, (p, q, sizeof *p)); + T (mempcpy, (p, q, n)); + T (mempcpy, (p, s, sizeof *p)); + T (mempcpy, (p, s, n)); + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, n)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy except that partial + // copies are not diagnosed. + T (q = realloc, (p, 1)); + T (q = realloc, (p, n)); + T (q = realloc, (p, sizeof *p)); + T (q = realloc, (p, sizeof *p + 1)); +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_ALL_PRIVATE_DATA + +/* Similarly to HasSomePrivateData, HasAllPrivateData should only be + initialized using value initializatoon and should not be written + to using memset with non-zero argument. They are tested separately + because unlike the former classes, these are standard layout. */ +struct HasAllPrivateData { private: char a[4]; }; + +void test (HasAllPrivateData *p, const HasAllPrivateData &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is not diagnosed because it's equivalent to value + // initialization. + T (bzero, (p, sizeof *p)); + T (memset, (p, 0, sizeof *p)); + // Calling memset with a (possibly) non-zero argument is diagnosed + // because it breaks encapsulation. + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Calling memcpy to copy from an object of the same type or from + // a character or void buffer is not diagnosed because that's what + // copy construction and copy assignment do. + T (memcpy, (p, &x, sizeof *p)); + T (memcpy, (p, &x, n)); + T (memcpy, (p, q, sizeof *p)); + T (memcpy, (p, s, sizeof *p)); + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, n)); // { dg-warning "memcpy" } + + // Same as memcpy above. + T (memmove, (p, &x, sizeof *p)); + T (memmove, (p, &x, n)); + T (memmove, (p, q, sizeof *p)); + T (memmove, (p, s, sizeof *p)); + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, n)); // { dg-warning "memmove" } + + // Same as memcpy above. + T (mempcpy, (p, &x, sizeof *p)); + T (mempcpy, (p, &x, n)); + T (mempcpy, (p, q, sizeof *p)); + T (mempcpy, (p, q, n)); + T (mempcpy, (p, s, sizeof *p)); + T (mempcpy, (p, s, n)); + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, n)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy except that partial + // copies are not diagnosed. + T (q = realloc, (p, 1)); + T (q = realloc, (p, n)); + T (q = realloc, (p, sizeof *p)); + T (q = realloc, (p, sizeof *p + 1)); +} + +#endif + +#if !defined TEST || TEST == TEST_HAS_ALL_PROTECTED_DATA + +/* Similarly to HasSomeProtectedData, HasAllProtectedData should only + be initialized using value initializatoon and should not be written + to using memset with non-zero argument. They are tested separately + because unlike the former classes, these are standard layout. */ +struct HasAllProtectedData { protected: char a[4]; }; + +void test (HasAllProtectedData *p, const HasAllProtectedData &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // Zeroing out is not diagnosed because it's equivalent to value + // initialization. + T (bzero, (p, sizeof *p)); + T (memset, (p, 0, sizeof *p)); + // Calling memset with a (possibly) non-zero argument is diagnosed + // because it breaks encapsulation. + T (memset, (p, 1, sizeof *p)); // { dg-warning "memset" } + T (memset, (p, i, sizeof *p)); // { dg-warning "memset" } + + // Calling memcpy to copy from an object of the same type or from + // a character or void buffer is not diagnosed because that's what + // copy construction and copy assignment do. + T (memcpy, (p, &x, sizeof *p)); + T (memcpy, (p, &x, n)); + T (memcpy, (p, q, sizeof *p)); + T (memcpy, (p, s, sizeof *p)); + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, ia, n)); // { dg-warning "memcpy" } + + // Same as memcpy above. + T (memmove, (p, &x, sizeof *p)); + T (memmove, (p, &x, n)); + T (memmove, (p, q, sizeof *p)); + T (memmove, (p, s, sizeof *p)); + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, ia, n)); // { dg-warning "memmove" } + + // Same as memcpy above. + T (mempcpy, (p, &x, sizeof *p)); + T (mempcpy, (p, &x, n)); + T (mempcpy, (p, q, sizeof *p)); + T (mempcpy, (p, q, n)); + T (mempcpy, (p, s, sizeof *p)); + T (mempcpy, (p, s, n)); + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, ia, n)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy except that partial + // copies are not diagnosed. + T (q = realloc, (p, 1)); + T (q = realloc, (p, n)); + T (q = realloc, (p, sizeof *p)); + T (q = realloc, (p, sizeof *p + 1)); +} + +#endif + +#if !defined TEST || TEST == TEST_DEFAULT_CTOR_PRIVATE_ASSIGN + +/* Used to verify suggested alternatives. */ +struct HasDefaultPrivateAssign +{ + char a[4]; + HasDefaultPrivateAssign (); +private: + void operator= (HasDefaultPrivateAssign&); +}; + +void test (HasDefaultPrivateAssign *p, const HasDefaultPrivateAssign &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // HasDefaultPrivateAssign isn't trivial or assignable. Verify + // that the alternative suggested in the warning is to use copy or + // default but not assignment. + T (bzero, (p, sizeof *p)); // { dg-warning "bzero(\[^\n\r\]*). clearing an object of type .struct HasDefaultPrivateAssign. with no trivial copy-assignment; use value-initialization instead" "c++ 11 and later" { target { c++11 } } } + // { dg-warning "bzero(\[^\n\r\]*). clearing an object of type .struct HasDefaultPrivateAssign. with no trivial copy-assignment; use value-initialization instead" "c++ 98" { target { c++98_only } } .-1 } + + T (memset, (p, 0, sizeof *p)); // { dg-warning ".void\\* memset(\[^\n\r\]*). clearing an object of type .struct HasDefaultPrivateAssign. with (deleted|no trivial) copy-assignment; use value-initialization instead" } + + T (memset, (p, 1, sizeof *p)); // { dg-warning ".void\\* memset(\[^\n\r\]*). writing to an object of type .struct HasDefaultPrivateAssign. with (deleted|no trivial) copy-assignment" } + + T (memset, (p, i, sizeof *p)); // { dg-warning ".void\\* memset(\[^\n\r\]*). writing to an object of type .struct HasDefaultPrivateAssign. with (deleted|no trivial) copy-assignment" } + + // Copying from another object of the same type is diagnosed because + // the copy assignment is inaccessible. Verify that the suggested + // alternative is not copy assignment (C++ 98 is busted). + T (memcpy, (p, &x, sizeof *p)); // { dg-warning ".void\\* memcpy(\[^\n\r\]*). writing to an object of type .struct HasDefaultPrivateAssign. with no trivial copy-assignment; use copy-initialization instead" "c++11 and later" { target c++11 } } + // { dg-warning ".void\\* memcpy(\[^\n\r\]*). writing to an object of type .struct HasDefaultPrivateAssign. with no trivial copy-assignment" "c++98" { target c++98_only } .-1 } + T (memcpy, (p, &x, n)); // { dg-warning "memcpy" } + + // Similarly for copying from a void* or character buffer. + T (memcpy, (p, q, sizeof *p)); // { dg-warning ".void\\* memcpy(\[^\n\r\]*). writing to an object of type .struct HasDefaultPrivateAssign. with no trivial copy-assignment; use copy-initialization instead" "c++11 and later" { target c++11 } } + // { dg-warning ".void\\* memcpy(\[^\n\r\]*). writing to an object of type .struct HasDefaultPrivateAssign. with no trivial copy-assignment" "c++98" { target c++98_only } ,-1 } + T (memcpy, (p, q, n)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, n)); // { dg-warning "memcpy" } + + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, n)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, n)); // { dg-warning "memmove" } + + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, n)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, n)); // { dg-warning "mempcpy" } + + // Same for partial copies are diagnosed. + T (memcpy, (p, &x, 1)); // { dg-warning "writing to an object of type .struct HasDefaultPrivateAssign. with (deleted|no trivial) copy-assignment" } */ + T (memmove, (p, q, 2)); // { dg-warning "memmove" } */ + T (mempcpy, (p, q, 3)); // { dg-warning "mempcpy" } */ + + // Otherwise, copying from an object of an unrelated type is diagnosed. + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "writing to an object of type .struct HasDefaultPrivateAssign. with (deleted|no trivial) copy-assignment." } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_DEFAULT_CTOR_DELETED_ASSIGN + +/* Used to verify suggested alternatives. */ +struct HasDefaultDeletedAssign +{ + char a[4]; + HasDefaultDeletedAssign (); +private: + void operator= (HasDefaultDeletedAssign&); +}; + +void test (HasDefaultDeletedAssign *p, const HasDefaultDeletedAssign &x, + const void *q, const unsigned char *s, const int ia[]) +{ + const int i = *ia; + const size_t n = *ia; + + // HasDefaultDeletedAssign isn't trivial or assignable. Verify + // that the alternative suggested in the warning is to use copy or + // default but not assignment. + T (bzero, (p, sizeof *p)); // { dg-warning "bzero(\[^\n\r\]*). clearing an object of type .struct HasDefaultDeletedAssign. with no trivial copy-assignment; use value-initialization instead" "c++ 11 and later" { target { c++11 } } } + // { dg-warning "bzero(\[^\n\r\]*). clearing an object of type .struct HasDefaultDeletedAssign. with no trivial copy-assignment; use value-initialization instead" "c++ 98" { target { c++98_only } } .-1 } + + T (memset, (p, 0, sizeof *p)); // { dg-warning ".void\\* memset(\[^\n\r\]*). clearing an object of type .struct HasDefaultDeletedAssign. with (deleted|no trivial) copy-assignment; use value-initialization instead" } + + T (memset, (p, 1, sizeof *p)); // { dg-warning ".void\\* memset(\[^\n\r\]*). writing to an object of type .struct HasDefaultDeletedAssign. with (deleted|no trivial) copy-assignment" } + + T (memset, (p, i, sizeof *p)); // { dg-warning ".void\\* memset(\[^\n\r\]*). writing to an object of type .struct HasDefaultDeletedAssign. with (deleted|no trivial) copy-assignment" } + + // Copying from another object of the same type is diagnosed because + // the copy assignment is inaccessible. Verify that the suggested + // alternative is not copy assignment (C++ 98 is busted). + T (memcpy, (p, &x, sizeof *p)); // { dg-warning ".void\\* memcpy(\[^\n\r\]*). writing to an object of type .struct HasDefaultDeletedAssign. with no trivial copy-assignment; use copy-initialization instead" "c++11 and later" { target c++11 } } + // { dg-warning ".void\\* memcpy(\[^\n\r\]*). writing to an object of type .struct HasDefaultDeletedAssign. with no trivial copy-assignment" "c++98" { target c++98_only } .-1 } + T (memcpy, (p, &x, n)); // { dg-warning "memcpy" } + + // Similarly for copying from a void* or character buffer. + T (memcpy, (p, q, sizeof *p)); // { dg-warning ".void\\* memcpy(\[^\n\r\]*). writing to an object of type .struct HasDefaultDeletedAssign. with no trivial copy-assignment; use copy-initialization instead" "c++11 and later" { target c++11 } } + // { dg-warning ".void\\* memcpy(\[^\n\r\]*). writing to an object of type .struct HasDefaultDeletedAssign. with no trivial copy-assignment" "c++98" { target c++98_only } ,-1 } + T (memcpy, (p, q, n)); // { dg-warning "memcpy" } + T (memcpy, (p, s, sizeof *p)); // { dg-warning "memcpy" } + T (memcpy, (p, s, n)); // { dg-warning "memcpy" } + + T (memmove, (p, q, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, q, n)); // { dg-warning "memmove" } + T (memmove, (p, s, sizeof *p)); // { dg-warning "memmove" } + T (memmove, (p, s, n)); // { dg-warning "memmove" } + + T (mempcpy, (p, q, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, q, n)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, sizeof *p)); // { dg-warning "mempcpy" } + T (mempcpy, (p, s, n)); // { dg-warning "mempcpy" } + + // Same for partial copies are diagnosed. + T (memcpy, (p, &x, 1)); // { dg-warning "writing to an object of type .struct HasDefaultDeletedAssign. with (deleted|no trivial) copy-assignment" } */ + T (memmove, (p, q, 2)); // { dg-warning "memmove" } */ + T (mempcpy, (p, q, 3)); // { dg-warning "mempcpy" } */ + + // Otherwise, copying from an object of an unrelated type is diagnosed. + T (memcpy, (p, ia, sizeof *p)); // { dg-warning "writing to an object of type .struct HasDefaultDeletedAssign. with (deleted|no trivial) copy-assignment." } + T (memmove, (p, ia, sizeof *p)); // { dg-warning "memmove" } + T (mempcpy, (p, ia, sizeof *p)); // { dg-warning "mempcpy" } + + // Reallocating is the same as calling memcpy. + T (q = realloc, (p, 1)); // { dg-warning "realloc" } + T (q = realloc, (p, n)); // { dg-warning "realloc" } + T (q = realloc, (p, sizeof *p)); // { dg-warning "realloc" } +} + +#endif + +#if !defined TEST || TEST == TEST_EXPRESSION + +void test_expr (int i) +{ + struct TestClass { TestClass () { } }; + TestClass a, b; + + static void *p; + + T (bzero, (i < 0 ? &a : &b, 1)); // { dg-warning "bzero" } +} + +#endif + +#if !defined TEST || TEST == TEST_CTOR + +void test_ctor () +{ +#undef T +#define T(fn, arglist) (fn arglist, sink (this)) + + static void *p; + + struct TestBase + { + TestBase () + { + /* A ctor of a base class with no virtual function can do whatever + it wants. */ + T (bzero, (this, sizeof *this)); + T (memset, (this, 0, sizeof *this)); + T (memcpy, (this, p, sizeof *this)); + T (memmove, (this, p, sizeof *this)); + T (mempcpy, (this, p, sizeof *this)); + } + + ~TestBase () + { + /* A dtor of a base class with no virtual function can do whatever + it wants. */ + T (bzero, (this, sizeof *this)); + T (memset, (this, 0, sizeof *this)); + T (memcpy, (this, p, sizeof *this)); + T (memmove, (this, p, sizeof *this)); + T (mempcpy, (this, p, sizeof *this)); + } + }; + + struct TestBaseVtable + { + TestBaseVtable () + { + /* A ctor of a base class with virtual function is treated + as an ordinary function. */ + T (bzero, (this, sizeof *this)); // { dg-warning "bzero" } + T (memset, (this, 0, sizeof *this)); // { dg-warning "memset" } + T (memcpy, (this, p, sizeof *this)); // { dg-warning "memcpy" } + T (memmove, (this, p, sizeof *this)); // { dg-warning "memmove" } + T (mempcpy, (this, p, sizeof *this)); // { dg-warning "mempcpy" } + } + + ~TestBaseVtable () + { + /* A dtor of a base class with virtual function is treated + as an ordinary function. */ + T (bzero, (this, sizeof *this)); // { dg-warning "bzero" } + T (memset, (this, 0, sizeof *this)); // { dg-warning "memset" } + T (memcpy, (this, p, sizeof *this)); // { dg-warning "memcpy" } + T (memmove, (this, p, sizeof *this)); // { dg-warning "memmove" } + T (mempcpy, (this, p, sizeof *this)); // { dg-warning "mempcpy" } + } + + virtual void foo (); + }; + + struct TestDerived: HasDefault + { + TestDerived () + { + /* A derived class ctor is treated as an ordinary function. */ + T (bzero, (this, sizeof *this)); // { dg-warning "bzero" } + T (memset, (this, 0, sizeof *this)); // { dg-warning "memset" } + T (memcpy, (this, p, sizeof *this)); + T (memmove, (this, p, sizeof *this)); + T (mempcpy, (this, p, sizeof *this)); + } + }; + + struct TestDerivedDtor: HasDefault + { + ~TestDerivedDtor () + { + /* A derived class dtor is treated as an ordinary function though + it probably shouldn't be unless the base dtor is trivial. But + it doesn't seem worth the trouble. */ + T (bzero, (this, sizeof *this)); // { dg-warning "bzero" } + T (memset, (this, 0, sizeof *this)); // { dg-warning "memset" } + T (memcpy, (this, p, sizeof *this)); // { dg-warning "memcpy" } + T (memmove, (this, p, sizeof *this)); // { dg-warning "memmove" } + T (mempcpy, (this, p, sizeof *this)); // { dg-warning "mempcpy" } + } + }; +} + +#endif + +// { dg-prune-output "defaulted and deleted functions" } diff --git a/gcc/testsuite/g++.dg/abi/rtti3.C b/gcc/testsuite/g++.dg/abi/rtti3.C index 0316bcb5de2..0cc7d3e79d0 100644 --- a/gcc/testsuite/g++.dg/abi/rtti3.C +++ b/gcc/testsuite/g++.dg/abi/rtti3.C @@ -2,7 +2,7 @@ // necessarily the type info object // { dg-require-weak "" } -// { dg-skip-if "Linkonce not weak" { *-*-mingw* *-*-cygwin } { "*" } { "" } } +// { dg-skip-if "Linkonce not weak" { *-*-mingw* *-*-cygwin } } // { dg-final { scan-assembler ".weak\[ \t\]_?_ZTSPP1A" { target { ! { *-*-darwin* hppa*-*-hpux* } } } } } // { dg-final { scan-assembler-not ".weak\[ \t\]_?_ZTIPP1A" { target { ! { *-*-darwin* } } } } } // { dg-final { scan-assembler ".weak_definition\[ \t\]_?_ZTSPP1A" { target { *-*-darwin* } } } } diff --git a/gcc/testsuite/g++.dg/abi/thunk4.C b/gcc/testsuite/g++.dg/abi/thunk4.C index fa5fbd43277..6e8f124bc5e 100644 --- a/gcc/testsuite/g++.dg/abi/thunk4.C +++ b/gcc/testsuite/g++.dg/abi/thunk4.C @@ -1,5 +1,5 @@ // { dg-require-weak "" } -// { dg-skip-if "Linkonce not weak" { *-*-mingw* *-*-cygwin } { "*" } { "" } } +// { dg-skip-if "Linkonce not weak" { *-*-mingw* *-*-cygwin } } // { dg-final { scan-assembler ".weak\[ \t\]_?_ZThn._N7Derived3FooEv" { target { ! { *-*-darwin* } } } } } // { dg-final { scan-assembler ".weak_definition\[ \t\]_?_ZThn._N7Derived3FooEv" { target { *-*-darwin* } } } } diff --git a/gcc/testsuite/g++.dg/cpp0x/alignas4.C b/gcc/testsuite/g++.dg/cpp0x/alignas4.C index 871aaefed1f..baa56eb8ac5 100644 --- a/gcc/testsuite/g++.dg/cpp0x/alignas4.C +++ b/gcc/testsuite/g++.dg/cpp0x/alignas4.C @@ -1,6 +1,6 @@ // PR c++/59012 // { dg-do compile { target c++11 } } -// { dg-final { scan-assembler "align 8" { target x86_64-*-*-gnu } } } +// { dg-final { scan-assembler "align 8" { target { { i?86-*-* x86_64-*-* } && { ! *-*-darwin* } } } } } template <class... T> struct A diff --git a/gcc/testsuite/g++.dg/cpp0x/cast.C b/gcc/testsuite/g++.dg/cpp0x/cast.C index d11d7241391..75ab0e8cef6 100644 --- a/gcc/testsuite/g++.dg/cpp0x/cast.C +++ b/gcc/testsuite/g++.dg/cpp0x/cast.C @@ -3,7 +3,7 @@ // Test cast from lvalue to rvalue // { dg-do compile { target c++11 } } -// { dg-skip-if "packed attribute missing for struct one" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct one" { "epiphany-*-*" } } template <bool> struct sa; template <> struct sa<true> {}; diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-58541.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-58541.C new file mode 100644 index 00000000000..ab951d25bae --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-58541.C @@ -0,0 +1,6 @@ +// { dg-do compile { target c++11 } } + +struct X { + static constexpr const char x[] = "x"; +}; +const char X::x[]; diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-base5.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-base5.C new file mode 100644 index 00000000000..84700bccff7 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-base5.C @@ -0,0 +1,15 @@ +// PR c++/80829 +// { dg-do compile { target c++11 } } + +struct A { + constexpr A(int a) : _a(a) {} + int _a; +}; + +struct B : public A { + constexpr B(int a) : A(a) {} +}; + +int main() { + constexpr A a = B(10); +} diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-cast.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-cast.C index a50e27bdeb0..e23d0d47889 100644 --- a/gcc/testsuite/g++.dg/cpp0x/constexpr-cast.C +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-cast.C @@ -7,7 +7,7 @@ int i; // The following is accepted due to bug 49171. constexpr void *q = reinterpret_cast<void*>(&i); // { dg-error "" "bug c++/49171" { xfail *-*-* } } -constexpr void *r0 = reinterpret_cast<void*>(1); // { dg-error "not a constant expression" } +constexpr void *r0 = reinterpret_cast<void*>(1); // { dg-error "not a constant expression|reinterpret_cast from integer to pointer" } constexpr void *r1 = reinterpret_cast<void*>(sizeof 'x'); // { dg-error ".reinterpret_cast<void\\*>\\(1\[ul\]\*\\). is not a constant expression" } template <class T> diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-diag1.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-diag1.C index 450a0b5f9d4..ccb8d81adca 100644 --- a/gcc/testsuite/g++.dg/cpp0x/constexpr-diag1.C +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-diag1.C @@ -16,5 +16,5 @@ constexpr int i = ai.f(); constexpr int b = A<B>().f(); // { dg-error "" } template <class T> -constexpr int f (T t) { return 42; } // { dg-error "parameter" } -constexpr int x = f(B()); // { dg-error "constexpr" } +constexpr int f (T t) { return 42; } +constexpr int x = f(B()); // { dg-error "non-literal" } diff --git a/gcc/testsuite/g++.dg/cpp0x/constexpr-trivial2.C b/gcc/testsuite/g++.dg/cpp0x/constexpr-trivial2.C index d24111465e3..005f07befb9 100644 --- a/gcc/testsuite/g++.dg/cpp0x/constexpr-trivial2.C +++ b/gcc/testsuite/g++.dg/cpp0x/constexpr-trivial2.C @@ -10,5 +10,5 @@ struct T int main() { - constexpr T t = (T{} = T{}); + constexpr T t = (T{} = T{}); // { dg-error "" "" { target c++11_only } } } diff --git a/gcc/testsuite/g++.dg/cpp0x/inh-ctor27.C b/gcc/testsuite/g++.dg/cpp0x/inh-ctor27.C new file mode 100644 index 00000000000..ef2ada17d51 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/inh-ctor27.C @@ -0,0 +1,13 @@ +// PR c++/70844 +// { dg-options -Wuseless-cast } +// { dg-do compile { target c++11 } } + +struct base { + base (int const &); +}; + +struct derived : public base { + using base::base; +}; + +derived d(0); diff --git a/gcc/testsuite/g++.dg/cpp0x/iop.C b/gcc/testsuite/g++.dg/cpp0x/iop.C index 0a78be9f5b0..6e71ce07550 100644 --- a/gcc/testsuite/g++.dg/cpp0x/iop.C +++ b/gcc/testsuite/g++.dg/cpp0x/iop.C @@ -7,7 +7,7 @@ // section "Revision 1 Summary and Rationale" for more details. // { dg-do compile { target c++11 } } -// { dg-skip-if "packed attribute missing for struct one" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct one" { "epiphany-*-*" } } template <bool> struct sa; template <> struct sa<true> {}; diff --git a/gcc/testsuite/g++.dg/cpp0x/named_refs.C b/gcc/testsuite/g++.dg/cpp0x/named_refs.C index 850179c42fa..5139b1a1188 100644 --- a/gcc/testsuite/g++.dg/cpp0x/named_refs.C +++ b/gcc/testsuite/g++.dg/cpp0x/named_refs.C @@ -3,7 +3,7 @@ // Test: Named rvalue references are treated as lvalues. // { dg-do compile { target c++11 } } -// { dg-skip-if "packed attribute missing for struct one" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct one" { "epiphany-*-*" } } template <bool> struct sa; template <> struct sa<true> {}; diff --git a/gcc/testsuite/g++.dg/cpp0x/rv1p.C b/gcc/testsuite/g++.dg/cpp0x/rv1p.C index e87ec0e91f7..a9097276d5a 100644 --- a/gcc/testsuite/g++.dg/cpp0x/rv1p.C +++ b/gcc/testsuite/g++.dg/cpp0x/rv1p.C @@ -3,7 +3,7 @@ // Test overload resolution among reference types // { dg-do compile { target c++11 } } -// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } } // { dg-additional-options "-fno-ipa-icf" } template <bool> struct sa; diff --git a/gcc/testsuite/g++.dg/cpp0x/rv2p.C b/gcc/testsuite/g++.dg/cpp0x/rv2p.C index fb3019f2c3c..25a42ba2af8 100644 --- a/gcc/testsuite/g++.dg/cpp0x/rv2p.C +++ b/gcc/testsuite/g++.dg/cpp0x/rv2p.C @@ -3,7 +3,7 @@ // Test overload resolution among reference types // { dg-do compile { target c++11 } } -// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } } template <bool> struct sa; template <> struct sa<true> {}; diff --git a/gcc/testsuite/g++.dg/cpp0x/rv3p.C b/gcc/testsuite/g++.dg/cpp0x/rv3p.C index 6d4625ad460..2d7d78df6be 100644 --- a/gcc/testsuite/g++.dg/cpp0x/rv3p.C +++ b/gcc/testsuite/g++.dg/cpp0x/rv3p.C @@ -3,7 +3,7 @@ // Test overload resolution among reference types // { dg-do compile { target c++11 } } -// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } } template <bool> struct sa; template <> struct sa<true> {}; diff --git a/gcc/testsuite/g++.dg/cpp0x/rv4p.C b/gcc/testsuite/g++.dg/cpp0x/rv4p.C index 8d720c7a966..0e4903bc291 100644 --- a/gcc/testsuite/g++.dg/cpp0x/rv4p.C +++ b/gcc/testsuite/g++.dg/cpp0x/rv4p.C @@ -3,7 +3,7 @@ // Test overload resolution among reference types // { dg-do compile { target c++11 } } -// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } } template <bool> struct sa; template <> struct sa<true> {}; diff --git a/gcc/testsuite/g++.dg/cpp0x/rv5p.C b/gcc/testsuite/g++.dg/cpp0x/rv5p.C index 7030277541a..63441a3f0da 100644 --- a/gcc/testsuite/g++.dg/cpp0x/rv5p.C +++ b/gcc/testsuite/g++.dg/cpp0x/rv5p.C @@ -3,7 +3,7 @@ // Test overload resolution among reference types // { dg-do compile { target c++11 } } -// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } } template <bool> struct sa; template <> struct sa<true> {}; diff --git a/gcc/testsuite/g++.dg/cpp0x/rv6p.C b/gcc/testsuite/g++.dg/cpp0x/rv6p.C index 4be83431d59..26714f0c9aa 100644 --- a/gcc/testsuite/g++.dg/cpp0x/rv6p.C +++ b/gcc/testsuite/g++.dg/cpp0x/rv6p.C @@ -3,7 +3,7 @@ // Test overload resolution among reference types // { dg-do compile { target c++11 } } -// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } } template <bool> struct sa; template <> struct sa<true> {}; diff --git a/gcc/testsuite/g++.dg/cpp0x/rv7p.C b/gcc/testsuite/g++.dg/cpp0x/rv7p.C index 55fc5d760cd..60a35835c7d 100644 --- a/gcc/testsuite/g++.dg/cpp0x/rv7p.C +++ b/gcc/testsuite/g++.dg/cpp0x/rv7p.C @@ -3,7 +3,7 @@ // Test overload resolution among reference types // { dg-do compile { target c++11 } } -// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } } template <bool> struct sa; template <> struct sa<true> {}; diff --git a/gcc/testsuite/g++.dg/cpp0x/rv8p.C b/gcc/testsuite/g++.dg/cpp0x/rv8p.C index 44247938621..e12da4b8d79 100644 --- a/gcc/testsuite/g++.dg/cpp0x/rv8p.C +++ b/gcc/testsuite/g++.dg/cpp0x/rv8p.C @@ -3,7 +3,7 @@ // Test overload resolution among reference types // { dg-do compile { target c++11 } } -// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct one/three/five/seven" { "epiphany-*-*" } } template <bool> struct sa; template <> struct sa<true> {}; diff --git a/gcc/testsuite/g++.dg/cpp1y/auto-fn27.C b/gcc/testsuite/g++.dg/cpp1y/auto-fn27.C index b114df2fdd5..c019d9ef583 100644 --- a/gcc/testsuite/g++.dg/cpp1y/auto-fn27.C +++ b/gcc/testsuite/g++.dg/cpp1y/auto-fn27.C @@ -31,7 +31,7 @@ F<T>::bar (const G &) { auto s = I; typedef decltype (s) L; - auto u =[&](L) { auto t = foo (J::K (), 0); }; // { dg-error "25:'void t' has incomplete type" } + auto u =[&](L) { auto t = foo (J::K (), 0); }; // { dg-error "25:declared void" } } struct B { typedef int G; diff --git a/gcc/testsuite/g++.dg/cpp1y/auto-fn39.C b/gcc/testsuite/g++.dg/cpp1y/auto-fn39.C new file mode 100644 index 00000000000..b4ba29eb200 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp1y/auto-fn39.C @@ -0,0 +1,48 @@ +// PR c++/81045 +// { dg-do compile { target c++14 } } + +template<typename T> class vectorIterator; + +template<typename T> class vector { + public: + auto get(unsigned int i) { return data[i]; } + + auto begin() { return vectorIterator<T>{*this, 0}; } + auto end() { return vectorIterator<T>{*this, 10}; } + + private: + T data[10] = {}; +}; + +template<typename T> class vectorIterator { + public: + vectorIterator(vector<T>& self, unsigned int offset) : self(self), offset(offset) {} + + auto operator*() -> T& { return self.get(offset); } + auto operator!=(const vectorIterator& source) -> bool { return offset != source.offset; } + auto operator++() -> vectorIterator& { ++offset; return *this; } + + private: + vector<T>& self; + unsigned int offset; +}; + +class Object { + public: + template<typename T> auto cast() -> T { + return T(); + } +}; + +class Group : public Object { + public: + template<typename T = Object> auto objects() const -> void { + vector<Object> easyObjects; + for(auto obj : easyObjects) { + auto casted = obj.cast<T>(); + } + } +}; + +int main() { return 0; } + diff --git a/gcc/testsuite/g++.dg/cpp1y/constexpr-66093.C b/gcc/testsuite/g++.dg/cpp1y/constexpr-66093.C new file mode 100644 index 00000000000..ad3169210d2 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp1y/constexpr-66093.C @@ -0,0 +1,35 @@ +// { dg-do run { target c++14 } } + +#include <cassert> + +constexpr int n = 10; + +struct A { + constexpr operator const int*() const { + return data; + } + + constexpr operator int*() { + return data; + } + +private: + int data[n]; +}; + +constexpr A f() { + A a{}; + for (int i = 1; i <= n; i++) { + a[i] = i; + } + return a; +} + +A a = f(); + +int main() +{ + for (int i = 0; i < n; i++) { + assert (a[i] == i); + } +} diff --git a/gcc/testsuite/g++.dg/cpp1z/constexpr-if12.C b/gcc/testsuite/g++.dg/cpp1z/constexpr-if12.C new file mode 100644 index 00000000000..1ed2c30c5c4 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp1z/constexpr-if12.C @@ -0,0 +1,14 @@ +// PR c++/80562 +// { dg-options -std=c++1z } + +struct T { + constexpr auto foo() { return false; } +}; + +template <class MustBeTemplate> +constexpr auto bf(T t) { + if constexpr(t.foo()) { + return false; + } + return true; +} diff --git a/gcc/testsuite/g++.dg/cpp1z/noexcept-type16.C b/gcc/testsuite/g++.dg/cpp1z/noexcept-type16.C new file mode 100644 index 00000000000..8c763a536a2 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp1z/noexcept-type16.C @@ -0,0 +1,11 @@ +// PR c++/80614 +// { dg-options -std=c++1z } + +template <typename T> void fn() {} + +int main() { + // { dg-final { scan-assembler "_Z2fnIKFvvEEvv" } } + fn<void() const>(); + // { dg-final { scan-assembler "_Z2fnIKDoFvvEEvv" } } + fn<void() const noexcept>(); +} diff --git a/gcc/testsuite/g++.dg/cpp1z/noexcept-type17.C b/gcc/testsuite/g++.dg/cpp1z/noexcept-type17.C new file mode 100644 index 00000000000..46aefddedf8 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp1z/noexcept-type17.C @@ -0,0 +1,7 @@ +// PR c++/80465 +// { dg-options -std=c++1z } + +int foo(...); +int main() { + [](auto a) noexcept(noexcept(foo(a))){}(42); +} diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/const2b.C b/gcc/testsuite/g++.dg/debug/dwarf2/const2b.C index 81360c2439f..3ad1c080945 100644 --- a/gcc/testsuite/g++.dg/debug/dwarf2/const2b.C +++ b/gcc/testsuite/g++.dg/debug/dwarf2/const2b.C @@ -1,4 +1,4 @@ -/* { dg-do compile { target i386*-*-* } } */ +/* { dg-do compile { target i386*-*-* x86_64-*-* } } */ /* { dg-options "-O -gdwarf-2 -dA -msse" } */ /* { dg-require-effective-target sse } */ /* { dg-final { scan-assembler "DW_AT_const_value" } } */ diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/pr61433.C b/gcc/testsuite/g++.dg/debug/dwarf2/pr61433.C index 221727c19a6..a217d960205 100644 --- a/gcc/testsuite/g++.dg/debug/dwarf2/pr61433.C +++ b/gcc/testsuite/g++.dg/debug/dwarf2/pr61433.C @@ -1,6 +1,6 @@ // PR c++/61433 // { dg-do compile { target c++11 } } -// { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } +// { dg-xfail-if "" { powerpc-ibm-aix* } } // { dg-options "-O -fcompare-debug -fno-inline -fno-ipa-pure-const -fipa-sra" } template <class T> diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/pubnames-2.C b/gcc/testsuite/g++.dg/debug/dwarf2/pubnames-2.C index bf94707de94..af0f6f1b95c 100644 --- a/gcc/testsuite/g++.dg/debug/dwarf2/pubnames-2.C +++ b/gcc/testsuite/g++.dg/debug/dwarf2/pubnames-2.C @@ -1,5 +1,5 @@ // { dg-do compile { target c++11 } } -// { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } +// { dg-skip-if "" { powerpc-ibm-aix* } } // { dg-options "-gpubnames -gdwarf-4 -fno-debug-types-section -dA" } // { dg-final { scan-assembler-times "\.section\[\t \]\[^\n\]*debug_pubnames" 1 } } // { dg-final { scan-assembler "\"\\(anonymous namespace\\)\\\\0\"+\[ \t\]+\[#;/|@!]+\[ \t\]+external name" } } diff --git a/gcc/testsuite/g++.dg/debug/dwarf2/pubnames-3.C b/gcc/testsuite/g++.dg/debug/dwarf2/pubnames-3.C index 6ea8cbbbcfc..63b870bc8e7 100644 --- a/gcc/testsuite/g++.dg/debug/dwarf2/pubnames-3.C +++ b/gcc/testsuite/g++.dg/debug/dwarf2/pubnames-3.C @@ -1,5 +1,5 @@ // { dg-do compile { target c++11 } } -// { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } +// { dg-skip-if "" { powerpc-ibm-aix* } } // { dg-options "-gpubnames -gdwarf-4 -fdebug-types-section -dA" } // { dg-final { scan-assembler-times "\.section\[\t \]\[^\n\]*debug_pubnames" 1 } } // { dg-final { scan-assembler "\"\\(anonymous namespace\\)\\\\0\"+\[ \t\]+\[#;/|@!]+\[ \t\]+external name" } } diff --git a/gcc/testsuite/g++.dg/debug/pr46583.C b/gcc/testsuite/g++.dg/debug/pr46583.C index 06160b11103..04b1fbf76b8 100644 --- a/gcc/testsuite/g++.dg/debug/pr46583.C +++ b/gcc/testsuite/g++.dg/debug/pr46583.C @@ -1,7 +1,7 @@ // PR debug/46583 // { dg-do compile } // { dg-options "-O -fno-inline -fipa-cp -fipa-cp-clone -fcompare-debug" } -// { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } +// { dg-xfail-if "" { powerpc-ibm-aix* } } template < typename = unsigned long >struct A { diff --git a/gcc/testsuite/g++.dg/debug/pr47106.C b/gcc/testsuite/g++.dg/debug/pr47106.C index 9ef276ad0a7..d8d414dd4a5 100644 --- a/gcc/testsuite/g++.dg/debug/pr47106.C +++ b/gcc/testsuite/g++.dg/debug/pr47106.C @@ -1,7 +1,7 @@ // { dg-do compile } // { dg-options "-O -fpartial-inlining -flto -fconserve-stack -fcompare-debug" } // { dg-require-effective-target lto } -// { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } +// { dg-xfail-if "" { powerpc-ibm-aix* } } void end (int, int) __attribute__ ((__noreturn__)); diff --git a/gcc/testsuite/g++.dg/debug/pr56294.C b/gcc/testsuite/g++.dg/debug/pr56294.C index a9ee807631f..301fcb1a100 100644 --- a/gcc/testsuite/g++.dg/debug/pr56294.C +++ b/gcc/testsuite/g++.dg/debug/pr56294.C @@ -1,6 +1,6 @@ // { dg-do compile } // { dg-options "-fno-ipa-sra -fcompare-debug" } -// { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } +// { dg-xfail-if "" { powerpc-ibm-aix* } } struct comp_cost { int cost; unsigned complexity; }; struct cost_pair { struct iv_cand *cand; }; diff --git a/gcc/testsuite/g++.dg/debug/pr56819.C b/gcc/testsuite/g++.dg/debug/pr56819.C index bc61cb760b8..4aa86b03ef0 100644 --- a/gcc/testsuite/g++.dg/debug/pr56819.C +++ b/gcc/testsuite/g++.dg/debug/pr56819.C @@ -1,7 +1,7 @@ // PR debug/56819 // { dg-do compile } // { dg-options "-fcompare-debug" } -// { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } +// { dg-xfail-if "" { powerpc-ibm-aix* } } template <typename> struct A diff --git a/gcc/testsuite/g++.dg/debug/pr71432.C b/gcc/testsuite/g++.dg/debug/pr71432.C index 14e5a38b5c1..1682f126f12 100644 --- a/gcc/testsuite/g++.dg/debug/pr71432.C +++ b/gcc/testsuite/g++.dg/debug/pr71432.C @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ namespace std { diff --git a/gcc/testsuite/g++.dg/eh/spbp.C b/gcc/testsuite/g++.dg/eh/spbp.C index 181e65d213f..244060562fe 100644 --- a/gcc/testsuite/g++.dg/eh/spbp.C +++ b/gcc/testsuite/g++.dg/eh/spbp.C @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-options "-gdwarf-2" } */ -/* { dg-skip-if "No Dwarf" { { *-*-aix* hppa*-*-hpux* } && { ! hppa*64*-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "No Dwarf" { { *-*-aix* hppa*-*-hpux* } && { ! hppa*64*-*-* } } } */ /* This was a bug on x86-darwin, where the register numbering for SP and BP was swapped (it's easy to do because on that port it's diff --git a/gcc/testsuite/g++.dg/ext/alignof2.C b/gcc/testsuite/g++.dg/ext/alignof2.C index 912863ea164..22175902f83 100644 --- a/gcc/testsuite/g++.dg/ext/alignof2.C +++ b/gcc/testsuite/g++.dg/ext/alignof2.C @@ -3,7 +3,7 @@ // wrong for some fields. // { dg-do run } -// { dg-xfail-run-if "AIX ABI increases struct alignment for first member double" { powerpc-ibm-aix* } { "*" } { "" } } +// { dg-xfail-run-if "AIX ABI increases struct alignment for first member double" { powerpc-ibm-aix* } } extern "C" void abort(); diff --git a/gcc/testsuite/g++.dg/ext/cleanup-5.C b/gcc/testsuite/g++.dg/ext/cleanup-5.C index db4c2bbc8cc..167f01a7cc5 100644 --- a/gcc/testsuite/g++.dg/ext/cleanup-5.C +++ b/gcc/testsuite/g++.dg/ext/cleanup-5.C @@ -1,7 +1,7 @@ /* HP-UX libunwind.so doesn't provide _UA_END_OF_STACK */ /* { dg-do run } */ /* { dg-options "-fexceptions" } */ -/* { dg-skip-if "" { "ia64-*-hpux11.*" } { "*" } { "" } } */ +/* { dg-skip-if "" { "ia64-*-hpux11.*" } } */ /* Verify that cleanups work with exception handling. */ #include <unwind.h> diff --git a/gcc/testsuite/g++.dg/ext/packed12.C b/gcc/testsuite/g++.dg/ext/packed12.C new file mode 100644 index 00000000000..2ad14de102d --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/packed12.C @@ -0,0 +1,6 @@ +// PR c++/80972 + +struct A { int i; }; +struct B { A a; } __attribute__((packed)); + +A a = B().a; diff --git a/gcc/testsuite/g++.dg/ext/spe1.C b/gcc/testsuite/g++.dg/ext/spe1.C index 8b1e630ecc0..b98d4b27b3d 100644 --- a/gcc/testsuite/g++.dg/ext/spe1.C +++ b/gcc/testsuite/g++.dg/ext/spe1.C @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single -O0" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ typedef int v2si __attribute__ ((vector_size (8))); diff --git a/gcc/testsuite/g++.dg/ext/stmtexpr19.C b/gcc/testsuite/g++.dg/ext/stmtexpr19.C new file mode 100644 index 00000000000..0c19a210f70 --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/stmtexpr19.C @@ -0,0 +1,17 @@ +// PR c++/81073 +// { dg-options "" } +// { dg-do compile { target c++11 } } + +struct test { const int *addr; }; + +const test* setup() +{ + static constexpr test atest = + { + ({ static const int inner = 123; &inner; }) // { dg-error "static" } + }; + + return &atest; +} + +int main(){} diff --git a/gcc/testsuite/g++.dg/ext/strncpy-chk1.C b/gcc/testsuite/g++.dg/ext/strncpy-chk1.C index ff591a01f99..b94c3bdb77a 100644 --- a/gcc/testsuite/g++.dg/ext/strncpy-chk1.C +++ b/gcc/testsuite/g++.dg/ext/strncpy-chk1.C @@ -1,7 +1,7 @@ // PR c++/40502 // { dg-do compile } // { dg-options "-O2" } -// { dg-skip-if "packed attribute missing for struct A" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for struct A" { "epiphany-*-*" } } struct A { char x[12], y[35]; }; struct B { char z[50]; }; diff --git a/gcc/testsuite/g++.dg/ext/visibility/class1.C b/gcc/testsuite/g++.dg/ext/visibility/class1.C index 792fc789142..c9a1d26124d 100644 --- a/gcc/testsuite/g++.dg/ext/visibility/class1.C +++ b/gcc/testsuite/g++.dg/ext/visibility/class1.C @@ -3,7 +3,7 @@ // { dg-options "-fpic" } // { dg-do compile { target i?86-*-* x86_64-*-* } } -// { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } +// { dg-skip-if "" { *-*-darwin* } } // { dg-require-visibility "" } // { dg-require-effective-target fpic } // { dg-final { scan-assembler "InitEv@PLT" } } diff --git a/gcc/testsuite/g++.dg/gomp/pr81154.C b/gcc/testsuite/g++.dg/gomp/pr81154.C new file mode 100644 index 00000000000..dc0aec33e14 --- /dev/null +++ b/gcc/testsuite/g++.dg/gomp/pr81154.C @@ -0,0 +1,57 @@ +// PR c++/81154 +// { dg-do compile } + +template <typename T> +struct C +{ + int foo (T n) const + { +#pragma omp parallel shared (foo) // { dg-error "is not a variable in clause" } + ; +#pragma omp parallel private (foo) // { dg-error "is not a variable in clause" } + ; +#pragma omp parallel firstprivate (foo) // { dg-error "is not a variable in clause" } + ; +#pragma omp parallel for lastprivate (foo) // { dg-error "is not a variable in clause" } + for (T i = 0; i < n; i++) + ; +#pragma omp parallel for linear (foo) // { dg-error "is not a variable in clause" } + for (T i = 0; i < n; i++) + ; +#pragma omp parallel reduction (+:foo) // { dg-error "is not a variable in clause" } + ; + return 0; + } + int foo (int x, int y) { return x; } +}; + +struct D +{ + typedef int T; + int foo (T n) const + { +#pragma omp parallel shared (foo) // { dg-error "is not a variable in clause" } + ; +#pragma omp parallel private (foo) // { dg-error "is not a variable in clause" } + ; +#pragma omp parallel firstprivate (foo) // { dg-error "is not a variable in clause" } + ; +#pragma omp parallel for lastprivate (foo) // { dg-error "is not a variable in clause" } + for (T i = 0; i < n; i++) + ; +#pragma omp parallel for linear (foo) // { dg-error "is not a variable in clause" } + for (T i = 0; i < n; i++) + ; +#pragma omp parallel reduction (+:foo) // { dg-error "is not a variable in clause" } + ; + return 0; + } + int foo (int x, int y) { return x; } +}; + +int +main () +{ + C<int> ().foo (1); + D ().foo (1); +} diff --git a/gcc/testsuite/g++.dg/lookup/pr67074.C b/gcc/testsuite/g++.dg/lookup/pr67074.C new file mode 100644 index 00000000000..ce31ede1588 --- /dev/null +++ b/gcc/testsuite/g++.dg/lookup/pr67074.C @@ -0,0 +1,18 @@ +// PR c++/67074 namespace aliases to the same place. + +namespace P { + namespace X { + static int i = 1; + } +} +namespace Q { + namespace X = P::X; +} + +using namespace P; +using namespace Q; + +void Frob () { X::i; } + +namespace N {} +namespace N = N; diff --git a/gcc/testsuite/g++.dg/lookup/pr79766.C b/gcc/testsuite/g++.dg/lookup/pr79766.C new file mode 100644 index 00000000000..de9bbb5fab9 --- /dev/null +++ b/gcc/testsuite/g++.dg/lookup/pr79766.C @@ -0,0 +1,29 @@ +// { dg-do compile { target c++11 } } +// PR 79766 qualified name to find inline namespace is ok + +namespace Y +{ + inline namespace X + { + void Q (); + } +} + +void Y::Q () // OK -> Y::X::Q +{ +} + +inline namespace Z +{ + void R (); +} + +void ::R () // OK -> Z::R +{ +} + +void S (); + +void ::S () // { dg-error "explicit qualification" } +{ +} diff --git a/gcc/testsuite/g++.dg/lookup/pr81124.C b/gcc/testsuite/g++.dg/lookup/pr81124.C new file mode 100644 index 00000000000..d80d88aeaa3 --- /dev/null +++ b/gcc/testsuite/g++.dg/lookup/pr81124.C @@ -0,0 +1,11 @@ +// { dg-do compile { target c++11 } } +// c++/81124 ICE with inline namespace + +namespace std { +inline namespace { +int to_string(); +void to_string(int); +} +void to_string(); +} +int std::to_string(); diff --git a/gcc/testsuite/g++.dg/lto/20100302_0.C b/gcc/testsuite/g++.dg/lto/20100302_0.C index 0551e6ebcab..a9fb5c73971 100644 --- a/gcc/testsuite/g++.dg/lto/20100302_0.C +++ b/gcc/testsuite/g++.dg/lto/20100302_0.C @@ -1,5 +1,5 @@ // Test for ABI forward-compatibility aliases with LTO. -// { dg-skip-if "" { { ! { i?86-*-* x86_64-*-* } } || { *-*-darwin* } } { "*" } { "" } } +// { dg-skip-if "" { { ! { i?86-*-* x86_64-*-* } } || { *-*-darwin* } } } // { dg-lto-options {"-flto -fabi-version=2"} } #include "20100302.h" diff --git a/gcc/testsuite/g++.dg/opt/nrv18.C b/gcc/testsuite/g++.dg/opt/nrv18.C new file mode 100644 index 00000000000..92e9bdf3dbc --- /dev/null +++ b/gcc/testsuite/g++.dg/opt/nrv18.C @@ -0,0 +1,12 @@ +// PR c++/80984 +// { dg-do compile } + +struct A { ~A (); }; + +A +foo () +{ + A a; +a: + return a; +} diff --git a/gcc/testsuite/g++.dg/opt/pr60002.C b/gcc/testsuite/g++.dg/opt/pr60002.C index 8a1799584ec..ceba0b7afb3 100644 --- a/gcc/testsuite/g++.dg/opt/pr60002.C +++ b/gcc/testsuite/g++.dg/opt/pr60002.C @@ -1,7 +1,7 @@ // PR tree-optimization/60002 // { dg-do compile } // { dg-options "-O2 -fcompare-debug -fdeclone-ctor-dtor -fipa-cp-clone" } -// { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } +// { dg-xfail-if "" { powerpc-ibm-aix* } } struct A {}; diff --git a/gcc/testsuite/g++.dg/opt/vt1.C b/gcc/testsuite/g++.dg/opt/vt1.C index ba871fba2d8..1b087189f40 100644 --- a/gcc/testsuite/g++.dg/opt/vt1.C +++ b/gcc/testsuite/g++.dg/opt/vt1.C @@ -1,8 +1,8 @@ // Test whether vtable for S is not put into read-only section. // { dg-do compile { target fpic } } // { dg-options "-O2 -fpic -fno-rtti" } -// { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } { "*" } { "" } } -// { dg-skip-if "No Windows PIC" { *-*-mingw* *-*-cygwin } { "*" } { "" } } +// { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } } +// { dg-skip-if "No Windows PIC" { *-*-mingw* *-*-cygwin } } // Origin: Jakub Jelinek <jakub@redhat.com> struct S diff --git a/gcc/testsuite/g++.dg/other/fsyntax-only1.C b/gcc/testsuite/g++.dg/other/fsyntax-only1.C new file mode 100644 index 00000000000..19adb7e6129 --- /dev/null +++ b/gcc/testsuite/g++.dg/other/fsyntax-only1.C @@ -0,0 +1,45 @@ +// PR c++/80831 +// { dg-options -fsyntax-only } +// { dg-do compile { target c++11 } } + +class A +{ +public: + virtual ~A() { } +}; + +class B { }; + +class C : public A { }; + +template<class J> +class D : public C +{ +public: + D() { } + ~D() { } +}; + +class E +{ +public: + static E& p(); + B q(); + template<class J> + B q(void (J::*r)()) + { + new D<J>(); + return q(); + } +}; + +void t() +{ + class F + { + public: + virtual void s() { } + }; + E& x = E::p(); + B y = x.q(&F::s); +} diff --git a/gcc/testsuite/g++.dg/other/old-style-cast-fixits.C b/gcc/testsuite/g++.dg/other/old-style-cast-fixits.C new file mode 100644 index 00000000000..a10b623f981 --- /dev/null +++ b/gcc/testsuite/g++.dg/other/old-style-cast-fixits.C @@ -0,0 +1,95 @@ +// { dg-options "-Wold-style-cast -fdiagnostics-show-caret" } + +struct foo {}; +struct bar { const foo *field; }; + +void test_1 (void *ptr) +{ + foo *f = (foo *)ptr; // { dg-warning "old-style cast" } + /* { dg-begin-multiline-output "" } + foo *f = (foo *)ptr; + ^~~ + ---------- + static_cast<foo *> (ptr) + { dg-end-multiline-output "" } */ +} + +void test_2 (const foo *ptr) +{ + foo *f = (foo *)ptr; // { dg-warning "old-style cast" } + /* { dg-begin-multiline-output "" } + foo *f = (foo *)ptr; + ^~~ + ---------- + const_cast<foo *> (ptr) + { dg-end-multiline-output "" } */ +} + +void test_3 (bar *ptr) +{ + foo *f = (foo *)ptr; // { dg-warning "old-style cast" } + /* { dg-begin-multiline-output "" } + foo *f = (foo *)ptr; + ^~~ + ---------- + reinterpret_cast<foo *> (ptr) + { dg-end-multiline-output "" } */ +} + +void test_4 (bar *ptr) +{ + foo *f = (foo *)ptr->field; // { dg-warning "old-style cast" } + /* { dg-begin-multiline-output "" } + foo *f = (foo *)ptr->field; + ^~~~~ + ----------------- + const_cast<foo *> (ptr->field) + { dg-end-multiline-output "" } */ +} + +void test_5 () +{ + bar b_inst; + foo *f = (foo *)&b_inst; // { dg-warning "old-style cast" } + /* { dg-begin-multiline-output "" } + foo *f = (foo *)&b_inst; + ^~~~~~ + -------------- + reinterpret_cast<foo *> (&b_inst) + { dg-end-multiline-output "" } */ +} + +/* We don't offer suggestions for templates. */ + +template <typename T> +void test_6 (void *ptr) +{ + foo *f = (foo *)ptr; // { dg-warning "old-style cast" } + /* { dg-begin-multiline-output "" } + foo *f = (foo *)ptr; + ^~~ + { dg-end-multiline-output "" } */ +} + +/* We don't offer suggestions where a single C++-style cast can't be + used. */ + +void test_7 (const void *ptr) +{ + foo *f = (foo *)ptr; // { dg-warning "old-style cast" } + /* { dg-begin-multiline-output "" } + foo *f = (foo *)ptr; + ^~~ + { dg-end-multiline-output "" } */ +} + +/* Likewise, no single C++-style cast is usable here. */ + +void test_8 (const bar &b_inst) +{ + foo *f = (foo *)&b_inst; // { dg-warning "old-style cast" } + /* { dg-begin-multiline-output "" } + foo *f = (foo *)&b_inst; + ^~~~~~ + { dg-end-multiline-output "" } */ +} diff --git a/gcc/testsuite/g++.dg/other/opaque-1.C b/gcc/testsuite/g++.dg/other/opaque-1.C index 5cdaeafe31a..669776b9f97 100644 --- a/gcc/testsuite/g++.dg/other/opaque-1.C +++ b/gcc/testsuite/g++.dg/other/opaque-1.C @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ #define __vector __attribute__((vector_size(8))) typedef float __vector __ev64_fs__; diff --git a/gcc/testsuite/g++.dg/other/opaque-2.C b/gcc/testsuite/g++.dg/other/opaque-2.C index 3bb4af2c778..414f87e6c9a 100644 --- a/gcc/testsuite/g++.dg/other/opaque-2.C +++ b/gcc/testsuite/g++.dg/other/opaque-2.C @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ #define __vector __attribute__((vector_size(8))) typedef float __vector __ev64_fs__; diff --git a/gcc/testsuite/g++.dg/other/opaque-3.C b/gcc/testsuite/g++.dg/other/opaque-3.C index 5ece652c0cd..f915f840510 100644 --- a/gcc/testsuite/g++.dg/other/opaque-3.C +++ b/gcc/testsuite/g++.dg/other/opaque-3.C @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ __ev64_opaque__ o; #define v __attribute__((vector_size(8))) diff --git a/gcc/testsuite/g++.dg/other/pr42685.C b/gcc/testsuite/g++.dg/other/pr42685.C index 3c55955accc..dd070c42410 100644 --- a/gcc/testsuite/g++.dg/other/pr42685.C +++ b/gcc/testsuite/g++.dg/other/pr42685.C @@ -1,6 +1,6 @@ // { dg-do compile } // { dg-options "-O -funroll-loops -fcompare-debug" } -// { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } +// { dg-xfail-if "" { powerpc-ibm-aix* } } void Remap(int n, int *src, int *dst, int *map) { diff --git a/gcc/testsuite/g++.dg/other/ucnid-1.C b/gcc/testsuite/g++.dg/other/ucnid-1.C index 95a31cb80fd..954f34dff96 100644 --- a/gcc/testsuite/g++.dg/other/ucnid-1.C +++ b/gcc/testsuite/g++.dg/other/ucnid-1.C @@ -1,7 +1,7 @@ /* { dg-do run } */ /* { dg-options "" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ -/* { dg-skip-if "" { ! ucn } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ +/* { dg-skip-if "" { ! ucn } } */ #include <cstdlib> int \u00C0(void) { return 1; } diff --git a/gcc/testsuite/g++.dg/other/unused1.C b/gcc/testsuite/g++.dg/other/unused1.C index b28d69874f0..77625d080f8 100644 --- a/gcc/testsuite/g++.dg/other/unused1.C +++ b/gcc/testsuite/g++.dg/other/unused1.C @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-g" } */ -/* { dg-skip-if "" { { hppa*-*-hpux* *-*-solaris2.[56]* powerpc-ibm-aix* } && { ! hppa*64*-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "" { { hppa*-*-hpux* powerpc-ibm-aix* } && { ! hppa*64*-*-* } } } */ /* Make sure we didn't eliminate casted types because we thought they were unused. */ diff --git a/gcc/testsuite/g++.dg/parse/namespace-alias-1.C b/gcc/testsuite/g++.dg/parse/namespace-alias-1.C index 5986ab69d00..220d5f9decd 100644 --- a/gcc/testsuite/g++.dg/parse/namespace-alias-1.C +++ b/gcc/testsuite/g++.dg/parse/namespace-alias-1.C @@ -3,7 +3,7 @@ namespace N { namespace M = N; // { dg-message "previous declaration" } - namespace M {} // { dg-error "declaration of namespace" } + namespace M {} // { dg-error "conflicts with a previous declaration" } } namespace A diff --git a/gcc/testsuite/g++.dg/parse/template28.C b/gcc/testsuite/g++.dg/parse/template28.C new file mode 100644 index 00000000000..6868bc85285 --- /dev/null +++ b/gcc/testsuite/g++.dg/parse/template28.C @@ -0,0 +1,10 @@ +// PR c++/79056 + +template<class> struct A {}; + +template<class T> void foo(A<T>=A<T>()) {} // { dg-error "" } + +void bar() +{ + foo(A<int>()); // { dg-error "" } +} diff --git a/gcc/testsuite/g++.dg/parse/typedef2.C b/gcc/testsuite/g++.dg/parse/typedef2.C index 3ae347d7542..1cc1ea0d58f 100644 --- a/gcc/testsuite/g++.dg/parse/typedef2.C +++ b/gcc/testsuite/g++.dg/parse/typedef2.C @@ -1,3 +1,2 @@ template <typename T> struct B { typedef typename T::X X; }; -template <typename T> struct A { typedef B<T>::X::Y Z; }; // { dg-error "" } - +template <typename T> struct A { typedef B<T>::X::Y Z; }; // { dg-error "before 'B<T>::X::Y' because 'B<T>::X'" } diff --git a/gcc/testsuite/g++.dg/pr65240-1.C b/gcc/testsuite/g++.dg/pr65240-1.C index 3282b8e5eef..837da2d33ec 100644 --- a/gcc/testsuite/g++.dg/pr65240-1.C +++ b/gcc/testsuite/g++.dg/pr65240-1.C @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3 -ffast-math -mcmodel=small -mno-fp-in-toc" } */ diff --git a/gcc/testsuite/g++.dg/pr65240-2.C b/gcc/testsuite/g++.dg/pr65240-2.C index 80cb82f82f5..19712b2e2f0 100644 --- a/gcc/testsuite/g++.dg/pr65240-2.C +++ b/gcc/testsuite/g++.dg/pr65240-2.C @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3 -ffast-math -mcmodel=small -mfp-in-toc" } */ diff --git a/gcc/testsuite/g++.dg/pr65240-3.C b/gcc/testsuite/g++.dg/pr65240-3.C index 57f0b801691..bafde4c95c2 100644 --- a/gcc/testsuite/g++.dg/pr65240-3.C +++ b/gcc/testsuite/g++.dg/pr65240-3.C @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3 -ffast-math -mcmodel=medium" } */ diff --git a/gcc/testsuite/g++.dg/pr65240-4.C b/gcc/testsuite/g++.dg/pr65240-4.C index b6a1007a84b..82c406f280e 100644 --- a/gcc/testsuite/g++.dg/pr65240-4.C +++ b/gcc/testsuite/g++.dg/pr65240-4.C @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O3 -ffast-math" } */ diff --git a/gcc/testsuite/g++.dg/pr65242.C b/gcc/testsuite/g++.dg/pr65242.C index c1230565861..be2ddaa85b2 100644 --- a/gcc/testsuite/g++.dg/pr65242.C +++ b/gcc/testsuite/g++.dg/pr65242.C @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3" } */ diff --git a/gcc/testsuite/g++.dg/pr67211.C b/gcc/testsuite/g++.dg/pr67211.C index 4afc69f4538..cb3d342c122 100644 --- a/gcc/testsuite/g++.dg/pr67211.C +++ b/gcc/testsuite/g++.dg/pr67211.C @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -mtune=power8 -O3 -w" } */ diff --git a/gcc/testsuite/g++.dg/pr69667.C b/gcc/testsuite/g++.dg/pr69667.C index df445629bf1..2b3e93d2e1e 100644 --- a/gcc/testsuite/g++.dg/pr69667.C +++ b/gcc/testsuite/g++.dg/pr69667.C @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power8 -w -std=c++14 -mlra" } */ diff --git a/gcc/testsuite/g++.dg/pr78112-2.C b/gcc/testsuite/g++.dg/pr78112-2.C index 7ffaee85886..c174bd31215 100644 --- a/gcc/testsuite/g++.dg/pr78112-2.C +++ b/gcc/testsuite/g++.dg/pr78112-2.C @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "No dwarf debug support" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "No dwarf debug support" { hppa*-*-hpux* } } */ /* { dg-options "-g -dA -gdwarf-4 -std=gnu++11" } */ /* { dg-options "-g -dA -std=gnu++11 -gdwarf-4" } */ /* { dg-final { scan-assembler-times DW_AT_object_pointer 18 } } */ diff --git a/gcc/testsuite/g++.dg/template/explicit6.C b/gcc/testsuite/g++.dg/template/explicit6.C index a28fd9e66a3..24fa50df209 100644 --- a/gcc/testsuite/g++.dg/template/explicit6.C +++ b/gcc/testsuite/g++.dg/template/explicit6.C @@ -5,4 +5,4 @@ // Bug 19895: ICE on invalid struct A; -template A<>::A(); // { dg-error "(not a template)|(explicit qualification)" } +template A<>::A(); // { dg-error "(should have been)|(not a template)" } diff --git a/gcc/testsuite/g++.dg/template/partial-specialization6.C b/gcc/testsuite/g++.dg/template/partial-specialization6.C new file mode 100644 index 00000000000..51a15905839 --- /dev/null +++ b/gcc/testsuite/g++.dg/template/partial-specialization6.C @@ -0,0 +1,28 @@ +// PR c++/80174 + +typedef unsigned char uint8_t; + +template <typename T> +struct HighestMaxFieldIdx { + static const uint8_t maxFieldIdx = T::fieldIdx; +}; + +template <typename This> +struct Outer { + + template <uint8_t _fieldIdx, typename T, T This::*field> + struct Varint {}; + + + template <uint8_t _fieldIdx, uint8_t This::*field> + struct Varint<_fieldIdx, uint8_t, field> { + static const uint8_t fieldIdx = _fieldIdx; + }; +}; + +struct Msg { + uint8_t a; + + static const uint8_t t + = HighestMaxFieldIdx<Outer<Msg>::Varint<1, uint8_t, &Msg::a> >::maxFieldIdx; +}; diff --git a/gcc/testsuite/g++.dg/template/partial-specialization7.C b/gcc/testsuite/g++.dg/template/partial-specialization7.C new file mode 100644 index 00000000000..aa42191e178 --- /dev/null +++ b/gcc/testsuite/g++.dg/template/partial-specialization7.C @@ -0,0 +1,40 @@ +// PR c++/81102 + +template <typename FuncSig, FuncSig f> +struct HelperWrapper; + +// [...] + +template <typename Ret, Ret (&Func)()> +struct HelperWrapper<Ret (&)(), Func> +{ + static inline int WrapFuncT(const int) + { + return 0; // Changed + } +}; + +// Unary +template <typename Ret, typename Arg1, Ret (&Func)(Arg1)> +struct HelperWrapper<Ret (&)(Arg1), Func> +{ + static inline int WrapFuncT(const int) + { + return 1; // Changed + } +}; + +// Binary +template <typename Ret, typename Arg1, typename Arg2, Ret (&Func)(Arg1, Arg2)> +struct HelperWrapper<Ret (&)(Arg1, Arg2), Func> +{ + static inline int WrapFuncT(const int) + { + return 2; // Changed + } +}; + +int main() +{ + return 0; +} diff --git a/gcc/testsuite/g++.dg/template/partial5.C b/gcc/testsuite/g++.dg/template/partial5.C index 1b56fb39fa1..ee45a936a0c 100644 --- a/gcc/testsuite/g++.dg/template/partial5.C +++ b/gcc/testsuite/g++.dg/template/partial5.C @@ -14,7 +14,7 @@ template<typename T, typename T::foo V> struct Y { }; template<typename T, typename U, U v> -struct Y<T, v> { }; // { dg-error "" } +struct Y<T, v> { }; // { dg-error "" "" { target { ! c++1z } } } template<typename T, T V> diff --git a/gcc/testsuite/g++.dg/template/ptrmem31.C b/gcc/testsuite/g++.dg/template/ptrmem31.C new file mode 100644 index 00000000000..5c66b72cb8f --- /dev/null +++ b/gcc/testsuite/g++.dg/template/ptrmem31.C @@ -0,0 +1,23 @@ +// PR c++/80639 +// { dg-do compile { target c++14 } } + +template < typename > struct A; + +struct B +{ + template < int > void m (); + template < int > struct K { static void n (); }; + void p () { K < 0 >::n (); } +}; + +template <> struct A < B > +{ + using T = void (A::*)(); + template < int u > static constexpr T h = &B::m < u >; // { dg-error "cannot convert" } +}; + +template < int v > void B::K < v >::n () +{ + using S = A < B >; + S::h < 0 >; +} diff --git a/gcc/testsuite/g++.dg/torture/pr31863.C b/gcc/testsuite/g++.dg/torture/pr31863.C index f10ad5f0137..646178a9670 100644 --- a/gcc/testsuite/g++.dg/torture/pr31863.C +++ b/gcc/testsuite/g++.dg/torture/pr31863.C @@ -1,6 +1,6 @@ /* { dg-do link } */ /* { dg-timeout-factor 2.0 } */ -/* { dg-skip-if "Program too big" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "Program too big" { "avr-*-*" } } */ namespace Loki { diff --git a/gcc/testsuite/g++.dg/torture/pr81112.C b/gcc/testsuite/g++.dg/torture/pr81112.C new file mode 100644 index 00000000000..e9ef2a84cbf --- /dev/null +++ b/gcc/testsuite/g++.dg/torture/pr81112.C @@ -0,0 +1,68 @@ +// { dg-do compile } +// { dg-additional-options "-Wno-psabi" } + +class AssertionResult { + bool success_; +}; + +AssertionResult AssertionSuccess(); + +template <typename T1> +AssertionResult EXPECT_EQ(const T1& expected, const T1& actual) { + if (expected == actual) { + return AssertionSuccess(); + } + return AssertionSuccess(); +} + +struct uuid +{ + unsigned char data[16]; +}; + +bool operator== (uuid const& lhs, uuid const& rhs); + +typedef long long __m128i __attribute__ ((__vector_size__ (16), __may_alias__)); +typedef int __v4si __attribute__ ((__vector_size__ (16))); +typedef char __v16qi __attribute__ ((__vector_size__ (16))); +typedef long long __m128i_u __attribute__ ((__vector_size__ (16), __may_alias__, __aligned__ (1))); + +int foo (__v16qi); + +extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_loadu_si128 (__m128i_u const *__P) +{ + return *__P; +} +extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_cmpeq_epi32 (__m128i __A, __m128i __B) +{ + return (__m128i) ((__v4si)__A == (__v4si)__B); +} +extern __inline int __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_movemask_epi8 (__m128i __A) +{ + return foo ((__v16qi)__A); +} + + +__m128i load_unaligned_si128(const unsigned char* p) +{ + return _mm_loadu_si128(reinterpret_cast< const __m128i* >(p)); +} + +inline bool operator== (uuid const& lhs, uuid const& rhs) +{ + __m128i mm_left = load_unaligned_si128(lhs.data); + __m128i mm_right = load_unaligned_si128(rhs.data); + + __m128i mm_cmp = _mm_cmpeq_epi32(mm_left, mm_right); + + return _mm_movemask_epi8(mm_cmp) == 0xFFFF; +} + +void crash_gcc7() +{ + static const uuid u = uuid(); + EXPECT_EQ(u, u); +} diff --git a/gcc/testsuite/g++.dg/torture/stackalign/eh-alloca-1.C b/gcc/testsuite/g++.dg/torture/stackalign/eh-alloca-1.C index 7c124fe330c..ea181ae7519 100644 --- a/gcc/testsuite/g++.dg/torture/stackalign/eh-alloca-1.C +++ b/gcc/testsuite/g++.dg/torture/stackalign/eh-alloca-1.C @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ #include "check.h" diff --git a/gcc/testsuite/g++.dg/torture/stackalign/eh-global-1.C b/gcc/testsuite/g++.dg/torture/stackalign/eh-global-1.C index 48a59ebf22f..609c0c95394 100644 --- a/gcc/testsuite/g++.dg/torture/stackalign/eh-global-1.C +++ b/gcc/testsuite/g++.dg/torture/stackalign/eh-global-1.C @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ #include "check.h" diff --git a/gcc/testsuite/g++.dg/torture/stackalign/eh-inline-1.C b/gcc/testsuite/g++.dg/torture/stackalign/eh-inline-1.C index b8c04d95ddf..b56f7c8ff40 100644 --- a/gcc/testsuite/g++.dg/torture/stackalign/eh-inline-1.C +++ b/gcc/testsuite/g++.dg/torture/stackalign/eh-inline-1.C @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ #include "check.h" diff --git a/gcc/testsuite/g++.dg/torture/stackalign/eh-inline-2.C b/gcc/testsuite/g++.dg/torture/stackalign/eh-inline-2.C index 53ff0ccf18b..b535f1c2f0a 100644 --- a/gcc/testsuite/g++.dg/torture/stackalign/eh-inline-2.C +++ b/gcc/testsuite/g++.dg/torture/stackalign/eh-inline-2.C @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ #include "check.h" diff --git a/gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-1.C b/gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-1.C index 9c3c0f5db89..61da41035ed 100644 --- a/gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-1.C +++ b/gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-1.C @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ #include <stdarg.h> #include "check.h" diff --git a/gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-2.C b/gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-2.C index aa9b2bda8fb..8a5f02916be 100644 --- a/gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-2.C +++ b/gcc/testsuite/g++.dg/torture/stackalign/eh-vararg-2.C @@ -1,6 +1,6 @@ /* { dg-options "-Wno-abi" {target arm_eabi} } */ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ #include <stdarg.h> #include "check.h" diff --git a/gcc/testsuite/g++.dg/torture/stackalign/throw-1.C b/gcc/testsuite/g++.dg/torture/stackalign/throw-1.C index 3eddc1d02ab..bce29e3f752 100644 --- a/gcc/testsuite/g++.dg/torture/stackalign/throw-1.C +++ b/gcc/testsuite/g++.dg/torture/stackalign/throw-1.C @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ #include "check.h" diff --git a/gcc/testsuite/g++.dg/torture/stackalign/throw-2.C b/gcc/testsuite/g++.dg/torture/stackalign/throw-2.C index 63a8c6e7c21..0e0d37c52c7 100644 --- a/gcc/testsuite/g++.dg/torture/stackalign/throw-2.C +++ b/gcc/testsuite/g++.dg/torture/stackalign/throw-2.C @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ #include "check.h" diff --git a/gcc/testsuite/g++.dg/torture/stackalign/throw-4.C b/gcc/testsuite/g++.dg/torture/stackalign/throw-4.C index 52e6f7ff7e6..77414f0cdef 100644 --- a/gcc/testsuite/g++.dg/torture/stackalign/throw-4.C +++ b/gcc/testsuite/g++.dg/torture/stackalign/throw-4.C @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ #include "check.h" diff --git a/gcc/testsuite/g++.dg/ubsan/pr80973.C b/gcc/testsuite/g++.dg/ubsan/pr80973.C new file mode 100644 index 00000000000..b534fdbab6f --- /dev/null +++ b/gcc/testsuite/g++.dg/ubsan/pr80973.C @@ -0,0 +1,16 @@ +// PR c++/80973 +// { dg-do compile } +// { dg-options "-fsanitize=undefined -std=c++14" } + +struct A { + A(); + A(const A &); +}; +struct B { + B(); + template <typename... Args> auto g(Args &&... p1) { + return [=] { f(p1...); }; + } + void f(A, const char *); +}; +B::B() { g(A(), ""); } diff --git a/gcc/testsuite/g++.dg/ubsan/pr81111.C b/gcc/testsuite/g++.dg/ubsan/pr81111.C new file mode 100644 index 00000000000..6d54a2fdf91 --- /dev/null +++ b/gcc/testsuite/g++.dg/ubsan/pr81111.C @@ -0,0 +1,45 @@ +// PR sanitizer/81111 +// { dg-do compile } +// { dg-options "-fsanitize=shift" } + +template <typename V> +struct N +{ + static const V m = (((V)(-1) < 0) + ? (V)1 << (sizeof(V) * __CHAR_BIT__ - ((V)(-1) < 0)) + : (V) 0); +}; + +template<typename V> +const V N<V>::m; + +template <typename V> +struct O +{ + static const V m = (V)1 << sizeof(V) * __CHAR_BIT__; +}; + +template<typename V> +const V O<V>::m; + +void +foo () +{ + N<long long>::m; + N<unsigned long long>::m; +#ifdef __SIZEOF_INT128__ + N<__int128>::m; + N<unsigned __int128>::m; +#endif +} + +void +bar () +{ + O<long long>::m; + O<unsigned long long>::m; +#ifdef __SIZEOF_INT128__ + O<__int128>::m; + O<unsigned __int128>::m; +#endif +} diff --git a/gcc/testsuite/g++.dg/ubsan/pr81125.C b/gcc/testsuite/g++.dg/ubsan/pr81125.C new file mode 100644 index 00000000000..c91ddc7db0e --- /dev/null +++ b/gcc/testsuite/g++.dg/ubsan/pr81125.C @@ -0,0 +1,20 @@ +// PR sanitizer/81125 +// { dg-do compile } +// { dg-options "-fsanitize=undefined" } + +#ifdef __SIZEOF_INT128__ +typedef __int128 T; +#else +typedef long long int T; +#endif + +struct A +{ + A (long); + T a; +}; + +A::A (long c) +{ + long b = a % c; +} diff --git a/gcc/testsuite/g++.dg/vect/pr70944.cc b/gcc/testsuite/g++.dg/vect/pr70944.cc index f8973aaff53..3c9e3ceb585 100644 --- a/gcc/testsuite/g++.dg/vect/pr70944.cc +++ b/gcc/testsuite/g++.dg/vect/pr70944.cc @@ -1,4 +1,4 @@ -/* { dg-do compile { target x86_64-*-* } } */ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ /* { dg-additional-options "-O3 -march=core-avx2" } */ unsigned *a; diff --git a/gcc/testsuite/g++.dg/warn/Wunused-local-typedefs-4.C b/gcc/testsuite/g++.dg/warn/Wunused-local-typedefs-4.C new file mode 100644 index 00000000000..7efe1125477 --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/Wunused-local-typedefs-4.C @@ -0,0 +1,13 @@ +// PR c++/60063 +// { dg-options -Wunused-local-typedefs } + +template <class> struct S; + +void foo (int i) { + typedef __attribute__ ((used)) S<int> X; +} + +template <class T> +void bar (T i) { + typedef __attribute__ ((used)) S<T> Y; +} diff --git a/gcc/testsuite/g++.dg/warn/pr81119.C b/gcc/testsuite/g++.dg/warn/pr81119.C new file mode 100644 index 00000000000..2f822361e2b --- /dev/null +++ b/gcc/testsuite/g++.dg/warn/pr81119.C @@ -0,0 +1,20 @@ +// PR c++/81119 Wshadow regression +// { dg-additional-options "-Wshadow" } + +struct A; +typedef A A; // No warning, does not hide + +struct B; // { dg-message "previous" } +typedef int B; // { dg-error "conflicting" } + +struct C; +void C (); // { dg-warning "hides constructor" } +void C (int); // warning not repeated + +struct D; +int D; // no warning, not a function + +struct E; + +enum X + {E}; // no warning, not a function diff --git a/gcc/testsuite/g++.dg/warn/weak1.C b/gcc/testsuite/g++.dg/warn/weak1.C index 456e6f34c53..7af7e4c8450 100644 --- a/gcc/testsuite/g++.dg/warn/weak1.C +++ b/gcc/testsuite/g++.dg/warn/weak1.C @@ -1,10 +1,10 @@ // { dg-do run } // { dg-require-weak "" } // The PA HP-UX dynamic loader doesn't support unsatisfied weak symbols. -// { dg-skip-if "No unsat" { hppa*-*-hpux* } { "*" } { "" } } -// { dg-skip-if "No weak unsat" { *-*-aix* } { "*" } { "" } } +// { dg-skip-if "No unsat" { hppa*-*-hpux* } } +// { dg-skip-if "No weak unsat" { *-*-aix* } } // The darwin loader does, but they do need to exist at link time. -// { dg-skip-if "No link unsat" { *-*-darwin* } { "*" } { "" } } +// { dg-skip-if "No link unsat" { *-*-darwin* } } // For kernel modules and static RTPs, the loader treats undefined weak // symbols in the same way as undefined strong symbols. The test // therefore fails to load, so skip it. diff --git a/gcc/testsuite/g++.old-deja/g++.brendan/crash43.C b/gcc/testsuite/g++.old-deja/g++.brendan/crash43.C index 8c73d70d0bf..91cf681930d 100644 --- a/gcc/testsuite/g++.old-deja/g++.brendan/crash43.C +++ b/gcc/testsuite/g++.old-deja/g++.brendan/crash43.C @@ -1,5 +1,5 @@ // { dg-do assemble } -// { dg-xfail-if "" { sparc64-*-elf } { "*" } { "" } } +// { dg-xfail-if "" { sparc64-*-elf } } // { dg-options "-g" } // GROUPS passed old-abort extern "C" { typedef int jmp_buf[12]; } diff --git a/gcc/testsuite/g++.old-deja/g++.brendan/synth1.C b/gcc/testsuite/g++.old-deja/g++.brendan/synth1.C index 3a27e63cf04..cd7bd231abd 100644 --- a/gcc/testsuite/g++.old-deja/g++.brendan/synth1.C +++ b/gcc/testsuite/g++.old-deja/g++.brendan/synth1.C @@ -1,5 +1,5 @@ // { dg-do assemble } -// { dg-xfail-if "" { sparc64-*-elf } { "*" } { "" } } +// { dg-xfail-if "" { sparc64-*-elf } } // { dg-options "-pedantic-errors -g -Wall" } // GROUPS passed synthetics // Check to make sure that g++ doesn't get freaked out about the use diff --git a/gcc/testsuite/g++.old-deja/g++.eh/badalloc1.C b/gcc/testsuite/g++.old-deja/g++.eh/badalloc1.C index f63d5c63e4a..b660e845d5b 100644 --- a/gcc/testsuite/g++.old-deja/g++.eh/badalloc1.C +++ b/gcc/testsuite/g++.old-deja/g++.eh/badalloc1.C @@ -3,7 +3,6 @@ // itself call malloc(), and will fail if there is no more // memory available. // { dg-do run { xfail { { xstormy16-*-* *-*-darwin[3-7]* } || vxworks_rtp } } } -// { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } // Copyright (C) 2000, 2002, 2003, 2010, 2012, 2014 Free Software Foundation, Inc. // Contributed by Nathan Sidwell 6 June 2000 <nathan@codesourcery.com> @@ -16,12 +15,6 @@ extern "C" void *memcpy(void *, const void *, size_t); // libstdc++ requires a large initialization time allocation for the // emergency EH allocation pool. Add that to the arena size. -// Assume that STACK_SIZE defined implies a system that does not have a -// large data space either, and additionally that we're not linking against -// a shared libstdc++ (which requires quite a bit more initialization space). -#ifdef STACK_SIZE -const int arena_size = 256 + 8 * 128; -#else #if defined(__FreeBSD__) || defined(__sun__) || defined(__hpux__) // FreeBSD, Solaris and HP-UX require even more space at initialization time. // FreeBSD 5 now requires over 131072 bytes. @@ -32,7 +25,6 @@ const int arena_size = 262144 + 72 * 1024; // 32-bit-systems-based estimate. const int arena_size = 32768 * ((sizeof (void *) + 3)/4) + 72 * 1024; #endif -#endif struct object { diff --git a/gcc/testsuite/g++.old-deja/g++.jason/thunk2.C b/gcc/testsuite/g++.old-deja/g++.jason/thunk2.C index 88e06d8766f..427ef7f921d 100644 --- a/gcc/testsuite/g++.old-deja/g++.jason/thunk2.C +++ b/gcc/testsuite/g++.old-deja/g++.jason/thunk2.C @@ -1,6 +1,6 @@ // { dg-do run { target fpic } } // { dg-options "-fPIC" } -// { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } { "*" } { "" } } +// { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } } // Test that non-variadic function calls using thunks and PIC work right. struct A { diff --git a/gcc/testsuite/g++.old-deja/g++.jason/thunk3.C b/gcc/testsuite/g++.old-deja/g++.jason/thunk3.C index 5ea46f537c3..394172700c3 100644 --- a/gcc/testsuite/g++.old-deja/g++.jason/thunk3.C +++ b/gcc/testsuite/g++.old-deja/g++.jason/thunk3.C @@ -1,5 +1,5 @@ // { dg-do run } -// { dg-skip-if "fails with generic thunk support" { rs6000-*-* powerpc-*-eabi v850-*-* sh-*-* h8*-*-* xtensa*-*-* m32r*-*-* lm32-*-* nios2-*-* } { "*" } { "" } } +// { dg-skip-if "fails with generic thunk support" { rs6000-*-* powerpc-*-eabi v850-*-* sh-*-* h8*-*-* xtensa*-*-* m32r*-*-* lm32-*-* nios2-*-* } } // Test that variadic function calls using thunks work right. // Note that this will break on any target that uses the generic thunk // support, because it doesn't support variadic functions. diff --git a/gcc/testsuite/g++.old-deja/g++.law/bit-fields2.C b/gcc/testsuite/g++.old-deja/g++.law/bit-fields2.C index 270fc8aab17..abf733fe193 100644 --- a/gcc/testsuite/g++.old-deja/g++.law/bit-fields2.C +++ b/gcc/testsuite/g++.old-deja/g++.law/bit-fields2.C @@ -16,7 +16,7 @@ // defined to no larger than the size of an unsigned int, or where // PCC_BITFIELD_TYPE_MATTERS is defined. Add skips below for targets that // do not have that property. -// { dg-skip-if "" { mmix-knuth-mmixware } { "*" } { "" } } +// { dg-skip-if "" { mmix-knuth-mmixware } } #include <stdio.h> diff --git a/gcc/testsuite/g++.old-deja/g++.mike/eh46.C b/gcc/testsuite/g++.old-deja/g++.mike/eh46.C index 9785e6ad189..ab3e02090bf 100644 --- a/gcc/testsuite/g++.old-deja/g++.mike/eh46.C +++ b/gcc/testsuite/g++.old-deja/g++.mike/eh46.C @@ -1,5 +1,5 @@ // { dg-do assemble } -// { dg-xfail-if "" { arm-*-pe } { "*" } { "" } } +// { dg-xfail-if "" { arm-*-pe } } // { dg-options "-fexceptions" } int atoi(const char *); diff --git a/gcc/testsuite/g++.old-deja/g++.mike/ns15.C b/gcc/testsuite/g++.old-deja/g++.mike/ns15.C index 4e767b83630..7768f698e37 100644 --- a/gcc/testsuite/g++.old-deja/g++.mike/ns15.C +++ b/gcc/testsuite/g++.old-deja/g++.mike/ns15.C @@ -1,5 +1,5 @@ // { dg-do assemble } -// { dg-xfail-if "" { xstormy16-*-* } { "*" } { "" } } +// { dg-xfail-if "" { xstormy16-*-* } } #include <stdio.h> #include <stdlib.h> diff --git a/gcc/testsuite/g++.old-deja/g++.mike/p10416.C b/gcc/testsuite/g++.old-deja/g++.mike/p10416.C index 766a27b4be7..f95056ca6ce 100644 --- a/gcc/testsuite/g++.old-deja/g++.mike/p10416.C +++ b/gcc/testsuite/g++.old-deja/g++.mike/p10416.C @@ -1,5 +1,5 @@ // { dg-do assemble } -// { dg-xfail-if "" { sparc64-*-elf arm-*-pe } { "*" } { "" } } +// { dg-xfail-if "" { sparc64-*-elf arm-*-pe } } // { dg-options "-fexceptions" } // prms-id: 10416 diff --git a/gcc/testsuite/g++.old-deja/g++.other/comdat5.C b/gcc/testsuite/g++.old-deja/g++.other/comdat5.C index ad707f57247..3336496392a 100644 --- a/gcc/testsuite/g++.old-deja/g++.other/comdat5.C +++ b/gcc/testsuite/g++.old-deja/g++.other/comdat5.C @@ -2,6 +2,6 @@ // { dg-do link { target fpic } } // { dg-additional-sources " comdat5-aux.cc" } // { dg-options "-O2 -fPIC" } -// { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } { "*" } { "" } } +// { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } } #include "comdat4.C" diff --git a/gcc/testsuite/g++.old-deja/g++.other/decl5.C b/gcc/testsuite/g++.old-deja/g++.other/decl5.C index 9167061c6b1..3ac91379e76 100644 --- a/gcc/testsuite/g++.old-deja/g++.other/decl5.C +++ b/gcc/testsuite/g++.old-deja/g++.other/decl5.C @@ -53,8 +53,8 @@ namespace N { namespace NMS { - void NMS::fn(); // { dg-error "explicit qual" } - int NMS::i; // { dg-error "explicit qual" } + void NMS::fn(); // { dg-error "should have been" } + int NMS::i; // { dg-error "should have been" } struct NMS::D { // { dg-error "does not name a class" } int i; }; diff --git a/gcc/testsuite/g++.old-deja/g++.other/local-alloc1.C b/gcc/testsuite/g++.old-deja/g++.other/local-alloc1.C index 7488f1971c4..d595d9866cf 100644 --- a/gcc/testsuite/g++.old-deja/g++.other/local-alloc1.C +++ b/gcc/testsuite/g++.old-deja/g++.other/local-alloc1.C @@ -1,6 +1,6 @@ // { dg-do assemble { target fpic } } // { dg-options "-O0 -fpic" } -// { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } { "*" } { "" } } +// { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } } // Origin: Jakub Jelinek <jakub@redhat.com> struct bar { diff --git a/gcc/testsuite/g++.old-deja/g++.pt/asm1.C b/gcc/testsuite/g++.old-deja/g++.pt/asm1.C index 068a90f9ac6..28728bb15ed 100644 --- a/gcc/testsuite/g++.old-deja/g++.pt/asm1.C +++ b/gcc/testsuite/g++.old-deja/g++.pt/asm1.C @@ -1,6 +1,6 @@ // { dg-do assemble { target i?86-*-linux* i?86-*-gnu* x86_64-*-linux* } } // We'd use ebx with 32-bit pic code, so skip. -// { dg-skip-if "" { ilp32 && { ! nonpic } } { "*" } { "" } } +// { dg-skip-if "" { ilp32 && { ! nonpic } } } // Origin: "Weidmann, Nicholas" <nicholas.weidmann@swx.ch> template<int i> int foo(int v) diff --git a/gcc/testsuite/g++.old-deja/g++.pt/crash16.C b/gcc/testsuite/g++.old-deja/g++.pt/crash16.C index aa25c22b862..30bd0cc2dd5 100644 --- a/gcc/testsuite/g++.old-deja/g++.pt/crash16.C +++ b/gcc/testsuite/g++.old-deja/g++.pt/crash16.C @@ -1,5 +1,5 @@ // { dg-do assemble } -// { dg-xfail-if "" { xstormy16-*-* } { "*" } { "" } } +// { dg-xfail-if "" { xstormy16-*-* } } // { dg-options "" } extern "C" void qsort(void *base, __SIZE_TYPE__ nmemb, __SIZE_TYPE__ size, diff --git a/gcc/testsuite/g++.old-deja/g++.pt/static6.C b/gcc/testsuite/g++.old-deja/g++.pt/static6.C index 3ff41fead3a..b2928538bdb 100644 --- a/gcc/testsuite/g++.old-deja/g++.pt/static6.C +++ b/gcc/testsuite/g++.old-deja/g++.pt/static6.C @@ -1,5 +1,5 @@ // { dg-do link } -// { dg-xfail-if "" { *-*-aout *-*-coff *-*-hms } { "*" } { "" } } +// { dg-xfail-if "" { *-*-aout *-*-coff *-*-hms } } // Simplified from testcase by Erez Louidor Lior <s3824888@techst02.technion.ac.il> diff --git a/gcc/testsuite/gcc.c-torture/compile/20000804-1.c b/gcc/testsuite/gcc.c-torture/compile/20000804-1.c index 38e42be2040..5c6b7311c25 100644 --- a/gcc/testsuite/gcc.c-torture/compile/20000804-1.c +++ b/gcc/testsuite/gcc.c-torture/compile/20000804-1.c @@ -1,10 +1,10 @@ /* This does not work on h8300 due to the use of an asm statement to force a 'long long' (64-bits) to go in a register. */ /* { dg-do assemble } */ -/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } { "*" } { "" } } */ -/* { dg-skip-if "No 64-bit registers" { m32c-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } } */ +/* { dg-skip-if "No 64-bit registers" { m32c-*-* } } */ /* { dg-skip-if "Not enough 64-bit registers" { pdp11-*-* } { "-O0" } { "" } } */ -/* { dg-xfail-if "" { h8300-*-* } { "*" } { "" } } */ +/* { dg-xfail-if "" { h8300-*-* } } */ /* Copyright (C) 2000, 2003 Free Software Foundation */ __complex__ long long f () diff --git a/gcc/testsuite/gcc.c-torture/compile/20001226-1.c b/gcc/testsuite/gcc.c-torture/compile/20001226-1.c index 687b43a6bcb..be0bdcf7631 100644 --- a/gcc/testsuite/gcc.c-torture/compile/20001226-1.c +++ b/gcc/testsuite/gcc.c-torture/compile/20001226-1.c @@ -1,8 +1,8 @@ /* { dg-do assemble } */ -/* { dg-skip-if "too much code for avr" { "avr-*-*" } { "*" } { "" } } */ -/* { dg-skip-if "too much code for pdp11" { "pdp11-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "too much code for avr" { "avr-*-*" } } */ +/* { dg-skip-if "too much code for pdp11" { "pdp11-*-*" } } */ /* { dg-xfail-if "PR36698" { spu-*-* } { "-O0" } { "" } } */ -/* { dg-skip-if "" { m32c-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { m32c-*-* } } */ /* { dg-timeout-factor 4.0 } */ /* This testcase exposed two branch shortening bugs on powerpc. */ diff --git a/gcc/testsuite/gcc.c-torture/compile/20060208-1.c b/gcc/testsuite/gcc.c-torture/compile/20060208-1.c index 18724fb3ebe..3881474f722 100644 --- a/gcc/testsuite/gcc.c-torture/compile/20060208-1.c +++ b/gcc/testsuite/gcc.c-torture/compile/20060208-1.c @@ -1,5 +1,5 @@ /* PR middle-end/26092 */ -/* { dg-skip-if "can't take address of malloc" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "can't take address of malloc" { nvptx-*-* } } */ typedef __SIZE_TYPE__ size_t; extern void *malloc (size_t); diff --git a/gcc/testsuite/gcc.c-torture/compile/20080721-1.c b/gcc/testsuite/gcc.c-torture/compile/20080721-1.c index 6ee9ed95b93..6c928f55ca1 100644 --- a/gcc/testsuite/gcc.c-torture/compile/20080721-1.c +++ b/gcc/testsuite/gcc.c-torture/compile/20080721-1.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "can't read function data" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "can't read function data" { nvptx-*-* } } */ void foo(void); void bar(void); diff --git a/gcc/testsuite/gcc.c-torture/compile/20080806-1.c b/gcc/testsuite/gcc.c-torture/compile/20080806-1.c index d0ee9cc2e6c..45f29d1cf11 100644 --- a/gcc/testsuite/gcc.c-torture/compile/20080806-1.c +++ b/gcc/testsuite/gcc.c-torture/compile/20080806-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ /* This used to ICE on s390x due to a reload bug. */ diff --git a/gcc/testsuite/gcc.c-torture/compile/920520-1.c b/gcc/testsuite/gcc.c-torture/compile/920520-1.c index 7dce4118519..037102ee55c 100644 --- a/gcc/testsuite/gcc.c-torture/compile/920520-1.c +++ b/gcc/testsuite/gcc.c-torture/compile/920520-1.c @@ -1,4 +1,4 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { pdp11-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { pdp11-*-* } } */ f(){asm("%0"::"r"(1.5F));}g(){asm("%0"::"r"(1.5));} diff --git a/gcc/testsuite/gcc.c-torture/compile/920723-1.c b/gcc/testsuite/gcc.c-torture/compile/920723-1.c index c6351c37261..cd8710be7e8 100644 --- a/gcc/testsuite/gcc.c-torture/compile/920723-1.c +++ b/gcc/testsuite/gcc.c-torture/compile/920723-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #if defined(STACK_SIZE) && STACK_SIZE < 65536 # define GITT_SIZE 75 diff --git a/gcc/testsuite/gcc.c-torture/compile/930621-1.c b/gcc/testsuite/gcc.c-torture/compile/930621-1.c index 13e997a49cc..ce0f25b173f 100644 --- a/gcc/testsuite/gcc.c-torture/compile/930621-1.c +++ b/gcc/testsuite/gcc.c-torture/compile/930621-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #if defined(STACK_SIZE) && (STACK_SIZE < 65536) # define BYTEMEM_SIZE 10000L diff --git a/gcc/testsuite/gcc.c-torture/compile/980506-1.c b/gcc/testsuite/gcc.c-torture/compile/980506-1.c index 0f46e17e5cb..3653372a489 100644 --- a/gcc/testsuite/gcc.c-torture/compile/980506-1.c +++ b/gcc/testsuite/gcc.c-torture/compile/980506-1.c @@ -1,7 +1,7 @@ /* The arrays are too large for the xstormy16 - won't fit in 16 bits. */ /* { dg-do assemble } */ /* { dg-require-effective-target size32plus } */ -/* { dg-skip-if "Array too big" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "Array too big" { "avr-*-*" } } */ /* { dg-xfail-if "The array too big" { h8300-*-* } { "-mno-h" "-mn" } { "" } } */ unsigned char TIFFFax2DMode[20][256]; diff --git a/gcc/testsuite/gcc.c-torture/compile/991214-2.c b/gcc/testsuite/gcc.c-torture/compile/991214-2.c index 32dad4ff864..79df35713fc 100644 --- a/gcc/testsuite/gcc.c-torture/compile/991214-2.c +++ b/gcc/testsuite/gcc.c-torture/compile/991214-2.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #if defined(STACK_SIZE) && (STACK_SIZE < 65536) # define HISTO_SIZE 9 diff --git a/gcc/testsuite/gcc.c-torture/compile/bcopy.c b/gcc/testsuite/gcc.c-torture/compile/bcopy.c index cb7c05dda01..8108f296600 100644 --- a/gcc/testsuite/gcc.c-torture/compile/bcopy.c +++ b/gcc/testsuite/gcc.c-torture/compile/bcopy.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ void bcopy1 (s, d, c) diff --git a/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c b/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c index f131eea3cf1..c2338491b4f 100644 --- a/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c +++ b/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "ptxas runs out of memory" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "ptxas runs out of memory" { nvptx-*-* } } */ /* { dg-require-effective-target int32plus } */ /* Inspired by the test case for PR middle-end/52640. */ diff --git a/gcc/testsuite/gcc.c-torture/compile/limits-fndefn.c b/gcc/testsuite/gcc.c-torture/compile/limits-fndefn.c index 228c5d9ef29..0bd8f6af995 100644 --- a/gcc/testsuite/gcc.c-torture/compile/limits-fndefn.c +++ b/gcc/testsuite/gcc.c-torture/compile/limits-fndefn.c @@ -1,5 +1,5 @@ -/* { dg-skip-if "too complex for avr" { avr-*-* } { "*" } { "" } } */ -/* { dg-skip-if "ptxas times out" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "too complex for avr" { avr-*-* } } */ +/* { dg-skip-if "ptxas times out" { nvptx-*-* } } */ /* { dg-timeout-factor 4.0 } */ #define LIM1(x) x##0, x##1, x##2, x##3, x##4, x##5, x##6, x##7, x##8, x##9, #define LIM2(x) LIM1(x##0) LIM1(x##1) LIM1(x##2) LIM1(x##3) LIM1(x##4) \ diff --git a/gcc/testsuite/gcc.c-torture/compile/limits-stringlit.c b/gcc/testsuite/gcc.c-torture/compile/limits-stringlit.c index 56188d86a69..0828fc35aef 100644 --- a/gcc/testsuite/gcc.c-torture/compile/limits-stringlit.c +++ b/gcc/testsuite/gcc.c-torture/compile/limits-stringlit.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "Array too big" { avr-*-* m32c-*-* pdp11-*-* msp430-*-* } { "*" } { "" } } */ +/* { dg-skip-if "Array too big" { avr-*-* m32c-*-* pdp11-*-* msp430-*-* } } */ #define STR2 "012345678901234567890123456789012345678901234567890123456789\ 0123456789012345678901234567890123456789" diff --git a/gcc/testsuite/gcc.c-torture/compile/memtst.c b/gcc/testsuite/gcc.c-torture/compile/memtst.c index e165a2297e8..44cdaf8e83a 100644 --- a/gcc/testsuite/gcc.c-torture/compile/memtst.c +++ b/gcc/testsuite/gcc.c-torture/compile/memtst.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #ifdef STACK_SIZE #define SIZE STACK_SIZE / 8 diff --git a/gcc/testsuite/gcc.c-torture/compile/msp.c b/gcc/testsuite/gcc.c-torture/compile/msp.c index 594cecb6721..263a873e264 100644 --- a/gcc/testsuite/gcc.c-torture/compile/msp.c +++ b/gcc/testsuite/gcc.c-torture/compile/msp.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #ifdef STACK_SIZE # define A_SIZE (STACK_SIZE/sizeof(int)) diff --git a/gcc/testsuite/gcc.c-torture/compile/pr35318.c b/gcc/testsuite/gcc.c-torture/compile/pr35318.c index 6837d2d83a2..97a1c8761fb 100644 --- a/gcc/testsuite/gcc.c-torture/compile/pr35318.c +++ b/gcc/testsuite/gcc.c-torture/compile/pr35318.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { pdp11-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { pdp11-*-* } } */ /* PR target/35318 */ void diff --git a/gcc/testsuite/gcc.c-torture/compile/pr41181.c b/gcc/testsuite/gcc.c-torture/compile/pr41181.c index e1e48063a94..f866249b605 100644 --- a/gcc/testsuite/gcc.c-torture/compile/pr41181.c +++ b/gcc/testsuite/gcc.c-torture/compile/pr41181.c @@ -1,5 +1,5 @@ /* { dg-require-effective-target ptr32plus } */ -/* { dg-skip-if "The array is too big" { "avr-*-*" "pdp11-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "The array is too big" { "avr-*-*" "pdp11-*-*" } } */ char paths[1024]; static void x264_slicetype_path(char (*best_paths)[250], int n, int length) { diff --git a/gcc/testsuite/gcc.c-torture/compile/pr46534.c b/gcc/testsuite/gcc.c-torture/compile/pr46534.c index 8300ca7f2cf..885aa6d61b3 100644 --- a/gcc/testsuite/gcc.c-torture/compile/pr46534.c +++ b/gcc/testsuite/gcc.c-torture/compile/pr46534.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "too big" { avr-*-* nvptx-*-* pdp11-*-* } { "*" } { "" } } */ +/* { dg-skip-if "too big" { avr-*-* nvptx-*-* pdp11-*-* } } */ /* PR middle-end/46534 */ extern int printf (const char *, ...); diff --git a/gcc/testsuite/gcc.c-torture/compile/stack-check-1.c b/gcc/testsuite/gcc.c-torture/compile/stack-check-1.c new file mode 100644 index 00000000000..5c99688b35a --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/stack-check-1.c @@ -0,0 +1,3 @@ +/* { dg-require-effective-target untyped_assembly } */ +/* { dg-additional-options "-fstack-check" } */ +#include "20031023-1.c" diff --git a/gcc/testsuite/gcc.c-torture/compile/stuct.c b/gcc/testsuite/gcc.c-torture/compile/stuct.c index 59acd571ba6..b70957e9891 100644 --- a/gcc/testsuite/gcc.c-torture/compile/stuct.c +++ b/gcc/testsuite/gcc.c-torture/compile/stuct.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #ifdef STACK_SIZE #define SIZE STACK_SIZE / 8 diff --git a/gcc/testsuite/gcc.c-torture/execute/20011008-3.c b/gcc/testsuite/gcc.c-torture/execute/20011008-3.c index 2fd6871e757..0f56302c43d 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20011008-3.c +++ b/gcc/testsuite/gcc.c-torture/execute/20011008-3.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ extern void exit (int); extern void abort (void); diff --git a/gcc/testsuite/gcc.c-torture/execute/20020404-1.c b/gcc/testsuite/gcc.c-torture/execute/20020404-1.c index fe5ea14fad7..34173e520f1 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20020404-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/20020404-1.c @@ -1,5 +1,5 @@ /* { dg-require-effective-target int32plus } */ -/* { dg-skip-if "pointers can be truncated" { m32c-*-* } "*" "" } */ +/* { dg-skip-if "pointers can be truncated" { m32c-*-* } } */ /* Extracted from GDB sources. */ typedef long long bfd_signed_vma; diff --git a/gcc/testsuite/gcc.c-torture/execute/20030209-1.c b/gcc/testsuite/gcc.c-torture/execute/20030209-1.c index 72c1e55f88b..8f076ecb0c7 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20030209-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/20030209-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #ifdef STACK_SIZE #if STACK_SIZE < 8*100*100 diff --git a/gcc/testsuite/gcc.c-torture/execute/20030222-1.c b/gcc/testsuite/gcc.c-torture/execute/20030222-1.c index a820cf206e1..dbac74a7197 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20030222-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/20030222-1.c @@ -3,8 +3,8 @@ succeeded at all. We use volatile to make sure the long long is actually truncated to int, in case a single register is wide enough for a long long. */ -/* { dg-skip-if "asm would require extra shift-left-4-byte" { spu-*-* } "*" "" } */ -/* { dg-skip-if "asm requires register allocation" { nvptx-*-* } "*" "" } */ +/* { dg-skip-if "asm would require extra shift-left-4-byte" { spu-*-* } } */ +/* { dg-skip-if "asm requires register allocation" { nvptx-*-* } } */ #include <limits.h> void diff --git a/gcc/testsuite/gcc.c-torture/execute/20031012-1.c b/gcc/testsuite/gcc.c-torture/execute/20031012-1.c index db7f3fa97ad..e02baf55cbc 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20031012-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/20031012-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ /* PR optimization/8750 Used to fail under Cygwin with diff --git a/gcc/testsuite/gcc.c-torture/execute/20040805-1.c b/gcc/testsuite/gcc.c-torture/execute/20040805-1.c index 4e978f519bc..d3208d69f9d 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20040805-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/20040805-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #if __INT_MAX__ < 32768 || (defined(STACK_SIZE) && STACK_SIZE < 0x12000) int main () { exit (0); } diff --git a/gcc/testsuite/gcc.c-torture/execute/20061220-1.c b/gcc/testsuite/gcc.c-torture/execute/20061220-1.c index 9a133e8c6e8..b33efc6e6db 100644 --- a/gcc/testsuite/gcc.c-torture/execute/20061220-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/20061220-1.c @@ -1,5 +1,5 @@ /* PR middle-end/30262 */ -/* { dg-skip-if "asm statements do not work as expected" { rl78-*-* } "*" "" } */ +/* { dg-skip-if "asm statements do not work as expected" { rl78-*-* } } */ extern void abort (void); int diff --git a/gcc/testsuite/gcc.c-torture/execute/920410-1.c b/gcc/testsuite/gcc.c-torture/execute/920410-1.c index 50bc41770e8..44a72bd7bb5 100644 --- a/gcc/testsuite/gcc.c-torture/execute/920410-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/920410-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #define STACK_REQUIREMENT (40000 * 4 + 256) #if defined (STACK_SIZE) && STACK_SIZE < STACK_REQUIREMENT diff --git a/gcc/testsuite/gcc.c-torture/execute/920501-7.c b/gcc/testsuite/gcc.c-torture/execute/920501-7.c index 5cced09dc04..1396eeb64ab 100644 --- a/gcc/testsuite/gcc.c-torture/execute/920501-7.c +++ b/gcc/testsuite/gcc.c-torture/execute/920501-7.c @@ -1,6 +1,6 @@ /* { dg-require-effective-target label_values } */ /* { dg-require-effective-target trampolines } */ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #ifdef STACK_SIZE #define DEPTH ((STACK_SIZE) / 512 + 1) diff --git a/gcc/testsuite/gcc.c-torture/execute/921113-1.c b/gcc/testsuite/gcc.c-torture/execute/921113-1.c index 24c4952279a..d3e44e358d2 100644 --- a/gcc/testsuite/gcc.c-torture/execute/921113-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/921113-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #define STACK_REQUIREMENT (128 * 128 * 4 + 1024) #if defined (STACK_SIZE) && STACK_SIZE < STACK_REQUIREMENT diff --git a/gcc/testsuite/gcc.c-torture/execute/921202-1.c b/gcc/testsuite/gcc.c-torture/execute/921202-1.c index 530fad006fe..8c6b8c79fc5 100644 --- a/gcc/testsuite/gcc.c-torture/execute/921202-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/921202-1.c @@ -1,5 +1,5 @@ /* { dg-require-effective-target untyped_assembly } */ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #ifndef STACK_SIZE #define VLEN 2055 diff --git a/gcc/testsuite/gcc.c-torture/execute/921208-2.c b/gcc/testsuite/gcc.c-torture/execute/921208-2.c index f18f2c8faaa..da9ee524924 100644 --- a/gcc/testsuite/gcc.c-torture/execute/921208-2.c +++ b/gcc/testsuite/gcc.c-torture/execute/921208-2.c @@ -1,5 +1,5 @@ /* { dg-require-effective-target untyped_assembly } */ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #define STACK_REQUIREMENT (100000 * 4 + 1024) #if defined (STACK_SIZE) && STACK_SIZE < STACK_REQUIREMENT diff --git a/gcc/testsuite/gcc.c-torture/execute/930106-1.c b/gcc/testsuite/gcc.c-torture/execute/930106-1.c index 41add7dc25d..cae2c544cda 100644 --- a/gcc/testsuite/gcc.c-torture/execute/930106-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/930106-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #if defined (STACK_SIZE) #define DUMMY_SIZE 9 diff --git a/gcc/testsuite/gcc.c-torture/execute/930406-1.c b/gcc/testsuite/gcc.c-torture/execute/930406-1.c index 0d6b0fbc948..f240d1b09ab 100644 --- a/gcc/testsuite/gcc.c-torture/execute/930406-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/930406-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ f() { diff --git a/gcc/testsuite/gcc.c-torture/execute/950221-1.c b/gcc/testsuite/gcc.c-torture/execute/950221-1.c index aa71024b2db..8ef83fd5c13 100644 --- a/gcc/testsuite/gcc.c-torture/execute/950221-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/950221-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ struct parsefile { diff --git a/gcc/testsuite/gcc.c-torture/execute/960521-1.c b/gcc/testsuite/gcc.c-torture/execute/960521-1.c index fc69ff92414..0174e7be552 100644 --- a/gcc/testsuite/gcc.c-torture/execute/960521-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/960521-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #include <stdlib.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/980605-1.c b/gcc/testsuite/gcc.c-torture/execute/980605-1.c index 9185f2b9a3c..7179ba63881 100644 --- a/gcc/testsuite/gcc.c-torture/execute/980605-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/980605-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #include <stdio.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/990413-2.c b/gcc/testsuite/gcc.c-torture/execute/990413-2.c index 3beb5403b87..09a057358b8 100644 --- a/gcc/testsuite/gcc.c-torture/execute/990413-2.c +++ b/gcc/testsuite/gcc.c-torture/execute/990413-2.c @@ -1,5 +1,5 @@ /* This tests for a bug in regstack that was breaking glibc's math library. */ -/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.c-torture/execute/bf64-1.c b/gcc/testsuite/gcc.c-torture/execute/bf64-1.c index d69a7c401f8..c9241e281c5 100644 --- a/gcc/testsuite/gcc.c-torture/execute/bf64-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/bf64-1.c @@ -1,4 +1,4 @@ -/* { dg-xfail-if "ABI specifies bitfields cannot exceed 32 bits" { mcore-*-* } "*" "" } */ +/* { dg-xfail-if "ABI specifies bitfields cannot exceed 32 bits" { mcore-*-* } } */ struct tmp { long long int pad : 12; diff --git a/gcc/testsuite/gcc.c-torture/execute/comp-goto-1.c b/gcc/testsuite/gcc.c-torture/execute/comp-goto-1.c index 3bc00ef9a9c..2a840521487 100644 --- a/gcc/testsuite/gcc.c-torture/execute/comp-goto-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/comp-goto-1.c @@ -1,5 +1,5 @@ /* { dg-require-effective-target label_values } */ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #include <stdlib.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/comp-goto-2.c b/gcc/testsuite/gcc.c-torture/execute/comp-goto-2.c index 21a1e6f2ae2..95d23a2f9ce 100644 --- a/gcc/testsuite/gcc.c-torture/execute/comp-goto-2.c +++ b/gcc/testsuite/gcc.c-torture/execute/comp-goto-2.c @@ -1,6 +1,6 @@ /* { dg-require-effective-target label_values } */ /* { dg-require-effective-target trampolines } */ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ /* A slight variation of 920501-7.c. */ diff --git a/gcc/testsuite/gcc.c-torture/execute/complex-6.c b/gcc/testsuite/gcc.c-torture/execute/complex-6.c index 2e7a6cdd71b..50fb18ea62e 100644 --- a/gcc/testsuite/gcc.c-torture/execute/complex-6.c +++ b/gcc/testsuite/gcc.c-torture/execute/complex-6.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ /* This test tests complex conjugate and passing/returning of complex parameter. */ diff --git a/gcc/testsuite/gcc.c-torture/execute/fprintf-1.c b/gcc/testsuite/gcc.c-torture/execute/fprintf-1.c index bd3069f5383..15996ef22c5 100644 --- a/gcc/testsuite/gcc.c-torture/execute/fprintf-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/fprintf-1.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ #include <stdio.h> #include <stdlib.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/fprintf-chk-1.c b/gcc/testsuite/gcc.c-torture/execute/fprintf-chk-1.c index caad0a4bb3d..6f9e62c39e7 100644 --- a/gcc/testsuite/gcc.c-torture/execute/fprintf-chk-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/fprintf-chk-1.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ #include <stdio.h> #include <stdlib.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/gofast.c b/gcc/testsuite/gcc.c-torture/execute/gofast.c index a0b6e04465a..72774f16e74 100644 --- a/gcc/testsuite/gcc.c-torture/execute/gofast.c +++ b/gcc/testsuite/gcc.c-torture/execute/gofast.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ /* Program to test gcc's usage of the gofast library. */ diff --git a/gcc/testsuite/gcc.c-torture/execute/loop-2f.c b/gcc/testsuite/gcc.c-torture/execute/loop-2f.c index 539db4b4d43..a857f270c30 100644 --- a/gcc/testsuite/gcc.c-torture/execute/loop-2f.c +++ b/gcc/testsuite/gcc.c-torture/execute/loop-2f.c @@ -1,5 +1,5 @@ /* { dg-require-effective-target mmap } */ -/* { dg-skip-if "the executable is at the same position the test tries to remap" { m68k-*-linux* } { "*" } { "" } } */ +/* { dg-skip-if "the executable is at the same position the test tries to remap" { m68k-*-linux* } } */ #include <limits.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/loop-2g.c b/gcc/testsuite/gcc.c-torture/execute/loop-2g.c index 0840945c87a..71e24096cd4 100644 --- a/gcc/testsuite/gcc.c-torture/execute/loop-2g.c +++ b/gcc/testsuite/gcc.c-torture/execute/loop-2g.c @@ -1,5 +1,5 @@ /* { dg-require-effective-target mmap } */ -/* { dg-skip-if "the executable is at the same position the test tries to remap" { m68k-*-linux* } { "*" } { "" } } */ +/* { dg-skip-if "the executable is at the same position the test tries to remap" { m68k-*-linux* } } */ #include <limits.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/memcpy-1.c b/gcc/testsuite/gcc.c-torture/execute/memcpy-1.c index e94ab8aad88..558c9370abb 100644 --- a/gcc/testsuite/gcc.c-torture/execute/memcpy-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/memcpy-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #include <string.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/multi-ix.c b/gcc/testsuite/gcc.c-torture/execute/multi-ix.c index 8ab041b4a53..39567f1f0a7 100644 --- a/gcc/testsuite/gcc.c-torture/execute/multi-ix.c +++ b/gcc/testsuite/gcc.c-torture/execute/multi-ix.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ /* Test for a reload bug: if you have a memory reference using the indexed addressing diff --git a/gcc/testsuite/gcc.c-torture/execute/nestfunc-4.c b/gcc/testsuite/gcc.c-torture/execute/nestfunc-4.c index ee5b376f9b8..c7225700709 100644 --- a/gcc/testsuite/gcc.c-torture/execute/nestfunc-4.c +++ b/gcc/testsuite/gcc.c-torture/execute/nestfunc-4.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ /* Origin: hp@bitrange.com Test that return values come out right from a 1000-level call chain to diff --git a/gcc/testsuite/gcc.c-torture/execute/pr20621-1.c b/gcc/testsuite/gcc.c-torture/execute/pr20621-1.c index 4a55c970b86..9d0119b9689 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr20621-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr20621-1.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ /* When generating o32 MIPS PIC, main's $gp save slot was out of range of a single load instruction. */ diff --git a/gcc/testsuite/gcc.c-torture/execute/pr23135.c b/gcc/testsuite/gcc.c-torture/execute/pr23135.c index 31b4f8f9c14..8dd6358e9b4 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr23135.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr23135.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ /* Based on execute/simd-1.c, modified by joern.rennecke@st.com to trigger a reload bug. Verified for gcc mainline from 20050722 13:00 UTC diff --git a/gcc/testsuite/gcc.c-torture/execute/pr28982b.c b/gcc/testsuite/gcc.c-torture/execute/pr28982b.c index 90d4a931ab8..f28425e8fd7 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr28982b.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr28982b.c @@ -1,4 +1,4 @@ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ /* Like pr28982a.c, but with the spill slots outside the range of a single sp-based load on ARM. This test tests for cases where diff --git a/gcc/testsuite/gcc.c-torture/execute/pr34456.c b/gcc/testsuite/gcc.c-torture/execute/pr34456.c index 53e46ed26a2..b4a845ec14b 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr34456.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr34456.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "requires qsort" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires qsort" { freestanding } } */ #include <stdlib.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/pr35456.c b/gcc/testsuite/gcc.c-torture/execute/pr35456.c index 17c70bcc4d0..67f64dbafc8 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr35456.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr35456.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "signed zero not supported" { "vax-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "signed zero not supported" { "vax-*-*" } } */ extern void abort (void); double diff --git a/gcc/testsuite/gcc.c-torture/execute/pr39228.c b/gcc/testsuite/gcc.c-torture/execute/pr39228.c index 2bc6006476e..ad0d3769cdf 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr39228.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr39228.c @@ -1,5 +1,5 @@ /* { dg-add-options ieee } */ -/* { dg-skip-if "No Inf/NaN support" { spu-*-* } "*" "" } */ +/* { dg-skip-if "No Inf/NaN support" { spu-*-* } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.c-torture/execute/pr47237.c b/gcc/testsuite/gcc.c-torture/execute/pr47237.c index 08025313389..98124065b2f 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr47237.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr47237.c @@ -1,4 +1,4 @@ -/* { dg-xfail-if "can cause stack underflow" { nios2-*-* } "*" "" } */ +/* { dg-xfail-if "can cause stack underflow" { nios2-*-* } } */ /* { dg-require-effective-target untyped_assembly } */ #define INTEGER_ARG 5 diff --git a/gcc/testsuite/gcc.c-torture/execute/pr78622.c b/gcc/testsuite/gcc.c-torture/execute/pr78622.c index 384803d1a09..c09bb433e23 100644 --- a/gcc/testsuite/gcc.c-torture/execute/pr78622.c +++ b/gcc/testsuite/gcc.c-torture/execute/pr78622.c @@ -1,6 +1,6 @@ /* PR middle-end/78622 - [7 Regression] -Wformat-overflow/-fprintf-return-value incorrect with overflow/wrapping - { dg-skip-if "Requires %hhd format" { hppa*-*-hpux* } { "*" } { "" } } + { dg-skip-if "Requires %hhd format" { hppa*-*-hpux* } } { dg-require-effective-target c99_runtime } { dg-additional-options "-Wformat-overflow=2" } */ diff --git a/gcc/testsuite/gcc.c-torture/execute/printf-1.c b/gcc/testsuite/gcc.c-torture/execute/printf-1.c index 13e331d3e57..654e62766a8 100644 --- a/gcc/testsuite/gcc.c-torture/execute/printf-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/printf-1.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ #include <stdio.h> #include <stdlib.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/printf-chk-1.c b/gcc/testsuite/gcc.c-torture/execute/printf-chk-1.c index fde85f99442..aab43062bae 100644 --- a/gcc/testsuite/gcc.c-torture/execute/printf-chk-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/printf-chk-1.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ #include <stdio.h> #include <stdlib.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/strncmp-1.c b/gcc/testsuite/gcc.c-torture/execute/strncmp-1.c index c5d39fd09ee..c2448591d96 100644 --- a/gcc/testsuite/gcc.c-torture/execute/strncmp-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/strncmp-1.c @@ -1,4 +1,4 @@ -/* { dg-xfail-if "kernel strncmp does not perform unsigned comparisons" { vxworks_kernel } "*" "" } */ +/* { dg-xfail-if "kernel strncmp does not perform unsigned comparisons" { vxworks_kernel } } */ /* Copyright (C) 2002 Free Software Foundation. Test strncmp with various combinations of pointer alignments and lengths to diff --git a/gcc/testsuite/gcc.c-torture/execute/vfprintf-1.c b/gcc/testsuite/gcc.c-torture/execute/vfprintf-1.c index c9ce492e8b9..0ac41dee3d6 100644 --- a/gcc/testsuite/gcc.c-torture/execute/vfprintf-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/vfprintf-1.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ #ifndef test #include <stdio.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/vfprintf-chk-1.c b/gcc/testsuite/gcc.c-torture/execute/vfprintf-chk-1.c index a642209c19b..401eaf4304a 100644 --- a/gcc/testsuite/gcc.c-torture/execute/vfprintf-chk-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/vfprintf-chk-1.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ #ifndef test #include <stdio.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/vprintf-1.c b/gcc/testsuite/gcc.c-torture/execute/vprintf-1.c index 8b7038fd7bf..259397ebda3 100644 --- a/gcc/testsuite/gcc.c-torture/execute/vprintf-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/vprintf-1.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ #ifndef test #include <stdio.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/vprintf-chk-1.c b/gcc/testsuite/gcc.c-torture/execute/vprintf-chk-1.c index f9bda6ed856..04ecc4df4d9 100644 --- a/gcc/testsuite/gcc.c-torture/execute/vprintf-chk-1.c +++ b/gcc/testsuite/gcc.c-torture/execute/vprintf-chk-1.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ #ifndef test #include <stdio.h> diff --git a/gcc/testsuite/gcc.c-torture/execute/zerolen-2.c b/gcc/testsuite/gcc.c-torture/execute/zerolen-2.c index 4a55acd2a3e..7c933384396 100644 --- a/gcc/testsuite/gcc.c-torture/execute/zerolen-2.c +++ b/gcc/testsuite/gcc.c-torture/execute/zerolen-2.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "assumes absence of larger-than-word padding" { epiphany-*-* } "*" "" } */ +/* { dg-skip-if "assumes absence of larger-than-word padding" { epiphany-*-* } } */ extern void abort(void); typedef int word __attribute__((mode(word))); diff --git a/gcc/testsuite/gcc.dg/20020219-1.c b/gcc/testsuite/gcc.dg/20020219-1.c index 839011fc044..055b5b935ea 100644 --- a/gcc/testsuite/gcc.dg/20020219-1.c +++ b/gcc/testsuite/gcc.dg/20020219-1.c @@ -13,9 +13,9 @@ /* { dg-do run } */ /* { dg-options "-O2" } */ /* { dg-options "-O2 -mdisable-indexing" { target hppa*-*-hpux* } } */ -/* { dg-skip-if "" { aarch64*-*-* && ilp32 } { "*" } { "" } } */ +/* { dg-skip-if "" { aarch64*-*-* && ilp32 } } */ /* { dg-skip-if "" { "ia64-*-hpux*" } "*" "-mlp64" } */ -/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && x32 } { "*" } { "" } } */ +/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && x32 } } */ /* Disable the test entirely for 16-bit targets. */ #if __INT_MAX__ > 32767 diff --git a/gcc/testsuite/gcc.dg/20030702-1.c b/gcc/testsuite/gcc.dg/20030702-1.c index 0bc1b1c88e1..e4e981bc4be 100644 --- a/gcc/testsuite/gcc.dg/20030702-1.c +++ b/gcc/testsuite/gcc.dg/20030702-1.c @@ -2,7 +2,7 @@ correctly in combine. */ /* { dg-do compile { target fpic } } */ /* { dg-options "-O2 -fpic -fprofile-arcs" } */ -/* { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } { "*" } { "" } } */ +/* { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } } */ /* { dg-require-profiling "-fprofile-generate" } */ int fork (void); diff --git a/gcc/testsuite/gcc.dg/20050503-1.c b/gcc/testsuite/gcc.dg/20050503-1.c index f85129a95c7..57dfefcf072 100644 --- a/gcc/testsuite/gcc.dg/20050503-1.c +++ b/gcc/testsuite/gcc.dg/20050503-1.c @@ -2,7 +2,7 @@ Test whether tail call information is propagated through builtin expanders. */ /* { dg-do compile } */ -/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } { "*" } { "" } } */ +/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } } */ /* { dg-options "-O2" } */ typedef __SIZE_TYPE__ size_t; diff --git a/gcc/testsuite/gcc.dg/Wconversion-complex-c99.c b/gcc/testsuite/gcc.dg/Wconversion-complex-c99.c index bc7439de85b..e8bc9db237d 100644 --- a/gcc/testsuite/gcc.dg/Wconversion-complex-c99.c +++ b/gcc/testsuite/gcc.dg/Wconversion-complex-c99.c @@ -5,7 +5,7 @@ Likewise, the magic value 16777217. */ /* { dg-do compile } */ -/* { dg-skip-if "doubles are floats,ints are 16bits" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "doubles are floats,ints are 16bits" { "avr-*-*" } } */ /* { dg-options " -std=c99 -pedantic -Wconversion " } */ /* { dg-require-effective-target int32plus } */ /* { dg-require-effective-target double64plus } */ diff --git a/gcc/testsuite/gcc.dg/Wconversion-complex-gnu.c b/gcc/testsuite/gcc.dg/Wconversion-complex-gnu.c index 80990cb6604..d4583508d1f 100644 --- a/gcc/testsuite/gcc.dg/Wconversion-complex-gnu.c +++ b/gcc/testsuite/gcc.dg/Wconversion-complex-gnu.c @@ -4,7 +4,7 @@ These tests cover integer complex values (which are GNU extensions). */ /* { dg-do compile } */ -/* { dg-skip-if "doubles are floats,ints are 16bits" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "doubles are floats,ints are 16bits" { "avr-*-*" } } */ /* { dg-options " -std=gnu99 -Wconversion " } */ /* { dg-require-effective-target int32plus } */ /* { dg-require-effective-target double64plus } */ diff --git a/gcc/testsuite/gcc.dg/Wconversion-real-integer.c b/gcc/testsuite/gcc.dg/Wconversion-real-integer.c index 896702546a6..92e6987d9ec 100644 --- a/gcc/testsuite/gcc.dg/Wconversion-real-integer.c +++ b/gcc/testsuite/gcc.dg/Wconversion-real-integer.c @@ -2,7 +2,7 @@ integers. */ /* { dg-do compile } */ -/* { dg-skip-if "doubles are floats,ints are 16bits" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "doubles are floats,ints are 16bits" { "avr-*-*" } } */ /* { dg-options "-std=c99 -Wconversion" } */ /* { dg-require-effective-target int32plus } */ /* { dg-require-effective-target double64plus } */ diff --git a/gcc/testsuite/gcc.dg/Wsizeof-pointer-memaccess1.c b/gcc/testsuite/gcc.dg/Wsizeof-pointer-memaccess1.c index 7feb122b553..f4e8552918d 100644 --- a/gcc/testsuite/gcc.dg/Wsizeof-pointer-memaccess1.c +++ b/gcc/testsuite/gcc.dg/Wsizeof-pointer-memaccess1.c @@ -1,6 +1,6 @@ /* Test -Wsizeof-pointer-memaccess warnings. */ /* { dg-do compile } */ -/* { dg-options "-Wall -Wno-sizeof-array-argument" } */ +/* { dg-options "-Wall -Wno-sizeof-array-argument -Wno-stringop-overflow" } */ /* { dg-require-effective-target alloca } */ typedef __SIZE_TYPE__ size_t; diff --git a/gcc/testsuite/gcc.dg/asan/use-after-scope-4.c b/gcc/testsuite/gcc.dg/asan/use-after-scope-4.c index 77d7052bd19..44dc79535d2 100644 --- a/gcc/testsuite/gcc.dg/asan/use-after-scope-4.c +++ b/gcc/testsuite/gcc.dg/asan/use-after-scope-4.c @@ -1,16 +1,40 @@ // { dg-do run } -int +#define FN(NAME) \ +NAME (void) \ +{ \ + char *ptr; \ + char *ptr2; \ + { \ + char my_char[9]; \ + ptr = &my_char[0]; \ + __builtin_memcpy (&ptr2, &ptr, sizeof (ptr2)); \ + } \ + \ + *(ptr2+9) = 'c'; \ +} + +void +__attribute__((no_sanitize(("address")))) +__attribute__((no_sanitize(("undefined")))) +__attribute__((no_sanitize(("address")))) +__attribute__((no_sanitize(("null")))) +FN (fn1) + +void +__attribute__((no_sanitize(("all")))) +FN (fn2) + +void __attribute__((no_sanitize_address)) +FN (fn3) + +int main (void) { - char *ptr; - char *ptr2; - { - char my_char[9]; - ptr = &my_char[0]; - __builtin_memcpy (&ptr2, &ptr, sizeof (ptr2)); - } + fn1 (); + fn2 (); + fn3 (); - *(ptr2+9) = 'c'; + return 0; } diff --git a/gcc/testsuite/gcc.dg/asan/use-after-scope-switch-4.c b/gcc/testsuite/gcc.dg/asan/use-after-scope-switch-4.c new file mode 100644 index 00000000000..290a920633b --- /dev/null +++ b/gcc/testsuite/gcc.dg/asan/use-after-scope-switch-4.c @@ -0,0 +1,35 @@ +// { dg-do run } +// { dg-additional-options "-fdump-tree-gimple" } + +int *ptr; + +struct a +{ + int c; +}; + +int main(int argc, char **argv) +{ + struct a e; + e.c = 2; + int x = 0; + + for (;;) + switch (e.c) + case 3: + { + int resxxx; + case 2: + ptr = &resxxx; + *ptr = 123; + + if (x) + return 0; + else + x = 1; + } + + return 1; +} + +/* { dg-final { scan-tree-dump-times "ASAN_MARK \\(UNPOISON, &resxxx, \[0-9\]\\);" 2 "gimple" } } */ diff --git a/gcc/testsuite/gcc.dg/attr-alias-3.c b/gcc/testsuite/gcc.dg/attr-alias-3.c index 4c6f390c790..03c4da9652e 100644 --- a/gcc/testsuite/gcc.dg/attr-alias-3.c +++ b/gcc/testsuite/gcc.dg/attr-alias-3.c @@ -1,5 +1,5 @@ // { dg-do link } -// { dg-skip-if "" { "powerpc-ibm-aix*" } { "*" } { "" } } +// { dg-skip-if "" { "powerpc-ibm-aix*" } } // { dg-require-alias "" } // { dg-options "-O2 -fno-common" } diff --git a/gcc/testsuite/gcc.dg/attr-alias-5.c b/gcc/testsuite/gcc.dg/attr-alias-5.c index 56d9b302c66..91e63f89825 100644 --- a/gcc/testsuite/gcc.dg/attr-alias-5.c +++ b/gcc/testsuite/gcc.dg/attr-alias-5.c @@ -4,7 +4,7 @@ /* { dg-options "-std=gnu99" } */ /* { dg-require-alias "" } */ /* { dg-require-ascii-locale "" } */ -/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ void f0 (void) __attribute__((alias("\xa1"))); /* { dg-error "undefined symbol '\\\\241'" } */ void f1 (void) __attribute__((alias("\u00e9"))); /* { dg-error "undefined symbol '\\\\U000000e9'" } */ diff --git a/gcc/testsuite/gcc.dg/attr-ms_struct-1.c b/gcc/testsuite/gcc.dg/attr-ms_struct-1.c index 0b1d0404fd3..1e6cca59946 100644 --- a/gcc/testsuite/gcc.dg/attr-ms_struct-1.c +++ b/gcc/testsuite/gcc.dg/attr-ms_struct-1.c @@ -1,5 +1,5 @@ /* Test for MS structure sizes. */ -/* { dg-do run { target *-*-mingw* *-*-cygwin* i?86-*-darwin* } } */ +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-std=gnu99" } */ diff --git a/gcc/testsuite/gcc.dg/attr-ms_struct-2.c b/gcc/testsuite/gcc.dg/attr-ms_struct-2.c index f2534b5cbab..4ebf06b7d1e 100644 --- a/gcc/testsuite/gcc.dg/attr-ms_struct-2.c +++ b/gcc/testsuite/gcc.dg/attr-ms_struct-2.c @@ -1,5 +1,5 @@ /* Test for MS structure sizes. */ -/* { dg-do run { target *-*-mingw* *-*-cygwin* i?86-*-darwin* } } */ +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-std=gnu99" } */ diff --git a/gcc/testsuite/gcc.dg/attr-ms_struct-packed1.c b/gcc/testsuite/gcc.dg/attr-ms_struct-packed1.c index 25388d26e2c..cc26e6ee839 100644 --- a/gcc/testsuite/gcc.dg/attr-ms_struct-packed1.c +++ b/gcc/testsuite/gcc.dg/attr-ms_struct-packed1.c @@ -1,5 +1,5 @@ /* Test for MS structure with packed attribute. */ -/* { dg-do run { target *-*-mingw* *-*-cygwin* i?86-*-darwin* } } +/* { dg-do run { target i?86-*-* x86_64-*-* } } /* { dg-options "-std=gnu99" } */ extern void abort (); diff --git a/gcc/testsuite/gcc.dg/attr-weakref-1.c b/gcc/testsuite/gcc.dg/attr-weakref-1.c index d327b40984f..9e14b605be0 100644 --- a/gcc/testsuite/gcc.dg/attr-weakref-1.c +++ b/gcc/testsuite/gcc.dg/attr-weakref-1.c @@ -5,7 +5,7 @@ // This test requires support for undefined weak symbols. This support // is not available on the following targets. The test is skipped rather than // xfailed to suppress the warning that would otherwise arise. -// { dg-skip-if "" { "hppa*-*-hpux*" "*-*-aix*" "nvptx-*-*" } "*" { "" } } +// { dg-skip-if "" { "hppa*-*-hpux*" "*-*-aix*" "nvptx-*-*" } } // For kernel modules and static RTPs, the loader treats undefined weak // symbols in the same way as undefined strong symbols. The test diff --git a/gcc/testsuite/gcc.dg/autopar/pr46799.c b/gcc/testsuite/gcc.dg/autopar/pr46799.c index 0516d26c506..50d67d1c54f 100644 --- a/gcc/testsuite/gcc.dg/autopar/pr46799.c +++ b/gcc/testsuite/gcc.dg/autopar/pr46799.c @@ -1,7 +1,7 @@ /* PR debug/46799 */ /* { dg-do compile } */ /* { dg-options "-O -ftree-parallelize-loops=2 -fno-tree-dce -ftree-pre -fcompare-debug" } */ -/* { dg-xfail-if "compare-debug failure" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "compare-debug failure" { powerpc-ibm-aix* } } */ int foo (int i, int *a) diff --git a/gcc/testsuite/gcc.dg/bf-ms-layout-2.c b/gcc/testsuite/gcc.dg/bf-ms-layout-2.c index 53a55e603c7..2d0215fbd52 100644 --- a/gcc/testsuite/gcc.dg/bf-ms-layout-2.c +++ b/gcc/testsuite/gcc.dg/bf-ms-layout-2.c @@ -5,7 +5,7 @@ posted to GCC-patches http://gcc.gnu.org/ml/gcc-patches/2000-08/msg00577.html */ -/* { dg-do run { target *-*-mingw* *-*-cygwin* i?86-*-darwin* } } */ +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ /* { dg-options "-D_TEST_MS_LAYOUT" } */ /* This test uses the attribute instead of the command line option. */ diff --git a/gcc/testsuite/gcc.dg/bf-ms-layout.c b/gcc/testsuite/gcc.dg/bf-ms-layout.c index 54909d8b32e..92af9120723 100644 --- a/gcc/testsuite/gcc.dg/bf-ms-layout.c +++ b/gcc/testsuite/gcc.dg/bf-ms-layout.c @@ -5,7 +5,7 @@ posted to GCC-patches http://gcc.gnu.org/ml/gcc-patches/2000-08/msg00577.html */ -/* { dg-do run { target *-*-mingw* *-*-cygwin* i?86-*-darwin* } } */ +/* { dg-do run { target i?86-*-* x86_64-*-* } } */ /* { dg-options "-mms-bitfields -D_TEST_MS_LAYOUT" } */ #include <stddef.h> diff --git a/gcc/testsuite/gcc.dg/builtin-apply2.c b/gcc/testsuite/gcc.dg/builtin-apply2.c index ad61d3b6792..3768caa5d5a 100644 --- a/gcc/testsuite/gcc.dg/builtin-apply2.c +++ b/gcc/testsuite/gcc.dg/builtin-apply2.c @@ -1,8 +1,8 @@ /* { dg-do run } */ /* { dg-require-effective-target untyped_assembly } */ -/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "avr-*-* nds32*-*-*" } { "*" } { "" } } */ -/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs." { "riscv*-*-*" } { "*" } { "" } } */ -/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { arm*-*-* && arm_hf_eabi } { "*" } { "" } } */ +/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { "avr-*-* nds32*-*-*" } } */ +/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs." { "riscv*-*-*" } } */ +/* { dg-skip-if "Variadic funcs use Base AAPCS. Normal funcs use VFP variant." { arm*-*-* && arm_hf_eabi } } */ /* PR target/12503 */ /* Origin: <pierre.nguyen-tuong@asim.lip6.fr> */ diff --git a/gcc/testsuite/gcc.dg/builtin-object-size-10.c b/gcc/testsuite/gcc.dg/builtin-object-size-10.c index 8d6fd974be0..2a212fad19a 100644 --- a/gcc/testsuite/gcc.dg/builtin-object-size-10.c +++ b/gcc/testsuite/gcc.dg/builtin-object-size-10.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fdump-tree-objsz1-details" } */ -// { dg-skip-if "packed attribute missing for drone_source_packet" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for drone_source_packet" { "epiphany-*-*" } } typedef struct { char sentinel[4]; diff --git a/gcc/testsuite/gcc.dg/builtin-object-size-11.c b/gcc/testsuite/gcc.dg/builtin-object-size-11.c index 309a68416ae..7c4a921cbb7 100644 --- a/gcc/testsuite/gcc.dg/builtin-object-size-11.c +++ b/gcc/testsuite/gcc.dg/builtin-object-size-11.c @@ -1,7 +1,7 @@ /* PR48985 */ /* { dg-do run } */ /* { dg-options "-std=gnu89" } */ -/* { dg-skip-if "packed attribute missing for struct s" { "epiphany-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "packed attribute missing for struct s" { "epiphany-*-*" } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/builtin-return-1.c b/gcc/testsuite/gcc.dg/builtin-return-1.c index 56a6bae46ac..edcec9767a7 100644 --- a/gcc/testsuite/gcc.dg/builtin-return-1.c +++ b/gcc/testsuite/gcc.dg/builtin-return-1.c @@ -1,7 +1,7 @@ /* PR middle-end/11151 */ /* Originator: Andrew Church <gcczilla@achurch.org> */ /* { dg-do run } */ -/* { dg-xfail-run-if "PR36571 untyped return is char register" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-xfail-run-if "PR36571 untyped return is char register" { "avr-*-*" } } */ /* { dg-require-effective-target untyped_assembly } */ /* This used to fail on SPARC because the (undefined) return value of 'bar' was overwriting that of 'foo'. */ diff --git a/gcc/testsuite/gcc.dg/builtin-stringop-chk-1.c b/gcc/testsuite/gcc.dg/builtin-stringop-chk-1.c index ebf6e85f0ce..e2655785444 100644 --- a/gcc/testsuite/gcc.dg/builtin-stringop-chk-1.c +++ b/gcc/testsuite/gcc.dg/builtin-stringop-chk-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-options "-O2 -Wno-format -std=gnu99 -ftrack-macro-expansion=0" } */ /* { dg-additional-options "-mstructure-size-boundary=8" { target arm*-*-* } } */ -// { dg-skip-if "packed attribute missing for t" { "epiphany-*-*" } { "*" } { "" } } +// { dg-skip-if "packed attribute missing for t" { "epiphany-*-*" } } extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/builtins-nonnull.c b/gcc/testsuite/gcc.dg/builtins-nonnull.c index fa9eaf2327d..726f8e199da 100644 --- a/gcc/testsuite/gcc.dg/builtins-nonnull.c +++ b/gcc/testsuite/gcc.dg/builtins-nonnull.c @@ -24,8 +24,9 @@ void sink (int, ...); void test_memfuncs (void *s, unsigned n) { - /* Bzero is not declared attribute nonnull. */ - bzero (null (), n); + /* Bzero is not declared attribute nonnull (maybe it should be?) + but it's transformed into a call to memset() which is. */ + bzero (null (), n); /* { dg-warning "argument 1 null where non-null expected" } */ T (memcpy (null (), s, n)); /* { dg-warning "argument 1 null where non-null expected" } */ T (memcpy (s, null (), n)); /* { dg-warning "argument 2 null where non-null expected" } */ diff --git a/gcc/testsuite/gcc.dg/c11-align-4.c b/gcc/testsuite/gcc.dg/c11-align-4.c index 6377db6edf3..57f93ff05fc 100644 --- a/gcc/testsuite/gcc.dg/c11-align-4.c +++ b/gcc/testsuite/gcc.dg/c11-align-4.c @@ -2,7 +2,7 @@ are at least some alignment constraints). */ /* { dg-do compile } */ /* { dg-options "-std=c11 -pedantic-errors" } */ -/* { dg-skip-if "no alignment constraints" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "no alignment constraints" { "avr-*-*" } } */ #include <stddef.h> diff --git a/gcc/testsuite/gcc.dg/c11-true_min-1.c b/gcc/testsuite/gcc.dg/c11-true_min-1.c index fa83c17fe52..f666c727442 100644 --- a/gcc/testsuite/gcc.dg/c11-true_min-1.c +++ b/gcc/testsuite/gcc.dg/c11-true_min-1.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-options "-std=c11" } */ -/* { dg-xfail-run-if "PR58757 -mieee is required to compare denormals" { alpha*-*-* } { "*" } { "" } } */ +/* { dg-xfail-run-if "PR58757 -mieee is required to compare denormals" { alpha*-*-* } } */ /* Test that the smallest positive value is not 0. This needs to be true even when denormals are not supported, so we do not pass any flag diff --git a/gcc/testsuite/gcc.dg/cdce2.c b/gcc/testsuite/gcc.dg/cdce2.c index 55030f1841d..9e6f3446769 100644 --- a/gcc/testsuite/gcc.dg/cdce2.c +++ b/gcc/testsuite/gcc.dg/cdce2.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "doubles are floats" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "doubles are floats" { "avr-*-*" } } */ /* { dg-options "-O2 -fmath-errno -fdump-tree-cdce-details -lm" } */ /* { dg-final { scan-tree-dump "cdce2.c:15: note: function call is shrink-wrapped into error conditions\." "cdce" } } */ diff --git a/gcc/testsuite/gcc.dg/cleanup-12.c b/gcc/testsuite/gcc.dg/cleanup-12.c index 15c079f63fb..efb9a58ce8a 100644 --- a/gcc/testsuite/gcc.dg/cleanup-12.c +++ b/gcc/testsuite/gcc.dg/cleanup-12.c @@ -2,8 +2,8 @@ /* HP-UX libunwind.so doesn't provide _UA_END_OF_STACK */ /* { dg-do run } */ /* { dg-options "-O2 -fexceptions" } */ -/* { dg-skip-if "" { "ia64-*-hpux11.*" } { "*" } { "" } } */ -/* { dg-skip-if "" { ! nonlocal_goto } { "*" } { "" } } */ +/* { dg-skip-if "" { "ia64-*-hpux11.*" } } */ +/* { dg-skip-if "" { ! nonlocal_goto } } */ /* Verify unwind info in presence of alloca. */ #include <unwind.h> diff --git a/gcc/testsuite/gcc.dg/cleanup-13.c b/gcc/testsuite/gcc.dg/cleanup-13.c index 0ab1ca27650..8a8db277dd6 100644 --- a/gcc/testsuite/gcc.dg/cleanup-13.c +++ b/gcc/testsuite/gcc.dg/cleanup-13.c @@ -1,8 +1,8 @@ /* HP-UX libunwind.so doesn't provide _UA_END_OF_STACK */ /* { dg-do run } */ /* { dg-options "-fexceptions" } */ -/* { dg-skip-if "" { "ia64-*-hpux11.*" } { "*" } { "" } } */ -/* { dg-skip-if "" { ! nonlocal_goto } { "*" } { "" } } */ +/* { dg-skip-if "" { "ia64-*-hpux11.*" } } */ +/* { dg-skip-if "" { ! nonlocal_goto } } */ /* Verify DW_OP_* handling in the unwinder. */ #include <unwind.h> diff --git a/gcc/testsuite/gcc.dg/cleanup-5.c b/gcc/testsuite/gcc.dg/cleanup-5.c index 816d4cef0c1..4257f9e0398 100644 --- a/gcc/testsuite/gcc.dg/cleanup-5.c +++ b/gcc/testsuite/gcc.dg/cleanup-5.c @@ -1,8 +1,8 @@ /* HP-UX libunwind.so doesn't provide _UA_END_OF_STACK */ /* { dg-do run } */ /* { dg-options "-fexceptions" } */ -/* { dg-skip-if "" { "ia64-*-hpux11.*" } { "*" } { "" } } */ -/* { dg-skip-if "" { ! nonlocal_goto } { "*" } { "" } } */ +/* { dg-skip-if "" { "ia64-*-hpux11.*" } } */ +/* { dg-skip-if "" { ! nonlocal_goto } } */ /* Verify that cleanups work with exception handling. */ #include <unwind.h> diff --git a/gcc/testsuite/gcc.dg/compat/struct-by-value-16_main.c b/gcc/testsuite/gcc.dg/compat/struct-by-value-16_main.c index ecd60d1e574..a6f5ca14cae 100644 --- a/gcc/testsuite/gcc.dg/compat/struct-by-value-16_main.c +++ b/gcc/testsuite/gcc.dg/compat/struct-by-value-16_main.c @@ -1,7 +1,7 @@ /* Test structures passed by value, including to a function with a variable-length argument lists. All struct members are of type _Complex float. */ -/* { dg-skip-if "Program too big" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "Program too big" { "avr-*-*" } } */ extern void struct_by_value_16_x (void); extern void exit (int); diff --git a/gcc/testsuite/gcc.dg/compat/struct-by-value-17_main.c b/gcc/testsuite/gcc.dg/compat/struct-by-value-17_main.c index 8787877e9fe..42616ee7b11 100644 --- a/gcc/testsuite/gcc.dg/compat/struct-by-value-17_main.c +++ b/gcc/testsuite/gcc.dg/compat/struct-by-value-17_main.c @@ -1,7 +1,7 @@ /* Test structures passed by value, including to a function with a variable-length argument lists. All struct members are of type _Complex double. */ -/* { dg-skip-if "Program too big" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "Program too big" { "avr-*-*" } } */ extern void struct_by_value_17_x (void); extern void exit (int); diff --git a/gcc/testsuite/gcc.dg/compat/struct-by-value-18_main.c b/gcc/testsuite/gcc.dg/compat/struct-by-value-18_main.c index 0ecc660413c..9bb19b33be4 100644 --- a/gcc/testsuite/gcc.dg/compat/struct-by-value-18_main.c +++ b/gcc/testsuite/gcc.dg/compat/struct-by-value-18_main.c @@ -1,7 +1,7 @@ /* Test structures passed by value, including to a function with a variable-length argument lists. All struct members are of type _Complex long double. */ -/* { dg-skip-if "Program too big" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "Program too big" { "avr-*-*" } } */ extern void struct_by_value_18_x (void); extern void exit (int); diff --git a/gcc/testsuite/gcc.dg/constructor-1.c b/gcc/testsuite/gcc.dg/constructor-1.c index 73e9fc32007..f907ce87b92 100644 --- a/gcc/testsuite/gcc.dg/constructor-1.c +++ b/gcc/testsuite/gcc.dg/constructor-1.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-options "-O2" } */ -/* { dg-skip-if "" { ! global_constructor } { "*" } { "" } } */ +/* { dg-skip-if "" { ! global_constructor } } */ /* The ipa-split pass pulls the body of the if(!x) block into a separate function to make foo a better inlining diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char1.c b/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char1.c index 23f9596732f..f6934200371 100644 --- a/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char1.c +++ b/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char1.c @@ -1,7 +1,7 @@ /* PR debug/7241 */ /* { dg-do compile } */ /* { dg-options "-O2 -gdwarf -dA" } */ -/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } { "*" } { "" } } */ +/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } } */ /* { dg-final { scan-assembler "0x\[68\]\[ \t\]+\[#@;!/|\]+\[ \t\]+DW_AT_encoding" } } */ /* { dg-final { scan-assembler-not "0x\[57\]\[ \t\]+\[#@;!/|\]+\[ \t\]+DW_AT_encoding" } } */ diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char2.c b/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char2.c index 4a4bd438ce7..11499c633a4 100644 --- a/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char2.c +++ b/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char2.c @@ -1,7 +1,7 @@ /* PR debug/7241 */ /* { dg-do compile } */ /* { dg-options "-O2 -gdwarf -dA" } */ -/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } { "*" } { "" } } */ +/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } } */ /* { dg-final { scan-assembler "0x\[68\]\[ \t\]+\[#@;!/|\]+\[ \t\]+DW_AT_encoding" } } */ /* { dg-final { scan-assembler-not "0x\[57\]\[ \t\]+\[#@;!/|\]+\[ \t\]+DW_AT_encoding" } } */ diff --git a/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char3.c b/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char3.c index 4ff201f1345..4bcccdac66c 100644 --- a/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char3.c +++ b/gcc/testsuite/gcc.dg/debug/dwarf2/dwarf-char3.c @@ -1,7 +1,7 @@ /* PR debug/7241 */ /* { dg-do compile } */ /* { dg-options "-O2 -gdwarf -dA" } */ -/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } { "*" } { "" } } */ +/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } } */ /* { dg-final { scan-assembler "0x\[68\]\[ \t\]+\[#@;!/|\]+\[ \t\]+DW_AT_encoding" } } */ /* { dg-final { scan-assembler-not "0x\[57\]\[ \t\]+\[#@;!/|\]+\[ \t\]+DW_AT_encoding" } } */ diff --git a/gcc/testsuite/gcc.dg/debug/pr35154.c b/gcc/testsuite/gcc.dg/debug/pr35154.c index 7f6a6eaa0ec..08eefaf66f9 100644 --- a/gcc/testsuite/gcc.dg/debug/pr35154.c +++ b/gcc/testsuite/gcc.dg/debug/pr35154.c @@ -24,7 +24,7 @@ main() optb.f2 = 'D'; i_outer = 'e'; /* { dg-do compile } */ -/* { dg-skip-if "No stabs" { mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } { "*" } { "" } } */ +/* { dg-skip-if "No stabs" { mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } } */ /* { dg-skip-if "stabs only" { *-*-* } { "*" } { "-gstabs" } } */ return 0; } diff --git a/gcc/testsuite/gcc.dg/dfp/convert-dfp-round.c b/gcc/testsuite/gcc.dg/dfp/convert-dfp-round.c index e3781bfc967..ecae7dd7948 100644 --- a/gcc/testsuite/gcc.dg/dfp/convert-dfp-round.c +++ b/gcc/testsuite/gcc.dg/dfp/convert-dfp-round.c @@ -1,5 +1,5 @@ /* { dg-options "-O0" } */ -/* { dg-skip-if "test is for emulation" { hard_dfp } { "*" } { "" } } */ +/* { dg-skip-if "test is for emulation" { hard_dfp } } */ /* N1150 5.2: Conversions among decimal floating types and between decimal floating types and generic floating types. diff --git a/gcc/testsuite/gcc.dg/dfp/fe-binop.c b/gcc/testsuite/gcc.dg/dfp/fe-binop.c index eb0da1b2c6e..f83577d72fa 100644 --- a/gcc/testsuite/gcc.dg/dfp/fe-binop.c +++ b/gcc/testsuite/gcc.dg/dfp/fe-binop.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "test is for emulation" { hard_dfp } { "*" } { "" } } */ +/* { dg-skip-if "test is for emulation" { hard_dfp } } */ /* Touch tests that check for raising appropriate exceptions for binary arithmetic operations on decimal float values. */ diff --git a/gcc/testsuite/gcc.dg/dfp/fe-convert-1.c b/gcc/testsuite/gcc.dg/dfp/fe-convert-1.c index b6528029b40..9185b017516 100644 --- a/gcc/testsuite/gcc.dg/dfp/fe-convert-1.c +++ b/gcc/testsuite/gcc.dg/dfp/fe-convert-1.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "test is for emulation" { hard_dfp } { "*" } { "" } } */ +/* { dg-skip-if "test is for emulation" { hard_dfp } } */ /* Check that appropriate exceptions are raised for conversions involving decimal float values. */ diff --git a/gcc/testsuite/gcc.dg/fold-bcopy.c b/gcc/testsuite/gcc.dg/fold-bcopy.c new file mode 100644 index 00000000000..ed6cd060339 --- /dev/null +++ b/gcc/testsuite/gcc.dg/fold-bcopy.c @@ -0,0 +1,54 @@ +/* PR tree-optimization/80933 - redundant bzero/bcopy calls not eliminated + { dg-do compile } + { dg-options "-O0 -Wall -fdump-tree-gimple" } */ + +void f0 (void *dst, const void *src, unsigned n) +{ + /* Bcopy(src, dst, ...) corresponds to memmove(dst, src, ...), + with the first two arguments transposed, not memcpy. */ + __builtin_bcopy (src, dst, n); +} + +void f1 (void *p, const void *q, unsigned n) +{ + /* A call with zero size should be eliminated. */ + __builtin_bcopy (q, p, 0); +} + +int f2 (const void *p, const void *q, unsigned n) +{ + return __builtin_bcmp (p, q, n); +} + +int f3 (const void *p, const void *q) +{ + /* A call with zero size should be folded into 0. */ + return __builtin_bcmp (p, q, 0); +} + +int f4 (const void *p, unsigned n) +{ + /* A call with the same argument should also be folded into 0. */ + return __builtin_bcmp (p, p, n); +} + +void f5 (void *p, unsigned n) +{ + __builtin_bzero (p, n); +} + +void f6 (void *p) +{ + /* A call with zero size should be eliminated. */ + __builtin_bzero (p, 0); +} + +/* Verify that calls to bcmp, bcopy, and bzero have all been removed + and one of each replaced with memcmp, memmove, and memset, respectively. + The remaining three should be eliminated. + { dg-final { scan-tree-dump-not "bcmp|bcopy|bzero" "gimple" } } + { dg-final { scan-tree-dump-times "memcmp|memmove|memset" 3 "gimple" } } + + Verify that the bcopy to memmove transformation correctly transposed + the source and destination pointer arguments. + { dg-final { scan-tree-dump-times "memmove \\(dst, src" 1 "gimple" } } */ diff --git a/gcc/testsuite/gcc.dg/format/dfp-printf-1.c b/gcc/testsuite/gcc.dg/format/dfp-printf-1.c index 4453ad192b5..e92f1610c34 100644 --- a/gcc/testsuite/gcc.dg/format/dfp-printf-1.c +++ b/gcc/testsuite/gcc.dg/format/dfp-printf-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target dfp } */ /* { dg-options "-Wformat" } */ -/* { dg-skip-if "No scanf/printf dfp support" { *-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "No scanf/printf dfp support" { *-*-mingw* } } */ extern int printf (const char *restrict, ...); diff --git a/gcc/testsuite/gcc.dg/graphite/pr81090.c b/gcc/testsuite/gcc.dg/graphite/pr81090.c new file mode 100644 index 00000000000..b5ebd43a91f --- /dev/null +++ b/gcc/testsuite/gcc.dg/graphite/pr81090.c @@ -0,0 +1,27 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -floop-nest-optimize" } */ + +int x3, za; +int hg[1]; + +void +yw (int dq) +{ + const int r7 = 2; + + while (dq < 1) + { + for (x3 = 0; x3 < r7; ++x3) + for (za = 0; za < r7; ++za) + hg[1] = 0; + ++dq; + } + + x3 = 0; + while (x3 < r7) + { + ++x3; + if (x3 == 0) + break; + } +} diff --git a/gcc/testsuite/gcc.dg/graphite/run-id-pr47653.c b/gcc/testsuite/gcc.dg/graphite/run-id-pr47653.c index 20fdf87565e..cd9d8ebcb16 100644 --- a/gcc/testsuite/gcc.dg/graphite/run-id-pr47653.c +++ b/gcc/testsuite/gcc.dg/graphite/run-id-pr47653.c @@ -1,6 +1,6 @@ /* { dg-options "-O -fstack-check=generic -ftree-pre -fgraphite-identity" } */ /* nvptx doesn't expose a stack. */ -/* { dg-skip-if "" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { nvptx-*-* } } */ int main () { diff --git a/gcc/testsuite/gcc.dg/loop-3.c b/gcc/testsuite/gcc.dg/loop-3.c index 2c500d02217..7472ea1dfc6 100644 --- a/gcc/testsuite/gcc.dg/loop-3.c +++ b/gcc/testsuite/gcc.dg/loop-3.c @@ -4,7 +4,7 @@ /* { dg-do compile } */ /* { dg-options "-O3" } */ /* { dg-options "-O3 -mtune=i386" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #if defined(STACK_SIZE) && (STACK_SIZE < 65536) # define BYTEMEM_SIZE 10000L diff --git a/gcc/testsuite/gcc.dg/loop-8.c b/gcc/testsuite/gcc.dg/loop-8.c index 5fcab7b077b..842c0e773b2 100644 --- a/gcc/testsuite/gcc.dg/loop-8.c +++ b/gcc/testsuite/gcc.dg/loop-8.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O1 -fdump-rtl-loop2_invariant" } */ -/* { dg-skip-if "unexpected IV" { "hppa*-*-* mips*-*-* visium-*-* powerpc*-*-* riscv*-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "unexpected IV" { "hppa*-*-* mips*-*-* visium-*-* powerpc*-*-* riscv*-*-*" } } */ void f (int *a, int *b) diff --git a/gcc/testsuite/gcc.dg/loop-invariant.c b/gcc/testsuite/gcc.dg/loop-invariant.c index fe66bb9aaf0..702050b5c7e 100644 --- a/gcc/testsuite/gcc.dg/loop-invariant.c +++ b/gcc/testsuite/gcc.dg/loop-invariant.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target x86_64-*-* } } */ +/* { dg-do compile { target i?86-*-* x86_64-*-* } } */ /* { dg-options "-O2 -fdump-rtl-loop2_invariant" } */ /* NOTE: The target list above could be extended to other targets that have conditional moves, but don't have zero registers. */ diff --git a/gcc/testsuite/gcc.dg/lower-subreg-1.c b/gcc/testsuite/gcc.dg/lower-subreg-1.c index 47057fe0afa..6bae73055a9 100644 --- a/gcc/testsuite/gcc.dg/lower-subreg-1.c +++ b/gcc/testsuite/gcc.dg/lower-subreg-1.c @@ -1,7 +1,7 @@ /* { dg-do compile { target { ! { mips64 || { aarch64*-*-* arm*-*-* ia64-*-* sparc*-*-* spu-*-* tilegx-*-* } } } } } */ /* { dg-options "-O -fdump-rtl-subreg1" } */ /* { dg-additional-options "-mno-stv" { target ia32 } } */ -/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && x32 } { "*" } { "" } } */ +/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && x32 } } */ /* { dg-require-effective-target ilp32 } */ long long test (long long a, long long b) { return a | b; } diff --git a/gcc/testsuite/gcc.dg/lto/20081126_0.c b/gcc/testsuite/gcc.dg/lto/20081126_0.c index 9243da96a79..f610d097ed6 100644 --- a/gcc/testsuite/gcc.dg/lto/20081126_0.c +++ b/gcc/testsuite/gcc.dg/lto/20081126_0.c @@ -1,5 +1,5 @@ /* { dg-lto-do link } */ -/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } } */ /* { dg-lto-options {{-flto -r -nostdlib}} } */ int f(void) { diff --git a/gcc/testsuite/gcc.dg/lto/20081204-2_0.c b/gcc/testsuite/gcc.dg/lto/20081204-2_0.c index 53446050f95..c08da1791d1 100644 --- a/gcc/testsuite/gcc.dg/lto/20081204-2_0.c +++ b/gcc/testsuite/gcc.dg/lto/20081204-2_0.c @@ -1,5 +1,5 @@ /* { dg-lto-do link } */ -/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } } */ /* { dg-lto-options {{-w -flto -fPIC -r -nostdlib}} } */ register int ri asm("edi"); diff --git a/gcc/testsuite/gcc.dg/lto/20090206-1_0.c b/gcc/testsuite/gcc.dg/lto/20090206-1_0.c index 83d2c8607f5..3fbfb23843d 100644 --- a/gcc/testsuite/gcc.dg/lto/20090206-1_0.c +++ b/gcc/testsuite/gcc.dg/lto/20090206-1_0.c @@ -1,5 +1,5 @@ /* { dg-lto-do link } */ -/* { dg-skip-if "" { ! { i?86-*-linux* i?86-*-gnu* x86_64-*-linux* } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { i?86-*-linux* i?86-*-gnu* x86_64-*-linux* } } } */ /* { dg-lto-options {{-fPIC -r -nostdlib -flto -flto-partition=1to1 -msse2}} } */ /* { dg-require-effective-target sse2 } */ /* { dg-suppress-ld-options {-fPIC -msse2} } */ diff --git a/gcc/testsuite/gcc.dg/lto/20090206-2_0.c b/gcc/testsuite/gcc.dg/lto/20090206-2_0.c index 40b71328fa9..b82e4167a44 100644 --- a/gcc/testsuite/gcc.dg/lto/20090206-2_0.c +++ b/gcc/testsuite/gcc.dg/lto/20090206-2_0.c @@ -1,5 +1,5 @@ /* { dg-lto-do link } */ -/* { dg-skip-if "" { ! { i?86-*-linux* i?86-*-gnu* x86_64-*-linux* } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { i?86-*-linux* i?86-*-gnu* x86_64-*-linux* } } } */ /* { dg-require-effective-target fpic } */ /* { dg-lto-options {{-flto -flto-partition=1to1 -fPIC}} } */ /* { dg-suppress-ld-options {-fPIC} } */ diff --git a/gcc/testsuite/gcc.dg/lto/20090914-2_0.c b/gcc/testsuite/gcc.dg/lto/20090914-2_0.c index d83ed377bb4..668e201e2e1 100644 --- a/gcc/testsuite/gcc.dg/lto/20090914-2_0.c +++ b/gcc/testsuite/gcc.dg/lto/20090914-2_0.c @@ -1,7 +1,7 @@ /* { dg-lto-do run } */ -/* { dg-skip-if "x86 only" { ! { x86_64-*-* i?86-*-* } } { "*" } { "" } } */ -/* { dg-skip-if "no .type" { *-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "no @function" { *-*-mingw* *-*-cygwin* } { "*" } { "" } } */ +/* { dg-skip-if "x86 only" { ! { x86_64-*-* i?86-*-* } } } */ +/* { dg-skip-if "no .type" { *-*-darwin* } } */ +/* { dg-skip-if "no @function" { *-*-mingw* *-*-cygwin* } } */ /* Doesn't work without this dummy function with -fwhopr. */ int foo(void) { } diff --git a/gcc/testsuite/gcc.dg/lto/20091013-1_1.c b/gcc/testsuite/gcc.dg/lto/20091013-1_1.c index b75d0959cc3..c9581772fda 100644 --- a/gcc/testsuite/gcc.dg/lto/20091013-1_1.c +++ b/gcc/testsuite/gcc.dg/lto/20091013-1_1.c @@ -1,4 +1,4 @@ -/* { dg-xfail-if "cast to pointer of different size" { "avr-*-*" x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-xfail-if "cast to pointer of different size" { "avr-*-*" x86_64-*-mingw* } } */ typedef struct HDC__ { int unused; } *HDC; typedef struct HFONT__ { int unused; } *HFONT; diff --git a/gcc/testsuite/gcc.dg/lto/20091013-1_2.c b/gcc/testsuite/gcc.dg/lto/20091013-1_2.c index c8560413567..94a4f729b03 100644 --- a/gcc/testsuite/gcc.dg/lto/20091013-1_2.c +++ b/gcc/testsuite/gcc.dg/lto/20091013-1_2.c @@ -1,4 +1,4 @@ -/* { dg-xfail-if "cast to pointer of different size" { "avr-*-*" x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-xfail-if "cast to pointer of different size" { "avr-*-*" x86_64-*-mingw* } } */ typedef struct HDC__ { int unused; } *HDC; typedef struct HFONT__ { int unused; } *HFONT; diff --git a/gcc/testsuite/gcc.dg/lto/20100518_0.c b/gcc/testsuite/gcc.dg/lto/20100518_0.c index c0e9c8be2f7..cf19a50550c 100644 --- a/gcc/testsuite/gcc.dg/lto/20100518_0.c +++ b/gcc/testsuite/gcc.dg/lto/20100518_0.c @@ -1,5 +1,5 @@ /* { dg-lto-do link } */ -/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } } */ /* Forgot to steam in/out the number of labels for asm goto. PR44184. */ extern int printf (__const char *__restrict __format, ...); diff --git a/gcc/testsuite/gcc.dg/lto/20120723_0.c b/gcc/testsuite/gcc.dg/lto/20120723_0.c index 77694d8503a..4724e3e03c7 100644 --- a/gcc/testsuite/gcc.dg/lto/20120723_0.c +++ b/gcc/testsuite/gcc.dg/lto/20120723_0.c @@ -2,7 +2,7 @@ mixed up. ??? This testcase is invalid C and can only pass on specific platforms. */ /* { dg-lto-do run } */ -/* { dg-skip-if "" { { sparc*-*-* } && ilp32 } { "*" } { "" } } */ +/* { dg-skip-if "" { { sparc*-*-* } && ilp32 } } */ /* { dg-lto-options { {-O3 -fno-early-inlining -flto -Wno-lto-type-mismatch}} } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/lto/pr47259_0.c b/gcc/testsuite/gcc.dg/lto/pr47259_0.c index bda485cae5b..3549c97fdc8 100644 --- a/gcc/testsuite/gcc.dg/lto/pr47259_0.c +++ b/gcc/testsuite/gcc.dg/lto/pr47259_0.c @@ -1,5 +1,5 @@ /* { dg-lto-do link } */ -/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } } */ /* { dg-lto-options { { -O2 -flto -w } } } */ register int r asm("esi"); diff --git a/gcc/testsuite/gcc.dg/lto/pr69866_0.c b/gcc/testsuite/gcc.dg/lto/pr69866_0.c new file mode 100644 index 00000000000..8c90030a57d --- /dev/null +++ b/gcc/testsuite/gcc.dg/lto/pr69866_0.c @@ -0,0 +1,14 @@ +/* { dg-lto-do link } */ +/* { dg-require-alias "" } */ + +int _umh(int i) +{ + return i+1; +} + +int weaks(int i) __attribute__((weak, alias("_umh"))); + +int main() +{ + return weaks(10); +} diff --git a/gcc/testsuite/gcc.dg/lto/pr69866_1.c b/gcc/testsuite/gcc.dg/lto/pr69866_1.c new file mode 100644 index 00000000000..3a14f850eef --- /dev/null +++ b/gcc/testsuite/gcc.dg/lto/pr69866_1.c @@ -0,0 +1,6 @@ +/* { dg-options { -fno-lto } } */ + +int weaks(int i) +{ + return i+1; +} diff --git a/gcc/testsuite/gcc.dg/lto/pr70955_0.c b/gcc/testsuite/gcc.dg/lto/pr70955_0.c index c3b75fc56b3..52d000a8d58 100644 --- a/gcc/testsuite/gcc.dg/lto/pr70955_0.c +++ b/gcc/testsuite/gcc.dg/lto/pr70955_0.c @@ -1,5 +1,5 @@ -/* __builtin_ms_va_list is only supported for x86_64 -m64. */ -/* { dg-skip-if "" { ! {x86_64-*-* && { ! ilp32 } } } } */ +/* __builtin_ms_va_list is only supported for x86 -m64. */ +/* { dg-skip-if "" { ! { { i?86-*-* x86_64-*-* } && { ! ilp32 } } } } */ #include <stdio.h> diff --git a/gcc/testsuite/gcc.dg/pic-macro-define.c b/gcc/testsuite/gcc.dg/pic-macro-define.c index 7bda6fedfef..09234325361 100644 --- a/gcc/testsuite/gcc.dg/pic-macro-define.c +++ b/gcc/testsuite/gcc.dg/pic-macro-define.c @@ -1,4 +1,5 @@ -/* { dg-do run { target "i?86-*-*-darwin" powerpc*-*-darwin* } } */ +/* { dg-do run } */ +/* { dg-require-effective-target fpic } */ /* { dg-options "-fPIC" } */ #if defined __PIC__ diff --git a/gcc/testsuite/gcc.dg/pr25805.c b/gcc/testsuite/gcc.dg/pr25805.c index 94133ddd952..2c083f20342 100644 --- a/gcc/testsuite/gcc.dg/pr25805.c +++ b/gcc/testsuite/gcc.dg/pr25805.c @@ -2,7 +2,7 @@ storage for d1.a. */ /* { dg-do run } */ /* { dg-options "" } */ -/* { dg-skip-if "packed attribute missing for d1" { "epiphany-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "packed attribute missing for d1" { "epiphany-*-*" } } */ extern void abort (void); extern void exit (int); diff --git a/gcc/testsuite/gcc.dg/pr27531-1.c b/gcc/testsuite/gcc.dg/pr27531-1.c index 990c183fe41..b1ea748acb2 100644 --- a/gcc/testsuite/gcc.dg/pr27531-1.c +++ b/gcc/testsuite/gcc.dg/pr27531-1.c @@ -4,7 +4,7 @@ output to reference a label that had been eliminated. */ /* { dg-do link } */ /* { dg-options "-O2" } */ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ typedef struct _IO_FILE FILE; char const *RCSname; diff --git a/gcc/testsuite/gcc.dg/pr28243.c b/gcc/testsuite/gcc.dg/pr28243.c index d09639989d8..3fc8b7e0edd 100644 --- a/gcc/testsuite/gcc.dg/pr28243.c +++ b/gcc/testsuite/gcc.dg/pr28243.c @@ -4,7 +4,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target fpic } */ /* { dg-options "-O2 -ftracer -fPIC" } */ -/* { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } { "*" } { "" } } */ +/* { dg-skip-if "requires unsupported run-time relocation" { spu-*-* } } */ struct displayfuncs { void (*init) (); diff --git a/gcc/testsuite/gcc.dg/pr35045.c b/gcc/testsuite/gcc.dg/pr35045.c index bcd01d75150..626bde4b67b 100644 --- a/gcc/testsuite/gcc.dg/pr35045.c +++ b/gcc/testsuite/gcc.dg/pr35045.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } { "*" } { "" } } */ +/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } } */ /* { dg-options "-O2 -fgcse-after-reload" } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/pr40172-3.c b/gcc/testsuite/gcc.dg/pr40172-3.c index ea74fce37c6..c44707c9e67 100644 --- a/gcc/testsuite/gcc.dg/pr40172-3.c +++ b/gcc/testsuite/gcc.dg/pr40172-3.c @@ -1,6 +1,6 @@ /* PR middle-end/40172 */ /* { dg-do compile */ -/* { dg-xfail-if "" { "*-*-*" } { "*" } { "" } } */ +/* { dg-xfail-if "" { "*-*-*" } } */ /* { dg-options "-Wall -W -Werror -Wlogical-op" } */ extern int xxx; diff --git a/gcc/testsuite/gcc.dg/pr41241.c b/gcc/testsuite/gcc.dg/pr41241.c index 893353b9e8e..8ba92ab925d 100644 --- a/gcc/testsuite/gcc.dg/pr41241.c +++ b/gcc/testsuite/gcc.dg/pr41241.c @@ -2,7 +2,7 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fcompare-debug -g" } */ /* { dg-options "-O2 -fcompare-debug -g -march=i586 -mtune=i586 -fomit-frame-pointer" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ typedef struct { int t1; int t2; int t3; } *T; typedef struct { int s; } S; diff --git a/gcc/testsuite/gcc.dg/pr41345.c b/gcc/testsuite/gcc.dg/pr41345.c index b2c72c72fb1..cb0809171e5 100644 --- a/gcc/testsuite/gcc.dg/pr41345.c +++ b/gcc/testsuite/gcc.dg/pr41345.c @@ -1,7 +1,7 @@ /* PR bootstrap/41345 */ /* { dg-do compile } */ /* { dg-options "-O2 -g -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ void foo (int *x) diff --git a/gcc/testsuite/gcc.dg/pr42629.c b/gcc/testsuite/gcc.dg/pr42629.c index 40e92985e6c..bb742210314 100644 --- a/gcc/testsuite/gcc.dg/pr42629.c +++ b/gcc/testsuite/gcc.dg/pr42629.c @@ -4,7 +4,7 @@ /* { dg-options "-O1 -fsched-pressure -fschedule-insns -fcompare-debug" { target scheduling } } */ /* { dg-options "-O1 -fcompare-debug" { target { ! scheduling } } } */ /* { dg-require-effective-target int32plus } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ int lzo_adler32(int adler, char *buf) { diff --git a/gcc/testsuite/gcc.dg/pr42630.c b/gcc/testsuite/gcc.dg/pr42630.c index 5685637a078..08427ab6d06 100644 --- a/gcc/testsuite/gcc.dg/pr42630.c +++ b/gcc/testsuite/gcc.dg/pr42630.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O1 -fvariable-expansion-in-unroller -funroll-loops -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ int sum(int *buf, int len) { diff --git a/gcc/testsuite/gcc.dg/pr42631.c b/gcc/testsuite/gcc.dg/pr42631.c index 18fb67d1d5e..9dd51a24de5 100644 --- a/gcc/testsuite/gcc.dg/pr42631.c +++ b/gcc/testsuite/gcc.dg/pr42631.c @@ -15,7 +15,7 @@ /* { dg-do compile } */ /* { dg-options "-g -O1 -funroll-loops -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ void foo() { diff --git a/gcc/testsuite/gcc.dg/pr42719.c b/gcc/testsuite/gcc.dg/pr42719.c index 06adf52a4ef..a44b83562f3 100644 --- a/gcc/testsuite/gcc.dg/pr42719.c +++ b/gcc/testsuite/gcc.dg/pr42719.c @@ -1,7 +1,7 @@ /* PR tree-optimization/42719 */ /* { dg-do compile } */ /* { dg-options "-O2 -ftracer -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ int *v; diff --git a/gcc/testsuite/gcc.dg/pr42728.c b/gcc/testsuite/gcc.dg/pr42728.c index 8bd7b06ff8e..3ee919b63f9 100644 --- a/gcc/testsuite/gcc.dg/pr42728.c +++ b/gcc/testsuite/gcc.dg/pr42728.c @@ -1,7 +1,7 @@ /* PR debug/42728 */ /* { dg-do compile } */ /* { dg-options "-O1 -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ void foo (char *a) diff --git a/gcc/testsuite/gcc.dg/pr42889.c b/gcc/testsuite/gcc.dg/pr42889.c index b518b2057f1..a8e9e6088ab 100644 --- a/gcc/testsuite/gcc.dg/pr42889.c +++ b/gcc/testsuite/gcc.dg/pr42889.c @@ -1,7 +1,7 @@ /* PR rtl-optimization/42889 */ /* { dg-do compile } */ /* { dg-options "-O -fgcse -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ extern int A[], B[]; diff --git a/gcc/testsuite/gcc.dg/pr42916.c b/gcc/testsuite/gcc.dg/pr42916.c index c2e69e36181..bbe443609c2 100644 --- a/gcc/testsuite/gcc.dg/pr42916.c +++ b/gcc/testsuite/gcc.dg/pr42916.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O1 -funroll-loops -ftree-vectorize -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ int seed; diff --git a/gcc/testsuite/gcc.dg/pr43084.c b/gcc/testsuite/gcc.dg/pr43084.c index df5510071b9..2afc48444a1 100644 --- a/gcc/testsuite/gcc.dg/pr43084.c +++ b/gcc/testsuite/gcc.dg/pr43084.c @@ -1,7 +1,7 @@ /* PR debug/43084 */ /* { dg-do compile } */ /* { dg-options "-O1 -fipa-struct-reorg -fwhole-program -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ struct S { diff --git a/gcc/testsuite/gcc.dg/pr43670.c b/gcc/testsuite/gcc.dg/pr43670.c index 19504b728fe..45088fe01e3 100644 --- a/gcc/testsuite/gcc.dg/pr43670.c +++ b/gcc/testsuite/gcc.dg/pr43670.c @@ -1,7 +1,7 @@ /* PR debug/43670 */ /* { dg-do compile } */ /* { dg-options "-O -ftree-vrp -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/pr44023.c b/gcc/testsuite/gcc.dg/pr44023.c index 344ca28c52d..90f85534fc6 100644 --- a/gcc/testsuite/gcc.dg/pr44023.c +++ b/gcc/testsuite/gcc.dg/pr44023.c @@ -3,7 +3,7 @@ /* { dg-options "-fcompare-debug -O2" } */ /* { dg-options "-fcompare-debug -O2 -mcpu=ev67" { target alpha*-*-* } } */ /* { dg-require-effective-target int32plus } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ void foo (unsigned f, long v, unsigned *w, unsigned a, unsigned b, unsigned e, unsigned c, unsigned d) diff --git a/gcc/testsuite/gcc.dg/pr44606.c b/gcc/testsuite/gcc.dg/pr44606.c index 1d0848e9c30..13cc3efc193 100644 --- a/gcc/testsuite/gcc.dg/pr44606.c +++ b/gcc/testsuite/gcc.dg/pr44606.c @@ -1,7 +1,7 @@ /* PR target/44606 */ /* { dg-do run } */ /* { dg-options "-O2" } */ -/* { dg-skip-if "requires io" { freestanding } { "*" } { "" } } */ +/* { dg-skip-if "requires io" { freestanding } } */ #include <stdio.h> diff --git a/gcc/testsuite/gcc.dg/pr44971.c b/gcc/testsuite/gcc.dg/pr44971.c index 4314458098b..209695901ea 100644 --- a/gcc/testsuite/gcc.dg/pr44971.c +++ b/gcc/testsuite/gcc.dg/pr44971.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fcompare-debug -w" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ typedef struct { diff --git a/gcc/testsuite/gcc.dg/pr45416.c b/gcc/testsuite/gcc.dg/pr45416.c index 57950344886..a3f6a759d3b 100644 --- a/gcc/testsuite/gcc.dg/pr45416.c +++ b/gcc/testsuite/gcc.dg/pr45416.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "Skip for Thumb1." { { arm*-*-* } && { arm_thumb1_ok } } { "*" } { "" } } */ +/* { dg-skip-if "Skip for Thumb1." { { arm*-*-* } && { arm_thumb1_ok } } } */ /* { dg-options "-O2" } */ int foo(long long a) diff --git a/gcc/testsuite/gcc.dg/pr45449.c b/gcc/testsuite/gcc.dg/pr45449.c index 1162497405e..61ddcbc424a 100644 --- a/gcc/testsuite/gcc.dg/pr45449.c +++ b/gcc/testsuite/gcc.dg/pr45449.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fno-tree-pre -fno-tree-pta -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ struct S { diff --git a/gcc/testsuite/gcc.dg/pr46309-2.c b/gcc/testsuite/gcc.dg/pr46309-2.c index 39b9b8377f7..f56df42935c 100644 --- a/gcc/testsuite/gcc.dg/pr46309-2.c +++ b/gcc/testsuite/gcc.dg/pr46309-2.c @@ -142,4 +142,4 @@ f10 (int a) /* { dg-final { scan-tree-dump-times "Optimizing range tests a_\[0-9\]*.D. -.0, 31. and -.64, 95.\[\n\r\]* into" 1 "reassoc1" } } */ /* { dg-final { scan-tree-dump-times "Optimizing range tests a_\[0-9\]*.D. -.128, 159. and -.192, 223.\[\n\r\]* into" 1 "reassoc1" } } */ /* { dg-final { scan-tree-dump-times "Optimizing range tests a_\[0-9\]*.D. -.1, 1. and -.2, 2. and -.3, 3. and -.4, 4. and -.5, 5. and -.6, 6. and -.7, 7. and -.8, 8.\[\n\r\]* into" 7 "reassoc1" } } */ -/* { dg-final { scan-tree-dump-times "Optimizing range tests \[^\r\n\]*_\[0-9\]* -.0, 31. and -.128, 159.\[\n\r\]* into" 1 "reassoc2" } } */ +/* { dg-final { scan-tree-dump-times "Optimizing range tests \[^\r\n\]*_\[0-9\]* -.0, 0. and -.128, 128.\[\n\r\]* into" 1 "reassoc2" } } */ diff --git a/gcc/testsuite/gcc.dg/pr46309.c b/gcc/testsuite/gcc.dg/pr46309.c index f362ac3eb42..68229cf61d9 100644 --- a/gcc/testsuite/gcc.dg/pr46309.c +++ b/gcc/testsuite/gcc.dg/pr46309.c @@ -65,4 +65,4 @@ f6 (unsigned int a) /* { dg-final { scan-tree-dump-times "Optimizing range tests a_\[0-9\]*.D. -.1, 1. and -.2, 2.\[\n\r\]* into" 1 "reassoc1" } } */ /* { dg-final { scan-tree-dump-times "Optimizing range tests a_\[0-9\]*.D. -.0, 31. and -.64, 95.\[\n\r\]* into" 2 "reassoc1" } } */ /* { dg-final { scan-tree-dump-times "Optimizing range tests a_\[0-9\]*.D. -.128, 159. and -.192, 223.\[\n\r\]* into" 1 "reassoc1" } } */ -/* { dg-final { scan-tree-dump-times "Optimizing range tests \[^\r\n\]*_\[0-9\]* -.0, 31. and -.128, 159.\[\n\r\]* into" 1 "reassoc2" } } */ +/* { dg-final { scan-tree-dump-times "Optimizing range tests \[^\r\n\]*_\[0-9\]* -.0, 0. and -.128, 128.\[\n\r\]* into" 1 "reassoc2" } } */ diff --git a/gcc/testsuite/gcc.dg/pr46771.c b/gcc/testsuite/gcc.dg/pr46771.c index e4413027cee..3ba00a1397c 100644 --- a/gcc/testsuite/gcc.dg/pr46771.c +++ b/gcc/testsuite/gcc.dg/pr46771.c @@ -1,7 +1,7 @@ /* PR debug/46771 */ /* { dg-do compile } */ /* { dg-options "-O -ftree-vectorize -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ unsigned char v[1600]; diff --git a/gcc/testsuite/gcc.dg/pr47684.c b/gcc/testsuite/gcc.dg/pr47684.c index 7cda812dd7f..7c66d4deece 100644 --- a/gcc/testsuite/gcc.dg/pr47684.c +++ b/gcc/testsuite/gcc.dg/pr47684.c @@ -1,7 +1,7 @@ /* PR debug/47684 */ /* { dg-do compile } */ /* { dg-options "-O3 -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ int in[8][4]; int out[4]; diff --git a/gcc/testsuite/gcc.dg/pr47881.c b/gcc/testsuite/gcc.dg/pr47881.c index bad9806255d..ef0bd88d60a 100644 --- a/gcc/testsuite/gcc.dg/pr47881.c +++ b/gcc/testsuite/gcc.dg/pr47881.c @@ -1,7 +1,7 @@ /* PR debug/47881 */ /* { dg-do compile } */ /* { dg-options "-O -fcompare-debug -fno-dce -funroll-loops -fno-web" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ extern int data[]; diff --git a/gcc/testsuite/gcc.dg/pr47893.c b/gcc/testsuite/gcc.dg/pr47893.c index 868ae3e334b..7e1064d03aa 100644 --- a/gcc/testsuite/gcc.dg/pr47893.c +++ b/gcc/testsuite/gcc.dg/pr47893.c @@ -2,7 +2,7 @@ /* { dg-do run } */ /* { dg-options "-O2" } */ /* { dg-additional-options "-mtune=atom -fno-omit-frame-pointer -fno-strict-aliasing" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */ -/* { dg-skip-if "Too much RAM needed" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "Too much RAM needed" { "avr-*-*" } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/pr48768.c b/gcc/testsuite/gcc.dg/pr48768.c index 0ab22ee3a6d..990c537c194 100644 --- a/gcc/testsuite/gcc.dg/pr48768.c +++ b/gcc/testsuite/gcc.dg/pr48768.c @@ -1,7 +1,7 @@ /* PR debug/48768 */ /* { dg-do compile } */ /* { dg-options "-O -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ int a, b; diff --git a/gcc/testsuite/gcc.dg/pr49551.c b/gcc/testsuite/gcc.dg/pr49551.c index 54776156636..dda0667f3e6 100644 --- a/gcc/testsuite/gcc.dg/pr49551.c +++ b/gcc/testsuite/gcc.dg/pr49551.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O -fdata-sections" } */ -/* { dg-skip-if "-fdata-sections not supported" { hppa*-*-hpux* nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "-fdata-sections not supported" { hppa*-*-hpux* nvptx-*-* } } */ int x = 1; int x; diff --git a/gcc/testsuite/gcc.dg/pr50017.c b/gcc/testsuite/gcc.dg/pr50017.c index feeb4d445ee..e3f5f1f0a94 100644 --- a/gcc/testsuite/gcc.dg/pr50017.c +++ b/gcc/testsuite/gcc.dg/pr50017.c @@ -1,7 +1,7 @@ /* PR debug/50017 */ /* { dg-do compile } */ /* { dg-options "-O3 -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ struct S { int r, i; }; diff --git a/gcc/testsuite/gcc.dg/pr56023.c b/gcc/testsuite/gcc.dg/pr56023.c index ae0117bc21b..d53a22ce8f7 100644 --- a/gcc/testsuite/gcc.dg/pr56023.c +++ b/gcc/testsuite/gcc.dg/pr56023.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ void foo (char *c) diff --git a/gcc/testsuite/gcc.dg/pr56228.c b/gcc/testsuite/gcc.dg/pr56228.c index f1221b9d779..6e2b4b1ab99 100644 --- a/gcc/testsuite/gcc.dg/pr56228.c +++ b/gcc/testsuite/gcc.dg/pr56228.c @@ -1,7 +1,7 @@ /* PR target/56228 */ /* { dg-do assemble } */ /* { dg-options "-O2" } */ -/* { dg-skip-if "accessing program memory with data memory address" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "accessing program memory with data memory address" { "avr-*-*" } } */ short a[14] = { 1, 2 }; short b[15] = { 3, 4 }; diff --git a/gcc/testsuite/gcc.dg/pr59418.c b/gcc/testsuite/gcc.dg/pr59418.c index 12999aa49e8..4b54ef2b42d 100644 --- a/gcc/testsuite/gcc.dg/pr59418.c +++ b/gcc/testsuite/gcc.dg/pr59418.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-options "-Os -g" } */ -/* { dg-options "-march=armv7-a -mfloat-abi=hard -Os -g" { target { arm*-*-* && { ! arm_thumb1 } } } } */ +/* { dg-options "-march=armv7-a+fp -mfloat-abi=hard -Os -g" { target { arm*-*-* && { ! arm_thumb1 } } } } */ extern int printf (const char *__format, ...); double bar (const char *, int); diff --git a/gcc/testsuite/gcc.dg/pr64434.c b/gcc/testsuite/gcc.dg/pr64434.c index 699687136fd..d70550d4168 100644 --- a/gcc/testsuite/gcc.dg/pr64434.c +++ b/gcc/testsuite/gcc.dg/pr64434.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O1 -fdump-rtl-expand-details" } */ -/* { dg-skip-if "PR64886" { hppa*-*-hpux* } { "*" } { "" } } */ +/* { dg-skip-if "PR64886" { hppa*-*-hpux* } } */ #define N 256 int a1[N], a2[N], a3[N], a4[N]; diff --git a/gcc/testsuite/gcc.dg/pr64935-1.c b/gcc/testsuite/gcc.dg/pr64935-1.c index 08f2531d6ac..c9c67ebb4c6 100644 --- a/gcc/testsuite/gcc.dg/pr64935-1.c +++ b/gcc/testsuite/gcc.dg/pr64935-1.c @@ -1,7 +1,7 @@ /* PR rtl-optimization/64935 */ /* { dg-do compile } */ /* { dg-options "-std=gnu89 -Wno-shift-count-overflow -O2 -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ int a[] = {}, b[] = {}, c[] = {}, d[] = {}, e[] = {}, f[] = {}, h[] = {}; int g[] = { 0 }; diff --git a/gcc/testsuite/gcc.dg/pr64935-2.c b/gcc/testsuite/gcc.dg/pr64935-2.c index 8d0a81aa560..bde658d4456 100644 --- a/gcc/testsuite/gcc.dg/pr64935-2.c +++ b/gcc/testsuite/gcc.dg/pr64935-2.c @@ -2,7 +2,7 @@ /* { dg-do compile } */ /* { dg-options "-O -fschedule-insns --param=max-sched-ready-insns=0 -fcompare-debug" } */ /* { dg-require-effective-target scheduling } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ void foo (int *data, unsigned len, const int qlp_coeff[], diff --git a/gcc/testsuite/gcc.dg/pr65521.c b/gcc/testsuite/gcc.dg/pr65521.c index be73dfbcfe7..49d6a4c8377 100644 --- a/gcc/testsuite/gcc.dg/pr65521.c +++ b/gcc/testsuite/gcc.dg/pr65521.c @@ -1,7 +1,7 @@ /* PR ipa/65521 */ /* { dg-do compile } */ /* { dg-options "-O2 -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ struct S { int s; }; int f6 (void *, unsigned long); diff --git a/gcc/testsuite/gcc.dg/pr65779.c b/gcc/testsuite/gcc.dg/pr65779.c index 814cb2cdeef..fa6515fedbb 100644 --- a/gcc/testsuite/gcc.dg/pr65779.c +++ b/gcc/testsuite/gcc.dg/pr65779.c @@ -1,7 +1,7 @@ /* PR debug/65779 */ /* { dg-do assemble } */ /* { dg-options "-O2 -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ unsigned long foo (unsigned long x, unsigned char *y, unsigned int z) diff --git a/gcc/testsuite/gcc.dg/pr65980.c b/gcc/testsuite/gcc.dg/pr65980.c index dbd42c5c866..4babad6d417 100644 --- a/gcc/testsuite/gcc.dg/pr65980.c +++ b/gcc/testsuite/gcc.dg/pr65980.c @@ -1,7 +1,7 @@ /* PR rtl-optimization/65980 */ /* { dg-do compile } */ /* { dg-options "-O3 -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ typedef struct { int b; } A; void (*a) (int); diff --git a/gcc/testsuite/gcc.dg/pr66688.c b/gcc/testsuite/gcc.dg/pr66688.c index 48b83d7ee0f..c7f4ccbdaca 100644 --- a/gcc/testsuite/gcc.dg/pr66688.c +++ b/gcc/testsuite/gcc.dg/pr66688.c @@ -1,7 +1,7 @@ /* PR tree-optimization/66688 */ /* { dg-do compile } */ /* { dg-options "-O2 -fno-reorder-blocks -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ struct fdt_header { unsigned magic; } *a; diff --git a/gcc/testsuite/gcc.dg/pr68671.c b/gcc/testsuite/gcc.dg/pr68671.c index 09501561817..9b473ca8f00 100644 --- a/gcc/testsuite/gcc.dg/pr68671.c +++ b/gcc/testsuite/gcc.dg/pr68671.c @@ -1,7 +1,7 @@ /* PR tree-optimization/68671 */ /* { dg-do run } */ /* { dg-options " -O2 -fno-tree-dce" } */ -/* { dg-xfail-if "ptxas crashes" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-xfail-if "ptxas crashes" { nvptx-*-* } } */ volatile int a = -1; volatile int b; diff --git a/gcc/testsuite/gcc.dg/pr70405.c b/gcc/testsuite/gcc.dg/pr70405.c index a2bc96ac241..25e057648a6 100644 --- a/gcc/testsuite/gcc.dg/pr70405.c +++ b/gcc/testsuite/gcc.dg/pr70405.c @@ -2,7 +2,7 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fcompare-debug" } */ /* { dg-additional-options "-mavx512f" { target i?86-*-* x86_64-*-* } } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ typedef short V __attribute__ ((vector_size (32))); diff --git a/gcc/testsuite/gcc.dg/pr79214.c b/gcc/testsuite/gcc.dg/pr79214.c index 79d2a256956..6cf254fb28d 100644 --- a/gcc/testsuite/gcc.dg/pr79214.c +++ b/gcc/testsuite/gcc.dg/pr79214.c @@ -22,7 +22,7 @@ size_t range (void) void test_bzero (void) { - bzero (d, range ()); /* { dg-warning ".__builtin_bzero. writing 4 or more bytes into a region of size 3 overflows the destination" } */ + bzero (d, range ()); /* { dg-warning ".__builtin_(bzero|memset). writing 4 or more bytes into a region of size 3 overflows the destination" } */ } void test_memcpy (void) diff --git a/gcc/testsuite/gcc.dg/pubtypes-1.c b/gcc/testsuite/gcc.dg/pubtypes-1.c index 3f09646c806..4d675b8e400 100644 --- a/gcc/testsuite/gcc.dg/pubtypes-1.c +++ b/gcc/testsuite/gcc.dg/pubtypes-1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target *-*-darwin* } } */ /* { dg-options "-O0 -gdwarf-2 -dA -fno-eliminate-unused-debug-types" } */ -/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } { "*" } { "" } } */ +/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } } */ /* { dg-final { scan-assembler "__debug_pubtypes" } } */ /* { dg-final { scan-assembler "long+\[ \t\]+0x\[0-9a-f]+\[ \t\]+\[#;]+\[ \t\]+Pub Info Length" } } */ /* { dg-final { scan-assembler "used_struct\\\\0\"+\[ \t\]+\[#;]+\[ \t\]+external name" } } */ diff --git a/gcc/testsuite/gcc.dg/pubtypes-2.c b/gcc/testsuite/gcc.dg/pubtypes-2.c index b4ba8712c5e..3ac3a3835c8 100644 --- a/gcc/testsuite/gcc.dg/pubtypes-2.c +++ b/gcc/testsuite/gcc.dg/pubtypes-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target *-*-darwin* } } */ /* { dg-options "-O0 -gdwarf-2 -dA" } */ -/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } { "*" } { "" } } */ +/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } } */ /* { dg-final { scan-assembler "__debug_pubtypes" } } */ /* { dg-final { scan-assembler "long+\[ \t\]+0x13b+\[ \t\]+\[#;]+\[ \t\]+Pub Info Length" } } */ /* { dg-final { scan-assembler "used_struct\\\\0\"+\[ \t\]+\[#;]+\[ \t\]+external name" } } */ diff --git a/gcc/testsuite/gcc.dg/pubtypes-3.c b/gcc/testsuite/gcc.dg/pubtypes-3.c index cd495352a9d..6fa1940c606 100644 --- a/gcc/testsuite/gcc.dg/pubtypes-3.c +++ b/gcc/testsuite/gcc.dg/pubtypes-3.c @@ -1,6 +1,6 @@ /* { dg-do compile { target *-*-darwin* } } */ /* { dg-options "-O0 -gdwarf-2 -dA" } */ -/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } { "*" } { "" } } */ +/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } } */ /* { dg-final { scan-assembler "__debug_pubtypes" } } */ /* { dg-final { scan-assembler "long+\[ \t\]+0x13b+\[ \t\]+\[#;]+\[ \t\]+Pub Info Length" } } */ /* { dg-final { scan-assembler "used_struct\\\\0\"+\[ \t\]+\[#;]+\[ \t\]+external name" } } */ diff --git a/gcc/testsuite/gcc.dg/pubtypes-4.c b/gcc/testsuite/gcc.dg/pubtypes-4.c index 85e2b5be2af..b2f520d8c82 100644 --- a/gcc/testsuite/gcc.dg/pubtypes-4.c +++ b/gcc/testsuite/gcc.dg/pubtypes-4.c @@ -1,6 +1,6 @@ /* { dg-do compile { target *-*-darwin* } } */ /* { dg-options "-O0 -gdwarf-2 -dA" } */ -/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } { "*" } { "" } } */ +/* { dg-skip-if "Unmatchable assembly" { mmix-*-* } } */ /* { dg-final { scan-assembler "__debug_pubtypes" } } */ /* { dg-final { scan-assembler "long+\[ \t\]+0x172+\[ \t\]+\[#;]+\[ \t\]+Pub Info Length" } } */ /* { dg-final { scan-assembler "used_struct\\\\0\"+\[ \t\]+\[#;]+\[ \t\]+external name" } } */ diff --git a/gcc/testsuite/gcc.dg/setjmp-1.c b/gcc/testsuite/gcc.dg/setjmp-1.c index c5dcef24934..600fb7f1ca1 100644 --- a/gcc/testsuite/gcc.dg/setjmp-1.c +++ b/gcc/testsuite/gcc.dg/setjmp-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-options "-O -Wclobbered -Wextra -Wall" } */ -/* { dg-skip-if "" { ! nonlocal_goto } { "*" } { "" } } */ +/* { dg-skip-if "" { ! nonlocal_goto } } */ #include <setjmp.h> diff --git a/gcc/testsuite/gcc.dg/sibcall-6.c b/gcc/testsuite/gcc.dg/sibcall-6.c index 744bf46981c..8ee72cac444 100644 --- a/gcc/testsuite/gcc.dg/sibcall-6.c +++ b/gcc/testsuite/gcc.dg/sibcall-6.c @@ -7,7 +7,7 @@ Contributed by Andreas Bauer <baueran@in.tum.de> */ /* { dg-do run { target epiphany-*-* i?86-*-* x86_64-*-* s390*-*-* } } */ -/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } { "*" } { "" } } */ +/* { dg-skip-if "" { { i?86-*-* x86_64-*-* } && { ia32 && { ! nonpic } } } } */ /* { dg-options "-O2 -foptimize-sibling-calls -fno-ipa-cp" } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/sms-12.c b/gcc/testsuite/gcc.dg/sms-12.c index 581e1d751cf..aef32ee0286 100644 --- a/gcc/testsuite/gcc.dg/sms-12.c +++ b/gcc/testsuite/gcc.dg/sms-12.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "" { ! { aarch64*-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { aarch64*-*-* } } } */ /* { dg-options "-O2 -fmodulo-sched -funroll-loops -fdump-rtl-sms --param sms-min-sc=1 -fmodulo-sched-allow-regmoves -fPIC" } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.dg/special/weak-2.c b/gcc/testsuite/gcc.dg/special/weak-2.c index 91a92e6ccc5..b8133e2d7d9 100644 --- a/gcc/testsuite/gcc.dg/special/weak-2.c +++ b/gcc/testsuite/gcc.dg/special/weak-2.c @@ -4,7 +4,7 @@ /* NVPTX's implementation of weak is broken when a strong symbol is in a later object file than the weak definition. */ -/* { dg-skip-if "" { "nvptx-*-*" } "*" { "" } } */ +/* { dg-skip-if "" { "nvptx-*-*" } } */ #include <stdlib.h> diff --git a/gcc/testsuite/gcc.dg/stack-usage-1.c b/gcc/testsuite/gcc.dg/stack-usage-1.c index f10ba2061e7..45d2c7b6aae 100644 --- a/gcc/testsuite/gcc.dg/stack-usage-1.c +++ b/gcc/testsuite/gcc.dg/stack-usage-1.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-fstack-usage" } */ /* nvptx doesn't have a reg allocator, and hence no stack usage data. */ -/* { dg-skip-if "" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { nvptx-*-* } } */ /* This is aimed at testing basic support for -fstack-usage in the back-ends. See the SPARC back-end for example (grep flag_stack_usage_info in sparc.c). diff --git a/gcc/testsuite/gcc.dg/struct-ret-3.c b/gcc/testsuite/gcc.dg/struct-ret-3.c index c6f87acba9d..4083bb4c75e 100644 --- a/gcc/testsuite/gcc.dg/struct-ret-3.c +++ b/gcc/testsuite/gcc.dg/struct-ret-3.c @@ -2,7 +2,7 @@ /* Origin: Peeter Joot <peeterj@ca.ibm.com> */ /* { dg-do run { target *-*-linux* *-*-gnu* } } */ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #include <sys/mman.h> #include <string.h> diff --git a/gcc/testsuite/gcc.dg/torture/asm-subreg-1.c b/gcc/testsuite/gcc.dg/torture/asm-subreg-1.c index d3a14b24cdc..4090249563b 100644 --- a/gcc/testsuite/gcc.dg/torture/asm-subreg-1.c +++ b/gcc/testsuite/gcc.dg/torture/asm-subreg-1.c @@ -1,7 +1,7 @@ /* PR middle-end/20491 */ /* { dg-do compile } */ -/* { dg-skip-if "" { hppa*64*-*-* || sparc-*-vxworks* } "*" "" } */ +/* { dg-skip-if "" { hppa*64*-*-* || sparc-*-vxworks* } } */ /* Combine used to introduce invalid subregs for the asm input, and we'd crash later on, when removing all subregs. */ diff --git a/gcc/testsuite/gcc.dg/torture/builtin-math-7.c b/gcc/testsuite/gcc.dg/torture/builtin-math-7.c index 064e28641a7..d4ff1c8c179 100644 --- a/gcc/testsuite/gcc.dg/torture/builtin-math-7.c +++ b/gcc/testsuite/gcc.dg/torture/builtin-math-7.c @@ -6,7 +6,7 @@ /* { dg-do run } */ /* C6X fails due to -freciprocal-math default. */ -/* { dg-skip-if "" { tic6x-*-* } "*" "" } */ +/* { dg-skip-if "" { tic6x-*-* } } */ /* { dg-add-options ieee } */ /* { dg-require-effective-target large_double } */ diff --git a/gcc/testsuite/gcc.dg/torture/c99-contract-1.c b/gcc/testsuite/gcc.dg/torture/c99-contract-1.c index 78b4cdc9d01..392666f3dd5 100644 --- a/gcc/testsuite/gcc.dg/torture/c99-contract-1.c +++ b/gcc/testsuite/gcc.dg/torture/c99-contract-1.c @@ -2,7 +2,7 @@ expressions. */ /* { dg-do run } */ /* { dg-options "-std=c99 -pedantic-errors" } */ -/* { dg-skip-if "ptx only loosely follows IEEE" { "nvptx-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "ptx only loosely follows IEEE" { "nvptx-*-*" } } */ extern void abort (void); extern void exit (int); diff --git a/gcc/testsuite/gcc.dg/torture/pr26565.c b/gcc/testsuite/gcc.dg/torture/pr26565.c index d45272df3af..12332d4f6ed 100644 --- a/gcc/testsuite/gcc.dg/torture/pr26565.c +++ b/gcc/testsuite/gcc.dg/torture/pr26565.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* m32c is already packed. */ -/* { dg-skip-if "" { "m32c-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "" { "m32c-*-*" } } */ void *memcpy(void *dest, const void *src, __SIZE_TYPE__ n); diff --git a/gcc/testsuite/gcc.dg/torture/pr37868.c b/gcc/testsuite/gcc.dg/torture/pr37868.c index 5204c5a5941..51c38f81491 100644 --- a/gcc/testsuite/gcc.dg/torture/pr37868.c +++ b/gcc/testsuite/gcc.dg/torture/pr37868.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-options "-fno-strict-aliasing" } */ -/* { dg-skip-if "unaligned access" { arc*-*-* epiphany-*-* nds32*-*-* sparc*-*-* sh*-*-* tic6x-*-* } "*" "" } */ +/* { dg-skip-if "unaligned access" { arc*-*-* epiphany-*-* nds32*-*-* sparc*-*-* sh*-*-* tic6x-*-* } } */ extern void abort (void); #if (__SIZEOF_INT__ <= 2) diff --git a/gcc/testsuite/gcc.dg/torture/pr45764.c b/gcc/testsuite/gcc.dg/torture/pr45764.c index ac8c075dbb9..4847671fcad 100644 --- a/gcc/testsuite/gcc.dg/torture/pr45764.c +++ b/gcc/testsuite/gcc.dg/torture/pr45764.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Too much RAM needed" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "Too much RAM needed" { "avr-*-*" } } */ int result[64][16]; diff --git a/gcc/testsuite/gcc.dg/torture/pr51106-2.c b/gcc/testsuite/gcc.dg/torture/pr51106-2.c index 42095536c60..aa76a71c58d 100644 --- a/gcc/testsuite/gcc.dg/torture/pr51106-2.c +++ b/gcc/testsuite/gcc.dg/torture/pr51106-2.c @@ -1,7 +1,7 @@ /* PR target/51106 */ /* { dg-do "compile" } */ /* { dg-skip-if "RTL error" { "*-*-*" } { "-fno-fat-lto-objects" } { "" } } */ -/* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc-ibm-aix* } } */ int bar (int x) diff --git a/gcc/testsuite/gcc.dg/torture/pr53922.c b/gcc/testsuite/gcc.dg/torture/pr53922.c index fac054d9ce3..b3f2c1a58f8 100644 --- a/gcc/testsuite/gcc.dg/torture/pr53922.c +++ b/gcc/testsuite/gcc.dg/torture/pr53922.c @@ -1,9 +1,9 @@ /* { dg-do run } */ /* { dg-require-weak "" } */ -/* { dg-skip-if "No undefined" { *-*-mingw* } { "*" } { "" } } */ -/* { dg-skip-if "No undefined weak" { *-*-aix* } { "*" } { "" } } */ -/* { dg-skip-if "No undefined weak" { hppa*-*-hpux* && { ! lp64 } } { "*" } { "" } } */ -/* { dg-skip-if "No undefined weak" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "No undefined" { *-*-mingw* } } */ +/* { dg-skip-if "No undefined weak" { *-*-aix* } } */ +/* { dg-skip-if "No undefined weak" { hppa*-*-hpux* && { ! lp64 } } } */ +/* { dg-skip-if "No undefined weak" { nvptx-*-* } } */ /* { dg-options "-Wl,-undefined,dynamic_lookup" { target *-*-darwin* } } */ /* { dg-additional-options "-Wl,-flat_namespace" { target *-*-darwin[89]* } } */ diff --git a/gcc/testsuite/gcc.dg/torture/pr59166.c b/gcc/testsuite/gcc.dg/torture/pr59166.c index 5bdeaa6b78a..43df6be3016 100644 --- a/gcc/testsuite/gcc.dg/torture/pr59166.c +++ b/gcc/testsuite/gcc.dg/torture/pr59166.c @@ -1,6 +1,6 @@ /* PR rtl-optimization/59166 */ /* { dg-additional-options "-fcompare-debug" } */ -/* { dg-xfail-if "compare-debug failure" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "compare-debug failure" { powerpc-ibm-aix* } } */ int a, b, c, f, g; diff --git a/gcc/testsuite/gcc.dg/torture/pr60092.c b/gcc/testsuite/gcc.dg/torture/pr60092.c index d66e3f2444e..c23516c73b4 100644 --- a/gcc/testsuite/gcc.dg/torture/pr60092.c +++ b/gcc/testsuite/gcc.dg/torture/pr60092.c @@ -1,7 +1,7 @@ /* { dg-do run } */ /* { dg-require-weak "" } */ /* { dg-skip-if "No undefined weak" { hppa*-*-hpux* && { ! lp64 } } } */ -/* { dg-skip-if "No undefined weak" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "No undefined weak" { nvptx-*-* } } */ /* { dg-additional-options "-Wl,-undefined,dynamic_lookup" { target *-*-darwin* } } */ /* { dg-additional-options "-Wl,-flat_namespace" { target *-*-darwin[89]* } } */ /* { dg-xfail-run-if "posix_memalign modifies first arg on error" { *-*-solaris2.11* } { "-O0" } } */ diff --git a/gcc/testsuite/gcc.dg/torture/pr80970.c b/gcc/testsuite/gcc.dg/torture/pr80970.c new file mode 100644 index 00000000000..3b96b581e33 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr80970.c @@ -0,0 +1,13 @@ +/* { dg-do compile } */ + +int a, b, c, d, e; +void f () +{ + long g, h; + if (c) + e = d; + g = d & 31; + h = 1 << g; + a = e | h; + b = a; +} diff --git a/gcc/testsuite/gcc.dg/torture/pr81083.c b/gcc/testsuite/gcc.dg/torture/pr81083.c new file mode 100644 index 00000000000..53f96a3835a --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr81083.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ + +void setjmp(); +void func(); +void a(int arg) +{ + extern struct { int x; } obj; + setjmp(); + obj.x = arg; + arg = arg; + if (obj.x) + func(); + if (obj.x) + func(); +} diff --git a/gcc/testsuite/gcc.dg/torture/pr81118.c b/gcc/testsuite/gcc.dg/torture/pr81118.c new file mode 100644 index 00000000000..42d83fd0b07 --- /dev/null +++ b/gcc/testsuite/gcc.dg/torture/pr81118.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-w" } */ + +int a[7], b; +int c() +{ + int d, e; + for (; d; d++) + if (a[d]) + if (b) + return; + else if (d >= e) + return 0; +} diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-1.c index 6a35c9da8c3..2f5d629895a 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/alloca-1.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/alloca-1.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ /* { dg-require-effective-target alloca } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c index 41b5c05b3f8..d033010dc7c 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-apply-2.c @@ -9,8 +9,8 @@ /* arm_hf_eabi: Variadic funcs use Base AAPCS. Normal funcs use VFP variant. avr: Variadic funcs don't pass arguments in registers, while normal funcs do. */ -/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* } } "*" "" } */ -/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { nds32*-*-* } "*" "" } */ +/* { dg-skip-if "Variadic funcs use different argument passing from normal funcs" { arm_hf_eabi || { avr-*-* riscv*-*-* } } } */ +/* { dg-skip-if "Variadic funcs have all args on stack. Normal funcs have args in registers." { nds32*-*-* } } */ /* { dg-require-effective-target untyped_assembly } */ diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/comp-goto-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/comp-goto-1.c index 726bb209a94..f4ff831b40f 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/comp-goto-1.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/comp-goto-1.c @@ -1,7 +1,7 @@ /* { dg-do run } */ /* { dg-require-effective-target label_values } */ /* { dg-require-effective-target trampolines } */ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #ifdef STACK_SIZE #define DEPTH ((STACK_SIZE) / 512 + 1) diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/global-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/global-1.c index 91983f5513b..66bec64a0f5 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/global-1.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/global-1.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ -/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ +/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/inline-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/inline-1.c index 9f3db0359e5..912581e9ca8 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/inline-1.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/inline-1.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ -/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ +/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/inline-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/inline-2.c index f838435c758..37ee84f9efa 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/inline-2.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/inline-2.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ /* { dg-require-effective-target alloca } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/nested-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/nested-1.c index ea53330cb7a..ae9047e783d 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/nested-1.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/nested-1.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ -/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ +/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/nested-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/nested-2.c index ecfdcb01746..d083d6695b1 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/nested-2.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/nested-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ -/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ +/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/nested-3.c b/gcc/testsuite/gcc.dg/torture/stackalign/nested-3.c index 631cc929e88..4bebda6e2b9 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/nested-3.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/nested-3.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ /* { dg-require-effective-target alloca } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/nested-4.c b/gcc/testsuite/gcc.dg/torture/stackalign/nested-4.c index 0e94d2cc529..a46104b9df0 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/nested-4.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/nested-4.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ -/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ +/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/non-local-goto-4.c b/gcc/testsuite/gcc.dg/torture/stackalign/non-local-goto-4.c index 90ca71c9e2d..922c6b396df 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/non-local-goto-4.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/non-local-goto-4.c @@ -2,7 +2,7 @@ /* { dg-require-effective-target nonlocal_goto } */ /* { dg-require-effective-target label_values } */ /* { dg-require-effective-target trampolines } */ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ extern void abort (void); extern void exit (int); diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-1.c index 0eef809be01..459b3df2696 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-1.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-1.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ -/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ +/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-2.c index ee3dd74dc60..2aaff400109 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-2.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-2.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } "*" "" } */ +/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-3.c b/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-3.c index dc5abf278c1..ceb626682f8 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-3.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/pr16660-3.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } "*" "" } */ +/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/ret-struct-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/ret-struct-1.c index bb1b4a1e6c9..ff0488dc956 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/ret-struct-1.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/ret-struct-1.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ -/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ +/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/struct-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/struct-1.c index d0420ae23ce..4e9796f7826 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/struct-1.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/struct-1.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ -/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ +/* { dg-skip-if "Stack alignment causes use of alloca" { nvptx-*-* } } */ #include "check.h" diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/vararg-1.c b/gcc/testsuite/gcc.dg/torture/stackalign/vararg-1.c index 22d4f77356e..819b73b59fd 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/vararg-1.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/vararg-1.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ /* { dg-require-effective-target alloca } */ #include <stdarg.h> diff --git a/gcc/testsuite/gcc.dg/torture/stackalign/vararg-2.c b/gcc/testsuite/gcc.dg/torture/stackalign/vararg-2.c index c678b519495..f2d2a09215c 100644 --- a/gcc/testsuite/gcc.dg/torture/stackalign/vararg-2.c +++ b/gcc/testsuite/gcc.dg/torture/stackalign/vararg-2.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } "*" "" } */ +/* { dg-skip-if "Stack alignment is too small" { hppa*-*-hpux* } } */ /* { dg-require-effective-target alloca } */ #include <stdarg.h> diff --git a/gcc/testsuite/gcc.dg/tree-prof/comp-goto-1.c b/gcc/testsuite/gcc.dg/tree-prof/comp-goto-1.c index dd6774f2826..fe768f9a98d 100644 --- a/gcc/testsuite/gcc.dg/tree-prof/comp-goto-1.c +++ b/gcc/testsuite/gcc.dg/tree-prof/comp-goto-1.c @@ -1,7 +1,7 @@ /* { dg-require-effective-target freorder } */ /* { dg-require-effective-target label_values } */ /* { dg-options "-O2 -freorder-blocks-and-partition" } */ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ #include <stdlib.h> @@ -165,5 +165,5 @@ main () exit (0); } #else -main(){ exit (0); } +int main(){ exit (0); } #endif diff --git a/gcc/testsuite/gcc.dg/tree-prof/pr44777.c b/gcc/testsuite/gcc.dg/tree-prof/pr44777.c index 1249b5b251d..def11646cb8 100644 --- a/gcc/testsuite/gcc.dg/tree-prof/pr44777.c +++ b/gcc/testsuite/gcc.dg/tree-prof/pr44777.c @@ -2,7 +2,7 @@ /* { dg-require-effective-target label_values } */ /* { dg-require-effective-target trampolines } */ /* { dg-options "-O0" } */ -/* { dg-additional-options "-DSTACK_SIZE=[dg-effective-target-value stack_size]" { target { stack_size } } } */ +/* { dg-add-options stack_size } */ /* A variant of gcc.c-torture/execute/comp-goto-2.c. */ diff --git a/gcc/testsuite/gcc.dg/tree-prof/split-1.c b/gcc/testsuite/gcc.dg/tree-prof/split-1.c index a42fccf37b5..6986f7af1b4 100644 --- a/gcc/testsuite/gcc.dg/tree-prof/split-1.c +++ b/gcc/testsuite/gcc.dg/tree-prof/split-1.c @@ -1,6 +1,6 @@ -/* Test case that we don't get a link-time error when using - -fsplit-stack with -freorder-blocks-and-partition. */ -/* { dg-require-effective-target freorder } */ +/* Test that we don't get a link-time error when using -fsplit-stack + due to implicit enabling of -freorder-blocks-and-partition. */ +/* { dg-require-effective-target split_stack } */ /* { dg-options "-O2 -fsplit-stack" } */ extern unsigned int sleep (unsigned int); diff --git a/gcc/testsuite/gcc.dg/tree-prof/val-prof-7.c b/gcc/testsuite/gcc.dg/tree-prof/val-prof-7.c index 84ec9fbf7b5..c9303e053ee 100644 --- a/gcc/testsuite/gcc.dg/tree-prof/val-prof-7.c +++ b/gcc/testsuite/gcc.dg/tree-prof/val-prof-7.c @@ -1,17 +1,13 @@ /* { dg-options "-O2 -fdump-ipa-profile -mtune=core2" } */ -/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } } */ char *buffer1; char *buffer2; +/* Bzero is not tested because it gets transformed into memset. */ + #define DEFINE_TEST(N) \ __attribute__((noinline)) \ -void bzero_test_ ## N (int len) \ -{ \ - __builtin_bzero (buffer1, len); \ -} \ - \ -__attribute__((noinline)) \ void memcpy_test_ ## N (int len) \ { \ __builtin_memcpy (buffer1, buffer2, len); \ @@ -31,7 +27,6 @@ void memset_test_ ## N (int len) \ \ void test_stringops_ ## N(int len) \ { \ - bzero_test_ ## N (len); \ memcpy_test_## N (len); \ mempcpy_test_ ## N (len); \ memset_test_ ## N (len); \ @@ -64,10 +59,6 @@ int main() { return 0; } -/* { dg-final-use-not-autofdo { scan-ipa-dump "Single value 8 stringop transformation on __builtin_bzero" "profile" } } */ -/* { dg-final-use-not-autofdo { scan-ipa-dump "Single value 55 stringop transformation on __builtin_bzero" "profile" } } */ -/* { dg-final-use-not-autofdo { scan-ipa-dump-times "Single value 32 stringop transformation on __builtin_bzero" 0 "profile" } } */ - /* { dg-final-use-not-autofdo { scan-ipa-dump "Single value 8 stringop transformation on __builtin_memcpy" "profile" } } */ /* { dg-final-use-not-autofdo { scan-ipa-dump "Single value 55 stringop transformation on __builtin_memcpy" "profile" } } */ /* { dg-final-use-not-autofdo { scan-ipa-dump-times "Single value 32 stringop transformation on __builtin_memcpy" 0 "profile" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/addadd-2.c b/gcc/testsuite/gcc.dg/tree-ssa/addadd-2.c new file mode 100644 index 00000000000..39aa032c9b1 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/addadd-2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O -fdump-tree-optimized" } */ + +typedef int S __attribute__((vector_size(64))); +typedef unsigned U __attribute__((vector_size(64))); +void j(S*x){ + *x += __INT_MAX__; + *x += __INT_MAX__; +} +void k(S*x){ + U y = (U)(*x + __INT_MAX__); + *x = (S)(y + __INT_MAX__); +} + +/* { dg-final { scan-tree-dump-not "2147483647" "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/addadd.c b/gcc/testsuite/gcc.dg/tree-ssa/addadd.c index 669cfbc47ec..16474db6565 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/addadd.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/addadd.c @@ -29,6 +29,6 @@ void j(S*x){ *x += __INT_MAX__; } -/* { dg-final { scan-tree-dump-times " \\+ 24;" 2 "optimized" { xfail *-*-* } } } */ -/* { dg-final { scan-tree-dump-times "\\(unsigned int\\)" 2 "optimized" { xfail *-*-* } } } */ -/* { dg-final { scan-tree-dump-not "2147483647" "optimized" { xfail *-*-* } } } */ +/* { dg-final { scan-tree-dump-times " \\+ 24;" 2 "optimized" } } */ +/* { dg-final { scan-tree-dump-times "\\(unsigned int\\)" 2 "optimized" } } */ +/* { dg-final { scan-tree-dump-not "2147483647" "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/alias-36.c b/gcc/testsuite/gcc.dg/tree-ssa/alias-36.c new file mode 100644 index 00000000000..61b601a229e --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/alias-36.c @@ -0,0 +1,28 @@ +/* PR tree-optimization/80934 - bzero should be assumed not to escape + pointer argument + { dg-do compile } + { dg-options "-O2 -fdump-tree-alias" } */ + +void foobar (void); + +void f (void); + +void g (void) +{ + char d[32]; + __builtin_memset (d, 0, sizeof d); + f (); + if (*d != 0) + foobar (); +} + +void h (void) +{ + char d[32]; + __builtin_bzero (d, sizeof d); + f (); + if (*d != 0) + foobar (); +} + +/* { dg-final { scan-tree-dump-not "memset|foobar|bzero" "alias" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/attr-hotcold-2.c b/gcc/testsuite/gcc.dg/tree-ssa/attr-hotcold-2.c index f7a5098709b..184dd10ddae 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/attr-hotcold-2.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/attr-hotcold-2.c @@ -20,9 +20,9 @@ void f(int x, int y) /* { dg-final { scan-tree-dump-times "hot label heuristics" 1 "profile_estimate" } } */ /* { dg-final { scan-tree-dump-times "cold label heuristics" 1 "profile_estimate" } } */ -/* { dg-final { scan-tree-dump-times "block 4, loop depth 0, freq \[1-4\]\[^0-9\]" 3 "profile_estimate" } } */ +/* { dg-final { scan-tree-dump "A \\\[0\\\..*\\\]" "profile_estimate" } } */ /* Note: we're attempting to match some number > 6000, i.e. > 60%. The exact number ought to be tweekable without having to juggle the testcase around too much. */ -/* { dg-final { scan-tree-dump-times "block 5, loop depth 0, freq \[6-9\]\[0-9\]\[0-9\]\[0-9\]" 3 "profile_estimate" } } */ +/* { dg-final { scan-tree-dump "B \\\[\[6-9\]\[0-9\]\\\..*\\\]" "profile_estimate" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-2.c b/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-2.c index 8a13f33d2a1..2323b7fa3e9 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-2.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/builtin-sprintf-2.c @@ -279,18 +279,18 @@ RNG (0, 6, 8, "%s%ls", "1", L"2"); <bb 2>: result_3 = __builtin_sprintf (&MEM[(void *)&buf8k + 8192B], "%c", 32); if (result_3 != 0) - goto <bb 3>; [50.0%] + goto <bb 3>; [50.0%] [count: INV] else - goto <bb 4>; [50.0%] + goto <bb 4>; [50.0%] [count: INV] - <bb 3>[50.0%]: + <bb 3>[50.0%] [count: INV]: must_not_eliminate (); */ /* Only conditional calls to must_not_eliminate must be made (with any probability): - { dg-final { scan-tree-dump-times "> \\\[\[0-9.\]+%\\\]:\n *must_not_eliminate" 127 "optimized" { target { ilp32 || lp64 } } } } - { dg-final { scan-tree-dump-times "> \\\[\[0-9.\]+%\\\]:\n *must_not_eliminate" 96 "optimized" { target { { ! ilp32 } && { ! lp64 } } } } } + { dg-final { scan-tree-dump-times "> \\\[\[0-9.\]+%\\\] \\\[count: \[0-9INV\]*\\\]:\n *must_not_eliminate" 127 "optimized" { target { ilp32 || lp64 } } } } + { dg-final { scan-tree-dump-times "> \\\[\[0-9.\]+%\\\] \\\[count: \[0-9INV\]*\\\]:\n *must_not_eliminate" 96 "optimized" { target { { ! ilp32 } && { ! lp64 } } } } } No unconditional calls to abort should be made: { dg-final { scan-tree-dump-not ";\n *must_not_eliminate" "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/dump-2.c b/gcc/testsuite/gcc.dg/tree-ssa/dump-2.c index 8a63af4e0ef..6ae2ef5bf39 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/dump-2.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/dump-2.c @@ -6,4 +6,4 @@ int f(void) return 0; } -/* { dg-final { scan-tree-dump "<bb \[0-9\]> \\\[100\\\.00%\\\]:" "optimized" } } */ +/* { dg-final { scan-tree-dump "<bb \[0-9\]> \\\[100\\\.00%\\\] \\\[count: INV\\\]:" "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-37.c b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-37.c new file mode 100644 index 00000000000..dec826c76bd --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-37.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-O -fdump-tree-forwprop1-raw" } */ + +unsigned int +f1 (unsigned int a, unsigned int b) +{ + unsigned int x = 1U << b; + return a / x; +} + +unsigned long +f2 (unsigned long a, int b) +{ + unsigned long x = 1UL << b; + return a / x; +} + +unsigned long long +f3 (unsigned long long a, int b) +{ + unsigned long long x = 1ULL << b; + return a / x; +} + +/* { dg-final { scan-tree-dump-not "trunc_div_expr" "forwprop1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c b/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c index 1278e6e275a..2d713d6f574 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c @@ -20,6 +20,23 @@ struct a split_me (int a) retval = make_me_big (a); retval = make_me_big (a); retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); + retval = make_me_big (a); return retval; } } diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt-2.c b/gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt-2.c index 8dac4557daa..634f1dd51d3 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt-2.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ivopts-lt-2.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -fdump-tree-ivopts" } */ -/* { dg-skip-if "PR68644" { hppa*-*-* powerpc*-*-* } { "*" } { "" } } */ +/* { dg-skip-if "PR68644" { hppa*-*-* powerpc*-*-* } } */ void f1 (int *p, unsigned int i) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr47286.c b/gcc/testsuite/gcc.dg/tree-ssa/pr47286.c index 6c42260813c..91a7da7ae54 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr47286.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr47286.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { i?86-*-* x86_64-*-* } } } */ /* { dg-options "-O2 -fdump-tree-optimized" } */ struct thread_info { int preempt_count; }; diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr69196-1.c b/gcc/testsuite/gcc.dg/tree-ssa/pr69196-1.c index 5f92447854b..960491fd271 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr69196-1.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr69196-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target sparc*-*-* x86_64-*-* } } */ +/* { dg-do compile { target sparc*-*-* i?86-*-* x86_64-*-* } } */ /* { dg-options "-O2 -fdump-tree-thread1-details -fdisable-tree-ethread" } */ /* { dg-final { scan-tree-dump "FSM did not thread around loop and would copy too many statements" "thread1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr79803.c b/gcc/testsuite/gcc.dg/tree-ssa/pr79803.c index 51b245d4d5b..3b475fa6749 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/pr79803.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr79803.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { x86_64-*-* } } } */ +/* { dg-do compile { target { i?86-*-* x86_64-*-* } } } */ /* { dg-options "-march=opteron-sse3 -Ofast --param l1-cache-line-size=3 -Wdisabled-optimization" } */ /* { dg-require-effective-target indirect_jumps } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr80803.c b/gcc/testsuite/gcc.dg/tree-ssa/pr80803.c new file mode 100644 index 00000000000..66834fb31fb --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr80803.c @@ -0,0 +1,72 @@ +/* { dg-do run } */ +/* { dg-options "-O" } */ + +struct S0 +{ + unsigned a : 15; + int b; + int c; +}; + +struct S1 +{ + struct S0 s0; + int e; +}; + +struct Z +{ + char c; + int z; +} __attribute__((packed)); + +union U +{ + struct S1 s1; + struct Z z; +}; + + +int __attribute__((noinline, noclone)) +return_zero (void) +{ + return 0; +} + +volatile union U gu; +struct S0 gs; + +int __attribute__((noinline, noclone)) +check_outcome () +{ + if (gs.a != 6 + || gs.b != 80000) + __builtin_abort (); +} + +int +main (int argc, char *argv[]) +{ + union U u; + struct S1 m,n; + struct S0 l; + + if (return_zero ()) + u.z.z = 20000; + else + { + u.s1.s0.a = 6; + u.s1.s0.b = 80000; + u.s1.e = 2; + + n = u.s1; + m = n; + m.s0.c = 0; + l = m.s0; + gs = l; + } + + gu = u; + check_outcome (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr80887.c b/gcc/testsuite/gcc.dg/tree-ssa/pr80887.c new file mode 100644 index 00000000000..df7a9d96eeb --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr80887.c @@ -0,0 +1,32 @@ +/* { dg-do compile } */ +/* { dg-options "-fgimple -O" } */ + +int pos; +void __GIMPLE (startwith("fre")) +f() +{ + unsigned int t2; + unsigned int t1; + int a; + unsigned int u; + int _1; + int _2; + int _3; + unsigned int _4; + int _5; + unsigned int _6; + +bb_2: + _1 = pos; + _2 = _1 + 1; + pos = _2; + _3 = pos; + _4 = (unsigned int) _3; + u_9 = _4 + 4294967295u; + a_10 = pos; + _5 = a_10 + _Literal (int) -1; + t1_11 = (unsigned int) _5; + _6 = (unsigned int) a_10; + t2_12 = _6 + 4294967294u; + return; +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr81063.c b/gcc/testsuite/gcc.dg/tree-ssa/pr81063.c new file mode 100644 index 00000000000..399e2d19eb3 --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/pr81063.c @@ -0,0 +1,28 @@ +/* { dg-do run } */ +/* { dg-options "-O" } */ + +struct A +{ + int b; + int c:2; +}; + +struct B +{ + int e; + struct A f; +} g = {0, {0, 1}}, j; + +struct A *h = &g.f; + +int main () +{ + struct A k; + struct B l = j, i = l; + if (!i.f.b) + k = i.f; + *h = k; + if (g.f.c != 0) + __builtin_abort (); + return 0; +} diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-30.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-30.c new file mode 100644 index 00000000000..ece8cb2a80c --- /dev/null +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-dse-30.c @@ -0,0 +1,31 @@ +/* PR tree-optimization/80933 - redundant bzero/bcopy calls not eliminated + { dg-do compile } + { dg-options "-O2 -fdump-tree-dse1" } */ + +void sink (void*); + +void test_bcopy (const void *s) +{ + char d[33]; + + /* Bcopy is transformed into memcpy and those calls are expanded + inline in EVRP, before DSE runs, so this test doesn't actually + verify that DSE does its job. */ + __builtin_bcopy (s, d, sizeof d); + __builtin_bcopy (s, d, sizeof d); + + sink (d); +} + +void test_bzero (void) +{ + char d[33]; + + __builtin_bzero (d, sizeof d); + __builtin_bzero (d, sizeof d); + + sink (d); +} + +/* { dg-final { scan-tree-dump-times "builtin_memset" 1 "dse1" } } */ +/* { dg-final { scan-tree-dump-not "builtin_(bcopy|bzero|memcpy)" "dse1" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-11.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-11.c index 4c3898278b1..f35c0f38e29 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-11.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-11.c @@ -22,4 +22,4 @@ void access_buf(struct thread_param* p) } } -/* { dg-final { scan-tree-dump-times "Executing store motion of __gcov0.access_buf\\\[\[01\]\\\] from loop 1" 2 "lim2" } } */ +/* { dg-final { scan-tree-dump-times "Executing store motion of __gcov0.access_buf\\\[\[12\]\\\] from loop 1" 2 "lim2" } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-3.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-3.c index 98ec5b88fe5..621fc7cc78d 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-3.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-3.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* Skipped on MIPS GNU/Linux target because __PIC__ can be defined for executables as well as shared libraries. */ -/* { dg-skip-if "" { *-*-darwin* hppa*64*-*-* mips*-*-linux* *-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* hppa*64*-*-* mips*-*-linux* *-*-mingw* } } */ /* { dg-options "-O2 -fno-common -fdump-tree-optimized" } */ const int conststaticvariable; diff --git a/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-4.c b/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-4.c index d4ee28c0679..3e16347daf3 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-4.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/ssa-store-ccp-4.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target fpic } */ -/* { dg-skip-if "" { *-*-darwin* *-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* *-*-mingw* } } */ /* { dg-options "-O2 -fno-common -fpic -fdump-tree-optimized" } */ const int conststaticvariable; diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vrp101.c b/gcc/testsuite/gcc.dg/tree-ssa/vrp101.c index bf4109f7156..c9feb256857 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/vrp101.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/vrp101.c @@ -10,4 +10,4 @@ int main () return 0; } -/* { dg-final { scan-tree-dump "<bb 2> \\\[\[0-9.\]+%\\\]:\[\n\r \]*return 0;" "optimized" } } */ +/* { dg-final { scan-tree-dump "<bb 2> \\\[\[0-9.\]+%\\\] \\\[count: \[0-9INV\]*\\\]:\[\n\r \]*return 0;" "optimized" } } */ diff --git a/gcc/testsuite/gcc.dg/ucnid-10.c b/gcc/testsuite/gcc.dg/ucnid-10.c index 1438337b230..1a2d3e8a5ae 100644 --- a/gcc/testsuite/gcc.dg/ucnid-10.c +++ b/gcc/testsuite/gcc.dg/ucnid-10.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-options "-std=gnu99" } */ /* { dg-require-ascii-locale "" } */ -/* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc-ibm-aix* } } */ #pragma pack(push) #pragma pack(pop, \u00f3) /* { dg-warning "pop, \\\\U000000f3.*push, \\\\U000000f3" } */ diff --git a/gcc/testsuite/gcc.dg/ucnid-11.c b/gcc/testsuite/gcc.dg/ucnid-11.c index 0ef6bfe5e6c..d7b729e5986 100644 --- a/gcc/testsuite/gcc.dg/ucnid-11.c +++ b/gcc/testsuite/gcc.dg/ucnid-11.c @@ -1,7 +1,7 @@ /* { dg-do run } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ -/* { dg-skip-if "" { ! ucn } { "*" } { "" } } */ -/* { dg-skip-if "-fdata-sections not supported" { { hppa*-*-hpux* } && { ! lp64 } } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ +/* { dg-skip-if "" { ! ucn } } */ +/* { dg-skip-if "-fdata-sections not supported" { { hppa*-*-hpux* } && { ! lp64 } } } */ /* { dg-options "-std=c99 -fdata-sections -g" } */ #include "ucnid-3.c" diff --git a/gcc/testsuite/gcc.dg/ucnid-12.c b/gcc/testsuite/gcc.dg/ucnid-12.c index ca50653f899..987ac1dd487 100644 --- a/gcc/testsuite/gcc.dg/ucnid-12.c +++ b/gcc/testsuite/gcc.dg/ucnid-12.c @@ -1,7 +1,7 @@ /* { dg-do run } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ -/* { dg-skip-if "" { ! ucn } { "*" } { "" } } */ -/* { dg-skip-if "-ffunction-sections not supported" { { hppa*-*-hpux* } && { ! lp64 } } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ +/* { dg-skip-if "" { ! ucn } } */ +/* { dg-skip-if "-ffunction-sections not supported" { { hppa*-*-hpux* } && { ! lp64 } } } */ /* { dg-options "-std=c99 -ffunction-sections -g" } */ #include "ucnid-4.c" diff --git a/gcc/testsuite/gcc.dg/ucnid-13.c b/gcc/testsuite/gcc.dg/ucnid-13.c index 871f1034571..2928cd2ed94 100644 --- a/gcc/testsuite/gcc.dg/ucnid-13.c +++ b/gcc/testsuite/gcc.dg/ucnid-13.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-options "-std=gnu99 -Wpacked" } */ /* { dg-require-ascii-locale "" } */ -/* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc-ibm-aix* } } */ int a __attribute__((\u00c0)); /* { dg-warning "'\\\\U000000c0' attribute directive ignored" } */ diff --git a/gcc/testsuite/gcc.dg/ucnid-2.c b/gcc/testsuite/gcc.dg/ucnid-2.c index 577df38f623..35df3f08a2e 100644 --- a/gcc/testsuite/gcc.dg/ucnid-2.c +++ b/gcc/testsuite/gcc.dg/ucnid-2.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ -/* { dg-skip-if "" { ! ucn } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ +/* { dg-skip-if "" { ! ucn } } */ /* { dg-options "-std=c99 -g" } */ void abort (void); diff --git a/gcc/testsuite/gcc.dg/ucnid-3.c b/gcc/testsuite/gcc.dg/ucnid-3.c index 0f8d46b15c9..746524901c5 100644 --- a/gcc/testsuite/gcc.dg/ucnid-3.c +++ b/gcc/testsuite/gcc.dg/ucnid-3.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ -/* { dg-skip-if "" { ! ucn } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ +/* { dg-skip-if "" { ! ucn } } */ /* { dg-options "-std=c99 -g" } */ void abort (void); diff --git a/gcc/testsuite/gcc.dg/ucnid-4.c b/gcc/testsuite/gcc.dg/ucnid-4.c index 443dcb91798..c8e61c302a4 100644 --- a/gcc/testsuite/gcc.dg/ucnid-4.c +++ b/gcc/testsuite/gcc.dg/ucnid-4.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ -/* { dg-skip-if "" { ! ucn } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ +/* { dg-skip-if "" { ! ucn } } */ /* { dg-options "-std=c99 -g" } */ void abort (void); diff --git a/gcc/testsuite/gcc.dg/ucnid-5.c b/gcc/testsuite/gcc.dg/ucnid-5.c index a83dc8d8d29..16eedc3fc1f 100644 --- a/gcc/testsuite/gcc.dg/ucnid-5.c +++ b/gcc/testsuite/gcc.dg/ucnid-5.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "No dollar in identfiers" { "avr-*-*" } { "*" } { "" } } */ +/* { dg-skip-if "No dollar in identfiers" { "avr-*-*" } } */ /* { dg-options "-std=c99 -fdollars-in-identifiers -g" } */ void abort (void); diff --git a/gcc/testsuite/gcc.dg/ucnid-6.c b/gcc/testsuite/gcc.dg/ucnid-6.c index 3f67b86f8d6..a6f4fd4c113 100644 --- a/gcc/testsuite/gcc.dg/ucnid-6.c +++ b/gcc/testsuite/gcc.dg/ucnid-6.c @@ -1,6 +1,6 @@ /* { dg-do run } */ -/* { dg-xfail-if "" { "powerpc-ibm-aix*" } { "*" } { "" } } */ -/* { dg-skip-if "" { ! ucn } { "*" } { "" } } */ +/* { dg-xfail-if "" { "powerpc-ibm-aix*" } } */ +/* { dg-skip-if "" { ! ucn } } */ /* { dg-options "-std=c99 -save-temps -g" } */ void abort (void); diff --git a/gcc/testsuite/gcc.dg/ucnid-7.c b/gcc/testsuite/gcc.dg/ucnid-7.c index b90bf68cd31..fe265af7f79 100644 --- a/gcc/testsuite/gcc.dg/ucnid-7.c +++ b/gcc/testsuite/gcc.dg/ucnid-7.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-options "-std=c99" } */ /* { dg-require-ascii-locale "" } */ -/* { dg-skip-if "" { "powerpc-ibm-aix*" } { "*" } { "" } } */ +/* { dg-skip-if "" { "powerpc-ibm-aix*" } } */ void *p = &\u00e9; /* { dg-error "'\\\\U000000e9' undeclared" } */ void *q = &\u1e00; /* { dg-error "'\\\\U00001e00' undeclared" } */ diff --git a/gcc/testsuite/gcc.dg/ucnid-8.c b/gcc/testsuite/gcc.dg/ucnid-8.c index 450b4d9ef12..369b86a5d79 100644 --- a/gcc/testsuite/gcc.dg/ucnid-8.c +++ b/gcc/testsuite/gcc.dg/ucnid-8.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-options "-std=gnu99 -Wvla" } */ /* { dg-require-ascii-locale "" } */ -/* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc-ibm-aix* } } */ int a __attribute__((__mode__(\u00e9))); /* { dg-error "unknown machine mode '\\\\U000000e9'" } */ struct s1 { int \u00e9 : 0; }; /* { dg-error "zero width for bit-field '\\\\U000000e9'" } */ diff --git a/gcc/testsuite/gcc.dg/ucnid-9.c b/gcc/testsuite/gcc.dg/ucnid-9.c index 6af6d7665f4..ac61c92117f 100644 --- a/gcc/testsuite/gcc.dg/ucnid-9.c +++ b/gcc/testsuite/gcc.dg/ucnid-9.c @@ -1,8 +1,8 @@ /* Test __func__ with extended identifiers and character set conversions. */ /* { dg-do run } */ -/* { dg-xfail-if "" { "powerpc-ibm-aix*" } { "*" } { "" } } */ -/* { dg-skip-if "" { ! ucn } { "*" } { "" } } */ +/* { dg-xfail-if "" { "powerpc-ibm-aix*" } } */ +/* { dg-skip-if "" { ! ucn } } */ /* { dg-options "-std=c99 -fexec-charset=ISO-8859-1 -g" } */ /* { dg-require-iconv "ISO-8859-1" } */ diff --git a/gcc/testsuite/gcc.dg/unused-5.c b/gcc/testsuite/gcc.dg/unused-5.c index 1b8e100d249..bdd5c8ecd47 100644 --- a/gcc/testsuite/gcc.dg/unused-5.c +++ b/gcc/testsuite/gcc.dg/unused-5.c @@ -2,7 +2,7 @@ /* { dg-options "-Wunused" } */ /* { dg-final { scan-assembler "string_to_look_for" } } */ /* nvptx outputs strings as array of ints. */ -/* { dg-skip-if "" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { nvptx-*-* } } */ /* 'volatile' variables get output and don't produce a warning about being unused. */ diff --git a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c index f181bd845db..c092848dfc9 100644 --- a/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c +++ b/gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-slp-34.c @@ -1,5 +1,5 @@ /* { dg-require-effective-target vect_int } */ -/* { dg-skip-if "cost too high" { powerpc*le-*-* } { "*" } { "" } } */ +/* { dg-skip-if "cost too high" { powerpc*le-*-* } } */ #include <stdarg.h> #include "../../tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c b/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c index 5a4e4e95eb6..726c0de652f 100644 --- a/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c +++ b/gcc/testsuite/gcc.dg/vect/no-section-anchors-vect-68.c @@ -1,5 +1,5 @@ /* { dg-require-effective-target vect_int } */ -/* { dg-skip-if "AArch64 tiny code model does not support programs larger than 1MiB" {aarch64_tiny} {"*"} {""} } */ +/* { dg-skip-if "AArch64 tiny code model does not support programs larger than 1MiB" {aarch64_tiny} } */ /* { dg-add-options bind_pic_locally } */ #include <stdarg.h> diff --git a/gcc/testsuite/gcc.dg/vect/pr49352.c b/gcc/testsuite/gcc.dg/vect/pr49352.c index 82233b51945..b784b8a0964 100644 --- a/gcc/testsuite/gcc.dg/vect/pr49352.c +++ b/gcc/testsuite/gcc.dg/vect/pr49352.c @@ -1,7 +1,7 @@ /* PR tree-optimization/49352 */ /* { dg-do compile } */ /* { dg-additional-options "-O2 -fcompare-debug" } */ -/* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-xfail-if "" { powerpc-ibm-aix* } } */ int foo (int *x, int *y, int n) diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-1.c b/gcc/testsuite/gcc.dg/vect/pr65947-1.c index 93ca4dbcc21..9072f11a104 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-1.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-1.c @@ -40,5 +40,5 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" { xfail { ! vect_max_reduc } } } } */ -/* { dg-final { scan-tree-dump-times "condition expression based on integer induction." 4 "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" } } */ +/* { dg-final { scan-tree-dump-times "condition expression based on integer induction." 4 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-10.c b/gcc/testsuite/gcc.dg/vect/pr65947-10.c index 9bdfd6db518..a8a674f40f0 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-10.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-10.c @@ -40,6 +40,6 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" } } */ /* { dg-final { scan-tree-dump-not "condition expression based on integer induction." "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-12.c b/gcc/testsuite/gcc.dg/vect/pr65947-12.c index 2f37aaf01ec..8e2c46f1a6b 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-12.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-12.c @@ -41,5 +41,5 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" } } */ /* { dg-final { scan-tree-dump-not "condition expression based on integer induction." "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-13.c b/gcc/testsuite/gcc.dg/vect/pr65947-13.c index e1b626e45a3..061777af34c 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-13.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-13.c @@ -41,5 +41,5 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" } } */ /* { dg-final { scan-tree-dump-not "condition expression based on integer induction." "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-14.c b/gcc/testsuite/gcc.dg/vect/pr65947-14.c new file mode 100644 index 00000000000..a28e80bb9fc --- /dev/null +++ b/gcc/testsuite/gcc.dg/vect/pr65947-14.c @@ -0,0 +1,44 @@ +/* { dg-require-effective-target vect_condition } */ + +#include "tree-vect.h" + +extern void abort (void) __attribute__ ((noreturn)); + +#define N 27 + +/* Condition reduction with matches only in even lanes at runtime. */ + +int +condition_reduction (int *a, int min_v) +{ + int last = N + 96; + + for (int i = 0; i < N; i++) + if (a[i] > min_v) + last = i; + + return last; +} + +int +main (void) +{ + int a[N] = { + 47, 12, 13, 14, 15, 16, 17, 18, 19, 20, + 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, + 21, 22, 23, 24, 25, 26, 27 + }; + + check_vect (); + + int ret = condition_reduction (a, 46); + + /* loop should have found a value of 0, not default N + 96. */ + if (ret != 0) + abort (); + + return 0; +} + +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" } } */ +/* { dg-final { scan-tree-dump-times "condition expression based on integer induction." 4 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-2.c b/gcc/testsuite/gcc.dg/vect/pr65947-2.c index 6a36db131e4..d72fffa6720 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-2.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-2.c @@ -41,5 +41,5 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" } } */ /* { dg-final { scan-tree-dump-not "condition expression based on integer induction." "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-3.c b/gcc/testsuite/gcc.dg/vect/pr65947-3.c index 1323ed07c80..98945ba505d 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-3.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-3.c @@ -51,5 +51,5 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" } } */ /* { dg-final { scan-tree-dump-not "condition expression based on integer induction." "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-4.c b/gcc/testsuite/gcc.dg/vect/pr65947-4.c index d754b8d3ccb..695889d743b 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-4.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-4.c @@ -40,6 +40,6 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" { xfail { ! vect_max_reduc } } } } */ -/* { dg-final { scan-tree-dump-times "condition expression based on integer induction." 4 "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" } } */ +/* { dg-final { scan-tree-dump-times "condition expression based on integer induction." 4 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-5.c b/gcc/testsuite/gcc.dg/vect/pr65947-5.c index b2af501f40d..04d9b38d58a 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-5.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-5.c @@ -41,6 +41,6 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 1 "vect" { xfail { ! vect_max_reduc } } } } */ -/* { dg-final { scan-tree-dump "loop size is greater than data size" "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 1 "vect" } } */ +/* { dg-final { scan-tree-dump "loop size is greater than data size" "vect" } } */ /* { dg-final { scan-tree-dump-not "condition expression based on integer induction." "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-6.c b/gcc/testsuite/gcc.dg/vect/pr65947-6.c index 12dc852a32f..caa4a14120a 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-6.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-6.c @@ -40,5 +40,5 @@ main (void) return 0; } -/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump-times "LOOP VECTORIZED" 2 "vect" } } */ /* { dg-final { scan-tree-dump-not "condition expression based on integer induction." "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-8.c b/gcc/testsuite/gcc.dg/vect/pr65947-8.c index 293118582aa..f0f1ac29699 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-8.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-8.c @@ -42,4 +42,4 @@ main (void) } /* { dg-final { scan-tree-dump-not "LOOP VECTORIZED" "vect" } } */ -/* { dg-final { scan-tree-dump "multiple types in double reduction or condition reduction" "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump "multiple types in double reduction or condition reduction" "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/pr65947-9.c b/gcc/testsuite/gcc.dg/vect/pr65947-9.c index d5a76e9fc0d..d769af9ec73 100644 --- a/gcc/testsuite/gcc.dg/vect/pr65947-9.c +++ b/gcc/testsuite/gcc.dg/vect/pr65947-9.c @@ -9,10 +9,10 @@ extern void abort (void) __attribute__ ((noreturn)); /* Condition reduction with maximum possible loop size. Will fail to vectorize because the vectorisation requires a slot for default values. */ -char +signed char __attribute__((noinline,noclone)) condition_reduction (char *a, char min_v) { - char last = -72; + signed char last = -72; for (int i = 0; i < N; i++) if (a[i] < min_v) @@ -21,10 +21,10 @@ condition_reduction (char *a, char min_v) return last; } -char -main (void) +int +main () { - char a[N] = { + signed char a[N] = { 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, @@ -34,13 +34,16 @@ main (void) check_vect (); - char ret = condition_reduction (a, 16); - + signed char ret = condition_reduction (a, 16); if (ret != 10) abort (); + ret = condition_reduction (a, 1); + if (ret != -72) + abort (); + return 0; } /* { dg-final { scan-tree-dump-not "LOOP VECTORIZED" "vect" } } */ -/* { dg-final { scan-tree-dump "loop size is greater than data size" "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump "loop size is greater than data size" "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-82.c b/gcc/testsuite/gcc.dg/vect/vect-82.c index 7f4578e1e31..fcafb36c063 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-82.c +++ b/gcc/testsuite/gcc.dg/vect/vect-82.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "powerpc and integer vectorization only" { ! { powerpc*-*-* && vect_int } } { "*" } { "" } } */ +/* { dg-skip-if "powerpc and integer vectorization only" { ! { powerpc*-*-* && vect_int } } } */ #include <stdarg.h> #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/vect-82_64.c b/gcc/testsuite/gcc.dg/vect/vect-82_64.c index 8dc9d96f7ae..358a85a838f 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-82_64.c +++ b/gcc/testsuite/gcc.dg/vect/vect-82_64.c @@ -1,7 +1,7 @@ /* { dg-do run { target { { powerpc*-*-* && lp64 } && powerpc_altivec_ok } } } */ /* { dg-do compile { target { { powerpc*-*-* && ilp32 } && powerpc_altivec_ok } } } */ /* { dg-additional-options "-mpowerpc64 -maltivec" } */ -/* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc-ibm-aix* } } */ #include <stdarg.h> #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/vect-83.c b/gcc/testsuite/gcc.dg/vect/vect-83.c index 49beb31c609..a300a0a08c4 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-83.c +++ b/gcc/testsuite/gcc.dg/vect/vect-83.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "powerpc and integer vectorization only" { ! { powerpc*-*-* && vect_int } } { "*" } { "" } } */ +/* { dg-skip-if "powerpc and integer vectorization only" { ! { powerpc*-*-* && vect_int } } } */ #include <stdarg.h> #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/vect-83_64.c b/gcc/testsuite/gcc.dg/vect/vect-83_64.c index fe985cb84bb..a5e897e093d 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-83_64.c +++ b/gcc/testsuite/gcc.dg/vect/vect-83_64.c @@ -1,7 +1,7 @@ /* { dg-do run { target { { powerpc*-*-* && lp64 } && powerpc_altivec_ok } } } */ /* { dg-do compile { target { { powerpc*-*-* && ilp32 } && powerpc_altivec_ok } } } */ /* { dg-additional-options "-mpowerpc64 -maltivec" } */ -/* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc-ibm-aix* } } */ #include <stdarg.h> #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/vect-cond-2.c b/gcc/testsuite/gcc.dg/vect/vect-cond-2.c index 646eac12a38..094cfe76701 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-cond-2.c +++ b/gcc/testsuite/gcc.dg/vect/vect-cond-2.c @@ -39,6 +39,4 @@ int main (void) return 0; } -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { ! vect_max_reduc } } } } */ - - +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-pr69848.c b/gcc/testsuite/gcc.dg/vect/vect-pr69848.c index 779a657b34e..c08f1e2f5c0 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-pr69848.c +++ b/gcc/testsuite/gcc.dg/vect/vect-pr69848.c @@ -34,4 +34,4 @@ int main (void) return 0; } -/* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" { xfail { ! vect_max_reduc } } } } */ +/* { dg-final { scan-tree-dump "vectorized 1 loops" "vect" } } */ diff --git a/gcc/testsuite/gcc.dg/visibility-11.c b/gcc/testsuite/gcc.dg/visibility-11.c index d616fe9aeec..1bcc4240e63 100644 --- a/gcc/testsuite/gcc.dg/visibility-11.c +++ b/gcc/testsuite/gcc.dg/visibility-11.c @@ -3,7 +3,7 @@ hidden visibility from the first push, so the call didn't use the PLT. */ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* } } */ /* { dg-require-visibility "" } */ /* { dg-require-effective-target fpic } */ /* { dg-options "-Os -fpic -mstringop-strategy=libcall" } */ diff --git a/gcc/testsuite/gcc.dg/visibility-14.c b/gcc/testsuite/gcc.dg/visibility-14.c index e1d85f0ed25..9ec74471f03 100644 --- a/gcc/testsuite/gcc.dg/visibility-14.c +++ b/gcc/testsuite/gcc.dg/visibility-14.c @@ -1,6 +1,6 @@ /* Test that called external functions are marked. */ /* { dg-do compile } */ -/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* } } */ /* { dg-require-visibility "" } */ /* { dg-final { scan-hidden "foo" { xfail *-*-aix* } } } */ diff --git a/gcc/testsuite/gcc.dg/visibility-15.c b/gcc/testsuite/gcc.dg/visibility-15.c index 4e69fa1db4c..db555884f94 100644 --- a/gcc/testsuite/gcc.dg/visibility-15.c +++ b/gcc/testsuite/gcc.dg/visibility-15.c @@ -1,6 +1,6 @@ /* Test that accessed external functions are marked. */ /* { dg-do compile } */ -/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* } } */ /* { dg-require-visibility "" } */ /* { dg-final { scan-hidden "foo" { xfail *-*-aix* } } } */ diff --git a/gcc/testsuite/gcc.dg/visibility-16.c b/gcc/testsuite/gcc.dg/visibility-16.c index dcd5448d182..595bcb9b965 100644 --- a/gcc/testsuite/gcc.dg/visibility-16.c +++ b/gcc/testsuite/gcc.dg/visibility-16.c @@ -1,6 +1,6 @@ /* Test that accessed external variables are marked. */ /* { dg-do compile } */ -/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* } } */ /* { dg-require-visibility "" } */ /* { dg-final { scan-hidden "foo" { xfail *-*-aix* } } } */ diff --git a/gcc/testsuite/gcc.dg/visibility-17.c b/gcc/testsuite/gcc.dg/visibility-17.c index dc90d35839f..e8f68fe36d3 100644 --- a/gcc/testsuite/gcc.dg/visibility-17.c +++ b/gcc/testsuite/gcc.dg/visibility-17.c @@ -1,6 +1,6 @@ /* Test that external variable whose address is taken are marked. */ /* { dg-do compile } */ -/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* } } */ /* { dg-require-visibility "" } */ /* { dg-final { scan-hidden "foo" { xfail *-*-aix* } } } */ diff --git a/gcc/testsuite/gcc.dg/visibility-18.c b/gcc/testsuite/gcc.dg/visibility-18.c index 653e3b1971f..4b089f1cf2d 100644 --- a/gcc/testsuite/gcc.dg/visibility-18.c +++ b/gcc/testsuite/gcc.dg/visibility-18.c @@ -1,6 +1,6 @@ /* Test that external variable whose address is taken are marked. */ /* { dg-do compile } */ -/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* } } */ /* { dg-require-visibility "" } */ /* { dg-final { scan-hidden "foo" { xfail *-*-aix* } } } */ diff --git a/gcc/testsuite/gcc.dg/visibility-19.c b/gcc/testsuite/gcc.dg/visibility-19.c index 2b0b9beb401..140294f493c 100644 --- a/gcc/testsuite/gcc.dg/visibility-19.c +++ b/gcc/testsuite/gcc.dg/visibility-19.c @@ -1,6 +1,6 @@ /* Test that accessed external functions are marked. */ /* { dg-do compile } */ -/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* } } */ /* { dg-require-visibility "" } */ /* { dg-final { scan-hidden "foo" { xfail *-*-aix* } } } */ diff --git a/gcc/testsuite/gcc.dg/visibility-22.c b/gcc/testsuite/gcc.dg/visibility-22.c index 52f59be3341..5e8cdad4f40 100644 --- a/gcc/testsuite/gcc.dg/visibility-22.c +++ b/gcc/testsuite/gcc.dg/visibility-22.c @@ -5,7 +5,7 @@ /* This test requires support for undefined weak symbols. This support is not available on hppa*-*-hpux*. The test is skipped rather than xfailed to suppress the warning that would otherwise arise. */ -/* { dg-skip-if "" { "hppa*-*-hpux*" "*-*-aix*" "*-*-darwin*" } "*" { "" } } */ +/* { dg-skip-if "" { "hppa*-*-hpux*" "*-*-aix*" "*-*-darwin*" } } */ extern void foo () __attribute__((weak,visibility("hidden"))); int diff --git a/gcc/testsuite/gcc.dg/visibility-23.c b/gcc/testsuite/gcc.dg/visibility-23.c index 0fa9ef4c3e2..2abb605acf5 100644 --- a/gcc/testsuite/gcc.dg/visibility-23.c +++ b/gcc/testsuite/gcc.dg/visibility-23.c @@ -3,7 +3,7 @@ /* { dg-require-visibility "" } */ /* { dg-final { scan-hidden "foo" } } */ /* { dg-options "-O2 -fPIC" { target fpic } } */ -/* { dg-skip-if "" { "hppa*-*-hpux*" "*-*-aix*" "*-*-darwin*" } "*" { "" } } */ +/* { dg-skip-if "" { "hppa*-*-hpux*" "*-*-aix*" "*-*-darwin*" } } */ extern void foo () __attribute__((weak,visibility("hidden"))); int diff --git a/gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c b/gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c index 6428ea5d8b3..8c965f6fd66 100644 --- a/gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c +++ b/gcc/testsuite/gcc.dg/vmx/extract-vsx-be-order.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/extract-vsx.c b/gcc/testsuite/gcc.dg/vmx/extract-vsx.c index cd34a2ae3d3..900328251e6 100644 --- a/gcc/testsuite/gcc.dg/vmx/extract-vsx.c +++ b/gcc/testsuite/gcc.dg/vmx/extract-vsx.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c b/gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c index 672fc449eb5..6cb59dd8a63 100644 --- a/gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c +++ b/gcc/testsuite/gcc.dg/vmx/insert-vsx-be-order.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/insert-vsx.c b/gcc/testsuite/gcc.dg/vmx/insert-vsx.c index afb9c70166b..6885b8ce23f 100644 --- a/gcc/testsuite/gcc.dg/vmx/insert-vsx.c +++ b/gcc/testsuite/gcc.dg/vmx/insert-vsx.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c b/gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c index fc81beb0d0c..c870c55e856 100644 --- a/gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c +++ b/gcc/testsuite/gcc.dg/vmx/ld-vsx-be-order.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/ld-vsx.c b/gcc/testsuite/gcc.dg/vmx/ld-vsx.c index 9d2a529f8be..ce213777fd7 100644 --- a/gcc/testsuite/gcc.dg/vmx/ld-vsx.c +++ b/gcc/testsuite/gcc.dg/vmx/ld-vsx.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c b/gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c index 1dd0ca33ea2..222d1db0d75 100644 --- a/gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c +++ b/gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/ldl-vsx.c b/gcc/testsuite/gcc.dg/vmx/ldl-vsx.c index 4bf3224f67b..dc631f9fc9a 100644 --- a/gcc/testsuite/gcc.dg/vmx/ldl-vsx.c +++ b/gcc/testsuite/gcc.dg/vmx/ldl-vsx.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c b/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c index 56e0b0e6c2e..b01208d5f40 100644 --- a/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c +++ b/gcc/testsuite/gcc.dg/vmx/merge-vsx-be-order.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/merge-vsx.c b/gcc/testsuite/gcc.dg/vmx/merge-vsx.c index 40693e95b33..088b9bd150b 100644 --- a/gcc/testsuite/gcc.dg/vmx/merge-vsx.c +++ b/gcc/testsuite/gcc.dg/vmx/merge-vsx.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c b/gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c index cd389bd0f66..620a31f7692 100644 --- a/gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c +++ b/gcc/testsuite/gcc.dg/vmx/splat-vsx-be-order.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/splat-vsx.c b/gcc/testsuite/gcc.dg/vmx/splat-vsx.c index 5a6e7dfe46c..54ca3c294fe 100644 --- a/gcc/testsuite/gcc.dg/vmx/splat-vsx.c +++ b/gcc/testsuite/gcc.dg/vmx/splat-vsx.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c b/gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c index a2688fab570..48814462106 100644 --- a/gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c +++ b/gcc/testsuite/gcc.dg/vmx/st-vsx-be-order.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/st-vsx.c b/gcc/testsuite/gcc.dg/vmx/st-vsx.c index ef67de0baec..d048c53911f 100644 --- a/gcc/testsuite/gcc.dg/vmx/st-vsx.c +++ b/gcc/testsuite/gcc.dg/vmx/st-vsx.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c b/gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c index 26f2c27726f..65e2f256d06 100644 --- a/gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c +++ b/gcc/testsuite/gcc.dg/vmx/stl-vsx-be-order.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/vmx/stl-vsx.c b/gcc/testsuite/gcc.dg/vmx/stl-vsx.c index 9a1cce6f8f8..a5b973a1309 100644 --- a/gcc/testsuite/gcc.dg/vmx/stl-vsx.c +++ b/gcc/testsuite/gcc.dg/vmx/stl-vsx.c @@ -1,4 +1,4 @@ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mvsx" } */ diff --git a/gcc/testsuite/gcc.dg/weak/weak-1.c b/gcc/testsuite/gcc.dg/weak/weak-1.c index dc34079b650..6bbc66906ac 100644 --- a/gcc/testsuite/gcc.dg/weak/weak-1.c +++ b/gcc/testsuite/gcc.dg/weak/weak-1.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ /* { dg-require-weak "" } */ /* { dg-options "-fno-common" } */ -/* { dg-skip-if "" { *-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-mingw* } } */ /* NVPTX's definition of weak looks different to normal. */ -/* { dg-skip-if "" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { nvptx-*-* } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?a" } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?b" } } */ diff --git a/gcc/testsuite/gcc.dg/weak/weak-12.c b/gcc/testsuite/gcc.dg/weak/weak-12.c index 72f8991cc98..d26fde6bab7 100644 --- a/gcc/testsuite/gcc.dg/weak/weak-12.c +++ b/gcc/testsuite/gcc.dg/weak/weak-12.c @@ -3,7 +3,7 @@ /* { dg-require-weak "" } */ /* { dg-options "" } */ /* NVPTX's weak is applied to the definition, not declaration. */ -/* { dg-skip-if "" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { nvptx-*-* } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?foo" } } */ diff --git a/gcc/testsuite/gcc.dg/weak/weak-15.c b/gcc/testsuite/gcc.dg/weak/weak-15.c index d656d218580..6364baff80a 100644 --- a/gcc/testsuite/gcc.dg/weak/weak-15.c +++ b/gcc/testsuite/gcc.dg/weak/weak-15.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ /* { dg-require-weak "" } */ /* { dg-options "-fno-common" } */ -/* { dg-skip-if "" { x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "" { x86_64-*-mingw* } } */ /* NVPTX's weak is applied to the definition, not declaration. */ -/* { dg-skip-if "" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { nvptx-*-* } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?a" } } */ /* { dg-final { scan-assembler-not "weak\[^ \t\]*\[ \t\]_?b" } } */ diff --git a/gcc/testsuite/gcc.dg/weak/weak-16.c b/gcc/testsuite/gcc.dg/weak/weak-16.c index b1a08eadb09..2c58d659c0b 100644 --- a/gcc/testsuite/gcc.dg/weak/weak-16.c +++ b/gcc/testsuite/gcc.dg/weak/weak-16.c @@ -4,9 +4,9 @@ /* { dg-options "-fno-common -Os" } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?kallsyms_token_index" } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?kallsyms_token_table" } } */ -/* { dg-skip-if "" { x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "" { x86_64-*-mingw* } } */ /* NVPTX's weak is applied to the definition, not declaration. */ -/* { dg-skip-if "" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { nvptx-*-* } } */ extern int kallsyms_token_index[] __attribute__((weak)); extern int kallsyms_token_table[] __attribute__((weak)); diff --git a/gcc/testsuite/gcc.dg/weak/weak-2.c b/gcc/testsuite/gcc.dg/weak/weak-2.c index cad6e7b166d..67171cf742f 100644 --- a/gcc/testsuite/gcc.dg/weak/weak-2.c +++ b/gcc/testsuite/gcc.dg/weak/weak-2.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ /* { dg-require-weak "" } */ /* { dg-options "-fno-common" } */ -/* { dg-skip-if "" { x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "" { x86_64-*-mingw* } } */ /* NVPTX's definition of weak looks different to normal. */ -/* { dg-skip-if "" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { nvptx-*-* } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?ffoo1a" } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?ffoo1b" } } */ diff --git a/gcc/testsuite/gcc.dg/weak/weak-3.c b/gcc/testsuite/gcc.dg/weak/weak-3.c index ca6e0b62087..a719848c935 100644 --- a/gcc/testsuite/gcc.dg/weak/weak-3.c +++ b/gcc/testsuite/gcc.dg/weak/weak-3.c @@ -2,7 +2,7 @@ /* { dg-require-alias "" } */ /* { dg-require-weak "" } */ /* { dg-options "-fno-common -Waddress" } */ -/* { dg-skip-if "" { x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "" { x86_64-*-mingw* } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?ffoo1a" } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?ffoo1b" } } */ diff --git a/gcc/testsuite/gcc.dg/weak/weak-4.c b/gcc/testsuite/gcc.dg/weak/weak-4.c index d2d0e68b403..d0f32836e00 100644 --- a/gcc/testsuite/gcc.dg/weak/weak-4.c +++ b/gcc/testsuite/gcc.dg/weak/weak-4.c @@ -1,9 +1,9 @@ /* { dg-do compile } */ /* { dg-require-weak "" } */ /* { dg-options "-fno-common" } */ -/* { dg-skip-if "" { x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "" { x86_64-*-mingw* } } */ /* NVPTX's definition of weak looks different to normal. */ -/* { dg-skip-if "" { nvptx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { nvptx-*-* } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?vfoo1a" } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?vfoo1b" } } */ diff --git a/gcc/testsuite/gcc.dg/weak/weak-5.c b/gcc/testsuite/gcc.dg/weak/weak-5.c index 714c9dca0a4..6f80bb050bb 100644 --- a/gcc/testsuite/gcc.dg/weak/weak-5.c +++ b/gcc/testsuite/gcc.dg/weak/weak-5.c @@ -2,7 +2,7 @@ /* { dg-require-weak "" } */ /* { dg-require-alias "" } */ /* { dg-options "-fno-common" } */ -/* { dg-skip-if "" { x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "" { x86_64-*-mingw* } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?vfoo1a" } } */ /* { dg-final { scan-assembler "weak\[^ \t\]*\[ \t\]_?vfoo1b" } } */ diff --git a/gcc/testsuite/gcc.misc-tests/gcov-13.c b/gcc/testsuite/gcc.misc-tests/gcov-13.c index 2c80559a34b..b42b904ef3e 100644 --- a/gcc/testsuite/gcc.misc-tests/gcov-13.c +++ b/gcc/testsuite/gcc.misc-tests/gcov-13.c @@ -4,7 +4,7 @@ /* { dg-options "-fprofile-arcs -ftest-coverage" } */ /* { dg-require-weak "" } */ /* { dg-additional-sources "gcovpart-13b.c" } */ -/* { dg-skip-if "weak ellision not supported" { { hppa*-*-hpux* } && { ! lp64 } } { "*" } { "" } } */ +/* { dg-skip-if "weak ellision not supported" { { hppa*-*-hpux* } && { ! lp64 } } } */ int __attribute__ ((weak)) weak () { diff --git a/gcc/testsuite/gcc.target/aarch64/pr79794.c b/gcc/testsuite/gcc.target/aarch64/pr79794.c new file mode 100644 index 00000000000..363d2dbc8cc --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr79794.c @@ -0,0 +1,25 @@ +/* PR middle-end/79794 */ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ +/* { dg-final { scan-assembler-not "umov" } } */ + +struct node_struct +{ + float _Complex gap; + unsigned long long state; +}; + +struct reg_struct +{ + int size; + struct node_struct *node; +}; + +void +func(int target, struct reg_struct *reg) +{ + int i; + + for(i=0; i<reg->size; i++) + reg->node[i].state ^= ((unsigned long long) 1 << target); +} diff --git a/gcc/testsuite/gcc.target/aarch64/vect-init-1.c b/gcc/testsuite/gcc.target/aarch64/vect-init-1.c new file mode 100644 index 00000000000..90ba3ae3b99 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/vect-init-1.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#define vector __attribute__((vector_size(16))) + +vector float combine (float a, float b, float c, float d) +{ + return (vector float) { a, b, c, d }; +} + +/* { dg-final { scan-assembler-not "movi\t" } } */ +/* { dg-final { scan-assembler-not "orr\t" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/vect-init-2.c b/gcc/testsuite/gcc.target/aarch64/vect-init-2.c new file mode 100644 index 00000000000..04446754cb7 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/vect-init-2.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#define vector __attribute__((vector_size(16))) + +vector float combine (float a, float b, float d) +{ + return (vector float) { a, b, a, d }; +} + +/* { dg-final { scan-assembler-not "movi\t" } } */ +/* { dg-final { scan-assembler-not "orr\t" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/vect-init-3.c b/gcc/testsuite/gcc.target/aarch64/vect-init-3.c new file mode 100644 index 00000000000..b5822b7fcb7 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/vect-init-3.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#define vector __attribute__((vector_size(16))) + +vector float combine (float a, float b) +{ + return (vector float) { a, b, a, b }; +} + +/* { dg-final { scan-assembler-not "movi\t" } } */ +/* { dg-final { scan-assembler-not "orr\t" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/vect-init-4.c b/gcc/testsuite/gcc.target/aarch64/vect-init-4.c new file mode 100644 index 00000000000..09a00958f14 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/vect-init-4.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#define vector __attribute__((vector_size(16))) + +vector float combine (float a, float b) +{ + return (vector float) { a, b, b, a }; +} + +/* { dg-final { scan-assembler-not "movi\t" } } */ +/* { dg-final { scan-assembler-not "orr\t" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/vect-init-5.c b/gcc/testsuite/gcc.target/aarch64/vect-init-5.c new file mode 100644 index 00000000000..76d5502d54b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/vect-init-5.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +#define vector __attribute__((vector_size(16))) + +vector float combine (float a, float b) +{ + return (vector float) { a, b, a, a }; +} + +/* { dg-final { scan-assembler-not "movi\t" } } */ +/* { dg-final { scan-assembler-not "orr\t" } } */ diff --git a/gcc/testsuite/gcc.target/arm/acle/cdp.c b/gcc/testsuite/gcc.target/arm/acle/cdp.c index 28b218e7cfc..cebd8c4024e 100644 --- a/gcc/testsuite/gcc.target/arm/acle/cdp.c +++ b/gcc/testsuite/gcc.target/arm/acle/cdp.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc1_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x1) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif void test_cdp (void) { diff --git a/gcc/testsuite/gcc.target/arm/acle/cdp2.c b/gcc/testsuite/gcc.target/arm/acle/cdp2.c index 00bcd502b56..945d435d2fb 100644 --- a/gcc/testsuite/gcc.target/arm/acle/cdp2.c +++ b/gcc/testsuite/gcc.target/arm/acle/cdp2.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc2_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x2) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif void test_cdp2 (void) { diff --git a/gcc/testsuite/gcc.target/arm/acle/ldc.c b/gcc/testsuite/gcc.target/arm/acle/ldc.c index f45f25d8c97..cd57343208f 100644 --- a/gcc/testsuite/gcc.target/arm/acle/ldc.c +++ b/gcc/testsuite/gcc.target/arm/acle/ldc.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc1_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x1) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif extern void * p; diff --git a/gcc/testsuite/gcc.target/arm/acle/ldc2.c b/gcc/testsuite/gcc.target/arm/acle/ldc2.c index 433bf8a1204..d7691e30d76 100644 --- a/gcc/testsuite/gcc.target/arm/acle/ldc2.c +++ b/gcc/testsuite/gcc.target/arm/acle/ldc2.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc2_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x2) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif extern void * p; diff --git a/gcc/testsuite/gcc.target/arm/acle/ldc2l.c b/gcc/testsuite/gcc.target/arm/acle/ldc2l.c index 88c8aa44765..9ee63afa055 100644 --- a/gcc/testsuite/gcc.target/arm/acle/ldc2l.c +++ b/gcc/testsuite/gcc.target/arm/acle/ldc2l.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc2_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x2) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif extern void * p; diff --git a/gcc/testsuite/gcc.target/arm/acle/ldcl.c b/gcc/testsuite/gcc.target/arm/acle/ldcl.c index 72a97f1d7b7..a6bfd9011dc 100644 --- a/gcc/testsuite/gcc.target/arm/acle/ldcl.c +++ b/gcc/testsuite/gcc.target/arm/acle/ldcl.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc1_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x1) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif extern void * p; diff --git a/gcc/testsuite/gcc.target/arm/acle/mcr.c b/gcc/testsuite/gcc.target/arm/acle/mcr.c index 93f977a2bdb..7095dcbc3ad 100644 --- a/gcc/testsuite/gcc.target/arm/acle/mcr.c +++ b/gcc/testsuite/gcc.target/arm/acle/mcr.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc1_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x1) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif void test_mcr (uint32_t a) { diff --git a/gcc/testsuite/gcc.target/arm/acle/mcr2.c b/gcc/testsuite/gcc.target/arm/acle/mcr2.c index 5b60d10ff25..2a4b0ce4559 100644 --- a/gcc/testsuite/gcc.target/arm/acle/mcr2.c +++ b/gcc/testsuite/gcc.target/arm/acle/mcr2.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc2_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x2) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif void test_mcr2 (uint32_t a) { diff --git a/gcc/testsuite/gcc.target/arm/acle/mcrr.c b/gcc/testsuite/gcc.target/arm/acle/mcrr.c index dcc223c713d..bcfbe1a4855 100644 --- a/gcc/testsuite/gcc.target/arm/acle/mcrr.c +++ b/gcc/testsuite/gcc.target/arm/acle/mcrr.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc3_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x4) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif void test_mcrr (uint64_t a) { diff --git a/gcc/testsuite/gcc.target/arm/acle/mcrr2.c b/gcc/testsuite/gcc.target/arm/acle/mcrr2.c index 10f2014d447..afd07e67f21 100644 --- a/gcc/testsuite/gcc.target/arm/acle/mcrr2.c +++ b/gcc/testsuite/gcc.target/arm/acle/mcrr2.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc4_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x8) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif void test_mcrr2 (uint64_t a) { diff --git a/gcc/testsuite/gcc.target/arm/acle/mrc.c b/gcc/testsuite/gcc.target/arm/acle/mrc.c index 34ca6a1638c..809b6c9c265 100644 --- a/gcc/testsuite/gcc.target/arm/acle/mrc.c +++ b/gcc/testsuite/gcc.target/arm/acle/mrc.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc1_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x1) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif uint32_t test_mrc (void) { diff --git a/gcc/testsuite/gcc.target/arm/acle/mrc2.c b/gcc/testsuite/gcc.target/arm/acle/mrc2.c index 3b72a402224..4c06ea39b37 100644 --- a/gcc/testsuite/gcc.target/arm/acle/mrc2.c +++ b/gcc/testsuite/gcc.target/arm/acle/mrc2.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc2_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x2) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif uint32_t test_mrc2 (void) { diff --git a/gcc/testsuite/gcc.target/arm/acle/mrrc.c b/gcc/testsuite/gcc.target/arm/acle/mrrc.c index 28c3b8ea6b5..802de083d5c 100644 --- a/gcc/testsuite/gcc.target/arm/acle/mrrc.c +++ b/gcc/testsuite/gcc.target/arm/acle/mrrc.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc3_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x4) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif uint64_t test_mrrc (void) { diff --git a/gcc/testsuite/gcc.target/arm/acle/mrrc2.c b/gcc/testsuite/gcc.target/arm/acle/mrrc2.c index 5b7aab06222..adf39563e29 100644 --- a/gcc/testsuite/gcc.target/arm/acle/mrrc2.c +++ b/gcc/testsuite/gcc.target/arm/acle/mrrc2.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc4_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x8) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif uint64_t test_mrrc2 (void) { diff --git a/gcc/testsuite/gcc.target/arm/acle/stc.c b/gcc/testsuite/gcc.target/arm/acle/stc.c index 7c6e04fe0fe..2714f65787e 100644 --- a/gcc/testsuite/gcc.target/arm/acle/stc.c +++ b/gcc/testsuite/gcc.target/arm/acle/stc.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc1_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x1) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif extern void * p; diff --git a/gcc/testsuite/gcc.target/arm/acle/stc2.c b/gcc/testsuite/gcc.target/arm/acle/stc2.c index 1578f7b1136..0a84652e0f0 100644 --- a/gcc/testsuite/gcc.target/arm/acle/stc2.c +++ b/gcc/testsuite/gcc.target/arm/acle/stc2.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc2_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x2) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif extern void * p; diff --git a/gcc/testsuite/gcc.target/arm/acle/stc2l.c b/gcc/testsuite/gcc.target/arm/acle/stc2l.c index 7adbd60d48a..2453d04ad72 100644 --- a/gcc/testsuite/gcc.target/arm/acle/stc2l.c +++ b/gcc/testsuite/gcc.target/arm/acle/stc2l.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc2_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x2) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif extern void * p; diff --git a/gcc/testsuite/gcc.target/arm/acle/stcl.c b/gcc/testsuite/gcc.target/arm/acle/stcl.c index 2fd5edd02d7..affdaa27982 100644 --- a/gcc/testsuite/gcc.target/arm/acle/stcl.c +++ b/gcc/testsuite/gcc.target/arm/acle/stcl.c @@ -5,6 +5,9 @@ /* { dg-require-effective-target arm_coproc1_ok } */ #include "arm_acle.h" +#if (__ARM_FEATURE_COPROC & 0x1) == 0 + #error "__ARM_FEATURE_COPROC does not have correct feature bits set" +#endif extern void * p; diff --git a/gcc/testsuite/gcc.target/arm/cold-lc.c b/gcc/testsuite/gcc.target/arm/cold-lc.c index 467a6966bd3..f0cd6df3468 100644 --- a/gcc/testsuite/gcc.target/arm/cold-lc.c +++ b/gcc/testsuite/gcc.target/arm/cold-lc.c @@ -11,13 +11,14 @@ extern int show_stack (struct task_struct *, unsigned long *); void dump_stack (void) { - unsigned long stack; - show_stack ((current_thread_info ()->task), &stack); + unsigned long stack; + show_stack ((current_thread_info ()->task), &stack); } void die (char *str, void *fp, int nr) { + if (nr) dump_stack (); - while (1); + while (1); } diff --git a/gcc/testsuite/gcc.target/arm/frame-pointer-1.c b/gcc/testsuite/gcc.target/arm/frame-pointer-1.c index c288fef83b0..bf9b83c1385 100644 --- a/gcc/testsuite/gcc.target/arm/frame-pointer-1.c +++ b/gcc/testsuite/gcc.target/arm/frame-pointer-1.c @@ -1,7 +1,7 @@ /* Check local register variables using a register conventionally used as the frame pointer aren't clobbered under high register pressure. */ /* { dg-do run } */ -/* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } { "*" } { "" } } */ +/* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */ /* { dg-options "-Os -mthumb -fomit-frame-pointer" } */ #include <stdlib.h> diff --git a/gcc/testsuite/gcc.target/arm/its.c b/gcc/testsuite/gcc.target/arm/its.c index 5425f1e9205..f81a0df51cd 100644 --- a/gcc/testsuite/gcc.target/arm/its.c +++ b/gcc/testsuite/gcc.target/arm/its.c @@ -1,4 +1,6 @@ /* { dg-do compile } */ +/* { dg-require-effective-target arm_cortex_m } */ +/* { dg-require-effective-target arm_thumb2 } */ /* { dg-options "-O2" } */ int test (int a, int b) { @@ -17,4 +19,6 @@ int test (int a, int b) r -= 3; return r; } -/* { dg-final { scan-assembler-times "\tit" 2 { target arm_thumb2 } } } */ +/* Ensure there is no IT block with more than 2 instructions, ie. we only allow + IT, ITT and ITE. */ +/* { dg-final { scan-assembler-not "\\sit\[te\]{2}" } } */ diff --git a/gcc/testsuite/gcc.target/arm/mla-1.c b/gcc/testsuite/gcc.target/arm/mla-1.c index 42101ef37cf..aca009f47b3 100644 --- a/gcc/testsuite/gcc.target/arm/mla-1.c +++ b/gcc/testsuite/gcc.target/arm/mla-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { arm_thumb1 } { "*" } { "" } } */ +/* { dg-skip-if "" { arm_thumb1 } } */ /* { dg-options "-O2" } */ diff --git a/gcc/testsuite/gcc.target/arm/multilib.exp b/gcc/testsuite/gcc.target/arm/multilib.exp new file mode 100644 index 00000000000..8e9226afe87 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/multilib.exp @@ -0,0 +1,685 @@ +# Copyright (C) 2017 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + +load_lib gcc-dg.exp + +dg-init + +if { [board_info [target_info name] exists multilib_flags] + && [regexp {(-marm|-mthumb|-march=.*|-mcpu=.*|-mfpu=.*|-mfloat=abi=.*)\y} [board_info [target_info name] multilib_flags]] } { + + # Multilib flags override anything we can apply to a test, so + # skip if any of the above options are set there. + verbose "skipping multilib tests due to multilib_flags setting" 1 + return +} + +# We don't want to run this test multiple times in a parallel make check. +if ![gcc_parallel_test_run_p options] { + return +} +gcc_parallel_test_enable 0 + +proc multilib_config {profile} { + return [check_configured_with [join [list {with-multilib-list=([^ ]+,)?} $profile {(,[^ ]+)?}] ""]] +} + +proc check_multi_dir { gcc_opts multi_dir } { + global tool + + set gcc_output [${tool}_target_compile "--print-multi-directory $gcc_opts" "" "none" ""] + if { [string match "$multi_dir\n" $gcc_output] } { + pass "multilibdir $gcc_opts $multi_dir" + } else { + fail "multilibdir $gcc_opts $multi_dir" + } +} + +if {[multilib_config "aprofile"] } { + foreach {opts dir} { + {-mcpu=cortex-a8 -mfloat-abi=soft} "thumb/v7-a/nofp" + {-mcpu=cortex-a8 -mfloat-abi=softfp} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a8 -mfloat-abi=hard} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a15} "thumb/v7-a/nofp" + {-mcpu=cortex-a15 -mfloat-abi=hard} "thumb/v7ve+simd/hard" + {-mcpu=cortex-a15 -marm -mfloat-abi=hard} "thumb/v7ve+simd/hard" + {-mcpu=cortex-a15 -mthumb -mfloat-abi=hard} "thumb/v7ve+simd/hard" + {-mcpu=cortex-a7+nosimd -mfloat-abi=hard} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7+nofp -mfloat-abi=softfp} "thumb/v7-a/nofp" + {-mcpu=generic-armv7-a+vfpv4 -mfloat-abi=softfp} "thumb/v7-a+fp/softfp" + {-march=armv7ve+vfpv3 -mfloat-abi=hard} "thumb/v7-a+fp/hard" + {-march=armv7ve -mfloat-abi=softfp -mfpu=neon} "thumb/v7-a+simd/softfp" + {-march=armv7ve -mfloat-abi=softfp -mfpu=neon-vfpv4} "thumb/v7ve+simd/softfp" + {-march=armv7ve -mfloat-abi=softfp -mfpu=vfpv4} "thumb/v7-a+fp/softfp" + {-march=armv8-a+crc+simd -mfloat-abi=soft} "thumb/v8-a/nofp" + {-march=armv8-a+crc+simd -mfloat-abi=softfp} "thumb/v8-a+simd/softfp" + {-march=armv8.1-a+crypto -mfloat-abi=soft} "thumb/v8-a/nofp" + {-march=armv8.1-a+crypto -mfloat-abi=softfp} "thumb/v8-a+simd/softfp" + {-march=armv8.2-a+crypto -mfloat-abi=soft} "thumb/v8-a/nofp" + {-march=armv8.2-a+simd+crypto -mfloat-abi=softfp} "thumb/v8-a+simd/softfp" + {-march=armv8.2-a+simd+crypto+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp" + {-march=armv8.2-a+simd+nofp+crypto -mfloat-abi=softfp} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a53+crypto -mfloat-abi=hard} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a53+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp" + {-march=armv8-a+crc -mfloat-abi=hard -mfpu=vfp} "thumb/v8-a+simd/hard" + {-march=armv8-a+crc+simd -mfloat-abi=soft -mfpu=neon} "thumb/v8-a/nofp" + {-mcpu=cortex-a8 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a5 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a7 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a53 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a5 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a9 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7ve+simd/hard" + {-mcpu=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7ve+simd/hard" + {-mcpu=cortex-a53 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a5 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a9 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a7 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7ve+simd/hard" + {-mcpu=cortex-a15 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7ve+simd/hard" + {-mcpu=cortex-a53 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a5 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a7 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a53 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a5 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a9 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7ve+simd/softfp" + {-mcpu=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7ve+simd/softfp" + {-mcpu=cortex-a53 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a5 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a9 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a7 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7ve+simd/softfp" + {-mcpu=cortex-a15 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7ve+simd/softfp" + {-mcpu=cortex-a53 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-march=armv8-a -mfpu=neon -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-march=armv8-a -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-march=armv8-a -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-march=armv8-a -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard" + {-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp" + {-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a5 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a7 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a53 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a5 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a9 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7ve+simd/hard" + {-mcpu=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7ve+simd/hard" + {-mcpu=cortex-a53 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a5 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a9 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a7 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a15 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-mcpu=cortex-a53 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a5 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a9 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-mcpu=cortex-a7 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7ve+simd/hard" + {-mcpu=cortex-a15 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7ve+simd/hard" + {-mcpu=cortex-a53 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-mcpu=cortex-a8 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a5 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a7 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a53 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a5 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a9 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7ve+simd/softfp" + {-mcpu=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7ve+simd/softfp" + {-mcpu=cortex-a53 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a5 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a9 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a7 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a15 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-mcpu=cortex-a53 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-mcpu=cortex-a8 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a5 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a9 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-mcpu=cortex-a7 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7ve+simd/softfp" + {-mcpu=cortex-a15 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7ve+simd/softfp" + {-mcpu=cortex-a53 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-march=armv8-a -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-march=armv8-a -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-march=armv8-a -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-march=armv8-a -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard" + {-march=armv8-a -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp" + {-march=armv8-a -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + {-march=armv7-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard" + {-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard" + {-march=armv7-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp" + {-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp" + } { + check_multi_dir $opts $dir + } +} +if {[multilib_config "rmprofile"] } { + foreach {opts dir} { + {-mcpu=cortex-m0 -mfpu=auto -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=auto -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=auto -mfloat-abi=soft} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m7 -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m23 -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m7+nofp.dp -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m0 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m7 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m23 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m0 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m7 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m23 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m0 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m7 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m23 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m7+nofp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m0 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m23 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m0 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m23 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-mcpu=cortex-m4 -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m7 -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-mcpu=cortex-m33 -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-mcpu=cortex-m7+nofp.dp -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m4 -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m7 -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m33 -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m4 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m7 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m33 -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m7 -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m33 -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-mcpu=cortex-m7+nofp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m4 -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m33 -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-mcpu=cortex-m4 -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-mcpu=cortex-m33 -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-mcpu=cortex-m0 -mfpu=auto -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=auto -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=auto -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m7 -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-mcpu=cortex-m23 -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-mcpu=cortex-m7+nofp.dp -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m0 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m7 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m23 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m0 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m7 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m23 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-mcpu=cortex-m7+nofp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m0 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m7 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m23 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-mcpu=cortex-m7+nofp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m0 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m23 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-mcpu=cortex-m0 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m1 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-mcpu=cortex-m3 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-mcpu=cortex-m4 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-mcpu=cortex-m7 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-mcpu=cortex-m23 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-mcpu=cortex-m33 -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-mcpu=cortex-m7+nofp.dp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-march=armv6-m -mfpu=auto -mfloat-abi=soft} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=auto -mfloat-abi=soft} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.base -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv7e-m+fp -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv7e-m+fp.dp -mfpu=auto -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.main+fp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp+dsp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=auto -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv6-m -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.base -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv7e-m+fp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv7e-m+fp.dp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.main+fp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv6-m -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.base -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv7e-m+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv7e-m+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.main+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv6-m -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.base -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv7e-m+fp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv7e-m+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.main+fp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv6-m -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.base -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv7e-m+fp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv7e-m+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.main+fp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv6-m -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.base -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv7e-m+fp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv7e-m+fp.dp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v7e-m/nofp" + {-march=armv8-m.main+fp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp+dsp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-d16 -mfloat-abi=soft} "thumb/v8-m.main/nofp" + {-march=armv7e-m+fp -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-march=armv7e-m+fp.dp -mfpu=auto -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-march=armv8-m.main+fp -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv8-m.main+fp.dp -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv8-m.main+fp+dsp -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv8-m.main+fp.dp+dsp -mfpu=auto -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv7e-m -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-march=armv8-m.main -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv7e-m+fp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-march=armv7e-m+fp.dp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-march=armv8-m.main+fp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv8-m.main+fp.dp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv7e-m -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-march=armv8-m.main -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv7e-m+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-march=armv7e-m+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-march=armv8-m.main+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv8-m.main+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-march=armv8-m.main -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv7e-m+fp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-march=armv7e-m+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-march=armv8-m.main+fp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv8-m.main+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv8-m.main+fp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv8-m.main+fp.dp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv7e-m -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv7e-m+fp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+fp/hard" + {-march=armv7e-m+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-march=armv8-m.main+fp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv8-m.main+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv8-m.main+fp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+fp/hard" + {-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv7e-m -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv7e-m+fp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-march=armv7e-m+fp.dp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v7e-m+dp/hard" + {-march=armv8-m.main+fp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv8-m.main+fp.dp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv8-m.main+fp+dsp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-d16 -mfloat-abi=hard} "thumb/v8-m.main+dp/hard" + {-march=armv6-m -mfpu=auto -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=auto -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m/nofp" + {-march=armv8-m.base -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main/nofp" + {-march=armv7e-m+fp -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-march=armv7e-m+fp.dp -mfpu=auto -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-march=armv8-m.main+fp -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv8-m.main+fp.dp -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv8-m.main+fp+dsp -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=auto -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv6-m -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-march=armv8-m.base -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv7e-m+fp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-march=armv7e-m+fp.dp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-march=armv8-m.main+fp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv8-m.main+fp.dp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv6-m -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-march=armv8-m.base -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv7e-m+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-march=armv7e-m+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-march=armv8-m.main+fp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv8-m.main+fp.dp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv8-m.main+fp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=vfpv3xd-fp16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv6-m -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-march=armv8-m.base -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv7e-m+fp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-march=armv7e-m+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-march=armv8-m.main+fp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv8-m.main+fp.dp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv8-m.main+fp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=fpv4-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv6-m -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-march=armv8-m.base -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv7e-m+fp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+fp/softfp" + {-march=armv7e-m+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-march=armv8-m.main+fp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv8-m.main+fp.dp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv8-m.main+fp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+fp/softfp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-sp-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv6-m -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v6-m/nofp" + {-march=armv7-m -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7-m/nofp" + {-march=armv7e-m -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-march=armv8-m.base -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.base/nofp" + {-march=armv8-m.main -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv7e-m+fp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-march=armv7e-m+fp.dp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v7e-m+dp/softfp" + {-march=armv8-m.main+fp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv8-m.main+fp.dp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv8-m.main+fp+dsp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + {-march=armv8-m.main+fp.dp+dsp -mfpu=fpv5-d16 -mfloat-abi=softfp} "thumb/v8-m.main+dp/softfp" + } { + check_multi_dir $opts $dir + } +} + +gcc_parallel_test_enable 1 + diff --git a/gcc/testsuite/gcc.target/arm/neon-thumb2-move.c b/gcc/testsuite/gcc.target/arm/neon-thumb2-move.c index 9cf86dd05fe..d8c6748d4ee 100644 --- a/gcc/testsuite/gcc.target/arm/neon-thumb2-move.c +++ b/gcc/testsuite/gcc.target/arm/neon-thumb2-move.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target arm_neon_ok } */ /* { dg-require-effective-target arm_thumb2_ok } */ -/* { dg-options "-O2 -mthumb -march=armv7-a" } */ +/* { dg-options "-O2 -mthumb" } */ /* { dg-add-options arm_neon } */ /* { dg-prune-output "switch .* conflicts with" } */ diff --git a/gcc/testsuite/gcc.target/arm/pr51915.c b/gcc/testsuite/gcc.target/arm/pr51915.c index 144d522f85b..f9ed30568ff 100644 --- a/gcc/testsuite/gcc.target/arm/pr51915.c +++ b/gcc/testsuite/gcc.target/arm/pr51915.c @@ -2,7 +2,7 @@ /* { dg-do compile } */ /* { dg-skip-if "no support for hard-float VFP ABI" { arm_thumb1 } { "-march=*" } { "" } } */ /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */ -/* { dg-options "-march=armv7-a -mfloat-abi=hard -O2" } */ +/* { dg-options "-march=armv7-a+fp -mfloat-abi=hard -O2" } */ struct S { int s1; void *s2; }; struct T { struct S t1; unsigned long long t2; }; diff --git a/gcc/testsuite/gcc.target/arm/pr52006.c b/gcc/testsuite/gcc.target/arm/pr52006.c index c274449ba01..dbbcfe06f78 100644 --- a/gcc/testsuite/gcc.target/arm/pr52006.c +++ b/gcc/testsuite/gcc.target/arm/pr52006.c @@ -2,7 +2,7 @@ /* { dg-do compile } */ /* { dg-skip-if "avoid conflicts with multilib flags" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */ /* { dg-skip-if "no support for hard-float VFP ABI" { arm_thumb1 } { "-march=*" } { "" } } */ -/* { dg-options "-march=armv7-a -mfloat-abi=hard -O2 -fPIC" } */ +/* { dg-options "-march=armv7-a+fp -mfloat-abi=hard -O2 -fPIC" } */ unsigned long a; static int b; diff --git a/gcc/testsuite/gcc.target/arm/pr53187.c b/gcc/testsuite/gcc.target/arm/pr53187.c index b40dbbb310b..5fbc52c873a 100644 --- a/gcc/testsuite/gcc.target/arm/pr53187.c +++ b/gcc/testsuite/gcc.target/arm/pr53187.c @@ -2,7 +2,7 @@ /* { dg-do compile } */ /* { dg-skip-if "no support for hard-float VFP ABI" { arm_thumb1 } { "-march=*" } { "" } } */ /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */ -/* { dg-options "-march=armv7-a -mfloat-abi=hard -O2" } */ +/* { dg-options "-march=armv7-a+fp -mfloat-abi=hard -O2" } */ void bar (int); diff --git a/gcc/testsuite/gcc.target/arm/pr56184.C b/gcc/testsuite/gcc.target/arm/pr56184.C index 5d23c40c582..fd278d34f2c 100644 --- a/gcc/testsuite/gcc.target/arm/pr56184.C +++ b/gcc/testsuite/gcc.target/arm/pr56184.C @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } { "*" } { "" } } */ +/* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */ /* { dg-options "-fno-short-enums -O2 -mthumb -march=armv7-a -mfpu=neon -mfloat-abi=softfp -mtune=cortex-a9 -fno-section-anchors" } */ typedef unsigned int size_t; diff --git a/gcc/testsuite/gcc.target/arm/pr58784.c b/gcc/testsuite/gcc.target/arm/pr58784.c index 29a0f73cc0f..44528f3477a 100644 --- a/gcc/testsuite/gcc.target/arm/pr58784.c +++ b/gcc/testsuite/gcc.target/arm/pr58784.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "incompatible options" { arm_thumb1 } { "*" } { "" } } */ +/* { dg-skip-if "incompatible options" { arm_thumb1 } } */ /* { dg-options "-march=armv7-a -mfloat-abi=hard -mfpu=neon -marm -O2" } */ /* { dg-skip-if "need hardfp ABI" { *-*-* } { "-mfloat-abi=soft" } { "" } } */ diff --git a/gcc/testsuite/gcc.target/arm/pr59896.c b/gcc/testsuite/gcc.target/arm/pr59896.c index ea6dc248b98..f431192e3c2 100644 --- a/gcc/testsuite/gcc.target/arm/pr59896.c +++ b/gcc/testsuite/gcc.target/arm/pr59896.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } { "*" } { "" } } */ +/* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */ /* { dg-options "-mthumb -O2" } */ typedef unsigned int size_t; diff --git a/gcc/testsuite/gcc.target/arm/pr59985.C b/gcc/testsuite/gcc.target/arm/pr59985.C index 97d5915592f..ecf72b190b4 100644 --- a/gcc/testsuite/gcc.target/arm/pr59985.C +++ b/gcc/testsuite/gcc.target/arm/pr59985.C @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "incompatible options" { arm_thumb1 } { "*" } { "" } } */ +/* { dg-skip-if "incompatible options" { arm_thumb1 } } */ /* { dg-options "-g -fcompare-debug -O2 -march=armv7-a -mtune=cortex-a9 -mfpu=vfpv3-d16 -mfloat-abi=hard" } */ /* { dg-skip-if "need hardfp abi" { *-*-* } { "-mfloat-abi=soft" } { "" } } */ diff --git a/gcc/testsuite/gcc.target/arm/pr71778.c b/gcc/testsuite/gcc.target/arm/pr71778.c new file mode 100644 index 00000000000..d5b0d04e5e7 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr71778.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_neon_ok } */ +/* { dg-options "-O2" } */ +/* { dg-add-options arm_neon } */ + +typedef __simd128_int32_t int32x4_t; + +__extension__ extern __inline int32x4_t +__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) +vshrq_n_s32 (int32x4_t __a, const int __b) +{ + /* Errors for arm_neon.h intrinsics using constants end up on the line + in arm_neon.h rather than the source file line. That means we + need to put the dg-error up here, rather than on line 22 where we'd + like it. */ + return (int32x4_t)__builtin_neon_vshrs_nv4si (__a, __b); /* { dg-error "argument 2 must be a constant immediate" } */ +} + +int32x4_t +shift (int32x4_t a, int b) +{ + return vshrq_n_s32 (a, b); +} + diff --git a/gcc/testsuite/gcc.target/arm/sdiv_costs_1.c b/gcc/testsuite/gcc.target/arm/sdiv_costs_1.c index 3920590dfcc..64b7e249f42 100644 --- a/gcc/testsuite/gcc.target/arm/sdiv_costs_1.c +++ b/gcc/testsuite/gcc.target/arm/sdiv_costs_1.c @@ -1,6 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-O3" } */ -/* { dg-require-effective-target arm_v8_vfp_ok } */ +/* { dg-require-effective-target arm_arch_v8a_ok } */ +/* { dg-add-options arm_arch_v8a } */ /* Both sdiv and udiv can be used here, so prefer udiv. */ int f1 (unsigned char *p) diff --git a/gcc/testsuite/gcc.target/arm/stack-red-zone.c b/gcc/testsuite/gcc.target/arm/stack-red-zone.c index 8db2e2c092a..b29ed0bdf8d 100644 --- a/gcc/testsuite/gcc.target/arm/stack-red-zone.c +++ b/gcc/testsuite/gcc.target/arm/stack-red-zone.c @@ -1,5 +1,5 @@ /* No stack red zone. PR38644. */ -/* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } { "*" } { "" } } */ +/* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */ /* { dg-options "-mthumb -O2" } */ /* { dg-final { scan-assembler "ldrb\[^\n\]*\\n\[\t \]*add\[\t \]*sp" } } */ diff --git a/gcc/testsuite/gcc.target/arm/thumb-find-work-register.c b/gcc/testsuite/gcc.target/arm/thumb-find-work-register.c index e67a627ea31..5c0bc27a4c8 100644 --- a/gcc/testsuite/gcc.target/arm/thumb-find-work-register.c +++ b/gcc/testsuite/gcc.target/arm/thumb-find-work-register.c @@ -1,6 +1,6 @@ /* Wrong method to get number of arg reg will cause argument corruption. */ /* { dg-do run } */ -/* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } { "*" } { "" } } */ +/* { dg-skip-if "incompatible options" { ! { arm_thumb1_ok || arm_thumb2_ok } } } */ /* { dg-require-effective-target arm_eabi } */ /* { dg-options "-mthumb -O1" } */ diff --git a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c index 6e76043daee..c87e050639d 100644 --- a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c +++ b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-2.c @@ -3,7 +3,7 @@ /* { dg-require-effective-target arm_thumb2_ok } */ /* { dg-skip-if "avoid conflicts with multilib options" { *-*-* } { "-mcpu=*" } { "-mcpu=cortex-m4" "-mcpu=cortex-m7" } } */ /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */ -/* { dg-options "-march=armv7e-m -mfloat-abi=hard -O2 -mthumb -mslow-flash-data" } */ +/* { dg-options "-march=armv7e-m+fp -mfloat-abi=hard -O2 -mthumb -mslow-flash-data" } */ float f (float); diff --git a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c index fe7a12bf99b..8c6210ee6c9 100644 --- a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c +++ b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-3.c @@ -3,7 +3,7 @@ /* { dg-require-effective-target arm_thumb2_ok } */ /* { dg-skip-if "avoid conflicts with multilib options" { *-*-* } { "-mcpu=*" } { "-mcpu=cortex-m4" "-mcpu=cortex-m7" } } */ /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */ -/* { dg-options "-march=armv7e-m -mfloat-abi=hard -mthumb -mslow-flash-data" } */ +/* { dg-options "-march=armv7e-m+fp -mfloat-abi=hard -mthumb -mslow-flash-data" } */ /* From PR71607 */ diff --git a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c index cc5aea4437f..1bcb6924ed2 100644 --- a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c +++ b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-4.c @@ -3,7 +3,7 @@ /* { dg-require-effective-target arm_thumb2_ok } */ /* { dg-skip-if "avoid conflicts with multilib options" { *-*-* } { "-mcpu=*" } { "-mcpu=cortex-m4" "-mcpu=cortex-m7" } } */ /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */ -/* { dg-options "-march=armv7e-m -mfloat-abi=hard -O2 -mthumb -mslow-flash-data" } */ +/* { dg-options "-march=armv7e-m+fp -mfloat-abi=hard -O2 -mthumb -mslow-flash-data" } */ double __attribute__ ((target ("fpu=fpv5-d16"))) foo (void) diff --git a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c index b9161c4a4b4..808fff05faa 100644 --- a/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c +++ b/gcc/testsuite/gcc.target/arm/thumb2-slow-flash-data-5.c @@ -3,7 +3,7 @@ /* { dg-require-effective-target arm_thumb2_ok } */ /* { dg-skip-if "avoid conflicts with multilib options" { *-*-* } { "-mcpu=*" } { "-mcpu=cortex-m4" "-mcpu=cortex-m7" } } */ /* { dg-skip-if "do not override -mfloat-abi" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" } } */ -/* { dg-options "-march=armv7e-m -mfloat-abi=hard -O2 -mthumb -mslow-flash-data" } */ +/* { dg-options "-march=armv7e-m+fp -mfloat-abi=hard -O2 -mthumb -mslow-flash-data" } */ double __attribute__ ((target ("fpu=fpv5-sp-d16"))) foo (void) diff --git a/gcc/testsuite/gcc.target/i386/align-main-1.c b/gcc/testsuite/gcc.target/i386/align-main-1.c index f62284f4379..d6ba10bcfd7 100644 --- a/gcc/testsuite/gcc.target/i386/align-main-1.c +++ b/gcc/testsuite/gcc.target/i386/align-main-1.c @@ -4,7 +4,7 @@ /* { dg-options "-O2 -mpreferred-stack-boundary=6 -mincoming-stack-boundary=6" } */ /* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-128,\[\\t \]*%\[re\]?sp" } } */ /* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp" } } */ -/* { dg-skip-if "Options about stack-boundary aren't support" { x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "Options about stack-boundary aren't support" { x86_64-*-mingw* } } */ #include <stddef.h> diff --git a/gcc/testsuite/gcc.target/i386/align-main-2.c b/gcc/testsuite/gcc.target/i386/align-main-2.c index b8175891832..addbbd12f79 100644 --- a/gcc/testsuite/gcc.target/i386/align-main-2.c +++ b/gcc/testsuite/gcc.target/i386/align-main-2.c @@ -4,7 +4,7 @@ /* { dg-options "-O2 -mpreferred-stack-boundary=6 -mincoming-stack-boundary=6" } */ /* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-64,\[\\t \]*%\[re\]?sp" } } */ /* { dg-final { scan-assembler-not "and\[lq\]?\[\\t \]*\\$-128,\[\\t \]*%\[re\]?sp" } } */ -/* { dg-skip-if "Options about stack-boundary aren't support" { x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "Options about stack-boundary aren't support" { x86_64-*-mingw* } } */ #include <stddef.h> #define ALIGNMENT 32 diff --git a/gcc/testsuite/gcc.target/i386/asm-3.c b/gcc/testsuite/gcc.target/i386/asm-3.c index ec37898ab73..206f8c2b25c 100644 --- a/gcc/testsuite/gcc.target/i386/asm-3.c +++ b/gcc/testsuite/gcc.target/i386/asm-3.c @@ -1,6 +1,6 @@ /* PR inline-asm/6806 */ /* { dg-do run } */ -/* { dg-skip-if "" { ia32 && { ! nonpic } } { "*" } { "" } } */ +/* { dg-skip-if "" { ia32 && { ! nonpic } } } */ /* { dg-options "-O2" } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.target/i386/bitfield1.c b/gcc/testsuite/gcc.target/i386/bitfield1.c index e4e06cb0c0f..714792c3d02 100644 --- a/gcc/testsuite/gcc.target/i386/bitfield1.c +++ b/gcc/testsuite/gcc.target/i386/bitfield1.c @@ -2,7 +2,7 @@ // { dg-do run } // { dg-require-effective-target ia32 } // { dg-options "-O2" } -// { dg-options "-mno-align-double -mno-ms-bitfields" { target i?86-*-cygwin* i?86-*-mingw*} } +// { dg-options "-mno-align-double -mno-ms-bitfields" { target i?86-*-* x86_64-*-* } } extern void abort (void); extern void exit (int); diff --git a/gcc/testsuite/gcc.target/i386/bitfield2.c b/gcc/testsuite/gcc.target/i386/bitfield2.c index db9d284449e..5784bf0ccb4 100644 --- a/gcc/testsuite/gcc.target/i386/bitfield2.c +++ b/gcc/testsuite/gcc.target/i386/bitfield2.c @@ -2,7 +2,7 @@ // { dg-do run } // { dg-require-effective-target ia32 } // { dg-options "-O2" } -// { dg-options "-mno-align-double -mno-ms-bitfields" { target i?86-*-cygwin* i?86-*-mingw* } } +// { dg-options "-mno-align-double -mno-ms-bitfields" { target i?86-*-* x86_64-*-* } } extern void abort (void); extern void exit (int); diff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c b/gcc/testsuite/gcc.target/i386/builtin_target.c index 374f0292453..9c190eb7ebc 100644 --- a/gcc/testsuite/gcc.target/i386/builtin_target.c +++ b/gcc/testsuite/gcc.target/i386/builtin_target.c @@ -88,6 +88,9 @@ check_intel_cpu_model (unsigned int family, unsigned int model, case 0x4e: case 0x5e: /* Skylake. */ + case 0x8e: + case 0x9e: + /* Kaby Lake. */ assert (__builtin_cpu_is ("corei7")); assert (__builtin_cpu_is ("skylake")); break; diff --git a/gcc/testsuite/gcc.target/i386/darwin-fpmath.c b/gcc/testsuite/gcc.target/i386/darwin-fpmath.c index 7db69467089..693bdee01f2 100644 --- a/gcc/testsuite/gcc.target/i386/darwin-fpmath.c +++ b/gcc/testsuite/gcc.target/i386/darwin-fpmath.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target i?86-*-darwin* } } */ +/* { dg-do compile { target i?86-*-darwin* x86_64-*-darwin* } } */ /* { dg-final { scan-assembler "addsd" } } */ /* Do not add -msse or -msse2 or -mfpmath=sse to the options. GCC is supposed to use SSE math on Darwin by default, and libm won't work diff --git a/gcc/testsuite/gcc.target/i386/getround.c b/gcc/testsuite/gcc.target/i386/getround.c new file mode 100644 index 00000000000..e9d43b074aa --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/getround.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O -msse" } */ + +#include <xmmintrin.h> + +unsigned save; + +void f(unsigned mode){ + unsigned tmp = _MM_GET_ROUNDING_MODE(); + _MM_SET_ROUNDING_MODE(mode); + save = tmp; +} + +/* { dg-final { scan-assembler-times "stmxcsr" 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/mvc5.c b/gcc/testsuite/gcc.target/i386/mvc5.c index 8fea04c792b..677f79f3fd0 100644 --- a/gcc/testsuite/gcc.target/i386/mvc5.c +++ b/gcc/testsuite/gcc.target/i386/mvc5.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-require-ifunc "" } */ /* { dg-options "-fno-inline" } */ -/* { dg-final { scan-assembler-times "foo.ifunc" 6 } } */ +/* { dg-final { scan-assembler "foo,foo.resolver" } } */ __attribute__((target_clones("default","avx","avx2"))) int diff --git a/gcc/testsuite/gcc.target/i386/mvc7.c b/gcc/testsuite/gcc.target/i386/mvc7.c index 9a9d7a3da30..a3697ba9b75 100644 --- a/gcc/testsuite/gcc.target/i386/mvc7.c +++ b/gcc/testsuite/gcc.target/i386/mvc7.c @@ -3,7 +3,7 @@ /* { dg-final { scan-assembler "foo.resolver" } } */ /* { dg-final { scan-assembler "avx" } } */ /* { dg-final { scan-assembler "slm" } } */ -/* { dg-final { scan-assembler-times "foo.ifunc" 4 } } */ +/* { dg-final { scan-assembler "foo,foo.resolver" } } */ __attribute__((target_clones("avx","default","arch=slm","arch=core-avx2"))) int foo (); diff --git a/gcc/testsuite/gcc.target/i386/pad-4.c b/gcc/testsuite/gcc.target/i386/pad-4.c index 58f55efcf0f..b59c7546713 100644 --- a/gcc/testsuite/gcc.target/i386/pad-4.c +++ b/gcc/testsuite/gcc.target/i386/pad-4.c @@ -2,7 +2,7 @@ /* { dg-require-effective-target ia32 } */ /* { dg-require-effective-target fpic } */ /* { dg-skip-if "" { *-*-* } { "-march=*" } { "-march=atom" } } */ -/* { dg-skip-if "No Windows PIC" { *-*-mingw* *-*-cygwin } { "*" } { "" } } */ +/* { dg-skip-if "No Windows PIC" { *-*-mingw* *-*-cygwin } } */ /* { dg-options "-O2 -fomit-frame-pointer -march=atom -fPIC" } */ /* { dg-final { scan-assembler-times "nop" 8 } } */ /* { dg-final { scan-assembler-not "rep" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pic-1.c b/gcc/testsuite/gcc.target/i386/pic-1.c index 9b7da4d2e16..25b8aae9e80 100644 --- a/gcc/testsuite/gcc.target/i386/pic-1.c +++ b/gcc/testsuite/gcc.target/i386/pic-1.c @@ -2,7 +2,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ia32 } */ /* { dg-require-effective-target fpic } */ -/* { dg-skip-if "No Windows PIC" { *-*-mingw* *-*-cygwin } { "*" } { "" } } */ +/* { dg-skip-if "No Windows PIC" { *-*-mingw* *-*-cygwin } } */ /* { dg-options "-fPIC" } */ /* Test verifies that %ebx is no longer fixed when generating PIC code on i686. */ diff --git a/gcc/testsuite/gcc.target/i386/pr25993.c b/gcc/testsuite/gcc.target/i386/pr25993.c index b079e257f6e..1e7e933fb9a 100644 --- a/gcc/testsuite/gcc.target/i386/pr25993.c +++ b/gcc/testsuite/gcc.target/i386/pr25993.c @@ -1,5 +1,5 @@ /* { dg-do assemble } */ -/* { dg-skip-if "" { "*-*-darwin*" "*-*-mingw*" } { "*" } { "" } } */ +/* { dg-skip-if "" { "*-*-darwin*" "*-*-mingw*" } } */ /* { dg-options "-std=c99 -x assembler-with-cpp" } */ #ifndef __ASSEMBLER__ diff --git a/gcc/testsuite/gcc.target/i386/pr32000-2.c b/gcc/testsuite/gcc.target/i386/pr32000-2.c index 374b23f8349..7a3e9f1c1fc 100644 --- a/gcc/testsuite/gcc.target/i386/pr32000-2.c +++ b/gcc/testsuite/gcc.target/i386/pr32000-2.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-skip-if "" { ! { ia32 && dfp } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { ia32 && dfp } } } */ /* { dg-options "-O -msse2 -std=gnu99 -mpreferred-stack-boundary=2" } */ /* { dg-require-effective-target sse2 } */ diff --git a/gcc/testsuite/gcc.target/i386/pr35160.c b/gcc/testsuite/gcc.target/i386/pr35160.c index 259c2a3eae3..d06b8baed71 100644 --- a/gcc/testsuite/gcc.target/i386/pr35160.c +++ b/gcc/testsuite/gcc.target/i386/pr35160.c @@ -1,6 +1,6 @@ /* PR inline-asm/35160 */ /* { dg-do run } */ -/* { dg-skip-if "" { ia32 && { ! nonpic } } { "*" } { "" } } */ +/* { dg-skip-if "" { ia32 && { ! nonpic } } } */ /* { dg-options "-O2" } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.target/i386/pr39543-2.c b/gcc/testsuite/gcc.target/i386/pr39543-2.c index 7f4e5a42a14..d0deb6b7430 100644 --- a/gcc/testsuite/gcc.target/i386/pr39543-2.c +++ b/gcc/testsuite/gcc.target/i386/pr39543-2.c @@ -1,7 +1,7 @@ /* PR inline-asm/39543 */ /* { dg-do compile } */ /* { dg-options "-O3" } */ -/* { dg-skip-if "" { ia32 && { ! nonpic } } { "*" } { "" } } */ +/* { dg-skip-if "" { ia32 && { ! nonpic } } } */ float __attribute__ ((aligned (16))) s0[128]; const float s1 = 0.707; diff --git a/gcc/testsuite/gcc.target/i386/pr44130.c b/gcc/testsuite/gcc.target/i386/pr44130.c index 3e50c7b1535..2ad740993c1 100644 --- a/gcc/testsuite/gcc.target/i386/pr44130.c +++ b/gcc/testsuite/gcc.target/i386/pr44130.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -ftree-vectorize -mavx -mtune=generic" } */ -/* { dg-skip-if "" { x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "" { x86_64-*-mingw* } } */ /* { dg-final { scan-assembler "and\[lq\]?\[\\t \]*\\$-32,\[\\t \]*%\[re\]?sp" } } */ /* { dg-final { scan-assembler "vmovaps\[\\t \]*%ymm" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr46470.c b/gcc/testsuite/gcc.target/i386/pr46470.c index 8d6b5ca5d5e..9e8e731188e 100644 --- a/gcc/testsuite/gcc.target/i386/pr46470.c +++ b/gcc/testsuite/gcc.target/i386/pr46470.c @@ -1,13 +1,13 @@ /* { dg-do compile } */ /* The pic register save adds unavoidable stack pointer references. */ -/* { dg-skip-if "" { ia32 && { ! nonpic } } { "*" } { "" } } */ +/* { dg-skip-if "" { ia32 && { ! nonpic } } } */ /* These options are selected to ensure 1 word needs to be allocated on the stack to maintain alignment for the call. This should be transformed to push+pop. We also want to force unwind info updates. */ /* { dg-options "-Os -fomit-frame-pointer -fasynchronous-unwind-tables -mno-red-zone" } */ /* { dg-options "-Os -fomit-frame-pointer -mpreferred-stack-boundary=3 -fasynchronous-unwind-tables" { target ia32 } } */ /* ms_abi has reserved stack-region. */ -/* { dg-skip-if "" { x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "" { x86_64-*-mingw* } } */ void f(); void g() { f(); f(); } diff --git a/gcc/testsuite/gcc.target/i386/pr73350-2.c b/gcc/testsuite/gcc.target/i386/pr73350-2.c new file mode 100644 index 00000000000..c1faab4b1a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr73350-2.c @@ -0,0 +1,35 @@ +/* { dg-do run { target *-*-linux* *-*-gnu* } } */ +/* { dg-options "-O2 -mavx512er" } */ +/* { dg-require-effective-target avx512er } */ + +#include "avx512er-check.h" + +#include <x86intrin.h> +#include <unistd.h> +#include <signal.h> + +static int counter; + +void handler (int i) +{ + exit (0); +} + +static void +avx512er_test (void) +{ + struct sigaction s; + sigemptyset (&s.sa_mask); + s.sa_handler = handler; + s.sa_flags = 0; + sigaction (SIGFPE, &s, NULL); + + __m512 a = _mm512_set1_ps (-1.f); + + _mm_setcsr ( _MM_MASK_MASK & ~_MM_MASK_INVALID ); + __m512 r1 = _mm512_rsqrt28_round_ps (a, _MM_FROUND_NO_EXC); + __m512 r2 = _mm512_rsqrt28_round_ps (a, _MM_FROUND_CUR_DIRECTION); + + if (r1[0] + r2[0]) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/pr80732.c b/gcc/testsuite/gcc.target/i386/pr80732.c new file mode 100644 index 00000000000..e1207298239 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr80732.c @@ -0,0 +1,93 @@ +/* PR ipa/80732 */ +/* { dg-do run } */ +/* { dg-options "-ldl -fPIC -rdynamic -O3 -g -pie" } */ +/* { dg-require-ifunc "" } */ +/* { dg-require-effective-target fma4 } */ +/* { dg-require-effective-target fpic } */ +/* { dg-require-effective-target pie } */ + +#include "fma4-check.h" + +#include <dlfcn.h> + +__attribute__((target_clones("default","fma"),noinline,optimize("fast-math"))) +double f1(double a, double b, double c) +{ + return a * b + c; +} + +double k1(double a, double b, double c, void **p) +{ + *p = f1; + return f1(a, b, c); +} + +__attribute__((target("fma"),optimize("fast-math"))) +static double f2_fma(double a, double b, double c) +{ + return a * b + c; +} + +__attribute__((optimize("fast-math"))) +static double f2_default(double a, double b, double c) +{ + return a * b + c; +} + +static void *f2_resolve(void) +{ + __builtin_cpu_init (); + if (__builtin_cpu_supports("fma")) + return f2_fma; + else + return f2_default; +} + +double f2(double a, double b, double c) __attribute__((ifunc("f2_resolve"))); + +double k2(double a, double b, double c, void **p) +{ + *p = f2; + return f2(a, b, c); +} + +double (*initializer) (double, double, double) = { &f1 }; + +static void +fma4_test (void) +{ + char buffer[256]; + const char *expectation = "4.93038e-32, 4.93038e-32, 4.93038e-32"; + + volatile double a = 1.0000000000000002; + volatile double b = -0.9999999999999998; + volatile double c = 1.0; + + void *hdl = dlopen(0, RTLD_NOW); + + double (*pf1)(double, double, double) = dlsym(hdl, "f1"); + double (*pk1)(double, double, double, void**) = dlsym(hdl, "k1"); + double (*_pf1)(double, double, double); + + double v1_1 = pf1(a, b, c); + double v1_2 = pk1(a, b, c, (void**)&_pf1); + double v1_3 = _pf1(a, b, c); + __builtin_sprintf (buffer, "%g, %g, %g", v1_1, v1_2, v1_3); + if (__builtin_strcmp (buffer, expectation) != 0) + __builtin_abort (); + + double (*pf2)(double, double, double) = dlsym(hdl, "f2"); + double (*pk2)(double, double, double, void**) = dlsym(hdl, "k2"); + double (*_pf2)(double, double, double); + + double v2_1 = pf2(a, b, c); + double v2_2 = pk2(a, b, c, (void**)&_pf2); + double v2_3 = _pf2(a, b, c); + __builtin_sprintf(buffer, "%g, %g, %g", v2_1, v2_2, v2_3); + if (__builtin_strcmp (buffer, expectation) != 0) + __builtin_abort (); + + __builtin_sprintf(buffer, "%g, %g, %g", initializer (a, b, c), v2_2, v2_3); + if (__builtin_strcmp (buffer, expectation) != 0) + __builtin_abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/pr81121.c b/gcc/testsuite/gcc.target/i386/pr81121.c new file mode 100644 index 00000000000..aca74e95b46 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr81121.c @@ -0,0 +1,10 @@ +/* PR target/81121 */ +/* { dg-do compile } */ +/* { dg-options "-O0 -march=amdfam10 -mno-sse2" } */ + +void +foo (short *x, short *y) +{ + float a = 0; + y[0] = x[0] * a; +} diff --git a/gcc/testsuite/gcc.target/i386/stack-usage-realign.c b/gcc/testsuite/gcc.target/i386/stack-usage-realign.c index c899606d641..084d9f36157 100644 --- a/gcc/testsuite/gcc.target/i386/stack-usage-realign.c +++ b/gcc/testsuite/gcc.target/i386/stack-usage-realign.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target ia32 } */ -/* { dg-skip-if "no stack realignment" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "no stack realignment" { *-*-darwin* } } */ /* { dg-options "-fstack-usage -msse2 -mforce-drap" } */ typedef int __attribute__((vector_size(16))) vec; diff --git a/gcc/testsuite/gcc.target/i386/stackalign/return-3.c b/gcc/testsuite/gcc.target/i386/stackalign/return-3.c index e32547e01bf..ec534d4a4cc 100644 --- a/gcc/testsuite/gcc.target/i386/stackalign/return-3.c +++ b/gcc/testsuite/gcc.target/i386/stackalign/return-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! { ia32 && dfp } } { "*" } { "" } } */ +/* { dg-skip-if "" { ! { ia32 && dfp } } } */ /* { dg-options "-msse -std=gnu99 -mpreferred-stack-boundary=2" } */ /* { dg-require-effective-target sse } */ diff --git a/gcc/testsuite/gcc.target/i386/sw-1.c b/gcc/testsuite/gcc.target/i386/sw-1.c index 1ad46211d5c..aec095eda62 100644 --- a/gcc/testsuite/gcc.target/i386/sw-1.c +++ b/gcc/testsuite/gcc.target/i386/sw-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mtune=generic -fshrink-wrap -fdump-rtl-pro_and_epilogue" } */ -/* { dg-skip-if "No shrink-wrapping preformed" { x86_64-*-mingw* } { "*" } { "" } } */ +/* { dg-skip-if "No shrink-wrapping preformed" { x86_64-*-mingw* } } */ #include <string.h> diff --git a/gcc/testsuite/gcc.target/ia64/builtin-fma-2.c b/gcc/testsuite/gcc.target/ia64/builtin-fma-2.c index 16d95b70ce4..a0fae1aace1 100644 --- a/gcc/testsuite/gcc.target/ia64/builtin-fma-2.c +++ b/gcc/testsuite/gcc.target/ia64/builtin-fma-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "128-bit long double" { *-*-hpux* } { "*" } { "" } } */ +/* { dg-skip-if "128-bit long double" { *-*-hpux* } } */ /* { dg-options "-O" } */ /* Don't confuse the fma insn with the fma in the filename. */ /* { dg-final { scan-assembler-times "fma\[ \]" 2 } } */ diff --git a/gcc/testsuite/gcc.target/m68k/tls-gd-xgot.c b/gcc/testsuite/gcc.target/m68k/tls-gd-xgot.c index 2a4900b5a08..a1babd3c4ea 100644 --- a/gcc/testsuite/gcc.target/m68k/tls-gd-xgot.c +++ b/gcc/testsuite/gcc.target/m68k/tls-gd-xgot.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! *-linux-* } { "*" } { "" } } */ +/* { dg-skip-if "" { ! *-linux-* } } */ /* { dg-options "-O2 -fpic -mxgot" } */ /* { dg-final { scan-assembler "#foo@TLSGD,\%\[ad\]\[0-7\]" } } */ /* { dg-final { scan-assembler "bsr.l __tls_get_addr@PLTPC" } } */ diff --git a/gcc/testsuite/gcc.target/m68k/tls-gd.c b/gcc/testsuite/gcc.target/m68k/tls-gd.c index 2b69fbdc1b4..e49403bb49b 100644 --- a/gcc/testsuite/gcc.target/m68k/tls-gd.c +++ b/gcc/testsuite/gcc.target/m68k/tls-gd.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! *-linux-* } { "*" } { "" } } */ +/* { dg-skip-if "" { ! *-linux-* } } */ /* { dg-options "-O2 -fpic" } */ /* { dg-final { scan-assembler "foo@TLSGD\\(\%a5\\)" } } */ /* { dg-final { scan-assembler "bsr.l __tls_get_addr@PLTPC" } } */ diff --git a/gcc/testsuite/gcc.target/m68k/tls-ie-xgot.c b/gcc/testsuite/gcc.target/m68k/tls-ie-xgot.c index d3fbfdaa4b6..5bcade791e3 100644 --- a/gcc/testsuite/gcc.target/m68k/tls-ie-xgot.c +++ b/gcc/testsuite/gcc.target/m68k/tls-ie-xgot.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! *-linux-* } { "*" } { "" } } */ +/* { dg-skip-if "" { ! *-linux-* } } */ /* { dg-options "-O2 -mxgot" } */ /* { dg-final { scan-assembler "jsr __m68k_read_tp" } } */ /* { dg-final { scan-assembler "#foo@TLSIE,\%\[ad\]\[0-7\]" } } */ diff --git a/gcc/testsuite/gcc.target/m68k/tls-ie.c b/gcc/testsuite/gcc.target/m68k/tls-ie.c index 2661f9fc053..f52259d1d1f 100644 --- a/gcc/testsuite/gcc.target/m68k/tls-ie.c +++ b/gcc/testsuite/gcc.target/m68k/tls-ie.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! *-linux-* } { "*" } { "" } } */ +/* { dg-skip-if "" { ! *-linux-* } } */ /* { dg-options "-O2" } */ /* { dg-final { scan-assembler "jsr __m68k_read_tp" } } */ /* { dg-final { scan-assembler "foo@TLSIE\\(\%a5\\)" } } */ diff --git a/gcc/testsuite/gcc.target/m68k/tls-ld-xgot-xtls.c b/gcc/testsuite/gcc.target/m68k/tls-ld-xgot-xtls.c index 4817de01d44..74eb7e4ceae 100644 --- a/gcc/testsuite/gcc.target/m68k/tls-ld-xgot-xtls.c +++ b/gcc/testsuite/gcc.target/m68k/tls-ld-xgot-xtls.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! *-linux-* } { "*" } { "" } } */ +/* { dg-skip-if "" { ! *-linux-* } } */ /* { dg-options "-O2 -fpic -mxgot -mxtls" } */ /* { dg-final { scan-assembler "#foo@TLSLDM,\%\[ad\]\[0-7\]" } } */ /* { dg-final { scan-assembler "bsr.l __tls_get_addr@PLTPC" } } */ diff --git a/gcc/testsuite/gcc.target/m68k/tls-ld-xgot.c b/gcc/testsuite/gcc.target/m68k/tls-ld-xgot.c index f95f7192855..590e90597fa 100644 --- a/gcc/testsuite/gcc.target/m68k/tls-ld-xgot.c +++ b/gcc/testsuite/gcc.target/m68k/tls-ld-xgot.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! *-linux-* } { "*" } { "" } } */ +/* { dg-skip-if "" { ! *-linux-* } } */ /* { dg-options "-O2 -fpic -mxgot" } */ /* { dg-final { scan-assembler "#foo@TLSLDM,\%\[ad\]\[0-7\]" } } */ /* { dg-final { scan-assembler "bsr.l __tls_get_addr@PLTPC" } } */ diff --git a/gcc/testsuite/gcc.target/m68k/tls-ld-xtls.c b/gcc/testsuite/gcc.target/m68k/tls-ld-xtls.c index 1bc3eaf7de5..804b156577f 100644 --- a/gcc/testsuite/gcc.target/m68k/tls-ld-xtls.c +++ b/gcc/testsuite/gcc.target/m68k/tls-ld-xtls.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! *-linux-* } { "*" } { "" } } */ +/* { dg-skip-if "" { ! *-linux-* } } */ /* { dg-options "-O2 -fpic -mxtls" } */ /* { dg-final { scan-assembler "foo@TLSLDM\\(\%a5\\)" } } */ /* { dg-final { scan-assembler "bsr.l __tls_get_addr@PLTPC" } } */ diff --git a/gcc/testsuite/gcc.target/m68k/tls-ld.c b/gcc/testsuite/gcc.target/m68k/tls-ld.c index 556a11718ca..af470c9613a 100644 --- a/gcc/testsuite/gcc.target/m68k/tls-ld.c +++ b/gcc/testsuite/gcc.target/m68k/tls-ld.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! *-linux-* } { "*" } { "" } } */ +/* { dg-skip-if "" { ! *-linux-* } } */ /* { dg-options "-O2 -fpic" } */ /* { dg-final { scan-assembler "foo@TLSLDM\\(\%a5\\)" } } */ /* { dg-final { scan-assembler "bsr.l __tls_get_addr@PLTPC" } } */ diff --git a/gcc/testsuite/gcc.target/m68k/tls-le-xtls.c b/gcc/testsuite/gcc.target/m68k/tls-le-xtls.c index 90061153f89..9d77f0c27dc 100644 --- a/gcc/testsuite/gcc.target/m68k/tls-le-xtls.c +++ b/gcc/testsuite/gcc.target/m68k/tls-le-xtls.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! *-linux-* } { "*" } { "" } } */ +/* { dg-skip-if "" { ! *-linux-* } } */ /* { dg-options "-O2 -mxtls" } */ /* { dg-final { scan-assembler "jsr __m68k_read_tp" } } */ /* { dg-final { scan-assembler "#foo@TLSLE,\%\[ad\]\[0-7\]" } } */ diff --git a/gcc/testsuite/gcc.target/m68k/tls-le.c b/gcc/testsuite/gcc.target/m68k/tls-le.c index 1c0eab23886..74234e9e5a4 100644 --- a/gcc/testsuite/gcc.target/m68k/tls-le.c +++ b/gcc/testsuite/gcc.target/m68k/tls-le.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { ! *-linux-* } { "*" } { "" } } */ +/* { dg-skip-if "" { ! *-linux-* } } */ /* { dg-options "-O2" } */ /* { dg-final { scan-assembler "jsr __m68k_read_tp" } } */ /* { dg-final { scan-assembler "lea \\(foo@TLSLE,\%a0\\)" } } */ diff --git a/gcc/testsuite/gcc.target/mips/data-sym-jump.c b/gcc/testsuite/gcc.target/mips/data-sym-jump.c index c3ba2944cdc..ae48c0b4b5c 100644 --- a/gcc/testsuite/gcc.target/mips/data-sym-jump.c +++ b/gcc/testsuite/gcc.target/mips/data-sym-jump.c @@ -25,7 +25,7 @@ frob (int i) /* Expect assembly like: - la $2, $L4 + la $2,$L4 # Anything goes here. .type __jump_frob_4, @object # Symbol # must match label. __jump_frob_4: # The symbol must match. @@ -47,4 +47,4 @@ __jend_frob_4: # The symbol must match. that is `__jump_*'/`__jend_*' symbols inserted around a jump table. */ -/* { dg-final { scan-assembler "\tla\t\\\$\[0-9\]+, (.L(\[0-9\]+))\n.*\t\\.type\t(__jump_frob_\\2), @object\n\\3:\n\\1:\n(?:\t\\.(?:half|word)\t.L\[0-9\]+-\\1\n)\{11\}\t\\.type\t(__jend_frob_\\2), @function\n\\4:\n\t\\.insn\n" } } */ +/* { dg-final { scan-assembler "\tla\t\\\$\[0-9\]+,(.L(\[0-9\]+))\n.*\t\\.type\t(__jump_frob_\\2), @object\n\\3:\n\\1:\n(?:\t\\.(?:half|word)\t.L\[0-9\]+-\\1\n)\{11\}\t\\.type\t(__jend_frob_\\2), @function\n\\4:\n\t\\.insn\n" } } */ diff --git a/gcc/testsuite/gcc.target/mips/pr51513-1.c b/gcc/testsuite/gcc.target/mips/pr51513-1.c new file mode 100644 index 00000000000..b5e0d69fa29 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/pr51513-1.c @@ -0,0 +1,48 @@ +/* { dg-do compile } */ +/* { dg-options "-mips16 -mcode-readable=yes" } */ + +/* PR tree-optimization/51513 verification variant for MIPS16, #1. */ + +int __attribute__ ((weak)) +frob (int i) +{ + switch (i) + { + case -5: + return -2; + case -3: + return -1; + case 0: + return 0; + case 3: + return 1; + case 5: + break; + default: + __builtin_unreachable (); + } + return i; +} + +/* Without the fix for PR tree-optimization/51513 truncated code + would be emitted for `frob', like: + + .text + .align 2 + .weak frob + .set mips16 + .set nomicromips + .ent frob + .type frob, @function +frob: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + addiu $2,$4,5 + .end frob + .size frob, .-frob + + meaning `frob' will have no chance to return, let alone produce + the result expected. */ + +/* { dg-final { scan-assembler "\tjrc?\t\\\$31\n" } } */ diff --git a/gcc/testsuite/gcc.target/mips/pr51513-2.c b/gcc/testsuite/gcc.target/mips/pr51513-2.c new file mode 100644 index 00000000000..b921904fdff --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/pr51513-2.c @@ -0,0 +1,56 @@ +/* { dg-do run } */ +/* { dg-options "-mips16 -mcode-readable=yes" } */ + +/* PR tree-optimization/51513 verification variant for MIPS16, #2. */ + +int __attribute__ ((weak)) +frob (int i) +{ + switch (i) + { + case -5: + return -2; + case -3: + return -1; + case 0: + return 0; + case 3: + return 1; + case 5: + break; + default: + __builtin_unreachable (); + } + return i; +} + +int +main (void) +{ + return !(frob (-5) == -2 + & frob (-3) == -1 + & frob (0) == 0 + & frob (3) == 1 + & frob (5) == 5); +} + +/* Without the fix for PR tree-optimization/51513 truncated code + would be emitted for `frob', like: + + .text + .align 2 + .weak frob + .set mips16 + .set nomicromips + .ent frob + .type frob, @function +frob: + .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 + .mask 0x00000000,0 + .fmask 0x00000000,0 + addiu $2,$4,5 + .end frob + .size frob, .-frob + + meaning `frob' will have no chance to return, let alone produce + the result expected. */ diff --git a/gcc/testsuite/gcc.target/msp430/pr78818-auto-warn.c b/gcc/testsuite/gcc.target/msp430/pr78818-auto-warn.c new file mode 100644 index 00000000000..3dba361071f --- /dev/null +++ b/gcc/testsuite/gcc.target/msp430/pr78818-auto-warn.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ + +__attribute__((persistent)) int persistent_1_g = 1; +__attribute__((persistent)) int persistent_2_g = 0; +static __attribute__((persistent)) int persistent_3_g = 1; +static __attribute__((persistent)) int persistent_4_g = 0; + +int +main (void) +{ + __attribute__((persistent)) int persistent_1 = 1; /* { dg-warning "attribute has no effect on automatic" } */ + __attribute__((persistent)) int persistent_2 = 0; /* { dg-warning "attribute has no effect on automatic" } */ + static __attribute__((persistent)) int persistent_3 = 1; + static __attribute__((persistent)) int persistent_4 = 0; + return 0; +} diff --git a/gcc/testsuite/gcc.target/msp430/pr78818-auto.c b/gcc/testsuite/gcc.target/msp430/pr78818-auto.c new file mode 100644 index 00000000000..1fb0b28e64a --- /dev/null +++ b/gcc/testsuite/gcc.target/msp430/pr78818-auto.c @@ -0,0 +1,5 @@ +/* { dg-do compile } */ + +/* { dg-final { scan-assembler-not "\\.comm" } } */ + +#include "pr78818-real.c" diff --git a/gcc/testsuite/gcc.target/msp430/pr78818-data-region.c b/gcc/testsuite/gcc.target/msp430/pr78818-data-region.c new file mode 100644 index 00000000000..22b1fa272ad --- /dev/null +++ b/gcc/testsuite/gcc.target/msp430/pr78818-data-region.c @@ -0,0 +1,6 @@ +/* { dg-do compile } */ +/* { dg-options "-mdata-region=either" } */ + +/* { dg-final { scan-assembler-not "\\.either" } } */ + +#include "pr78818-real.c" diff --git a/gcc/testsuite/gcc.target/msp430/pr78818-data-sec.c b/gcc/testsuite/gcc.target/msp430/pr78818-data-sec.c new file mode 100644 index 00000000000..6367e01d948 --- /dev/null +++ b/gcc/testsuite/gcc.target/msp430/pr78818-data-sec.c @@ -0,0 +1,7 @@ +/* { dg-do compile } */ +/* { dg-options "-fdata-sections" } */ + +/* { dg-final { scan-assembler-not "\\.data" } } */ +/* { dg-final { scan-assembler-not "\\.bss" } } */ + +#include "pr78818-real.c" diff --git a/gcc/testsuite/gcc.target/msp430/pr78818-real.c b/gcc/testsuite/gcc.target/msp430/pr78818-real.c new file mode 100644 index 00000000000..504ed4a6a79 --- /dev/null +++ b/gcc/testsuite/gcc.target/msp430/pr78818-real.c @@ -0,0 +1,9 @@ +__attribute__((persistent)) int persistent_1 = 1; +__attribute__((persistent)) int persistent_2 = 0; +static __attribute__((persistent)) int persistent_3 = 1; +static __attribute__((persistent)) int persistent_4 = 0; + +int main (void) +{ + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/20020118-1.c b/gcc/testsuite/gcc.target/powerpc/20020118-1.c index b92dd2a7a35..ea7f86123d0 100644 --- a/gcc/testsuite/gcc.target/powerpc/20020118-1.c +++ b/gcc/testsuite/gcc.target/powerpc/20020118-1.c @@ -1,6 +1,6 @@ /* { dg-do run { target powerpc*-*-* } }*/ /* VxWorks only guarantees 64 bits of alignment (STACK_BOUNDARY == 64). */ -/* { dg-skip-if "" { "powerpc*-*-vxworks*" } { "*" } { "" } } */ +/* { dg-skip-if "" { "powerpc*-*-vxworks*" } } */ /* Force 128-bit stack alignment for eabi targets. */ /* { dg-options "-mno-eabi" { target powerpc*-*-eabi* } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/20030218-1.c b/gcc/testsuite/gcc.target/powerpc/20030218-1.c index 0c5077d554d..eea227bfa2d 100644 --- a/gcc/testsuite/gcc.target/powerpc/20030218-1.c +++ b/gcc/testsuite/gcc.target/powerpc/20030218-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ /* Test vectors that can interconvert without a cast. */ diff --git a/gcc/testsuite/gcc.target/powerpc/20030505.c b/gcc/testsuite/gcc.target/powerpc/20030505.c index 2bef590bf7b..1182d8d42b7 100644 --- a/gcc/testsuite/gcc.target/powerpc/20030505.c +++ b/gcc/testsuite/gcc.target/powerpc/20030505.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-W -mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ #define __vector __attribute__((vector_size(8))) diff --git a/gcc/testsuite/gcc.target/powerpc/20081204-1.c b/gcc/testsuite/gcc.target/powerpc/20081204-1.c index 8a973d0ec52..31956a14a88 100644 --- a/gcc/testsuite/gcc.target/powerpc/20081204-1.c +++ b/gcc/testsuite/gcc.target/powerpc/20081204-1.c @@ -2,7 +2,7 @@ TARGET_HARD_FLOAT && !TARGET_FPRS. */ /* { dg-do compile } */ /* { dg-options "-mcpu=750 -mfloat-gprs=single" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ static int comp(const void *a,const void *b){ return (*(float *)a<*(float *)b)-(*(float *)a>*(float *)b); diff --git a/gcc/testsuite/gcc.target/powerpc/405-dlmzb-strlen-1.c b/gcc/testsuite/gcc.target/powerpc/405-dlmzb-strlen-1.c index 52675bade32..3d66b1c695e 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-dlmzb-strlen-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-dlmzb-strlen-1.c @@ -1,10 +1,10 @@ /* Test generation of dlmzb for strlen on 405. */ /* Origin: Joseph Myers <joseph@codesourcery.com> */ /* { dg-do compile } */ -/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "dlmzb\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-macchw-1.c b/gcc/testsuite/gcc.target/powerpc/405-macchw-1.c index e65ba08ebd8..e3125e05173 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-macchw-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-macchw-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "macchw " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-macchw-2.c b/gcc/testsuite/gcc.target/powerpc/405-macchw-2.c index 6263818c1e3..49bddc84bda 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-macchw-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-macchw-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "macchw\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-macchwu-1.c b/gcc/testsuite/gcc.target/powerpc/405-macchwu-1.c index 18d448c0618..8046d778499 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-macchwu-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-macchwu-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "macchwu " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-macchwu-2.c b/gcc/testsuite/gcc.target/powerpc/405-macchwu-2.c index 7728c8b68d0..1ccdbe2f96d 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-macchwu-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-macchwu-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "macchwu\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-machhw-1.c b/gcc/testsuite/gcc.target/powerpc/405-machhw-1.c index 2211cd1583b..1e2814df0ae 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-machhw-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-machhw-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "machhw " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-machhw-2.c b/gcc/testsuite/gcc.target/powerpc/405-machhw-2.c index 4c54f27b527..3bb6a4d03f5 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-machhw-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-machhw-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "machhw\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-machhwu-1.c b/gcc/testsuite/gcc.target/powerpc/405-machhwu-1.c index 44d8ea68cae..fcb22c18922 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-machhwu-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-machhwu-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "machhwu " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-machhwu-2.c b/gcc/testsuite/gcc.target/powerpc/405-machhwu-2.c index 0fc96d1bd00..3a98d1b3dbc 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-machhwu-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-machhwu-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "machhwu\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-maclhw-1.c b/gcc/testsuite/gcc.target/powerpc/405-maclhw-1.c index 43ec01914f7..ccc8839bf5f 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-maclhw-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-maclhw-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "maclhw " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-maclhw-2.c b/gcc/testsuite/gcc.target/powerpc/405-maclhw-2.c index d79df52858c..4f0d3a71087 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-maclhw-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-maclhw-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "maclhw\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-maclhwu-1.c b/gcc/testsuite/gcc.target/powerpc/405-maclhwu-1.c index 0d65a5d34e2..14bb3fc0340 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-maclhwu-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-maclhwu-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "maclhwu " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-maclhwu-2.c b/gcc/testsuite/gcc.target/powerpc/405-maclhwu-2.c index 5b148d66c19..772e6e0ac2c 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-maclhwu-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-maclhwu-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "maclhwu\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mulchw-1.c b/gcc/testsuite/gcc.target/powerpc/405-mulchw-1.c index 510e0c81cd2..6794b59fa1b 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mulchw-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mulchw-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mulchw " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mulchw-2.c b/gcc/testsuite/gcc.target/powerpc/405-mulchw-2.c index 14b4df1c094..0edbf460779 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mulchw-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mulchw-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mulchw\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mulchwu-1.c b/gcc/testsuite/gcc.target/powerpc/405-mulchwu-1.c index a0ecdac652e..2e6e3b8fac2 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mulchwu-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mulchwu-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mulchwu " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mulchwu-2.c b/gcc/testsuite/gcc.target/powerpc/405-mulchwu-2.c index c4da9927398..1906beb26ec 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mulchwu-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mulchwu-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mulchwu\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mulhhw-1.c b/gcc/testsuite/gcc.target/powerpc/405-mulhhw-1.c index efdd8cdbb65..178eadcf752 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mulhhw-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mulhhw-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mulhhw " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mulhhw-2.c b/gcc/testsuite/gcc.target/powerpc/405-mulhhw-2.c index cfa00034eb9..14d9a3b8b6f 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mulhhw-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mulhhw-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mulhhw\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mulhhwu-1.c b/gcc/testsuite/gcc.target/powerpc/405-mulhhwu-1.c index c6f7a24524e..94f803a52a6 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mulhhwu-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mulhhwu-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mulhhwu " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mulhhwu-2.c b/gcc/testsuite/gcc.target/powerpc/405-mulhhwu-2.c index 9b647e7d778..cfdc1bada6a 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mulhhwu-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mulhhwu-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mulhhwu\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mullhw-1.c b/gcc/testsuite/gcc.target/powerpc/405-mullhw-1.c index ea28b5542c8..fcd5ef66049 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mullhw-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mullhw-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mullhw " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mullhw-2.c b/gcc/testsuite/gcc.target/powerpc/405-mullhw-2.c index 76bbb6403e5..b45bbd28e94 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mullhw-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mullhw-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mullhw\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mullhwu-1.c b/gcc/testsuite/gcc.target/powerpc/405-mullhwu-1.c index 152dfe9b859..b21f467a31b 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mullhwu-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mullhwu-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mullhwu " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-mullhwu-2.c b/gcc/testsuite/gcc.target/powerpc/405-mullhwu-2.c index ff4b8eca529..21b3ccdc175 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-mullhwu-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-mullhwu-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "mullhwu\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-nmacchw-1.c b/gcc/testsuite/gcc.target/powerpc/405-nmacchw-1.c index dd258efe5eb..3df257affc9 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-nmacchw-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-nmacchw-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "nmacchw " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-nmacchw-2.c b/gcc/testsuite/gcc.target/powerpc/405-nmacchw-2.c index 2a470b9e78b..f3a925a5fb3 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-nmacchw-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-nmacchw-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "nmacchw\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-nmachhw-1.c b/gcc/testsuite/gcc.target/powerpc/405-nmachhw-1.c index f699a3fc41d..0540eed7288 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-nmachhw-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-nmachhw-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "nmachhw " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-nmachhw-2.c b/gcc/testsuite/gcc.target/powerpc/405-nmachhw-2.c index 07a30c13f76..64150e240c8 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-nmachhw-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-nmachhw-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "nmachhw\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-nmaclhw-1.c b/gcc/testsuite/gcc.target/powerpc/405-nmaclhw-1.c index 91eba842a02..1268bb8950c 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-nmaclhw-1.c +++ b/gcc/testsuite/gcc.target/powerpc/405-nmaclhw-1.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "nmaclhw " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/405-nmaclhw-2.c b/gcc/testsuite/gcc.target/powerpc/405-nmaclhw-2.c index 83717a4ffda..3e777aec470 100644 --- a/gcc/testsuite/gcc.target/powerpc/405-nmaclhw-2.c +++ b/gcc/testsuite/gcc.target/powerpc/405-nmaclhw-2.c @@ -3,7 +3,7 @@ /* { dg-do compile } */ /* { dg-require-effective-target ilp32 } */ /* { dg-options "-O2 -mcpu=405" } */ -/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } { "*" } { "" } } */ +/* { dg-skip-if "other options override -mcpu=405" { ! powerpc_405_nocache } } */ /* { dg-final { scan-assembler "nmaclhw\\. " } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/440-dlmzb-strlen-1.c b/gcc/testsuite/gcc.target/powerpc/440-dlmzb-strlen-1.c index 03734663c96..685f1292f80 100644 --- a/gcc/testsuite/gcc.target/powerpc/440-dlmzb-strlen-1.c +++ b/gcc/testsuite/gcc.target/powerpc/440-dlmzb-strlen-1.c @@ -1,7 +1,7 @@ /* Test generation of dlmzb for strlen on 440. */ /* Origin: Joseph Myers <joseph@codesourcery.com> */ /* { dg-do compile } */ -/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-require-effective-target ilp32 } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=440" } } */ /* { dg-options "-O2 -mcpu=440" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-32.c b/gcc/testsuite/gcc.target/powerpc/altivec-32.c index b13b6c9116f..68fb62fe250 100644 --- a/gcc/testsuite/gcc.target/powerpc/altivec-32.c +++ b/gcc/testsuite/gcc.target/powerpc/altivec-32.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ /* { dg-options "-O2 -ftree-vectorize -mcpu=power6 -maltivec" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c b/gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c index d0b671eac77..e6cf2f0464d 100644 --- a/gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c +++ b/gcc/testsuite/gcc.target/powerpc/altivec-perm-3.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*le-*-* } } */ /* { dg-options "-O -maltivec -mno-vsx" } */ typedef unsigned char V __attribute__((vector_size(16))); diff --git a/gcc/testsuite/gcc.target/powerpc/atomic-p7.c b/gcc/testsuite/gcc.target/powerpc/atomic-p7.c index 657dc16cce7..3f5494f881b 100644 --- a/gcc/testsuite/gcc.target/powerpc/atomic-p7.c +++ b/gcc/testsuite/gcc.target/powerpc/atomic-p7.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/atomic-p8.c b/gcc/testsuite/gcc.target/powerpc/atomic-p8.c index fe7c0e0af83..6a988e24efc 100644 --- a/gcc/testsuite/gcc.target/powerpc/atomic-p8.c +++ b/gcc/testsuite/gcc.target/powerpc/atomic-p8.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/atomic_load_store-p8.c b/gcc/testsuite/gcc.target/powerpc/atomic_load_store-p8.c index 0163e73fa02..13b1d143984 100644 --- a/gcc/testsuite/gcc.target/powerpc/atomic_load_store-p8.c +++ b/gcc/testsuite/gcc.target/powerpc/atomic_load_store-p8.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bcd-1.c b/gcc/testsuite/gcc.target/powerpc/bcd-1.c index b4f3fb2c879..cb3b406ac25 100644 --- a/gcc/testsuite/gcc.target/powerpc/bcd-1.c +++ b/gcc/testsuite/gcc.target/powerpc/bcd-1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bcd-2.c b/gcc/testsuite/gcc.target/powerpc/bcd-2.c index 70a2f8ff8ee..c6e1886b565 100644 --- a/gcc/testsuite/gcc.target/powerpc/bcd-2.c +++ b/gcc/testsuite/gcc.target/powerpc/bcd-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bcd-3.c b/gcc/testsuite/gcc.target/powerpc/bcd-3.c index 4d47e481904..ca12fc94572 100644 --- a/gcc/testsuite/gcc.target/powerpc/bcd-3.c +++ b/gcc/testsuite/gcc.target/powerpc/bcd-3.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1a.c b/gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1a.c index 02de1f944a0..ae2f062142e 100644 --- a/gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1a.c +++ b/gcc/testsuite/gcc.target/powerpc/bmi2-pext64-1a.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-options "-O3 -mcpu=power7" } */ /* { dg-require-effective-target lp64 } */ /* { dg-require-effective-target powerpc_vsx_ok } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bool2-av.c b/gcc/testsuite/gcc.target/powerpc/bool2-av.c index d5994c7eef7..50bd14a1526 100644 --- a/gcc/testsuite/gcc.target/powerpc/bool2-av.c +++ b/gcc/testsuite/gcc.target/powerpc/bool2-av.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ /* { dg-options "-O2 -mcpu=power6 -maltivec" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bool2-p5.c b/gcc/testsuite/gcc.target/powerpc/bool2-p5.c index 1f01fdbf63d..28edbae5892 100644 --- a/gcc/testsuite/gcc.target/powerpc/bool2-p5.c +++ b/gcc/testsuite/gcc.target/powerpc/bool2-p5.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ /* { dg-options "-O2 -mcpu=power5 -mabi=altivec -mno-altivec -mno-vsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bool2-p7.c b/gcc/testsuite/gcc.target/powerpc/bool2-p7.c index 7bfe8891c45..7f1d8c82ce3 100644 --- a/gcc/testsuite/gcc.target/powerpc/bool2-p7.c +++ b/gcc/testsuite/gcc.target/powerpc/bool2-p7.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bool2-p8.c b/gcc/testsuite/gcc.target/powerpc/bool2-p8.c index 4001e5b3522..ac1524c60ac 100644 --- a/gcc/testsuite/gcc.target/powerpc/bool2-p8.c +++ b/gcc/testsuite/gcc.target/powerpc/bool2-p8.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bool3-av.c b/gcc/testsuite/gcc.target/powerpc/bool3-av.c index 36ceacd80ee..cc80d72240f 100644 --- a/gcc/testsuite/gcc.target/powerpc/bool3-av.c +++ b/gcc/testsuite/gcc.target/powerpc/bool3-av.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ /* { dg-options "-O2 -mcpu=power6 -mabi=altivec -maltivec -mno-vsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bool3-p7.c b/gcc/testsuite/gcc.target/powerpc/bool3-p7.c index 75f446ef672..9a0c0068bf9 100644 --- a/gcc/testsuite/gcc.target/powerpc/bool3-p7.c +++ b/gcc/testsuite/gcc.target/powerpc/bool3-p7.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bool3-p8.c b/gcc/testsuite/gcc.target/powerpc/bool3-p8.c index e95901a53a1..eba59e02c07 100644 --- a/gcc/testsuite/gcc.target/powerpc/bool3-p8.c +++ b/gcc/testsuite/gcc.target/powerpc/bool3-p8.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/bswap64-4.c b/gcc/testsuite/gcc.target/powerpc/bswap64-4.c index 826999cf12f..1f5ac0e5f09 100644 --- a/gcc/testsuite/gcc.target/powerpc/bswap64-4.c +++ b/gcc/testsuite/gcc.target/powerpc/bswap64-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-O2 -mpowerpc64" } */ /* { dg-require-effective-target ilp32 } */ /* { dg-final { scan-assembler-times "lwbrx" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c index 60ec617ab1a..08b7a5395d2 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-3-runnable.c @@ -5,8 +5,37 @@ #include <altivec.h> // vector +#define ALL 1 +#define EVEN 2 +#define ODD 3 + void abort (void); +void test_result_sp(int check, vector float vec_result, vector float vec_expected) +{ + int i; + for(i = 0; i<4; i++) { + + switch (check) { + case ALL: + break; + case EVEN: + if (i%2 == 0) + break; + else + continue; + case ODD: + if (i%2 != 0) + break; + else + continue; + } + + if (vec_result[i] != vec_expected[i]) + abort(); + } +} + void test_result_dp(vector double vec_result, vector double vec_expected) { if (vec_result[0] != vec_expected[0]) @@ -21,11 +50,17 @@ int main() int i; vector unsigned int vec_unint; vector signed int vec_int; + vector long long int vec_ll_int0, vec_ll_int1; + vector long long unsigned int vec_ll_uns_int0, vec_ll_uns_int1; vector float vec_flt, vec_flt_result, vec_flt_expected; vector double vec_dble0, vec_dble1, vec_dble_result, vec_dble_expected; vec_int = (vector signed int){ -1, 3, -5, 1234567 }; + vec_ll_int0 = (vector long long int){ -12, -12345678901234 }; + vec_ll_int1 = (vector long long int){ 12, 9876543210 }; vec_unint = (vector unsigned int){ 9, 11, 15, 2468013579 }; + vec_ll_uns_int0 = (vector unsigned long long int){ 102, 9753108642 }; + vec_ll_uns_int1 = (vector unsigned long long int){ 23, 29 }; vec_flt = (vector float){ -21., 3.5, -53., 78. }; vec_dble0 = (vector double){ 34.0, 97.0 }; vec_dble1 = (vector double){ 214.0, -5.5 }; @@ -34,7 +69,7 @@ int main() vec_dble_expected = (vector double){-1.000000, -5.000000}; vec_dble_result = vec_doublee (vec_int); test_result_dp(vec_dble_result, vec_dble_expected); - + vec_dble_expected = (vector double){9.000000, 15.000000}; vec_dble_result = vec_doublee (vec_unint); test_result_dp(vec_dble_result, vec_dble_expected); @@ -48,7 +83,7 @@ int main() vec_dble_expected = (vector double){3.000000, 1234567.000000}; vec_dble_result = vec_doubleo (vec_int); test_result_dp(vec_dble_result, vec_dble_expected); - + vec_dble_expected = (vector double){11.000000, 2468013579.000000}; vec_dble_result = vec_doubleo (vec_unint); test_result_dp(vec_dble_result, vec_dble_expected); @@ -62,7 +97,7 @@ int main() vec_dble_expected = (vector double){-5.000000, 1234567.000000}; vec_dble_result = vec_doublel (vec_int); test_result_dp(vec_dble_result, vec_dble_expected); - + vec_dble_expected = (vector double){15.000000, 2468013579.000000}; vec_dble_result = vec_doublel (vec_unint); test_result_dp(vec_dble_result, vec_dble_expected); @@ -71,14 +106,61 @@ int main() vec_dble_result = vec_doublel (vec_flt); test_result_dp(vec_dble_result, vec_dble_expected); - + /* conversion of words 2 and 3 */ vec_dble_expected = (vector double){-1.000000, 3.000000}; vec_dble_result = vec_doubleh (vec_int); test_result_dp(vec_dble_result, vec_dble_expected); - + vec_dble_expected = (vector double){9.000000, 11.000000}; vec_dble_result = vec_doubleh (vec_unint); test_result_dp(vec_dble_result, vec_dble_expected); + vec_dble_expected = (vector double){-21.000000, 3.500000}; + vec_dble_result = vec_doubleh (vec_flt); + test_result_dp(vec_dble_result, vec_dble_expected); + + /* conversion of integer vector to single precision float vector */ + vec_flt_expected = (vector float){-1.00, 3.00, -5.00, 1234567.00}; + vec_flt_result = vec_float (vec_int); + test_result_sp(ALL, vec_flt_result, vec_flt_expected); + + vec_flt_expected = (vector float){9.00, 11.00, 15.00, 2468013579.0}; + vec_flt_result = vec_float (vec_unint); + test_result_sp(ALL, vec_flt_result, vec_flt_expected); + + /* conversion of two double precision vectors to single precision vector */ + vec_flt_expected = (vector float){-12.00, -12345678901234.00, 12.00, 9876543210.00}; + vec_flt_result = vec_float2 (vec_ll_int0, vec_ll_int1); + test_result_sp(ALL, vec_flt_result, vec_flt_expected); + + vec_flt_expected = (vector float){102.00, 9753108642.00, 23.00, 29.00}; + vec_flt_result = vec_float2 (vec_ll_uns_int0, vec_ll_uns_int1); + test_result_sp(ALL, vec_flt_result, vec_flt_expected); + + /* conversion of even words in double precision vector to single precision vector */ + vec_flt_expected = (vector float){-12.00, 00.00, -12345678901234.00, 0.00}; + vec_flt_result = vec_floate (vec_ll_int0); + test_result_sp(EVEN, vec_flt_result, vec_flt_expected); + + vec_flt_expected = (vector float){102.00, 0.00, 9753108642.00, 0.00}; + vec_flt_result = vec_floate (vec_ll_uns_int0); + test_result_sp(EVEN, vec_flt_result, vec_flt_expected); + + vec_flt_expected = (vector float){34.00, 0.00, 97.00, 0.00}; + vec_flt_result = vec_floate (vec_dble0); + test_result_sp(EVEN, vec_flt_result, vec_flt_expected); + + /* conversion of odd words in double precision vector to single precision vector */ + vec_flt_expected = (vector float){0.00, -12.00, 00.00, -12345678901234.00}; + vec_flt_result = vec_floato (vec_ll_int0); + test_result_sp(ODD, vec_flt_result, vec_flt_expected); + + vec_flt_expected = (vector float){0.00, 102.00, 0.00, 9753108642.00}; + vec_flt_result = vec_floato (vec_ll_uns_int0); + test_result_sp(ODD, vec_flt_result, vec_flt_expected); + + vec_flt_expected = (vector float){0.00, 34.00, 0.00, 97.00}; + vec_flt_result = vec_floato (vec_dble0); + test_result_sp(ODD, vec_flt_result, vec_flt_expected); } diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-3.c b/gcc/testsuite/gcc.target/powerpc/builtins-3.c index b25248891d1..00fa6ec0274 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-3.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-3.c @@ -207,10 +207,10 @@ test_vul_sldw_vul_vul (vector unsigned long long x, test_vsll_slo_vsll_vuc 1 vslo test_vull_slo_vsll_vsc 1 vslo test_vull_slo_vsll_vuc 1 vslo - test_vsll_mulo_vsi_vsi 1 vmulosh - test_vull_mulo_vui_vui 1 vmulouh - test_vsll_mule_vsi_vsi 1 vmulesh - test_vull_mule_vui_vui 1 vmuleuh + test_vsll_mulo_vsi_vsi 1 vmulosw + test_vull_mulo_vui_vui 1 vmulouw + test_vsll_mule_vsi_vsi 1 vmulesw + test_vull_mule_vui_vui 1 vmuleuw test_vsc_mulo_vsc_vsc 1 xxsldwi test_vuc_mulo_vuc_vuc 1 xxsldwi test_vssi_mulo_vssi_vssi 1 xxsldwi @@ -236,8 +236,8 @@ test_vul_sldw_vul_vul (vector unsigned long long x, /* { dg-final { scan-assembler-times "xvnegsp" 1 } } */ /* { dg-final { scan-assembler-times "xvnegdp" 1 } } */ /* { dg-final { scan-assembler-times "vslo" 4 } } */ -/* { dg-final { scan-assembler-times "vmulosh" 1 } } */ -/* { dg-final { scan-assembler-times "vmulouh" 1 } } */ -/* { dg-final { scan-assembler-times "vmulesh" 1 } } */ -/* { dg-final { scan-assembler-times "vmuleuh" 1 } } */ +/* { dg-final { scan-assembler-times "vmulosw" 1 } } */ +/* { dg-final { scan-assembler-times "vmulouw" 1 } } */ +/* { dg-final { scan-assembler-times "vmulesw" 1 } } */ +/* { dg-final { scan-assembler-times "vmuleuw" 1 } } */ /* { dg-final { scan-assembler-times "xxsldwi" 8 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/cell_builtin-1.c b/gcc/testsuite/gcc.target/powerpc/cell_builtin-1.c index 7cc8fa7f766..5496b7cf7db 100644 --- a/gcc/testsuite/gcc.target/powerpc/cell_builtin-1.c +++ b/gcc/testsuite/gcc.target/powerpc/cell_builtin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=cell" } } */ /* { dg-options "-O2 -maltivec -mcpu=cell" } */ /* { dg-final { scan-assembler-times "lvlx" 19 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/cell_builtin-2.c b/gcc/testsuite/gcc.target/powerpc/cell_builtin-2.c index 25c4e47412b..dad61d7b613 100644 --- a/gcc/testsuite/gcc.target/powerpc/cell_builtin-2.c +++ b/gcc/testsuite/gcc.target/powerpc/cell_builtin-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=cell" } } */ /* { dg-options "-O2 -maltivec -mcpu=cell" } */ /* { dg-final { scan-assembler-times "lvlxl" 19 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/cell_builtin-3.c b/gcc/testsuite/gcc.target/powerpc/cell_builtin-3.c index 6f808611346..62a32e04539 100644 --- a/gcc/testsuite/gcc.target/powerpc/cell_builtin-3.c +++ b/gcc/testsuite/gcc.target/powerpc/cell_builtin-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=cell" } } */ /* { dg-options "-O2 -maltivec -mcpu=cell" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/cell_builtin-4.c b/gcc/testsuite/gcc.target/powerpc/cell_builtin-4.c index af1dc80de12..4f9e2d0170d 100644 --- a/gcc/testsuite/gcc.target/powerpc/cell_builtin-4.c +++ b/gcc/testsuite/gcc.target/powerpc/cell_builtin-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=cell" } } */ /* { dg-options "-O2 -maltivec -mcpu=cell" } */ /* { dg-final { scan-assembler-times "lvrxl" 19 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/cell_builtin-5.c b/gcc/testsuite/gcc.target/powerpc/cell_builtin-5.c index 25d84619415..b2bdce65a55 100644 --- a/gcc/testsuite/gcc.target/powerpc/cell_builtin-5.c +++ b/gcc/testsuite/gcc.target/powerpc/cell_builtin-5.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=cell" } } */ /* { dg-options "-O2 -maltivec -mcpu=cell" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/cell_builtin-6.c b/gcc/testsuite/gcc.target/powerpc/cell_builtin-6.c index a6d9e5b45da..d33f06648c7 100644 --- a/gcc/testsuite/gcc.target/powerpc/cell_builtin-6.c +++ b/gcc/testsuite/gcc.target/powerpc/cell_builtin-6.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=cell" } } */ /* { dg-options "-O2 -maltivec -mcpu=cell" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/cell_builtin-7.c b/gcc/testsuite/gcc.target/powerpc/cell_builtin-7.c index 16b1d135881..7cf3cb8d3e1 100644 --- a/gcc/testsuite/gcc.target/powerpc/cell_builtin-7.c +++ b/gcc/testsuite/gcc.target/powerpc/cell_builtin-7.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=cell" } } */ /* { dg-options "-O2 -maltivec -mcpu=cell" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/cell_builtin-8.c b/gcc/testsuite/gcc.target/powerpc/cell_builtin-8.c index 828f44161de..a617ff89688 100644 --- a/gcc/testsuite/gcc.target/powerpc/cell_builtin-8.c +++ b/gcc/testsuite/gcc.target/powerpc/cell_builtin-8.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=cell" } } */ /* { dg-options "-O2 -maltivec -mcpu=cell" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c index a0e30410050..684c0f6d17d 100644 --- a/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c +++ b/gcc/testsuite/gcc.target/powerpc/cpu-builtin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ void use_cpu_is_builtins (unsigned int *p) diff --git a/gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c index e4b460e6f67..234041d5c35 100644 --- a/gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c +++ b/gcc/testsuite/gcc.target/powerpc/crypto-builtin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/crypto-builtin-2.c b/gcc/testsuite/gcc.target/powerpc/crypto-builtin-2.c index 0533f4544d0..f3d58b0c80b 100644 --- a/gcc/testsuite/gcc.target/powerpc/crypto-builtin-2.c +++ b/gcc/testsuite/gcc.target/powerpc/crypto-builtin-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8 -mno-crypto" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ctz-3.c b/gcc/testsuite/gcc.target/powerpc/ctz-3.c index 468a1f93540..2c1316e80e9 100644 --- a/gcc/testsuite/gcc.target/powerpc/ctz-3.c +++ b/gcc/testsuite/gcc.target/powerpc/ctz-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ctz-4.c b/gcc/testsuite/gcc.target/powerpc/ctz-4.c index 2d04a9b6579..618ecedf581 100644 --- a/gcc/testsuite/gcc.target/powerpc/ctz-4.c +++ b/gcc/testsuite/gcc.target/powerpc/ctz-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/direct-move-double1.c b/gcc/testsuite/gcc.target/powerpc/direct-move-double1.c index d7c1553bdf6..a22d2daa937 100644 --- a/gcc/testsuite/gcc.target/powerpc/direct-move-double1.c +++ b/gcc/testsuite/gcc.target/powerpc/direct-move-double1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/direct-move-double2.c b/gcc/testsuite/gcc.target/powerpc/direct-move-double2.c index 96f5d786c18..e6c4e1679bd 100644 --- a/gcc/testsuite/gcc.target/powerpc/direct-move-double2.c +++ b/gcc/testsuite/gcc.target/powerpc/direct-move-double2.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/direct-move-float1.c b/gcc/testsuite/gcc.target/powerpc/direct-move-float1.c index 18808efac96..2551077dbf7 100644 --- a/gcc/testsuite/gcc.target/powerpc/direct-move-float1.c +++ b/gcc/testsuite/gcc.target/powerpc/direct-move-float1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/direct-move-float2.c b/gcc/testsuite/gcc.target/powerpc/direct-move-float2.c index 1fa123b69b8..ba71d46b731 100644 --- a/gcc/testsuite/gcc.target/powerpc/direct-move-float2.c +++ b/gcc/testsuite/gcc.target/powerpc/direct-move-float2.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/direct-move-long1.c b/gcc/testsuite/gcc.target/powerpc/direct-move-long1.c index 25c8a5a2698..a722b4f6434 100644 --- a/gcc/testsuite/gcc.target/powerpc/direct-move-long1.c +++ b/gcc/testsuite/gcc.target/powerpc/direct-move-long1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/direct-move-long2.c b/gcc/testsuite/gcc.target/powerpc/direct-move-long2.c index 330cc372fe1..657cefcbf8f 100644 --- a/gcc/testsuite/gcc.target/powerpc/direct-move-long2.c +++ b/gcc/testsuite/gcc.target/powerpc/direct-move-long2.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c b/gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c index 980694263d2..bf534fc5a2f 100644 --- a/gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c +++ b/gcc/testsuite/gcc.target/powerpc/direct-move-vint1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c b/gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c index 1b6e3d1deeb..030f245fa83 100644 --- a/gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c +++ b/gcc/testsuite/gcc.target/powerpc/direct-move-vint2.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ehreturn.c b/gcc/testsuite/gcc.target/powerpc/ehreturn.c index 558db42381e..ed585631bbd 100644 --- a/gcc/testsuite/gcc.target/powerpc/ehreturn.c +++ b/gcc/testsuite/gcc.target/powerpc/ehreturn.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mminimal-toc -mno-multiple" } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ void foo () { diff --git a/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c b/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c index 365dead9fac..8e08878b5e3 100644 --- a/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c +++ b/gcc/testsuite/gcc.target/powerpc/extend-divide-1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c b/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c index 829cd40cae8..d930247cd2a 100644 --- a/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c +++ b/gcc/testsuite/gcc.target/powerpc/extend-divide-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-char.c new file mode 100644 index 00000000000..ebe91e7bfcd --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-char.c @@ -0,0 +1,66 @@ +/* Verify that overloaded built-ins for vec_sl with char + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include <altivec.h> + +//# vec_sl - shift left +//# vec_sr - shift right +//# vec_sra - shift right algebraic +//# vec_rl - rotate left + +vector signed char +testsl_signed (vector signed char x, vector unsigned char y) +{ + return vec_sl (x, y); +} + +vector unsigned char +testsl_unsigned (vector unsigned char x, vector unsigned char y) +{ + return vec_sl (x, y); +} + +vector signed char +testsr_signed (vector signed char x, vector unsigned char y) +{ + return vec_sr (x, y); +} + +vector unsigned char +testsr_unsigned (vector unsigned char x, vector unsigned char y) +{ + return vec_sr (x, y); +} + +vector signed char +testsra_signed (vector signed char x, vector unsigned char y) +{ + return vec_sra (x, y); +} + +vector unsigned char +testsra_unsigned (vector unsigned char x, vector unsigned char y) +{ + return vec_sra (x, y); +} + +vector signed char +testrl_signed (vector signed char x, vector unsigned char y) +{ + return vec_rl (x, y); +} + +vector unsigned char +testrl_unsigned (vector unsigned char x, vector unsigned char y) +{ + return vec_rl (x, y); +} + +/* { dg-final { scan-assembler-times "vslb" 2 } } */ +/* { dg-final { scan-assembler-times "vsrb" 2 } } */ +/* { dg-final { scan-assembler-times "vsrab" 2 } } */ +/* { dg-final { scan-assembler-times "vrlb" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-int.c new file mode 100644 index 00000000000..e9c5fe1ad33 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-int.c @@ -0,0 +1,61 @@ +/* Verify that overloaded built-ins for vec_sl with int + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include <altivec.h> + +vector signed int +testsl_signed (vector signed int x, vector unsigned int y) +{ + return vec_sl (x, y); +} + +vector unsigned int +testsl_unsigned (vector unsigned int x, vector unsigned int y) +{ + return vec_sl (x, y); +} + +vector signed int +testsr_signed (vector signed int x, vector unsigned int y) +{ + return vec_sr (x, y); +} + +vector unsigned int +testsr_unsigned (vector unsigned int x, vector unsigned int y) +{ + return vec_sr (x, y); +} + +vector signed int +testsra_signed (vector signed int x, vector unsigned int y) +{ + return vec_sra (x, y); +} + +vector unsigned int +testsra_unsigned (vector unsigned int x, vector unsigned int y) +{ + return vec_sra (x, y); +} + +vector signed int +testrl_signed (vector signed int x, vector unsigned int y) +{ + return vec_rl (x, y); +} + +vector unsigned int +testrl_unsigned (vector unsigned int x, vector unsigned int y) +{ + return vec_rl (x, y); +} + +/* { dg-final { scan-assembler-times "vslw" 2 } } */ +/* { dg-final { scan-assembler-times "vsrw" 2 } } */ +/* { dg-final { scan-assembler-times "vsraw" 2 } } */ +/* { dg-final { scan-assembler-times "vrlw" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-fwrapv.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-fwrapv.c new file mode 100644 index 00000000000..34264807b89 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-fwrapv.c @@ -0,0 +1,48 @@ +/* Verify that overloaded built-ins for vec_sl produce the right results. */ +/* This test covers the shift left tests with the -fwrapv option. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2 -fwrapv" } */ + +#include <altivec.h> + +vector signed char +testsl_signed_char (vector signed char x, vector unsigned char y) +{ + return vec_sl (x, y); +} + +vector unsigned char +testsl_unsigned_char (vector unsigned char x, vector unsigned char y) +{ + return vec_sl (x, y); +} + +vector signed short +testsl_signed_short (vector signed short x, vector unsigned short y) +{ + return vec_sl (x, y); +} + +vector unsigned short +testsl_unsigned_short (vector unsigned short x, vector unsigned short y) +{ + return vec_sl (x, y); +} + +vector signed int +testsl_signed_int (vector signed int x, vector unsigned int y) +{ + return vec_sl (x, y); +} + +vector unsigned int +testsl_unsigned_int (vector unsigned int x, vector unsigned int y) +{ + return vec_sl (x, y); +} + +/* { dg-final { scan-assembler-times "vslb" 2 } } */ +/* { dg-final { scan-assembler-times "vslh" 2 } } */ +/* { dg-final { scan-assembler-times "vslw" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong-fwrapv.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong-fwrapv.c new file mode 100644 index 00000000000..b7766835ecd --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong-fwrapv.c @@ -0,0 +1,22 @@ +/* Verify that overloaded built-ins for vec_sl produce the right results. */ +/* This test covers the shift left tests with the -fwrapv option. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2 -mpower8-vector -fwrapv" } */ + +#include <altivec.h> + +vector signed long long +testsl_signed_longlong (vector signed long long x, vector unsigned long long y) +{ + return vec_sl (x, y); +} + +vector unsigned long long +testsl_unsigned_longlong (vector unsigned long long x, vector unsigned long long y) +{ + return vec_sl (x, y); +} + +/* { dg-final { scan-assembler-times "vsld" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong.c new file mode 100644 index 00000000000..f040486bf56 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong.c @@ -0,0 +1,22 @@ +/* cross section of shift tests specific for shift-left. + * This is a counterpart to the fold-vec-shift-left-frwapv test. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -mpower8-vector -O2" } */ + +#include <altivec.h> + +vector signed long long +testsl_signed_longlong (vector signed long long x, vector unsigned long long y) +{ + return vec_sl (x, y); +} + +vector unsigned long long +testsl_unsigned_longlong (vector unsigned long long x, vector unsigned long long y) +{ + return vec_sl (x, y); +} + +/* { dg-final { scan-assembler-times "vsld" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left.c new file mode 100644 index 00000000000..36f92b431a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left.c @@ -0,0 +1,48 @@ +/* cross section of shift tests specific for shift-left. + * This is a counterpart to the fold-vec-shift-left-frwapv test. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include <altivec.h> + +vector signed char +testsl_signed_char (vector signed char x, vector unsigned char y) +{ + return vec_sl (x, y); +} + +vector unsigned char +testsl_unsigned_char (vector unsigned char x, vector unsigned char y) +{ + return vec_sl (x, y); +} + +vector signed short +testsl_signed_short (vector signed short x, vector unsigned short y) +{ + return vec_sl (x, y); +} + +vector unsigned short +testsl_unsigned_short (vector unsigned short x, vector unsigned short y) +{ + return vec_sl (x, y); +} + +vector signed int +testsl_signed_int (vector signed int x, vector unsigned int y) +{ + return vec_sl (x, y); +} + +vector unsigned int +testsl_unsigned_int (vector unsigned int x, vector unsigned int y) +{ + return vec_sl (x, y); +} + +/* { dg-final { scan-assembler-times "vslb" 2 } } */ +/* { dg-final { scan-assembler-times "vslh" 2 } } */ +/* { dg-final { scan-assembler-times "vslw" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-longlong.c new file mode 100644 index 00000000000..97b82cf3117 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-longlong.c @@ -0,0 +1,63 @@ +/* Verify that overloaded built-ins for vec_sl with long long + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mpower8-vector -O2" } */ + +#include <altivec.h> + +vector signed long long +testsl_signed (vector signed long long x, vector unsigned long long y) +{ + return vec_sl (x, y); +} + +vector unsigned long long +testsl_unsigned (vector unsigned long long x, vector unsigned long long y) +{ + return vec_sl (x, y); +} + +vector signed long long +testsr_signed (vector signed long long x, vector unsigned long long y) +{ + return vec_sr (x, y); +} + +vector unsigned long long +testsr_unsigned (vector unsigned long long x, vector unsigned long long y) +{ + return vec_sr (x, y); +} + +vector signed long long +testsra_signed (vector signed long long x, vector unsigned long long y) +{ + return vec_sra (x, y); +} + +/* watch for PR 79544 here (vsrd / vsrad issue) */ +vector unsigned long long +testsra_unsigned (vector unsigned long long x, vector unsigned long long y) +{ + return vec_sra (x, y); +} + +vector signed long long +testrl_signed (vector signed long long x, vector unsigned long long y) +{ + return vec_rl (x, y); +} + +vector unsigned long long +testrl_unsigned (vector unsigned long long x, vector unsigned long long y) +{ + return vec_rl (x, y); +} + +/* { dg-final { scan-assembler-times "vsld" 2 } } */ +/* { dg-final { scan-assembler-times "vsrd" 2 } } */ +/* { dg-final { scan-assembler-times "vsrad" 2 } } */ +/* { dg-final { scan-assembler-times "vrld" 2 } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-short.c new file mode 100644 index 00000000000..4ca7c1802a1 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-short.c @@ -0,0 +1,61 @@ +/* Verify that overloaded built-ins for vec_sl with short + inputs produce the right results. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include <altivec.h> + +vector signed short +testsl_signed (vector signed short x, vector unsigned short y) +{ + return vec_sl (x, y); +} + +vector unsigned short +testsl_unsigned (vector unsigned short x, vector unsigned short y) +{ + return vec_sl (x, y); +} + +vector signed short +testsr_signed (vector signed short x, vector unsigned short y) +{ + return vec_sr (x, y); +} + +vector unsigned short +testsr_unsigned (vector unsigned short x, vector unsigned short y) +{ + return vec_sr (x, y); +} + +vector signed short +testsra_signed (vector signed short x, vector unsigned short y) +{ + return vec_sra (x, y); +} + +vector unsigned short +testsra_unsigned (vector unsigned short x, vector unsigned short y) +{ + return vec_sra (x, y); +} + +vector signed short +testrl_signed (vector signed short x, vector unsigned short y) +{ + return vec_rl (x, y); +} + +vector unsigned short +testrl_unsigned (vector unsigned short x, vector unsigned short y) +{ + return vec_rl (x, y); +} + +/* { dg-final { scan-assembler-times "vslh" 2 } } */ +/* { dg-final { scan-assembler-times "vsrh" 2 } } */ +/* { dg-final { scan-assembler-times "vsrah" 2 } } */ +/* { dg-final { scan-assembler-times "vrlh" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fusion.c b/gcc/testsuite/gcc.target/powerpc/fusion.c index ed35006f4d8..83dbddc3116 100644 --- a/gcc/testsuite/gcc.target/powerpc/fusion.c +++ b/gcc/testsuite/gcc.target/powerpc/fusion.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -mtune=power8 -O3" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fusion2.c b/gcc/testsuite/gcc.target/powerpc/fusion2.c index bb74f882ea1..1230e8743aa 100644 --- a/gcc/testsuite/gcc.target/powerpc/fusion2.c +++ b/gcc/testsuite/gcc.target/powerpc/fusion2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*le-*-* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -mtune=power8 -O3" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fusion3.c b/gcc/testsuite/gcc.target/powerpc/fusion3.c index 8eca640d257..bb35ccdec94 100644 --- a/gcc/testsuite/gcc.target/powerpc/fusion3.c +++ b/gcc/testsuite/gcc.target/powerpc/fusion3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -mtune=power9 -O3" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fusion4.c b/gcc/testsuite/gcc.target/powerpc/fusion4.c index 7ee064c1182..2f3ad128813 100644 --- a/gcc/testsuite/gcc.target/powerpc/fusion4.c +++ b/gcc/testsuite/gcc.target/powerpc/fusion4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -mtune=power9 -O3 -msoft-float" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c index 0528b4f4d82..ce0d6433e7f 100644 --- a/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c +++ b/gcc/testsuite/gcc.target/powerpc/htm-builtin-1.c @@ -1,5 +1,5 @@ /* { dg-do assemble { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_htm_ok } */ /* { dg-options "-O2 -mhtm -save-temps" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/htm-tabort-no-r0.c b/gcc/testsuite/gcc.target/powerpc/htm-tabort-no-r0.c index 691e5174695..035e11991ae 100644 --- a/gcc/testsuite/gcc.target/powerpc/htm-tabort-no-r0.c +++ b/gcc/testsuite/gcc.target/powerpc/htm-tabort-no-r0.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_htm_ok } */ /* { dg-options "-O2 -mhtm -ffixed-r3 -ffixed-r4 -ffixed-r5 -ffixed-r6 -ffixed-r7 -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/htm-ttest.c b/gcc/testsuite/gcc.target/powerpc/htm-ttest.c index 29cbd5b90b3..357148c1cac 100644 --- a/gcc/testsuite/gcc.target/powerpc/htm-ttest.c +++ b/gcc/testsuite/gcc.target/powerpc/htm-ttest.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_htm_ok } */ /* { dg-options "-O2 -mhtm" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c b/gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c index 5e92814b77e..3c58c1c058c 100644 --- a/gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c +++ b/gcc/testsuite/gcc.target/powerpc/htm-xl-intrin-1.c @@ -2,7 +2,7 @@ transactional execution with the expected prototypes. */ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_htm_ok } */ /* { dg-options "-O2 -mhtm" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/lhs-1.c b/gcc/testsuite/gcc.target/powerpc/lhs-1.c index 2979711e392..9fefbbf373a 100644 --- a/gcc/testsuite/gcc.target/powerpc/lhs-1.c +++ b/gcc/testsuite/gcc.target/powerpc/lhs-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ /* { dg-options "-O2 -mcpu=power5" } */ /* { dg-final { scan-assembler-times "nop" 3 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/lhs-2.c b/gcc/testsuite/gcc.target/powerpc/lhs-2.c index a6880372a67..871dbab1f80 100644 --- a/gcc/testsuite/gcc.target/powerpc/lhs-2.c +++ b/gcc/testsuite/gcc.target/powerpc/lhs-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ /* { dg-options "-O2 -mcpu=power6 -msched-groups" } */ /* { dg-final { scan-assembler "ori 1,1,0" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/lhs-3.c b/gcc/testsuite/gcc.target/powerpc/lhs-3.c index 9aab4b32c7f..2132b44f117 100644 --- a/gcc/testsuite/gcc.target/powerpc/lhs-3.c +++ b/gcc/testsuite/gcc.target/powerpc/lhs-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ /* { dg-final { scan-assembler "ori 2,2,0" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/loop_align.c b/gcc/testsuite/gcc.target/powerpc/loop_align.c index 43ffd9ba798..670fdc0d8b9 100644 --- a/gcc/testsuite/gcc.target/powerpc/loop_align.c +++ b/gcc/testsuite/gcc.target/powerpc/loop_align.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7 -falign-functions=16" } */ /* { dg-final { scan-assembler ".p2align 5,,31" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/mmfpgpr.c b/gcc/testsuite/gcc.target/powerpc/mmfpgpr.c index cb4af8f5804..de9ff917842 100644 --- a/gcc/testsuite/gcc.target/powerpc/mmfpgpr.c +++ b/gcc/testsuite/gcc.target/powerpc/mmfpgpr.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6x" } } */ /* { dg-options "-O2 -mcpu=power6x -mmfpgpr" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/no-r11-1.c b/gcc/testsuite/gcc.target/powerpc/no-r11-1.c index 94b7988ec76..9b390e3bf2b 100644 --- a/gcc/testsuite/gcc.target/powerpc/no-r11-1.c +++ b/gcc/testsuite/gcc.target/powerpc/no-r11-1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* } } */ +/* { dg-skip-if "" { powerpc_elfv2 } } */ /* { dg-options "-O2 -mno-pointers-to-nested-functions" } */ int diff --git a/gcc/testsuite/gcc.target/powerpc/no-r11-2.c b/gcc/testsuite/gcc.target/powerpc/no-r11-2.c index 214a9dfb49a..dc975591adf 100644 --- a/gcc/testsuite/gcc.target/powerpc/no-r11-2.c +++ b/gcc/testsuite/gcc.target/powerpc/no-r11-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* } } */ +/* { dg-skip-if "" { powerpc_elfv2 } } */ /* { dg-options "-O2 -mpointers-to-nested-functions" } */ int diff --git a/gcc/testsuite/gcc.target/powerpc/no-r11-3.c b/gcc/testsuite/gcc.target/powerpc/no-r11-3.c index a4985a3ad84..d2522347627 100644 --- a/gcc/testsuite/gcc.target/powerpc/no-r11-3.c +++ b/gcc/testsuite/gcc.target/powerpc/no-r11-3.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* } } */ +/* { dg-skip-if "" { powerpc_elfv2 } } */ /* { dg-options "-O2 -mno-pointers-to-nested-functions" } */ extern void ext_call (int (func) (void)); diff --git a/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst.c b/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst.c index d9dc641de77..bbf7d917ea2 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst.c +++ b/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc64le-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c index f230936c784..0773aef924d 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c index 13df1485cba..7e1a251e9f4 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c index 57b75122b56..ff50a9aada6 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3 -ftree-vectorize -fvect-cost-model=dynamic" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c index ae35a6bf0f3..4322c38277b 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3 -ftree-vectorize -fvect-cost-model=dynamic" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c index d9040ab4055..5d9b0ba2e25 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-5.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c index c087c92fb8d..2e4a73f7082 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-6.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c index d2c868c0692..c7f01c81509 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-builtin-7.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-fp.c b/gcc/testsuite/gcc.target/powerpc/p8vector-fp.c index 052427473e7..17b73bbc7b3 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-fp.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-fp.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -mupper-regs-df -mupper-regs-sf -fno-math-errno" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c b/gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c index 5ba772f5301..23663b96da6 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-int128-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3 -mvsx-timode -mlra" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c b/gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c index 39cbf387481..5a5f25c49f6 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-int128-2.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c b/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c index de3f1b4ebbf..58e1f4485be 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-ldst.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -mupper-regs-df -mupper-regs-sf" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c b/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c index 231bd5458d4..b53ccc51c03 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-vbpermq.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O3 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c b/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c index 457422c2003..f7599dc3ec9 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c b/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c index 741d92b09fa..80ee3aa7ab5 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model=dynamic" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c b/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c index e0fe4c4d74f..7917e14658b 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model=dynamic" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c b/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c index 0603c52e5aa..8ad8e0d6a36 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c b/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c index a4aee27840e..ec4e55424d0 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c +++ b/gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-5.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/p9-vparity.c b/gcc/testsuite/gcc.target/powerpc/p9-vparity.c index e4c20870717..af5b5905a6f 100644 --- a/gcc/testsuite/gcc.target/powerpc/p9-vparity.c +++ b/gcc/testsuite/gcc.target/powerpc/p9-vparity.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O2 -mlra -mvsx-timode" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pack01.c b/gcc/testsuite/gcc.target/powerpc/pack01.c index d0d9a7e9e80..85b40f24972 100644 --- a/gcc/testsuite/gcc.target/powerpc/pack01.c +++ b/gcc/testsuite/gcc.target/powerpc/pack01.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pack02.c b/gcc/testsuite/gcc.target/powerpc/pack02.c index f85d3ff00b0..ee639258c5e 100644 --- a/gcc/testsuite/gcc.target/powerpc/pack02.c +++ b/gcc/testsuite/gcc.target/powerpc/pack02.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target powerpc_fprs } */ /* { dg-require-effective-target longdouble128 } */ /* { dg-options "-O2 -mhard-float" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pack03.c b/gcc/testsuite/gcc.target/powerpc/pack03.c index dfaf2efa07e..f6e994388c0 100644 --- a/gcc/testsuite/gcc.target/powerpc/pack03.c +++ b/gcc/testsuite/gcc.target/powerpc/pack03.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target dfp_hw } */ /* { dg-options "-O2 -mhard-dfp" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/parity-1.c b/gcc/testsuite/gcc.target/powerpc/parity-1.c index 36050557812..b0a08eecac8 100644 --- a/gcc/testsuite/gcc.target/powerpc/parity-1.c +++ b/gcc/testsuite/gcc.target/powerpc/parity-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ilp32 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ /* { dg-options "-O2 -mcpu=power5" } */ /* { dg-final { scan-assembler "popcntb" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/popcount-1.c b/gcc/testsuite/gcc.target/powerpc/popcount-1.c index dfad50aa1b1..b8544c26ae7 100644 --- a/gcc/testsuite/gcc.target/powerpc/popcount-1.c +++ b/gcc/testsuite/gcc.target/powerpc/popcount-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ilp32 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ /* { dg-options "-O2 -mcpu=power5" } */ /* { dg-final { scan-assembler "popcntb" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/popcount-2.c b/gcc/testsuite/gcc.target/powerpc/popcount-2.c index e1c0f5a2d7a..8ecd8f9b20b 100644 --- a/gcc/testsuite/gcc.target/powerpc/popcount-2.c +++ b/gcc/testsuite/gcc.target/powerpc/popcount-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ilp32 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ /* { dg-final { scan-assembler "popcntw" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/popcount-3.c b/gcc/testsuite/gcc.target/powerpc/popcount-3.c index fec9c7e4d02..00d9d1560e5 100644 --- a/gcc/testsuite/gcc.target/powerpc/popcount-3.c +++ b/gcc/testsuite/gcc.target/powerpc/popcount-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ /* { dg-final { scan-assembler "popcntd" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fma-1.c b/gcc/testsuite/gcc.target/powerpc/ppc-fma-1.c index 2ea79b38bb9..98cfe250fa5 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fma-1.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fma-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -ftree-vectorize -mcpu=power7 -ffast-math" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fma-2.c b/gcc/testsuite/gcc.target/powerpc/ppc-fma-2.c index f55363087b3..b08f33b6554 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fma-2.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fma-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -ftree-vectorize -mcpu=power7 -ffast-math -ffp-contract=off" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fma-3.c b/gcc/testsuite/gcc.target/powerpc/ppc-fma-3.c index 49b5574cce1..5fbbe8dbceb 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fma-3.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fma-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-require-effective-target powerpc_fprs } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fma-4.c b/gcc/testsuite/gcc.target/powerpc/ppc-fma-4.c index 01761d312a9..8372c36ae0d 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fma-4.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fma-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-require-effective-target powerpc_fprs } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fma-5.c b/gcc/testsuite/gcc.target/powerpc/ppc-fma-5.c index 86710b709d6..b287f143d15 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fma-5.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fma-5.c @@ -1,5 +1,5 @@ /* { dg-do run { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_fprs } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ /* { dg-options "-O2 -mcpu=power5 -std=c99" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fma-6.c b/gcc/testsuite/gcc.target/powerpc/ppc-fma-6.c index 3d36237bdb4..0436a8de86b 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fma-6.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fma-6.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target ilp32 } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ /* { dg-options "-O2 -mcpu=power5 -std=c99 -msoft-float" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fma-7.c b/gcc/testsuite/gcc.target/powerpc/ppc-fma-7.c index b85b9c1585d..57c4b734eb5 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fma-7.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fma-7.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ /* { dg-require-effective-target powerpc_fprs } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-1.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-1.c index ea20f60e1a9..2efa952a239 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-1.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7 -ffast-math -mno-upper-regs-df" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-10.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-10.c index 11628c91840..9e192d13398 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-10.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-10.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7 -ffast-math -mno-upper-regs-df" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-11.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-11.c index 2cdbd6a0eac..22d9af93bab 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-11.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-11.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_fprs } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5+" } } */ /* { dg-options "-O2 -mcpu=power5+ -ffast-math" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c index 572dec628d6..02ab12af1a3 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ /* { dg-options "-O2 -mcpu=power6 -ffast-math" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-3.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-3.c index 984d3f3f07c..a7bc3e1ff9d 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-3.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target powerpc_fprs } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c index 562e672b4f3..dd5fd7572ec 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target ilp32 } */ /* { dg-skip-if "" { powerpc*-*-* } { "-mpowerpc64" } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=750" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-5.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-5.c index c44eb08231c..b59cac3a5bb 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-5.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-5.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7 -ffast-math -mno-upper-regs-df" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c index 5282a5a4293..a292ba1aaca 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-6.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ /* { dg-options "-O3 -mcpu=power6 -ffast-math" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-7.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-7.c index fa0b50edb30..4b0dda815e8 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-7.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-7.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target ilp32 } */ /* { dg-require-effective-target powerpc_fprs } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-8.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-8.c index 0daf57332c1..085484409e4 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-8.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-8.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target ilp32 } */ /* { dg-skip-if "" { powerpc*-*-* } { "-mpowerpc64" } } */ /* { dg-require-effective-target powerpc_fprs } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-9.c b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-9.c index 62ead0a9e4f..372b2334686 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-9.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-fpconv-9.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7 -ffast-math -mno-upper-regs-df" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-pow.c b/gcc/testsuite/gcc.target/powerpc/ppc-pow.c index df8930d26fb..3636679fedc 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-pow.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-pow.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* Check for VSX here, even though we don't use VSX to eliminate SPE, PAIRED and other ppc floating point varients. However, we need to also eliminate Darwin, since it doesn't like -mcpu=power6. */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-round.c b/gcc/testsuite/gcc.target/powerpc/ppc-round.c index 4fc1679622d..0cfa0da2a72 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-round.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-round.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7 -mno-upper-regs-df" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-round2.c b/gcc/testsuite/gcc.target/powerpc/ppc-round2.c index 2b14fb402a3..938d545602c 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-round2.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-round2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-round3.c b/gcc/testsuite/gcc.target/powerpc/ppc-round3.c index 33954d7bb46..9ab38701643 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-round3.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-round3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power9" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-spe.c b/gcc/testsuite/gcc.target/powerpc/ppc-spe.c index 5880e046c04..753a59efebe 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-spe.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-spe.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single -O0" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ /* (Test with -O0 so we don't optimize any of them away). */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c b/gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c index ac1dac9faa9..eb379a0f67d 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-switch-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-options "-O2 --param case-values-threshold=2" } */ /* { dg-final { scan-assembler "mtctr" } } */ /* { dg-final { scan-assembler "bctr" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-switch-2.c b/gcc/testsuite/gcc.target/powerpc/ppc-switch-2.c index 4f2efccfbd7..fad7dc4e54d 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-switch-2.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-switch-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-options "-O2 --param case-values-threshold=20" } */ /* { dg-final { scan-assembler-not "mtctr" } } */ /* { dg-final { scan-assembler-not "bctr" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c index 07c85bbfcaf..2168830c9ee 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ /* { dg-options "-O2 -ffast-math -mcpu=power5 -mabi=altivec" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c index 8f8183b87ac..59d4e2db2ac 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ /* { dg-options "-O2 -ffast-math -mcpu=power5 -mabi=altivec" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c index d156acc8246..aecfabaec01 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ /* { dg-options "-O2 -ffast-math -mcpu=power5 -mabi=no-altivec" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c b/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c index 08e189de49e..5bdc56a3810 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */ /* { dg-options "-O2 -ffast-math -mcpu=power5 -mno-altivec -mabi=altivec -fno-unroll-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c b/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c index b70003d23a3..921c46862e2 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc64-abi-1.c @@ -1,5 +1,5 @@ /* { dg-do run { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { *-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { *-*-darwin* } } */ /* { dg-options "-O2" } */ typedef __builtin_va_list va_list; diff --git a/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c b/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c index 4e91b1bba26..d53db11a6d9 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc64-abi-dfp-1.c @@ -1,5 +1,5 @@ /* { dg-do run { target { powerpc64-*-* && { lp64 && dfprt } } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-options "-std=gnu99 -O2 -fno-strict-aliasing" } */ /* Testcase to check for ABI compliance of parameter passing diff --git a/gcc/testsuite/gcc.target/powerpc/ppc64-double-1.c b/gcc/testsuite/gcc.target/powerpc/ppc64-double-1.c index f9d4dda9cdf..e15a399866b 100644 --- a/gcc/testsuite/gcc.target/powerpc/ppc64-double-1.c +++ b/gcc/testsuite/gcc.target/powerpc/ppc64-double-1.c @@ -1,5 +1,5 @@ // { dg-do compile } -/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ // { dg-options "-O2 -mpowerpc64" } // { dg-final { scan-assembler-not "stfd" } } diff --git a/gcc/testsuite/gcc.target/powerpc/pr42747.c b/gcc/testsuite/gcc.target/powerpc/pr42747.c index f8c1e086a4f..da053ee3acb 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr42747.c +++ b/gcc/testsuite/gcc.target/powerpc/pr42747.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7 -ffast-math" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr43154.c b/gcc/testsuite/gcc.target/powerpc/pr43154.c index d330c95696d..eb81669ab3e 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr43154.c +++ b/gcc/testsuite/gcc.target/powerpc/pr43154.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*le-*-* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr47251.c b/gcc/testsuite/gcc.target/powerpc/pr47251.c index 9dee8ba27f6..0347fd45028 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr47251.c +++ b/gcc/testsuite/gcc.target/powerpc/pr47251.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -msoft-float -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr47755-2.c b/gcc/testsuite/gcc.target/powerpc/pr47755-2.c index 3d6d4c952d5..a3e2a2e1382 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr47755-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr47755-2.c @@ -1,5 +1,5 @@ /* { dg-do run { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr47755.c b/gcc/testsuite/gcc.target/powerpc/pr47755.c index d5feecac691..7de395afd16 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr47755.c +++ b/gcc/testsuite/gcc.target/powerpc/pr47755.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr47862.c b/gcc/testsuite/gcc.target/powerpc/pr47862.c index cc41fbc92ca..4d175224ba5 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr47862.c +++ b/gcc/testsuite/gcc.target/powerpc/pr47862.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr48053-3.c b/gcc/testsuite/gcc.target/powerpc/pr48053-3.c index fb5dae40338..a45357019b6 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr48053-3.c +++ b/gcc/testsuite/gcc.target/powerpc/pr48053-3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr48192.c b/gcc/testsuite/gcc.target/powerpc/pr48192.c index 44f78397384..a0ea3aec46a 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr48192.c +++ b/gcc/testsuite/gcc.target/powerpc/pr48192.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7 -std=gnu89" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr48226.c b/gcc/testsuite/gcc.target/powerpc/pr48226.c index dca811c6400..edd71c61910 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr48226.c +++ b/gcc/testsuite/gcc.target/powerpc/pr48226.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr48258-1.c b/gcc/testsuite/gcc.target/powerpc/pr48258-1.c index 24a3c7e5370..79b91b0cc79 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr48258-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr48258-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*le-*-* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*le-*-* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7 -mabi=altivec -ffast-math -fno-unroll-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr48258-2.c b/gcc/testsuite/gcc.target/powerpc/pr48258-2.c index 4d461882e02..ede94e8fed4 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr48258-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr48258-2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7 -mabi=altivec -ffast-math" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr48857.c b/gcc/testsuite/gcc.target/powerpc/pr48857.c index 81f157f07c2..25f14b71331 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr48857.c +++ b/gcc/testsuite/gcc.target/powerpc/pr48857.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7 -mabi=altivec" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr52199.c b/gcc/testsuite/gcc.target/powerpc/pr52199.c index febccc8e166..af0799e66a2 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr52199.c +++ b/gcc/testsuite/gcc.target/powerpc/pr52199.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7 -fmerge-all-constants" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr52457.c b/gcc/testsuite/gcc.target/powerpc/pr52457.c index 14181c25e7d..8a3e53d9c58 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr52457.c +++ b/gcc/testsuite/gcc.target/powerpc/pr52457.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O1 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr52775.c b/gcc/testsuite/gcc.target/powerpc/pr52775.c index 7f6b2af2db9..48042bafc58 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr52775.c +++ b/gcc/testsuite/gcc.target/powerpc/pr52775.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power4" } } */ /* { dg-options "-O1 -mcpu=power4" } */ /* { dg-final { scan-assembler-times "fcfid" 2 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr53199.c b/gcc/testsuite/gcc.target/powerpc/pr53199.c index eede1dcb4f3..5ed94c2e077 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr53199.c +++ b/gcc/testsuite/gcc.target/powerpc/pr53199.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ /* { dg-options "-O2 -mcpu=power6 -mavoid-indexed-addresses" } */ /* { dg-final { scan-assembler-times "lwbrx" 12 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr53487.c b/gcc/testsuite/gcc.target/powerpc/pr53487.c index cd60238fff2..706a975ab24 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr53487.c +++ b/gcc/testsuite/gcc.target/powerpc/pr53487.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7 -misel -ffast-math" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr57150.c b/gcc/testsuite/gcc.target/powerpc/pr57150.c index 004822d0222..7b09be0ada0 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr57150.c +++ b/gcc/testsuite/gcc.target/powerpc/pr57150.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7 -fcaller-saves" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr57744.c b/gcc/testsuite/gcc.target/powerpc/pr57744.c index e53e8d362bc..0a5247e8a99 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr57744.c +++ b/gcc/testsuite/gcc.target/powerpc/pr57744.c @@ -1,5 +1,5 @@ /* { dg-do run { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr57949-1.c b/gcc/testsuite/gcc.target/powerpc/pr57949-1.c index 6c8311ec6d4..20494423cb7 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr57949-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr57949-1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc_elfv2 } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr57949-2.c b/gcc/testsuite/gcc.target/powerpc/pr57949-2.c index edbbf2a4156..99be7720516 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr57949-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr57949-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc_elfv2 } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc_elfv2 } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7 -mcompat-align-parm" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr58673-1.c b/gcc/testsuite/gcc.target/powerpc/pr58673-1.c index 01d53fa49ca..6d1ac36bcb5 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr58673-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr58673-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O1" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr58673-2.c b/gcc/testsuite/gcc.target/powerpc/pr58673-2.c index c9190942632..108fff5fd37 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr58673-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr58673-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3 -funroll-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr59054.c b/gcc/testsuite/gcc.target/powerpc/pr59054.c index c33d937dfef..e98354b2102 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr59054.c +++ b/gcc/testsuite/gcc.target/powerpc/pr59054.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O0" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr60102.c b/gcc/testsuite/gcc.target/powerpc/pr60102.c index 59c0635a2f9..c0c4b809f36 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr60102.c +++ b/gcc/testsuite/gcc.target/powerpc/pr60102.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mcpu=8548 -mspe -mabi=spe -g -mfloat-gprs=double" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ double pr60102 (double x, int m) diff --git a/gcc/testsuite/gcc.target/powerpc/pr60137.c b/gcc/testsuite/gcc.target/powerpc/pr60137.c index 4c6cd91619a..41a4fb212d1 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr60137.c +++ b/gcc/testsuite/gcc.target/powerpc/pr60137.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3 -mno-vsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr60158.c b/gcc/testsuite/gcc.target/powerpc/pr60158.c index e832397ddc2..dc9fbdd0cf2 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr60158.c +++ b/gcc/testsuite/gcc.target/powerpc/pr60158.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ /* { dg-options "-mcpu=8548 -mno-spe -mfloat-gprs=double -Os -fdata-sections -fpic -mrelocatable" } */ #define NULL 0 diff --git a/gcc/testsuite/gcc.target/powerpc/pr60203.c b/gcc/testsuite/gcc.target/powerpc/pr60203.c index 3a1f56ddc3b..d2efa590a91 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr60203.c +++ b/gcc/testsuite/gcc.target/powerpc/pr60203.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr60676.c b/gcc/testsuite/gcc.target/powerpc/pr60676.c index 0ac93955f75..28fec8f5680 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr60676.c +++ b/gcc/testsuite/gcc.target/powerpc/pr60676.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr60735.c b/gcc/testsuite/gcc.target/powerpc/pr60735.c index 9bac30b51d9..70d61253574 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr60735.c +++ b/gcc/testsuite/gcc.target/powerpc/pr60735.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mcpu=8548 -mspe -mabi=spe -O2" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ /* In PR60735, the type _Decimal64 generated an insn not found message. */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr64019.c b/gcc/testsuite/gcc.target/powerpc/pr64019.c index a39b2191798..d90c4800a1e 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr64019.c +++ b/gcc/testsuite/gcc.target/powerpc/pr64019.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -ffast-math -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr64205.c b/gcc/testsuite/gcc.target/powerpc/pr64205.c index f421ec203a0..7fa987e6f55 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr64205.c +++ b/gcc/testsuite/gcc.target/powerpc/pr64205.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ -/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=G5" } } */ /* { dg-options "-O2 -mcpu=G5 -maltivec" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr64505.c b/gcc/testsuite/gcc.target/powerpc/pr64505.c index 319cc083ac0..8601f2d7e9f 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr64505.c +++ b/gcc/testsuite/gcc.target/powerpc/pr64505.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ -/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-options "-O2 -mpowerpc64" } */ /* diff --git a/gcc/testsuite/gcc.target/powerpc/pr65849-1.c b/gcc/testsuite/gcc.target/powerpc/pr65849-1.c index 14b6e381427..288fdeed2ca 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr65849-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr65849-1.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2 -mno-upper-regs-df" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr65849-2.c b/gcc/testsuite/gcc.target/powerpc/pr65849-2.c index 83f8b8e52a2..0af6a4a51c7 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr65849-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr65849-2.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -mno-upper-regs-sf" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr67789.c b/gcc/testsuite/gcc.target/powerpc/pr67789.c index 91fd1a18f3c..371d7a3d8ed 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr67789.c +++ b/gcc/testsuite/gcc.target/powerpc/pr67789.c @@ -1,6 +1,6 @@ /* { dg-do assemble } */ /* { dg-options "-O2 -msecure-plt -fPIC" } */ -/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } } */ #define FE_TONEAREST 0 #define FE_UPWARD 1 diff --git a/gcc/testsuite/gcc.target/powerpc/pr67808.c b/gcc/testsuite/gcc.target/powerpc/pr67808.c index fdf40df4607..16b309c151e 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr67808.c +++ b/gcc/testsuite/gcc.target/powerpc/pr67808.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O1 -mvsx -mlra -mcpu=power7 -mlong-double-128" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr68163.c b/gcc/testsuite/gcc.target/powerpc/pr68163.c index 3953c8c8d48..f9840374b1d 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr68163.c +++ b/gcc/testsuite/gcc.target/powerpc/pr68163.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr69548.c b/gcc/testsuite/gcc.target/powerpc/pr69548.c index 439f588b874..69492bf8bfd 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr69548.c +++ b/gcc/testsuite/gcc.target/powerpc/pr69548.c @@ -1,5 +1,5 @@ /* { dg-do assemble { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -Os -mbig" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr70963.c b/gcc/testsuite/gcc.target/powerpc/pr70963.c index 128ebd9f09f..3e64e0ec28f 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr70963.c +++ b/gcc/testsuite/gcc.target/powerpc/pr70963.c @@ -1,6 +1,6 @@ /* { dg-do run { target powerpc64*-*-* } } */ /* { dg-require-effective-target p8vector_hw } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr71977-1.c b/gcc/testsuite/gcc.target/powerpc/pr71977-1.c index c4413b8747a..1cb2ec3b71b 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr71977-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr71977-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr71977-2.c b/gcc/testsuite/gcc.target/powerpc/pr71977-2.c index 8ec1b6126ad..2824debdceb 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr71977-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr71977-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr72717.c b/gcc/testsuite/gcc.target/powerpc/pr72717.c index 1446098ba20..92180c133da 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr72717.c +++ b/gcc/testsuite/gcc.target/powerpc/pr72717.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr72853.c b/gcc/testsuite/gcc.target/powerpc/pr72853.c index 8eae7d4a41d..8a086087088 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr72853.c +++ b/gcc/testsuite/gcc.target/powerpc/pr72853.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O3 -mupper-regs-df -mupper-regs-sf -funroll-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr77289.c b/gcc/testsuite/gcc.target/powerpc/pr77289.c index f8ebf1f9309..295aa27acdc 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr77289.c +++ b/gcc/testsuite/gcc.target/powerpc/pr77289.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7 -funroll-loops -ffast-math -mlra -mupdate -fno-auto-inc-dec" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr77416.c b/gcc/testsuite/gcc.target/powerpc/pr77416.c index cb7bcc94aef..39a10deca7d 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr77416.c +++ b/gcc/testsuite/gcc.target/powerpc/pr77416.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { { powerpc*-*-* } && ilp32 } } } */ -/* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-aix* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2" } */ /* { dg-final { scan-assembler-times "addze" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr78604.c b/gcc/testsuite/gcc.target/powerpc/pr78604.c index 23315199b04..23d25c0b079 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr78604.c +++ b/gcc/testsuite/gcc.target/powerpc/pr78604.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fdump-tree-vect-details" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr79799-1.c b/gcc/testsuite/gcc.target/powerpc/pr79799-1.c new file mode 100644 index 00000000000..87a9e49b889 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr79799-1.c @@ -0,0 +1,43 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mcpu=power9 -O2" } */ + +#include <altivec.h> + +/* GCC 7.1 did not have a specialized method for inserting 32-bit floating + point on ISA 3.0 (power9) systems. */ + +vector float +insert_arg_0 (vector float vf, float f) +{ + return vec_insert (f, vf, 0); +} + +vector float +insert_arg_1 (vector float vf, float f) +{ + return vec_insert (f, vf, 1); +} + +vector float +insert_arg_2 (vector float vf, float f) +{ + return vec_insert (f, vf, 2); +} + +vector float +insert_arg_3 (vector float vf, float f) +{ + return vec_insert (f, vf, 3); +} + +/* { dg-final { scan-assembler {\mxscvdpspn\M} } } */ +/* { dg-final { scan-assembler {\mxxinsertw\M} } } */ +/* { dg-final { scan-assembler-not {\mlvewx\M} } } */ +/* { dg-final { scan-assembler-not {\mlvx\M} } } */ +/* { dg-final { scan-assembler-not {\mvperm\M} } } */ +/* { dg-final { scan-assembler-not {\mvpermr\M} } } */ +/* { dg-final { scan-assembler-not {\mstfs\M} } } */ +/* { dg-final { scan-assembler-not {\mstxssp\M} } } */ +/* { dg-final { scan-assembler-not {\mstxsspx\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr79799-2.c b/gcc/testsuite/gcc.target/powerpc/pr79799-2.c new file mode 100644 index 00000000000..793e3b9b66c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr79799-2.c @@ -0,0 +1,31 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mcpu=power9 -O2" } */ + +#include <altivec.h> + +/* Optimize x = vec_insert (vec_extract (v2, N), v1, M) for SFmode if N is the default + scalar position. */ + +#if __ORDER_LITTLE_ENDIAN__ +#define ELE 2 +#else +#define ELE 1 +#endif + +vector float +foo (vector float v1, vector float v2) +{ + return vec_insert (vec_extract (v2, ELE), v1, 0); +} + +/* { dg-final { scan-assembler {\mxxinsertw\M} } } */ +/* { dg-final { scan-assembler-not {\mxxextractuw\M} } } */ +/* { dg-final { scan-assembler-not {\mlvewx\M} } } */ +/* { dg-final { scan-assembler-not {\mlvx\M} } } */ +/* { dg-final { scan-assembler-not {\mvperm\M} } } */ +/* { dg-final { scan-assembler-not {\mvpermr\M} } } */ +/* { dg-final { scan-assembler-not {\mstfs\M} } } */ +/* { dg-final { scan-assembler-not {\mstxssp\M} } } */ +/* { dg-final { scan-assembler-not {\mstxsspx\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr79799-3.c b/gcc/testsuite/gcc.target/powerpc/pr79799-3.c new file mode 100644 index 00000000000..72550421859 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr79799-3.c @@ -0,0 +1,24 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mcpu=power9 -O2" } */ + +#include <altivec.h> + +/* Optimize x = vec_insert (vec_extract (v2, N), v1, M) for SFmode. */ + +vector float +foo (vector float v1, vector float v2) +{ + return vec_insert (vec_extract (v2, 4), v1, 0); +} + +/* { dg-final { scan-assembler {\mxxinsertw\M} } } */ +/* { dg-final { scan-assembler {\mxxextractuw\M} } } */ +/* { dg-final { scan-assembler-not {\mlvewx\M} } } */ +/* { dg-final { scan-assembler-not {\mlvx\M} } } */ +/* { dg-final { scan-assembler-not {\mvperm\M} } } */ +/* { dg-final { scan-assembler-not {\mvpermr\M} } } */ +/* { dg-final { scan-assembler-not {\mstfs\M} } } */ +/* { dg-final { scan-assembler-not {\mstxssp\M} } } */ +/* { dg-final { scan-assembler-not {\mstxsspx\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr79799-4.c b/gcc/testsuite/gcc.target/powerpc/pr79799-4.c new file mode 100644 index 00000000000..056a005be25 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr79799-4.c @@ -0,0 +1,105 @@ +/* { dg-do run { target { powerpc*-*-linux* } } } */ +/* { dg-require-effective-target vsx_hw } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target p9vector_hw } */ +/* { dg-options "-mcpu=power9 -O2" } */ + +#include <altivec.h> +#include <stdlib.h> + +__attribute__ ((__noinline__)) +vector float +insert_0 (vector float v, float f) +{ + return vec_insert (f, v, 0); +} + +__attribute__ ((__noinline__)) +vector float +insert_1 (vector float v, float f) +{ + return vec_insert (f, v, 1); +} + +__attribute__ ((__noinline__)) +vector float +insert_2 (vector float v, float f) +{ + return vec_insert (f, v, 2); +} + +__attribute__ ((__noinline__)) +vector float +insert_3 (vector float v, float f) +{ + return vec_insert (f, v, 3); +} + +__attribute__ ((__noinline__)) +void +test_insert (void) +{ + vector float v1 = { 1.0f, 2.0f, 3.0f, 4.0f }; + vector float v2 = { 5.0f, 6.0f, 7.0f, 8.0f }; + + v1 = insert_0 (v1, 5.0f); + v1 = insert_1 (v1, 6.0f); + v1 = insert_2 (v1, 7.0f); + v1 = insert_3 (v1, 8.0f); + + if (vec_any_ne (v1, v2)) + abort (); +} + +__attribute__ ((__noinline__)) +vector float +insert_extract_0_3 (vector float v1, vector float v2) +{ + return vec_insert (vec_extract (v2, 3), v1, 0); +} + +__attribute__ ((__noinline__)) +vector float +insert_extract_1_2 (vector float v1, vector float v2) +{ + return vec_insert (vec_extract (v2, 2), v1, 1); +} + +__attribute__ ((__noinline__)) +vector float +insert_extract_2_1 (vector float v1, vector float v2) +{ + return vec_insert (vec_extract (v2, 1), v1, 2); +} + +__attribute__ ((__noinline__)) +vector float +insert_extract_3_0 (vector float v1, vector float v2) +{ + return vec_insert (vec_extract (v2, 0), v1, 3); +} + +__attribute__ ((__noinline__)) +void +test_insert_extract (void) +{ + vector float v1 = { 1.0f, 2.0f, 3.0f, 4.0f }; + vector float v2 = { 5.0f, 6.0f, 7.0f, 8.0f }; + vector float v3 = { 8.0f, 7.0f, 6.0f, 5.0f }; + + v1 = insert_extract_0_3 (v1, v2); + v1 = insert_extract_1_2 (v1, v2); + v1 = insert_extract_2_1 (v1, v2); + v1 = insert_extract_3_0 (v1, v2); + + if (vec_any_ne (v1, v3)) + abort (); +} + +int +main (void) +{ + test_insert (); + test_insert_extract (); + return 0; +} diff --git a/gcc/testsuite/gcc.target/powerpc/pr79799-5.c b/gcc/testsuite/gcc.target/powerpc/pr79799-5.c new file mode 100644 index 00000000000..fcd92ffd60a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr79799-5.c @@ -0,0 +1,25 @@ +/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-options "-mcpu=power9 -O2" } */ + +#include <altivec.h> + +/* Insure setting 0.0f to a V4SFmode element does not do a FP conversion. */ + +vector float +insert_arg_0 (vector float vf) +{ + return vec_insert (0.0f, vf, 0); +} + +/* { dg-final { scan-assembler {\mxxinsertw\M} } } */ +/* { dg-final { scan-assembler-not {\mlvewx\M} } } */ +/* { dg-final { scan-assembler-not {\mlvx\M} } } */ +/* { dg-final { scan-assembler-not {\mvperm\M} } } */ +/* { dg-final { scan-assembler-not {\mvpermr\M} } } */ +/* { dg-final { scan-assembler-not {\mstfs\M} } } */ +/* { dg-final { scan-assembler-not {\mstxssp\M} } } */ +/* { dg-final { scan-assembler-not {\mstxsspx\M} } } */ +/* { dg-final { scan-assembler-not {\mxscvdpspn\M} } } */ +/* { dg-final { scan-assembler-not {\mxxextractuw\M} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr80510-1.c b/gcc/testsuite/gcc.target/powerpc/pr80510-1.c index 8bff3ce15c3..deb51ac9916 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr80510-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr80510-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2" } */ @@ -21,7 +21,7 @@ #endif #ifndef ITYPE -#define ITYPE long +#define ITYPE __INT64_TYPE__ #endif #ifdef DO_CALL diff --git a/gcc/testsuite/gcc.target/powerpc/pr80510-2.c b/gcc/testsuite/gcc.target/powerpc/pr80510-2.c index 2f7107b8782..b4d2491551b 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr80510-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr80510-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2" } */ @@ -21,7 +21,7 @@ #endif #ifndef ITYPE -#define ITYPE long +#define ITYPE __INT64_TYPE__ #endif #ifdef DO_CALL diff --git a/gcc/testsuite/gcc.target/powerpc/pr80718.c b/gcc/testsuite/gcc.target/powerpc/pr80718.c index 9ac5b1b684f..b001e2f63f9 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr80718.c +++ b/gcc/testsuite/gcc.target/powerpc/pr80718.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O3 -ffast-math" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/quad-atomic.c b/gcc/testsuite/gcc.target/powerpc/quad-atomic.c index dc0e3a87aaf..e5824c2a92f 100644 --- a/gcc/testsuite/gcc.target/powerpc/quad-atomic.c +++ b/gcc/testsuite/gcc.target/powerpc/quad-atomic.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target p8vector_hw } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -Wno-shift-overflow" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/recip-5.c b/gcc/testsuite/gcc.target/powerpc/recip-5.c index d5dcaf0e0fe..664484ff48d 100644 --- a/gcc/testsuite/gcc.target/powerpc/recip-5.c +++ b/gcc/testsuite/gcc.target/powerpc/recip-5.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -ftree-vectorize -mrecip=all -ffast-math -mcpu=power7 -fno-unroll-loops" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/recip-6.c b/gcc/testsuite/gcc.target/powerpc/recip-6.c index fbee0c9d386..26aa2d4acb5 100644 --- a/gcc/testsuite/gcc.target/powerpc/recip-6.c +++ b/gcc/testsuite/gcc.target/powerpc/recip-6.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* powerpc*-ibm-aix* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target vsx_hw } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O3 -ftree-vectorize -ffast-math -mrecip=all -mrecip-precision" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/recip-7.c b/gcc/testsuite/gcc.target/powerpc/recip-7.c index 3d84bedc75a..8841e9e11e8 100644 --- a/gcc/testsuite/gcc.target/powerpc/recip-7.c +++ b/gcc/testsuite/gcc.target/powerpc/recip-7.c @@ -1,6 +1,6 @@ /* { dg-do run { target { powerpc*-*-linux* powerpc*-ibm-aix* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ +/* { dg-skip-if "" { powerpc*-*-*spe* } } */ /* { dg-require-effective-target ppc_recip_hw } */ /* { dg-options "-O3 -ftree-vectorize -ffast-math -mrecip -mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/sd-pwr6.c b/gcc/testsuite/gcc.target/powerpc/sd-pwr6.c index 74b4141d86b..d7d5a67a90a 100644 --- a/gcc/testsuite/gcc.target/powerpc/sd-pwr6.c +++ b/gcc/testsuite/gcc.target/powerpc/sd-pwr6.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-require-effective-target dfp } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/sd-vsx.c b/gcc/testsuite/gcc.target/powerpc/sd-vsx.c index 87ed77bb32a..3494ef14014 100644 --- a/gcc/testsuite/gcc.target/powerpc/sd-vsx.c +++ b/gcc/testsuite/gcc.target/powerpc/sd-vsx.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-require-effective-target dfp } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c b/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c index 09f8134829c..b492aee4f4f 100644 --- a/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c +++ b/gcc/testsuite/gcc.target/powerpc/spe-vector-memcpy.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O -mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ /* { dg-final { scan-assembler "evstdd" } } */ void foo(void) diff --git a/gcc/testsuite/gcc.target/powerpc/spe1.c b/gcc/testsuite/gcc.target/powerpc/spe1.c index ddbb5a6e1c9..f2b093ca8e8 100644 --- a/gcc/testsuite/gcc.target/powerpc/spe1.c +++ b/gcc/testsuite/gcc.target/powerpc/spe1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mcpu=8540 -mspe -mabi=spe -mfloat-gprs=single -O0" } */ -/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */ +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */ /* (Test with -O0 so we don't optimize any of them away). */ diff --git a/gcc/testsuite/gcc.target/powerpc/tfmode_off.c b/gcc/testsuite/gcc.target/powerpc/tfmode_off.c index f1c2d1e2f69..cbb3d75b8e1 100644 --- a/gcc/testsuite/gcc.target/powerpc/tfmode_off.c +++ b/gcc/testsuite/gcc.target/powerpc/tfmode_off.c @@ -1,6 +1,6 @@ /* { dg-do assemble } */ -/* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ -/* { dg-skip-if "no TFmode" { powerpc-*-eabi* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc-ibm-aix* } } */ +/* { dg-skip-if "no TFmode" { powerpc-*-eabi* } } */ /* { dg-require-effective-target longdouble128 } */ /* { dg-options "-O2 -fno-align-functions -mtraceback=no -save-temps" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/upper-regs-df.c b/gcc/testsuite/gcc.target/powerpc/upper-regs-df.c index e3a284ca0da..17f01bfbfca 100644 --- a/gcc/testsuite/gcc.target/powerpc/upper-regs-df.c +++ b/gcc/testsuite/gcc.target/powerpc/upper-regs-df.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power7 -O2 -mupper-regs-df" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/upper-regs-sf.c b/gcc/testsuite/gcc.target/powerpc/upper-regs-sf.c index 401b5c16ffa..8c246796805 100644 --- a/gcc/testsuite/gcc.target/powerpc/upper-regs-sf.c +++ b/gcc/testsuite/gcc.target/powerpc/upper-regs-sf.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -mupper-regs-df -mupper-regs-sf" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cmp.c b/gcc/testsuite/gcc.target/powerpc/vec-cmp.c index 4bcc15bf75e..aee659d0314 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-cmp.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-cmp.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc64*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc64*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-1.c index ef34e2bec2c..2f9624d4c86 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -mupper-regs-df -mupper-regs-di" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-2.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-2.c index efad62cca9f..007aeaf2fa1 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-O2 -mvsx" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-3.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-3.c index 62649ce9e42..2df48489fc7 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-4.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-4.c index 6380fef9bc8..3890cecb4b0 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-4.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-O2 -mcpu=power9" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-5.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-5.c index 95924f38971..d85dab96bb6 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-5.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-6.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-6.c index 27b8105915f..667b34948ba 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-6.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-6.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-7.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-7.c index 11b71b43b4d..6ee7c66890e 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-7.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-8.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-8.c index f10b3b0f271..95430904639 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-8.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-8.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-9.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-9.c index e355bce913d..5932013696e 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-extract-9.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-extract-9.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vec-shift.c b/gcc/testsuite/gcc.target/powerpc/vec-shift.c index 80b59a2d3e7..eeac927ddd2 100644 --- a/gcc/testsuite/gcc.target/powerpc/vec-shift.c +++ b/gcc/testsuite/gcc.target/powerpc/vec-shift.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-1.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-1.c index 973a7ff348b..4423852a85f 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-2.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-2.c index 7b5ad7df30e..3a9a7726951 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-3.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-3.c index ff5296c87e2..41faeab6516 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-4.c index 00cba7ed353..f639b907695 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-4.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-5.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-5.c index 977eb8e2c18..8f0607a74f9 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-5.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-6.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-6.c index 0a2102de2d8..c260f0e116c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-6.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-6.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c index 6b49b416bb7..8a857752db8 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-8.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-8.c index bae3da43dc6..c909a883c18 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-8.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-8.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7 -Wno-deprecated" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c b/gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c index 70ad3378d7f..2ca426133ae 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-extract-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-extract-2.c b/gcc/testsuite/gcc.target/powerpc/vsx-extract-2.c index d4d27ea5204..27019e47493 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-extract-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-extract-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-extract-3.c b/gcc/testsuite/gcc.target/powerpc/vsx-extract-3.c index 7fdcb0b87c6..cc9950426f3 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-extract-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-extract-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O3 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c index 3b498f4bc2a..2e145813206 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-extract-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c b/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c index 1338c6b1de5..7b0d8097137 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-extract-5.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-O2 -mcpu=power8" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-float0.c b/gcc/testsuite/gcc.target/powerpc/vsx-float0.c index 2d6dd75d058..57613b5b65b 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-float0.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-float0.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-himode.c b/gcc/testsuite/gcc.target/powerpc/vsx-himode.c index 883864e5885..8f710e5c5bd 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-himode.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-himode.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O2 -mvsx-small-integer" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-himode2.c b/gcc/testsuite/gcc.target/powerpc/vsx-himode2.c index 96de758e988..e6f26a8e014 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-himode2.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-himode2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O2 -mvsx-small-integer" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-himode3.c b/gcc/testsuite/gcc.target/powerpc/vsx-himode3.c index 2f4a858d3d8..3c0e66d14ca 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-himode3.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-himode3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O2 -mvsx-small-integer" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-mass-1.c b/gcc/testsuite/gcc.target/powerpc/vsx-mass-1.c index d8e0d7dea45..507854a94a6 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-mass-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-mass-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-linux* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O3 -ftree-vectorize -mcpu=power7 -ffast-math -mveclibabi=mass" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-qimode.c b/gcc/testsuite/gcc.target/powerpc/vsx-qimode.c index eb82c56c29b..a252457f314 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-qimode.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-qimode.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O2 -mvsx-small-integer" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-qimode2.c b/gcc/testsuite/gcc.target/powerpc/vsx-qimode2.c index 02aa2072836..d321970d0ac 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-qimode2.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-qimode2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O2 -mvsx-small-integer" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-qimode3.c b/gcc/testsuite/gcc.target/powerpc/vsx-qimode3.c index 0e1da329105..50142e8d86d 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-qimode3.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-qimode3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */ /* { dg-options "-mcpu=power9 -O2 -mvsx-small-integer" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-sfminmax.c b/gcc/testsuite/gcc.target/powerpc/vsx-sfminmax.c index dfe6b0b6987..2df1719cb23 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-sfminmax.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-sfminmax.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -mcpu=power7 -ffast-math" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-simode.c b/gcc/testsuite/gcc.target/powerpc/vsx-simode.c index e4b21139789..91d55bb8791 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-simode.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-simode.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -mvsx-small-integer" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-simode2.c b/gcc/testsuite/gcc.target/powerpc/vsx-simode2.c index 92553b93aa9..56793a16222 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-simode2.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-simode2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -mvsx-small-integer" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-simode3.c b/gcc/testsuite/gcc.target/powerpc/vsx-simode3.c index fd15931857b..a35e6db0b79 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-simode3.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-simode3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ /* { dg-options "-mcpu=power8 -O2 -mvsx-small-integer" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-1.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-1.c index 60a9e3ebb4e..903a4343696 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -ftree-vectorize -mcpu=power7 -ffast-math" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-2.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-2.c index b05c9cd351c..fb26ead3ee6 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -ftree-vectorize -mcpu=power7 -ffast-math" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-3.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-3.c index 9afd5dafbc8..54f41f2d9f0 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -ftree-vectorize -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-4.c index fcad4094b16..d747d6c7039 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-4.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O2 -ftree-vectorize -mcpu=power7" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-5.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-5.c index 65843e93fbd..6566503d769 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-5.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mvsx -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.c b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.c index f8e644bb532..fe1590a8aab 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vector-6.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-mvsx -O2" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c index 82320e2ab87..0f67596ee5d 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c index e46311206fc..a1ac364ddbc 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c index a74795d91fb..b65b1342c31 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-3.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c index b8815858a1e..5b60fda2859 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-4.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c index 216ffb2fc34..0bdaf154617 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-5.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c index 68451d099a0..587dbfff78a 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-6.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c index cce8f76e17f..36765bfc046 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-7.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c index dee52d1ee1a..5f52272a0f7 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-vectorize-8.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-mcpu=power7 -O2 -ftree-vectorize -fno-vect-cost-model -fdump-tree-vect-details" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/warn-1.c b/gcc/testsuite/gcc.target/powerpc/warn-1.c index f345106678a..b9f744bd7f9 100644 --- a/gcc/testsuite/gcc.target/powerpc/warn-1.c +++ b/gcc/testsuite/gcc.target/powerpc/warn-1.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-options "-O -mvsx -mno-altivec" } */ diff --git a/gcc/testsuite/gcc.target/powerpc/warn-2.c b/gcc/testsuite/gcc.target/powerpc/warn-2.c index 02e8268f854..446ee5a2a3d 100644 --- a/gcc/testsuite/gcc.target/powerpc/warn-2.c +++ b/gcc/testsuite/gcc.target/powerpc/warn-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ /* { dg-options "-O -mcpu=power7 -mno-altivec" } */ diff --git a/gcc/testsuite/gcc.target/rx/zero-width-bitfield.c b/gcc/testsuite/gcc.target/rx/zero-width-bitfield.c index 8e477ffff74..5576f654ab7 100644 --- a/gcc/testsuite/gcc.target/rx/zero-width-bitfield.c +++ b/gcc/testsuite/gcc.target/rx/zero-width-bitfield.c @@ -1,5 +1,5 @@ /* { dg-do run { xfail rx-*-* } } */ -/* { dg-skip-if "skipped until patch for generic zero=width bit-field handling is accepted" { rx-*-* } { "*" } { "" } } */ +/* { dg-skip-if "skipped until patch for generic zero=width bit-field handling is accepted" { rx-*-* } } */ /* { dg-options "-msim" } */ /* Note: The -msim above is actually there to override the default options which do not allow the GCC extension of zero-width bitfields. */ diff --git a/gcc/testsuite/gcc.target/sparc/overflow-4.c b/gcc/testsuite/gcc.target/sparc/overflow-4.c index 31b326486ee..868edea2b9e 100644 --- a/gcc/testsuite/gcc.target/sparc/overflow-4.c +++ b/gcc/testsuite/gcc.target/sparc/overflow-4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O" } */ +/* { dg-options "-O -mno-vis3" } */ /* { dg-require-effective-target lp64 } */ #include <stdbool.h> diff --git a/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-F.c b/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-F.c index 01459eaa08c..591c0f6792a 100644 --- a/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-F.c +++ b/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-F.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-xfail-run-if "" { empty-*-* } { "*" } { "" } } */ +/* { dg-xfail-run-if "" { empty-*-* } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-P.c b/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-P.c index d3472abcc3c..73785d96d25 100644 --- a/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-P.c +++ b/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-P.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-xfail-run-if "" { empty-*-* } { "*" } { "" } } */ +/* { dg-xfail-run-if "" { empty-*-* } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-XF.c b/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-XF.c index 0a0a1f856c3..78001d1842f 100644 --- a/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-XF.c +++ b/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-XF.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-xfail-run-if "" { *-*-* } { "*" } { "" } } */ +/* { dg-xfail-run-if "" { *-*-* } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-XP.c b/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-XP.c index 6f418689a13..6d6132f2e55 100644 --- a/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-XP.c +++ b/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-exp-XP.c @@ -1,5 +1,5 @@ /* { dg-do run } */ -/* { dg-xfail-run-if "" { *-*-* } { "*" } { "" } } */ +/* { dg-xfail-run-if "" { *-*-* } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-nocache-exp-XF.c b/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-nocache-exp-XF.c index dfa1792a8b5..b3d17ee5928 100644 --- a/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-nocache-exp-XF.c +++ b/gcc/testsuite/gcc.test-framework/dg-do-run-xrif-nocache-exp-XF.c @@ -1,6 +1,6 @@ /* { dg-do run } */ /* { dg-options "-DDEFINED" } */ -/* { dg-xfail-run-if "comment" { def_nocache } { "*" } { "" } } */ +/* { dg-xfail-run-if "comment" { def_nocache } } */ int main () diff --git a/gcc/testsuite/gcc.test-framework/dg-dot-run-sif-exp-P.c b/gcc/testsuite/gcc.test-framework/dg-dot-run-sif-exp-P.c index bf473616abb..23893d3cb54 100644 --- a/gcc/testsuite/gcc.test-framework/dg-dot-run-sif-exp-P.c +++ b/gcc/testsuite/gcc.test-framework/dg-dot-run-sif-exp-P.c @@ -1,5 +1,5 @@ /* { dg-do run { target { *-*-* && yes } } } */ -/* { dg-skip-if "comment" { no && yes } { "*" } { "" } } */ +/* { dg-skip-if "comment" { no && yes } } */ int main () diff --git a/gcc/testsuite/gcc.test-framework/dg-dot-run-sif-exp-U.c b/gcc/testsuite/gcc.test-framework/dg-dot-run-sif-exp-U.c index 65008c8ab28..a7c1aa12370 100644 --- a/gcc/testsuite/gcc.test-framework/dg-dot-run-sif-exp-U.c +++ b/gcc/testsuite/gcc.test-framework/dg-dot-run-sif-exp-U.c @@ -1,5 +1,5 @@ /* { dg-do run { target { *-*-* || no } } } */ -/* { dg-skip-if "comment" { *-*-* && yes } { "*" } { "" } } */ +/* { dg-skip-if "comment" { *-*-* && yes } } */ int main () diff --git a/gcc/testsuite/gcc.test-framework/dg-dot-run-xif-exp-P.c b/gcc/testsuite/gcc.test-framework/dg-dot-run-xif-exp-P.c index eb2af26081f..1c2da09574d 100644 --- a/gcc/testsuite/gcc.test-framework/dg-dot-run-xif-exp-P.c +++ b/gcc/testsuite/gcc.test-framework/dg-dot-run-xif-exp-P.c @@ -1,5 +1,5 @@ /* { dg-do run { target { *-*-* && yes } } } */ -/* { dg-xfail-if "comment" { empty-*-* && yes } { "*" } { "" } } */ +/* { dg-xfail-if "comment" { empty-*-* && yes } } */ int main () diff --git a/gcc/testsuite/gcc.test-framework/dg-dot-run-xif-exp-XP.c b/gcc/testsuite/gcc.test-framework/dg-dot-run-xif-exp-XP.c index 59cb7689401..e508c698e33 100644 --- a/gcc/testsuite/gcc.test-framework/dg-dot-run-xif-exp-XP.c +++ b/gcc/testsuite/gcc.test-framework/dg-dot-run-xif-exp-XP.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { *-*-* empty-*-* } } } */ -/* { dg-xfail-if "comment" { *-*-* && yes } { "*" } { "" } } */ +/* { dg-xfail-if "comment" { *-*-* && yes } } */ int main () diff --git a/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-F.c b/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-F.c index 3011799c88c..1eae0168090 100644 --- a/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-F.c +++ b/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-F.c @@ -1,5 +1,5 @@ /* { dg-do run { xfail *-empty-* } } */ -/* { dg-xfail-run-if "" { empty-*-* } { "*" } { "" } } */ +/* { dg-xfail-run-if "" { empty-*-* } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-P.c b/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-P.c index 5bb92207a19..a2c5bdbd95a 100644 --- a/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-P.c +++ b/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-P.c @@ -1,5 +1,5 @@ /* { dg-do run { xfail *-empty-* } } */ -/* { dg-xfail-run-if "" { empty-*-* } { "*" } { "" } } */ +/* { dg-xfail-run-if "" { empty-*-* } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-XF.c b/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-XF.c index 854f1cb20de..514a7d96a79 100644 --- a/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-XF.c +++ b/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-XF.c @@ -1,5 +1,5 @@ /* { dg-do run { xfail *-*-* } } */ -/* { dg-xfail-run-if "" { empty-*-* } { "*" } { "" } } */ +/* { dg-xfail-run-if "" { empty-*-* } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-XP.c b/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-XP.c index f1ac0c1de9f..cfe31c883f9 100644 --- a/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-XP.c +++ b/gcc/testsuite/gcc.test-framework/dg-dot-run-xrif-exp-XP.c @@ -1,5 +1,5 @@ /* { dg-do run { xfail empty-*-* } } */ -/* { dg-xfail-run-if "" { *-*-* } { "*" } { "" } } */ +/* { dg-xfail-run-if "" { *-*-* } } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.test-framework/dg-nocache-sif-exp-P.c b/gcc/testsuite/gcc.test-framework/dg-nocache-sif-exp-P.c index 99392e34133..c44532b0252 100644 --- a/gcc/testsuite/gcc.test-framework/dg-nocache-sif-exp-P.c +++ b/gcc/testsuite/gcc.test-framework/dg-nocache-sif-exp-P.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-DNOT_THE_RIGHT_DEFINE" } */ -/* { dg-skip-if "comment" { def_nocache } { "*" } { "" } } */ +/* { dg-skip-if "comment" { def_nocache } } */ int main () diff --git a/gcc/testsuite/gcc.test-framework/dg-nocache-sif-exp-U.c b/gcc/testsuite/gcc.test-framework/dg-nocache-sif-exp-U.c index ffaf49fdf66..ab1a0acabe5 100644 --- a/gcc/testsuite/gcc.test-framework/dg-nocache-sif-exp-U.c +++ b/gcc/testsuite/gcc.test-framework/dg-nocache-sif-exp-U.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-DDEFINED" } */ -/* { dg-skip-if "comment" { def_nocache } { "*" } { "" } } */ +/* { dg-skip-if "comment" { def_nocache } } */ int main () diff --git a/gcc/testsuite/gcc.test-framework/dg-nocache-xif-exp-P.c b/gcc/testsuite/gcc.test-framework/dg-nocache-xif-exp-P.c index 21e833681dc..6481958c910 100644 --- a/gcc/testsuite/gcc.test-framework/dg-nocache-xif-exp-P.c +++ b/gcc/testsuite/gcc.test-framework/dg-nocache-xif-exp-P.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-DNOT_THE_RIGHT_DEFINE" } */ -/* { dg-xfail-if "comment" { def_nocache } { "*" } { "" } } */ +/* { dg-xfail-if "comment" { def_nocache } } */ int main () diff --git a/gcc/testsuite/gcc.test-framework/dg-nocache-xif-exp-XP.c b/gcc/testsuite/gcc.test-framework/dg-nocache-xif-exp-XP.c index 07a55ef9189..853a78547c8 100644 --- a/gcc/testsuite/gcc.test-framework/dg-nocache-xif-exp-XP.c +++ b/gcc/testsuite/gcc.test-framework/dg-nocache-xif-exp-XP.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-DDEFINED" } */ -/* { dg-xfail-if "comment" { def_nocache } { "*" } { "" } } */ +/* { dg-xfail-if "comment" { def_nocache } } */ int main () diff --git a/gcc/testsuite/gcc.test-framework/gen_directive_tests b/gcc/testsuite/gcc.test-framework/gen_directive_tests index 59d97fe8f87..274f5300297 100755..100644 --- a/gcc/testsuite/gcc.test-framework/gen_directive_tests +++ b/gcc/testsuite/gcc.test-framework/gen_directive_tests @@ -539,13 +539,13 @@ selector_deep() { dgdo_progs compile target "$GOOD_PROG" "dotn${NUM}-exp-U" "$BADXPR" deep_progs "$BADC_PROG" "xiff-100-exp-XF" \ - '/* { dg-xfail-if "match" { ' "{ $GOODXPR }" ' } { "*" } { "" } } */' + '/* { dg-xfail-if "match" { ' "{ $GOODXPR }" ' } } */' deep_progs "$GOOD_PROG" "xifp-100-exp-P" \ - '/* { dg-xfail-if "no match" { ' "{ $BADXPR }" ' } { "*" } { "" } } */' + '/* { dg-xfail-if "no match" { ' "{ $BADXPR }" ' } } */' deep_progs "$BADC_PROG" "xifn-100-exp-U" \ - '/* { dg-skip-if "match" { ' "{ $GOODXPR }" ' } { "*" } { "" } } */' + '/* { dg-skip-if "match" { ' "{ $GOODXPR }" ' } } */' deep_progs "$GOOD_PROG" "xifs-100-exp-P" \ - '/* { dg-skip-if "match" { ' "{ $BADXPR }" ' } { "*" } { "" } } */' + '/* { dg-skip-if "match" { ' "{ $BADXPR }" ' } } */' deep_progs "$GOOD_PROG" "satn-100-exp-P" \ '/* { dg-final { scan-assembler-not "unexpected garbage" { target ' \ "$GOODXPR" ' } } } */' diff --git a/gcc/testsuite/gfortran.dg/char4_iunit_1.f03 b/gcc/testsuite/gfortran.dg/char4_iunit_1.f03 index 7d388ad99fe..0c7b70e45b9 100644 --- a/gcc/testsuite/gfortran.dg/char4_iunit_1.f03 +++ b/gcc/testsuite/gfortran.dg/char4_iunit_1.f03 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! PR37077 Implement Internal Unit I/O for character KIND=4 ! Test case prepared by Jerry DeLisle <jvdelisle@gcc.gnu.org> program char4_iunit_1 diff --git a/gcc/testsuite/gfortran.dg/cshift_1.f90 b/gcc/testsuite/gfortran.dg/cshift_1.f90 new file mode 100644 index 00000000000..e2024ea99dd --- /dev/null +++ b/gcc/testsuite/gfortran.dg/cshift_1.f90 @@ -0,0 +1,108 @@ +! { dg-do run } +! Take cshift through its paces to make sure no boundary +! cases are wrong. + +module kinds + integer, parameter :: sp = selected_real_kind(6) ! Single precision +end module kinds + +module replacements + use kinds +contains + subroutine cshift_sp_3_v1 (array, shift, dim, res) + integer, parameter :: wp = sp + real(kind=wp), dimension(:,:,:), intent(in) :: array + integer, intent(in) :: shift, dim + real(kind=wp), dimension(:,:,:), intent(out) :: res + integer :: i,j,k + integer :: sh, rsh + integer :: n + integer :: n2, n3 + res = 0 + n3 = size(array,3) + n2 = size(array,2) + n1 = size(array,1) + if (dim == 1) then + n = n1 + sh = modulo(shift, n) + rsh = n - sh + do k=1, n3 + do j=1, n2 + do i=1, rsh + res(i,j,k) = array(i+sh,j,k) + end do + do i=rsh+1,n + res(i,j,k) = array(i-rsh,j,k) + end do + end do + end do + else if (dim == 2) then + n = n2 + sh = modulo(shift,n) + rsh = n - sh + do k=1, n3 + do j=1, rsh + do i=1, n1 + res(i,j,k) = array(i,j+sh, k) + end do + end do + do j=rsh+1, n + do i=1, n1 + res(i,j,k) = array(i,j-rsh, k) + end do + end do + end do + else if (dim == 3) then + n = n3 + sh = modulo(shift, n) + rsh = n - sh + do k=1, rsh + do j=1, n2 + do i=1, n1 + res(i,j,k) = array(i, j, k+sh) + end do + end do + end do + do k=rsh+1, n + do j=1, n2 + do i=1, n1 + res(i,j, k) = array(i, j, k-rsh) + end do + end do + end do + else + stop "Wrong argument to dim" + end if + end subroutine cshift_sp_3_v1 +end module replacements + +program testme + use kinds + use replacements + implicit none + integer, parameter :: wp = sp ! Working precision + INTEGER, PARAMETER :: n = 7 + real(kind=wp), dimension(:,:,:), allocatable :: a,b,c + integer i, j, k + real:: t1, t2 + integer, parameter :: nrep = 20 + + allocate (a(n,n,n), b(n,n,n),c(n,n,n)) + call random_number(a) + do k = 1,3 + do i=-3,3,2 + call cshift_sp_3_v1 (a, i, k, b) + c = cshift(a,i,k) + if (any (c /= b)) call abort + end do + end do + deallocate (b,c) + allocate (b(n-1,n-1,n-1),c(n-1,n-1,n-1)) + do k=1,3 + do i=-3,3,2 + call cshift_sp_3_v1 (a(1:n-1,1:n-1,1:n-1), i, k, b) + c = cshift(a(1:n-1,1:n-1,1:n-1), i, k) + if (any (c /= b)) call abort + end do + end do +end program testme diff --git a/gcc/testsuite/gfortran.dg/cshift_2.f90 b/gcc/testsuite/gfortran.dg/cshift_2.f90 new file mode 100644 index 00000000000..66a6e2b7268 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/cshift_2.f90 @@ -0,0 +1,152 @@ +! { dg-do run } +! Test CSHIFT with array argument for shift +module rnd + implicit none +contains + subroutine fill(a,n) + integer, intent(out), dimension(:,:) :: a + integer, intent(in) :: n + real, dimension(size(a,1),size(a,2)) :: r + call random_number(r) + a = int(2*n*r-n) + end subroutine fill +end module rnd + +module csh + implicit none +contains + subroutine emul_cshift(a,sh_in,dim, c) + integer, dimension(:,:,:), intent(in) :: a + integer, dimension(:,:,:), intent(out) :: c + integer, dimension(:,:), intent(in) :: sh_in + integer, intent(in) :: dim + integer :: sh, rsh + integer :: s1, s2, s3, n, i + integer :: n1, n2, n3 + n1 = size(a,1) + n2 = size(a,2) + n3 = size(a,3) + if (dim == 1) then + n = n1 + do s2=1,n2 + do s3=1,n3 + sh = modulo(sh_in(s2,s3), n) + rsh = n - sh + do i=1,rsh + c(i,s2,s3) = a(i+sh,s2,s3) + end do + do i=rsh+1,n + c(i,s2,s3) = a(i-rsh,s2,s3) + end do + end do + end do + else if (dim == 2) then + n = n2 + do s3=1,n3 + do s1=1,n1 + sh = modulo(sh_in(s1,s3),n) + rsh = n - sh + do i=1,rsh + c(s1,i,s3) = a(s1,i+sh,s3) + end do + do i=rsh+1,n + c(s1,i,s3) = a(s1,i-rsh,s3) + end do + end do + end do + + else if (dim == 3) then + n = n3 + do s2=1,n2 + do s1=1,n1 + sh = modulo(sh_in(s1,s2),n) + rsh = n - sh + do i=1,rsh + c(s1,s2,i) = a(s1,s2,i+sh) + end do + do i=rsh+1,n + c(s1,s2,i) = a(s1,s2,i-rsh) + end do + end do + end do + else + stop "Illegal dim" + end if + end subroutine emul_cshift +end module csh +program main + use csh + use rnd + implicit none + integer, parameter :: n1=30,n2=40,n3=50 + integer, dimension(n1,n2,n3) :: a, b,c + integer :: s1, s2, s3 + integer :: dim + integer, dimension(:,:), allocatable :: sh1, sh2, sh3 + integer, dimension(:), allocatable :: sh_shift + integer :: sh, rsh + integer :: i,j,k,v + type t + integer :: i1, i2, i3 + end type t + type(t), dimension(n1,n2,n3) :: ta, tb + + v = 1 + do k=1,n3 + do j=1,n2 + do i=1,n1 + a(i,j,k) = v + v = v + 1 + end do + end do + end do + + ta%i1 = a + ta%i2 = a+a + ta%i3 = a+a+a + allocate(sh1(n2,n3)) + allocate(sh2(n1,n3)) + allocate(sh3(n1,n2)) + + call fill(sh1,10) + call fill(sh2,10) + call fill(sh3,10) + + b = cshift(a,sh1,1) + call emul_cshift(a,sh1,1,c) + if (any(b /= c)) then + print *,b + print *,c + call abort + end if + tb = cshift(ta,sh1,1) + if (any(tb%i1 /= c)) call abort + + b = cshift(a,sh2,2) + call emul_cshift(a,sh2,2,c) + if (any(b /= c)) call abort + tb = cshift(ta,sh2,2) + if (any (tb%i2 /= c*2)) call abort + + b = cshift(a,sh3,3) + call emul_cshift(a,sh3,3,c) + if (any(b /= c)) call abort + tb = cshift(ta,sh3,3) + if (any(tb%i3 /= c*3)) call abort + + b = -42 + c = -42 + b(1:n1:2,:,:) = cshift(a(1:n1/2,:,:),sh1,1) + call emul_cshift(a(1:n1/2,:,:), sh1, 1, c(1:n1:2,:,:)) + if (any(b /= c)) call abort + + tb%i1 = -42 + tb%i2 = -2*42 + tb%i3 = -3*42 + tb(1:n1:2,:,:) = cshift(ta(1:n1/2,:,:),sh1,1) + if (any(tb%i1 /= b)) call abort + if (any(tb%i2 /= 2*b)) call abort + if (any(tb%i3 /= 3*b)) call abort + +9000 format (99(3(I3,1X),2X)) +end program main diff --git a/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f b/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f index fd731994f36..99f3e2b7a11 100644 --- a/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f +++ b/gcc/testsuite/gfortran.dg/debug/pr35154-stabs.f @@ -1,6 +1,6 @@ C Test program for common block debugging. G. Helffrich 11 July 2004. C { dg-do compile } -C { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } { "*" } { "" } } +C { dg-skip-if "No stabs" { aarch64*-*-* mmix-*-* alpha*-*-* hppa*64*-*-* ia64-*-* *-*-vxworks* } } C { dg-skip-if "No stabs" {*-*-* } { "*" } { "-gstabs" } } common i,j common /label/l,m diff --git a/gcc/testsuite/gfortran.dg/fmt_pf.f90 b/gcc/testsuite/gfortran.dg/fmt_pf.f90 index 6cefa86e4a8..743fcbf680b 100644 --- a/gcc/testsuite/gfortran.dg/fmt_pf.f90 +++ b/gcc/testsuite/gfortran.dg/fmt_pf.f90 @@ -223,4 +223,4 @@ contains end subroutine end program -! { dg-output "All kinds rounded to nearest" { xfail { i?86-*-solaris2.9* hppa*-*-hpux* } } } +! { dg-output "All kinds rounded to nearest" { xfail { hppa*-*-hpux* } } } diff --git a/gcc/testsuite/gfortran.dg/guality/pr41558.f90 b/gcc/testsuite/gfortran.dg/guality/pr41558.f90 index 840b2384012..34288377334 100644 --- a/gcc/testsuite/gfortran.dg/guality/pr41558.f90 +++ b/gcc/testsuite/gfortran.dg/guality/pr41558.f90 @@ -1,6 +1,6 @@ ! PR debug/41558 ! { dg-do run } -! { dg-skip-if "PR testsuite/51875" { { hppa*-*-hpux* } && { ! lp64 } } { "*" } { "" } } +! { dg-skip-if "PR testsuite/51875" { { hppa*-*-hpux* } && { ! lp64 } } } ! { dg-options "-g" } subroutine f (s) diff --git a/gcc/testsuite/gfortran.dg/implicit_class_1.f90 b/gcc/testsuite/gfortran.dg/implicit_class_1.f90 index 380942cfdba..ae689704525 100644 --- a/gcc/testsuite/gfortran.dg/implicit_class_1.f90 +++ b/gcc/testsuite/gfortran.dg/implicit_class_1.f90 @@ -1,5 +1,5 @@ ! { dg-do run } -! { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } +! { dg-skip-if "" { powerpc-ibm-aix* } } ! ! PR 56500: [OOP] "IMPLICIT CLASS(...)" wrongly rejected ! diff --git a/gcc/testsuite/gfortran.dg/init_flag_10.f90 b/gcc/testsuite/gfortran.dg/init_flag_10.f90 index 826a34b81ea..dac9418d614 100644 --- a/gcc/testsuite/gfortran.dg/init_flag_10.f90 +++ b/gcc/testsuite/gfortran.dg/init_flag_10.f90 @@ -1,7 +1,7 @@ ! { dg-do run } ! { dg-options "-finit-real=NAN" } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! ! PR fortran/50619 ! diff --git a/gcc/testsuite/gfortran.dg/init_flag_3.f90 b/gcc/testsuite/gfortran.dg/init_flag_3.f90 index e4426177ab6..30e00814490 100644 --- a/gcc/testsuite/gfortran.dg/init_flag_3.f90 +++ b/gcc/testsuite/gfortran.dg/init_flag_3.f90 @@ -1,7 +1,7 @@ ! { dg-do run } ! { dg-options "-finit-integer=-1 -finit-logical=false -finit-real=nan" } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } program init_flag_3 call real_test diff --git a/gcc/testsuite/gfortran.dg/int_conv_2.f90 b/gcc/testsuite/gfortran.dg/int_conv_2.f90 index ed7a5f4cd60..c6fc00bf1ba 100644 --- a/gcc/testsuite/gfortran.dg/int_conv_2.f90 +++ b/gcc/testsuite/gfortran.dg/int_conv_2.f90 @@ -1,5 +1,5 @@ ! { dg-do compile } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! PR fortran/37930 program test implicit none diff --git a/gcc/testsuite/gfortran.dg/isnan_1.f90 b/gcc/testsuite/gfortran.dg/isnan_1.f90 index 89e4cd35ba2..2a13d3a6f93 100644 --- a/gcc/testsuite/gfortran.dg/isnan_1.f90 +++ b/gcc/testsuite/gfortran.dg/isnan_1.f90 @@ -2,7 +2,7 @@ ! ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! implicit none real :: x diff --git a/gcc/testsuite/gfortran.dg/isnan_2.f90 b/gcc/testsuite/gfortran.dg/isnan_2.f90 index 455ecef1f7a..c5360cb0e9f 100644 --- a/gcc/testsuite/gfortran.dg/isnan_2.f90 +++ b/gcc/testsuite/gfortran.dg/isnan_2.f90 @@ -3,7 +3,7 @@ ! { dg-do run } ! { dg-options "-fno-range-check" } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! implicit none character(len=1) :: s diff --git a/gcc/testsuite/gfortran.dg/large_real_kind_2.F90 b/gcc/testsuite/gfortran.dg/large_real_kind_2.F90 index 2e3891b2ffd..7ed4c30e0d5 100644 --- a/gcc/testsuite/gfortran.dg/large_real_kind_2.F90 +++ b/gcc/testsuite/gfortran.dg/large_real_kind_2.F90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-require-effective-target fortran_large_real } -! { dg-xfail-if "" { "*-*-freebsd*" } { "*" } { "" } } +! { dg-xfail-if "" { "*-*-freebsd*" } } ! Testing library calls on large real kinds (larger than kind=8) implicit none diff --git a/gcc/testsuite/gfortran.dg/maxloc_2.f90 b/gcc/testsuite/gfortran.dg/maxloc_2.f90 index deca9fc4427..1cf79bace98 100644 --- a/gcc/testsuite/gfortran.dg/maxloc_2.f90 +++ b/gcc/testsuite/gfortran.dg/maxloc_2.f90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } real :: a(3), nan, minf, pinf real, allocatable :: c(:) integer :: ia(1) diff --git a/gcc/testsuite/gfortran.dg/maxlocval_2.f90 b/gcc/testsuite/gfortran.dg/maxlocval_2.f90 index 5f6b913b0f4..cd985ff4ce9 100644 --- a/gcc/testsuite/gfortran.dg/maxlocval_2.f90 +++ b/gcc/testsuite/gfortran.dg/maxlocval_2.f90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } real :: a(3), nan, minf, pinf real, allocatable :: c(:) logical :: l diff --git a/gcc/testsuite/gfortran.dg/maxlocval_4.f90 b/gcc/testsuite/gfortran.dg/maxlocval_4.f90 index 029abe3d1a7..b8743325ad8 100644 --- a/gcc/testsuite/gfortran.dg/maxlocval_4.f90 +++ b/gcc/testsuite/gfortran.dg/maxlocval_4.f90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } real :: a(3,3), b(3), nan, minf, pinf, h logical :: l, l2 logical :: l3(3,3), l4(3,3), l5(3,3) diff --git a/gcc/testsuite/gfortran.dg/minloc_1.f90 b/gcc/testsuite/gfortran.dg/minloc_1.f90 index 25691b0682a..b8572945b31 100644 --- a/gcc/testsuite/gfortran.dg/minloc_1.f90 +++ b/gcc/testsuite/gfortran.dg/minloc_1.f90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } real :: a(3), nan, minf, pinf integer :: ia(1) real, allocatable :: c(:) diff --git a/gcc/testsuite/gfortran.dg/minlocval_1.f90 b/gcc/testsuite/gfortran.dg/minlocval_1.f90 index 261cab346a9..c877f1e823a 100644 --- a/gcc/testsuite/gfortran.dg/minlocval_1.f90 +++ b/gcc/testsuite/gfortran.dg/minlocval_1.f90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } real :: a(3), nan, minf, pinf real, allocatable :: c(:) logical :: l diff --git a/gcc/testsuite/gfortran.dg/minlocval_4.f90 b/gcc/testsuite/gfortran.dg/minlocval_4.f90 index c42b0194421..b37123164b2 100644 --- a/gcc/testsuite/gfortran.dg/minlocval_4.f90 +++ b/gcc/testsuite/gfortran.dg/minlocval_4.f90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } real :: a(3,3), b(3), nan, minf, pinf, h logical :: l, l2 logical :: l3(3,3), l4(3,3), l5(3,3) diff --git a/gcc/testsuite/gfortran.dg/module_nan.f90 b/gcc/testsuite/gfortran.dg/module_nan.f90 index 5f41514bc0b..7e496c07161 100644 --- a/gcc/testsuite/gfortran.dg/module_nan.f90 +++ b/gcc/testsuite/gfortran.dg/module_nan.f90 @@ -1,7 +1,7 @@ ! { dg-do run } ! { dg-options "-fno-range-check" } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! ! PR fortran/34318 ! diff --git a/gcc/testsuite/gfortran.dg/namelist_42.f90 b/gcc/testsuite/gfortran.dg/namelist_42.f90 index f15914ff117..9875d6ada1d 100644 --- a/gcc/testsuite/gfortran.dg/namelist_42.f90 +++ b/gcc/testsuite/gfortran.dg/namelist_42.f90 @@ -1,6 +1,6 @@ ! { dg-do run { target fd_truncate } } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! ! PR fortran/34427 ! diff --git a/gcc/testsuite/gfortran.dg/namelist_43.f90 b/gcc/testsuite/gfortran.dg/namelist_43.f90 index d2f077e9c48..a6e4eb67885 100644 --- a/gcc/testsuite/gfortran.dg/namelist_43.f90 +++ b/gcc/testsuite/gfortran.dg/namelist_43.f90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! ! PR fortran/34427 ! diff --git a/gcc/testsuite/gfortran.dg/nan_1.f90 b/gcc/testsuite/gfortran.dg/nan_1.f90 index 4ff1b873f0c..cfa85059414 100644 --- a/gcc/testsuite/gfortran.dg/nan_1.f90 +++ b/gcc/testsuite/gfortran.dg/nan_1.f90 @@ -3,7 +3,7 @@ ! ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! module aux2 interface isnan diff --git a/gcc/testsuite/gfortran.dg/nan_2.f90 b/gcc/testsuite/gfortran.dg/nan_2.f90 index 709b1471830..9077883eb1a 100644 --- a/gcc/testsuite/gfortran.dg/nan_2.f90 +++ b/gcc/testsuite/gfortran.dg/nan_2.f90 @@ -1,7 +1,7 @@ ! { dg-do run } ! { dg-options "-fno-range-check -pedantic" } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! ! PR fortran/34333 ! diff --git a/gcc/testsuite/gfortran.dg/nan_3.f90 b/gcc/testsuite/gfortran.dg/nan_3.f90 index 0a46fdb6ce4..aecb42b68a8 100644 --- a/gcc/testsuite/gfortran.dg/nan_3.f90 +++ b/gcc/testsuite/gfortran.dg/nan_3.f90 @@ -1,7 +1,7 @@ ! { dg-do run } ! { dg-options "-fno-range-check" } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! ! PR fortran/34319 ! diff --git a/gcc/testsuite/gfortran.dg/nan_4.f90 b/gcc/testsuite/gfortran.dg/nan_4.f90 index 30e2a49480d..46aba3ebabd 100644 --- a/gcc/testsuite/gfortran.dg/nan_4.f90 +++ b/gcc/testsuite/gfortran.dg/nan_4.f90 @@ -1,7 +1,7 @@ ! { dg-do compile } ! { dg-options "-std=gnu" } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! ! PR fortran/34398. ! diff --git a/gcc/testsuite/gfortran.dg/nan_5.f90 b/gcc/testsuite/gfortran.dg/nan_5.f90 index be1169d93d1..af77090d320 100644 --- a/gcc/testsuite/gfortran.dg/nan_5.f90 +++ b/gcc/testsuite/gfortran.dg/nan_5.f90 @@ -4,7 +4,7 @@ ! ! { dg-options "-fno-range-check" } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } implicit none real, parameter :: inf = 2 * huge(inf) diff --git a/gcc/testsuite/gfortran.dg/nan_6.f90 b/gcc/testsuite/gfortran.dg/nan_6.f90 index 8f0af294420..f4adcd2100d 100644 --- a/gcc/testsuite/gfortran.dg/nan_6.f90 +++ b/gcc/testsuite/gfortran.dg/nan_6.f90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! ! List-directed part of PR fortran/43298 ! and follow up to PR fortran/34319. diff --git a/gcc/testsuite/gfortran.dg/nan_7.f90 b/gcc/testsuite/gfortran.dg/nan_7.f90 index 4c2f62eeaed..4aecfd64627 100644 --- a/gcc/testsuite/gfortran.dg/nan_7.f90 +++ b/gcc/testsuite/gfortran.dg/nan_7.f90 @@ -2,7 +2,7 @@ ! { dg-options "-fno-range-check" } ! { dg-require-effective-target fortran_real_16 } ! { dg-require-effective-target fortran_integer_16 } -! { dg-skip-if "" { "powerpc*le-*-*" } { "*" } { "" } } +! { dg-skip-if "" { "powerpc*le-*-*" } } ! PR47293 NAN not correctly read character(len=200) :: str real(16) :: r diff --git a/gcc/testsuite/gfortran.dg/nearest_1.f90 b/gcc/testsuite/gfortran.dg/nearest_1.f90 index ae9e75f1e8f..1518e867d8a 100644 --- a/gcc/testsuite/gfortran.dg/nearest_1.f90 +++ b/gcc/testsuite/gfortran.dg/nearest_1.f90 @@ -1,7 +1,7 @@ ! { dg-do run } ! { dg-options "-O0 -ffloat-store" } ! { dg-add-options ieee } -! { dg-skip-if "Denormals not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "Denormals not supported" { spu-*-* } } ! PR fortran/27021 ! Original code submitted by Dominique d'Humieres ! Converted to Dejagnu for the testsuite by Steven G. Kargl diff --git a/gcc/testsuite/gfortran.dg/nearest_3.f90 b/gcc/testsuite/gfortran.dg/nearest_3.f90 index 7d683167005..4aa0f4cae82 100644 --- a/gcc/testsuite/gfortran.dg/nearest_3.f90 +++ b/gcc/testsuite/gfortran.dg/nearest_3.f90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! ! PR fortran/34209 ! diff --git a/gcc/testsuite/gfortran.dg/pr20257.f90 b/gcc/testsuite/gfortran.dg/pr20257.f90 index aebfc03543f..03108b95183 100644 --- a/gcc/testsuite/gfortran.dg/pr20257.f90 +++ b/gcc/testsuite/gfortran.dg/pr20257.f90 @@ -1,5 +1,5 @@ ! { dg-do run } -! { dg-skip-if "Too big for local store" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "Too big for local store" { spu-*-* } } integer,parameter :: n = 10000 real(8) array(10000) diff --git a/gcc/testsuite/gfortran.dg/pr47614.f b/gcc/testsuite/gfortran.dg/pr47614.f index 52f14c0c17b..2317d72a66e 100644 --- a/gcc/testsuite/gfortran.dg/pr47614.f +++ b/gcc/testsuite/gfortran.dg/pr47614.f @@ -1,5 +1,5 @@ ! { dg-do run { target { powerpc*-*-* } } } -! { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } +! { dg-skip-if "" { powerpc*-*-darwin* } } ! { dg-options "-O3 -funroll-loops -ffast-math -mcpu=power4" } diff --git a/gcc/testsuite/gfortran.dg/pr68078.f90 b/gcc/testsuite/gfortran.dg/pr68078.f90 index 092ab29f450..ebe26d55d2b 100644 --- a/gcc/testsuite/gfortran.dg/pr68078.f90 +++ b/gcc/testsuite/gfortran.dg/pr68078.f90 @@ -1,4 +1,4 @@ -! { dg-do run { target x86_64-*-linux* } } +! { dg-do run { target i?86-*-linux* x86_64-*-linux* } } ! { dg-additional-sources set_vm_limit.c } ! ! This test calls set_vm_limit to set an artificially low address space diff --git a/gcc/testsuite/gfortran.dg/proc_ptr_comp_51.f90 b/gcc/testsuite/gfortran.dg/proc_ptr_comp_51.f90 new file mode 100644 index 00000000000..cfe9818706f --- /dev/null +++ b/gcc/testsuite/gfortran.dg/proc_ptr_comp_51.f90 @@ -0,0 +1,36 @@ +! { dg-do compile } +! { dg-options "-fdump-tree-original" } +! +! PR 80983: [F03] memory leak when calling procedure-pointer component with allocatable result +! +! Contributed by Janus Weil <janus@gcc.gnu.org> + +program test + implicit none + + type :: concrete_type + procedure (alloc_integer), pointer, nopass :: alloc + end type + + procedure (alloc_integer), pointer :: pp + + type(concrete_type) :: concrete + + print *, alloc_integer() ! case #1: plain function + + pp => alloc_integer + print *, pp() ! case #2: procedure pointer + + concrete % alloc => alloc_integer + print *, concrete % alloc() ! case #3: procedure-pointer component + +contains + + function alloc_integer() result(res) + integer, allocatable :: res + allocate(res, source=13) + end function + +end + +! { dg-final { scan-tree-dump-times "__builtin_free" 3 "original" } } diff --git a/gcc/testsuite/gfortran.dg/read_infnan_1.f90 b/gcc/testsuite/gfortran.dg/read_infnan_1.f90 index c5023e8fe22..7fe2a0ac23e 100644 --- a/gcc/testsuite/gfortran.dg/read_infnan_1.f90 +++ b/gcc/testsuite/gfortran.dg/read_infnan_1.f90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! PR43298 Fortran library does not read in NaN, NaN(), -Inf, or Inf diff --git a/gcc/testsuite/gfortran.dg/real_const_3.f90 b/gcc/testsuite/gfortran.dg/real_const_3.f90 index c70591d3cfc..b214bd0b1a6 100644 --- a/gcc/testsuite/gfortran.dg/real_const_3.f90 +++ b/gcc/testsuite/gfortran.dg/real_const_3.f90 @@ -1,7 +1,7 @@ !{ dg-do run } !{ dg-options "-fno-range-check" } !{ dg-add-options ieee } -!{ dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +!{ dg-skip-if "NaN not supported" { spu-*-* } } ! PR19310 and PR19904, allow disabling range check during compile. ! Contributed by Jerry DeLisle <jvdelisle@gcc.gnu.org> program main diff --git a/gcc/testsuite/gfortran.dg/realloc_on_assign_2.f03 b/gcc/testsuite/gfortran.dg/realloc_on_assign_2.f03 index 0564d0d5064..6d6680d984c 100644 --- a/gcc/testsuite/gfortran.dg/realloc_on_assign_2.f03 +++ b/gcc/testsuite/gfortran.dg/realloc_on_assign_2.f03 @@ -1,5 +1,5 @@ ! { dg-do run } -! { dg-skip-if "Too big for local store" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "Too big for local store" { spu-*-* } } ! Tests the patch that implements F2003 automatic allocation and ! reallocation of allocatable arrays on assignment. The tests ! below were generated in the final stages of the development of diff --git a/gcc/testsuite/gfortran.dg/scratch_1.f90 b/gcc/testsuite/gfortran.dg/scratch_1.f90 index fd888cc9805..a1762fc8c2e 100644 --- a/gcc/testsuite/gfortran.dg/scratch_1.f90 +++ b/gcc/testsuite/gfortran.dg/scratch_1.f90 @@ -1,5 +1,5 @@ ! { dg-do run } -! { dg-skip-if "Too big for local store" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "Too big for local store" { spu-*-* } } ! Check that we can open more than 26 scratch files concurrently integer :: i do i = 1, 30 diff --git a/gcc/testsuite/gfortran.dg/stat_1.f90 b/gcc/testsuite/gfortran.dg/stat_1.f90 index ec582f904a5..49ef23a7800 100644 --- a/gcc/testsuite/gfortran.dg/stat_1.f90 +++ b/gcc/testsuite/gfortran.dg/stat_1.f90 @@ -1,5 +1,5 @@ ! { dg-do run } -! { dg-skip-if "" { *-*-mingw* spu-*-* } { "*" } { "" } } +! { dg-skip-if "" { *-*-mingw* spu-*-* } } ! { dg-options "-std=gnu" } character(len=*), parameter :: f = "testfile_stat_1" integer :: s1(13), r1, s2(13), r2, s3(13), r3, d(13), rd diff --git a/gcc/testsuite/gfortran.dg/stat_2.f90 b/gcc/testsuite/gfortran.dg/stat_2.f90 index a3eb6b2d475..ae029dc9424 100644 --- a/gcc/testsuite/gfortran.dg/stat_2.f90 +++ b/gcc/testsuite/gfortran.dg/stat_2.f90 @@ -1,5 +1,5 @@ ! { dg-do run } -! { dg-skip-if "" { *-*-mingw* spu-*-* } { "*" } { "" } } +! { dg-skip-if "" { *-*-mingw* spu-*-* } } ! { dg-options "-std=gnu" } character(len=*), parameter :: f = "testfile_stat_2" integer :: s1(13), r1, s2(13), r2, s3(13), r3, d(13), rd diff --git a/gcc/testsuite/gfortran.dg/transfer_simplify_1.f90 b/gcc/testsuite/gfortran.dg/transfer_simplify_1.f90 index 4f92121a572..8a3340aae90 100644 --- a/gcc/testsuite/gfortran.dg/transfer_simplify_1.f90 +++ b/gcc/testsuite/gfortran.dg/transfer_simplify_1.f90 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-options "-O2" } -! { dg-skip-if "NaN not supported" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "NaN not supported" { spu-*-* } } ! Tests that the PRs caused by the lack of gfc_simplify_transfer are ! now fixed. These were brought together in the meta-bug PR31237 ! (TRANSFER intrinsic). diff --git a/gcc/testsuite/gfortran.dg/typebound_operator_9.f03 b/gcc/testsuite/gfortran.dg/typebound_operator_9.f03 index 6e625262c31..e4c6b6e4e5b 100644 --- a/gcc/testsuite/gfortran.dg/typebound_operator_9.f03 +++ b/gcc/testsuite/gfortran.dg/typebound_operator_9.f03 @@ -1,6 +1,6 @@ ! { dg-do run } ! { dg-add-options ieee } -! { dg-skip-if "Too big for local store" { spu-*-* } { "*" } { "" } } +! { dg-skip-if "Too big for local store" { spu-*-* } } ! ! Solve a diffusion problem using an object-oriented approach ! diff --git a/gcc/testsuite/gfortran.dg/vect/fast-math-pr38968.f90 b/gcc/testsuite/gfortran.dg/vect/fast-math-pr38968.f90 index c34a077e430..f5bc41a573b 100644 --- a/gcc/testsuite/gfortran.dg/vect/fast-math-pr38968.f90 +++ b/gcc/testsuite/gfortran.dg/vect/fast-math-pr38968.f90 @@ -1,7 +1,7 @@ ! Skip this on platforms that don't have the vectorization instructions ! to handle complex types. This test is very slow on these platforms so ! skipping is better then running it unvectorized. -! { dg-skip-if "" { ia64-*-* sparc*-*-* } { "*" } { "" } } +! { dg-skip-if "" { ia64-*-* sparc*-*-* } } ! It can be slow on some x86 CPUs. ! { dg-timeout-factor 2 } program mymatmul diff --git a/gcc/testsuite/gnat.dg/debug11_pkg.adb b/gcc/testsuite/gnat.dg/debug11_pkg.adb new file mode 100644 index 00000000000..336f2fd69be --- /dev/null +++ b/gcc/testsuite/gnat.dg/debug11_pkg.adb @@ -0,0 +1,26 @@ +-- { dg-options "-cargs -g -dA -margs" } +-- { dg-final { scan-assembler "local_imported_func" } } +-- { dg-final { scan-assembler "local_imported_var" } } +-- { dg-final { scan-assembler "global_imported_func" } } +-- { dg-final { scan-assembler "global_imported_var" } } +-- { dg-final { scan-assembler-not "foreign_imported_func" } } +-- { dg-final { scan-assembler-not "foreign_imported_var" } } + +with Debug11_Pkg2; + +package body Debug11_Pkg is + + procedure Dummy is + Local_Imported_Var : Integer; + pragma Import (C, Local_Imported_Var, "imported_var"); + + function Local_Imported_Func return Integer; + pragma Import (C, Local_Imported_Func, "imported_func"); + begin + Local_Imported_Var := Local_Imported_Func; + Global_Imported_Var := Global_Imported_Func; + Debug11_Pkg2.Foreign_Imported_Var := + Debug11_Pkg2.Foreign_Imported_Func; + end Dummy; + +end Debug11_Pkg; diff --git a/gcc/testsuite/gnat.dg/debug11_pkg.ads b/gcc/testsuite/gnat.dg/debug11_pkg.ads new file mode 100644 index 00000000000..dc453100d41 --- /dev/null +++ b/gcc/testsuite/gnat.dg/debug11_pkg.ads @@ -0,0 +1,11 @@ +package Debug11_Pkg is + + Global_Imported_Var : Integer; + pragma Import (C, Global_Imported_Var, "imported_var"); + + function Global_Imported_Func return Integer; + pragma Import (C, Global_Imported_Func, "imported_func"); + + procedure Dummy; + +end Debug11_Pkg; diff --git a/gcc/testsuite/gnat.dg/debug11_pkg2.ads b/gcc/testsuite/gnat.dg/debug11_pkg2.ads new file mode 100644 index 00000000000..350f51c5b40 --- /dev/null +++ b/gcc/testsuite/gnat.dg/debug11_pkg2.ads @@ -0,0 +1,9 @@ +package Debug11_Pkg2 is + + Foreign_Imported_Var : Integer; + pragma Import (C, Foreign_Imported_Var, "imported_var"); + + function Foreign_Imported_Func return Integer; + pragma Import (C, Foreign_Imported_Func, "imported_func"); + +end Debug11_Pkg2; diff --git a/gcc/testsuite/gnat.dg/debug7.adb b/gcc/testsuite/gnat.dg/debug7.adb index 3defc2c5f20..41728ea743f 100644 --- a/gcc/testsuite/gnat.dg/debug7.adb +++ b/gcc/testsuite/gnat.dg/debug7.adb @@ -1,5 +1,5 @@ -- { dg-do compile } --- { dg-skip-if "No dwarf-2 support" { hppa*-*-hpux* } "*" "" } +-- { dg-skip-if "No dwarf-2 support" { hppa*-*-hpux* } } -- { dg-options "-cargs -gdwarf-2 -gstrict-dwarf -dA -margs" } -- { dg-final { scan-assembler "DW_TAG_imported_decl" } } diff --git a/gcc/testsuite/gnat.dg/debug9.adb b/gcc/testsuite/gnat.dg/debug9.adb index eaf370058a9..ec11af1f690 100644 --- a/gcc/testsuite/gnat.dg/debug9.adb +++ b/gcc/testsuite/gnat.dg/debug9.adb @@ -7,7 +7,7 @@ -- some hackish way to check that types are output in the proper context (i.e. -- at global or local scope). -- --- { dg-skip-if "No dwarf-4 support" { hppa*-*-hpux* } "*" "" } +-- { dg-skip-if "No dwarf-4 support" { hppa*-*-hpux* } } -- { dg-options "-cargs -gdwarf-4 -fdebug-types-section -dA -margs" } -- { dg-final { scan-assembler-times "\\(DIE \\(0x\[a-f0-9\]*\\) DW_TAG_type_unit\\)" 0 } } diff --git a/gcc/testsuite/go.test/go-test.exp b/gcc/testsuite/go.test/go-test.exp index 5f6ef299e55..4b10e4e2d16 100644 --- a/gcc/testsuite/go.test/go-test.exp +++ b/gcc/testsuite/go.test/go-test.exp @@ -213,29 +213,27 @@ proc go-set-goarch { } { #error FOO #endif }] { - set goarch "mipso32" + set goarch "mips" } elseif [check_no_compiler_messages mipsn32 assembly { #if _MIPS_SIM != _ABIN32 #error FOO #endif }] { - set goarch "mipsn32" + set goarch "mips64p32" } elseif [check_no_compiler_messages mipsn64 assembly { #if _MIPS_SIM != _ABI64 #error FOO #endif }] { - set goarch "mipsn64" - } elseif [check_no_compiler_messages mipso64 assembly { - #if _MIPS_SIM != _ABIO64 - #error FOO - #endif - }] { - set goarch "mipso64" + set goarch "mips64" } else { perror "$target_triplet: unrecognized MIPS ABI" return "" } + + if [istarget "mips*el-*-*"] { + append goarch "le" + } } "powerpc*-*-*" { if [check_effective_target_ilp32] { diff --git a/gcc/testsuite/jit.dg/test-operator-overloading.cc b/gcc/testsuite/jit.dg/test-operator-overloading.cc index cbb1e98e1c3..f57b3fce3c5 100644 --- a/gcc/testsuite/jit.dg/test-operator-overloading.cc +++ b/gcc/testsuite/jit.dg/test-operator-overloading.cc @@ -272,8 +272,7 @@ make_test_quadratic (quadratic_test &testcase) void create_code (gcc_jit_context *ctxt, void *user_data) { - struct quadratic_test testcase; - memset (&testcase, 0, sizeof (testcase)); + struct quadratic_test testcase = {}; testcase.ctxt = ctxt; make_types (testcase); make_sqrt (testcase); diff --git a/gcc/testsuite/jit.dg/test-quadratic.cc b/gcc/testsuite/jit.dg/test-quadratic.cc index f3476696f03..61b5cdd57b2 100644 --- a/gcc/testsuite/jit.dg/test-quadratic.cc +++ b/gcc/testsuite/jit.dg/test-quadratic.cc @@ -328,8 +328,7 @@ make_test_quadratic (quadratic_test &testcase) void create_code (gcc_jit_context *ctxt, void *user_data) { - struct quadratic_test testcase; - memset (&testcase, 0, sizeof (testcase)); + struct quadratic_test testcase = {}; testcase.ctxt = ctxt; make_types (testcase); make_sqrt (testcase); diff --git a/gcc/testsuite/lib/profopt.exp b/gcc/testsuite/lib/profopt.exp index 6519c44ce33..0ea8e7a048e 100644 --- a/gcc/testsuite/lib/profopt.exp +++ b/gcc/testsuite/lib/profopt.exp @@ -249,6 +249,7 @@ proc profopt-get-options { src } { set cmd [lindex $op 0] if { ![string compare "dg-options" $cmd] \ || ![string compare "dg-additional-options" $cmd] \ + || ![string compare "dg-add-options" $cmd] \ || ![string compare "dg-skip-if" $cmd] \ || ![string compare "dg-final-generate" $cmd] \ || ![string compare "dg-final-use" $cmd] \ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 31701c23e8f..502986e71fb 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -7249,6 +7249,17 @@ proc add_options_for_double_vectors { flags } { return $flags } +# Add to FLAGS the flags needed to define the STACK_SIZE macro. + +proc add_options_for_stack_size { flags } { + if [is-effective-target stack_size] { + set stack_size [dg-effective-target-value stack_size] + return "$flags -DSTACK_SIZE=$stack_size" + } + + return $flags +} + # Return 1 if the target provides a full C99 runtime. proc check_effective_target_c99_runtime { } { diff --git a/gcc/testsuite/obj-c++.dg/dwarf-2.mm b/gcc/testsuite/obj-c++.dg/dwarf-2.mm index 3720a8871ed..9994df4be21 100644 --- a/gcc/testsuite/obj-c++.dg/dwarf-2.mm +++ b/gcc/testsuite/obj-c++.dg/dwarf-2.mm @@ -1,4 +1,4 @@ /* { dg-options "-gdwarf-2 -dA" } */ -/* { dg-skip-if "No Dwarf" { { hppa*-*-hpux* } && { ! hppa*64*-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "No Dwarf" { { hppa*-*-hpux* } && { ! hppa*64*-*-* } } } */ /* { dg-final { scan-assembler "0x11\[^0-9a-f\].*DW_AT_language" } } */ int x; diff --git a/gcc/testsuite/obj-c++.dg/lto/trivial-1_0.mm b/gcc/testsuite/obj-c++.dg/lto/trivial-1_0.mm index 744a017bef6..55f62f03cfc 100644 --- a/gcc/testsuite/obj-c++.dg/lto/trivial-1_0.mm +++ b/gcc/testsuite/obj-c++.dg/lto/trivial-1_0.mm @@ -1,5 +1,5 @@ /* { dg-lto-do run } */ -/* { dg-skip-if "Needs OBJC2 ABI" { "*-*-darwin*" && lp64 } { "*" } { "" } } */ +/* { dg-skip-if "Needs OBJC2 ABI" { "*-*-darwin*" && lp64 } } */ extern "C" { extern int printf (const char *,...) ; extern void abort (void) ; diff --git a/gcc/testsuite/obj-c++.dg/tls/static-1a.mm b/gcc/testsuite/obj-c++.dg/tls/static-1a.mm index 40974205fd9..a19aba290e9 100644 --- a/gcc/testsuite/obj-c++.dg/tls/static-1a.mm +++ b/gcc/testsuite/obj-c++.dg/tls/static-1a.mm @@ -1,4 +1,4 @@ -// { dg-skip-if "Additional Source File" *-*-* "*" "" } +// { dg-skip-if "Additional Source File" *-*-* } // This is the additional source file for test static-1.mm struct A diff --git a/gcc/testsuite/objc.dg/dwarf-1.m b/gcc/testsuite/objc.dg/dwarf-1.m index 3bfabbae475..d411c3cf1e8 100644 --- a/gcc/testsuite/objc.dg/dwarf-1.m +++ b/gcc/testsuite/objc.dg/dwarf-1.m @@ -1,6 +1,6 @@ /* { dg-options "-gdwarf-2 -dA" } */ /* { dg-final { scan-assembler "\"id.0\".*DW_AT_name" } } */ -/* { dg-skip-if "No Dwarf" { { *-*-aix* hppa*-*-hpux* } && { ! hppa*64*-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "No Dwarf" { { *-*-aix* hppa*-*-hpux* } && { ! hppa*64*-*-* } } } */ @interface foo id x; @end diff --git a/gcc/testsuite/objc.dg/dwarf-2.m b/gcc/testsuite/objc.dg/dwarf-2.m index 967f5159013..c394c598874 100644 --- a/gcc/testsuite/objc.dg/dwarf-2.m +++ b/gcc/testsuite/objc.dg/dwarf-2.m @@ -1,4 +1,4 @@ /* { dg-options "-gdwarf-2 -dA -gno-strict-dwarf" } */ /* { dg-final { scan-assembler "0x10\[^0-9a-f\].*DW_AT_language" } } */ -/* { dg-skip-if "No Dwarf" { { *-*-aix* hppa*-*-hpux* } && { ! hppa*64*-*-* } } { "*" } { "" } } */ +/* { dg-skip-if "No Dwarf" { { *-*-aix* hppa*-*-hpux* } && { ! hppa*64*-*-* } } } */ int x; diff --git a/gcc/testsuite/objc.dg/lto/trivial-1_0.m b/gcc/testsuite/objc.dg/lto/trivial-1_0.m index 076f2306c1b..ba1b1aa8b35 100644 --- a/gcc/testsuite/objc.dg/lto/trivial-1_0.m +++ b/gcc/testsuite/objc.dg/lto/trivial-1_0.m @@ -1,5 +1,5 @@ /* { dg-lto-do run } */ -/* { dg-skip-if "" { "*-*-darwin*" && lp64 } { "*" } { "" } } */ +/* { dg-skip-if "" { "*-*-darwin*" && lp64 } } */ extern int printf (char *,...) ; typedef struct objc_class *Class; diff --git a/gcc/tree-cfg.c b/gcc/tree-cfg.c index c84e99d0945..589508df044 100644 --- a/gcc/tree-cfg.c +++ b/gcc/tree-cfg.c @@ -60,6 +60,7 @@ along with GCC; see the file COPYING3. If not see #include "gimplify.h" #include "attribs.h" #include "selftest.h" +#include "opts.h" /* This file contains functions for building the Control Flow Graph (CFG) for a function tree. */ @@ -2176,7 +2177,7 @@ remove_bb (basic_block bb) with it. */ if (loop->latch == bb || loop->header == bb) - free_numbers_of_iterations_estimates_loop (loop); + free_numbers_of_iterations_estimates (loop); } /* Remove all the instructions in the block. */ @@ -7555,6 +7556,25 @@ dump_default_def (FILE *file, tree def, int spc, dump_flags_t flags) fprintf (file, ";\n"); } +/* Print no_sanitize attribute to FILE for a given attribute VALUE. */ + +static void +print_no_sanitize_attr_value (FILE *file, tree value) +{ + unsigned int flags = tree_to_uhwi (value); + bool first = true; + for (int i = 0; sanitizer_opts[i].name != NULL; ++i) + { + if ((sanitizer_opts[i].flag & flags) == sanitizer_opts[i].flag) + { + if (!first) + fprintf (file, " | "); + fprintf (file, "%s", sanitizer_opts[i].name); + first = false; + } + } +} + /* Dump FUNCTION_DECL FN to file FILE using FLAGS (see TDF_* in dumpfile.h) */ @@ -7582,11 +7602,16 @@ dump_function_to_file (tree fndecl, FILE *file, dump_flags_t flags) if (!first) fprintf (file, ", "); - print_generic_expr (file, get_attribute_name (chain), dump_flags); + tree name = get_attribute_name (chain); + print_generic_expr (file, name, dump_flags); if (TREE_VALUE (chain) != NULL_TREE) { fprintf (file, " ("); - print_generic_expr (file, TREE_VALUE (chain), dump_flags); + + if (strstr (IDENTIFIER_POINTER (name), "no_sanitize")) + print_no_sanitize_attr_value (file, TREE_VALUE (chain)); + else + print_generic_expr (file, TREE_VALUE (chain), dump_flags); fprintf (file, ")"); } } diff --git a/gcc/tree-cfgcleanup.c b/gcc/tree-cfgcleanup.c index 94a172fa98e..8bb5e237395 100644 --- a/gcc/tree-cfgcleanup.c +++ b/gcc/tree-cfgcleanup.c @@ -839,7 +839,12 @@ cleanup_tree_cfg_noloop (void) timevar_pop (TV_TREE_CLEANUP_CFG); if (changed && current_loops) - loops_state_set (LOOPS_NEED_FIXUP); + { + /* Removing edges and/or blocks may make recorded bounds refer + to stale GIMPLE stmts now, so clear them. */ + free_numbers_of_iterations_estimates (cfun); + loops_state_set (LOOPS_NEED_FIXUP); + } return changed; } @@ -959,7 +964,7 @@ remove_forwarder_block_with_phi (basic_block bb) { dest->loop_father->any_upper_bound = false; dest->loop_father->any_likely_upper_bound = false; - free_numbers_of_iterations_estimates_loop (dest->loop_father); + free_numbers_of_iterations_estimates (dest->loop_father); } } diff --git a/gcc/tree-chkp.c b/gcc/tree-chkp.c index ecac901d52b..e241f50f308 100644 --- a/gcc/tree-chkp.c +++ b/gcc/tree-chkp.c @@ -690,9 +690,8 @@ chkp_erase_completed_bounds (void) static tree chkp_get_hard_register_var_fake_base_address () { - tree base = fold_convert (ptr_type_node, integer_zero_node); - unsigned HOST_WIDE_INT offset = 1 << (TYPE_PRECISION (ptr_type_node) - 1); - return fold_build_pointer_plus_hwi (base, offset); + int prec = TYPE_PRECISION (ptr_type_node); + return wide_int_to_tree (ptr_type_node, wi::min_value (prec, SIGNED)); } /* If we check bounds for a hard register variable, we cannot diff --git a/gcc/tree-parloops.c b/gcc/tree-parloops.c index 641f675edf7..79d616b760a 100644 --- a/gcc/tree-parloops.c +++ b/gcc/tree-parloops.c @@ -2436,8 +2436,7 @@ gen_parallel_loop (struct loop *loop, /* Free loop bound estimations that could contain references to removed statements. */ - FOR_EACH_LOOP (loop, 0) - free_numbers_of_iterations_estimates_loop (loop); + free_numbers_of_iterations_estimates (cfun); } /* Returns true when LOOP contains vector phi nodes. */ diff --git a/gcc/tree-pass.h b/gcc/tree-pass.h index 0f7d936e64b..2863f769610 100644 --- a/gcc/tree-pass.h +++ b/gcc/tree-pass.h @@ -373,7 +373,6 @@ extern gimple_opt_pass *make_pass_predcom (gcc::context *ctxt); extern gimple_opt_pass *make_pass_iv_canon (gcc::context *ctxt); extern gimple_opt_pass *make_pass_scev_cprop (gcc::context *ctxt); extern gimple_opt_pass *make_pass_empty_loop (gcc::context *ctxt); -extern gimple_opt_pass *make_pass_record_bounds (gcc::context *ctxt); extern gimple_opt_pass *make_pass_graphite (gcc::context *ctxt); extern gimple_opt_pass *make_pass_graphite_transforms (gcc::context *ctxt); extern gimple_opt_pass *make_pass_if_conversion (gcc::context *ctxt); diff --git a/gcc/tree-scalar-evolution.c b/gcc/tree-scalar-evolution.c index 95f65b042b7..8459793a01b 100644 --- a/gcc/tree-scalar-evolution.c +++ b/gcc/tree-scalar-evolution.c @@ -3636,6 +3636,7 @@ scev_finalize (void) return; scalar_evolution_info->empty (); scalar_evolution_info = NULL; + free_numbers_of_iterations_estimates (cfun); } /* Returns true if the expression EXPR is considered to be too expensive diff --git a/gcc/tree-sra.c b/gcc/tree-sra.c index f25818f4481..c9865c6eb31 100644 --- a/gcc/tree-sra.c +++ b/gcc/tree-sra.c @@ -470,7 +470,7 @@ dump_access_tree_1 (FILE *f, struct access *access, int level) int i; for (i = 0; i < level; i++) - fputs ("* ", dump_file); + fputs ("* ", f); dump_access (f, access, true); @@ -627,7 +627,7 @@ relink_to_new_repr (struct access *new_racc, struct access *old_racc) static void add_access_to_work_queue (struct access *access) { - if (!access->grp_queued) + if (access->first_link && !access->grp_queued) { gcc_assert (!access->next_queued); access->next_queued = work_queue_head; @@ -2112,8 +2112,7 @@ sort_and_splice_var_accesses (tree var) access->grp_total_scalarization = total_scalarization; access->grp_partial_lhs = grp_partial_lhs; access->grp_unscalarizable_region = unscalarizable_region; - if (access->first_link) - add_access_to_work_queue (access); + add_access_to_work_queue (access); *prev_acc_ptr = access; prev_acc_ptr = &access->next_grp; @@ -2559,9 +2558,28 @@ create_artificial_child_access (struct access *parent, struct access *model, } -/* Propagate all subaccesses of RACC across an assignment link to LACC. Return - true if any new subaccess was created. Additionally, if RACC is a scalar - access but LACC is not, change the type of the latter, if possible. */ +/* Beginning with ACCESS, traverse its whole access subtree and mark all + sub-trees as written to. If any of them has not been marked so previously + and has assignment links leading from it, re-enqueue it. */ + +static void +subtree_mark_written_and_enqueue (struct access *access) +{ + if (access->grp_write) + return; + access->grp_write = true; + add_access_to_work_queue (access); + + struct access *child; + for (child = access->first_child; child; child = child->next_sibling) + subtree_mark_written_and_enqueue (child); +} + +/* Propagate subaccesses and grp_write flags of RACC across an assignment link + to LACC. Enqueue sub-accesses as necessary so that the write flag is + propagated transitively. Return true if anything changed. Additionally, if + RACC is a scalar access but LACC is not, change the type of the latter, if + possible. */ static bool propagate_subaccesses_across_link (struct access *lacc, struct access *racc) @@ -2577,7 +2595,7 @@ propagate_subaccesses_across_link (struct access *lacc, struct access *racc) gcc_checking_assert (!comes_initialized_p (racc->base)); if (racc->grp_write) { - lacc->grp_write = true; + subtree_mark_written_and_enqueue (lacc); ret = true; } } @@ -2586,13 +2604,21 @@ propagate_subaccesses_across_link (struct access *lacc, struct access *racc) || lacc->grp_unscalarizable_region || racc->grp_unscalarizable_region) { - ret |= !lacc->grp_write; - lacc->grp_write = true; + if (!lacc->grp_write) + { + ret = true; + subtree_mark_written_and_enqueue (lacc); + } return ret; } if (is_gimple_reg_type (racc->type)) { + if (!lacc->grp_write) + { + ret = true; + subtree_mark_written_and_enqueue (lacc); + } if (!lacc->first_child && !racc->first_child) { tree t = lacc->base; @@ -2617,21 +2643,15 @@ propagate_subaccesses_across_link (struct access *lacc, struct access *racc) struct access *new_acc = NULL; HOST_WIDE_INT norm_offset = rchild->offset + norm_delta; - if (rchild->grp_unscalarizable_region) - { - lacc->grp_write = true; - continue; - } - if (child_would_conflict_in_lacc (lacc, norm_offset, rchild->size, &new_acc)) { if (new_acc) { - if (!new_acc->grp_write - && (lacc->grp_write || rchild->grp_write)) + if (!new_acc->grp_write && rchild->grp_write) { - new_acc ->grp_write = true; + gcc_assert (!lacc->grp_write); + subtree_mark_written_and_enqueue (new_acc); ret = true; } @@ -2641,7 +2661,23 @@ propagate_subaccesses_across_link (struct access *lacc, struct access *racc) ret |= propagate_subaccesses_across_link (new_acc, rchild); } else - lacc->grp_write = true; + { + if (rchild->grp_write && !lacc->grp_write) + { + ret = true; + subtree_mark_written_and_enqueue (lacc); + } + } + continue; + } + + if (rchild->grp_unscalarizable_region) + { + if (rchild->grp_write && !lacc->grp_write) + { + ret = true; + subtree_mark_written_and_enqueue (lacc); + } continue; } @@ -2649,37 +2685,17 @@ propagate_subaccesses_across_link (struct access *lacc, struct access *racc) new_acc = create_artificial_child_access (lacc, rchild, norm_offset, lacc->grp_write || rchild->grp_write); - if (new_acc) - { - ret = true; - if (racc->first_child) - propagate_subaccesses_across_link (new_acc, rchild); - } + gcc_checking_assert (new_acc); + if (racc->first_child) + propagate_subaccesses_across_link (new_acc, rchild); + + add_access_to_work_queue (lacc); + ret = true; } return ret; } -/* Beginning with ACCESS, traverse its whole access subtree and mark all - sub-trees as written to. If any of them has not been marked so previously - and has assignment links leading from it, re-enqueue it. */ - -static void -subtree_mark_written_and_enqueue (struct access *access) -{ - if (access->grp_write) - return; - access->grp_write = true; - if (access->first_link) - add_access_to_work_queue (access); - - struct access *child; - for (child = access->first_child; child; child = child->next_sibling) - subtree_mark_written_and_enqueue (child); -} - - - /* Propagate all subaccesses across assignment links. */ static void @@ -2715,11 +2731,7 @@ propagate_all_subaccesses (void) if (reque_parents) do { - if (lacc->first_link) - { - add_access_to_work_queue (lacc); - break; - } + add_access_to_work_queue (lacc); lacc = lacc->parent; } while (lacc); diff --git a/gcc/tree-ssa-loop-ivcanon.c b/gcc/tree-ssa-loop-ivcanon.c index 91787af257c..b6ac765aac6 100644 --- a/gcc/tree-ssa-loop-ivcanon.c +++ b/gcc/tree-ssa-loop-ivcanon.c @@ -529,6 +529,8 @@ remove_exits_and_undefined_stmts (struct loop *loop, unsigned int npeeled) } if (!loop_exit_edge_p (loop, exit_edge)) exit_edge = EDGE_SUCC (bb, 1); + exit_edge->probability = REG_BR_PROB_BASE; + exit_edge->count = exit_edge->src->count; gcc_checking_assert (loop_exit_edge_p (loop, exit_edge)); gcond *cond_stmt = as_a <gcond *> (elt->stmt); if (exit_edge->flags & EDGE_TRUE_VALUE) @@ -853,8 +855,9 @@ try_unroll_loop_completely (struct loop *loop, loop->num); return false; } - dump_printf_loc (report_flags, locus, - "loop turned into non-loop; it never loops.\n"); + if (!n_unroll) + dump_printf_loc (report_flags, locus, + "loop turned into non-loop; it never loops.\n"); initialize_original_copy_tables (); auto_sbitmap wont_exit (n_unroll + 1); @@ -1212,8 +1215,7 @@ canonicalize_induction_variables (void) bool irred_invalidated = false; bitmap loop_closed_ssa_invalidated = BITMAP_ALLOC (NULL); - free_numbers_of_iterations_estimates (cfun); - estimate_numbers_of_iterations (); + estimate_numbers_of_iterations (cfun); FOR_EACH_LOOP (loop, LI_FROM_INNERMOST) { @@ -1230,6 +1232,7 @@ canonicalize_induction_variables (void) /* Clean up the information about numbers of iterations, since brute force evaluation could reveal new information. */ + free_numbers_of_iterations_estimates (cfun); scev_reset (); if (!bitmap_empty_p (loop_closed_ssa_invalidated)) @@ -1358,6 +1361,8 @@ tree_unroll_loops_completely (bool may_increase_size, bool unroll_outer) int iteration = 0; bool irred_invalidated = false; + estimate_numbers_of_iterations (cfun); + do { changed = false; @@ -1367,7 +1372,7 @@ tree_unroll_loops_completely (bool may_increase_size, bool unroll_outer) loop_closed_ssa_invalidated = BITMAP_ALLOC (NULL); free_numbers_of_iterations_estimates (cfun); - estimate_numbers_of_iterations (); + estimate_numbers_of_iterations (cfun); changed = tree_unroll_loops_completely_1 (may_increase_size, unroll_outer, father_bbs, @@ -1585,7 +1590,6 @@ pass_complete_unrolli::execute (function *fun) { scev_initialize (); ret = tree_unroll_loops_completely (optimize >= 3, false); - free_numbers_of_iterations_estimates (fun); scev_finalize (); } loop_optimizer_finalize (); diff --git a/gcc/tree-ssa-loop-niter.c b/gcc/tree-ssa-loop-niter.c index b1f14078b4f..848e812cb96 100644 --- a/gcc/tree-ssa-loop-niter.c +++ b/gcc/tree-ssa-loop-niter.c @@ -3786,8 +3786,8 @@ maybe_lower_iteration_bound (struct loop *loop) /* Records estimates on numbers of iterations of LOOP. If USE_UNDEFINED_P is true also use estimates derived from undefined behavior. */ -static void -estimate_numbers_of_iterations_loop (struct loop *loop) +void +estimate_numbers_of_iterations (struct loop *loop) { vec<edge> exits; tree niter, type; @@ -3876,7 +3876,7 @@ estimated_loop_iterations (struct loop *loop, widest_int *nit) /* When SCEV information is available, try to update loop iterations estimate. Otherwise just return whatever we recorded earlier. */ if (scev_initialized_p ()) - estimate_numbers_of_iterations_loop (loop); + estimate_numbers_of_iterations (loop); return (get_estimated_loop_iterations (loop, nit)); } @@ -3912,7 +3912,7 @@ max_loop_iterations (struct loop *loop, widest_int *nit) /* When SCEV information is available, try to update loop iterations estimate. Otherwise just return whatever we recorded earlier. */ if (scev_initialized_p ()) - estimate_numbers_of_iterations_loop (loop); + estimate_numbers_of_iterations (loop); return get_max_loop_iterations (loop, nit); } @@ -3947,7 +3947,7 @@ likely_max_loop_iterations (struct loop *loop, widest_int *nit) /* When SCEV information is available, try to update loop iterations estimate. Otherwise just return whatever we recorded earlier. */ if (scev_initialized_p ()) - estimate_numbers_of_iterations_loop (loop); + estimate_numbers_of_iterations (loop); return get_likely_max_loop_iterations (loop, nit); } @@ -4051,7 +4051,7 @@ estimated_stmt_executions (struct loop *loop, widest_int *nit) /* Records estimates on numbers of iterations of loops. */ void -estimate_numbers_of_iterations (void) +estimate_numbers_of_iterations (function *fn) { struct loop *loop; @@ -4059,10 +4059,8 @@ estimate_numbers_of_iterations (void) loop iteration estimates. */ fold_defer_overflow_warnings (); - FOR_EACH_LOOP (loop, 0) - { - estimate_numbers_of_iterations_loop (loop); - } + FOR_EACH_LOOP_FN (fn, loop, 0) + estimate_numbers_of_iterations (loop); fold_undefer_and_ignore_overflow_warnings (); } @@ -4235,7 +4233,7 @@ loop_exits_before_overflow (tree base, tree step, valid_niter = fold_build2 (FLOOR_DIV_EXPR, unsigned_type, delta, step_abs); - estimate_numbers_of_iterations_loop (loop); + estimate_numbers_of_iterations (loop); if (max_loop_iterations (loop, &niter) && wi::fits_to_tree_p (niter, TREE_TYPE (valid_niter)) @@ -4502,7 +4500,7 @@ scev_probably_wraps_p (tree var, tree base, tree step, /* Frees the information on upper bounds on numbers of iterations of LOOP. */ void -free_numbers_of_iterations_estimates_loop (struct loop *loop) +free_numbers_of_iterations_estimates (struct loop *loop) { struct control_iv *civ; struct nb_iter_bound *bound; @@ -4534,9 +4532,7 @@ free_numbers_of_iterations_estimates (function *fn) struct loop *loop; FOR_EACH_LOOP_FN (fn, loop, 0) - { - free_numbers_of_iterations_estimates_loop (loop); - } + free_numbers_of_iterations_estimates (loop); } /* Substitute value VAL for ssa name NAME inside expressions held diff --git a/gcc/tree-ssa-loop-niter.h b/gcc/tree-ssa-loop-niter.h index b0098570d09..8161cc76fd7 100644 --- a/gcc/tree-ssa-loop-niter.h +++ b/gcc/tree-ssa-loop-niter.h @@ -45,13 +45,13 @@ extern HOST_WIDE_INT estimated_stmt_executions_int (struct loop *); extern bool max_stmt_executions (struct loop *, widest_int *); extern bool likely_max_stmt_executions (struct loop *, widest_int *); extern bool estimated_stmt_executions (struct loop *, widest_int *); -extern void estimate_numbers_of_iterations (void); +extern void estimate_numbers_of_iterations (function *); +extern void estimate_numbers_of_iterations (struct loop *); extern bool stmt_dominates_stmt_p (gimple *, gimple *); extern bool nowrap_type_p (tree); extern bool scev_probably_wraps_p (tree, tree, tree, gimple *, struct loop *, bool); -extern void free_loop_control_ivs (struct loop *); -extern void free_numbers_of_iterations_estimates_loop (struct loop *); +extern void free_numbers_of_iterations_estimates (struct loop *); extern void free_numbers_of_iterations_estimates (function *); extern void substitute_in_loop_info (struct loop *, tree, tree); diff --git a/gcc/tree-ssa-loop.c b/gcc/tree-ssa-loop.c index 10c43f32ba3..19a0f30c525 100644 --- a/gcc/tree-ssa-loop.c +++ b/gcc/tree-ssa-loop.c @@ -459,54 +459,6 @@ make_pass_scev_cprop (gcc::context *ctxt) return new pass_scev_cprop (ctxt); } -/* Record bounds on numbers of iterations of loops. */ - -namespace { - -const pass_data pass_data_record_bounds = -{ - GIMPLE_PASS, /* type */ - "*record_bounds", /* name */ - OPTGROUP_NONE, /* optinfo_flags */ - TV_TREE_LOOP_BOUNDS, /* tv_id */ - ( PROP_cfg | PROP_ssa ), /* properties_required */ - 0, /* properties_provided */ - 0, /* properties_destroyed */ - 0, /* todo_flags_start */ - 0, /* todo_flags_finish */ -}; - -class pass_record_bounds : public gimple_opt_pass -{ -public: - pass_record_bounds (gcc::context *ctxt) - : gimple_opt_pass (pass_data_record_bounds, ctxt) - {} - - /* opt_pass methods: */ - virtual unsigned int execute (function *); - -}; // class pass_record_bounds - -unsigned int -pass_record_bounds::execute (function *fun) -{ - if (number_of_loops (fun) <= 1) - return 0; - - estimate_numbers_of_iterations (); - scev_reset (); - return 0; -} - -} // anon namespace - -gimple_opt_pass * -make_pass_record_bounds (gcc::context *ctxt) -{ - return new pass_record_bounds (ctxt); -} - /* Induction variable optimizations. */ namespace { diff --git a/gcc/tree-ssa-phionlycprop.c b/gcc/tree-ssa-phionlycprop.c index aa0f50256cd..9fa427ff2f7 100644 --- a/gcc/tree-ssa-phionlycprop.c +++ b/gcc/tree-ssa-phionlycprop.c @@ -420,10 +420,11 @@ eliminate_degenerate_phis_1 (basic_block bb, bitmap interesting_names, basic_block son; bool cfg_altered = false; - for (gsi = gsi_start_phis (bb); !gsi_end_p (gsi); gsi_next (&gsi)) + for (gsi = gsi_start_phis (bb); !gsi_end_p (gsi);) { gphi *phi = gsi.phi (); - + /* We might end up removing PHI so advance the iterator now. */ + gsi_next (&gsi); cfg_altered |= eliminate_const_or_copy (phi, interesting_names, need_eh_cleanup); } diff --git a/gcc/tree-ssa-sccvn.c b/gcc/tree-ssa-sccvn.c index ff5c800662b..324cd73f513 100644 --- a/gcc/tree-ssa-sccvn.c +++ b/gcc/tree-ssa-sccvn.c @@ -1639,6 +1639,7 @@ vn_reference_lookup_or_insert_for_pieces (tree vuse, } static vn_nary_op_t vn_nary_op_insert_stmt (gimple *stmt, tree result); +static unsigned mprts_hook_cnt; /* Hook for maybe_push_res_to_seq, lookup the expression in the VN tables. */ @@ -1648,8 +1649,22 @@ vn_lookup_simplify_result (code_helper rcode, tree type, tree *ops) if (!rcode.is_tree_code ()) return NULL_TREE; vn_nary_op_t vnresult = NULL; - return vn_nary_op_lookup_pieces (TREE_CODE_LENGTH ((tree_code) rcode), - (tree_code) rcode, type, ops, &vnresult); + tree res = vn_nary_op_lookup_pieces (TREE_CODE_LENGTH ((tree_code) rcode), + (tree_code) rcode, type, ops, &vnresult); + /* We can end up endlessly recursing simplifications if the lookup above + presents us with a def-use chain that mirrors the original simplification. + See PR80887 for an example. Limit successful lookup artificially + to 10 times if we are called as mprts_hook. */ + if (res + && mprts_hook + && --mprts_hook_cnt == 0) + { + if (dump_file && (dump_flags & TDF_DETAILS)) + fprintf (dump_file, "Resetting mprts_hook after too many " + "invocations.\n"); + mprts_hook = NULL; + } + return res; } /* Return a value-number for RCODE OPS... either by looking up an existing @@ -1666,6 +1681,7 @@ vn_nary_build_or_lookup_1 (code_helper rcode, tree type, tree *ops, So first simplify and lookup this expression to see if it is already available. */ mprts_hook = vn_lookup_simplify_result; + mprts_hook_cnt = 9; bool res = false; switch (TREE_CODE_LENGTH ((tree_code) rcode)) { @@ -2035,7 +2051,9 @@ vn_reference_lookup_3 (ao_ref *ref, tree vuse, void *vr_, ops[1] = bitsize_int (ref->size); ops[2] = bitsize_int (offset - offset2); tree val = vn_nary_build_or_lookup (rcode, vr->type, ops); - if (val) + if (val + && (TREE_CODE (val) != SSA_NAME + || ! SSA_NAME_OCCURS_IN_ABNORMAL_PHI (val))) { vn_reference_t res = vn_reference_lookup_or_insert_for_pieces (vuse, vr->set, vr->type, vr->operands, val); @@ -3894,6 +3912,7 @@ try_to_simplify (gassign *stmt) /* First try constant folding based on our current lattice. */ mprts_hook = vn_lookup_simplify_result; + mprts_hook_cnt = 9; tem = gimple_fold_stmt_to_constant_1 (stmt, vn_valueize, vn_valueize); mprts_hook = NULL; if (tem diff --git a/gcc/tree-ssa-structalias.c b/gcc/tree-ssa-structalias.c index a4abd28c57a..e563e9dee72 100644 --- a/gcc/tree-ssa-structalias.c +++ b/gcc/tree-ssa-structalias.c @@ -3087,7 +3087,7 @@ get_constraint_for_ptr_offset (tree ptr, tree offset, { /* Make sure the bit-offset also fits. */ HOST_WIDE_INT rhsunitoffset = soffset.to_shwi (); - rhsoffset = rhsunitoffset * BITS_PER_UNIT; + rhsoffset = rhsunitoffset * (unsigned HOST_WIDE_INT) BITS_PER_UNIT; if (rhsunitoffset != rhsoffset / BITS_PER_UNIT) rhsoffset = UNKNOWN_OFFSET; } diff --git a/gcc/tree-ssa-tail-merge.c b/gcc/tree-ssa-tail-merge.c index c86148bc832..f6c9878a0a3 100644 --- a/gcc/tree-ssa-tail-merge.c +++ b/gcc/tree-ssa-tail-merge.c @@ -1555,29 +1555,51 @@ replace_block_by (basic_block bb1, basic_block bb2) pred_edge, UNKNOWN_LOCATION); } - bb2->frequency += bb1->frequency; - if (bb2->frequency > BB_FREQ_MAX) - bb2->frequency = BB_FREQ_MAX; - bb2->count += bb1->count; /* Merge the outgoing edge counts from bb1 onto bb2. */ profile_count out_sum = profile_count::zero (); + int out_freq_sum = 0; + + /* Recompute the edge probabilities from the new merged edge count. + Use the sum of the new merged edge counts computed above instead + of bb2's merged count, in case there are profile count insanities + making the bb count inconsistent with the edge weights. */ + FOR_EACH_EDGE (e1, ei, bb1->succs) + { + if (e1->count.initialized_p ()) + out_sum += e1->count; + out_freq_sum += EDGE_FREQUENCY (e1); + } + FOR_EACH_EDGE (e1, ei, bb2->succs) + { + if (e1->count.initialized_p ()) + out_sum += e1->count; + out_freq_sum += EDGE_FREQUENCY (e1); + } + FOR_EACH_EDGE (e1, ei, bb1->succs) { e2 = find_edge (bb2, e1->dest); gcc_assert (e2); e2->count += e1->count; + if (out_sum > 0 && e2->count.initialized_p ()) + { + e2->probability = e2->count.probability_in (bb2->count); + } + else if (bb1->frequency && bb2->frequency) + e2->probability = e1->probability; + else if (bb2->frequency && !bb1->frequency) + ; + else if (out_freq_sum) + e2->probability = GCOV_COMPUTE_SCALE (EDGE_FREQUENCY (e1) + + EDGE_FREQUENCY (e2), + out_freq_sum); out_sum += e2->count; } - /* Recompute the edge probabilities from the new merged edge count. - Use the sum of the new merged edge counts computed above instead - of bb2's merged count, in case there are profile count insanities - making the bb count inconsistent with the edge weights. */ - FOR_EACH_EDGE (e2, ei, bb2->succs) - { - e2->probability = e2->count.probability_in (out_sum); - } + bb2->frequency += bb1->frequency; + if (bb2->frequency > BB_FREQ_MAX) + bb2->frequency = BB_FREQ_MAX; /* Move over any user labels from bb1 after the bb2 labels. */ gimple_stmt_iterator gsi1 = gsi_start_bb (bb1); diff --git a/gcc/tree-ssa.c b/gcc/tree-ssa.c index 45b9951bf25..fa8f81e9a1a 100644 --- a/gcc/tree-ssa.c +++ b/gcc/tree-ssa.c @@ -142,21 +142,24 @@ ssa_redirect_edge (edge e, basic_block dest) redirect_edge_var_map_clear (e); - /* Remove the appropriate PHI arguments in E's destination block. */ - for (gsi = gsi_start_phis (e->dest); !gsi_end_p (gsi); gsi_next (&gsi)) - { - tree def; - source_location locus ; - - phi = gsi.phi (); - def = gimple_phi_arg_def (phi, e->dest_idx); - locus = gimple_phi_arg_location (phi, e->dest_idx); - - if (def == NULL_TREE) - continue; - - redirect_edge_var_map_add (e, gimple_phi_result (phi), def, locus); - } + /* Remove the appropriate PHI arguments in E's destination block. + If we are redirecting a copied edge the destination has not + got PHI argument space reserved nor an interesting argument. */ + if (! (e->dest->flags & BB_DUPLICATED)) + for (gsi = gsi_start_phis (e->dest); !gsi_end_p (gsi); gsi_next (&gsi)) + { + tree def; + source_location locus ; + + phi = gsi.phi (); + def = gimple_phi_arg_def (phi, e->dest_idx); + locus = gimple_phi_arg_location (phi, e->dest_idx); + + if (def == NULL_TREE) + continue; + + redirect_edge_var_map_add (e, gimple_phi_result (phi), def, locus); + } e = redirect_edge_succ_nodup (e, dest); diff --git a/gcc/tree-switch-conversion.c b/gcc/tree-switch-conversion.c index 66db20fe7bc..72e53af773f 100644 --- a/gcc/tree-switch-conversion.c +++ b/gcc/tree-switch-conversion.c @@ -268,7 +268,7 @@ static void emit_case_bit_tests (gswitch *swtch, tree index_expr, tree minval, tree range, tree maxval) { - struct case_bit_test test[MAX_CASE_BIT_TESTS]; + struct case_bit_test test[MAX_CASE_BIT_TESTS] = { {} }; unsigned int i, j, k; unsigned int count; @@ -293,8 +293,6 @@ emit_case_bit_tests (gswitch *swtch, tree index_expr, int prec = TYPE_PRECISION (word_type_node); wide_int wone = wi::one (prec); - memset (&test, 0, sizeof (test)); - /* Get the edge for the default case. */ tmp = gimple_switch_default_label (swtch); default_bb = label_to_block (CASE_LABEL (tmp)); diff --git a/gcc/tree-tailcall.c b/gcc/tree-tailcall.c index b7053387e91..6aa9a56462e 100644 --- a/gcc/tree-tailcall.c +++ b/gcc/tree-tailcall.c @@ -421,6 +421,7 @@ find_tail_calls (basic_block bb, struct tailcall **ret) if (gimple_code (stmt) == GIMPLE_LABEL || gimple_code (stmt) == GIMPLE_RETURN || gimple_code (stmt) == GIMPLE_NOP + || gimple_code (stmt) == GIMPLE_PREDICT || gimple_clobber_p (stmt) || is_gimple_debug (stmt)) continue; @@ -555,6 +556,7 @@ find_tail_calls (basic_block bb, struct tailcall **ret) if (gimple_code (stmt) == GIMPLE_LABEL || gimple_code (stmt) == GIMPLE_NOP + || gimple_code (stmt) == GIMPLE_PREDICT || gimple_clobber_p (stmt) || is_gimple_debug (stmt)) continue; diff --git a/gcc/tree-vect-loop.c b/gcc/tree-vect-loop.c index cf9cd3b5073..a7c3d3d7e29 100644 --- a/gcc/tree-vect-loop.c +++ b/gcc/tree-vect-loop.c @@ -1570,7 +1570,7 @@ vect_analyze_loop_form (struct loop *loop) some assumptions. In order to do this, we need to clear existing information computed by scev and niter analyzer. */ scev_reset_htab (); - free_numbers_of_iterations_estimates_loop (loop); + free_numbers_of_iterations_estimates (loop); /* Also set flag for this loop so that following scev and niter analysis are done under the assumptions. */ loop_constraint_set (loop, LOOP_C_FINITE); @@ -3690,16 +3690,15 @@ get_reduction_op (gimple *stmt, int reduc_index) generated within the strip-mine loop, the initial definition before the loop, and the epilogue code that must be generated. */ -static bool +static void vect_model_reduction_cost (stmt_vec_info stmt_info, enum tree_code reduc_code, - int ncopies, int reduc_index) + int ncopies) { int prologue_cost = 0, epilogue_cost = 0; enum tree_code code; optab optab; tree vectype; - gimple *stmt, *orig_stmt; - tree reduction_op; + gimple *orig_stmt; machine_mode mode; loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_info); struct loop *loop = NULL; @@ -3720,24 +3719,8 @@ vect_model_reduction_cost (stmt_vec_info stmt_info, enum tree_code reduc_code, /* Cost of reduction op inside loop. */ unsigned inside_cost = add_stmt_cost (target_cost_data, ncopies, vector_stmt, stmt_info, 0, vect_body); - stmt = STMT_VINFO_STMT (stmt_info); - - reduction_op = get_reduction_op (stmt, reduc_index); - - vectype = get_vectype_for_scalar_type (TREE_TYPE (reduction_op)); - if (!vectype) - { - if (dump_enabled_p ()) - { - dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location, - "unsupported data-type "); - dump_generic_expr (MSG_MISSED_OPTIMIZATION, TDF_SLIM, - TREE_TYPE (reduction_op)); - dump_printf (MSG_MISSED_OPTIMIZATION, "\n"); - } - return false; - } + vectype = STMT_VINFO_VECTYPE (stmt_info); mode = TYPE_MODE (vectype); orig_stmt = STMT_VINFO_RELATED_STMT (stmt_info); @@ -3789,6 +3772,18 @@ vect_model_reduction_cost (stmt_vec_info stmt_info, enum tree_code reduc_code, vect_epilogue); } } + else if (STMT_VINFO_VEC_REDUCTION_TYPE (stmt_info) == COND_REDUCTION) + { + unsigned nunits = TYPE_VECTOR_SUBPARTS (vectype); + /* Extraction of scalar elements. */ + epilogue_cost += add_stmt_cost (target_cost_data, 2 * nunits, + vec_to_scalar, stmt_info, 0, + vect_epilogue); + /* Scalar max reductions via COND_EXPR / MAX_EXPR. */ + epilogue_cost += add_stmt_cost (target_cost_data, 2 * nunits - 3, + scalar_stmt, stmt_info, 0, + vect_epilogue); + } else { int vec_size_in_bits = tree_to_uhwi (TYPE_SIZE (vectype)); @@ -3797,10 +3792,14 @@ vect_model_reduction_cost (stmt_vec_info stmt_info, enum tree_code reduc_code, int element_bitsize = tree_to_uhwi (bitsize); int nelements = vec_size_in_bits / element_bitsize; + if (code == COND_EXPR) + code = MAX_EXPR; + optab = optab_for_tree_code (code, vectype, optab_default); /* We have a whole vector shift available. */ - if (VECTOR_MODE_P (mode) + if (optab != unknown_optab + && VECTOR_MODE_P (mode) && optab_handler (optab, mode) != CODE_FOR_nothing && have_whole_vector_shift (mode)) { @@ -3829,8 +3828,6 @@ vect_model_reduction_cost (stmt_vec_info stmt_info, enum tree_code reduc_code, "vect_model_reduction_cost: inside_cost = %d, " "prologue_cost = %d, epilogue_cost = %d .\n", inside_cost, prologue_cost, epilogue_cost); - - return true; } @@ -4443,7 +4440,8 @@ vect_create_epilog_for_reduction (vec<tree> vect_defs, gimple *stmt, else new_phi_result = PHI_RESULT (new_phis[0]); - if (STMT_VINFO_VEC_REDUCTION_TYPE (stmt_info) == COND_REDUCTION) + if (STMT_VINFO_VEC_REDUCTION_TYPE (stmt_info) == COND_REDUCTION + && reduc_code != ERROR_MARK) { /* For condition reductions, we have a vector (NEW_PHI_RESULT) containing various data values where the condition matched and another vector @@ -4555,6 +4553,70 @@ vect_create_epilog_for_reduction (vec<tree> vect_defs, gimple *stmt, gsi_insert_before (&exit_gsi, epilog_stmt, GSI_SAME_STMT); scalar_results.safe_push (new_temp); } + else if (STMT_VINFO_VEC_REDUCTION_TYPE (stmt_info) == COND_REDUCTION + && reduc_code == ERROR_MARK) + { + /* Condition redution without supported REDUC_MAX_EXPR. Generate + idx = 0; + idx_val = induction_index[0]; + val = data_reduc[0]; + for (idx = 0, val = init, i = 0; i < nelts; ++i) + if (induction_index[i] > idx_val) + val = data_reduc[i], idx_val = induction_index[i]; + return val; */ + + tree data_eltype = TREE_TYPE (TREE_TYPE (new_phi_result)); + tree idx_eltype = TREE_TYPE (TREE_TYPE (induction_index)); + unsigned HOST_WIDE_INT el_size = tree_to_uhwi (TYPE_SIZE (idx_eltype)); + unsigned HOST_WIDE_INT v_size + = el_size * TYPE_VECTOR_SUBPARTS (TREE_TYPE (induction_index)); + tree idx_val = NULL_TREE, val = NULL_TREE; + for (unsigned HOST_WIDE_INT off = 0; off < v_size; off += el_size) + { + tree old_idx_val = idx_val; + tree old_val = val; + idx_val = make_ssa_name (idx_eltype); + epilog_stmt = gimple_build_assign (idx_val, BIT_FIELD_REF, + build3 (BIT_FIELD_REF, idx_eltype, + induction_index, + bitsize_int (el_size), + bitsize_int (off))); + gsi_insert_before (&exit_gsi, epilog_stmt, GSI_SAME_STMT); + val = make_ssa_name (data_eltype); + epilog_stmt = gimple_build_assign (val, BIT_FIELD_REF, + build3 (BIT_FIELD_REF, + data_eltype, + new_phi_result, + bitsize_int (el_size), + bitsize_int (off))); + gsi_insert_before (&exit_gsi, epilog_stmt, GSI_SAME_STMT); + if (off != 0) + { + tree new_idx_val = idx_val; + tree new_val = val; + if (off != v_size - el_size) + { + new_idx_val = make_ssa_name (idx_eltype); + epilog_stmt = gimple_build_assign (new_idx_val, + MAX_EXPR, idx_val, + old_idx_val); + gsi_insert_before (&exit_gsi, epilog_stmt, GSI_SAME_STMT); + } + new_val = make_ssa_name (data_eltype); + epilog_stmt = gimple_build_assign (new_val, + COND_EXPR, + build2 (GT_EXPR, + boolean_type_node, + idx_val, + old_idx_val), + val, old_val); + gsi_insert_before (&exit_gsi, epilog_stmt, GSI_SAME_STMT); + idx_val = new_idx_val; + val = new_val; + } + } + scalar_results.safe_push (val); + } /* 2.3 Create the reduction code, using one of the three schemes described above. In SLP we simply need to extract all the elements from the @@ -4617,6 +4679,10 @@ vect_create_epilog_for_reduction (vec<tree> vect_defs, gimple *stmt, int vec_size_in_bits = tree_to_uhwi (TYPE_SIZE (vectype)); tree vec_temp; + /* COND reductions all do the final reduction with MAX_EXPR. */ + if (code == COND_EXPR) + code = MAX_EXPR; + /* Regardless of whether we have a whole vector shift, if we're emulating the operation via tree-vect-generic, we don't want to use it. Only the first round of the reduction is likely @@ -4782,6 +4848,22 @@ vect_create_epilog_for_reduction (vec<tree> vect_defs, gimple *stmt, /* Not SLP - we have one scalar to keep in SCALAR_RESULTS. */ scalar_results.safe_push (new_temp); } + + if (STMT_VINFO_VEC_REDUCTION_TYPE (stmt_info) + == INTEGER_INDUC_COND_REDUCTION) + { + /* Earlier we set the initial value to be zero. Check the result + and if it is zero then replace with the original initial + value. */ + tree zero = build_zero_cst (scalar_type); + tree zcompare = build2 (EQ_EXPR, boolean_type_node, new_temp, zero); + + tree tmp = make_ssa_name (new_scalar_dest); + epilog_stmt = gimple_build_assign (tmp, COND_EXPR, zcompare, + initial_def, new_temp); + gsi_insert_before (&exit_gsi, epilog_stmt, GSI_SAME_STMT); + scalar_results[0] = tmp; + } } vect_finalize_reduction: @@ -5288,20 +5370,6 @@ vectorizable_reduction (gimple *stmt, gimple_stmt_iterator *gsi, /* Flatten RHS. */ switch (get_gimple_rhs_class (gimple_assign_rhs_code (stmt))) { - case GIMPLE_SINGLE_RHS: - op_type = TREE_OPERAND_LENGTH (gimple_assign_rhs1 (stmt)); - if (op_type == ternary_op) - { - tree rhs = gimple_assign_rhs1 (stmt); - ops[0] = TREE_OPERAND (rhs, 0); - ops[1] = TREE_OPERAND (rhs, 1); - ops[2] = TREE_OPERAND (rhs, 2); - code = TREE_CODE (rhs); - } - else - return false; - break; - case GIMPLE_BINARY_RHS: code = gimple_assign_rhs_code (stmt); op_type = TREE_CODE_LENGTH (code); @@ -5672,21 +5740,6 @@ vectorizable_reduction (gimple *stmt, gimple_stmt_iterator *gsi, epilog_reduc_code = ERROR_MARK; } - - /* When epilog_reduc_code is ERROR_MARK then a reduction will be - generated in the epilog using multiple expressions. This does not - work for condition reductions. */ - if (epilog_reduc_code == ERROR_MARK - && (STMT_VINFO_VEC_REDUCTION_TYPE (stmt_info) - == INTEGER_INDUC_COND_REDUCTION - || STMT_VINFO_VEC_REDUCTION_TYPE (stmt_info) - == CONST_COND_REDUCTION)) - { - if (dump_enabled_p ()) - dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location, - "no reduc code for scalar code.\n"); - return false; - } } else { @@ -5707,17 +5760,11 @@ vectorizable_reduction (gimple *stmt, gimple_stmt_iterator *gsi, cr_index_vector_type = build_vector_type (cr_index_scalar_type, TYPE_VECTOR_SUBPARTS (vectype_out)); - epilog_reduc_code = REDUC_MAX_EXPR; optab = optab_for_tree_code (REDUC_MAX_EXPR, cr_index_vector_type, optab_default); if (optab_handler (optab, TYPE_MODE (cr_index_vector_type)) - == CODE_FOR_nothing) - { - if (dump_enabled_p ()) - dump_printf_loc (MSG_MISSED_OPTIMIZATION, vect_location, - "reduc max op not supported by target.\n"); - return false; - } + != CODE_FOR_nothing) + epilog_reduc_code = REDUC_MAX_EXPR; } if ((double_reduc @@ -5781,10 +5828,8 @@ vectorizable_reduction (gimple *stmt, gimple_stmt_iterator *gsi, if (!vec_stmt) /* transformation not required. */ { - if (first_p - && !vect_model_reduction_cost (stmt_info, epilog_reduc_code, ncopies, - reduc_index)) - return false; + if (first_p) + vect_model_reduction_cost (stmt_info, epilog_reduc_code, ncopies); STMT_VINFO_TYPE (stmt_info) = reduc_vec_info_type; return true; } diff --git a/gcc/tree-vectorizer.c b/gcc/tree-vectorizer.c index 1bef2e4f800..0d62c829ef5 100644 --- a/gcc/tree-vectorizer.c +++ b/gcc/tree-vectorizer.c @@ -380,10 +380,10 @@ vect_free_loop_info_assumptions (struct loop *loop) { scev_reset_htab (); /* We need to explicitly reset upper bound information since they are - used even after free_numbers_of_iterations_estimates_loop. */ + used even after free_numbers_of_iterations_estimates. */ loop->any_upper_bound = false; loop->any_likely_upper_bound = false; - free_numbers_of_iterations_estimates_loop (loop); + free_numbers_of_iterations_estimates (loop); loop_constraint_clear (loop, LOOP_C_FINITE); } diff --git a/gcc/tree-vrp.c b/gcc/tree-vrp.c index 716a7c285b3..9ca3924ea89 100644 --- a/gcc/tree-vrp.c +++ b/gcc/tree-vrp.c @@ -5628,6 +5628,81 @@ register_edge_assert_for_1 (tree op, enum tree_code code, } } +/* Check if comparison + NAME COND_OP INTEGER_CST + has a form of + (X & 11...100..0) COND_OP XX...X00...0 + Such comparison can yield assertions like + X >= XX...X00...0 + X <= XX...X11...1 + in case of COND_OP being NE_EXPR or + X < XX...X00...0 + X > XX...X11...1 + in case of EQ_EXPR. */ + +static bool +is_masked_range_test (tree name, tree valt, enum tree_code cond_code, + tree *new_name, tree *low, enum tree_code *low_code, + tree *high, enum tree_code *high_code) +{ + gimple *def_stmt = SSA_NAME_DEF_STMT (name); + + if (!is_gimple_assign (def_stmt) + || gimple_assign_rhs_code (def_stmt) != BIT_AND_EXPR) + return false; + + tree t = gimple_assign_rhs1 (def_stmt); + tree maskt = gimple_assign_rhs2 (def_stmt); + if (TREE_CODE (t) != SSA_NAME || TREE_CODE (maskt) != INTEGER_CST) + return false; + + wide_int mask = maskt; + wide_int inv_mask = ~mask; + wide_int val = valt; // Assume VALT is INTEGER_CST + + if ((inv_mask & (inv_mask + 1)) != 0 + || (val & mask) != val) + return false; + + bool is_range = cond_code == EQ_EXPR; + + tree type = TREE_TYPE (t); + wide_int min = wi::min_value (type), + max = wi::max_value (type); + + if (is_range) + { + *low_code = val == min ? ERROR_MARK : GE_EXPR; + *high_code = val == max ? ERROR_MARK : LE_EXPR; + } + else + { + /* We can still generate assertion if one of alternatives + is known to always be false. */ + if (val == min) + { + *low_code = (enum tree_code) 0; + *high_code = GT_EXPR; + } + else if ((val | inv_mask) == max) + { + *low_code = LT_EXPR; + *high_code = (enum tree_code) 0; + } + else + return false; + } + + *new_name = t; + *low = wide_int_to_tree (type, val); + *high = wide_int_to_tree (type, val | inv_mask); + + if (wi::neg_p (val, TYPE_SIGN (type))) + std::swap (*low, *high); + + return true; +} + /* Try to register an edge assertion for SSA name NAME on edge E for the condition COND contributing to the conditional jump pointed to by SI. */ @@ -5700,6 +5775,24 @@ register_edge_assert_for (tree name, edge e, register_edge_assert_for_1 (op1, EQ_EXPR, e, asserts); } } + + /* Sometimes we can infer ranges from (NAME & MASK) == VALUE. */ + if ((comp_code == EQ_EXPR || comp_code == NE_EXPR) + && TREE_CODE (val) == INTEGER_CST) + { + enum tree_code low_code, high_code; + tree low, high; + if (is_masked_range_test (name, val, comp_code, &name, &low, + &low_code, &high, &high_code)) + { + if (low_code != ERROR_MARK) + register_edge_assert_for_2 (name, e, low_code, name, + low, /*invert*/false, asserts); + if (high_code != ERROR_MARK) + register_edge_assert_for_2 (name, e, high_code, name, + high, /*invert*/false, asserts); + } + } } /* Finish found ASSERTS for E and register them at GSI. */ diff --git a/gcc/tree.c b/gcc/tree.c index 260280317bc..13c6c90ba98 100644 --- a/gcc/tree.c +++ b/gcc/tree.c @@ -5983,8 +5983,10 @@ free_lang_data (void) free_lang_data_in_cgraph (); /* Create gimple variants for common types. */ - fileptr_type_node = ptr_type_node; - const_tm_ptr_type_node = const_ptr_type_node; + for (unsigned i = 0; + i < sizeof (builtin_structptr_types) / sizeof (builtin_structptr_type); + ++i) + builtin_structptr_types[i].node = builtin_structptr_types[i].base; /* Reset some langhooks. Do not reset types_compatible_p, it may still be used indirectly via the get_alias_set langhook. */ @@ -10449,8 +10451,10 @@ build_common_tree_nodes (bool signed_char) ptr_type_node = build_pointer_type (void_type_node); const_ptr_type_node = build_pointer_type (build_type_variant (void_type_node, 1, 0)); - fileptr_type_node = ptr_type_node; - const_tm_ptr_type_node = const_ptr_type_node; + for (unsigned i = 0; + i < sizeof (builtin_structptr_types) / sizeof (builtin_structptr_type); + ++i) + builtin_structptr_types[i].node = builtin_structptr_types[i].base; pointer_sized_int_node = build_nonstandard_integer_type (POINTER_SIZE, 1); @@ -14544,6 +14548,16 @@ get_nonnull_args (const_tree fntype) return argmap; } +/* List of pointer types used to declare builtins before we have seen their + real declaration. + + Keep the size up to date in tree.h ! */ +const builtin_structptr_type builtin_structptr_types[2] = +{ + { fileptr_type_node, ptr_type_node, "FILE" }, + { const_tm_ptr_type_node, const_ptr_type_node, "tm" } +}; + #if CHECKING_P namespace selftest { diff --git a/gcc/tree.h b/gcc/tree.h index bfe83f7c0a2..7a4f5d64f19 100644 --- a/gcc/tree.h +++ b/gcc/tree.h @@ -5523,4 +5523,13 @@ desired_pro_or_demotion_p (const_tree to_type, const_tree from_type) return to_type_precision <= TYPE_PRECISION (from_type); } +/* Pointer type used to declare builtins before we have seen its real + declaration. */ +struct builtin_structptr_type +{ + tree& node; + tree& base; + const char *str; +}; +extern const builtin_structptr_type builtin_structptr_types[2]; #endif /* GCC_TREE_H */ diff --git a/gcc/tsan.c b/gcc/tsan.c index dd8cd85647c..2f98b936c03 100644 --- a/gcc/tsan.c +++ b/gcc/tsan.c @@ -896,9 +896,7 @@ public: opt_pass * clone () { return new pass_tsan (m_ctxt); } virtual bool gate (function *) { - return ((flag_sanitize & SANITIZE_THREAD) != 0 - && !lookup_attribute ("no_sanitize_thread", - DECL_ATTRIBUTES (current_function_decl))); + return sanitize_flags_p (SANITIZE_THREAD); } virtual unsigned int execute (function *) { return tsan_pass (); } @@ -938,9 +936,7 @@ public: /* opt_pass methods: */ virtual bool gate (function *) { - return ((flag_sanitize & SANITIZE_THREAD) != 0 && !optimize - && !lookup_attribute ("no_sanitize_thread", - DECL_ATTRIBUTES (current_function_decl))); + return (sanitize_flags_p (SANITIZE_THREAD) && !optimize); } virtual unsigned int execute (function *) { return tsan_pass (); } diff --git a/gcc/ubsan.c b/gcc/ubsan.c index 133409a7813..44effdd2216 100644 --- a/gcc/ubsan.c +++ b/gcc/ubsan.c @@ -114,10 +114,10 @@ decl_for_type_insert (tree type, tree decl) /* Helper routine, which encodes a value in the pointer_sized_int_node. Arguments with precision <= POINTER_SIZE are passed directly, the rest is passed by reference. T is a value we are to encode. - IN_EXPAND_P is true if this function is called during expansion. */ + PHASE determines when this function is called. */ tree -ubsan_encode_value (tree t, bool in_expand_p) +ubsan_encode_value (tree t, enum ubsan_encode_value_phase phase) { tree type = TREE_TYPE (t); const unsigned int bitsize = GET_MODE_BITSIZE (TYPE_MODE (type)); @@ -143,10 +143,18 @@ ubsan_encode_value (tree t, bool in_expand_p) { /* The reason for this is that we don't want to pessimize code by making vars unnecessarily addressable. */ - tree var = create_tmp_var (type); - tree tem = build2 (MODIFY_EXPR, void_type_node, var, t); - mark_addressable (var); - if (in_expand_p) + tree var; + if (phase != UBSAN_ENCODE_VALUE_GENERIC) + { + var = create_tmp_var (type); + mark_addressable (var); + } + else + { + var = create_tmp_var_raw (type); + TREE_ADDRESSABLE (var) = 1; + } + if (phase == UBSAN_ENCODE_VALUE_RTL) { rtx mem = assign_stack_temp_for_type (TYPE_MODE (type), @@ -156,8 +164,17 @@ ubsan_encode_value (tree t, bool in_expand_p) expand_assignment (var, t, false); return build_fold_addr_expr (var); } - t = build_fold_addr_expr (var); - return build2 (COMPOUND_EXPR, TREE_TYPE (t), tem, t); + if (phase != UBSAN_ENCODE_VALUE_GENERIC) + { + tree tem = build2 (MODIFY_EXPR, void_type_node, var, t); + t = build_fold_addr_expr (var); + return build2 (COMPOUND_EXPR, TREE_TYPE (t), tem, t); + } + else + { + var = build4 (TARGET_EXPR, type, var, t, NULL_TREE, NULL_TREE); + return build_fold_addr_expr (var); + } } else return build_fold_addr_expr (t); @@ -708,9 +725,9 @@ ubsan_expand_bounds_ifn (gimple_stmt_iterator *gsi) ? BUILT_IN_UBSAN_HANDLE_OUT_OF_BOUNDS : BUILT_IN_UBSAN_HANDLE_OUT_OF_BOUNDS_ABORT; tree fn = builtin_decl_explicit (bcode); - tree val - = force_gimple_operand_gsi (gsi, ubsan_encode_value (orig_index), true, - NULL_TREE, true, GSI_SAME_STMT); + tree val = ubsan_encode_value (orig_index, UBSAN_ENCODE_VALUE_GIMPLE); + val = force_gimple_operand_gsi (gsi, val, true, NULL_TREE, true, + GSI_SAME_STMT); g = gimple_build_call (fn, 2, data, val); } gimple_set_location (g, loc); @@ -757,7 +774,7 @@ ubsan_expand_null_ifn (gimple_stmt_iterator *gsip) gsi_insert_before (&gsi, g, GSI_SAME_STMT); } } - check_null = (flag_sanitize & SANITIZE_NULL) != 0; + check_null = sanitize_flags_p (SANITIZE_NULL); if (check_align == NULL_TREE && !check_null) { @@ -1181,13 +1198,13 @@ instrument_mem_ref (tree mem, tree base, gimple_stmt_iterator *iter, { enum ubsan_null_ckind ikind = is_lhs ? UBSAN_STORE_OF : UBSAN_LOAD_OF; unsigned int align = 0; - if (flag_sanitize & SANITIZE_ALIGNMENT) + if (sanitize_flags_p (SANITIZE_ALIGNMENT)) { align = min_align_of_type (TREE_TYPE (base)); if (align <= 1) align = 0; } - if (align == 0 && (flag_sanitize & SANITIZE_NULL) == 0) + if (align == 0 && !sanitize_flags_p (SANITIZE_NULL)) return; tree t = TREE_OPERAND (base, 0); if (!POINTER_TYPE_P (TREE_TYPE (t))) @@ -1204,10 +1221,8 @@ instrument_mem_ref (tree mem, tree base, gimple_stmt_iterator *iter, /* Perform the pointer instrumentation. */ static void -instrument_null (gimple_stmt_iterator gsi, bool is_lhs) +instrument_null (gimple_stmt_iterator gsi, tree t, bool is_lhs) { - gimple *stmt = gsi_stmt (gsi); - tree t = is_lhs ? gimple_get_lhs (stmt) : gimple_assign_rhs1 (stmt); /* Handle also e.g. &s->i. */ if (TREE_CODE (t) == ADDR_EXPR) t = TREE_OPERAND (t, 0); @@ -1268,9 +1283,11 @@ ubsan_build_overflow_builtin (tree_code code, location_t loc, tree lhstype, tree fn = builtin_decl_explicit (fn_code); return build_call_expr_loc (loc, fn, 2 + (code != NEGATE_EXPR), build_fold_addr_expr_loc (loc, data), - ubsan_encode_value (op0, true), - op1 ? ubsan_encode_value (op1, true) - : NULL_TREE); + ubsan_encode_value (op0, UBSAN_ENCODE_VALUE_RTL), + op1 + ? ubsan_encode_value (op1, + UBSAN_ENCODE_VALUE_RTL) + : NULL_TREE); } /* Perform the signed integer instrumentation. GSI is the iterator @@ -1355,13 +1372,14 @@ instrument_bool_enum_load (gimple_stmt_iterator *gsi) tree type = TREE_TYPE (rhs); tree minv = NULL_TREE, maxv = NULL_TREE; - if (TREE_CODE (type) == BOOLEAN_TYPE && (flag_sanitize & SANITIZE_BOOL)) + if (TREE_CODE (type) == BOOLEAN_TYPE + && sanitize_flags_p (SANITIZE_BOOL)) { minv = boolean_false_node; maxv = boolean_true_node; } else if (TREE_CODE (type) == ENUMERAL_TYPE - && (flag_sanitize & SANITIZE_ENUM) + && sanitize_flags_p (SANITIZE_ENUM) && TREE_TYPE (type) != NULL_TREE && TREE_CODE (TREE_TYPE (type)) == INTEGER_TYPE && (TYPE_PRECISION (TREE_TYPE (type)) @@ -1460,9 +1478,9 @@ instrument_bool_enum_load (gimple_stmt_iterator *gsi) : BUILT_IN_UBSAN_HANDLE_LOAD_INVALID_VALUE_ABORT; tree fn = builtin_decl_explicit (bcode); - tree val = force_gimple_operand_gsi (&gsi2, ubsan_encode_value (urhs), - true, NULL_TREE, true, - GSI_SAME_STMT); + tree val = ubsan_encode_value (urhs, UBSAN_ENCODE_VALUE_GIMPLE); + val = force_gimple_operand_gsi (&gsi2, val, true, NULL_TREE, true, + GSI_SAME_STMT); g = gimple_build_call (fn, 2, data, val); } gimple_set_location (g, loc); @@ -1626,7 +1644,7 @@ ubsan_instrument_float_cast (location_t loc, tree type, tree expr) fn = builtin_decl_explicit (bcode); fn = build_call_expr_loc (loc, fn, 2, build_fold_addr_expr_loc (loc, data), - ubsan_encode_value (expr, false)); + ubsan_encode_value (expr)); } return fold_build3 (COND_EXPR, void_type_node, t, fn, integer_zero_node); @@ -1753,11 +1771,10 @@ instrument_nonnull_return (gimple_stmt_iterator *gsi) points to an out-of-bounds location. */ static void -instrument_object_size (gimple_stmt_iterator *gsi, bool is_lhs) +instrument_object_size (gimple_stmt_iterator *gsi, tree t, bool is_lhs) { gimple *stmt = gsi_stmt (*gsi); location_t loc = gimple_location (stmt); - tree t = is_lhs ? gimple_get_lhs (stmt) : gimple_assign_rhs1 (stmt); tree type; tree index = NULL_TREE; HOST_WIDE_INT size_in_bytes; @@ -1924,16 +1941,6 @@ instrument_object_size (gimple_stmt_iterator *gsi, bool is_lhs) gsi_insert_before (gsi, g, GSI_SAME_STMT); } -/* True if we want to play UBSan games in the current function. */ - -bool -do_ubsan_in_current_function () -{ - return (current_function_decl != NULL_TREE - && !lookup_attribute ("no_sanitize_undefined", - DECL_ATTRIBUTES (current_function_decl))); -} - namespace { const pass_data pass_data_ubsan = @@ -1959,13 +1966,12 @@ public: /* opt_pass methods: */ virtual bool gate (function *) { - return flag_sanitize & (SANITIZE_NULL | SANITIZE_SI_OVERFLOW - | SANITIZE_BOOL | SANITIZE_ENUM - | SANITIZE_ALIGNMENT - | SANITIZE_NONNULL_ATTRIBUTE - | SANITIZE_RETURNS_NONNULL_ATTRIBUTE - | SANITIZE_OBJECT_SIZE) - && do_ubsan_in_current_function (); + return sanitize_flags_p ((SANITIZE_NULL | SANITIZE_SI_OVERFLOW + | SANITIZE_BOOL | SANITIZE_ENUM + | SANITIZE_ALIGNMENT + | SANITIZE_NONNULL_ATTRIBUTE + | SANITIZE_RETURNS_NONNULL_ATTRIBUTE + | SANITIZE_OBJECT_SIZE)); } virtual unsigned int execute (function *); @@ -1992,16 +1998,16 @@ pass_ubsan::execute (function *fun) continue; } - if ((flag_sanitize & SANITIZE_SI_OVERFLOW) + if ((sanitize_flags_p (SANITIZE_SI_OVERFLOW, fun->decl)) && is_gimple_assign (stmt)) instrument_si_overflow (gsi); - if (flag_sanitize & (SANITIZE_NULL | SANITIZE_ALIGNMENT)) + if (sanitize_flags_p (SANITIZE_NULL | SANITIZE_ALIGNMENT, fun->decl)) { if (gimple_store_p (stmt)) - instrument_null (gsi, true); + instrument_null (gsi, gimple_get_lhs (stmt), true); if (gimple_assign_single_p (stmt)) - instrument_null (gsi, false); + instrument_null (gsi, gimple_assign_rhs1 (stmt), false); if (is_gimple_call (stmt)) { unsigned args_num = gimple_call_num_args (stmt); @@ -2010,22 +2016,19 @@ pass_ubsan::execute (function *fun) tree arg = gimple_call_arg (stmt, i); if (is_gimple_reg (arg) || is_gimple_min_invariant (arg)) continue; - tree base = get_base_address (arg); - if (TREE_CODE (base) == MEM_REF - && TREE_CODE (TREE_OPERAND (base, 0)) == SSA_NAME) - instrument_mem_ref (arg, base, &gsi, false); + instrument_null (gsi, arg, false); } } } - if (flag_sanitize & (SANITIZE_BOOL | SANITIZE_ENUM) + if (sanitize_flags_p (SANITIZE_BOOL | SANITIZE_ENUM, fun->decl) && gimple_assign_load_p (stmt)) { instrument_bool_enum_load (&gsi); bb = gimple_bb (stmt); } - if ((flag_sanitize & SANITIZE_NONNULL_ATTRIBUTE) + if (sanitize_flags_p (SANITIZE_NONNULL_ATTRIBUTE, fun->decl) && is_gimple_call (stmt) && !gimple_call_internal_p (stmt)) { @@ -2033,19 +2036,31 @@ pass_ubsan::execute (function *fun) bb = gimple_bb (stmt); } - if ((flag_sanitize & SANITIZE_RETURNS_NONNULL_ATTRIBUTE) + if (sanitize_flags_p (SANITIZE_RETURNS_NONNULL_ATTRIBUTE, fun->decl) && gimple_code (stmt) == GIMPLE_RETURN) { instrument_nonnull_return (&gsi); bb = gimple_bb (stmt); } - if (flag_sanitize & SANITIZE_OBJECT_SIZE) + if (sanitize_flags_p (SANITIZE_OBJECT_SIZE, fun->decl)) { if (gimple_store_p (stmt)) - instrument_object_size (&gsi, true); + instrument_object_size (&gsi, gimple_get_lhs (stmt), true); if (gimple_assign_load_p (stmt)) - instrument_object_size (&gsi, false); + instrument_object_size (&gsi, gimple_assign_rhs1 (stmt), + false); + if (is_gimple_call (stmt)) + { + unsigned args_num = gimple_call_num_args (stmt); + for (unsigned i = 0; i < args_num; ++i) + { + tree arg = gimple_call_arg (stmt, i); + if (is_gimple_reg (arg) || is_gimple_min_invariant (arg)) + continue; + instrument_object_size (&gsi, arg, false); + } + } } gsi_next (&gsi); diff --git a/gcc/ubsan.h b/gcc/ubsan.h index f04929d6678..8d990b6a4b3 100644 --- a/gcc/ubsan.h +++ b/gcc/ubsan.h @@ -42,15 +42,23 @@ enum ubsan_print_style { UBSAN_PRINT_ARRAY }; -extern bool do_ubsan_in_current_function (void); +/* This controls ubsan_encode_value behavior. */ +enum ubsan_encode_value_phase { + UBSAN_ENCODE_VALUE_GENERIC, + UBSAN_ENCODE_VALUE_GIMPLE, + UBSAN_ENCODE_VALUE_RTL +}; + extern bool ubsan_expand_bounds_ifn (gimple_stmt_iterator *); extern bool ubsan_expand_null_ifn (gimple_stmt_iterator *); extern bool ubsan_expand_objsize_ifn (gimple_stmt_iterator *); extern bool ubsan_expand_vptr_ifn (gimple_stmt_iterator *); extern bool ubsan_instrument_unreachable (gimple_stmt_iterator *); extern tree ubsan_create_data (const char *, int, const location_t *, ...); -extern tree ubsan_type_descriptor (tree, enum ubsan_print_style = UBSAN_PRINT_NORMAL); -extern tree ubsan_encode_value (tree, bool = false); +extern tree ubsan_type_descriptor (tree, ubsan_print_style + = UBSAN_PRINT_NORMAL); +extern tree ubsan_encode_value (tree, ubsan_encode_value_phase + = UBSAN_ENCODE_VALUE_GENERIC); extern bool is_ubsan_builtin_p (tree); extern tree ubsan_build_overflow_builtin (tree_code, location_t, tree, tree, tree, tree *); diff --git a/gcc/vec.h b/gcc/vec.h index 755a1f8356b..cbdd439571b 100644 --- a/gcc/vec.h +++ b/gcc/vec.h @@ -407,6 +407,26 @@ struct GTY((user)) vec { }; +/* Default-construct N elements in DST. */ + +template <typename T> +inline void +vec_default_construct (T *dst, unsigned n) +{ + for ( ; n; ++dst, --n) + ::new (static_cast<void*>(dst)) T (); +} + +/* Copy-construct N elements in DST from *SRC. */ + +template <typename T> +inline void +vec_copy_construct (T *dst, const T *src, unsigned n) +{ + for ( ; n; ++dst, ++src, --n) + ::new (static_cast<void*>(dst)) T (*src); +} + /* Type to provide NULL values for vec<T, A, L>. This is used to provide nil initializers for vec instances. Since vec must be a POD, we cannot have proper ctor/dtor for it. To initialize @@ -612,7 +632,7 @@ vec_safe_grow_cleared (vec<T, A, vl_embed> *&v, unsigned len CXX_MEM_STAT_INFO) { unsigned oldlen = vec_safe_length (v); vec_safe_grow (v, len PASS_MEM_STAT); - memset (&(v->address ()[oldlen]), 0, sizeof (T) * (len - oldlen)); + vec_default_construct (v->address () + oldlen, len - oldlen); } @@ -818,7 +838,7 @@ vec<T, A, vl_embed>::copy (ALONE_MEM_STAT_DECL) const { vec_alloc (new_vec, len PASS_MEM_STAT); new_vec->embedded_init (len, len); - memcpy (new_vec->address (), m_vecdata, sizeof (T) * len); + vec_copy_construct (new_vec->address (), m_vecdata, len); } return new_vec; } @@ -835,7 +855,7 @@ vec<T, A, vl_embed>::splice (const vec<T, A, vl_embed> &src) if (len) { gcc_checking_assert (space (len)); - memcpy (address () + length (), src.address (), len * sizeof (T)); + vec_copy_construct (end (), src.address (), len); m_vecpfx.m_num += len; } } @@ -1089,13 +1109,12 @@ inline void vec<T, A, vl_embed>::quick_grow_cleared (unsigned len) { unsigned oldlen = length (); - size_t sz = sizeof (T) * (len - oldlen); + size_t growby = len - oldlen; quick_grow (len); - if (sz != 0) - memset (&(address ()[oldlen]), 0, sz); + if (growby != 0) + vec_default_construct (address () + oldlen, growby); } - /* Garbage collection support for vec<T, A, vl_embed>. */ template<typename T> @@ -1454,7 +1473,7 @@ vec<T, va_heap, vl_ptr>::reserve (unsigned nelems, bool exact MEM_STAT_DECL) va_heap::reserve (m_vec, nelems, exact PASS_MEM_STAT); if (handle_auto_vec) { - memcpy (m_vec->address (), oldvec->address (), sizeof (T) * oldsize); + vec_copy_construct (m_vec->address (), oldvec->address (), oldsize); m_vec->m_vecpfx.m_num = oldsize; } @@ -1616,10 +1635,10 @@ inline void vec<T, va_heap, vl_ptr>::safe_grow_cleared (unsigned len MEM_STAT_DECL) { unsigned oldlen = length (); - size_t sz = sizeof (T) * (len - oldlen); + size_t growby = len - oldlen; safe_grow (len PASS_MEM_STAT); - if (sz != 0) - memset (&(address ()[oldlen]), 0, sz); + if (growby != 0) + vec_default_construct (address () + oldlen, growby); } |