summaryrefslogtreecommitdiff
path: root/gcc/testsuite/gcc.target/arm
diff options
context:
space:
mode:
Diffstat (limited to 'gcc/testsuite/gcc.target/arm')
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-4.c41
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-5.c37
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-6.c46
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-7.c38
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-8.c40
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-9.c43
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-and-union-1.c96
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-and-union.c22
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-11.c2
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-13.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-2.c2
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-6.c2
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/softfp.c2
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/union-1.c55
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/baseline/union-2.c68
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/bitfield-4.x40
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/bitfield-5.x36
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/bitfield-6.x45
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/bitfield-7.x36
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/bitfield-8.x39
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/bitfield-9.x42
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/bitfield-and-union.x (renamed from gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-and-union-1.c)19
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/cmse-13.x7
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/cmse-5.x7
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/cmse-7.x7
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/cmse-8.x7
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-4.c41
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-5.c37
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-6.c46
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-7.c38
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-8.c40
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-9.c43
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-and-union.c20
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c11
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c13
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-13.c11
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-5.c13
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-7.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-8.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-13.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-5.c14
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-7.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-8.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c13
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-13.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-5.c13
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-7.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-8.c10
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/union-1.c55
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/mainline/union-2.c68
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/union-1.x54
-rw-r--r--gcc/testsuite/gcc.target/arm/cmse/union-2.x67
-rw-r--r--gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c1
-rw-r--r--gcc/testsuite/gcc.target/arm/lp1189445.c2
-rw-r--r--gcc/testsuite/gcc.target/arm/pr54300.C2
-rw-r--r--gcc/testsuite/gcc.target/arm/pr67989.C3
60 files changed, 505 insertions, 1009 deletions
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-4.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-4.c
index a6c1386c06e..2911da3a72d 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-4.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-4.c
@@ -1,46 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a;
- unsigned int b:5;
- unsigned int c:11, :0, d:8;
- struct { unsigned int ee:2; } e;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-extern void foo (test_st st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
- r.values.v3 = 0xFFFFFFFF;
- r.values.v4 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
+#include "../bitfield-4.x"
/* { dg-final { scan-assembler "mov\tip, r4" } } */
/* { dg-final { scan-assembler "movw\tr4, #65535" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-5.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-5.c
index d51ce2d42c0..376e92b23fa 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-5.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-5.c
@@ -1,42 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a;
- unsigned short b :5;
- unsigned char c;
- unsigned short d :11;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
+#include "../bitfield-5.x"
/* { dg-final { scan-assembler "mov\tip, r4" } } */
/* { dg-final { scan-assembler "movw\tr4, #8191" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-6.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-6.c
index 77e9104b546..9845b6054c1 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-6.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-6.c
@@ -1,51 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a;
- unsigned int b : 3;
- unsigned int c : 14;
- unsigned int d : 1;
- struct {
- unsigned int ee : 2;
- unsigned short ff : 15;
- } e;
- unsigned char g : 1;
- unsigned char : 4;
- unsigned char h : 3;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
- r.values.v3 = 0xFFFFFFFF;
- r.values.v4 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
+#include "../bitfield-6.x"
/* { dg-final { scan-assembler "mov\tip, r4" } } */
/* { dg-final { scan-assembler "movw\tr4, #65535" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-7.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-7.c
index 3d8941bbfee..2ea52dfe655 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-7.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-7.c
@@ -1,43 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a;
- unsigned short b :5;
- unsigned char c;
- unsigned short d :11;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
-
+#include "../bitfield-7.x"
/* { dg-final { scan-assembler "mov\tip, r4" } } */
/* { dg-final { scan-assembler "movw\tr4, #8191" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-8.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-8.c
index 9ffbb718d34..9bc32b83d74 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-8.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-8.c
@@ -1,45 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a;
- unsigned int :0;
- unsigned int b :1;
- unsigned short :0;
- unsigned short c;
- unsigned int :0;
- unsigned int d :21;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
- r.values.v3 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
+#include "../bitfield-8.x"
/* { dg-final { scan-assembler "mov\tip, r4" } } */
/* { dg-final { scan-assembler "movs\tr4, #255" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-9.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-9.c
index 8a614182923..f6c15338d00 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-9.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-9.c
@@ -1,48 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- char a:3;
-} test_st3;
-
-typedef struct
-{
- char a:3;
-} test_st2;
-
-typedef struct
-{
- test_st2 st2;
- test_st3 st3;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
+#include "../bitfield-9.x"
/* { dg-final { scan-assembler "mov\tip, r4" } } */
/* { dg-final { scan-assembler "movw\tr4, #1799" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-and-union-1.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-and-union-1.c
deleted file mode 100644
index 642f4e0346b..00000000000
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-and-union-1.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-mcmse" } */
-
-typedef struct
-{
- unsigned short a :11;
-} test_st_4;
-
-typedef union
-{
- char a;
- test_st_4 st4;
-}test_un_2;
-
-typedef struct
-{
- unsigned char a;
- unsigned int :0;
- unsigned int b :1;
- unsigned short :0;
- unsigned short c;
- unsigned int :0;
- unsigned int d :21;
-} test_st_3;
-
-typedef struct
-{
- unsigned char a :3;
- unsigned int b :13;
- test_un_2 un2;
-} test_st_2;
-
-typedef union
-{
- test_st_2 st2;
- test_st_3 st3;
-}test_un_1;
-
-typedef struct
-{
- unsigned char a :2;
- unsigned char :0;
- unsigned short b :5;
- unsigned char :0;
- unsigned char c :4;
- test_un_1 un1;
-} test_st_1;
-
-typedef union
-{
- test_st_1 st1;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st_1;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st_1);
-
-int
-main (void)
-{
- read_st_1 r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
- r.values.v3 = 0xFFFFFFFF;
- r.values.v4 = 0xFFFFFFFF;
-
- f (r.st1);
- return 0;
-}
-
-/* { dg-final { scan-assembler "mov\tip, r4" } } */
-/* { dg-final { scan-assembler "movw\tr4, #7939" } } */
-/* { dg-final { scan-assembler "movt\tr4, 15" } } */
-/* { dg-final { scan-assembler "ands\tr0, r4" } } */
-/* { dg-final { scan-assembler "movw\tr4, #65535" } } */
-/* { dg-final { scan-assembler "movt\tr4, 2047" } } */
-/* { dg-final { scan-assembler "ands\tr1, r4" } } */
-/* { dg-final { scan-assembler "movs\tr4, #1" } } */
-/* { dg-final { scan-assembler "movt\tr4, 65535" } } */
-/* { dg-final { scan-assembler "ands\tr2, r4" } } */
-/* { dg-final { scan-assembler "movw\tr4, #65535" } } */
-/* { dg-final { scan-assembler "movt\tr4, 31" } } */
-/* { dg-final { scan-assembler "ands\tr3, r4" } } */
-/* { dg-final { scan-assembler "mov\tr4, ip" } } */
-/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
-/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
-/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-and-union.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-and-union.c
new file mode 100644
index 00000000000..31249489e89
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/bitfield-and-union.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-mcmse" } */
+
+#include "../bitfield-and-union.x"
+
+/* { dg-final { scan-assembler "mov\tip, r4" } } */
+/* { dg-final { scan-assembler "movw\tr4, #7939" } } */
+/* { dg-final { scan-assembler "movt\tr4, 15" } } */
+/* { dg-final { scan-assembler "ands\tr0, r4" } } */
+/* { dg-final { scan-assembler "movw\tr4, #65535" } } */
+/* { dg-final { scan-assembler "movt\tr4, 2047" } } */
+/* { dg-final { scan-assembler "ands\tr1, r4" } } */
+/* { dg-final { scan-assembler "movs\tr4, #1" } } */
+/* { dg-final { scan-assembler "movt\tr4, 65535" } } */
+/* { dg-final { scan-assembler "ands\tr2, r4" } } */
+/* { dg-final { scan-assembler "movw\tr4, #65535" } } */
+/* { dg-final { scan-assembler "movt\tr4, 31" } } */
+/* { dg-final { scan-assembler "ands\tr3, r4" } } */
+/* { dg-final { scan-assembler "mov\tr4, ip" } } */
+/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
+/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
+/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-11.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-11.c
index 3007409ad88..795544fe11d 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-11.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-11.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse" } */
/* { dg-require-effective-target arm_arch_v8m_base_ok } */
/* { dg-add-options arm_arch_v8m_base } */
-/* { dg-options "-mcmse" } */
int __attribute__ ((cmse_nonsecure_call)) (*bar) (int);
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-13.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-13.c
index f2b931be591..7208a2cedd2 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-13.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-13.c
@@ -1,15 +1,9 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse" } */
/* { dg-require-effective-target arm_arch_v8m_base_ok } */
/* { dg-add-options arm_arch_v8m_base } */
-/* { dg-options "-mcmse" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (float, double);
-int
-foo (int a)
-{
- return bar (1.0f, 2.0) + a + 1;
-}
+#include "../cmse-13.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-2.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-2.c
index 814502d4e5d..fec7dc10484 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-2.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-2.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse" } */
/* { dg-require-effective-target arm_arch_v8m_base_ok } */
/* { dg-add-options arm_arch_v8m_base } */
-/* { dg-options "-mcmse" } */
extern float bar (void);
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-6.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-6.c
index 95da045690a..43d45e7a63e 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-6.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/cmse-6.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse" } */
/* { dg-require-effective-target arm_arch_v8m_base_ok } */
/* { dg-add-options arm_arch_v8m_base } */
-/* { dg-options "-mcmse" } */
int __attribute__ ((cmse_nonsecure_call)) (*bar) (double);
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/softfp.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/softfp.c
index 0069fcdaebf..ca76e12cd92 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/softfp.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/softfp.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=softfp" } */
/* { dg-require-effective-target arm_arch_v8m_base_ok } */
/* { dg-add-options arm_arch_v8m_base } */
-/* { dg-options "-mcmse -mfloat-abi=softfp" } */
double __attribute__ ((cmse_nonsecure_call)) (*bar) (float, double);
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/union-1.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/union-1.c
index ff18e839b02..afd5b98509c 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/union-1.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/union-1.c
@@ -1,60 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a :2;
- unsigned char :0;
- unsigned short b :5;
- unsigned char :0;
- unsigned short c :3;
- unsigned char :0;
- unsigned int d :9;
-} test_st_1;
-
-typedef struct
-{
- unsigned short a :7;
- unsigned char :0;
- unsigned char b :1;
- unsigned char :0;
- unsigned short c :6;
-} test_st_2;
-
-typedef union
-{
- test_st_1 st_1;
- test_st_2 st_2;
-}test_un;
-
-typedef union
-{
- test_un un;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_un;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_un);
-
-int
-main (void)
-{
- read_un r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
-
- f (r.un);
- return 0;
-}
+#include "../union-1.x"
/* { dg-final { scan-assembler "mov\tip, r4" } } */
/* { dg-final { scan-assembler "movw\tr4, #8063" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/baseline/union-2.c b/gcc/testsuite/gcc.target/arm/cmse/baseline/union-2.c
index b2e024b7f07..6e60f2a7628 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/baseline/union-2.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/baseline/union-2.c
@@ -1,73 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a :2;
- unsigned char :0;
- unsigned short b :5;
- unsigned char :0;
- unsigned short c :3;
- unsigned char :0;
- unsigned int d :9;
-} test_st_1;
-
-typedef struct
-{
- unsigned short a :7;
- unsigned char :0;
- unsigned char b :1;
- unsigned char :0;
- unsigned short c :6;
-} test_st_2;
-
-typedef struct
-{
- unsigned char a;
- unsigned int :0;
- unsigned int b :1;
- unsigned short :0;
- unsigned short c;
- unsigned int :0;
- unsigned int d :21;
-} test_st_3;
-
-typedef union
-{
- test_st_1 st_1;
- test_st_2 st_2;
- test_st_3 st_3;
-}test_un;
-
-typedef union
-{
- test_un un;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_un;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_un);
-
-int
-main (void)
-{
- read_un r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
- r.values.v3 = 0xFFFFFFFF;
-
- f (r.un);
- return 0;
-}
+#include "../union-2.x"
/* { dg-final { scan-assembler "mov\tip, r4" } } */
/* { dg-final { scan-assembler "movw\tr4, #8191" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/bitfield-4.x b/gcc/testsuite/gcc.target/arm/cmse/bitfield-4.x
new file mode 100644
index 00000000000..62e35cc3cb8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/bitfield-4.x
@@ -0,0 +1,40 @@
+typedef struct
+{
+ unsigned char a;
+ unsigned int b:5;
+ unsigned int c:11, :0, d:8;
+ struct { unsigned int ee:2; } e;
+} test_st;
+
+typedef union
+{
+ test_st st;
+ struct
+ {
+ unsigned int v1;
+ unsigned int v2;
+ unsigned int v3;
+ unsigned int v4;
+ }values;
+} read_st;
+
+
+typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
+
+extern void foo (test_st st);
+
+int
+main (void)
+{
+ read_st r;
+ foo_ns f;
+
+ f = (foo_ns) 0x200000;
+ r.values.v1 = 0xFFFFFFFF;
+ r.values.v2 = 0xFFFFFFFF;
+ r.values.v3 = 0xFFFFFFFF;
+ r.values.v4 = 0xFFFFFFFF;
+
+ f (r.st);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/cmse/bitfield-5.x b/gcc/testsuite/gcc.target/arm/cmse/bitfield-5.x
new file mode 100644
index 00000000000..de5649dda6e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/bitfield-5.x
@@ -0,0 +1,36 @@
+typedef struct
+{
+ unsigned char a;
+ unsigned short b :5;
+ unsigned char c;
+ unsigned short d :11;
+} test_st;
+
+typedef union
+{
+ test_st st;
+ struct
+ {
+ unsigned int v1;
+ unsigned int v2;
+ unsigned int v3;
+ unsigned int v4;
+ }values;
+} read_st;
+
+
+typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
+
+int
+main (void)
+{
+ read_st r;
+ foo_ns f;
+
+ f = (foo_ns) 0x200000;
+ r.values.v1 = 0xFFFFFFFF;
+ r.values.v2 = 0xFFFFFFFF;
+
+ f (r.st);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/cmse/bitfield-6.x b/gcc/testsuite/gcc.target/arm/cmse/bitfield-6.x
new file mode 100644
index 00000000000..693a8ae0abb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/bitfield-6.x
@@ -0,0 +1,45 @@
+typedef struct
+{
+ unsigned char a;
+ unsigned int b : 3;
+ unsigned int c : 14;
+ unsigned int d : 1;
+ struct {
+ unsigned int ee : 2;
+ unsigned short ff : 15;
+ } e;
+ unsigned char g : 1;
+ unsigned char : 4;
+ unsigned char h : 3;
+} test_st;
+
+typedef union
+{
+ test_st st;
+ struct
+ {
+ unsigned int v1;
+ unsigned int v2;
+ unsigned int v3;
+ unsigned int v4;
+ }values;
+} read_st;
+
+
+typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
+
+int
+main (void)
+{
+ read_st r;
+ foo_ns f;
+
+ f = (foo_ns) 0x200000;
+ r.values.v1 = 0xFFFFFFFF;
+ r.values.v2 = 0xFFFFFFFF;
+ r.values.v3 = 0xFFFFFFFF;
+ r.values.v4 = 0xFFFFFFFF;
+
+ f (r.st);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/cmse/bitfield-7.x b/gcc/testsuite/gcc.target/arm/cmse/bitfield-7.x
new file mode 100644
index 00000000000..de5649dda6e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/bitfield-7.x
@@ -0,0 +1,36 @@
+typedef struct
+{
+ unsigned char a;
+ unsigned short b :5;
+ unsigned char c;
+ unsigned short d :11;
+} test_st;
+
+typedef union
+{
+ test_st st;
+ struct
+ {
+ unsigned int v1;
+ unsigned int v2;
+ unsigned int v3;
+ unsigned int v4;
+ }values;
+} read_st;
+
+
+typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
+
+int
+main (void)
+{
+ read_st r;
+ foo_ns f;
+
+ f = (foo_ns) 0x200000;
+ r.values.v1 = 0xFFFFFFFF;
+ r.values.v2 = 0xFFFFFFFF;
+
+ f (r.st);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/cmse/bitfield-8.x b/gcc/testsuite/gcc.target/arm/cmse/bitfield-8.x
new file mode 100644
index 00000000000..654b21e94b5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/bitfield-8.x
@@ -0,0 +1,39 @@
+typedef struct
+{
+ unsigned char a;
+ unsigned int :0;
+ unsigned int b :1;
+ unsigned short :0;
+ unsigned short c;
+ unsigned int :0;
+ unsigned int d :21;
+} test_st;
+
+typedef union
+{
+ test_st st;
+ struct
+ {
+ unsigned int v1;
+ unsigned int v2;
+ unsigned int v3;
+ unsigned int v4;
+ }values;
+} read_st;
+
+typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
+
+int
+main (void)
+{
+ read_st r;
+ foo_ns f;
+
+ f = (foo_ns) 0x200000;
+ r.values.v1 = 0xFFFFFFFF;
+ r.values.v2 = 0xFFFFFFFF;
+ r.values.v3 = 0xFFFFFFFF;
+
+ f (r.st);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/cmse/bitfield-9.x b/gcc/testsuite/gcc.target/arm/cmse/bitfield-9.x
new file mode 100644
index 00000000000..7543ac52696
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/bitfield-9.x
@@ -0,0 +1,42 @@
+typedef struct
+{
+ char a:3;
+} test_st3;
+
+typedef struct
+{
+ char a:3;
+} test_st2;
+
+typedef struct
+{
+ test_st2 st2;
+ test_st3 st3;
+} test_st;
+
+typedef union
+{
+ test_st st;
+ struct
+ {
+ unsigned int v1;
+ unsigned int v2;
+ unsigned int v3;
+ unsigned int v4;
+ }values;
+} read_st;
+
+typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
+
+int
+main (void)
+{
+ read_st r;
+ foo_ns f;
+
+ f = (foo_ns) 0x200000;
+ r.values.v1 = 0xFFFFFFFF;
+
+ f (r.st);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-and-union-1.c b/gcc/testsuite/gcc.target/arm/cmse/bitfield-and-union.x
index e139ba61af5..0a6eb3dd816 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-and-union-1.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/bitfield-and-union.x
@@ -1,6 +1,3 @@
-/* { dg-do compile } */
-/* { dg-options "-mcmse" } */
-
typedef struct
{
unsigned short a :11;
@@ -76,19 +73,3 @@ main (void)
f (r.st1);
return 0;
}
-
-/* { dg-final { scan-assembler "movw\tip, #7939" } } */
-/* { dg-final { scan-assembler "movt\tip, 15" } } */
-/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
-/* { dg-final { scan-assembler "movw\tip, #65535" } } */
-/* { dg-final { scan-assembler "movt\tip, 2047" } } */
-/* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
-/* { dg-final { scan-assembler "mov\tip, #1" } } */
-/* { dg-final { scan-assembler "movt\tip, 65535" } } */
-/* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
-/* { dg-final { scan-assembler "movw\tip, #65535" } } */
-/* { dg-final { scan-assembler "movt\tip, 31" } } */
-/* { dg-final { scan-assembler "and\tr3, r3, ip" } } */
-/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
-/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
-/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-13.x b/gcc/testsuite/gcc.target/arm/cmse/cmse-13.x
new file mode 100644
index 00000000000..cdcd5ba6cf6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-13.x
@@ -0,0 +1,7 @@
+int __attribute__ ((cmse_nonsecure_call)) (*bar) (float, double);
+
+int
+foo (int a)
+{
+ return bar (3.0f, 2.0) + a + 1;
+}
diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-5.x b/gcc/testsuite/gcc.target/arm/cmse/cmse-5.x
new file mode 100644
index 00000000000..7b03819d6b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-5.x
@@ -0,0 +1,7 @@
+extern float bar (void);
+
+float __attribute__ ((cmse_nonsecure_entry))
+foo (void)
+{
+ return bar ();
+}
diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-7.x b/gcc/testsuite/gcc.target/arm/cmse/cmse-7.x
new file mode 100644
index 00000000000..3fa372af237
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-7.x
@@ -0,0 +1,7 @@
+int __attribute__ ((cmse_nonsecure_call)) (*bar) (void);
+
+int
+foo (int a)
+{
+ return bar () + a + 1;
+}
diff --git a/gcc/testsuite/gcc.target/arm/cmse/cmse-8.x b/gcc/testsuite/gcc.target/arm/cmse/cmse-8.x
new file mode 100644
index 00000000000..7e1479542ed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/cmse-8.x
@@ -0,0 +1,7 @@
+int __attribute__ ((cmse_nonsecure_call)) (*bar) (double);
+
+int
+foo (int a)
+{
+ return bar (2.0) + a + 1;
+}
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-4.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-4.c
index c3b1396d52e..55da2a0c622 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-4.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-4.c
@@ -1,46 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a;
- unsigned int b:5;
- unsigned int c:11, :0, d:8;
- struct { unsigned int ee:2; } e;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-extern void foo (test_st st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
- r.values.v3 = 0xFFFFFFFF;
- r.values.v4 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
+#include "../bitfield-4.x"
/* { dg-final { scan-assembler "movw\tip, #65535" } } */
/* { dg-final { scan-assembler "movt\tip, 255" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-5.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-5.c
index 0d029044aa9..383363233e6 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-5.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-5.c
@@ -1,42 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a;
- unsigned short b :5;
- unsigned char c;
- unsigned short d :11;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
+#include "../bitfield-5.x"
/* { dg-final { scan-assembler "movw\tip, #8191" } } */
/* { dg-final { scan-assembler "movt\tip, 255" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-6.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-6.c
index 005515ab9cb..03c294ea323 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-6.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-6.c
@@ -1,51 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a;
- unsigned int b : 3;
- unsigned int c : 14;
- unsigned int d : 1;
- struct {
- unsigned int ee : 2;
- unsigned short ff : 15;
- } e;
- unsigned char g : 1;
- unsigned char : 4;
- unsigned char h : 3;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
- r.values.v3 = 0xFFFFFFFF;
- r.values.v4 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
+#include "../bitfield-6.x"
/* { dg-final { scan-assembler "movw\tip, #65535" } } */
/* { dg-final { scan-assembler "movt\tip, 1023" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-7.c
index 6dd218e62fd..7692a69b159 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-7.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-7.c
@@ -1,43 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a;
- unsigned short b :5;
- unsigned char c;
- unsigned short d :11;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
-
+#include "../bitfield-7.x"
/* { dg-final { scan-assembler "movw\tip, #8191" } } */
/* { dg-final { scan-assembler "movt\tip, 255" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-8.c
index c833bcb0ae9..a0a488775fe 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-8.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-8.c
@@ -1,45 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a;
- unsigned int :0;
- unsigned int b :1;
- unsigned short :0;
- unsigned short c;
- unsigned int :0;
- unsigned int d :21;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
- r.values.v3 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
+#include "../bitfield-8.x"
/* { dg-final { scan-assembler "mov\tip, #255" } } */
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-9.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-9.c
index d6e4cdb8c44..8bfeeb0bbf6 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-9.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-9.c
@@ -1,48 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- char a:3;
-} test_st3;
-
-typedef struct
-{
- char a:3;
-} test_st2;
-
-typedef struct
-{
- test_st2 st2;
- test_st3 st3;
-} test_st;
-
-typedef union
-{
- test_st st;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_st;
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_st);
-
-int
-main (void)
-{
- read_st r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
-
- f (r.st);
- return 0;
-}
+#include "../bitfield-9.x"
/* { dg-final { scan-assembler "movw\tip, #1799" } } */
/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-and-union.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-and-union.c
new file mode 100644
index 00000000000..aac5ae1a052
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/bitfield-and-union.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-mcmse" } */
+
+#include "../bitfield-and-union.x"
+
+/* { dg-final { scan-assembler "movw\tip, #7939" } } */
+/* { dg-final { scan-assembler "movt\tip, 15" } } */
+/* { dg-final { scan-assembler "and\tr0, r0, ip" } } */
+/* { dg-final { scan-assembler "movw\tip, #65535" } } */
+/* { dg-final { scan-assembler "movt\tip, 2047" } } */
+/* { dg-final { scan-assembler "and\tr1, r1, ip" } } */
+/* { dg-final { scan-assembler "mov\tip, #1" } } */
+/* { dg-final { scan-assembler "movt\tip, 65535" } } */
+/* { dg-final { scan-assembler "and\tr2, r2, ip" } } */
+/* { dg-final { scan-assembler "movw\tip, #65535" } } */
+/* { dg-final { scan-assembler "movt\tip, 31" } } */
+/* { dg-final { scan-assembler "and\tr3, r3, ip" } } */
+/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
+/* { dg-final { scan-assembler "lsls\tr4, r4, #1" } } */
+/* { dg-final { scan-assembler "bl\t__gnu_cmse_nonsecure_call" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c
index d90ad811fc1..6f4d6b4b755 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c
@@ -1,18 +1,11 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
-
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (float, double);
-int
-foo (int a)
-{
- return bar (3.0f, 2.0) + a + 1;
-}
+#include "../../cmse-13.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c
index 88dec276281..0ae2a51990b 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c
@@ -1,17 +1,12 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
-extern float bar (void);
+#include "../../cmse-5.x"
-float __attribute__ ((cmse_nonsecure_entry))
-foo (void)
-{
- return bar ();
-}
/* { dg-final { scan-assembler "mov\tr0, lr" } } */
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
/* { dg-final { scan-assembler "mov\tr2, lr" } } */
@@ -32,8 +27,8 @@ foo (void)
/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
-/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { arm_arch_v8m_main_ok && { ! arm_dsp } } } } } */
-/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target { arm_arch_v8m_main_ok && arm_dsp } } } } */
+/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { ! arm_dsp } } } } */
+/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target arm_dsp } } } */
/* { dg-final { scan-assembler "push\t{r4}" } } */
/* { dg-final { scan-assembler "vmrs\tip, fpscr" } } */
/* { dg-final { scan-assembler "movw\tr4, #65376" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c
index c047cd51c94..141ba73484c 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c
@@ -1,17 +1,11 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (void);
-int
-foo (int a)
-{
- return bar () + a + 1;
-}
+#include "../../cmse-7.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c
index 20d2d4a8fb1..6c5e688f220 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c
@@ -1,17 +1,11 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-sp-d16" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (double);
-int
-foo (int a)
-{
- return bar (2.0) + a + 1;
-}
+#include "../../cmse-8.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-13.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-13.c
index 0af586a7fd1..d35321bfda8 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-13.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-13.c
@@ -1,18 +1,11 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
-
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (float, double);
-int
-foo (int a)
-{
- return bar (3.0f, 2.0) + a + 1;
-}
+#include "../../cmse-13.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-5.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-5.c
index 29f60baf521..955f749cb72 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-5.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-5.c
@@ -1,17 +1,12 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
-extern float bar (void);
+#include "../../cmse-5.x"
-float __attribute__ ((cmse_nonsecure_entry))
-foo (void)
-{
- return bar ();
-}
/* { dg-final { scan-assembler "mov\tr0, lr" } } */
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
/* { dg-final { scan-assembler "mov\tr2, lr" } } */
@@ -25,8 +20,8 @@ foo (void)
/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
-/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { arm_arch_v8m_main_ok && { ! arm_dsp } } } } } */
-/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target { arm_arch_v8m_main_ok && arm_dsp } } } } */
+/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { ! arm_dsp } } } } */
+/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target arm_dsp } } } */
/* { dg-final { scan-assembler "push\t{r4}" } } */
/* { dg-final { scan-assembler "vmrs\tip, fpscr" } } */
/* { dg-final { scan-assembler "movw\tr4, #65376" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-7.c
index a5c64fb06ed..858555b8d89 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-7.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-7.c
@@ -1,17 +1,11 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (void);
-int
-foo (int a)
-{
- return bar () + a + 1;
-}
+#include "../../cmse-7.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-8.c
index 5e041b17b0e..f85d68a3eff 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-8.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/hard/cmse-8.c
@@ -1,17 +1,11 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=softfp } {""} } */
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=hard -mfpu=fpv5-d16" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (double);
-int
-foo (int a)
-{
- return bar (2.0) + a + 1;
-}
+#include "../../cmse-8.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-13.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-13.c
index dbbd262c890..11d44550de9 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-13.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-13.c
@@ -1,16 +1,10 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=soft" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=hard" -mfloat-abi=softfp } {""} } */
-/* { dg-options "-mcmse -mfloat-abi=soft" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (float, double);
-int
-foo (int a)
-{
- return bar (1.0f, 2.0) + a + 1;
-}
+#include "../../cmse-13.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-5.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-5.c
index a7229ea8eb2..dfd2fe6323a 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-5.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-5.c
@@ -1,16 +1,10 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=soft" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=hard" -mfloat-abi=softfp } {""} } */
-/* { dg-options "-mcmse -mfloat-abi=soft" } */
-
-extern float bar (void);
-float __attribute__ ((cmse_nonsecure_entry))
-foo (void)
-{
- return bar ();
-}
+#include "../../cmse-5.x"
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
/* { dg-final { scan-assembler "mov\tr2, lr" } } */
@@ -18,7 +12,7 @@ foo (void)
/* { dg-final { scan-assembler "mov\tip, lr" } } */
/* { dg-final { scan-assembler-not "vmov" } } */
/* { dg-final { scan-assembler-not "vmsr" } } */
-/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { arm_arch_v8m_main_ok && { ! arm_dsp } } } } } */
-/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target { arm_arch_v8m_main_ok && arm_dsp } } } } */
+/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { ! arm_dsp } } } } */
+/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target arm_dsp } } } */
/* { dg-final { scan-assembler "bxns" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-7.c
index e33568400ef..76ca271278e 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-7.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-7.c
@@ -1,16 +1,10 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=soft" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=hard" -mfloat-abi=softfp } {""} } */
-/* { dg-options "-mcmse -mfloat-abi=soft" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (void);
-int
-foo (int a)
-{
- return bar () + a + 1;
-}
+#include "../../cmse-7.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-8.c
index 024a12e0a41..a917aa7778a 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-8.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/soft/cmse-8.c
@@ -1,16 +1,10 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=soft" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=hard" -mfloat-abi=softfp } {""} } */
-/* { dg-options "-mcmse -mfloat-abi=soft" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (double);
-int
-foo (int a)
-{
- return bar (2.0) + a + 1;
-}
+#include "../../cmse-8.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c
index 7734d77dc38..01e5d659fe2 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c
@@ -1,17 +1,12 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
-extern float bar (void);
+#include "../../cmse-5.x"
-float __attribute__ ((cmse_nonsecure_entry))
-foo (void)
-{
- return bar ();
-}
/* { dg-final { scan-assembler "__acle_se_foo:" } } */
/* { dg-final { scan-assembler-not "mov\tr0, lr" } } */
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
@@ -33,8 +28,8 @@ foo (void)
/* { dg-final { scan-assembler "vmov\.f32\ts13, #1\.0" } } */
/* { dg-final { scan-assembler "vmov\.f32\ts14, #1\.0" } } */
/* { dg-final { scan-assembler "vmov\.f32\ts15, #1\.0" } } */
-/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { arm_arch_v8m_main_ok && { ! arm_dsp } } } } } */
-/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target { arm_arch_v8m_main_ok && arm_dsp } } } } */
+/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { ! arm_dsp } } } } */
+/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target arm_dsp } } } */
/* { dg-final { scan-assembler "push\t{r4}" } } */
/* { dg-final { scan-assembler "vmrs\tip, fpscr" } } */
/* { dg-final { scan-assembler "movw\tr4, #65376" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c
index fb195eb58d5..5d904786e41 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c
@@ -1,17 +1,11 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (void);
-int
-foo (int a)
-{
- return bar () + a + 1;
-}
+#include "../../cmse-7.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c
index 22ed3f8af88..3feee43c423 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c
@@ -1,17 +1,11 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
/* { dg-skip-if "Skip these if testing double precision" {*-*-*} {"-mfpu=fpv[4-5]-d16"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-sp-d16" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (double);
-int
-foo (int a)
-{
- return bar (2.0) + a + 1;
-}
+#include "../../cmse-8.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-13.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-13.c
index 9634065e7cb..4eb984f4479 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-13.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-13.c
@@ -1,17 +1,11 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (float, double);
-int
-foo (int a)
-{
- return bar (1.0f, 2.0) + a + 1;
-}
+#include "../../cmse-13.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-5.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-5.c
index 6addaa1a4ed..4815a480f66 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-5.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-5.c
@@ -1,17 +1,12 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
-extern float bar (void);
+#include "../../cmse-5.x"
-float __attribute__ ((cmse_nonsecure_entry))
-foo (void)
-{
- return bar ();
-}
/* { dg-final { scan-assembler "__acle_se_foo:" } } */
/* { dg-final { scan-assembler-not "mov\tr0, lr" } } */
/* { dg-final { scan-assembler "mov\tr1, lr" } } */
@@ -25,8 +20,8 @@ foo (void)
/* { dg-final { scan-assembler "vmov\.f64\td5, #1\.0" } } */
/* { dg-final { scan-assembler "vmov\.f64\td6, #1\.0" } } */
/* { dg-final { scan-assembler "vmov\.f64\td7, #1\.0" } } */
-/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { arm_arch_v8m_main_ok && { ! arm_dsp } } } } } */
-/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target { arm_arch_v8m_main_ok && arm_dsp } } } } */
+/* { dg-final { scan-assembler "msr\tAPSR_nzcvq, lr" { target { ! arm_dsp } } } } */
+/* { dg-final { scan-assembler "msr\tAPSR_nzcvqg, lr" { target arm_dsp } } } */
/* { dg-final { scan-assembler "push\t{r4}" } } */
/* { dg-final { scan-assembler "vmrs\tip, fpscr" } } */
/* { dg-final { scan-assembler "movw\tr4, #65376" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-7.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-7.c
index 04f8466cc11..5535c5514b1 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-7.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-7.c
@@ -1,17 +1,11 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (void);
-int
-foo (int a)
-{
- return bar () + a + 1;
-}
+#include "../../cmse-7.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-8.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-8.c
index ffe94de8541..6663fc43f5f 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-8.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/softfp/cmse-8.c
@@ -1,17 +1,11 @@
/* { dg-do compile } */
+/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
/* { dg-require-effective-target arm_arch_v8m_main_ok } */
/* { dg-add-options arm_arch_v8m_main } */
/* { dg-skip-if "Do not combine float-abi= hard | soft | softfp" {*-*-*} {"-mfloat-abi=soft" -mfloat-abi=hard } {""} } */
/* { dg-skip-if "Skip these if testing single precision" {*-*-*} {"-mfpu=*-sp-*"} {""} } */
-/* { dg-options "-mcmse -mfloat-abi=softfp -mfpu=fpv5-d16" } */
-
-int __attribute__ ((cmse_nonsecure_call)) (*bar) (double);
-int
-foo (int a)
-{
- return bar (2.0) + a + 1;
-}
+#include "../../cmse-8.x"
/* Checks for saving and clearing prior to function call. */
/* { dg-final { scan-assembler "lsrs\tr4, r4, #1" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/union-1.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/union-1.c
index 1fc846cd7a5..071955f206c 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/union-1.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/union-1.c
@@ -1,60 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a :2;
- unsigned char :0;
- unsigned short b :5;
- unsigned char :0;
- unsigned short c :3;
- unsigned char :0;
- unsigned int d :9;
-} test_st_1;
-
-typedef struct
-{
- unsigned short a :7;
- unsigned char :0;
- unsigned char b :1;
- unsigned char :0;
- unsigned short c :6;
-} test_st_2;
-
-typedef union
-{
- test_st_1 st_1;
- test_st_2 st_2;
-}test_un;
-
-typedef union
-{
- test_un un;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_un;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_un);
-
-int
-main (void)
-{
- read_un r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
-
- f (r.un);
- return 0;
-}
+#include "../union-1.x"
/* { dg-final { scan-assembler "movw\tip, #8063" } } */
/* { dg-final { scan-assembler "movt\tip, 63" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/mainline/union-2.c b/gcc/testsuite/gcc.target/arm/cmse/mainline/union-2.c
index 420d0f136ef..c7431930ff9 100644
--- a/gcc/testsuite/gcc.target/arm/cmse/mainline/union-2.c
+++ b/gcc/testsuite/gcc.target/arm/cmse/mainline/union-2.c
@@ -1,73 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mcmse" } */
-typedef struct
-{
- unsigned char a :2;
- unsigned char :0;
- unsigned short b :5;
- unsigned char :0;
- unsigned short c :3;
- unsigned char :0;
- unsigned int d :9;
-} test_st_1;
-
-typedef struct
-{
- unsigned short a :7;
- unsigned char :0;
- unsigned char b :1;
- unsigned char :0;
- unsigned short c :6;
-} test_st_2;
-
-typedef struct
-{
- unsigned char a;
- unsigned int :0;
- unsigned int b :1;
- unsigned short :0;
- unsigned short c;
- unsigned int :0;
- unsigned int d :21;
-} test_st_3;
-
-typedef union
-{
- test_st_1 st_1;
- test_st_2 st_2;
- test_st_3 st_3;
-}test_un;
-
-typedef union
-{
- test_un un;
- struct
- {
- unsigned int v1;
- unsigned int v2;
- unsigned int v3;
- unsigned int v4;
- }values;
-} read_un;
-
-
-typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_un);
-
-int
-main (void)
-{
- read_un r;
- foo_ns f;
-
- f = (foo_ns) 0x200000;
- r.values.v1 = 0xFFFFFFFF;
- r.values.v2 = 0xFFFFFFFF;
- r.values.v3 = 0xFFFFFFFF;
-
- f (r.un);
- return 0;
-}
+#include "../union-2.x"
/* { dg-final { scan-assembler "movw\tip, #8191" } } */
/* { dg-final { scan-assembler "movt\tip, 63" } } */
diff --git a/gcc/testsuite/gcc.target/arm/cmse/union-1.x b/gcc/testsuite/gcc.target/arm/cmse/union-1.x
new file mode 100644
index 00000000000..8fe95351495
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/union-1.x
@@ -0,0 +1,54 @@
+typedef struct
+{
+ unsigned char a :2;
+ unsigned char :0;
+ unsigned short b :5;
+ unsigned char :0;
+ unsigned short c :3;
+ unsigned char :0;
+ unsigned int d :9;
+} test_st_1;
+
+typedef struct
+{
+ unsigned short a :7;
+ unsigned char :0;
+ unsigned char b :1;
+ unsigned char :0;
+ unsigned short c :6;
+} test_st_2;
+
+typedef union
+{
+ test_st_1 st_1;
+ test_st_2 st_2;
+}test_un;
+
+typedef union
+{
+ test_un un;
+ struct
+ {
+ unsigned int v1;
+ unsigned int v2;
+ unsigned int v3;
+ unsigned int v4;
+ }values;
+} read_un;
+
+
+typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_un);
+
+int
+main (void)
+{
+ read_un r;
+ foo_ns f;
+
+ f = (foo_ns) 0x200000;
+ r.values.v1 = 0xFFFFFFFF;
+ r.values.v2 = 0xFFFFFFFF;
+
+ f (r.un);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/cmse/union-2.x b/gcc/testsuite/gcc.target/arm/cmse/union-2.x
new file mode 100644
index 00000000000..8a880e7cb5f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/union-2.x
@@ -0,0 +1,67 @@
+typedef struct
+{
+ unsigned char a :2;
+ unsigned char :0;
+ unsigned short b :5;
+ unsigned char :0;
+ unsigned short c :3;
+ unsigned char :0;
+ unsigned int d :9;
+} test_st_1;
+
+typedef struct
+{
+ unsigned short a :7;
+ unsigned char :0;
+ unsigned char b :1;
+ unsigned char :0;
+ unsigned short c :6;
+} test_st_2;
+
+typedef struct
+{
+ unsigned char a;
+ unsigned int :0;
+ unsigned int b :1;
+ unsigned short :0;
+ unsigned short c;
+ unsigned int :0;
+ unsigned int d :21;
+} test_st_3;
+
+typedef union
+{
+ test_st_1 st_1;
+ test_st_2 st_2;
+ test_st_3 st_3;
+}test_un;
+
+typedef union
+{
+ test_un un;
+ struct
+ {
+ unsigned int v1;
+ unsigned int v2;
+ unsigned int v3;
+ unsigned int v4;
+ }values;
+} read_un;
+
+
+typedef void __attribute__ ((cmse_nonsecure_call)) (*foo_ns) (test_un);
+
+int
+main (void)
+{
+ read_un r;
+ foo_ns f;
+
+ f = (foo_ns) 0x200000;
+ r.values.v1 = 0xFFFFFFFF;
+ r.values.v2 = 0xFFFFFFFF;
+ r.values.v3 = 0xFFFFFFFF;
+
+ f (r.un);
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
index 1260a6f8eeb..d79d014e27c 100644
--- a/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
+++ b/gcc/testsuite/gcc.target/arm/copysign_softfloat_1.c
@@ -1,5 +1,6 @@
/* { dg-do run } */
/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-require-effective-target arm_soft_ok } */
/* { dg-skip-if "skip override" { *-*-* } { "-mfloat-abi=softfp" "-mfloat-abi=hard" } { "" } } */
/* { dg-options "-O2 -mfloat-abi=soft --save-temps" } */
extern void abort (void);
diff --git a/gcc/testsuite/gcc.target/arm/lp1189445.c b/gcc/testsuite/gcc.target/arm/lp1189445.c
index 766748e5509..4866953558a 100644
--- a/gcc/testsuite/gcc.target/arm/lp1189445.c
+++ b/gcc/testsuite/gcc.target/arm/lp1189445.c
@@ -1,7 +1,7 @@
/* { dg-do compile } */
+/* { dg-options "-O3" } */
/* { dg-require-effective-target arm_neon } */
/* { dg-add-options arm_neon } */
-/* { dg-options "-O3" } */
int id;
int
diff --git a/gcc/testsuite/gcc.target/arm/pr54300.C b/gcc/testsuite/gcc.target/arm/pr54300.C
index eb1a74e36cf..9105e279b33 100644
--- a/gcc/testsuite/gcc.target/arm/pr54300.C
+++ b/gcc/testsuite/gcc.target/arm/pr54300.C
@@ -51,6 +51,7 @@ test(unsigned short *_Inp, int32_t *_Out,
vst1q_s32( _Out, c );
}
+int
main()
{
unsigned short a[4] = {1, 2, 3, 4};
@@ -58,4 +59,5 @@ main()
test(a, b, 1, 1, ~0);
if (b[0] != 1 || b[1] != 2 || b[2] != 3 || b[3] != 4)
abort();
+ return 0;
}
diff --git a/gcc/testsuite/gcc.target/arm/pr67989.C b/gcc/testsuite/gcc.target/arm/pr67989.C
index 0006924e24f..89d2530f3a6 100644
--- a/gcc/testsuite/gcc.target/arm/pr67989.C
+++ b/gcc/testsuite/gcc.target/arm/pr67989.C
@@ -2,7 +2,8 @@
/* { dg-options "-std=c++11 -O2" } */
/* { dg-require-effective-target arm_arch_v4t_ok } */
/* { dg-add-options arm_arch_v4t } */
-/* { dg-additional-options "-marm" } */
+/* { dg-additional-options "-marm -Wno-return-type" } */
+
/* Duplicate version of the test in g++.dg to be able to run this test only if
ARMv4t in ARM execution state can be targetted. Newer architecture don't