diff options
Diffstat (limited to 'gcc/testsuite/gcc.target/arm')
67 files changed, 812 insertions, 32 deletions
diff --git a/gcc/testsuite/gcc.target/arm/interrupt-1.c b/gcc/testsuite/gcc.target/arm/interrupt-1.c new file mode 100644 index 00000000000..18379de33d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/interrupt-1.c @@ -0,0 +1,23 @@ +/* Verify that prologue and epilogue are correct for functions with + __attribute__ ((interrupt)). */ +/* { dg-do compile } */ +/* { dg-options "-O0" } */ + +/* This test is not valid when -mthumb. We just cheat. */ +#ifndef __thumb__ +extern void bar (int); +extern void foo (void) __attribute__ ((interrupt("IRQ"))); + +void foo () +{ + bar (0); +} +#else +void foo () +{ + asm ("stmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, lr}"); + asm ("ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, pc}^"); +} +#endif +/* { dg-final { scan-assembler "stmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, lr}" } } */ +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, fp, ip, pc}\\^" } } */ diff --git a/gcc/testsuite/gcc.target/arm/interrupt-2.c b/gcc/testsuite/gcc.target/arm/interrupt-2.c new file mode 100644 index 00000000000..b979bf17e8a --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/interrupt-2.c @@ -0,0 +1,26 @@ +/* Verify that prologue and epilogue are correct for functions with + __attribute__ ((interrupt)). */ +/* { dg-do compile } */ +/* { dg-options "-O1" } */ + +/* This test is not valid when -mthum. We just cheat. */ +#ifndef __thumb__ +extern void bar (int); +extern void test (void) __attribute__((__interrupt__)); + +int foo; +void test() +{ + funcptrs(foo); + foo = 0; +} +#else +void test () +{ + asm ("stmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, lr}"); + asm ("ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, pc}^"); +} +#endif + +/* { dg-final { scan-assembler "stmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, lr}" } } */ +/* { dg-final { scan-assembler "ldmfd\tsp!, {r0, r1, r2, r3, r4, r5, ip, pc}\\^" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon-vadds64.c b/gcc/testsuite/gcc.target/arm/neon-vadds64.c new file mode 100644 index 00000000000..284a1d8adc9 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vadds64.c @@ -0,0 +1,21 @@ +/* Test the `vadd_s64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x1_t out_int64x1_t = 0; + int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL; + int64x1_t arg1_int64x1_t = (int64x1_t)0x00000000deadbeefLL; + + out_int64x1_t = vadd_s64 (arg0_int64x1_t, arg1_int64x1_t); + if (out_int64x1_t != (int64x1_t)0xdeadbeefdeadbeefLL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vaddu64.c b/gcc/testsuite/gcc.target/arm/neon-vaddu64.c new file mode 100644 index 00000000000..05bda8b046e --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vaddu64.c @@ -0,0 +1,21 @@ +/* Test the `vadd_u64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x1_t out_uint64x1_t = 0; + uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL; + uint64x1_t arg1_uint64x1_t = (uint64x1_t)0x00000000deadbeefLL; + + out_uint64x1_t = vadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t); + if (out_uint64x1_t != (uint64x1_t)0xdeadbeefdeadbeefLL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vands64.c b/gcc/testsuite/gcc.target/arm/neon-vands64.c new file mode 100644 index 00000000000..8b6975db6e0 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vands64.c @@ -0,0 +1,21 @@ +/* Test the `vand_s64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x1_t out_int64x1_t = 0; + int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL; + int64x1_t arg1_int64x1_t = (int64x1_t)0xdead00000000beefLL; + + out_int64x1_t = vand_s64 (arg0_int64x1_t, arg1_int64x1_t); + if (out_int64x1_t != (int64x1_t)0xdead000000000000LL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vandu64.c b/gcc/testsuite/gcc.target/arm/neon-vandu64.c new file mode 100644 index 00000000000..a8ec3a28b4d --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vandu64.c @@ -0,0 +1,21 @@ +/* Test the `vand_u64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x1_t out_uint64x1_t = 0; + uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL; + uint64x1_t arg1_uint64x1_t = (uint64x1_t)0xdead00000000beefLL; + + out_uint64x1_t = vand_u64 (arg0_uint64x1_t, arg1_uint64x1_t); + if (out_uint64x1_t != (uint64x1_t)0xdead000000000000LL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vbics64.c b/gcc/testsuite/gcc.target/arm/neon-vbics64.c new file mode 100644 index 00000000000..ec3438baef8 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vbics64.c @@ -0,0 +1,21 @@ +/* Test the `vbic_s64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x1_t out_int64x1_t = 0; + int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL; + int64x1_t arg1_int64x1_t = (int64x1_t)(~0xdead00000000beefLL); + + out_int64x1_t = vbic_s64 (arg0_int64x1_t, arg1_int64x1_t); + if (out_int64x1_t != (int64x1_t)0xdead000000000000LL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vbicu64.c b/gcc/testsuite/gcc.target/arm/neon-vbicu64.c new file mode 100644 index 00000000000..a0c1b85b405 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vbicu64.c @@ -0,0 +1,21 @@ +/* Test the `vbic_u64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x1_t out_uint64x1_t = 0; + uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL; + uint64x1_t arg1_uint64x1_t = (uint64x1_t)(~0xdead00000000beefLL); + + out_uint64x1_t = vbic_u64 (arg0_uint64x1_t, arg1_uint64x1_t); + if (out_uint64x1_t != (uint64x1_t)0xdead000000000000LL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vdupQ_lanes64.c b/gcc/testsuite/gcc.target/arm/neon-vdupQ_lanes64.c new file mode 100644 index 00000000000..da24eaca69f --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vdupQ_lanes64.c @@ -0,0 +1,22 @@ +/* Test the `vdupq_lanes64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x2_t out_int64x2_t = {0, 0}; + int64_t arg0_int64_t = (int64_t) 0xdeadbeef; + + out_int64x2_t = vdupq_lane_s64 ((int64x1_t)arg0_int64_t, 0); + if (vgetq_lane_s64 (out_int64x2_t, 0) != arg0_int64_t) + abort(); + if (vgetq_lane_s64 (out_int64x2_t, 1) != arg0_int64_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vdupQ_laneu64.c b/gcc/testsuite/gcc.target/arm/neon-vdupQ_laneu64.c new file mode 100644 index 00000000000..cc19ea51252 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vdupQ_laneu64.c @@ -0,0 +1,22 @@ +/* Test the `vdupq_laneu64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x2_t out_uint64x2_t = {0, 0}; + uint64_t arg0_uint64_t = (uint64_t) 0xdeadbeef; + + out_uint64x2_t = vdupq_lane_u64 ((uint64x1_t)arg0_uint64_t, 0); + if (vgetq_lane_u64 (out_uint64x2_t, 0) != arg0_uint64_t) + abort(); + if (vgetq_lane_u64 (out_uint64x2_t, 1) != arg0_uint64_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vdupQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon-vdupQ_ns64.c new file mode 100644 index 00000000000..79b4d4eb60d --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vdupQ_ns64.c @@ -0,0 +1,22 @@ +/* Test the `vdupq_ns64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x2_t out_int64x2_t = {0, 0}; + int64_t arg0_int64_t = (int64_t) 0xdeadbeef; + + out_int64x2_t = vdupq_n_s64 (arg0_int64_t); + if (vgetq_lane_s64 (out_int64x2_t, 0) != arg0_int64_t) + abort(); + if (vgetq_lane_s64 (out_int64x2_t, 1) != arg0_int64_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vdupQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon-vdupQ_nu64.c new file mode 100644 index 00000000000..ef6f47fd3aa --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vdupQ_nu64.c @@ -0,0 +1,22 @@ +/* Test the `vdupq_nu64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x2_t out_uint64x2_t = {0, 0}; + uint64_t arg0_uint64_t = (uint64_t) 0xdeadbeef; + + out_uint64x2_t = vdupq_n_u64 (arg0_uint64_t); + if (vgetq_lane_u64 (out_uint64x2_t, 0) != arg0_uint64_t) + abort(); + if (vgetq_lane_u64 (out_uint64x2_t, 1) != arg0_uint64_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vdup_ns64.c b/gcc/testsuite/gcc.target/arm/neon-vdup_ns64.c new file mode 100644 index 00000000000..589ea22930d --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vdup_ns64.c @@ -0,0 +1,20 @@ +/* Test the `vdup_ns64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x1_t out_int64x1_t = 0; + int64_t arg0_int64_t = (int64_t) 0xdeadbeef; + + out_int64x1_t = vdup_n_s64 (arg0_int64_t); + if ((int64_t)out_int64x1_t != arg0_int64_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vdup_nu64.c b/gcc/testsuite/gcc.target/arm/neon-vdup_nu64.c new file mode 100644 index 00000000000..8bed5a0c7d7 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vdup_nu64.c @@ -0,0 +1,20 @@ +/* Test the `vdup_nu64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x1_t out_uint64x1_t = 0; + uint64_t arg0_uint64_t = (uint64_t) 0xdeadbeef; + + out_uint64x1_t = vdup_n_u64 (arg0_uint64_t); + if ((uint64_t)out_uint64x1_t != arg0_uint64_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-veors64.c b/gcc/testsuite/gcc.target/arm/neon-veors64.c new file mode 100644 index 00000000000..59d5baa3579 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-veors64.c @@ -0,0 +1,21 @@ +/* Test the `veor_s64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x1_t out_int64x1_t = 0; + int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL; + int64x1_t arg1_int64x1_t = (int64x1_t)0xdead00000000beefLL; + + out_int64x1_t = veor_s64 (arg0_int64x1_t, arg1_int64x1_t); + if (out_int64x1_t != (int64x1_t)0x0000beef0000beefLL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-veoru64.c b/gcc/testsuite/gcc.target/arm/neon-veoru64.c new file mode 100644 index 00000000000..b7ff77af0d5 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-veoru64.c @@ -0,0 +1,21 @@ +/* Test the `veor_u64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x1_t out_uint64x1_t = 0; + uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL; + uint64x1_t arg1_uint64x1_t = (uint64x1_t)0xdead00000000beefLL; + + out_uint64x1_t = veor_u64 (arg0_uint64x1_t, arg1_uint64x1_t); + if (out_uint64x1_t != (uint64x1_t)0x0000beef0000beefLL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vget_lanes64.c b/gcc/testsuite/gcc.target/arm/neon-vget_lanes64.c new file mode 100644 index 00000000000..5891e66193a --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vget_lanes64.c @@ -0,0 +1,20 @@ +/* Test the `vget_lane_s64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64_t out_int64_t = 0; + int64x1_t arg0_int64x1_t = (int64x1_t) 0xdeadbeefbadf00dLL; + + out_int64_t = vget_lane_s64 (arg0_int64x1_t, 0); + if (out_int64_t != (int64_t)arg0_int64x1_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vget_laneu64.c b/gcc/testsuite/gcc.target/arm/neon-vget_laneu64.c new file mode 100644 index 00000000000..b0ce070d3b9 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vget_laneu64.c @@ -0,0 +1,20 @@ +/* Test the `vget_lane_u64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64_t out_uint64_t = 0; + uint64x1_t arg0_uint64x1_t = (uint64x1_t) 0xdeadbeefbadf00dLL; + + out_uint64_t = vget_lane_u64 (arg0_uint64x1_t, 0); + if (out_uint64_t != (uint64_t)arg0_uint64x1_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vmla-1.c b/gcc/testsuite/gcc.target/arm/neon-vmla-1.c index 336a53bb481..9d239ed47d0 100644 --- a/gcc/testsuite/gcc.target/arm/neon-vmla-1.c +++ b/gcc/testsuite/gcc.target/arm/neon-vmla-1.c @@ -1,5 +1,5 @@ /* { dg-require-effective-target arm_neon_hw } */ -/* { dg-options "-O2 -ftree-vectorize" } */ +/* { dg-options "-O2 -ftree-vectorize -ffast-math" } */ /* { dg-add-options arm_neon } */ /* { dg-final { scan-assembler "vmla\\.f32" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon-vmls-1.c b/gcc/testsuite/gcc.target/arm/neon-vmls-1.c index 5e5e0c757ac..2beaebe17cf 100644 --- a/gcc/testsuite/gcc.target/arm/neon-vmls-1.c +++ b/gcc/testsuite/gcc.target/arm/neon-vmls-1.c @@ -1,5 +1,5 @@ /* { dg-require-effective-target arm_neon_hw } */ -/* { dg-options "-O2 -ftree-vectorize" } */ +/* { dg-options "-O2 -ftree-vectorize -ffast-math" } */ /* { dg-add-options arm_neon } */ /* { dg-final { scan-assembler "vmls\\.f32" } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon-vmovQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon-vmovQ_ns64.c new file mode 100644 index 00000000000..5a8abdce038 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vmovQ_ns64.c @@ -0,0 +1,22 @@ +/* Test the `vmovq_ns64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x2_t out_int64x2_t = {0, 0}; + int64_t arg0_int64_t = (int64_t) 0xdeadbeef; + + out_int64x2_t = vmovq_n_s64 (arg0_int64_t); + if (vgetq_lane_s64 (out_int64x2_t, 0) != arg0_int64_t) + abort(); + if (vgetq_lane_s64 (out_int64x2_t, 1) != arg0_int64_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vmovQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon-vmovQ_nu64.c new file mode 100644 index 00000000000..8012fc1753d --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vmovQ_nu64.c @@ -0,0 +1,23 @@ +/* Test the `vmovq_nu64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x2_t out_uint64x2_t = {0, 0}; + uint64_t arg0_uint64_t = (uint64_t) 0xdeadbeef; + + out_uint64x2_t = vmovq_n_u64 (arg0_uint64_t); + if (vgetq_lane_u64 (out_uint64x2_t, 0) != arg0_uint64_t) + abort(); + if (vgetq_lane_u64 (out_uint64x2_t, 1) != arg0_uint64_t) + abort(); + return 0; +} + diff --git a/gcc/testsuite/gcc.target/arm/neon-vmov_ns64.c b/gcc/testsuite/gcc.target/arm/neon-vmov_ns64.c new file mode 100644 index 00000000000..c125f4a247d --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vmov_ns64.c @@ -0,0 +1,20 @@ +/* Test the `vmov_ns64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x1_t out_int64x1_t = 0; + int64_t arg0_int64_t = (int64_t) 0xdeadbeef; + + out_int64x1_t = vmov_n_s64 (arg0_int64_t); + if ((int64_t)out_int64x1_t != arg0_int64_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vmov_nu64.c b/gcc/testsuite/gcc.target/arm/neon-vmov_nu64.c new file mode 100644 index 00000000000..71ecaed134e --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vmov_nu64.c @@ -0,0 +1,20 @@ +/* Test the `vmov_nu64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x1_t out_uint64x1_t = 0; + uint64_t arg0_uint64_t = (uint64_t) 0xdeadbeef; + + out_uint64x1_t = vmov_n_u64 (arg0_uint64_t); + if ((uint64_t)out_uint64x1_t != arg0_uint64_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vorns64.c b/gcc/testsuite/gcc.target/arm/neon-vorns64.c new file mode 100644 index 00000000000..364dbd1904c --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vorns64.c @@ -0,0 +1,21 @@ +/* Test the `vorn_s64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x1_t out_int64x1_t = 0; + int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL; + int64x1_t arg1_int64x1_t = (int64x1_t)(~0xdead00000000beefLL); + + out_int64x1_t = vorn_s64 (arg0_int64x1_t, arg1_int64x1_t); + if (out_int64x1_t != (int64x1_t)0xdeadbeef0000beefLL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vornu64.c b/gcc/testsuite/gcc.target/arm/neon-vornu64.c new file mode 100644 index 00000000000..b352868469f --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vornu64.c @@ -0,0 +1,21 @@ +/* Test the `vorn_u64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x1_t out_uint64x1_t = 0; + uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL; + uint64x1_t arg1_uint64x1_t = (uint64x1_t)(~0xdead00000000beefLL); + + out_uint64x1_t = vorn_u64 (arg0_uint64x1_t, arg1_uint64x1_t); + if (out_uint64x1_t != (uint64x1_t)0xdeadbeef0000beefLL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vorrs64.c b/gcc/testsuite/gcc.target/arm/neon-vorrs64.c new file mode 100644 index 00000000000..90ced9e9c86 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vorrs64.c @@ -0,0 +1,21 @@ +/* Test the `vorr_s64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x1_t out_int64x1_t = 0; + int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL; + int64x1_t arg1_int64x1_t = (int64x1_t)0xdead00000000beefLL; + + out_int64x1_t = vorr_s64 (arg0_int64x1_t, arg1_int64x1_t); + if (out_int64x1_t != (int64x1_t)0xdeadbeef0000beefLL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vorru64.c b/gcc/testsuite/gcc.target/arm/neon-vorru64.c new file mode 100644 index 00000000000..5b44afb07ab --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vorru64.c @@ -0,0 +1,21 @@ +/* Test the `vorr_u64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x1_t out_uint64x1_t = 0; + uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL; + uint64x1_t arg1_uint64x1_t = (uint64x1_t)0xdead00000000beefLL; + + out_uint64x1_t = vorr_u64 (arg0_uint64x1_t, arg1_uint64x1_t); + if (out_uint64x1_t != (uint64x1_t)0xdeadbeef0000beefLL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vset_lanes64.c b/gcc/testsuite/gcc.target/arm/neon-vset_lanes64.c new file mode 100644 index 00000000000..10113932711 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vset_lanes64.c @@ -0,0 +1,21 @@ +/* Test the `vset_lane_s64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x1_t out_int64x1_t = 0; + int64_t arg0_int64_t = 0xf00f00f00LL; + int64x1_t arg1_int64x1_t = (int64x1_t) 0xdeadbeefbadf00dLL; + + out_int64x1_t = vset_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0); + if ((int64_t)out_int64x1_t != arg0_int64_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vset_laneu64.c b/gcc/testsuite/gcc.target/arm/neon-vset_laneu64.c new file mode 100644 index 00000000000..cafc2607687 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vset_laneu64.c @@ -0,0 +1,21 @@ +/* Test the `vset_lane_s64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x1_t out_uint64x1_t = 0; + uint64_t arg0_uint64_t = 0xf00f00f00LL; + uint64x1_t arg1_uint64x1_t = (uint64x1_t) 0xdeadbeefbadf00dLL; + + out_uint64x1_t = vset_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0); + if ((uint64_t)out_uint64x1_t != arg0_uint64_t) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vsubs64.c b/gcc/testsuite/gcc.target/arm/neon-vsubs64.c new file mode 100644 index 00000000000..23947004127 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vsubs64.c @@ -0,0 +1,21 @@ +/* Test the `vsub_s64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + int64x1_t out_int64x1_t = 0; + int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeefdeadbeefLL; + int64x1_t arg1_int64x1_t = (int64x1_t)0x0000beefdead0000LL; + + out_int64x1_t = vsub_s64 (arg0_int64x1_t, arg1_int64x1_t); + if (out_int64x1_t != (int64x1_t)0xdead00000000beefLL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon-vsubu64.c b/gcc/testsuite/gcc.target/arm/neon-vsubu64.c new file mode 100644 index 00000000000..0162e206ef6 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/neon-vsubu64.c @@ -0,0 +1,21 @@ +/* Test the `vsub_u64' ARM Neon intrinsic. */ + +/* { dg-do run } */ +/* { dg-require-effective-target arm_neon_hw } */ +/* { dg-options "-O0" } */ +/* { dg-add-options arm_neon } */ + +#include "arm_neon.h" +#include <stdlib.h> + +int main (void) +{ + uint64x1_t out_uint64x1_t = 0; + uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeefdeadbeefLL; + uint64x1_t arg1_uint64x1_t = (uint64x1_t)0x0000beefdead0000LL; + + out_uint64x1_t = vsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t); + if (out_uint64x1_t != (uint64x1_t)0xdead00000000beefLL) + abort(); + return 0; +} diff --git a/gcc/testsuite/gcc.target/arm/neon/vadds64.c b/gcc/testsuite/gcc.target/arm/neon/vadds64.c index d3923775237..fb17e0ea3b6 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vadds64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vadds64.c @@ -17,5 +17,4 @@ void test_vadds64 (void) out_int64x1_t = vadd_s64 (arg0_int64x1_t, arg1_int64x1_t); } -/* { dg-final { scan-assembler "vadd\.i64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vaddu64.c b/gcc/testsuite/gcc.target/arm/neon/vaddu64.c index 1114725b44d..18fc500b9f2 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vaddu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vaddu64.c @@ -17,5 +17,4 @@ void test_vaddu64 (void) out_uint64x1_t = vadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t); } -/* { dg-final { scan-assembler "vadd\.i64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vands64.c b/gcc/testsuite/gcc.target/arm/neon/vands64.c index b34abab6651..13e18fb0cbf 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vands64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vands64.c @@ -17,5 +17,4 @@ void test_vands64 (void) out_int64x1_t = vand_s64 (arg0_int64x1_t, arg1_int64x1_t); } -/* { dg-final { scan-assembler "vand\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vandu64.c b/gcc/testsuite/gcc.target/arm/neon/vandu64.c index 4660272cc20..d9ddf847af3 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vandu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vandu64.c @@ -17,5 +17,4 @@ void test_vandu64 (void) out_uint64x1_t = vand_u64 (arg0_uint64x1_t, arg1_uint64x1_t); } -/* { dg-final { scan-assembler "vand\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbics64.c b/gcc/testsuite/gcc.target/arm/neon/vbics64.c index 41db18e2744..379db45f4db 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vbics64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vbics64.c @@ -17,5 +17,4 @@ void test_vbics64 (void) out_int64x1_t = vbic_s64 (arg0_int64x1_t, arg1_int64x1_t); } -/* { dg-final { scan-assembler "vbic\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vbicu64.c b/gcc/testsuite/gcc.target/arm/neon/vbicu64.c index 9f0a047fc92..c276d65ebe3 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vbicu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vbicu64.c @@ -17,5 +17,4 @@ void test_vbicu64 (void) out_uint64x1_t = vbic_u64 (arg0_uint64x1_t, arg1_uint64x1_t); } -/* { dg-final { scan-assembler "vbic\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c index 987a4d3f63f..ab749a7bbad 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c @@ -16,6 +16,4 @@ void test_vdupQ_ns64 (void) out_int64x2_t = vdupq_n_s64 (arg0_int64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c index c2e5d481a3d..0ddb72decc8 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c @@ -16,6 +16,4 @@ void test_vdupQ_nu64 (void) out_uint64x2_t = vdupq_n_u64 (arg0_uint64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c index 720cc0452d2..033f1b4744c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c @@ -16,5 +16,4 @@ void test_vdup_ns64 (void) out_int64x1_t = vdup_n_s64 (arg0_int64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c index 4033e4757dc..6888125c638 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c @@ -16,5 +16,4 @@ void test_vdup_nu64 (void) out_uint64x1_t = vdup_n_u64 (arg0_uint64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veors64.c b/gcc/testsuite/gcc.target/arm/neon/veors64.c index 0543b22e2e1..2781be1b2cc 100644 --- a/gcc/testsuite/gcc.target/arm/neon/veors64.c +++ b/gcc/testsuite/gcc.target/arm/neon/veors64.c @@ -17,5 +17,4 @@ void test_veors64 (void) out_int64x1_t = veor_s64 (arg0_int64x1_t, arg1_int64x1_t); } -/* { dg-final { scan-assembler "veor\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/veoru64.c b/gcc/testsuite/gcc.target/arm/neon/veoru64.c index 1098285dc6f..19d081489ed 100644 --- a/gcc/testsuite/gcc.target/arm/neon/veoru64.c +++ b/gcc/testsuite/gcc.target/arm/neon/veoru64.c @@ -17,5 +17,4 @@ void test_veoru64 (void) out_uint64x1_t = veor_u64 (arg0_uint64x1_t, arg1_uint64x1_t); } -/* { dg-final { scan-assembler "veor\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c index 136242900a7..5dc99424fa5 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c @@ -16,5 +16,4 @@ void test_vget_lanes64 (void) out_int64_t = vget_lane_s64 (arg0_int64x1_t, 0); } -/* { dg-final { scan-assembler "vmov\[ \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c index 4b44a1e8c37..496a057fc73 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c @@ -16,5 +16,4 @@ void test_vget_laneu64 (void) out_uint64_t = vget_lane_u64 (arg0_uint64x1_t, 0); } -/* { dg-final { scan-assembler "vmov\[ \]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c index 89fe2c150fd..35936cbd43a 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c @@ -16,6 +16,4 @@ void test_vmovQ_ns64 (void) out_int64x2_t = vmovq_n_s64 (arg0_int64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c index d7d3e365ecd..e373a121865 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c @@ -16,6 +16,4 @@ void test_vmovQ_nu64 (void) out_uint64x2_t = vmovq_n_u64 (arg0_uint64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c b/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c index 6d2d61678b9..7b011282832 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c @@ -16,5 +16,4 @@ void test_vmov_ns64 (void) out_int64x1_t = vmov_n_s64 (arg0_int64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c b/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c index 9434377d2ff..b9613e06ff1 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c @@ -16,5 +16,4 @@ void test_vmov_nu64 (void) out_uint64x1_t = vmov_n_u64 (arg0_uint64_t); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorns64.c b/gcc/testsuite/gcc.target/arm/neon/vorns64.c index eb3253743a2..d7b8e60d208 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vorns64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vorns64.c @@ -17,5 +17,4 @@ void test_vorns64 (void) out_int64x1_t = vorn_s64 (arg0_int64x1_t, arg1_int64x1_t); } -/* { dg-final { scan-assembler "vorn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vornu64.c b/gcc/testsuite/gcc.target/arm/neon/vornu64.c index a92a7d7124c..6fb3a9502a6 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vornu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vornu64.c @@ -17,5 +17,4 @@ void test_vornu64 (void) out_uint64x1_t = vorn_u64 (arg0_uint64x1_t, arg1_uint64x1_t); } -/* { dg-final { scan-assembler "vorn\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorrs64.c b/gcc/testsuite/gcc.target/arm/neon/vorrs64.c index eaa107cb649..a1c7e5ee222 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vorrs64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vorrs64.c @@ -17,5 +17,4 @@ void test_vorrs64 (void) out_int64x1_t = vorr_s64 (arg0_int64x1_t, arg1_int64x1_t); } -/* { dg-final { scan-assembler "vorr\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vorru64.c b/gcc/testsuite/gcc.target/arm/neon/vorru64.c index 2dc4898a779..1991b02152f 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vorru64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vorru64.c @@ -17,5 +17,4 @@ void test_vorru64 (void) out_uint64x1_t = vorr_u64 (arg0_uint64x1_t, arg1_uint64x1_t); } -/* { dg-final { scan-assembler "vorr\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c b/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c index 2c4bede7796..5c5454f9807 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c @@ -17,5 +17,4 @@ void test_vset_lanes64 (void) out_int64x1_t = vset_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c b/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c index 22ba53c20a9..3bff5d232c7 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c @@ -17,5 +17,4 @@ void test_vset_laneu64 (void) out_uint64x1_t = vset_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0); } -/* { dg-final { scan-assembler "vmov\[ \]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubs64.c b/gcc/testsuite/gcc.target/arm/neon/vsubs64.c index 656039989a0..57bcd33d42c 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vsubs64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vsubs64.c @@ -17,5 +17,4 @@ void test_vsubs64 (void) out_int64x1_t = vsub_s64 (arg0_int64x1_t, arg1_int64x1_t); } -/* { dg-final { scan-assembler "vsub\.i64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/neon/vsubu64.c b/gcc/testsuite/gcc.target/arm/neon/vsubu64.c index 5e4a2a871e9..3a8ae462e81 100644 --- a/gcc/testsuite/gcc.target/arm/neon/vsubu64.c +++ b/gcc/testsuite/gcc.target/arm/neon/vsubu64.c @@ -17,5 +17,4 @@ void test_vsubu64 (void) out_uint64x1_t = vsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t); } -/* { dg-final { scan-assembler "vsub\.i64\[ \]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/gcc.target/arm/pr39839.c b/gcc/testsuite/gcc.target/arm/pr39839.c new file mode 100644 index 00000000000..31e865af2f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr39839.c @@ -0,0 +1,24 @@ +/* { dg-options "-mthumb -Os -march=armv5te -mthumb-interwork -fpic" } */ +/* { dg-require-effective-target arm_thumb1_ok } */ +/* { dg-final { scan-assembler-not "str\[\\t \]*r.,\[\\t \]*.sp," } } */ + +struct S +{ + int count; + char *addr; +}; + +void func(const char*, const char*, int, const char*); + +/* This function should not need to spill to the stack. */ +void test(struct S *p) +{ + int off = p->count; + while (p->count >= 0) + { + const char *s = "xyz"; + if (*p->addr) s = "pqr"; + func("abcde", p->addr + off, off, s); + p->count--; + } +} diff --git a/gcc/testsuite/gcc.target/arm/pr40657-1.c b/gcc/testsuite/gcc.target/arm/pr40657-1.c new file mode 100644 index 00000000000..a6ac6c78a1c --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr40657-1.c @@ -0,0 +1,13 @@ +/* { dg-options "-Os -march=armv5te -mthumb" } */ +/* { dg-require-effective-target arm_thumb1_ok } */ +/* { dg-final { scan-assembler "pop.*r1.*pc" } } */ +/* { dg-final { scan-assembler-not "sub\[\\t \]*sp,\[\\t \]*sp" } } */ +/* { dg-final { scan-assembler-not "add\[\\t \]*sp,\[\\t \]*sp" } } */ + +extern void bar(int*); +int foo() +{ + int x; + bar(&x); + return x; +} diff --git a/gcc/testsuite/gcc.target/arm/pr40657-2.c b/gcc/testsuite/gcc.target/arm/pr40657-2.c new file mode 100644 index 00000000000..31d48376730 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr40657-2.c @@ -0,0 +1,20 @@ +/* { dg-options "-Os -march=armv4t -mthumb" } */ +/* { dg-require-effective-target arm_thumb1_ok } */ +/* { dg-final { scan-assembler-not "sub\[\\t \]*sp,\[\\t \]*sp" } } */ +/* { dg-final { scan-assembler-not "add\[\\t \]*sp,\[\\t \]*sp" } } */ + +/* Here, we test that if there's a pop of r[4567] in the epilogue, + add sp,sp,#12 is removed and replaced by three additional pops + of lower-numbered regs. */ + +extern void bar(int*); + +int t1, t2, t3, t4, t5; +int foo() +{ + int i,j,k,x = 0; + for (i = 0; i < t1; i++) + for (j = 0; j < t2; j++) + bar(&x); + return x; +} diff --git a/gcc/testsuite/gcc.target/arm/pr42172-1.c b/gcc/testsuite/gcc.target/arm/pr42172-1.c new file mode 100644 index 00000000000..207f6001fb7 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr42172-1.c @@ -0,0 +1,19 @@ +/* { dg-options "-O2" } */ + +struct A { + unsigned int f1 : 3; + unsigned int f2 : 3; + unsigned int f3 : 1; + unsigned int f4 : 1; + +}; + +void init_A (struct A *this) +{ + this->f1 = 0; + this->f2 = 1; + this->f3 = 0; + this->f4 = 0; +} + +/* { dg-final { scan-assembler-times "ldr" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/pr42235.c b/gcc/testsuite/gcc.target/arm/pr42235.c new file mode 100644 index 00000000000..478abcc0765 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr42235.c @@ -0,0 +1,11 @@ +/* { dg-options "-mthumb -O2 -march=armv5te" } */ +/* { dg-require-effective-target arm_thumb1_ok } */ +/* { dg-final { scan-assembler-not "add\[\\t \]*r.,\[\\t \]*r.,\[\\t \]*\#1" } } */ +/* { dg-final { scan-assembler-not "add\[\\t \]*r.,\[\\t \]*\#1" } } */ + +#include <string.h> + +int foo (char *x) +{ + memset (x, 0, 6); +} diff --git a/gcc/testsuite/gcc.target/arm/pr42505.c b/gcc/testsuite/gcc.target/arm/pr42505.c new file mode 100644 index 00000000000..60902c35d27 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr42505.c @@ -0,0 +1,23 @@ +/* { dg-options "-mthumb -Os -march=armv5te" } */ +/* { dg-require-effective-target arm_thumb1_ok } */ +/* { dg-final { scan-assembler-not "str\[\\t \]*r.,\[\\t \]*.sp," } } */ + +struct A { + int f1; + int f2; +}; + +int func(int c); + +/* This function should not need to spill anything to the stack. */ +int test(struct A* src, struct A* dst, int count) +{ + while (count--) { + if (!func(src->f2)) { + return 0; + } + *dst++ = *src++; + } + + return 1; +} diff --git a/gcc/testsuite/gcc.target/arm/pr42835.c b/gcc/testsuite/gcc.target/arm/pr42835.c new file mode 100644 index 00000000000..71c51ebe31c --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr42835.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-mthumb -Os" } */ +/* { dg-require-effective-target arm_thumb2_ok } */ + +int foo(int *p, int i) +{ + return( (i < 0 && *p == 1) + || (i > 0 && *p == 2) ); +} + +/* { dg-final { scan-assembler-times "movne\[\\t \]*r.,\[\\t \]*#" 1 } } */ +/* { dg-final { scan-assembler-times "moveq\[\\t \]*r.,\[\\t \]*#" 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/pr43698.c b/gcc/testsuite/gcc.target/arm/pr43698.c new file mode 100644 index 00000000000..407cf7eac2c --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr43698.c @@ -0,0 +1,38 @@ +/* { dg-do run } */ +/* { dg-options "-Os -march=armv7-a" } */ +#include <stdint.h> +#include <stdlib.h> + + +char do_reverse_endian = 0; + +# define bswap_32(x) \ + ((((x) & 0xff000000) >> 24) | \ + (((x) & 0x00ff0000) >> 8) | \ + (((x) & 0x0000ff00) << 8) | \ + (((x) & 0x000000ff) << 24)) + +#define EGET(X) \ + (__extension__ ({ \ + uint64_t __res; \ + if (!do_reverse_endian) { __res = (X); \ + } else if (sizeof(X) == 4) { __res = bswap_32((X)); \ + } \ + __res; \ + })) + +void __attribute__((noinline)) X(char **phdr, char **data, int *phoff) +{ + *phdr = *data + EGET(*phoff); +} + +int main() +{ + char *phdr; + char *data = (char *)0x40164000; + int phoff = 0x34; + X(&phdr, &data, &phoff); + if (phdr != (char *)0x40164034) + abort (); + exit (0); +} diff --git a/gcc/testsuite/gcc.target/arm/pr44788.c b/gcc/testsuite/gcc.target/arm/pr44788.c new file mode 100644 index 00000000000..eb4bc11af9f --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr44788.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target arm_thumb2_ok } */ +/* { dg-options "-Os -fno-strict-aliasing -fPIC -mthumb -march=armv7-a -mfpu=vfp3 -mfloat-abi=softfp" } */ + +void joint_decode(float* mlt_buffer1, int t) { + int i; + float decode_buffer[1060]; + foo(decode_buffer); + for (i=0; i<10 ; i++) { + mlt_buffer1[i] = i * decode_buffer[t]; + } +} |