diff options
Diffstat (limited to 'gcc/testsuite/gcc.target/aarch64/sve_fnmsb_1.c')
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/sve_fnmsb_1.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/gcc/testsuite/gcc.target/aarch64/sve_fnmsb_1.c b/gcc/testsuite/gcc.target/aarch64/sve_fnmsb_1.c new file mode 100644 index 00000000000..6c95b0abc8e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve_fnmsb_1.c @@ -0,0 +1,29 @@ +/* { dg-do assemble } */ +/* { dg-options " -O3 -march=armv8-a+sve -msve-vector-bits=256 --save-temps" } */ + +typedef _Float16 v16hf __attribute__((vector_size(32))); +typedef float v8sf __attribute__((vector_size(32))); +typedef double v4df __attribute__((vector_size(32))); + +#define DO_OP(TYPE) \ +void vmad##TYPE (TYPE *x, TYPE y, TYPE z) \ +{ \ + register TYPE dst asm("z0"); \ + register TYPE src1 asm("z2"); \ + register TYPE src2 asm("z4"); \ + dst = *x; \ + src1 = y; \ + src2 = z; \ + asm volatile ("" :: "w" (dst), "w" (src1), "w" (src2)); \ + dst = (dst * src1) - src2; \ + asm volatile ("" :: "w" (dst)); \ + *x = dst; \ +} + +DO_OP (v16hf) +DO_OP (v8sf) +DO_OP (v4df) + +/* { dg-final { scan-assembler-times {\tfnmsb\tz0\.h, p[0-7]/m, z2\.h, z4\.h\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfnmsb\tz0\.s, p[0-7]/m, z2\.s, z4\.s\n} 1 } } */ +/* { dg-final { scan-assembler-times {\tfnmsb\tz0\.d, p[0-7]/m, z2\.d, z4\.d\n} 1 } } */ |