diff options
Diffstat (limited to 'gcc/doc/invoke.texi')
| -rw-r--r-- | gcc/doc/invoke.texi | 50 |
1 files changed, 42 insertions, 8 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index d196d83acf0..63d0de5466b 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1117,9 +1117,10 @@ See RS/6000 and PowerPC Options. -muser-mode -mno-user-mode @gol -mv8plus -mno-v8plus -mvis -mno-vis @gol -mvis2 -mno-vis2 -mvis3 -mno-vis3 @gol --mcbcond -mno-cbcond -mfmaf -mno-fmaf @gol --mpopc -mno-popc -msubxc -mno-subxc@gol --mfix-at697f -mfix-ut699 @gol +-mvis4 -mno-vis4 -mvis4b -mno-vis4b @gol +-mcbcond -mno-cbcond -mfmaf -mno-fmaf -mfsmuld -mno-fsmuld @gol +-mpopc -mno-popc -msubxc -mno-subxc @gol +-mfix-at697f -mfix-ut699 -mfix-ut700 -mfix-gr712rc @gol -mlra -mno-lra} @emph{SPU Options} @@ -23399,7 +23400,7 @@ for machine type @var{cpu_type}. Supported values for @var{cpu_type} are @samp{leon}, @samp{leon3}, @samp{leon3v7}, @samp{sparclite}, @samp{f930}, @samp{f934}, @samp{sparclite86x}, @samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc}, @samp{ultrasparc3}, @samp{niagara}, @samp{niagara2}, -@samp{niagara3}, @samp{niagara4} and @samp{niagara7}. +@samp{niagara3}, @samp{niagara4}, @samp{niagara7} and @samp{m8}. Native Solaris and GNU/Linux toolchains also support the value @samp{native}, which selects the best architecture option for the host processor. @@ -23427,7 +23428,8 @@ f930, f934, sparclite86x tsc701 @item v9 -ultrasparc, ultrasparc3, niagara, niagara2, niagara3, niagara4, niagara7 +ultrasparc, ultrasparc3, niagara, niagara2, niagara3, niagara4, +niagara7, m8 @end table By default (unless configured otherwise), GCC generates code for the V7 @@ -23471,7 +23473,8 @@ additionally optimizes it for Sun UltraSPARC T2 chips. With UltraSPARC T3 chips. With @option{-mcpu=niagara4}, the compiler additionally optimizes it for Sun UltraSPARC T4 chips. With @option{-mcpu=niagara7}, the compiler additionally optimizes it for -Oracle SPARC M7 chips. +Oracle SPARC M7 chips. With @option{-mcpu=m8}, the compiler +additionally optimizes it for Oracle M8 chips. @item -mtune=@var{cpu_type} @opindex mtune @@ -23486,8 +23489,8 @@ that select a particular CPU implementation. Those are @samp{leon3}, @samp{leon3v7}, @samp{f930}, @samp{f934}, @samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, @samp{ultrasparc3}, @samp{niagara}, @samp{niagara2}, @samp{niagara3}, -@samp{niagara4} and @samp{niagara7}. With native Solaris and -GNU/Linux toolchains, @samp{native} can also be used. +@samp{niagara4}, @samp{niagara7} and @samp{m8}. With native Solaris +and GNU/Linux toolchains, @samp{native} can also be used. @item -mv8plus @itemx -mno-v8plus @@ -23535,6 +23538,18 @@ default is @option{-mvis4} when targeting a cpu that supports such instructions, such as niagara-7 and later. Setting @option{-mvis4} also sets @option{-mvis3}, @option{-mvis2} and @option{-mvis}. +@item -mvis4b +@itemx -mno-vis4b +@opindex mvis4b +@opindex mno-vis4b +With @option{-mvis4b}, GCC generates code that takes advantage of +version 4.0 of the UltraSPARC Visual Instruction Set extensions, plus +the additional VIS instructions introduced in the Oracle SPARC +Architecture 2017. The default is @option{-mvis4b} when targeting a +cpu that supports such instructions, such as m8 and later. Setting +@option{-mvis4b} also sets @option{-mvis4}, @option{-mvis3}, +@option{-mvis2} and @option{-mvis}. + @item -mcbcond @itemx -mno-cbcond @opindex mcbcond @@ -23553,6 +23568,15 @@ Fused Multiply-Add Floating-point instructions. The default is @option{-mfmaf} when targeting a CPU that supports such instructions, such as Niagara-3 and later. +@item -mfsmuld +@itemx -mno-fsmuld +@opindex mfsmuld +@opindex mno-fsmuld +With @option{-mfsmuld}, GCC generates code that takes advantage of the +Floating-point Multiply Single to Double (FsMULd) instruction. The default is +@option{-mfsmuld} when targeting a CPU supporting the architecture versions V8 +or V9 with FPU except @option{-mcpu=leon}. + @item -mpopc @itemx -mno-popc @opindex mpopc @@ -23580,6 +23604,16 @@ processor (which corresponds to erratum #13 of the AT697E processor). @opindex mfix-ut699 Enable the documented workarounds for the floating-point errata and the data cache nullify errata of the UT699 processor. + +@item -mfix-ut700 +@opindex mfix-ut700 +Enable the documented workaround for the back-to-back store errata of +the UT699E/UT700 processor. + +@item -mfix-gr712rc +@opindex mfix-gr712rc +Enable the documented workaround for the back-to-back store errata of +the GR712RC processor. @end table These @samp{-m} options are supported in addition to the above |