diff options
Diffstat (limited to 'gcc/config')
53 files changed, 1054 insertions, 820 deletions
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index bc2e8046911..14d2247ce10 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -56,7 +56,7 @@ Boston, MA 02110-1301, USA. */ #include "tree-flow.h" #include "tree-stdarg.h" #include "tm-constrs.h" - +#include "df.h" /* Specify which cpu to schedule for. */ enum processor_type alpha_tune; @@ -4795,7 +4795,7 @@ alpha_ra_ever_killed (void) rtx top; if (!has_hard_reg_initial_val (Pmode, REG_RA)) - return regs_ever_live[REG_RA]; + return (int)df_regs_ever_live_p (REG_RA); push_topmost_sequence (); top = get_insns (); @@ -7091,7 +7091,7 @@ alpha_sa_mask (unsigned long *imaskP, unsigned long *fmaskP) /* One for every register we have to save. */ for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) if (! fixed_regs[i] && ! call_used_regs[i] - && regs_ever_live[i] && i != REG_RA + && df_regs_ever_live_p (i) && i != REG_RA && (!TARGET_ABI_UNICOSMK || i != HARD_FRAME_POINTER_REGNUM)) { if (i < 32) @@ -7199,7 +7199,7 @@ alpha_sa_size (void) vms_save_fp_regno = -1; if (vms_base_regno == HARD_FRAME_POINTER_REGNUM) for (i = 0; i < 32; i++) - if (! fixed_regs[i] && call_used_regs[i] && ! regs_ever_live[i]) + if (! fixed_regs[i] && call_used_regs[i] && ! df_regs_ever_live_p (i)) vms_save_fp_regno = i; if (vms_save_fp_regno == -1 && alpha_procedure_type == PT_REGISTER) diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 919f03b39a3..4924cea0cce 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -1,7 +1,6 @@ /* Subroutines used for code generation on the Argonaut ARC cpu. - Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, - 2005 - Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, + 2004, 2005, 2006, 2007 Free Software Foundation, Inc. This file is part of GCC. @@ -1057,9 +1056,9 @@ arc_compute_function_type (tree decl) Don't consider them here. */ #define MUST_SAVE_REGISTER(regno, interrupt_p) \ ((regno) != RETURN_ADDR_REGNUM && (regno) != FRAME_POINTER_REGNUM \ - && (regs_ever_live[regno] && (!call_used_regs[regno] || interrupt_p))) + && (df_regs_ever_live_p (regno) && (!call_used_regs[regno] || interrupt_p))) -#define MUST_SAVE_RETURN_ADDR (regs_ever_live[RETURN_ADDR_REGNUM]) +#define MUST_SAVE_RETURN_ADDR (df_regs_ever_live_p (RETURN_ADDR_REGNUM)) /* Return the bytes needed to compute the frame pointer from the current stack pointer. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index cd287bfa363..e316f6a4ede 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -52,6 +52,7 @@ #include "target-def.h" #include "debug.h" #include "langhooks.h" +#include "df.h" /* Forward definitions of types. */ typedef struct minipool_node Mnode; @@ -1641,7 +1642,7 @@ use_return_insn (int iscond, rtx sibling) if (flag_pic && arm_pic_register != INVALID_REGNUM - && regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) + && df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM)) return 0; } @@ -1654,18 +1655,18 @@ use_return_insn (int iscond, rtx sibling) since this also requires an insn. */ if (TARGET_HARD_FLOAT && TARGET_FPA) for (regno = FIRST_FPA_REGNUM; regno <= LAST_FPA_REGNUM; regno++) - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) return 0; /* Likewise VFP regs. */ if (TARGET_HARD_FLOAT && TARGET_VFP) for (regno = FIRST_VFP_REGNUM; regno <= LAST_VFP_REGNUM; regno++) - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) return 0; if (TARGET_REALLY_IWMMXT) for (regno = FIRST_IWMMXT_REGNUM; regno <= LAST_IWMMXT_REGNUM; regno++) - if (regs_ever_live[regno] && ! call_used_regs [regno]) + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) return 0; return 1; @@ -3460,7 +3461,7 @@ thumb_find_work_register (unsigned long pushed_regs_mask) register allocation order means that sometimes r3 might be used but earlier argument registers might not, so check them all. */ for (reg = LAST_ARG_REGNUM; reg >= 0; reg --) - if (!regs_ever_live[reg]) + if (!df_regs_ever_live_p (reg)) return reg; /* Before going on to check the call-saved registers we can try a couple @@ -9770,8 +9771,8 @@ arm_compute_save_reg0_reg12_mask (void) max_reg = 12; for (reg = 0; reg <= max_reg; reg++) - if (regs_ever_live[reg] - || (! current_function_is_leaf && call_used_regs [reg])) + if (df_regs_ever_live_p (reg) + || (! current_function_is_leaf && call_used_regs[reg])) save_reg_mask |= (1 << reg); /* Also save the pic base register if necessary. */ @@ -9789,15 +9790,18 @@ arm_compute_save_reg0_reg12_mask (void) /* In the normal case we only need to save those registers which are call saved and which are used by this function. */ for (reg = 0; reg <= last_reg; reg++) - if (regs_ever_live[reg] && ! call_used_regs [reg]) + if (df_regs_ever_live_p (reg) && ! call_used_regs[reg]) save_reg_mask |= (1 << reg); /* Handle the frame pointer as a special case. */ - if (TARGET_THUMB2 && frame_pointer_needed) + if (! TARGET_APCS_FRAME + && ! frame_pointer_needed + && df_regs_ever_live_p (HARD_FRAME_POINTER_REGNUM) + && ! call_used_regs[HARD_FRAME_POINTER_REGNUM]) save_reg_mask |= 1 << HARD_FRAME_POINTER_REGNUM; else if (! TARGET_APCS_FRAME && ! frame_pointer_needed - && regs_ever_live[HARD_FRAME_POINTER_REGNUM] + && df_regs_ever_live_p (HARD_FRAME_POINTER_REGNUM) && ! call_used_regs[HARD_FRAME_POINTER_REGNUM]) save_reg_mask |= 1 << HARD_FRAME_POINTER_REGNUM; @@ -9806,7 +9810,7 @@ arm_compute_save_reg0_reg12_mask (void) if (flag_pic && !TARGET_SINGLE_PIC_BASE && arm_pic_register != INVALID_REGNUM - && (regs_ever_live[PIC_OFFSET_TABLE_REGNUM] + && (df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM) || current_function_uses_pic_offset_table)) save_reg_mask |= 1 << PIC_OFFSET_TABLE_REGNUM; @@ -9872,11 +9876,11 @@ arm_compute_save_reg_mask (void) now and then popping it back into the PC. This incurs extra memory accesses though, so we only do it when optimizing for size, and only if we know that we will not need a fancy return sequence. */ - if (regs_ever_live [LR_REGNUM] - || (save_reg_mask - && optimize_size - && ARM_FUNC_TYPE (func_type) == ARM_FT_NORMAL - && !current_function_calls_eh_return)) + if (df_regs_ever_live_p (LR_REGNUM) + || (save_reg_mask + && optimize_size + && ARM_FUNC_TYPE (func_type) == ARM_FT_NORMAL + && !current_function_calls_eh_return)) save_reg_mask |= 1 << LR_REGNUM; if (cfun->machine->lr_save_eliminated) @@ -9932,7 +9936,7 @@ thumb1_compute_save_reg_mask (void) mask = 0; for (reg = 0; reg < 12; reg ++) - if (regs_ever_live[reg] && !call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && !call_used_regs[reg]) mask |= 1 << reg; if (flag_pic @@ -9986,8 +9990,8 @@ arm_get_vfp_saved_size (void) regno < LAST_VFP_REGNUM; regno += 2) { - if ((!regs_ever_live[regno] || call_used_regs[regno]) - && (!regs_ever_live[regno + 1] || call_used_regs[regno + 1])) + if ((!df_regs_ever_live_p (regno) || call_used_regs[regno]) + && (!df_regs_ever_live_p (regno + 1) || call_used_regs[regno + 1])) { if (count > 0) { @@ -10389,7 +10393,7 @@ arm_output_epilogue (rtx sibling) if (arm_fpu_arch == FPUTYPE_FPA_EMU2) { for (reg = LAST_FPA_REGNUM; reg >= FIRST_FPA_REGNUM; reg--) - if (regs_ever_live[reg] && !call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && !call_used_regs[reg]) { floats_offset += 12; asm_fprintf (f, "\tldfe\t%r, [%r, #-%d]\n", @@ -10402,7 +10406,7 @@ arm_output_epilogue (rtx sibling) for (reg = LAST_FPA_REGNUM; reg >= FIRST_FPA_REGNUM; reg--) { - if (regs_ever_live[reg] && !call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && !call_used_regs[reg]) { floats_offset += 12; @@ -10448,8 +10452,8 @@ arm_output_epilogue (rtx sibling) start_reg = FIRST_VFP_REGNUM; for (reg = FIRST_VFP_REGNUM; reg < LAST_VFP_REGNUM; reg += 2) { - if ((!regs_ever_live[reg] || call_used_regs[reg]) - && (!regs_ever_live[reg + 1] || call_used_regs[reg + 1])) + if ((!df_regs_ever_live_p (reg) || call_used_regs[reg]) + && (!df_regs_ever_live_p (reg + 1) || call_used_regs[reg + 1])) { if (start_reg != reg) vfp_output_fldmd (f, IP_REGNUM, @@ -10476,7 +10480,7 @@ arm_output_epilogue (rtx sibling) lrm_count += (lrm_count % 2 ? 2 : 1); for (reg = LAST_IWMMXT_REGNUM; reg >= FIRST_IWMMXT_REGNUM; reg--) - if (regs_ever_live[reg] && !call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && !call_used_regs[reg]) { asm_fprintf (f, "\twldrd\t%r, [%r, #-%d]\n", reg, FP_REGNUM, lrm_count * 4); @@ -10557,7 +10561,7 @@ arm_output_epilogue (rtx sibling) if (arm_fpu_arch == FPUTYPE_FPA_EMU2) { for (reg = FIRST_FPA_REGNUM; reg <= LAST_FPA_REGNUM; reg++) - if (regs_ever_live[reg] && !call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && !call_used_regs[reg]) asm_fprintf (f, "\tldfe\t%r, [%r], #12\n", reg, SP_REGNUM); } @@ -10567,7 +10571,7 @@ arm_output_epilogue (rtx sibling) for (reg = FIRST_FPA_REGNUM; reg <= LAST_FPA_REGNUM; reg++) { - if (regs_ever_live[reg] && !call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && !call_used_regs[reg]) { if (reg - start_reg == 3) { @@ -10598,8 +10602,8 @@ arm_output_epilogue (rtx sibling) start_reg = FIRST_VFP_REGNUM; for (reg = FIRST_VFP_REGNUM; reg < LAST_VFP_REGNUM; reg += 2) { - if ((!regs_ever_live[reg] || call_used_regs[reg]) - && (!regs_ever_live[reg + 1] || call_used_regs[reg + 1])) + if ((!df_regs_ever_live_p (reg) || call_used_regs[reg]) + && (!df_regs_ever_live_p (reg + 1) || call_used_regs[reg + 1])) { if (start_reg != reg) vfp_output_fldmd (f, SP_REGNUM, @@ -10615,7 +10619,7 @@ arm_output_epilogue (rtx sibling) } if (TARGET_IWMMXT) for (reg = FIRST_IWMMXT_REGNUM; reg <= LAST_IWMMXT_REGNUM; reg++) - if (regs_ever_live[reg] && !call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && !call_used_regs[reg]) asm_fprintf (f, "\twldrd\t%r, [%r], #8\n", reg, SP_REGNUM); /* If we can, restore the LR into the PC. */ @@ -10957,7 +10961,7 @@ thumb_force_lr_save (void) return !cfun->machine->lr_save_eliminated && (!leaf_function_p () || thumb_far_jump_used_p () - || regs_ever_live [LR_REGNUM]); + || df_regs_ever_live_p (LR_REGNUM)); } @@ -11065,7 +11069,7 @@ arm_get_frame_offsets (void) for (regno = FIRST_IWMMXT_REGNUM; regno <= LAST_IWMMXT_REGNUM; regno++) - if (regs_ever_live [regno] && ! call_used_regs [regno]) + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) saved += 8; } @@ -11074,7 +11078,7 @@ arm_get_frame_offsets (void) { /* Space for saved FPA registers. */ for (regno = FIRST_FPA_REGNUM; regno <= LAST_FPA_REGNUM; regno++) - if (regs_ever_live[regno] && ! call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) saved += 12; /* Space for saved VFP registers. */ @@ -11213,7 +11217,7 @@ arm_save_coproc_regs(void) rtx insn; for (reg = LAST_IWMMXT_REGNUM; reg >= FIRST_IWMMXT_REGNUM; reg--) - if (regs_ever_live[reg] && ! call_used_regs [reg]) + if (df_regs_ever_live_p (reg) && ! call_used_regs[reg]) { insn = gen_rtx_PRE_DEC (V2SImode, stack_pointer_rtx); insn = gen_rtx_MEM (V2SImode, insn); @@ -11227,7 +11231,7 @@ arm_save_coproc_regs(void) if (arm_fpu_arch == FPUTYPE_FPA_EMU2) { for (reg = LAST_FPA_REGNUM; reg >= FIRST_FPA_REGNUM; reg--) - if (regs_ever_live[reg] && !call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && !call_used_regs[reg]) { insn = gen_rtx_PRE_DEC (XFmode, stack_pointer_rtx); insn = gen_rtx_MEM (XFmode, insn); @@ -11242,7 +11246,7 @@ arm_save_coproc_regs(void) for (reg = LAST_FPA_REGNUM; reg >= FIRST_FPA_REGNUM; reg--) { - if (regs_ever_live[reg] && !call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && !call_used_regs[reg]) { if (start_reg - reg == 3) { @@ -11277,8 +11281,8 @@ arm_save_coproc_regs(void) for (reg = FIRST_VFP_REGNUM; reg < LAST_VFP_REGNUM; reg += 2) { - if ((!regs_ever_live[reg] || call_used_regs[reg]) - && (!regs_ever_live[reg + 1] || call_used_regs[reg + 1])) + if ((!df_regs_ever_live_p (reg) || call_used_regs[reg]) + && (!df_regs_ever_live_p (reg + 1) || call_used_regs[reg + 1])) { if (start_reg != reg) saved_size += vfp_emit_fstmd (start_reg, @@ -11423,7 +11427,7 @@ arm_expand_prologue (void) doesn't need to be unwound, as it doesn't contain a value inherited from the caller. */ - if (regs_ever_live[3] == 0) + if (df_regs_ever_live_p (3) == false) insn = emit_set_insn (gen_rtx_REG (SImode, 3), ip_rtx); else if (args_to_push == 0) { @@ -11517,7 +11521,7 @@ arm_expand_prologue (void) if (IS_NESTED (func_type)) { /* Recover the static chain register. */ - if (regs_ever_live [3] == 0 + if (!df_regs_ever_live_p (3) || saved_pretend_args) insn = gen_rtx_REG (SImode, 3); else /* if (current_function_pretend_args_size == 0) */ @@ -11586,10 +11590,7 @@ arm_expand_prologue (void) /* If the link register is being kept alive, with the return address in it, then make sure that it does not get reused by the ce2 pass. */ if ((live_regs_mask & (1 << LR_REGNUM)) == 0) - { - emit_insn (gen_prologue_use (gen_rtx_REG (SImode, LR_REGNUM))); - cfun->machine->lr_save_eliminated = 1; - } + cfun->machine->lr_save_eliminated = 1; } /* Print condition code to STREAM. Helper function for arm_print_operand. */ @@ -13922,7 +13923,7 @@ thumb_exit (FILE *f, int reg_containing_return_addr) { /* If we can deduce the registers used from the function's return value. This is more reliable that examining - regs_ever_live[] because that will be set if the register is + df_regs_ever_live_p () because that will be set if the register is ever used in the function, not just if the register is used to hold a return value. */ @@ -14203,7 +14204,7 @@ thumb_far_jump_used_p (void) If we need doubleword stack alignment this could affect the other elimination offsets so we can't risk getting it wrong. */ - if (regs_ever_live [ARG_POINTER_REGNUM]) + if (df_regs_ever_live_p (ARG_POINTER_REGNUM)) cfun->machine->arg_pointer_live = 1; else if (!cfun->machine->arg_pointer_live) return 0; @@ -14267,7 +14268,7 @@ thumb_unexpanded_epilogue (void) high_regs_pushed = bit_count (live_regs_mask & 0x0f00); /* If we can deduce the registers used from the function's return value. - This is more reliable that examining regs_ever_live[] because that + This is more reliable that examining df_regs_ever_live_p () because that will be set if the register is ever used in the function, not just if the register is used to hold a return value. */ size = arm_size_return_regs (); @@ -14638,11 +14639,6 @@ thumb1_expand_prologue (void) cfun->machine->lr_save_eliminated = !thumb_force_lr_save (); if (live_regs_mask & 0xff) cfun->machine->lr_save_eliminated = 0; - - /* If the link register is being kept alive, with the return address in it, - then make sure that it does not get reused by the ce2 pass. */ - if (cfun->machine->lr_save_eliminated) - emit_insn (gen_prologue_use (gen_rtx_REG (SImode, LR_REGNUM))); } @@ -14691,10 +14687,10 @@ thumb1_expand_epilogue (void) /* Emit a clobber for each insn that will be restored in the epilogue, so that flow2 will get register lifetimes correct. */ for (regno = 0; regno < 13; regno++) - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) emit_insn (gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (SImode, regno))); - if (! regs_ever_live[LR_REGNUM]) + if (! df_regs_ever_live_p (LR_REGNUM)) emit_insn (gen_rtx_USE (VOIDmode, gen_rtx_REG (SImode, LR_REGNUM))); } diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 62d7485d01f..67fa99f22a5 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -985,7 +985,7 @@ extern int arm_structure_size_boundary; call-clobbered. */ #define HARD_REGNO_RENAME_OK(SRC, DST) \ (! IS_INTERRUPT (cfun->machine->func_type) || \ - regs_ever_live[DST]) + df_regs_ever_live_p (DST)) /* Register and constant classes. */ @@ -1600,7 +1600,7 @@ typedef struct frame. */ #define EXIT_IGNORE_STACK 1 -#define EPILOGUE_USES(REGNO) (reload_completed && (REGNO) == LR_REGNUM) +#define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNUM) /* Determine if the epilogue should be output as RTL. You should override this if you define FUNCTION_EXTRA_EPILOGUE. */ diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index d5930fac1b0..a393cffb59f 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -460,7 +460,7 @@ avr_regs_to_save (HARD_REG_SET *set) continue; if ((int_or_sig_p && !leaf_func_p && call_used_regs[reg]) - || (regs_ever_live[reg] + || (df_regs_ever_live_p (reg) && (int_or_sig_p || !call_used_regs[reg]) && !(frame_pointer_needed && (reg == REG_Y || reg == (REG_Y+1))))) @@ -517,7 +517,7 @@ sequent_regs_live (void) { if (!call_used_regs[reg]) { - if (regs_ever_live[reg]) + if (df_regs_ever_live_p (reg)) { ++live_seq; ++cur_seq; @@ -529,7 +529,7 @@ sequent_regs_live (void) if (!frame_pointer_needed) { - if (regs_ever_live[REG_Y]) + if (df_regs_ever_live_p (REG_Y)) { ++live_seq; ++cur_seq; @@ -537,7 +537,7 @@ sequent_regs_live (void) else cur_seq = 0; - if (regs_ever_live[REG_Y+1]) + if (df_regs_ever_live_p (REG_Y+1)) { ++live_seq; ++cur_seq; @@ -5815,7 +5815,7 @@ avr_peep2_scratch_safe (rtx scratch) for (reg = first_reg; reg <= last_reg; reg++) { - if (!regs_ever_live[reg]) + if (!df_regs_ever_live_p (reg)) return 0; } } diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c index 60fe51d8645..26fbc6cfdde 100644 --- a/gcc/config/bfin/bfin.c +++ b/gcc/config/bfin/bfin.c @@ -1,5 +1,5 @@ /* The Blackfin code generation auxiliary output file. - Copyright (C) 2005, 2006 Free Software Foundation, Inc. + Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Analog Devices. This file is part of GCC. @@ -250,7 +250,7 @@ n_dregs_to_save (bool is_inthandler) for (i = REG_R0; i <= REG_R7; i++) { - if (regs_ever_live[i] && (is_inthandler || ! call_used_regs[i])) + if (df_regs_ever_live_p (i) && (is_inthandler || ! call_used_regs[i])) return REG_R7 - i + 1; if (current_function_calls_eh_return) @@ -278,7 +278,7 @@ n_pregs_to_save (bool is_inthandler) unsigned i; for (i = REG_P0; i <= REG_P5; i++) - if ((regs_ever_live[i] && (is_inthandler || ! call_used_regs[i])) + if ((df_regs_ever_live_p (i) && (is_inthandler || ! call_used_regs[i])) || (!TARGET_FDPIC && i == PIC_OFFSET_TABLE_REGNUM && (current_function_uses_pic_offset_table @@ -292,7 +292,7 @@ n_pregs_to_save (bool is_inthandler) static bool must_save_fp_p (void) { - return frame_pointer_needed || regs_ever_live[REG_FP]; + return frame_pointer_needed || df_regs_ever_live_p (REG_FP); } static bool @@ -513,7 +513,7 @@ n_regs_saved_by_prologue (void) for (i = REG_P7 + 1; i < REG_CC; i++) if (all - || regs_ever_live[i] + || df_regs_ever_live_p (i) || (!leaf_function_p () && call_used_regs[i])) n += i == REG_A0 || i == REG_A1 ? 2 : 1; } @@ -815,7 +815,7 @@ expand_interrupt_handler_prologue (rtx spreg, e_funkind fkind) for (i = REG_P7 + 1; i < REG_CC; i++) if (all - || regs_ever_live[i] + || df_regs_ever_live_p (i) || (!leaf_function_p () && call_used_regs[i])) { if (i == REG_A0 || i == REG_A1) @@ -845,23 +845,11 @@ expand_interrupt_handler_prologue (rtx spreg, e_funkind fkind) rtx insn; insn = emit_move_insn (r0reg, gen_rtx_REG (SImode, REG_SEQSTAT)); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - NULL_RTX); insn = emit_insn (gen_ashrsi3 (r0reg, r0reg, GEN_INT (26))); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - NULL_RTX); insn = emit_insn (gen_ashlsi3 (r0reg, r0reg, GEN_INT (26))); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - NULL_RTX); insn = emit_move_insn (r1reg, spreg); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - NULL_RTX); insn = emit_move_insn (r2reg, gen_rtx_REG (Pmode, REG_FP)); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - NULL_RTX); insn = emit_insn (gen_addsi3 (r2reg, r2reg, GEN_INT (8))); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - NULL_RTX); } } @@ -899,7 +887,7 @@ expand_interrupt_handler_epilogue (rtx spreg, e_funkind fkind) for (i = REG_CC - 1; i > REG_P7; i--) if (all - || regs_ever_live[i] + || df_regs_ever_live_p (i) || (!leaf_function_p () && call_used_regs[i])) { if (i == REG_A0 || i == REG_A1) @@ -948,7 +936,6 @@ bfin_load_pic_reg (rtx dest) gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_LIBRARY_OFFSET)); insn = emit_insn (gen_movsi (dest, gen_rtx_MEM (Pmode, addr))); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, NULL); return dest; } @@ -1068,7 +1055,7 @@ bfin_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED, call-clobbered. */ if (funkind (TREE_TYPE (current_function_decl)) != SUBROUTINE - && !regs_ever_live[new_reg]) + && !df_regs_ever_live_p (new_reg)) return 0; return 1; diff --git a/gcc/config/c4x/c4x.c b/gcc/config/c4x/c4x.c index 0f42accf596..2365ebca646 100644 --- a/gcc/config/c4x/c4x.c +++ b/gcc/config/c4x/c4x.c @@ -1,6 +1,6 @@ /* Subroutines for assembler code output on the TMS320C[34]x Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2003, - 2004, 2005 + 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz) @@ -750,13 +750,13 @@ c4x_isr_reg_used_p (unsigned int regno) /* Only save/restore regs in leaf function that are used. */ if (c4x_leaf_function) - return regs_ever_live[regno] && fixed_regs[regno] == 0; + return df_regs_ever_live_p (regno) && fixed_regs[regno] == 0; /* Only save/restore regs that are used by the ISR and regs that are likely to be used by functions the ISR calls if they are not fixed. */ return IS_EXT_REGNO (regno) - || ((regs_ever_live[regno] || call_used_regs[regno]) + || ((df_regs_ever_live_p (regno) || call_used_regs[regno]) && fixed_regs[regno] == 0); } @@ -890,9 +890,9 @@ c4x_expand_prologue (void) /* We need to clear the repeat mode flag if the ISR is going to use a RPTB instruction or uses the RC, RS, or RE registers. */ - if (regs_ever_live[RC_REGNO] - || regs_ever_live[RS_REGNO] - || regs_ever_live[RE_REGNO]) + if (df_regs_ever_live_p (RC_REGNO) + || df_regs_ever_live_p (RS_REGNO) + || df_regs_ever_live_p (RE_REGNO)) { insn = emit_insn (gen_andn_st (GEN_INT(~0x100))); RTX_FRAME_RELATED_P (insn) = 1; @@ -983,7 +983,7 @@ c4x_expand_prologue (void) for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) { - if (regs_ever_live[regno] && ! call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) { if (IS_FLOAT_CALL_SAVED_REGNO (regno)) { @@ -1111,7 +1111,7 @@ c4x_expand_epilogue(void) where required. */ for (regno = FIRST_PSEUDO_REGISTER - 1; regno >= 0; regno--) { - if (regs_ever_live[regno] && ! call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) { if (regno == AR3_REGNO && dont_pop_ar3) continue; @@ -1220,7 +1220,7 @@ c4x_null_epilogue_p (void) && ! get_frame_size ()) { for (regno = FIRST_PSEUDO_REGISTER - 1; regno >= 0; regno--) - if (regs_ever_live[regno] && ! call_used_regs[regno] + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno] && (regno != AR3_REGNO)) return 1; return 0; diff --git a/gcc/config/c4x/c4x.h b/gcc/config/c4x/c4x.h index 6df7ac8fba1..0a5c71332ea 100644 --- a/gcc/config/c4x/c4x.h +++ b/gcc/config/c4x/c4x.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. TMS320C[34]x Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, - 2003, 2004, 2005 Free Software Foundation, Inc. + 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz) and Herman Ten Brugge (Haj.Ten.Brugge@net.HCC.nl). @@ -887,7 +887,7 @@ enum reg_class int regno; \ int offset = 0; \ for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \ - if (regs_ever_live[regno] && ! call_used_regs[regno]) \ + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \ offset += TARGET_PRESERVE_FLOAT \ && IS_FLOAT_CALL_SAVED_REGNO (regno) ? 2 : 1; \ (DEPTH) = -(offset + get_frame_size ()); \ @@ -906,7 +906,7 @@ enum reg_class int regno; \ int offset = 0; \ for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \ - if (regs_ever_live[regno] && ! call_used_regs[regno]) \ + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \ offset += TARGET_PRESERVE_FLOAT \ && IS_FLOAT_CALL_SAVED_REGNO (regno) ? 2 : 1; \ (OFFSET) = -(offset + get_frame_size ()); \ diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c index 2158295f9a4..66b68ef9645 100644 --- a/gcc/config/cris/cris.c +++ b/gcc/config/cris/cris.c @@ -1,5 +1,5 @@ /* Definitions for GCC. Part of the machine description for CRIS. - Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Axis Communications. Written by Hans-Peter Nilsson. @@ -578,13 +578,13 @@ static int cris_reg_saved_in_regsave_area (unsigned int regno, bool got_really_used) { return - (((regs_ever_live[regno] + (((df_regs_ever_live_p (regno) && !call_used_regs[regno]) || (regno == PIC_OFFSET_TABLE_REGNUM && (got_really_used /* It is saved anyway, if there would be a gap. */ || (flag_pic - && regs_ever_live[regno + 1] + && df_regs_ever_live_p (regno + 1) && !call_used_regs[regno + 1])))) && (regno != FRAME_POINTER_REGNUM || !frame_pointer_needed) && regno != CRIS_SRP_REGNUM) @@ -1122,7 +1122,7 @@ cris_return_addr_rtx (int count, rtx frameaddr ATTRIBUTE_UNUSED) bool cris_return_address_on_stack (void) { - return regs_ever_live[CRIS_SRP_REGNUM] + return df_regs_ever_live_p (CRIS_SRP_REGNUM) || cfun->machine->needs_return_address_on_stack; } diff --git a/gcc/config/crx/crx.c b/gcc/config/crx/crx.c index 7b8efee42b0..f73348e3c88 100644 --- a/gcc/config/crx/crx.c +++ b/gcc/config/crx/crx.c @@ -1,6 +1,6 @@ /* Output routines for GCC for CRX. Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, - 2002, 2003, 2004 Free Software Foundation, Inc. + 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. This file is part of GCC. @@ -272,7 +272,7 @@ crx_compute_save_regs (void) * for the sake of its sons. */ save_regs[regno] = 1; - else if (regs_ever_live[regno]) + else if (df_regs_ever_live_p (regno)) /* This reg is used - save it. */ save_regs[regno] = 1; else @@ -282,7 +282,7 @@ crx_compute_save_regs (void) else { /* If this reg is used and not call-used (except RA), save it. */ - if (regs_ever_live[regno] + if (df_regs_ever_live_p (regno) && (!call_used_regs[regno] || regno == RETURN_ADDRESS_REGNUM)) save_regs[regno] = 1; else diff --git a/gcc/config/crx/crx.h b/gcc/config/crx/crx.h index d482bb31be7..b1dacaa18c0 100644 --- a/gcc/config/crx/crx.h +++ b/gcc/config/crx/crx.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, for CRX. Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, - 2001, 2002, 2003, 2004 Free Software Foundation, Inc. + 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. This file is part of GCC. @@ -165,7 +165,7 @@ do { \ /* Interrupt functions can only use registers that have already been saved by * the prologue, even if they would normally be call-clobbered. */ #define HARD_REGNO_RENAME_OK(SRC, DEST) \ - (!crx_interrupt_function_p () || regs_ever_live[DEST]) + (!crx_interrupt_function_p () || df_regs_ever_live_p (DEST)) #define MODES_TIEABLE_P(MODE1, MODE2) 1 diff --git a/gcc/config/darwin.c b/gcc/config/darwin.c index 17a8d5995a7..fb5d6f905fb 100644 --- a/gcc/config/darwin.c +++ b/gcc/config/darwin.c @@ -1,6 +1,6 @@ /* Functions for generic Darwin as target machine for GNU C compiler. Copyright (C) 1989, 1990, 1991, 1992, 1993, 2000, 2001, 2002, 2003, 2004, - 2005 + 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Apple Computer Inc. @@ -45,6 +45,7 @@ Boston, MA 02110-1301, USA. */ #include "tm_p.h" #include "toplev.h" #include "hashtab.h" +#include "df.h" /* Darwin supports a feature called fix-and-continue, which is used for rapid turn around debugging. When code is compiled with the @@ -777,7 +778,7 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg) #endif if (reload_in_progress) - regs_ever_live[REGNO (pic)] = 1; + df_set_regs_ever_live (REGNO (pic), true); pic_ref = gen_rtx_PLUS (Pmode, pic, gen_pic_offset (XEXP (orig, 0), pic_base)); @@ -848,7 +849,7 @@ machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg) pic_offset_table_rtx)); #endif if (reload_in_progress) - regs_ever_live[REGNO (pic)] = 1; + df_set_regs_ever_live (REGNO (pic), true); pic_ref = gen_rtx_PLUS (Pmode, pic, gen_pic_offset (orig, pic_base)); diff --git a/gcc/config/fr30/fr30.c b/gcc/config/fr30/fr30.c index 9d3558d5d27..1d8a004a6e5 100644 --- a/gcc/config/fr30/fr30.c +++ b/gcc/config/fr30/fr30.c @@ -137,11 +137,11 @@ static int fr30_arg_partial_bytes (CUMULATIVE_ARGS *, enum machine_mode, #define MUST_SAVE_REGISTER(regno) \ ( (regno) != RETURN_POINTER_REGNUM \ && (regno) != FRAME_POINTER_REGNUM \ - && regs_ever_live [regno] \ + && df_regs_ever_live_p (regno) \ && ! call_used_regs [regno] ) -#define MUST_SAVE_FRAME_POINTER (regs_ever_live [FRAME_POINTER_REGNUM] || frame_pointer_needed) -#define MUST_SAVE_RETURN_POINTER (regs_ever_live [RETURN_POINTER_REGNUM] || current_function_profile) +#define MUST_SAVE_FRAME_POINTER (df_regs_ever_live_p (FRAME_POINTER_REGNUM) || frame_pointer_needed) +#define MUST_SAVE_RETURN_POINTER (df_regs_ever_live_p (RETURN_POINTER_REGNUM) || current_function_profile) #if UNITS_PER_WORD == 4 #define WORD_ALIGN(SIZE) (((SIZE) + 3) & ~3) diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c index c2b661d8ddf..5c2489aa520 100644 --- a/gcc/config/frv/frv.c +++ b/gcc/config/frv/frv.c @@ -1,4 +1,4 @@ -/* Copyright (C) 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005 +/* Copyright (C) 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Red Hat, Inc. @@ -51,6 +51,7 @@ Boston, MA 02110-1301, USA. */ #include "targhooks.h" #include "integrate.h" #include "langhooks.h" +#include "df.h" #ifndef FRV_INLINE #define FRV_INLINE inline @@ -1167,7 +1168,7 @@ frv_stack_info (void) default: for (regno = first; regno <= last; regno++) { - if ((regs_ever_live[regno] && !call_used_regs[regno]) + if ((df_regs_ever_live_p (regno) && !call_used_regs[regno]) || (current_function_calls_eh_return && (regno >= FIRST_EH_REGNUM && regno <= LAST_EH_REGNUM)) || (!TARGET_FDPIC && flag_pic @@ -1185,7 +1186,7 @@ frv_stack_info (void) break; case STACK_REGS_LR: - if (regs_ever_live[LR_REGNO] + if (df_regs_ever_live_p (LR_REGNO) || profile_flag /* This is set for __builtin_return_address, etc. */ || cfun->machine->frame_needed @@ -1498,7 +1499,7 @@ frv_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED) rtx insn; /* Just to check that the above comment is true. */ - gcc_assert (!regs_ever_live[GPR_FIRST + 3]); + gcc_assert (!df_regs_ever_live_p (GPR_FIRST + 3)); /* Generate the instruction that saves the link register. */ fprintf (file, "\tmovsg lr,gr3\n"); @@ -1518,7 +1519,7 @@ frv_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED) { rtx address = XEXP (XVECEXP (pattern, 0, 1), 0); if (GET_CODE (address) == REG && REGNO (address) == LR_REGNO) - REGNO (address) = GPR_FIRST + 3; + SET_REGNO (address, GPR_FIRST + 3); } } } @@ -5293,15 +5294,15 @@ frv_ifcvt_modify_tests (ce_if_block_t *ce_info, rtx *p_true, rtx *p_false) for (j = CC_FIRST; j <= CC_LAST; j++) if (TEST_HARD_REG_BIT (tmp_reg->regs, j)) { - if (REGNO_REG_SET_P (then_bb->il.rtl->global_live_at_start, j)) + if (REGNO_REG_SET_P (DF_LIVE_IN (rtl_df, then_bb), j)) continue; if (else_bb - && REGNO_REG_SET_P (else_bb->il.rtl->global_live_at_start, j)) + && REGNO_REG_SET_P (DF_LIVE_IN (rtl_df, else_bb), j)) continue; if (join_bb - && REGNO_REG_SET_P (join_bb->il.rtl->global_live_at_start, j)) + && REGNO_REG_SET_P (DF_LIVE_IN (rtl_df, join_bb), j)) continue; SET_HARD_REG_BIT (frv_ifcvt.nested_cc_ok_rewrite, j); @@ -5323,7 +5324,7 @@ frv_ifcvt_modify_tests (ce_if_block_t *ce_info, rtx *p_true, rtx *p_false) /* Remove anything live at the beginning of the join block from being available for allocation. */ - EXECUTE_IF_SET_IN_REG_SET (join_bb->il.rtl->global_live_at_start, 0, regno, rsi) + EXECUTE_IF_SET_IN_REG_SET (DF_LIVE_IN (rtl_df, join_bb), 0, regno, rsi) { if (regno < FIRST_PSEUDO_REGISTER) CLEAR_HARD_REG_BIT (tmp_reg->regs, regno); @@ -5367,7 +5368,7 @@ frv_ifcvt_modify_tests (ce_if_block_t *ce_info, rtx *p_true, rtx *p_false) /* Anything live at the beginning of the block is obviously unavailable for allocation. */ - EXECUTE_IF_SET_IN_REG_SET (bb[j]->il.rtl->global_live_at_start, 0, regno, rsi) + EXECUTE_IF_SET_IN_REG_SET (DF_LIVE_IN (rtl_df, bb[j]), 0, regno, rsi) { if (regno < FIRST_PSEUDO_REGISTER) CLEAR_HARD_REG_BIT (tmp_reg->regs, regno); @@ -6021,7 +6022,7 @@ frv_ifcvt_modify_insn (ce_if_block_t *ce_info, severely. */ && ce_info->join_bb && ! (REGNO_REG_SET_P - (ce_info->join_bb->il.rtl->global_live_at_start, + (DF_LIVE_IN (rtl_df, ce_info->join_bb), REGNO (SET_DEST (set)))) /* Similarly, we must not unconditionally set a reg used as scratch in the THEN branch if the same reg @@ -6029,7 +6030,7 @@ frv_ifcvt_modify_insn (ce_if_block_t *ce_info, && (! ce_info->else_bb || BLOCK_FOR_INSN (insn) == ce_info->else_bb || ! (REGNO_REG_SET_P - (ce_info->else_bb->il.rtl->global_live_at_start, + (DF_LIVE_IN (rtl_df, ce_info->else_bb), REGNO (SET_DEST (set)))))) pattern = set; @@ -7641,7 +7642,7 @@ frv_reorder_packet (void) for (from = 0; from < to - 1; from++) { remove_insn (insns[from]); - add_insn_before (insns[from], insns[to - 1]); + add_insn_before (insns[from], insns[to - 1], NULL); SET_PACKING_FLAG (insns[from]); } } @@ -8632,7 +8633,7 @@ frv_int_to_acc (enum insn_code icode, int opnum, rtx opval) reg = gen_rtx_REG (insn_data[icode].operand[opnum].mode, ACC_FIRST + INTVAL (opval)); if (! (*insn_data[icode].operand[opnum].predicate) (reg, VOIDmode)) - REGNO (reg) = ACCG_FIRST + INTVAL (opval); + SET_REGNO (reg, ACCG_FIRST + INTVAL (opval)); if (! (*insn_data[icode].operand[opnum].predicate) (reg, VOIDmode)) { diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c index efc32af194b..ab6d89dfb65 100644 --- a/gcc/config/h8300/h8300.c +++ b/gcc/config/h8300/h8300.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for Renesas H8/300. Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, - 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Steve Chamberlain (sac@cygnus.com), Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com). @@ -494,12 +494,12 @@ byte_reg (rtx x, int b) && ! TREE_THIS_VOLATILE (current_function_decl) \ && (h8300_saveall_function_p (current_function_decl) \ /* Save any call saved register that was used. */ \ - || (regs_ever_live[regno] && !call_used_regs[regno]) \ + || (df_regs_ever_live_p (regno) && !call_used_regs[regno]) \ /* Save the frame pointer if it was used. */ \ - || (regno == HARD_FRAME_POINTER_REGNUM && regs_ever_live[regno]) \ + || (regno == HARD_FRAME_POINTER_REGNUM && df_regs_ever_live_p (regno)) \ /* Save any register used in an interrupt handler. */ \ || (h8300_current_function_interrupt_function_p () \ - && regs_ever_live[regno]) \ + && df_regs_ever_live_p (regno)) \ /* Save call clobbered registers in non-leaf interrupt \ handlers. */ \ || (h8300_current_function_interrupt_function_p () \ @@ -5607,7 +5607,7 @@ h8300_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED, call-clobbered. */ if (h8300_current_function_interrupt_function_p () - && !regs_ever_live[new_reg]) + && !df_regs_ever_live_p (new_reg)) return 0; return 1; diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index 8f0083ae8a1..91d698f6940 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -1,6 +1,6 @@ ;; GCC machine description for Renesas H8/300 ;; Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, -;; 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. +;; 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. ;; Contributed by Steve Chamberlain (sac@cygnus.com), ;; Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com). @@ -1210,7 +1210,7 @@ [(set (match_operand:HI 0 "stack_pointer_operand" "") (plus:HI (match_dup 0) (match_operand 1 "const_int_gt_2_operand" "")))] - "TARGET_H8300 && flow2_completed" + "TARGET_H8300 && epilogue_completed" [(const_int 0)] "split_adds_subs (HImode, operands); DONE;") @@ -3017,7 +3017,7 @@ [(match_dup 0) (match_operand:QI 1 "register_operand" "")])) (clobber (match_operand:QI 3 "register_operand" ""))] - "flow2_completed + "epilogue_completed && find_regno_note (insn, REG_DEAD, REGNO (operands[1]))" [(set (cc0) (match_dup 1)) @@ -3048,7 +3048,7 @@ [(match_dup 0) (match_operand:QI 1 "register_operand" "")])) (clobber (match_operand:QI 3 "register_operand" ""))] - "flow2_completed + "epilogue_completed && !find_regno_note (insn, REG_DEAD, REGNO (operands[1]))" [(set (match_dup 3) (match_dup 1)) @@ -4183,7 +4183,7 @@ (match_dup 0))) (clobber (match_operand:SI 2 "register_operand" ""))] "(TARGET_H8300H || TARGET_H8300S) - && flow2_completed + && epilogue_completed && find_regno_note (insn, REG_DEAD, REGNO (operands[1])) && REGNO (operands[0]) != REGNO (operands[1])" [(parallel [(set (match_dup 3) @@ -4203,7 +4203,7 @@ (match_dup 0))) (clobber (match_operand:SI 2 "register_operand" ""))] "(TARGET_H8300H || TARGET_H8300S) - && flow2_completed + && epilogue_completed && !(find_regno_note (insn, REG_DEAD, REGNO (operands[1])) && REGNO (operands[0]) != REGNO (operands[1]))" [(set (match_dup 2) @@ -4286,7 +4286,7 @@ (match_dup 0))) (clobber (match_operand:SI 2 "register_operand" ""))] "(TARGET_H8300H || TARGET_H8300S) - && flow2_completed + && epilogue_completed && find_regno_note (insn, REG_DEAD, REGNO (operands[1])) && REGNO (operands[0]) != REGNO (operands[1])" [(parallel [(set (match_dup 3) @@ -4306,7 +4306,7 @@ (match_dup 0))) (clobber (match_operand:SI 2 "register_operand" ""))] "(TARGET_H8300H || TARGET_H8300S) - && flow2_completed + && epilogue_completed && !(find_regno_note (insn, REG_DEAD, REGNO (operands[1])) && REGNO (operands[0]) != REGNO (operands[1]))" [(set (match_dup 2) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index f8019bde0f9..61a24eedade 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -49,6 +49,7 @@ Boston, MA 02110-1301, USA. */ #include "cgraph.h" #include "tree-gimple.h" #include "dwarf2.h" +#include "df.h" #include "tm-constrs.h" #include "params.h" @@ -3014,7 +3015,7 @@ ix86_eax_live_at_start_p (void) to correct at this point. This gives false positives for broken functions that might use uninitialized data that happens to be allocated in eax, but who cares? */ - return REGNO_REG_SET_P (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end, 0); + return REGNO_REG_SET_P (DF_LIVE_OUT (ENTRY_BLOCK_PTR), 0); } /* Return true if TYPE has a variable argument list. */ @@ -5580,7 +5581,7 @@ ix86_select_alt_pic_regnum (void) { int i; for (i = 2; i >= 0; --i) - if (!regs_ever_live[i]) + if (!df_regs_ever_live_p (i)) return i; } @@ -5593,7 +5594,7 @@ ix86_save_reg (unsigned int regno, int maybe_eh_return) { if (pic_offset_table_rtx && regno == REAL_PIC_OFFSET_TABLE_REGNUM - && (regs_ever_live[REAL_PIC_OFFSET_TABLE_REGNUM] + && (df_regs_ever_live_p (REAL_PIC_OFFSET_TABLE_REGNUM) || current_function_profile || current_function_calls_eh_return || current_function_uses_const_pool)) @@ -5620,7 +5621,7 @@ ix86_save_reg (unsigned int regno, int maybe_eh_return) && regno == REGNO (cfun->machine->force_align_arg_pointer)) return 1; - return (regs_ever_live[regno] + return (df_regs_ever_live_p (regno) && !call_used_regs[regno] && !fixed_regs[regno] && (regno != HARD_FRAME_POINTER_REGNUM || !frame_pointer_needed)); @@ -6106,13 +6107,13 @@ ix86_expand_prologue (void) pic_reg_used = false; if (pic_offset_table_rtx - && (regs_ever_live[REAL_PIC_OFFSET_TABLE_REGNUM] + && (df_regs_ever_live_p (REAL_PIC_OFFSET_TABLE_REGNUM) || current_function_profile)) { unsigned int alt_pic_reg_used = ix86_select_alt_pic_regnum (); if (alt_pic_reg_used != INVALID_REGNUM) - REGNO (pic_offset_table_rtx) = alt_pic_reg_used; + SET_REGNO (pic_offset_table_rtx, alt_pic_reg_used); pic_reg_used = true; } @@ -6130,9 +6131,7 @@ ix86_expand_prologue (void) LABEL_PRESERVE_P (label) = 1; gcc_assert (REGNO (pic_offset_table_rtx) != REGNO (tmp_reg)); insn = emit_insn (gen_set_rip_rex64 (pic_offset_table_rtx, label)); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, NULL); insn = emit_insn (gen_set_got_offset_rex64 (tmp_reg, label)); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, NULL); insn = emit_insn (gen_adddi3 (pic_offset_table_rtx, pic_offset_table_rtx, tmp_reg)); } @@ -6141,20 +6140,16 @@ ix86_expand_prologue (void) } else insn = emit_insn (gen_set_got (pic_offset_table_rtx)); - - /* Even with accurate pre-reload life analysis, we can wind up - deleting all references to the pic register after reload. - Consider if cross-jumping unifies two sides of a branch - controlled by a comparison vs the only read from a global. - In which case, allow the set_got to be deleted, though we're - too late to do anything about the ebx save in the prologue. */ - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, NULL); } /* Prevent function calls from be scheduled before the call to mcount. In the pic_reg_used case, make sure that the got load isn't deleted. */ if (current_function_profile) - emit_insn (gen_blockage (pic_reg_used ? pic_offset_table_rtx : const0_rtx)); + { + if (pic_reg_used) + emit_insn (gen_prologue_use (pic_offset_table_rtx)); + emit_insn (gen_blockage ()); + } } /* Emit code to restore saved registers using MOV insns. First register @@ -6366,7 +6361,7 @@ ix86_output_function_epilogue (FILE *file ATTRIBUTE_UNUSED, HOST_WIDE_INT size ATTRIBUTE_UNUSED) { if (pic_offset_table_rtx) - REGNO (pic_offset_table_rtx) = REAL_PIC_OFFSET_TABLE_REGNUM; + SET_REGNO (pic_offset_table_rtx, REAL_PIC_OFFSET_TABLE_REGNUM); #if TARGET_MACHO /* Mach-O doesn't support labels at the end of objects, so if it looks like we might want one, insert a NOP. */ @@ -7193,7 +7188,7 @@ legitimize_pic_address (rtx orig, rtx reg) base address (@GOTOFF). */ if (reload_in_progress) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); if (GET_CODE (addr) == CONST) addr = XEXP (addr, 0); if (GET_CODE (addr) == PLUS) @@ -7225,7 +7220,7 @@ legitimize_pic_address (rtx orig, rtx reg) base address (@GOTOFF). */ if (reload_in_progress) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); if (GET_CODE (addr) == CONST) addr = XEXP (addr, 0); if (GET_CODE (addr) == PLUS) @@ -7276,7 +7271,7 @@ legitimize_pic_address (rtx orig, rtx reg) Global Offset Table (@GOT). */ if (reload_in_progress) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); new_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT); new_rtx = gen_rtx_CONST (Pmode, new_rtx); if (TARGET_64BIT) @@ -7329,7 +7324,7 @@ legitimize_pic_address (rtx orig, rtx reg) if (!TARGET_64BIT) { if (reload_in_progress) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); new_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0), UNSPEC_GOTOFF); new_rtx = gen_rtx_PLUS (Pmode, new_rtx, op1); @@ -7489,7 +7484,7 @@ legitimize_tls_address (rtx x, enum tls_model model, int for_mov) else if (flag_pic) { if (reload_in_progress) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); pic = pic_offset_table_rtx; type = TARGET_ANY_GNU_TLS ? UNSPEC_GOTNTPOFF : UNSPEC_GOTTPOFF; } diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 693f8ee2df7..5089883dca5 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2431,7 +2431,7 @@ struct machine_function GTY(()) verify whether there's any such instruction live by testing that REG_SP is live. */ #define ix86_current_function_calls_tls_descriptor \ - (ix86_tls_descriptor_calls_expanded_in_cfun && regs_ever_live[SP_REG]) + (ix86_tls_descriptor_calls_expanded_in_cfun && df_regs_ever_live_p (SP_REG)) /* Control behavior of x86_file_start. */ #define X86_FILE_START_VERSION_DIRECTIVE false diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 905e1c19c1a..0ecb9961d85 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -194,6 +194,7 @@ (UNSPECV_CMPXCHG_2 11) (UNSPECV_XCHG 12) (UNSPECV_LOCK 13) + (UNSPECV_PROLOGUE_USE 14) ]) ;; Registers by name. @@ -1917,7 +1918,7 @@ [(set (match_operand:DI 0 "push_operand" "") (match_operand:DI 1 "immediate_operand" ""))] "TARGET_64BIT && ((optimize > 0 && flag_peephole2) - ? flow2_completed : reload_completed) + ? epilogue_completed : reload_completed) && !symbolic_operand (operands[1], DImode) && !x86_64_immediate_operand (operands[1], DImode)" [(set (match_dup 0) (match_dup 1)) @@ -2153,7 +2154,7 @@ [(set (match_operand:DI 0 "memory_operand" "") (match_operand:DI 1 "immediate_operand" ""))] "TARGET_64BIT && ((optimize > 0 && flag_peephole2) - ? flow2_completed : reload_completed) + ? epilogue_completed : reload_completed) && !symbolic_operand (operands[1], DImode) && !x86_64_immediate_operand (operands[1], DImode)" [(set (match_dup 2) (match_dup 3)) @@ -10573,7 +10574,7 @@ (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && ((optimize > 0 && flag_peephole2) - ? flow2_completed : reload_completed)" + ? epilogue_completed : reload_completed)" [(const_int 0)] "ix86_split_ashl (operands, NULL_RTX, DImode); DONE;") @@ -11504,7 +11505,7 @@ (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && ((optimize > 0 && flag_peephole2) - ? flow2_completed : reload_completed)" + ? epilogue_completed : reload_completed)" [(const_int 0)] "ix86_split_ashr (operands, NULL_RTX, DImode); DONE;") @@ -12182,7 +12183,7 @@ (match_operand:QI 2 "nonmemory_operand" ""))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && ((optimize > 0 && flag_peephole2) - ? flow2_completed : reload_completed)" + ? epilogue_completed : reload_completed)" [(const_int 0)] "ix86_split_lshr (operands, NULL_RTX, DImode); DONE;") @@ -14347,7 +14348,7 @@ registers we stored in the result block. We avoid problems by claiming that all hard registers are used and clobbered at this point. */ - emit_insn (gen_blockage (const0_rtx)); + emit_insn (gen_blockage ()); DONE; }) @@ -14358,7 +14359,15 @@ ;; all of memory. This blocks insns from being moved across this point. (define_insn "blockage" - [(unspec_volatile [(match_operand 0 "" "")] UNSPECV_BLOCKAGE)] + [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)] + "" + "" + [(set_attr "length" "0")]) + +;; As USE insns aren't meaningful after reload, this is used instead +;; to prevent deleting instructions setting registers for PIC code +(define_insn "prologue_use" + [(unspec_volatile [(match_operand 0 "" "")] UNSPECV_PROLOGUE_USE)] "" "" [(set_attr "length" "0")]) diff --git a/gcc/config/ia64/ia64-protos.h b/gcc/config/ia64/ia64-protos.h index 555038b30fc..2be48783471 100644 --- a/gcc/config/ia64/ia64-protos.h +++ b/gcc/config/ia64/ia64-protos.h @@ -109,3 +109,4 @@ extern void ia64_output_function_profiler (FILE *, int); extern void ia64_profile_hook (int); extern void ia64_optimization_options (int, int); +extern void ia64_init_expanders (void); diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index 5e1328b3bfb..24af522fac3 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -53,8 +53,10 @@ Boston, MA 02110-1301, USA. */ #include "cfglayout.h" #include "tree-gimple.h" #include "intl.h" +#include "df.h" #include "debug.h" #include "params.h" +#include "dbgcnt.h" #include "tm-constrs.h" /* This is used for communication between ASM_OUTPUT_LABEL and @@ -122,6 +124,18 @@ unsigned int ia64_section_threshold; TRUE if we do insn bundling instead of insn scheduling. */ int bundling_p = 0; +enum ia64_frame_regs +{ + reg_fp, + reg_save_b0, + reg_save_pr, + reg_save_ar_pfs, + reg_save_ar_unat, + reg_save_ar_lc, + reg_save_gp, + number_of_ia64_frame_regs +}; + /* Structure to be filled in by ia64_compute_frame_size with register save masks and offsets for the current function. */ @@ -136,13 +150,7 @@ struct ia64_frame_info unsigned int gr_used_mask; /* mask of registers in use as gr spill registers or long-term scratches. */ int n_spilled; /* number of spilled registers. */ - int reg_fp; /* register for fp. */ - int reg_save_b0; /* save register for b0. */ - int reg_save_pr; /* save register for prs. */ - int reg_save_ar_pfs; /* save register for ar.pfs. */ - int reg_save_ar_unat; /* save register for ar.unat. */ - int reg_save_ar_lc; /* save register for ar.lc. */ - int reg_save_gp; /* save register for gp. */ + int r[number_of_ia64_frame_regs]; /* Frame related registers. */ int n_input_regs; /* number of input registers used. */ int n_local_regs; /* number of local registers used. */ int n_output_regs; /* number of output registers used. */ @@ -154,6 +162,8 @@ struct ia64_frame_info /* Current frame information calculated by ia64_compute_frame_size. */ static struct ia64_frame_info current_frame_info; +/* The actual registers that are emitted. */ +static int emitted_frame_related_regs[number_of_ia64_frame_regs]; static int ia64_first_cycle_multipass_dfa_lookahead (void); static void ia64_dependencies_evaluation_hook (rtx, rtx); @@ -173,7 +183,7 @@ static int ia64_spec_check_p (rtx); static int ia64_spec_check_src_p (rtx); static rtx gen_tls_get_addr (void); static rtx gen_thread_pointer (void); -static int find_gr_spill (int); +static int find_gr_spill (enum ia64_frame_regs, int); static int next_scratch_gr_reg (void); static void mark_reg_gr_used_mask (rtx, void *); static void ia64_compute_frame_size (HOST_WIDE_INT); @@ -1872,13 +1882,42 @@ ia64_expand_call (rtx retval, rtx addr, rtx nextarg ATTRIBUTE_UNUSED, use_reg (&CALL_INSN_FUNCTION_USAGE (insn), b0); } +static void +reg_emitted (enum ia64_frame_regs r) +{ + if (emitted_frame_related_regs[r] == 0) + emitted_frame_related_regs[r] = current_frame_info.r[r]; + else + gcc_assert (emitted_frame_related_regs[r] == current_frame_info.r[r]); +} + +static int +get_reg (enum ia64_frame_regs r) +{ + reg_emitted (r); + return current_frame_info.r[r]; +} + +static bool +is_emitted (int regno) +{ + enum ia64_frame_regs r; + + for (r = reg_fp; r < number_of_ia64_frame_regs; r++) + if (emitted_frame_related_regs[r] == regno) + return true; + return false; +} + void ia64_reload_gp (void) { rtx tmp; - if (current_frame_info.reg_save_gp) - tmp = gen_rtx_REG (DImode, current_frame_info.reg_save_gp); + if (current_frame_info.r[reg_save_gp]) + { + tmp = gen_rtx_REG (DImode, get_reg (reg_save_gp)); + } else { HOST_WIDE_INT offset; @@ -2158,20 +2197,33 @@ ia64_globalize_decl_name (FILE * stream, tree decl) TRY_LOCALS is true if we should attempt to locate a local regnum. */ static int -find_gr_spill (int try_locals) +find_gr_spill (enum ia64_frame_regs r, int try_locals) { int regno; + if (emitted_frame_related_regs[r] != 0) + { + regno = emitted_frame_related_regs[r]; + if (regno >= LOC_REG (0) && regno < LOC_REG (80 - frame_pointer_needed)) + current_frame_info.n_local_regs = regno - LOC_REG (0) + 1; + else if (current_function_is_leaf + && regno >= GR_REG (1) && regno <= GR_REG (31)) + current_frame_info.gr_used_mask |= 1 << regno; + + return regno; + } + /* If this is a leaf function, first try an otherwise unused call-clobbered register. */ if (current_function_is_leaf) { for (regno = GR_REG (1); regno <= GR_REG (31); regno++) - if (! regs_ever_live[regno] + if (! df_regs_ever_live_p (regno) && call_used_regs[regno] && ! fixed_regs[regno] && ! global_regs[regno] - && ((current_frame_info.gr_used_mask >> regno) & 1) == 0) + && ((current_frame_info.gr_used_mask >> regno) & 1) == 0 + && ! is_emitted (regno)) { current_frame_info.gr_used_mask |= 1 << regno; return regno; @@ -2243,6 +2295,7 @@ mark_reg_gr_used_mask (rtx reg, void *data ATTRIBUTE_UNUSED) } } + /* Returns the number of bytes offset between the frame pointer and the stack pointer for the current function. SIZE is the number of bytes of space needed for local variables. */ @@ -2284,7 +2337,7 @@ ia64_compute_frame_size (HOST_WIDE_INT size) since we'll be adjusting that down later. */ regno = LOC_REG (78) + ! frame_pointer_needed; for (; regno >= LOC_REG (0); regno--) - if (regs_ever_live[regno]) + if (df_regs_ever_live_p (regno) && !is_emitted (regno)) break; current_frame_info.n_local_regs = regno - LOC_REG (0) + 1; @@ -2299,13 +2352,13 @@ ia64_compute_frame_size (HOST_WIDE_INT size) else { for (regno = IN_REG (7); regno >= IN_REG (0); regno--) - if (regs_ever_live[regno]) + if (df_regs_ever_live_p (regno)) break; current_frame_info.n_input_regs = regno - IN_REG (0) + 1; } for (regno = OUT_REG (7); regno >= OUT_REG (0); regno--) - if (regs_ever_live[regno]) + if (df_regs_ever_live_p (regno)) break; i = regno - OUT_REG (0) + 1; @@ -2327,7 +2380,7 @@ ia64_compute_frame_size (HOST_WIDE_INT size) which will always wind up on the stack. */ for (regno = FR_REG (2); regno <= FR_REG (127); regno++) - if (regs_ever_live[regno] && ! call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) { SET_HARD_REG_BIT (mask, regno); spill_size += 16; @@ -2336,7 +2389,7 @@ ia64_compute_frame_size (HOST_WIDE_INT size) } for (regno = GR_REG (1); regno <= GR_REG (31); regno++) - if (regs_ever_live[regno] && ! call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) { SET_HARD_REG_BIT (mask, regno); spill_size += 8; @@ -2345,7 +2398,7 @@ ia64_compute_frame_size (HOST_WIDE_INT size) } for (regno = BR_REG (1); regno <= BR_REG (7); regno++) - if (regs_ever_live[regno] && ! call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) { SET_HARD_REG_BIT (mask, regno); spill_size += 8; @@ -2357,15 +2410,15 @@ ia64_compute_frame_size (HOST_WIDE_INT size) if (frame_pointer_needed) { - current_frame_info.reg_fp = find_gr_spill (1); + current_frame_info.r[reg_fp] = find_gr_spill (reg_fp, 1); /* If we did not get a register, then we take LOC79. This is guaranteed to be free, even if regs_ever_live is already set, because this is HARD_FRAME_POINTER_REGNUM. This requires incrementing n_local_regs, as we don't count loc79 above. */ - if (current_frame_info.reg_fp == 0) + if (current_frame_info.r[reg_fp] == 0) { - current_frame_info.reg_fp = LOC_REG (79); - current_frame_info.n_local_regs++; + current_frame_info.r[reg_fp] = LOC_REG (79); + current_frame_info.n_local_regs = LOC_REG (79) - LOC_REG (0) + 1; } } @@ -2376,8 +2429,8 @@ ia64_compute_frame_size (HOST_WIDE_INT size) able to unwind the stack. */ SET_HARD_REG_BIT (mask, BR_REG (0)); - current_frame_info.reg_save_b0 = find_gr_spill (1); - if (current_frame_info.reg_save_b0 == 0) + current_frame_info.r[reg_save_b0] = find_gr_spill (reg_save_b0, 1); + if (current_frame_info.r[reg_save_b0] == 0) { extra_spill_size += 8; n_spilled += 1; @@ -2385,8 +2438,8 @@ ia64_compute_frame_size (HOST_WIDE_INT size) /* Similarly for ar.pfs. */ SET_HARD_REG_BIT (mask, AR_PFS_REGNUM); - current_frame_info.reg_save_ar_pfs = find_gr_spill (1); - if (current_frame_info.reg_save_ar_pfs == 0) + current_frame_info.r[reg_save_ar_pfs] = find_gr_spill (reg_save_ar_pfs, 1); + if (current_frame_info.r[reg_save_ar_pfs] == 0) { extra_spill_size += 8; n_spilled += 1; @@ -2394,9 +2447,9 @@ ia64_compute_frame_size (HOST_WIDE_INT size) /* Similarly for gp. Note that if we're calling setjmp, the stacked registers are clobbered, so we fall back to the stack. */ - current_frame_info.reg_save_gp - = (current_function_calls_setjmp ? 0 : find_gr_spill (1)); - if (current_frame_info.reg_save_gp == 0) + current_frame_info.r[reg_save_gp] + = (current_function_calls_setjmp ? 0 : find_gr_spill (reg_save_gp, 1)); + if (current_frame_info.r[reg_save_gp] == 0) { SET_HARD_REG_BIT (mask, GR_REG (1)); spill_size += 8; @@ -2405,18 +2458,19 @@ ia64_compute_frame_size (HOST_WIDE_INT size) } else { - if (regs_ever_live[BR_REG (0)] && ! call_used_regs[BR_REG (0)]) + if (df_regs_ever_live_p (BR_REG (0)) && ! call_used_regs[BR_REG (0)]) { SET_HARD_REG_BIT (mask, BR_REG (0)); extra_spill_size += 8; n_spilled += 1; } - if (regs_ever_live[AR_PFS_REGNUM]) + if (df_regs_ever_live_p (AR_PFS_REGNUM)) { SET_HARD_REG_BIT (mask, AR_PFS_REGNUM); - current_frame_info.reg_save_ar_pfs = find_gr_spill (1); - if (current_frame_info.reg_save_ar_pfs == 0) + current_frame_info.r[reg_save_ar_pfs] + = find_gr_spill (reg_save_ar_pfs, 1); + if (current_frame_info.r[reg_save_ar_pfs] == 0) { extra_spill_size += 8; n_spilled += 1; @@ -2429,25 +2483,31 @@ ia64_compute_frame_size (HOST_WIDE_INT size) it is absolutely critical that FP get the only hard register that's guaranteed to be free, so we allocated it first. If all three did happen to be allocated hard regs, and are consecutive, rearrange them - into the preferred order now. */ - if (current_frame_info.reg_fp != 0 - && current_frame_info.reg_save_b0 == current_frame_info.reg_fp + 1 - && current_frame_info.reg_save_ar_pfs == current_frame_info.reg_fp + 2) + into the preferred order now. + + If we have already emitted code for any of those registers, + then it's already too late to change. */ + if (current_frame_info.r[reg_fp] != 0 + && current_frame_info.r[reg_save_b0] == current_frame_info.r[reg_fp] + 1 + && current_frame_info.r[reg_save_ar_pfs] == current_frame_info.r[reg_fp] + 2 + && emitted_frame_related_regs[reg_save_b0] == 0 + && emitted_frame_related_regs[reg_save_ar_pfs] == 0 + && emitted_frame_related_regs[reg_fp] == 0) { - current_frame_info.reg_save_b0 = current_frame_info.reg_fp; - current_frame_info.reg_save_ar_pfs = current_frame_info.reg_fp + 1; - current_frame_info.reg_fp = current_frame_info.reg_fp + 2; + current_frame_info.r[reg_save_b0] = current_frame_info.r[reg_fp]; + current_frame_info.r[reg_save_ar_pfs] = current_frame_info.r[reg_fp] + 1; + current_frame_info.r[reg_fp] = current_frame_info.r[reg_fp] + 2; } /* See if we need to store the predicate register block. */ for (regno = PR_REG (0); regno <= PR_REG (63); regno++) - if (regs_ever_live[regno] && ! call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) break; if (regno <= PR_REG (63)) { SET_HARD_REG_BIT (mask, PR_REG (0)); - current_frame_info.reg_save_pr = find_gr_spill (1); - if (current_frame_info.reg_save_pr == 0) + current_frame_info.r[reg_save_pr] = find_gr_spill (reg_save_pr, 1); + if (current_frame_info.r[reg_save_pr] == 0) { extra_spill_size += 8; n_spilled += 1; @@ -2456,30 +2516,32 @@ ia64_compute_frame_size (HOST_WIDE_INT size) /* ??? Mark them all as used so that register renaming and such are free to use them. */ for (regno = PR_REG (0); regno <= PR_REG (63); regno++) - regs_ever_live[regno] = 1; + df_set_regs_ever_live (regno, true); } /* If we're forced to use st8.spill, we're forced to save and restore ar.unat as well. The check for existing liveness allows inline asm to touch ar.unat. */ if (spilled_gr_p || cfun->machine->n_varargs - || regs_ever_live[AR_UNAT_REGNUM]) + || df_regs_ever_live_p (AR_UNAT_REGNUM)) { - regs_ever_live[AR_UNAT_REGNUM] = 1; + df_set_regs_ever_live (AR_UNAT_REGNUM, true); SET_HARD_REG_BIT (mask, AR_UNAT_REGNUM); - current_frame_info.reg_save_ar_unat = find_gr_spill (spill_size == 0); - if (current_frame_info.reg_save_ar_unat == 0) + current_frame_info.r[reg_save_ar_unat] + = find_gr_spill (reg_save_ar_unat, spill_size == 0); + if (current_frame_info.r[reg_save_ar_unat] == 0) { extra_spill_size += 8; n_spilled += 1; } } - if (regs_ever_live[AR_LC_REGNUM]) + if (df_regs_ever_live_p (AR_LC_REGNUM)) { SET_HARD_REG_BIT (mask, AR_LC_REGNUM); - current_frame_info.reg_save_ar_lc = find_gr_spill (spill_size == 0); - if (current_frame_info.reg_save_ar_lc == 0) + current_frame_info.r[reg_save_ar_lc] + = find_gr_spill (reg_save_ar_lc, spill_size == 0); + if (current_frame_info.r[reg_save_ar_lc] == 0) { extra_spill_size += 8; n_spilled += 1; @@ -2713,16 +2775,6 @@ spill_restore_mem (rtx reg, HOST_WIDE_INT cfa_off) insn = emit_insn (seq); } spill_fill_data.init_after = insn; - - /* If DISP is 0, we may or may not have a further adjustment - afterward. If we do, then the load/store insn may be modified - to be a post-modify. If we don't, then this copy may be - eliminated by copyprop_hardreg_forward, which makes this - insn garbage, which runs afoul of the sanity check in - propagate_one_insn. So mark this insn as legal to delete. */ - if (disp == 0) - REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - REG_NOTES (insn)); } mem = gen_rtx_MEM (GET_MODE (reg), spill_fill_data.iter_reg[iter]); @@ -2850,6 +2902,22 @@ ia64_expand_prologue (void) ia64_compute_frame_size (get_frame_size ()); last_scratch_gr_reg = 15; + if (dump_file) + { + fprintf (dump_file, "ia64 frame related registers " + "recorded in current_frame_info.r[]:\n"); +#define PRINTREG(a) if (current_frame_info.r[a]) \ + fprintf(dump_file, "%s = %d\n", #a, current_frame_info.r[a]) + PRINTREG(reg_fp); + PRINTREG(reg_save_b0); + PRINTREG(reg_save_pr); + PRINTREG(reg_save_ar_pfs); + PRINTREG(reg_save_ar_unat); + PRINTREG(reg_save_ar_lc); + PRINTREG(reg_save_gp); +#undef PRINTREG + } + /* If there is no epilogue, then we don't need some prologue insns. We need to avoid emitting the dead prologue insns, because flow will complain about them. */ @@ -2892,12 +2960,12 @@ ia64_expand_prologue (void) there is a frame pointer. loc79 gets wasted in this case, as it is renamed to a register that will never be used. See also the try_locals code in find_gr_spill. */ - if (current_frame_info.reg_fp) + if (current_frame_info.r[reg_fp]) { const char *tmp = reg_names[HARD_FRAME_POINTER_REGNUM]; reg_names[HARD_FRAME_POINTER_REGNUM] - = reg_names[current_frame_info.reg_fp]; - reg_names[current_frame_info.reg_fp] = tmp; + = reg_names[current_frame_info.r[reg_fp]]; + reg_names[current_frame_info.r[reg_fp]] = tmp; } /* We don't need an alloc instruction if we've used no outputs or locals. */ @@ -2915,8 +2983,11 @@ ia64_expand_prologue (void) { current_frame_info.need_regstk = 0; - if (current_frame_info.reg_save_ar_pfs) - regno = current_frame_info.reg_save_ar_pfs; + if (current_frame_info.r[reg_save_ar_pfs]) + { + regno = current_frame_info.r[reg_save_ar_pfs]; + reg_emitted (reg_save_ar_pfs); + } else regno = next_scratch_gr_reg (); ar_pfs_save_reg = gen_rtx_REG (DImode, regno); @@ -2926,7 +2997,7 @@ ia64_expand_prologue (void) GEN_INT (current_frame_info.n_local_regs), GEN_INT (current_frame_info.n_output_regs), GEN_INT (current_frame_info.n_rotate_regs))); - RTX_FRAME_RELATED_P (insn) = (current_frame_info.reg_save_ar_pfs != 0); + RTX_FRAME_RELATED_P (insn) = (current_frame_info.r[reg_save_ar_pfs] != 0); } /* Set up frame pointer, stack pointer, and spill iterators. */ @@ -2984,9 +3055,12 @@ ia64_expand_prologue (void) /* Must copy out ar.unat before doing any integer spills. */ if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_UNAT_REGNUM)) { - if (current_frame_info.reg_save_ar_unat) - ar_unat_save_reg - = gen_rtx_REG (DImode, current_frame_info.reg_save_ar_unat); + if (current_frame_info.r[reg_save_ar_unat]) + { + ar_unat_save_reg + = gen_rtx_REG (DImode, current_frame_info.r[reg_save_ar_unat]); + reg_emitted (reg_save_ar_unat); + } else { alt_regno = next_scratch_gr_reg (); @@ -2996,11 +3070,11 @@ ia64_expand_prologue (void) reg = gen_rtx_REG (DImode, AR_UNAT_REGNUM); insn = emit_move_insn (ar_unat_save_reg, reg); - RTX_FRAME_RELATED_P (insn) = (current_frame_info.reg_save_ar_unat != 0); + RTX_FRAME_RELATED_P (insn) = (current_frame_info.r[reg_save_ar_unat] != 0); /* Even if we're not going to generate an epilogue, we still need to save the register so that EH works. */ - if (! epilogue_p && current_frame_info.reg_save_ar_unat) + if (! epilogue_p && current_frame_info.r[reg_save_ar_unat]) emit_insn (gen_prologue_use (ar_unat_save_reg)); } else @@ -3026,9 +3100,10 @@ ia64_expand_prologue (void) if (TEST_HARD_REG_BIT (current_frame_info.mask, PR_REG (0))) { reg = gen_rtx_REG (DImode, PR_REG (0)); - if (current_frame_info.reg_save_pr != 0) + if (current_frame_info.r[reg_save_pr] != 0) { - alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_pr); + alt_reg = gen_rtx_REG (DImode, current_frame_info.r[reg_save_pr]); + reg_emitted (reg_save_pr); insn = emit_move_insn (alt_reg, reg); /* ??? Denote pr spill/fill by a DImode move that modifies all @@ -3056,7 +3131,7 @@ ia64_expand_prologue (void) /* Handle AR regs in numerical order. All of them get special handling. */ if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_UNAT_REGNUM) - && current_frame_info.reg_save_ar_unat == 0) + && current_frame_info.r[reg_save_ar_unat] == 0) { reg = gen_rtx_REG (DImode, AR_UNAT_REGNUM); do_spill (gen_movdi_x, ar_unat_save_reg, cfa_off, reg); @@ -3067,7 +3142,7 @@ ia64_expand_prologue (void) only thing we have to do now is copy that register to a stack slot if we'd not allocated a local register for the job. */ if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_PFS_REGNUM) - && current_frame_info.reg_save_ar_pfs == 0) + && current_frame_info.r[reg_save_ar_pfs] == 0) { reg = gen_rtx_REG (DImode, AR_PFS_REGNUM); do_spill (gen_movdi_x, ar_pfs_save_reg, cfa_off, reg); @@ -3077,9 +3152,10 @@ ia64_expand_prologue (void) if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_LC_REGNUM)) { reg = gen_rtx_REG (DImode, AR_LC_REGNUM); - if (current_frame_info.reg_save_ar_lc != 0) + if (current_frame_info.r[reg_save_ar_lc] != 0) { - alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_ar_lc); + alt_reg = gen_rtx_REG (DImode, current_frame_info.r[reg_save_ar_lc]); + reg_emitted (reg_save_ar_lc); insn = emit_move_insn (alt_reg, reg); RTX_FRAME_RELATED_P (insn) = 1; @@ -3102,9 +3178,10 @@ ia64_expand_prologue (void) if (TEST_HARD_REG_BIT (current_frame_info.mask, BR_REG (0))) { reg = gen_rtx_REG (DImode, BR_REG (0)); - if (current_frame_info.reg_save_b0 != 0) + if (current_frame_info.r[reg_save_b0] != 0) { - alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_b0); + alt_reg = gen_rtx_REG (DImode, current_frame_info.r[reg_save_b0]); + reg_emitted (reg_save_b0); insn = emit_move_insn (alt_reg, reg); RTX_FRAME_RELATED_P (insn) = 1; @@ -3123,17 +3200,12 @@ ia64_expand_prologue (void) } } - if (current_frame_info.reg_save_gp) + if (current_frame_info.r[reg_save_gp]) { + reg_emitted (reg_save_gp); insn = emit_move_insn (gen_rtx_REG (DImode, - current_frame_info.reg_save_gp), + current_frame_info.r[reg_save_gp]), pic_offset_table_rtx); - /* We don't know for sure yet if this is actually needed, since - we've not split the PIC call patterns. If all of the calls - are indirect, and not followed by any uses of the gp, then - this save is dead. Allow it to go away. */ - REG_NOTES (insn) - = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, REG_NOTES (insn)); } /* We should now be at the base of the gr/br/fr spill area. */ @@ -3217,8 +3289,11 @@ ia64_expand_epilogue (int sibcall_p) /* Restore the predicate registers. */ if (TEST_HARD_REG_BIT (current_frame_info.mask, PR_REG (0))) { - if (current_frame_info.reg_save_pr != 0) - alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_pr); + if (current_frame_info.r[reg_save_pr] != 0) + { + alt_reg = gen_rtx_REG (DImode, current_frame_info.r[reg_save_pr]); + reg_emitted (reg_save_pr); + } else { alt_regno = next_scratch_gr_reg (); @@ -3236,9 +3311,12 @@ ia64_expand_epilogue (int sibcall_p) after the GRs have been restored. */ if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_UNAT_REGNUM)) { - if (current_frame_info.reg_save_ar_unat != 0) - ar_unat_save_reg - = gen_rtx_REG (DImode, current_frame_info.reg_save_ar_unat); + if (current_frame_info.r[reg_save_ar_unat] != 0) + { + ar_unat_save_reg + = gen_rtx_REG (DImode, current_frame_info.r[reg_save_ar_unat]); + reg_emitted (reg_save_ar_unat); + } else { alt_regno = next_scratch_gr_reg (); @@ -3251,9 +3329,10 @@ ia64_expand_epilogue (int sibcall_p) else ar_unat_save_reg = NULL_RTX; - if (current_frame_info.reg_save_ar_pfs != 0) + if (current_frame_info.r[reg_save_ar_pfs] != 0) { - alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_ar_pfs); + reg_emitted (reg_save_ar_pfs); + alt_reg = gen_rtx_REG (DImode, current_frame_info.r[reg_save_ar_pfs]); reg = gen_rtx_REG (DImode, AR_PFS_REGNUM); emit_move_insn (reg, alt_reg); } @@ -3269,8 +3348,11 @@ ia64_expand_epilogue (int sibcall_p) if (TEST_HARD_REG_BIT (current_frame_info.mask, AR_LC_REGNUM)) { - if (current_frame_info.reg_save_ar_lc != 0) - alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_ar_lc); + if (current_frame_info.r[reg_save_ar_lc] != 0) + { + alt_reg = gen_rtx_REG (DImode, current_frame_info.r[reg_save_ar_lc]); + reg_emitted (reg_save_ar_lc); + } else { alt_regno = next_scratch_gr_reg (); @@ -3285,8 +3367,11 @@ ia64_expand_epilogue (int sibcall_p) /* Restore the return pointer. */ if (TEST_HARD_REG_BIT (current_frame_info.mask, BR_REG (0))) { - if (current_frame_info.reg_save_b0 != 0) - alt_reg = gen_rtx_REG (DImode, current_frame_info.reg_save_b0); + if (current_frame_info.r[reg_save_b0] != 0) + { + alt_reg = gen_rtx_REG (DImode, current_frame_info.r[reg_save_b0]); + reg_emitted (reg_save_b0); + } else { alt_regno = next_scratch_gr_reg (); @@ -3409,7 +3494,8 @@ ia64_expand_epilogue (int sibcall_p) register, we may have swapped the names of r2 and HARD_FRAME_POINTER_REGNUM, so we have to make sure we're using the string "r2" when emitting the register name for the assembler. */ - if (current_frame_info.reg_fp && current_frame_info.reg_fp == GR_REG (2)) + if (current_frame_info.r[reg_fp] + && current_frame_info.r[reg_fp] == GR_REG (2)) fp = HARD_FRAME_POINTER_REGNUM; /* We must emit an alloc to force the input registers to become output @@ -3442,11 +3528,11 @@ ia64_direct_return (void) return (current_frame_info.total_size == 0 && current_frame_info.n_spilled == 0 - && current_frame_info.reg_save_b0 == 0 - && current_frame_info.reg_save_pr == 0 - && current_frame_info.reg_save_ar_pfs == 0 - && current_frame_info.reg_save_ar_unat == 0 - && current_frame_info.reg_save_ar_lc == 0); + && current_frame_info.r[reg_save_b0] == 0 + && current_frame_info.r[reg_save_pr] == 0 + && current_frame_info.r[reg_save_ar_pfs] == 0 + && current_frame_info.r[reg_save_ar_unat] == 0 + && current_frame_info.r[reg_save_ar_lc] == 0); } return 0; } @@ -3472,8 +3558,11 @@ ia64_split_return_addr_rtx (rtx dest) if (TEST_HARD_REG_BIT (current_frame_info.mask, BR_REG (0))) { - if (current_frame_info.reg_save_b0 != 0) - src = gen_rtx_REG (DImode, current_frame_info.reg_save_b0); + if (current_frame_info.r[reg_save_b0] != 0) + { + src = gen_rtx_REG (DImode, current_frame_info.r[reg_save_b0]); + reg_emitted (reg_save_b0); + } else { HOST_WIDE_INT off; @@ -3520,21 +3609,14 @@ int ia64_hard_regno_rename_ok (int from, int to) { /* Don't clobber any of the registers we reserved for the prologue. */ - if (to == current_frame_info.reg_fp - || to == current_frame_info.reg_save_b0 - || to == current_frame_info.reg_save_pr - || to == current_frame_info.reg_save_ar_pfs - || to == current_frame_info.reg_save_ar_unat - || to == current_frame_info.reg_save_ar_lc) - return 0; + enum ia64_frame_regs r; - if (from == current_frame_info.reg_fp - || from == current_frame_info.reg_save_b0 - || from == current_frame_info.reg_save_pr - || from == current_frame_info.reg_save_ar_pfs - || from == current_frame_info.reg_save_ar_unat - || from == current_frame_info.reg_save_ar_lc) - return 0; + for (r = reg_fp; r <= reg_save_ar_lc; r++) + if (to == current_frame_info.r[r] + || from == current_frame_info.r[r] + || to == emitted_frame_related_regs[r] + || from == emitted_frame_related_regs[r]) + return 0; /* Don't use output registers outside the register frame. */ if (OUT_REGNO_P (to) && to >= OUT_REG (current_frame_info.n_output_regs)) @@ -3592,36 +3674,36 @@ ia64_output_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED) mask = 0; grsave = grsave_prev = 0; - if (current_frame_info.reg_save_b0 != 0) + if (current_frame_info.r[reg_save_b0] != 0) { mask |= 8; - grsave = grsave_prev = current_frame_info.reg_save_b0; + grsave = grsave_prev = current_frame_info.r[reg_save_b0]; } - if (current_frame_info.reg_save_ar_pfs != 0 + if (current_frame_info.r[reg_save_ar_pfs] != 0 && (grsave_prev == 0 - || current_frame_info.reg_save_ar_pfs == grsave_prev + 1)) + || current_frame_info.r[reg_save_ar_pfs] == grsave_prev + 1)) { mask |= 4; if (grsave_prev == 0) - grsave = current_frame_info.reg_save_ar_pfs; - grsave_prev = current_frame_info.reg_save_ar_pfs; + grsave = current_frame_info.r[reg_save_ar_pfs]; + grsave_prev = current_frame_info.r[reg_save_ar_pfs]; } - if (current_frame_info.reg_fp != 0 + if (current_frame_info.r[reg_fp] != 0 && (grsave_prev == 0 - || current_frame_info.reg_fp == grsave_prev + 1)) + || current_frame_info.r[reg_fp] == grsave_prev + 1)) { mask |= 2; if (grsave_prev == 0) grsave = HARD_FRAME_POINTER_REGNUM; - grsave_prev = current_frame_info.reg_fp; + grsave_prev = current_frame_info.r[reg_fp]; } - if (current_frame_info.reg_save_pr != 0 + if (current_frame_info.r[reg_save_pr] != 0 && (grsave_prev == 0 - || current_frame_info.reg_save_pr == grsave_prev + 1)) + || current_frame_info.r[reg_save_pr] == grsave_prev + 1)) { mask |= 1; if (grsave_prev == 0) - grsave = current_frame_info.reg_save_pr; + grsave = current_frame_info.r[reg_save_pr]; } if (mask && TARGET_GNU_AS) @@ -3657,12 +3739,13 @@ ia64_output_function_epilogue (FILE *file ATTRIBUTE_UNUSED, { int i; - if (current_frame_info.reg_fp) + if (current_frame_info.r[reg_fp]) { const char *tmp = reg_names[HARD_FRAME_POINTER_REGNUM]; reg_names[HARD_FRAME_POINTER_REGNUM] - = reg_names[current_frame_info.reg_fp]; - reg_names[current_frame_info.reg_fp] = tmp; + = reg_names[current_frame_info.r[reg_fp]]; + reg_names[current_frame_info.r[reg_fp]] = tmp; + reg_emitted (reg_fp); } if (! TARGET_REG_NAMES) { @@ -3683,11 +3766,11 @@ ia64_dbx_register_number (int regno) /* In ia64_expand_prologue we quite literally renamed the frame pointer from its home at loc79 to something inside the register frame. We must perform the same renumbering here for the debug info. */ - if (current_frame_info.reg_fp) + if (current_frame_info.r[reg_fp]) { if (regno == HARD_FRAME_POINTER_REGNUM) - regno = current_frame_info.reg_fp; - else if (regno == current_frame_info.reg_fp) + regno = current_frame_info.r[reg_fp]; + else if (regno == current_frame_info.r[reg_fp]) regno = HARD_FRAME_POINTER_REGNUM; } @@ -5093,6 +5176,13 @@ ia64_override_options (void) init_machine_status = ia64_init_machine_status; } +/* Initialize the record of emitted frame related registers. */ + +void ia64_init_expanders (void) +{ + memset (&emitted_frame_related_regs, 0, sizeof (emitted_frame_related_regs)); +} + static struct machine_function * ia64_init_machine_status (void) { @@ -6650,11 +6740,12 @@ ia64_set_sched_flags (spec_info_t spec_info) mask |= BE_IN_CONTROL; } - gcc_assert (*flags & USE_GLAT); - if (mask) { - *flags |= USE_DEPS_LIST | DETACH_LIFE_INFO | DO_SPECULATION; + *flags |= USE_DEPS_LIST | DO_SPECULATION; + + if (mask & BE_IN_SPEC) + *flags |= NEW_BBS; spec_info->mask = mask; spec_info->flags = 0; @@ -8338,7 +8429,7 @@ emit_predicate_relation_info (void) /* Skip p0, which may be thought to be live due to (reg:DI p0) grabbing the entire block of predicate registers. */ for (r = PR_REG (2); r < PR_REG (64); r += 2) - if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_start, r)) + if (REGNO_REG_SET_P (df_get_live_in (bb), r)) { rtx p = gen_rtx_REG (BImode, r); rtx n = emit_insn_after (gen_pred_rel_mutex (p), head); @@ -8388,13 +8479,9 @@ ia64_reorg (void) /* If optimizing, we'll have split before scheduling. */ if (optimize == 0) - split_all_insns (0); - - /* ??? update_life_info_in_dirty_blocks fails to terminate during - non-optimizing bootstrap. */ - update_life_info (NULL, UPDATE_LIFE_GLOBAL_RM_NOTES, PROP_DEATH_NOTES); + split_all_insns (); - if (optimize && ia64_flag_schedule_insns2) + if (optimize && ia64_flag_schedule_insns2 && dbg_cnt (ia64_sched2)) { timevar_push (TV_SCHED2); ia64_final_schedule = 1; @@ -8469,6 +8556,8 @@ ia64_reorg (void) _1mlx_ = get_cpu_unit_code ("1b_1mlx."); } schedule_ebbs (); + /* We cannot reuse this one because it has been corrupted by the + evil glat. */ finish_bundle_states (); if (ia64_tune == PROCESSOR_ITANIUM) { @@ -8485,6 +8574,8 @@ ia64_reorg (void) else emit_all_insn_group_barriers (dump_file); + df_analyze (); + /* A call must not be the last instruction in a function, so that the return address is still within the function, so that unwinding works properly. Note that IA-64 differs from dwarf2 on this point. */ @@ -8521,6 +8612,7 @@ ia64_reorg (void) variable_tracking_main (); timevar_pop (TV_VAR_TRACKING); } + df_finish_pass (); } /* Return true if REGNO is used by the epilogue. */ @@ -8567,24 +8659,18 @@ ia64_epilogue_uses (int regno) int ia64_eh_uses (int regno) { + enum ia64_frame_regs r; + if (! reload_completed) return 0; - if (current_frame_info.reg_save_b0 - && regno == current_frame_info.reg_save_b0) - return 1; - if (current_frame_info.reg_save_pr - && regno == current_frame_info.reg_save_pr) - return 1; - if (current_frame_info.reg_save_ar_pfs - && regno == current_frame_info.reg_save_ar_pfs) - return 1; - if (current_frame_info.reg_save_ar_unat - && regno == current_frame_info.reg_save_ar_unat) - return 1; - if (current_frame_info.reg_save_ar_lc - && regno == current_frame_info.reg_save_ar_lc) - return 1; + if (regno == 0) + return 0; + + for (r = reg_save_b0; r <= reg_save_ar_lc; r++) + if (regno == current_frame_info.r[r] + || regno == emitted_frame_related_regs[r]) + return 1; return 0; } @@ -8737,7 +8823,7 @@ process_set (FILE *asm_out_file, rtx pat, rtx insn, bool unwind, bool frame) /* If this is the final destination for ar.pfs, then this must be the alloc in the prologue. */ - if (dest_regno == current_frame_info.reg_save_ar_pfs) + if (dest_regno == current_frame_info.r[reg_save_ar_pfs]) { if (unwind) fprintf (asm_out_file, "\t.save ar.pfs, r%d\n", @@ -8802,28 +8888,28 @@ process_set (FILE *asm_out_file, rtx pat, rtx insn, bool unwind, bool frame) { case BR_REG (0): /* Saving return address pointer. */ - gcc_assert (dest_regno == current_frame_info.reg_save_b0); + gcc_assert (dest_regno == current_frame_info.r[reg_save_b0]); if (unwind) fprintf (asm_out_file, "\t.save rp, r%d\n", ia64_dbx_register_number (dest_regno)); return 1; case PR_REG (0): - gcc_assert (dest_regno == current_frame_info.reg_save_pr); + gcc_assert (dest_regno == current_frame_info.r[reg_save_pr]); if (unwind) fprintf (asm_out_file, "\t.save pr, r%d\n", ia64_dbx_register_number (dest_regno)); return 1; case AR_UNAT_REGNUM: - gcc_assert (dest_regno == current_frame_info.reg_save_ar_unat); + gcc_assert (dest_regno == current_frame_info.r[reg_save_ar_unat]); if (unwind) fprintf (asm_out_file, "\t.save ar.unat, r%d\n", ia64_dbx_register_number (dest_regno)); return 1; case AR_LC_REGNUM: - gcc_assert (dest_regno == current_frame_info.reg_save_ar_lc); + gcc_assert (dest_regno == current_frame_info.r[reg_save_ar_lc]); if (unwind) fprintf (asm_out_file, "\t.save ar.lc, r%d\n", ia64_dbx_register_number (dest_regno)); @@ -8880,31 +8966,31 @@ process_set (FILE *asm_out_file, rtx pat, rtx insn, bool unwind, bool frame) switch (src_regno) { case BR_REG (0): - gcc_assert (!current_frame_info.reg_save_b0); + gcc_assert (!current_frame_info.r[reg_save_b0]); if (unwind) fprintf (asm_out_file, "\t%s rp, %ld\n", saveop, off); return 1; case PR_REG (0): - gcc_assert (!current_frame_info.reg_save_pr); + gcc_assert (!current_frame_info.r[reg_save_pr]); if (unwind) fprintf (asm_out_file, "\t%s pr, %ld\n", saveop, off); return 1; case AR_LC_REGNUM: - gcc_assert (!current_frame_info.reg_save_ar_lc); + gcc_assert (!current_frame_info.r[reg_save_ar_lc]); if (unwind) fprintf (asm_out_file, "\t%s ar.lc, %ld\n", saveop, off); return 1; case AR_PFS_REGNUM: - gcc_assert (!current_frame_info.reg_save_ar_pfs); + gcc_assert (!current_frame_info.r[reg_save_ar_pfs]); if (unwind) fprintf (asm_out_file, "\t%s ar.pfs, %ld\n", saveop, off); return 1; case AR_UNAT_REGNUM: - gcc_assert (!current_frame_info.reg_save_ar_unat); + gcc_assert (!current_frame_info.r[reg_save_ar_unat]); if (unwind) fprintf (asm_out_file, "\t%s ar.unat, %ld\n", saveop, off); return 1; diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h index 951fb57a28a..70120ce787f 100644 --- a/gcc/config/ia64/ia64.h +++ b/gcc/config/ia64/ia64.h @@ -1,5 +1,5 @@ /* Definitions of target machine GNU compiler. IA-64 version. - Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by James E. Wilson <wilson@cygnus.com> and David Mosberger <davidm@hpl.hp.com>. @@ -985,6 +985,7 @@ enum reg_class pointer is not 16-byte aligned like the stack pointer. */ #define INIT_EXPANDERS \ do { \ + ia64_init_expanders (); \ if (cfun && cfun->emit->regno_pointer_align) \ REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = 64; \ } while (0) diff --git a/gcc/config/iq2000/iq2000.c b/gcc/config/iq2000/iq2000.c index a86dd40e2da..527046359e3 100644 --- a/gcc/config/iq2000/iq2000.c +++ b/gcc/config/iq2000/iq2000.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on Vitesse IQ2000 processors - Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc. + Copyright (C) 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. This file is part of GCC. @@ -1964,13 +1964,6 @@ iq2000_expand_prologue (void) PUT_CODE (SET_SRC (pattern), ASHIFTRT); insn = emit_insn (pattern); - - /* Global life information isn't valid at this point, so we - can't check whether these shifts are actually used. Mark - them MAYBE_DEAD so that flow2 will remove them, and not - complain about dead code in the prologue. */ - REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX, - REG_NOTES (insn)); } } @@ -2119,7 +2112,7 @@ iq2000_can_use_return_insn (void) if (! reload_completed) return 0; - if (regs_ever_live[31] || profile_flag) + if (df_regs_ever_live_p (31) || profile_flag) return 0; if (cfun->machine->initialized) diff --git a/gcc/config/iq2000/iq2000.h b/gcc/config/iq2000/iq2000.h index 5c61bef7bca..deb3460de24 100644 --- a/gcc/config/iq2000/iq2000.h +++ b/gcc/config/iq2000/iq2000.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. Vitesse IQ2000 processors - Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc. + Copyright (C) 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. This file is part of GCC. @@ -974,9 +974,9 @@ enum processor_type /* Tell prologue and epilogue if register REGNO should be saved / restored. */ #define MUST_SAVE_REGISTER(regno) \ - ((regs_ever_live[regno] && !call_used_regs[regno]) \ + ((df_regs_ever_live_p (regno) && !call_used_regs[regno]) \ || (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed) \ - || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31])) + || (regno == (GP_REG_FIRST + 31) && df_regs_ever_live_p (GP_REG_FIRST + 31))) /* ALIGN FRAMES on double word boundaries */ #ifndef IQ2000_STACK_ALIGN diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c index dd0bce33299..f48b252926e 100644 --- a/gcc/config/m32c/m32c.c +++ b/gcc/config/m32c/m32c.c @@ -1,5 +1,5 @@ /* Target Code for R8C/M16C/M32C - Copyright (C) 2005 + Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Red Hat. @@ -1248,7 +1248,7 @@ need_to_save (int regno) if (cfun->machine->is_interrupt && (!cfun->machine->is_leaf || regno == A0_REGNO)) return 1; - if (regs_ever_live[regno] + if (df_regs_ever_live_p (regno) && (!call_used_regs[regno] || cfun->machine->is_interrupt)) return 1; return 0; diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index 6c9f3e54d62..fa0a6ad9eb0 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -1254,10 +1254,10 @@ static struct m32r_frame_info zero_frame_info; Don't consider them here. */ #define MUST_SAVE_REGISTER(regno, interrupt_p) \ ((regno) != RETURN_ADDR_REGNUM && (regno) != FRAME_POINTER_REGNUM \ - && (regs_ever_live[regno] && (!call_really_used_regs[regno] || interrupt_p))) + && (df_regs_ever_live_p (regno) && (!call_really_used_regs[regno] || interrupt_p))) -#define MUST_SAVE_FRAME_POINTER (regs_ever_live[FRAME_POINTER_REGNUM]) -#define MUST_SAVE_RETURN_ADDR (regs_ever_live[RETURN_ADDR_REGNUM] || current_function_profile) +#define MUST_SAVE_FRAME_POINTER (df_regs_ever_live_p (FRAME_POINTER_REGNUM)) +#define MUST_SAVE_RETURN_ADDR (df_regs_ever_live_p (RETURN_ADDR_REGNUM) || current_function_profile) #define SHORT_INSN_SIZE 2 /* Size of small instructions. */ #define LONG_INSN_SIZE 4 /* Size of long instructions. */ @@ -2449,7 +2449,7 @@ m32r_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED, { /* Interrupt routines can't clobber any register that isn't already used. */ if (lookup_attribute ("interrupt", DECL_ATTRIBUTES (current_function_decl)) - && !regs_ever_live[new_reg]) + && !df_regs_ever_live_p (new_reg)) return 0; return 1; diff --git a/gcc/config/m68hc11/m68hc11.c b/gcc/config/m68hc11/m68hc11.c index 655816e49d6..ca7575858a2 100644 --- a/gcc/config/m68hc11/m68hc11.c +++ b/gcc/config/m68hc11/m68hc11.c @@ -1,5 +1,5 @@ /* Subroutines for code generation on Motorola 68HC11 and 68HC12. - Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005 + Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Stephane Carrez (stcarrez@nerim.fr) @@ -1336,7 +1336,7 @@ m68hc11_initial_elimination_offset (int from, int to) /* Push any 2 byte pseudo hard registers that we need to save. */ for (regno = SOFT_REG_FIRST; regno < SOFT_REG_LAST; regno++) { - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) { size += 2; } @@ -1550,7 +1550,7 @@ m68hc11_total_frame_size (void) size += HARD_REG_SIZE; for (regno = SOFT_REG_FIRST; regno <= SOFT_REG_LAST; regno++) - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) size += HARD_REG_SIZE; return size; @@ -1662,7 +1662,7 @@ expand_prologue (void) /* Push any 2 byte pseudo hard registers that we need to save. */ for (regno = SOFT_REG_FIRST; regno <= SOFT_REG_LAST; regno++) { - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) { emit_move_after_reload (stack_push_word, gen_rtx_REG (HImode, regno), scratch); @@ -1700,7 +1700,7 @@ expand_epilogue (void) /* Pop any 2 byte pseudo hard registers that we saved. */ for (regno = SOFT_REG_LAST; regno >= SOFT_REG_FIRST; regno--) { - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) { emit_move_after_reload (gen_rtx_REG (HImode, regno), stack_pop_word, scratch); diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c index 1ce704258ba..353b84a42f4 100644 --- a/gcc/config/m68k/m68k.c +++ b/gcc/config/m68k/m68k.c @@ -43,6 +43,7 @@ Boston, MA 02110-1301, USA. */ #include "target-def.h" #include "debug.h" #include "flags.h" +#include "df.h" enum reg_class regno_reg_class[] = { @@ -818,7 +819,7 @@ m68k_save_reg (unsigned int regno, bool interrupt_handler) if they are live or when calling nested functions. */ if (interrupt_handler) { - if (regs_ever_live[regno]) + if (df_regs_ever_live_p (regno)) return true; if (!current_function_is_leaf && call_used_regs[regno]) @@ -826,7 +827,7 @@ m68k_save_reg (unsigned int regno, bool interrupt_handler) } /* Never need to save registers that aren't touched. */ - if (!regs_ever_live[regno]) + if (!df_regs_ever_live_p (regno)) return false; /* Otherwise save everything that isn't call-clobbered. */ @@ -1037,12 +1038,7 @@ m68k_expand_prologue (void) if (flag_pic && !TARGET_SEP_DATA && current_function_uses_pic_offset_table) - { - insn = emit_insn (gen_load_got (pic_offset_table_rtx)); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, - const0_rtx, - REG_NOTES (insn)); - } + insn = emit_insn (gen_load_got (pic_offset_table_rtx)); } /* Return true if a simple (return) instruction is sufficient for this @@ -4143,7 +4139,6 @@ m68k_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED, /* Pretend to be a post-reload pass while generating rtl. */ no_new_pseudos = 1; reload_completed = 1; - allocate_reg_info (FIRST_PSEUDO_REGISTER, true, true); /* The "this" pointer is stored at 4(%sp). */ this_slot = gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, 4)); @@ -4198,7 +4193,7 @@ m68k_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED, /* Use the static chain register as a temporary (call-clobbered) GOT pointer for this function. We can use the static chain register because it isn't live on entry to the thunk. */ - REGNO (pic_offset_table_rtx) = STATIC_CHAIN_REGNUM; + SET_REGNO (pic_offset_table_rtx, STATIC_CHAIN_REGNUM); emit_insn (gen_load_got (pic_offset_table_rtx)); } legitimize_pic_address (XEXP (mem, 0), Pmode, static_chain_rtx); @@ -4220,7 +4215,7 @@ m68k_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED, /* Restore the original PIC register. */ if (flag_pic) - REGNO (pic_offset_table_rtx) = PIC_REG; + SET_REGNO (pic_offset_table_rtx, PIC_REG); } /* Worker function for TARGET_STRUCT_VALUE_RTX. */ @@ -4244,7 +4239,7 @@ m68k_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED, if ((m68k_get_function_kind (current_function_decl) == m68k_fk_interrupt_handler) - && !regs_ever_live[new_reg]) + && !df_regs_ever_live_p (new_reg)) return 0; return 1; diff --git a/gcc/config/mcore/mcore.c b/gcc/config/mcore/mcore.c index 44035b22967..e568699eb3a 100644 --- a/gcc/config/mcore/mcore.c +++ b/gcc/config/mcore/mcore.c @@ -267,7 +267,7 @@ calc_live_regs (int * count) for (reg = 0; reg < FIRST_PSEUDO_REGISTER; reg++) { - if (regs_ever_live[reg] && !call_used_regs[reg]) + if (df_regs_ever_live_p (reg) && !call_used_regs[reg]) { (*count)++; live_regs_mask |= (1 << reg); diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 0e860b6d3cc..d84eb9b5595 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -1,6 +1,7 @@ /* Subroutines used for MIPS code generation. Copyright (C) 1989, 1990, 1991, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 + Free Software Foundation, Inc. Contributed by A. Lichnewsky, lich@inria.inria.fr. Changes by Michael Meissner, meissner@osf.org. 64-bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and @@ -6337,7 +6338,7 @@ mips_global_pointer (void) In cases like these, reload will have added the constant to the pool but no instruction will yet refer to it. */ - if (!regs_ever_live[GLOBAL_POINTER_REGNUM] + if (!df_regs_ever_live_p (GLOBAL_POINTER_REGNUM) && !current_function_uses_const_pool && !mips_function_has_gp_insn ()) return 0; @@ -6346,7 +6347,7 @@ mips_global_pointer (void) register instead of $gp. */ if (TARGET_CALL_SAVED_GP && current_function_is_leaf) for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++) - if (!regs_ever_live[regno] + if (!df_regs_ever_live_p (regno) && call_used_regs[regno] && !fixed_regs[regno] && regno != PIC_FUNCTION_ADDR_REGNUM) @@ -6412,15 +6413,15 @@ mips_save_reg_p (unsigned int regno) return TARGET_CALL_SAVED_GP && cfun->machine->global_pointer == regno; /* Check call-saved registers. */ - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) return true; /* Save both registers in an FPR pair if either one is used. This is needed for the case when MIN_FPRS_PER_FMT == 1, which allows the odd register to be used without the even register. */ if (FP_REG_P (regno) - && MAX_FPRS_PER_FMT == 2 - && regs_ever_live[regno + 1] + && MAX_FPRS_PER_FMT == 2 + && df_regs_ever_live_p (regno + 1) && !call_used_regs[regno + 1]) return true; @@ -6430,7 +6431,7 @@ mips_save_reg_p (unsigned int regno) /* We need to save the incoming return address if it is ever clobbered within the function. */ - if (regno == GP_REG_FIRST + 31 && regs_ever_live[regno]) + if (regno == GP_REG_FIRST + 31 && df_regs_ever_live_p (regno)) return true; if (TARGET_MIPS16) @@ -6438,7 +6439,7 @@ mips_save_reg_p (unsigned int regno) /* $18 is a special case in mips16 code. It may be used to call a function which returns a floating point value, but it is marked in call_used_regs. */ - if (regno == GP_REG_FIRST + 18 && regs_ever_live[regno]) + if (regno == GP_REG_FIRST + 18 && df_regs_ever_live_p (regno)) return true; /* $31 is also a special case. It will be used to copy a return @@ -6990,7 +6991,7 @@ mips_expand_prologue (void) HOST_WIDE_INT size; if (cfun->machine->global_pointer > 0) - REGNO (pic_offset_table_rtx) = cfun->machine->global_pointer; + SET_REGNO (pic_offset_table_rtx, cfun->machine->global_pointer); size = compute_frame_size (get_frame_size ()); @@ -7099,7 +7100,7 @@ mips_output_function_epilogue (FILE *file ATTRIBUTE_UNUSED, HOST_WIDE_INT size ATTRIBUTE_UNUSED) { /* Reinstate the normal $gp. */ - REGNO (pic_offset_table_rtx) = GLOBAL_POINTER_REGNUM; + SET_REGNO (pic_offset_table_rtx, GLOBAL_POINTER_REGNUM); mips_output_cplocal (); if (cfun->machine->all_noreorder_p) @@ -7296,7 +7297,7 @@ mips_can_use_return_insn (void) if (! reload_completed) return 0; - if (regs_ever_live[31] || current_function_profile) + if (df_regs_ever_live_p (31) || current_function_profile) return 0; /* In mips16 mode, a function that returns a floating point value @@ -7331,9 +7332,13 @@ mips_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, /* Pick a global pointer. Use a call-clobbered register if TARGET_CALL_SAVED_GP, so that we can use a sibcall. */ if (TARGET_USE_GOT) - cfun->machine->global_pointer - = REGNO (pic_offset_table_rtx) - = TARGET_CALL_SAVED_GP ? 15 : GLOBAL_POINTER_REGNUM; + { + cfun->machine->global_pointer = + TARGET_CALL_SAVED_GP ? 15 : GLOBAL_POINTER_REGNUM; + + SET_REGNO (pic_offset_table_rtx, cfun->machine->global_pointer); + + } /* Set up the global pointer for n32 or n64 abicalls. If LOADGP_ABSOLUTE then the thunk does not use the gp and there is @@ -8387,7 +8392,7 @@ build_mips16_call_stub (rtx retval, rtx fn, rtx arg_size, int fp_code) /* If we are handling a floating point return value, we need to save $18 in the function prologue. Putting a note on the - call will mean that regs_ever_live[$18] will be true if the + call will mean that df_regs_ever_live_p ($18) will be true if the call is not eliminated, and we can check that in the prologue code. */ if (fpret) diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index de592b9adc7..b89f5f9852a 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -1,6 +1,7 @@ ;; Mips.md Machine Description for MIPS based processors ;; Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, -;; 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. +;; 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 +;; Free Software Foundation, Inc. ;; Contributed by A. Lichnewsky, lich@inria.inria.fr ;; Changes by Michael Meissner, meissner@osf.org ;; 64-bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and @@ -3094,7 +3095,7 @@ (high:DI (match_operand:DI 1 "general_symbolic_operand" "")))] "TARGET_EXPLICIT_RELOCS && ABI_HAS_64BIT_SYMBOLS" "#" - "&& flow2_completed" + "&& epilogue_completed" [(set (match_dup 0) (high:DI (match_dup 2))) (set (match_dup 0) (lo_sum:DI (match_dup 0) (match_dup 2))) (set (match_dup 0) (ashift:DI (match_dup 0) (const_int 16))) diff --git a/gcc/config/mmix/mmix.c b/gcc/config/mmix/mmix.c index b57ed7aefa6..8a23c02910c 100644 --- a/gcc/config/mmix/mmix.c +++ b/gcc/config/mmix/mmix.c @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for MMIX. - Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005 + Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Hans-Peter Nilsson (hp@bitrange.com) @@ -56,7 +56,7 @@ Boston, MA 02110-1301, USA. */ /* We have no means to tell DWARF 2 about the register stack, so we need to store the return address on the stack if an exception can get into this function. FIXME: Narrow condition. Before any whole-function - analysis, regs_ever_live[] isn't initialized. We know it's up-to-date + analysis, df_regs_ever_live_p () isn't initialized. We know it's up-to-date after reload_completed; it may contain incorrect information some time before that. Within a RTL sequence (after a call to start_sequence, such as in RTL expanders), leaf_function_p doesn't see all insns @@ -66,7 +66,7 @@ Boston, MA 02110-1301, USA. */ preferable. */ #define MMIX_CFUN_NEEDS_SAVED_EH_RETURN_ADDRESS \ (flag_exceptions \ - && ((reload_completed && regs_ever_live[MMIX_rJ_REGNUM]) \ + && ((reload_completed && df_regs_ever_live_p (MMIX_rJ_REGNUM)) \ || !leaf_function_p ())) #define IS_MMIX_EH_RETURN_DATA_REG(REGNO) \ @@ -547,7 +547,7 @@ mmix_initial_elimination_offset (int fromreg, int toreg) for (regno = MMIX_FIRST_GLOBAL_REGNUM; regno <= 255; regno++) - if ((regs_ever_live[regno] && ! call_used_regs[regno]) + if ((df_regs_ever_live_p (regno) && ! call_used_regs[regno]) || IS_MMIX_EH_RETURN_DATA_REG (regno)) fp_sp_offset += 8; @@ -765,7 +765,7 @@ mmix_reorg (void) for (regno = MMIX_LAST_STACK_REGISTER_REGNUM; regno >= 0; regno--) - if ((regs_ever_live[regno] && !call_used_regs[regno]) + if ((df_regs_ever_live_p (regno) && !call_used_regs[regno]) || (regno == MMIX_FRAME_POINTER_REGNUM && frame_pointer_needed)) break; @@ -774,7 +774,7 @@ mmix_reorg (void) insns to see whether they're actually used (and indeed do other less trivial register usage analysis and transformations), but it seems wasteful to optimize for unused parameter registers. As of - 2002-04-30, regs_ever_live[n] seems to be set for only-reads too, but + 2002-04-30, df_regs_ever_live_p (n) seems to be set for only-reads too, but that might change. */ if (!TARGET_ABI_GNU && regno < current_function_args_info.regs - 1) { @@ -1836,7 +1836,7 @@ mmix_use_simple_return (void) /* Note that we assume that the frame-pointer-register is one of these registers, in which case we don't count it here. */ if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) - && regs_ever_live[regno] && !call_used_regs[regno])) + && df_regs_ever_live_p (regno) && !call_used_regs[regno])) || IS_MMIX_EH_RETURN_DATA_REG (regno)) return 0; @@ -1872,7 +1872,7 @@ mmix_expand_prologue (void) /* Note that we assume that the frame-pointer-register is one of these registers, in which case we don't count it here. */ if ((((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) - && regs_ever_live[regno] && !call_used_regs[regno])) + && df_regs_ever_live_p (regno) && !call_used_regs[regno])) || IS_MMIX_EH_RETURN_DATA_REG (regno)) stack_space_to_allocate += 8; @@ -2057,7 +2057,7 @@ mmix_expand_prologue (void) regno >= MMIX_FIRST_GLOBAL_REGNUM; regno--) if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) - && regs_ever_live[regno] && ! call_used_regs[regno]) + && df_regs_ever_live_p (regno) && ! call_used_regs[regno]) || IS_MMIX_EH_RETURN_DATA_REG (regno)) { rtx insn; @@ -2109,7 +2109,7 @@ mmix_expand_epilogue (void) regno >= MMIX_FIRST_GLOBAL_REGNUM; regno--) if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) - && regs_ever_live[regno] && !call_used_regs[regno]) + && df_regs_ever_live_p (regno) && !call_used_regs[regno]) || IS_MMIX_EH_RETURN_DATA_REG (regno)) stack_space_to_deallocate += 8; @@ -2138,7 +2138,7 @@ mmix_expand_epilogue (void) regno <= 255; regno++) if (((regno != MMIX_FRAME_POINTER_REGNUM || !frame_pointer_needed) - && regs_ever_live[regno] && !call_used_regs[regno]) + && df_regs_ever_live_p (regno) && !call_used_regs[regno]) || IS_MMIX_EH_RETURN_DATA_REG (regno)) { if (offset > 255) diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c index d7b79244589..8c93f4162c1 100644 --- a/gcc/config/mn10300/mn10300.c +++ b/gcc/config/mn10300/mn10300.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for Matsushita MN10300 series - Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 - Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, + 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Jeff Law (law@cygnus.com). This file is part of GCC. @@ -60,12 +60,12 @@ enum processor_type mn10300_processor = PROCESSOR_DEFAULT; /* The size of the callee register save area. Right now we save everything on entry since it costs us nothing in code size. It does cost us from a speed standpoint, so we want to optimize this sooner or later. */ -#define REG_SAVE_BYTES (4 * regs_ever_live[2] \ - + 4 * regs_ever_live[3] \ - + 4 * regs_ever_live[6] \ - + 4 * regs_ever_live[7] \ - + 16 * (regs_ever_live[14] || regs_ever_live[15] \ - || regs_ever_live[16] || regs_ever_live[17])) +#define REG_SAVE_BYTES (4 * df_regs_ever_live_p (2) \ + + 4 * df_regs_ever_live_p (3) \ + + 4 * df_regs_ever_live_p (6) \ + + 4 * df_regs_ever_live_p (7) \ + + 16 * (df_regs_ever_live_p (14) || df_regs_ever_live_p (15) \ + || df_regs_ever_live_p (16) || df_regs_ever_live_p (17))) static bool mn10300_handle_option (size_t, const char *, int); @@ -537,7 +537,7 @@ fp_regs_to_save (void) return 0; for (i = FIRST_FP_REGNUM; i <= LAST_FP_REGNUM; ++i) - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) ++n; return n; @@ -590,14 +590,14 @@ can_use_return_insn (void) return (reload_completed && size == 0 - && !regs_ever_live[2] - && !regs_ever_live[3] - && !regs_ever_live[6] - && !regs_ever_live[7] - && !regs_ever_live[14] - && !regs_ever_live[15] - && !regs_ever_live[16] - && !regs_ever_live[17] + && !df_regs_ever_live_p (2) + && !df_regs_ever_live_p (3) + && !df_regs_ever_live_p (6) + && !df_regs_ever_live_p (7) + && !df_regs_ever_live_p (14) + && !df_regs_ever_live_p (15) + && !df_regs_ever_live_p (16) + && !df_regs_ever_live_p (17) && fp_regs_to_save () == 0 && !frame_pointer_needed); } @@ -614,7 +614,7 @@ mn10300_get_live_callee_saved_regs (void) mask = 0; for (i = 0; i <= LAST_EXTENDED_REGNUM; i++) - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) mask |= (1 << i); if ((mask & 0x3c000) != 0) mask |= 0x3c000; @@ -907,7 +907,7 @@ expand_prologue (void) /* Now actually save the FP registers. */ for (i = FIRST_FP_REGNUM; i <= LAST_FP_REGNUM; ++i) - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) { rtx addr; @@ -944,24 +944,8 @@ expand_prologue (void) emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, GEN_INT (-size))); - if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) - { - rtx insn = get_last_insn (); - rtx last = emit_insn (gen_GOTaddr2picreg ()); - - /* Mark these insns as possibly dead. Sometimes, flow2 may - delete all uses of the PIC register. In this case, let it - delete the initialization too. */ - do - { - insn = NEXT_INSN (insn); - - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, - const0_rtx, - REG_NOTES (insn)); - } - while (insn != last); - } + if (flag_pic && df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM)) + emit_insn (gen_GOTaddr2picreg ()); } void @@ -1127,7 +1111,7 @@ expand_epilogue (void) reg = gen_rtx_POST_INC (SImode, reg); for (i = FIRST_FP_REGNUM; i <= LAST_FP_REGNUM; ++i) - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) { rtx addr; @@ -1189,10 +1173,10 @@ expand_epilogue (void) } /* Adjust the stack and restore callee-saved registers, if any. */ - if (size || regs_ever_live[2] || regs_ever_live[3] - || regs_ever_live[6] || regs_ever_live[7] - || regs_ever_live[14] || regs_ever_live[15] - || regs_ever_live[16] || regs_ever_live[17] + if (size || df_regs_ever_live_p (2) || df_regs_ever_live_p (3) + || df_regs_ever_live_p (6) || df_regs_ever_live_p (7) + || df_regs_ever_live_p (14) || df_regs_ever_live_p (15) + || df_regs_ever_live_p (16) || df_regs_ever_live_p (17) || frame_pointer_needed) emit_jump_insn (gen_return_internal_regs (GEN_INT (size + REG_SAVE_BYTES))); @@ -1401,10 +1385,10 @@ initial_offset (int from, int to) is the size of the callee register save area. */ if (from == ARG_POINTER_REGNUM && to == FRAME_POINTER_REGNUM) { - if (regs_ever_live[2] || regs_ever_live[3] - || regs_ever_live[6] || regs_ever_live[7] - || regs_ever_live[14] || regs_ever_live[15] - || regs_ever_live[16] || regs_ever_live[17] + if (df_regs_ever_live_p (2) || df_regs_ever_live_p (3) + || df_regs_ever_live_p (6) || df_regs_ever_live_p (7) + || df_regs_ever_live_p (14) || df_regs_ever_live_p (15) + || df_regs_ever_live_p (16) || df_regs_ever_live_p (17) || fp_regs_to_save () || frame_pointer_needed) return REG_SAVE_BYTES @@ -1418,10 +1402,10 @@ initial_offset (int from, int to) area, and the fixed stack space needed for function calls (if any). */ if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM) { - if (regs_ever_live[2] || regs_ever_live[3] - || regs_ever_live[6] || regs_ever_live[7] - || regs_ever_live[14] || regs_ever_live[15] - || regs_ever_live[16] || regs_ever_live[17] + if (df_regs_ever_live_p (2) || df_regs_ever_live_p (3) + || df_regs_ever_live_p (6) || df_regs_ever_live_p (7) + || df_regs_ever_live_p (14) || df_regs_ever_live_p (15) + || df_regs_ever_live_p (16) || df_regs_ever_live_p (17) || fp_regs_to_save () || frame_pointer_needed) return (get_frame_size () + REG_SAVE_BYTES diff --git a/gcc/config/mt/mt.c b/gcc/config/mt/mt.c index df5d8f286b2..a0e5567e4bc 100644 --- a/gcc/config/mt/mt.c +++ b/gcc/config/mt/mt.c @@ -1,5 +1,5 @@ /* Target definitions for the MorphoRISC1 - Copyright (C) 2005 Free Software Foundation, Inc. + Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Red Hat, Inc. This file is part of GCC. @@ -353,7 +353,7 @@ mt_print_operand_simple_address (FILE * file, rtx addr) switch (GET_CODE (addr)) { case REG: - fprintf (file, "%s, #0", reg_names [REGNO (addr)]); + fprintf (file, "%s, #0", reg_names[REGNO (addr)]); break; case PLUS: @@ -375,11 +375,11 @@ mt_print_operand_simple_address (FILE * file, rtx addr) reg = arg1, offset = arg0; else if (CONSTANT_P (arg0) && CONSTANT_P (arg1)) { - fprintf (file, "%s, #", reg_names [GPR_R0]); + fprintf (file, "%s, #", reg_names[GPR_R0]); output_addr_const (file, addr); break; } - fprintf (file, "%s, #", reg_names [REGNO (reg)]); + fprintf (file, "%s, #", reg_names[REGNO (reg)]); output_addr_const (file, offset); break; } @@ -457,7 +457,7 @@ mt_print_operand (FILE * file, rtx x, int code) switch (GET_CODE (x)) { case REG: - fputs (reg_names [REGNO (x)], file); + fputs (reg_names[REGNO (x)], file); break; case CONST: @@ -884,10 +884,10 @@ mt_compute_frame_size (int size) } } - current_frame_info.save_fp = (regs_ever_live [GPR_FP] + current_frame_info.save_fp = (df_regs_ever_live_p (GPR_FP) || frame_pointer_needed || interrupt_handler); - current_frame_info.save_lr = (regs_ever_live [GPR_LINK] + current_frame_info.save_lr = (df_regs_ever_live_p (GPR_LINK) || profile_flag || interrupt_handler); diff --git a/gcc/config/mt/mt.h b/gcc/config/mt/mt.h index a4afb3c3051..88abec753ae 100644 --- a/gcc/config/mt/mt.h +++ b/gcc/config/mt/mt.h @@ -1,5 +1,5 @@ /* Target Definitions for MorphoRISC1 - Copyright (C) 2005 Free Software Foundation, Inc. + Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Red Hat, Inc. This file is part of GCC. @@ -414,11 +414,11 @@ enum save_direction && (regno) != GPR_FP \ && (regno) != GPR_SP \ && (regno) != GPR_R0 \ - && (( regs_ever_live [regno] && ! call_used_regs [regno] ) \ + && (( df_regs_ever_live_p (regno) && ! call_used_regs[regno] ) \ /* Save ira register in an interrupt handler. */ \ || (interrupt_handler && (regno) == GPR_INTERRUPT_LINK) \ /* Save any register used in an interrupt handler. */ \ - || (interrupt_handler && regs_ever_live [regno]) \ + || (interrupt_handler && df_regs_ever_live_p (regno)) \ /* Save call clobbered registers in non-leaf interrupt \ handlers. */ \ || (interrupt_handler && call_used_regs[regno] \ diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index f0a894a91ff..01eb9c325ee 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for HPPA. Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, - 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. + 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Tim Moore (moore@cs.utah.edu), based on sparc.c This file is part of GCC. @@ -3491,13 +3491,13 @@ compute_frame_size (HOST_WIDE_INT size, int *fregs_live) /* Account for space used by the callee general register saves. */ for (i = 18, j = frame_pointer_needed ? 4 : 3; i >= j; i--) - if (regs_ever_live[i]) + if (df_regs_ever_live_p (i)) size += UNITS_PER_WORD; /* Account for space used by the callee floating point register saves. */ for (i = FP_SAVED_REG_LAST; i >= FP_SAVED_REG_FIRST; i -= FP_REG_STEP) - if (regs_ever_live[i] - || (!TARGET_64BIT && regs_ever_live[i + 1])) + if (df_regs_ever_live_p (i) + || (!TARGET_64BIT && df_regs_ever_live_p (i + 1))) { freg_saved = 1; @@ -3562,7 +3562,7 @@ pa_output_function_prologue (FILE *file, HOST_WIDE_INT size ATTRIBUTE_UNUSED) to output the assembler directives which denote the start of a function. */ fprintf (file, "\t.CALLINFO FRAME=" HOST_WIDE_INT_PRINT_DEC, actual_fsize); - if (regs_ever_live[2]) + if (df_regs_ever_live_p (2)) fputs (",CALLS,SAVE_RP", file); else fputs (",NO_CALLS", file); @@ -3626,7 +3626,7 @@ hppa_expand_prologue (void) /* Save RP first. The calling conventions manual states RP will always be stored into the caller's frame at sp - 20 or sp - 16 depending on which ABI is in use. */ - if (regs_ever_live[2] || current_function_calls_eh_return) + if (df_regs_ever_live_p (2) || current_function_calls_eh_return) store_reg (2, TARGET_64BIT ? -16 : -20, STACK_POINTER_REGNUM); /* Allocate the local frame and set up the frame pointer if needed. */ @@ -3737,7 +3737,7 @@ hppa_expand_prologue (void) } for (i = 18; i >= 4; i--) - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) { store_reg (i, offset, FRAME_POINTER_REGNUM); offset += UNITS_PER_WORD; @@ -3777,7 +3777,7 @@ hppa_expand_prologue (void) } for (i = 18; i >= 3; i--) - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) { /* If merge_sp_adjust_with_store is nonzero, then we can optimize the first GR save. */ @@ -3840,8 +3840,8 @@ hppa_expand_prologue (void) /* Now actually save the FP registers. */ for (i = FP_SAVED_REG_LAST; i >= FP_SAVED_REG_FIRST; i -= FP_REG_STEP) { - if (regs_ever_live[i] - || (! TARGET_64BIT && regs_ever_live[i + 1])) + if (df_regs_ever_live_p (i) + || (! TARGET_64BIT && df_regs_ever_live_p (i + 1))) { rtx addr, insn, reg; addr = gen_rtx_MEM (DFmode, gen_rtx_POST_INC (DFmode, tmpreg)); @@ -4029,7 +4029,7 @@ hppa_expand_epilogue (void) /* Try to restore RP early to avoid load/use interlocks when RP gets used in the return (bv) instruction. This appears to still be necessary even when we schedule the prologue and epilogue. */ - if (regs_ever_live [2] || current_function_calls_eh_return) + if (df_regs_ever_live_p (2) || current_function_calls_eh_return) { ret_off = TARGET_64BIT ? -16 : -20; if (frame_pointer_needed) @@ -4071,7 +4071,7 @@ hppa_expand_epilogue (void) } for (i = 18; i >= 4; i--) - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) { load_reg (i, offset, FRAME_POINTER_REGNUM); offset += UNITS_PER_WORD; @@ -4108,7 +4108,7 @@ hppa_expand_epilogue (void) for (i = 18; i >= 3; i--) { - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) { /* Only for the first load. merge_sp_adjust_with_load holds the register load @@ -4138,8 +4138,8 @@ hppa_expand_epilogue (void) /* Actually do the restores now. */ for (i = FP_SAVED_REG_LAST; i >= FP_SAVED_REG_FIRST; i -= FP_REG_STEP) - if (regs_ever_live[i] - || (! TARGET_64BIT && regs_ever_live[i + 1])) + if (df_regs_ever_live_p (i) + || (! TARGET_64BIT && df_regs_ever_live_p (i + 1))) { rtx src = gen_rtx_MEM (DFmode, gen_rtx_POST_INC (DFmode, tmpreg)); rtx dest = gen_rtx_REG (DFmode, i); @@ -4414,7 +4414,7 @@ hppa_can_use_return_insn_p (void) { return (reload_completed && (compute_frame_size (get_frame_size (), 0) ? 0 : 1) - && ! regs_ever_live[2] + && ! df_regs_ever_live_p (2) && ! frame_pointer_needed); } @@ -6256,7 +6256,7 @@ output_lbranch (rtx dest, rtx insn, int xdelay) for other purposes. */ if (TARGET_64BIT) { - if (actual_fsize == 0 && !regs_ever_live[2]) + if (actual_fsize == 0 && !df_regs_ever_live_p (2)) /* Use the return pointer slot in the frame marker. */ output_asm_insn ("std %%r1,-16(%%r30)", xoperands); else @@ -6266,7 +6266,7 @@ output_lbranch (rtx dest, rtx insn, int xdelay) } else { - if (actual_fsize == 0 && !regs_ever_live[2]) + if (actual_fsize == 0 && !df_regs_ever_live_p (2)) /* Use the return pointer slot in the frame marker. */ output_asm_insn ("stw %%r1,-20(%%r30)", xoperands); else @@ -6310,14 +6310,14 @@ output_lbranch (rtx dest, rtx insn, int xdelay) /* Now restore the value of %r1 in the delay slot. */ if (TARGET_64BIT) { - if (actual_fsize == 0 && !regs_ever_live[2]) + if (actual_fsize == 0 && !df_regs_ever_live_p (2)) return "ldd -16(%%r30),%%r1"; else return "ldd -40(%%r30),%%r1"; } else { - if (actual_fsize == 0 && !regs_ever_live[2]) + if (actual_fsize == 0 && !df_regs_ever_live_p (2)) return "ldw -20(%%r30),%%r1"; else return "ldw -12(%%r30),%%r1"; diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index d4e31c7df8b..b95dd8a0c37 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, for the HP Spectrum. Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, - 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. + 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for Software Science at the University of Utah. @@ -372,7 +372,7 @@ typedef struct machine_function GTY(()) is already live or already being saved (due to eh). */ #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ - ((NEW_REG) != 2 || regs_ever_live[2] || current_function_calls_eh_return) + ((NEW_REG) != 2 || df_regs_ever_live_p (2) || current_function_calls_eh_return) /* C statement to store the difference between the frame pointer and the stack pointer values immediately after the function prologue. diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c index 92320593d99..d61e45e918a 100644 --- a/gcc/config/pdp11/pdp11.c +++ b/gcc/config/pdp11/pdp11.c @@ -1,6 +1,6 @@ /* Subroutines for gcc2 for pdp11. - Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2001, 2004, 2005 - Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2001, 2004, 2005, + 2006, 2007 Free Software Foundation, Inc. Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). This file is part of GCC. @@ -291,7 +291,7 @@ pdp11_output_function_prologue (FILE *stream, HOST_WIDE_INT size) /* save CPU registers */ for (regno = 0; regno < 8; regno++) - if (regs_ever_live[regno] && ! call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) if (! ((regno == FRAME_POINTER_REGNUM) && frame_pointer_needed)) fprintf (stream, "\tmov %s, -(sp)\n", reg_names[regno]); @@ -304,7 +304,7 @@ pdp11_output_function_prologue (FILE *stream, HOST_WIDE_INT size) { /* ac0 - ac3 */ if (LOAD_FPU_REG_P(regno) - && regs_ever_live[regno] + && df_regs_ever_live_p (regno) && ! call_used_regs[regno]) { fprintf (stream, "\tstd %s, -(sp)\n", reg_names[regno]); @@ -314,7 +314,7 @@ pdp11_output_function_prologue (FILE *stream, HOST_WIDE_INT size) /* maybe make ac4, ac5 call used regs?? */ /* ac4 - ac5 */ if (NO_LOAD_FPU_REG_P(regno) - && regs_ever_live[regno] + && df_regs_ever_live_p (regno) && ! call_used_regs[regno]) { gcc_assert (via_ac != -1); @@ -373,10 +373,10 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size) if (frame_pointer_needed) { /* hope this is safe - m68k does it also .... */ - regs_ever_live[FRAME_POINTER_REGNUM] = 0; + df_regs_ever_live_p (FRAME_POINTER_REGNUM) = 0; for (i =7, j = 0 ; i >= 0 ; i--) - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) j++; /* remember # of pushed bytes for CPU regs */ @@ -384,14 +384,14 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size) /* change fp -> r5 due to the compile error on libgcc2.c */ for (i =7 ; i >= 0 ; i--) - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) fprintf(stream, "\tmov %#o(r5), %s\n",(-fsize-2*j--)&0xffff, reg_names[i]); /* get ACs */ via_ac = FIRST_PSEUDO_REGISTER -1; for (i = FIRST_PSEUDO_REGISTER; i > 7; i--) - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) { via_ac = i; k += 8; @@ -400,7 +400,7 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size) for (i = FIRST_PSEUDO_REGISTER; i > 7; i--) { if (LOAD_FPU_REG_P(i) - && regs_ever_live[i] + && df_regs_ever_live_p (i) && ! call_used_regs[i]) { fprintf(stream, "\tldd %#o(r5), %s\n", (-fsize-k)&0xffff, reg_names[i]); @@ -408,7 +408,7 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size) } if (NO_LOAD_FPU_REG_P(i) - && regs_ever_live[i] + && df_regs_ever_live_p (i) && ! call_used_regs[i]) { gcc_assert (LOAD_FPU_REG_P(via_ac)); @@ -428,18 +428,18 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size) /* get ACs */ for (i = FIRST_PSEUDO_REGISTER; i > 7; i--) - if (regs_ever_live[i] && call_used_regs[i]) + if (df_regs_ever_live_p (i) && call_used_regs[i]) via_ac = i; for (i = FIRST_PSEUDO_REGISTER; i > 7; i--) { if (LOAD_FPU_REG_P(i) - && regs_ever_live[i] + && df_regs_ever_live_p (i) && ! call_used_regs[i]) fprintf(stream, "\tldd (sp)+, %s\n", reg_names[i]); if (NO_LOAD_FPU_REG_P(i) - && regs_ever_live[i] + && df_regs_ever_live_p (i) && ! call_used_regs[i]) { gcc_assert (LOAD_FPU_REG_P(via_ac)); @@ -450,7 +450,7 @@ pdp11_output_function_epilogue (FILE *stream, HOST_WIDE_INT size) } for (i=7; i >= 0; i--) - if (regs_ever_live[i] && !call_used_regs[i]) + if (df_regs_ever_live_p (i) && !call_used_regs[i]) fprintf(stream, "\tmov (sp)+, %s\n", reg_names[i]); if (fsize) diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h index a018914db4b..4fa2a29b4f0 100644 --- a/gcc/config/pdp11/pdp11.h +++ b/gcc/config/pdp11/pdp11.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, for the pdp-11 - Copyright (C) 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2004, 2005 - Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2004, 2005, + 2006, 2007 Free Software Foundation, Inc. Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). This file is part of GCC. @@ -566,10 +566,10 @@ extern int may_call_alloca; int offset, regno; \ offset = get_frame_size(); \ for (regno = 0; regno < 8; regno++) \ - if (regs_ever_live[regno] && ! call_used_regs[regno]) \ + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \ offset += 2; \ for (regno = 8; regno < 14; regno++) \ - if (regs_ever_live[regno] && ! call_used_regs[regno]) \ + if (df_regs_ever_live_p (regno) && ! call_used_regs[regno]) \ offset += 8; \ /* offset -= 2; no fp on stack frame */ \ (DEPTH_VAR) = offset; \ diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 6aefe2dd0c9..5f4b233cef9 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -1,5 +1,5 @@ ;; Predicate definitions for POWER and PowerPC. -;; Copyright (C) 2005, 2006 Free Software Foundation, Inc. +;; Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc. ;; ;; This file is part of GCC. ;; @@ -640,8 +640,8 @@ (match_operand 0 "reg_or_mem_operand"))) ;; Return 1 if the operand is a general register or memory operand without -;; pre_inc or pre_dec, which produces invalid form of PowerPC lwa -;; instruction. +;; pre_inc or pre_dec or pre_modify, which produces invalid form of PowerPC +;; lwa instruction. (define_predicate "lwa_operand" (match_code "reg,subreg,mem") { @@ -654,6 +654,8 @@ || (memory_operand (inner, mode) && GET_CODE (XEXP (inner, 0)) != PRE_INC && GET_CODE (XEXP (inner, 0)) != PRE_DEC + && (GET_CODE (XEXP (inner, 0)) != PRE_MODIFY + || legitimate_indexed_address_p (XEXP (XEXP (inner, 0), 1), 0)) && (GET_CODE (XEXP (inner, 0)) != PLUS || GET_CODE (XEXP (XEXP (inner, 0), 1)) != CONST_INT || INTVAL (XEXP (XEXP (inner, 0), 1)) % 4 == 0)); diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 9ef454c4499..b821b01145b 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -42,6 +42,7 @@ extern bool invalid_e500_subreg (rtx, enum machine_mode); extern void validate_condition_mode (enum rtx_code, enum machine_mode); extern bool legitimate_constant_pool_address_p (rtx); extern bool legitimate_indirect_address_p (rtx, int); +extern bool legitimate_indexed_address_p (rtx, int); extern rtx rs6000_got_register (rtx); extern rtx find_addr_reg (rtx); diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 67b7c86cda9..910dae7398f 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -616,7 +616,6 @@ struct processor_costs power6_cost = { static bool rs6000_function_ok_for_sibcall (tree, tree); static const char *rs6000_invalid_within_doloop (rtx); static rtx rs6000_generate_compare (enum rtx_code); -static void rs6000_maybe_dead (rtx); static void rs6000_emit_stack_tie (void); static void rs6000_frame_related (rtx, rtx, HOST_WIDE_INT, rtx, rtx); static rtx spe_synthesize_frame_save (rtx); @@ -631,7 +630,6 @@ static int toc_hash_eq (const void *, const void *); static int constant_pool_expr_1 (rtx, int *, int *); static bool constant_pool_expr_p (rtx); static bool legitimate_small_data_p (enum machine_mode, rtx); -static bool legitimate_indexed_address_p (rtx, int); static bool legitimate_lo_sum_address_p (enum machine_mode, rtx, int); static struct machine_function * rs6000_init_machine_status (void); static bool rs6000_assemble_integer (rtx, unsigned int, int); @@ -3098,7 +3096,7 @@ rs6000_legitimate_offset_address_p (enum machine_mode mode, rtx x, int strict) return (offset < 0x10000) && (offset + extra < 0x10000); } -static bool +bool legitimate_indexed_address_p (rtx x, int strict) { rtx op0, op1; @@ -3459,10 +3457,7 @@ rs6000_legitimize_tls_address (rtx addr, enum tls_model model) emit_insn (gen_addsi3 (tmp3, tmp1, tmp2)); last = emit_move_insn (got, tmp3); set_unique_reg_note (last, REG_EQUAL, gsym); - REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last, - REG_NOTES (first)); - REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first, - REG_NOTES (last)); + maybe_encapsulate_block (first, last, gsym); } } } @@ -3832,6 +3827,24 @@ rs6000_legitimate_address (enum machine_mode mode, rtx x, int reg_ok_strict) && (TARGET_POWERPC64 || mode != DImode) && legitimate_indexed_address_p (x, reg_ok_strict)) return 1; + if (GET_CODE (x) == PRE_MODIFY + && mode != TImode + && mode != TFmode + && mode != TDmode + && ((TARGET_HARD_FLOAT && TARGET_FPRS) + || TARGET_POWERPC64 + || ((mode != DFmode || TARGET_E500_DOUBLE) && mode != TFmode)) + && (TARGET_POWERPC64 || mode != DImode) + && !ALTIVEC_VECTOR_MODE (mode) + && !SPE_VECTOR_MODE (mode) + /* Restrict addressing for DI because of our SUBREG hackery. */ + && !(TARGET_E500_DOUBLE && (mode == DFmode || mode == DImode)) + && TARGET_UPDATE + && legitimate_indirect_address_p (XEXP (x, 0), reg_ok_strict) + && (rs6000_legitimate_offset_address_p (mode, XEXP (x, 1), reg_ok_strict) + || legitimate_indexed_address_p (XEXP (x, 1), reg_ok_strict)) + && rtx_equal_p (XEXP (XEXP (x, 1), 0), XEXP (x, 0))) + return 1; if (legitimate_lo_sum_address_p (mode, x, reg_ok_strict)) return 1; return 0; @@ -3864,7 +3877,10 @@ rs6000_mode_dependent_address (rtx addr) case LO_SUM: return true; - /* Auto-increment cases are now treated generically in recog.c. */ + case PRE_INC: + case PRE_DEC: + case PRE_MODIFY: + return TARGET_UPDATE; default: break; @@ -10465,8 +10481,8 @@ rs6000_got_register (rtx value ATTRIBUTE_UNUSED) /* The second flow pass currently (June 1999) can't update regs_ever_live without disturbing other parts of the compiler, so update it here to make the prolog/epilogue code happy. */ - if (no_new_pseudos && ! regs_ever_live[RS6000_PIC_OFFSET_TABLE_REGNUM]) - regs_ever_live[RS6000_PIC_OFFSET_TABLE_REGNUM] = 1; + if (no_new_pseudos && ! df_regs_ever_live_p (RS6000_PIC_OFFSET_TABLE_REGNUM)) + df_set_regs_ever_live (RS6000_PIC_OFFSET_TABLE_REGNUM, true); current_function_uses_pic_offset_table = 1; @@ -10833,6 +10849,9 @@ print_operand (FILE *file, rtx x, int code) || GET_CODE (XEXP (x, 0)) == PRE_DEC) output_address (plus_constant (XEXP (XEXP (x, 0), 0), UNITS_PER_WORD)); + else if (GET_CODE (XEXP (x, 0)) == PRE_MODIFY) + output_address (plus_constant (XEXP (XEXP (x, 0), 0), + UNITS_PER_WORD)); else output_address (XEXP (adjust_address_nv (x, SImode, UNITS_PER_WORD), @@ -11033,7 +11052,8 @@ print_operand (FILE *file, rtx x, int code) /* Print `u' if this has an auto-increment or auto-decrement. */ if (GET_CODE (x) == MEM && (GET_CODE (XEXP (x, 0)) == PRE_INC - || GET_CODE (XEXP (x, 0)) == PRE_DEC)) + || GET_CODE (XEXP (x, 0)) == PRE_DEC + || GET_CODE (XEXP (x, 0)) == PRE_MODIFY)) putc ('u', file); return; @@ -11120,7 +11140,9 @@ print_operand (FILE *file, rtx x, int code) case 'X': if (GET_CODE (x) == MEM - && legitimate_indexed_address_p (XEXP (x, 0), 0)) + && (legitimate_indexed_address_p (XEXP (x, 0), 0) + || (GET_CODE (XEXP (x, 0)) == PRE_MODIFY + && legitimate_indexed_address_p (XEXP (XEXP (x, 0), 1), 0)))) putc ('x', file); return; @@ -11133,6 +11155,8 @@ print_operand (FILE *file, rtx x, int code) if (GET_CODE (XEXP (x, 0)) == PRE_INC || GET_CODE (XEXP (x, 0)) == PRE_DEC) output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); + else if (GET_CODE (XEXP (x, 0)) == PRE_MODIFY) + output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); else output_address (XEXP (adjust_address_nv (x, SImode, 8), 0)); if (small_data_operand (x, GET_MODE (x))) @@ -11180,6 +11204,8 @@ print_operand (FILE *file, rtx x, int code) if (GET_CODE (XEXP (x, 0)) == PRE_INC || GET_CODE (XEXP (x, 0)) == PRE_DEC) output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); + else if (GET_CODE (XEXP (x, 0)) == PRE_MODIFY) + output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); else output_address (XEXP (adjust_address_nv (x, SImode, 12), 0)); if (small_data_operand (x, GET_MODE (x))) @@ -11260,6 +11286,8 @@ print_operand (FILE *file, rtx x, int code) else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) fprintf (file, "%d(%s)", - GET_MODE_SIZE (GET_MODE (x)), reg_names[REGNO (XEXP (XEXP (x, 0), 0))]); + else if (GET_CODE (XEXP (x, 0)) == PRE_MODIFY) + output_address (XEXP (XEXP (x, 0), 1)); else output_address (XEXP (x, 0)); } @@ -13120,7 +13148,7 @@ first_reg_to_save (void) /* Find lowest numbered live register. */ for (first_reg = 13; first_reg <= 31; first_reg++) - if (regs_ever_live[first_reg] + if (df_regs_ever_live_p (first_reg) && (! call_used_regs[first_reg] || (first_reg == RS6000_PIC_OFFSET_TABLE_REGNUM && ((DEFAULT_ABI == ABI_V4 && flag_pic != 0) @@ -13147,7 +13175,7 @@ first_fp_reg_to_save (void) /* Find lowest numbered live register. */ for (first_reg = 14 + 32; first_reg <= 63; first_reg++) - if (regs_ever_live[first_reg]) + if (df_regs_ever_live_p (first_reg)) break; return first_reg; @@ -13173,7 +13201,7 @@ first_altivec_reg_to_save (void) /* Find lowest numbered live register. */ for (i = FIRST_ALTIVEC_REGNO + 20; i <= LAST_ALTIVEC_REGNO; ++i) - if (regs_ever_live[i]) + if (df_regs_ever_live_p (i)) break; return i; @@ -13197,7 +13225,7 @@ compute_vrsave_mask (void) /* First, find out if we use _any_ altivec registers. */ for (i = FIRST_ALTIVEC_REGNO; i <= LAST_ALTIVEC_REGNO; ++i) - if (regs_ever_live[i]) + if (df_regs_ever_live_p (i)) mask |= ALTIVEC_REG_BIT (i); if (mask == 0) @@ -13458,13 +13486,13 @@ rs6000_stack_info (void) || rs6000_ra_ever_killed ()) { info_ptr->lr_save_p = 1; - regs_ever_live[LINK_REGISTER_REGNUM] = 1; + df_set_regs_ever_live (LINK_REGISTER_REGNUM, true); } /* Determine if we need to save the condition code registers. */ - if (regs_ever_live[CR2_REGNO] - || regs_ever_live[CR3_REGNO] - || regs_ever_live[CR4_REGNO]) + if (df_regs_ever_live_p (CR2_REGNO) + || df_regs_ever_live_p (CR3_REGNO) + || df_regs_ever_live_p (CR4_REGNO)) { info_ptr->cr_save_p = 1; if (DEFAULT_ABI == ABI_V4) @@ -13988,15 +14016,6 @@ rs6000_ra_ever_killed (void) return 0; } -/* Add a REG_MAYBE_DEAD note to the insn. */ -static void -rs6000_maybe_dead (rtx insn) -{ - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, - const0_rtx, - REG_NOTES (insn)); -} - /* Emit instructions needed to load the TOC register. This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is a constant pool; or for SVR4 -fpic. */ @@ -14004,7 +14023,7 @@ rs6000_maybe_dead (rtx insn) void rs6000_emit_load_toc_table (int fromprolog) { - rtx dest, insn; + rtx dest; dest = gen_rtx_REG (Pmode, RS6000_PIC_OFFSET_TABLE_REGNUM); if (TARGET_ELF && TARGET_SECURE_PLT && DEFAULT_ABI != ABI_AIX && flag_pic) @@ -14024,29 +14043,16 @@ rs6000_emit_load_toc_table (int fromprolog) tmp1 = gen_reg_rtx (Pmode); tmp2 = gen_reg_rtx (Pmode); } - insn = emit_insn (gen_load_toc_v4_PIC_1 (lab)); - if (fromprolog) - rs6000_maybe_dead (insn); - insn = emit_move_insn (tmp1, + emit_insn (gen_load_toc_v4_PIC_1 (lab)); + emit_move_insn (tmp1, gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)); - if (fromprolog) - rs6000_maybe_dead (insn); - insn = emit_insn (gen_load_toc_v4_PIC_3b (tmp2, tmp1, got, lab)); - if (fromprolog) - rs6000_maybe_dead (insn); - insn = emit_insn (gen_load_toc_v4_PIC_3c (dest, tmp2, got, lab)); - if (fromprolog) - rs6000_maybe_dead (insn); + emit_insn (gen_load_toc_v4_PIC_3b (tmp2, tmp1, got, lab)); + emit_insn (gen_load_toc_v4_PIC_3c (dest, tmp2, got, lab)); } else if (TARGET_ELF && DEFAULT_ABI == ABI_V4 && flag_pic == 1) { - insn = emit_insn (gen_load_toc_v4_pic_si ()); - if (fromprolog) - rs6000_maybe_dead (insn); - insn = emit_move_insn (dest, - gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)); - if (fromprolog) - rs6000_maybe_dead (insn); + emit_insn (gen_load_toc_v4_pic_si ()); + emit_move_insn (dest, gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)); } else if (TARGET_ELF && DEFAULT_ABI != ABI_AIX && flag_pic == 2) { @@ -14065,13 +14071,10 @@ rs6000_emit_load_toc_table (int fromprolog) ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno); symL = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf)); - rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_1 (symF))); - rs6000_maybe_dead (emit_move_insn (dest, - gen_rtx_REG (Pmode, - LINK_REGISTER_REGNUM))); - rs6000_maybe_dead (emit_insn (gen_load_toc_v4_PIC_2 (temp0, dest, - symL, - symF))); + emit_insn (gen_load_toc_v4_PIC_1 (symF)); + emit_move_insn (dest, + gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)); + emit_insn (gen_load_toc_v4_PIC_2 (temp0, dest, symL, symF)); } else { @@ -14083,9 +14086,7 @@ rs6000_emit_load_toc_table (int fromprolog) gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM)); emit_move_insn (temp0, gen_rtx_MEM (Pmode, dest)); } - insn = emit_insn (gen_addsi3 (dest, temp0, dest)); - if (fromprolog) - rs6000_maybe_dead (insn); + emit_insn (gen_addsi3 (dest, temp0, dest)); } else if (TARGET_ELF && !TARGET_AIX && flag_pic == 0 && TARGET_MINIMAL_TOC) { @@ -14095,23 +14096,17 @@ rs6000_emit_load_toc_table (int fromprolog) ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); realsym = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (buf)); - insn = emit_insn (gen_elf_high (dest, realsym)); - if (fromprolog) - rs6000_maybe_dead (insn); - insn = emit_insn (gen_elf_low (dest, dest, realsym)); - if (fromprolog) - rs6000_maybe_dead (insn); + emit_insn (gen_elf_high (dest, realsym)); + emit_insn (gen_elf_low (dest, dest, realsym)); } else { gcc_assert (DEFAULT_ABI == ABI_AIX); if (TARGET_32BIT) - insn = emit_insn (gen_load_toc_aix_si (dest)); + emit_insn (gen_load_toc_aix_si (dest)); else - insn = emit_insn (gen_load_toc_aix_di (dest)); - if (fromprolog) - rs6000_maybe_dead (insn); + emit_insn (gen_load_toc_aix_di (dest)); } } @@ -14198,7 +14193,7 @@ rtx create_TOC_reference (rtx symbol) { if (no_new_pseudos) - regs_ever_live[TOC_REGISTER] = 1; + df_set_regs_ever_live (TOC_REGISTER, true); return gen_rtx_PLUS (Pmode, gen_rtx_REG (Pmode, TOC_REGISTER), gen_rtx_CONST (Pmode, @@ -14641,7 +14636,7 @@ no_global_regs_above (int first_greg) static bool rs6000_reg_live_or_pic_offset_p (int reg) { - return ((regs_ever_live[reg] + return ((df_regs_ever_live_p (reg) && (!call_used_regs[reg] || (reg == RS6000_PIC_OFFSET_TABLE_REGNUM && TARGET_TOC && TARGET_MINIMAL_TOC))) @@ -14881,7 +14876,7 @@ rs6000_emit_prologue (void) { int i; for (i = 0; i < 64 - info->first_fp_reg_save; i++) - if ((regs_ever_live[info->first_fp_reg_save+i] + if ((df_regs_ever_live_p (info->first_fp_reg_save+i) && ! call_used_regs[info->first_fp_reg_save+i])) emit_frame_save (frame_reg_rtx, frame_ptr_rtx, DFmode, info->first_fp_reg_save + i, @@ -14952,7 +14947,7 @@ rs6000_emit_prologue (void) int i; rtx spe_save_area_ptr; int using_static_chain_p = (cfun->static_chain_decl != NULL_TREE - && regs_ever_live[STATIC_CHAIN_REGNUM] + && df_regs_ever_live_p (STATIC_CHAIN_REGNUM) && !call_used_regs[STATIC_CHAIN_REGNUM]); /* Determine whether we can address all of the registers that need @@ -15206,7 +15201,7 @@ rs6000_emit_prologue (void) if ((TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) || (DEFAULT_ABI == ABI_V4 && (flag_pic == 1 || (flag_pic && TARGET_SECURE_PLT)) - && regs_ever_live[RS6000_PIC_OFFSET_TABLE_REGNUM])) + && df_regs_ever_live_p (RS6000_PIC_OFFSET_TABLE_REGNUM))) { /* If emit_load_toc_table will use the link register, we need to save it. We use R12 for this purpose because emit_load_toc_table @@ -15222,13 +15217,11 @@ rs6000_emit_prologue (void) rtx lr = gen_rtx_REG (Pmode, LINK_REGISTER_REGNUM); insn = emit_move_insn (frame_ptr_rtx, lr); - rs6000_maybe_dead (insn); RTX_FRAME_RELATED_P (insn) = 1; rs6000_emit_load_toc_table (TRUE); insn = emit_move_insn (lr, frame_ptr_rtx); - rs6000_maybe_dead (insn); RTX_FRAME_RELATED_P (insn) = 1; } else @@ -15244,17 +15237,16 @@ rs6000_emit_prologue (void) /* Save and restore LR locally around this call (in R0). */ if (!info->lr_save_p) - rs6000_maybe_dead (emit_move_insn (gen_rtx_REG (Pmode, 0), lr)); + emit_move_insn (gen_rtx_REG (Pmode, 0), lr); - rs6000_maybe_dead (emit_insn (gen_load_macho_picbase (src))); + emit_insn (gen_load_macho_picbase (src)); - insn = emit_move_insn (gen_rtx_REG (Pmode, - RS6000_PIC_OFFSET_TABLE_REGNUM), - lr); - rs6000_maybe_dead (insn); + emit_move_insn (gen_rtx_REG (Pmode, + RS6000_PIC_OFFSET_TABLE_REGNUM), + lr); if (!info->lr_save_p) - rs6000_maybe_dead (emit_move_insn (lr, gen_rtx_REG (Pmode, 0))); + emit_move_insn (lr, gen_rtx_REG (Pmode, 0)); } #endif } @@ -15673,7 +15665,7 @@ rs6000_emit_epilogue (int sibcall) /* Restore fpr's if we need to do it without calling a function. */ if (restoring_FPRs_inline) for (i = 0; i < 64 - info->first_fp_reg_save; i++) - if ((regs_ever_live[info->first_fp_reg_save+i] + if ((df_regs_ever_live_p (info->first_fp_reg_save+i) && ! call_used_regs[info->first_fp_reg_save+i])) { rtx addr, mem; @@ -15697,7 +15689,7 @@ rs6000_emit_epilogue (int sibcall) if (using_mtcr_multiple) { for (i = 0; i < 8; i++) - if (regs_ever_live[CR0_REGNO+i] && ! call_used_regs[CR0_REGNO+i]) + if (df_regs_ever_live_p (CR0_REGNO+i) && ! call_used_regs[CR0_REGNO+i]) count++; gcc_assert (count); } @@ -15711,7 +15703,7 @@ rs6000_emit_epilogue (int sibcall) ndx = 0; for (i = 0; i < 8; i++) - if (regs_ever_live[CR0_REGNO+i] && ! call_used_regs[CR0_REGNO+i]) + if (df_regs_ever_live_p (CR0_REGNO+i) && ! call_used_regs[CR0_REGNO+i]) { rtvec r = rtvec_alloc (2); RTVEC_ELT (r, 0) = r12_rtx; @@ -15726,7 +15718,7 @@ rs6000_emit_epilogue (int sibcall) } else for (i = 0; i < 8; i++) - if (regs_ever_live[CR0_REGNO+i] && ! call_used_regs[CR0_REGNO+i]) + if (df_regs_ever_live_p (CR0_REGNO+i) && ! call_used_regs[CR0_REGNO+i]) { emit_insn (gen_movsi_to_cr_one (gen_rtx_REG (CCmode, CR0_REGNO+i), diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 509cd6efb10..5082665af6e 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -888,7 +888,7 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops; emitted the vrsave mask. */ #define HARD_REGNO_RENAME_OK(SRC, DST) \ - (! ALTIVEC_REGNO_P (DST) || regs_ever_live[DST]) + (! ALTIVEC_REGNO_P (DST) || df_regs_ever_live_p (DST)) /* A C expression returning the cost of moving data from a register of class CLASS1 to one of CLASS2. */ @@ -1598,6 +1598,8 @@ typedef struct rs6000_args #define HAVE_PRE_DECREMENT 1 #define HAVE_PRE_INCREMENT 1 +#define HAVE_PRE_MODIFY_DISP 1 +#define HAVE_PRE_MODIFY_REG 1 /* Macros to check register numbers against specific register classes. */ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 477f12e429b..e44570512af 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -8364,7 +8364,8 @@ || (GET_CODE (operands[1]) == MEM && (GET_CODE (XEXP (operands[1], 0)) == LO_SUM || GET_CODE (XEXP (operands[1], 0)) == PRE_INC - || GET_CODE (XEXP (operands[1], 0)) == PRE_DEC))) + || GET_CODE (XEXP (operands[1], 0)) == PRE_DEC + || GET_CODE (XEXP (operands[1], 0)) == PRE_MODIFY))) { /* If the low-address word is used in the address, we must load it last. Otherwise, load it first. Note that we cannot have @@ -8374,7 +8375,7 @@ operands[1], 0)) return \"{l|lwz} %L0,%L1\;{l|lwz} %0,%1\"; else - return \"{l%U1|lwz%U1} %0,%1\;{l|lwz} %L0,%L1\"; + return \"{l%U1%X1|lwz%U1%X1} %0,%1\;{l|lwz} %L0,%L1\"; } else { @@ -8404,8 +8405,9 @@ || (GET_CODE (operands[0]) == MEM && (GET_CODE (XEXP (operands[0], 0)) == LO_SUM || GET_CODE (XEXP (operands[0], 0)) == PRE_INC - || GET_CODE (XEXP (operands[0], 0)) == PRE_DEC))) - return \"{st%U0|stw%U0} %1,%0\;{st|stw} %L1,%L0\"; + || GET_CODE (XEXP (operands[0], 0)) == PRE_DEC + || GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY))) + return \"{st%U0%X0|stw%U0%X0} %1,%0\;{st|stw} %L1,%L0\"; else { rtx addreg; @@ -8461,9 +8463,9 @@ operands[1], 0)) return \"{l|lwz} %L0,%L1\;{l|lwz} %0,%1\"; else - return \"{l%U1|lwz%U1} %0,%1\;{l|lwz} %L0,%L1\"; + return \"{l%U1%X1|lwz%U1%X1} %0,%1\;{l|lwz} %L0,%L1\"; case 2: - return \"{st%U0|stw%U0} %1,%0\;{st|stw} %L1,%L0\"; + return \"{st%U0%X0|stw%U0%X0} %1,%0\;{st|stw} %L1,%L0\"; case 3: case 4: case 5: diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index ced302a5ba8..a6524fc58b7 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -1,6 +1,6 @@ /* Subroutines used for code generation on IBM S/390 and zSeries - Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 - Free Software Foundation, Inc. + Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, + 2007 Free Software Foundation, Inc. Contributed by Hartmut Penner (hpenner@de.ibm.com) and Ulrich Weigand (uweigand@de.ibm.com). @@ -51,6 +51,7 @@ Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA #include "langhooks.h" #include "optabs.h" #include "tree-gimple.h" +#include "df.h" /* Define the specific costs for a given cpu. */ @@ -2890,7 +2891,7 @@ legitimize_pic_address (rtx orig, rtx reg) rtx temp = reg? reg : gen_reg_rtx (Pmode); if (reload_in_progress || reload_completed) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF); addr = gen_rtx_CONST (Pmode, addr); @@ -2916,7 +2917,7 @@ legitimize_pic_address (rtx orig, rtx reg) in both 31- and 64-bit code (@GOT). */ if (reload_in_progress || reload_completed) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT); new = gen_rtx_CONST (Pmode, new); @@ -2948,7 +2949,7 @@ legitimize_pic_address (rtx orig, rtx reg) rtx temp = gen_reg_rtx (Pmode); if (reload_in_progress || reload_completed) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT); addr = gen_rtx_CONST (Pmode, addr); @@ -2996,7 +2997,7 @@ legitimize_pic_address (rtx orig, rtx reg) rtx temp = reg? reg : gen_reg_rtx (Pmode); if (reload_in_progress || reload_completed) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); addr = XVECEXP (addr, 0, 0); addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), @@ -3076,7 +3077,7 @@ legitimize_pic_address (rtx orig, rtx reg) rtx temp = reg? reg : gen_reg_rtx (Pmode); if (reload_in_progress || reload_completed) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0), UNSPEC_GOTOFF); @@ -3244,7 +3245,7 @@ legitimize_tls_address (rtx addr, rtx reg) in both 31- and 64-bit code. */ if (reload_in_progress || reload_completed) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF); new = gen_rtx_CONST (Pmode, new); @@ -3273,7 +3274,7 @@ legitimize_tls_address (rtx addr, rtx reg) from the literal pool. */ if (reload_in_progress || reload_completed) - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF); new = gen_rtx_CONST (Pmode, new); @@ -6325,7 +6326,7 @@ find_unused_clobbered_reg (void) { int i; for (i = 0; i < 6; i++) - if (!regs_ever_live[i]) + if (!df_regs_ever_live_p (i)) return i; return 0; } @@ -6391,7 +6392,7 @@ s390_regs_ever_clobbered (int *regs_ever_clobbered) for (i = 0; EH_RETURN_DATA_REGNO (i) != INVALID_REGNUM ; i++) if (current_function_calls_eh_return || (cfun->machine->has_landing_pad_p - && regs_ever_live [EH_RETURN_DATA_REGNO (i)])) + && df_regs_ever_live_p (EH_RETURN_DATA_REGNO (i)))) regs_ever_clobbered[EH_RETURN_DATA_REGNO (i)] = 1; /* For nonlocal gotos all call-saved registers have to be saved. @@ -6470,7 +6471,7 @@ s390_register_info (int clobbered_regs[]) cfun_frame_layout.high_fprs = 0; if (TARGET_64BIT) for (i = 24; i < 32; i++) - if (regs_ever_live[i] && !global_regs[i]) + if (df_regs_ever_live_p (i) && !global_regs[i]) { cfun_set_fpr_bit (i - 16); cfun_frame_layout.high_fprs++; @@ -6492,7 +6493,7 @@ s390_register_info (int clobbered_regs[]) if (flag_pic) clobbered_regs[PIC_OFFSET_TABLE_REGNUM] - |= regs_ever_live[PIC_OFFSET_TABLE_REGNUM]; + |= df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM); clobbered_regs[BASE_REGNUM] |= (cfun->machine->base_reg @@ -6515,10 +6516,10 @@ s390_register_info (int clobbered_regs[]) || current_function_stdarg); for (i = 6; i < 16; i++) - if (regs_ever_live[i] || clobbered_regs[i]) + if (df_regs_ever_live_p (i) || clobbered_regs[i]) break; for (j = 15; j > i; j--) - if (regs_ever_live[j] || clobbered_regs[j]) + if (df_regs_ever_live_p (j) || clobbered_regs[j]) break; if (i == 16) @@ -6612,7 +6613,7 @@ s390_register_info (int clobbered_regs[]) if (!TARGET_64BIT) for (i = 2; i < 4; i++) - if (regs_ever_live[i + 16] && !global_regs[i + 16]) + if (df_regs_ever_live_p (i + 16) && !global_regs[i + 16]) cfun_set_fpr_bit (i); } @@ -6758,7 +6759,7 @@ s390_init_frame_layout (void) as base register to avoid save/restore overhead. */ if (!base_used) cfun->machine->base_reg = NULL_RTX; - else if (current_function_is_leaf && !regs_ever_live[5]) + else if (current_function_is_leaf && !df_regs_ever_live_p (5)) cfun->machine->base_reg = gen_rtx_REG (Pmode, 5); else cfun->machine->base_reg = gen_rtx_REG (Pmode, BASE_REGNUM); @@ -6781,12 +6782,15 @@ s390_update_frame_layout (void) s390_register_info (clobbered_regs); - regs_ever_live[BASE_REGNUM] = clobbered_regs[BASE_REGNUM]; - regs_ever_live[RETURN_REGNUM] = clobbered_regs[RETURN_REGNUM]; - regs_ever_live[STACK_POINTER_REGNUM] = clobbered_regs[STACK_POINTER_REGNUM]; + df_set_regs_ever_live (BASE_REGNUM, + clobbered_regs[BASE_REGNUM] ? true : false); + df_set_regs_ever_live (RETURN_REGNUM, + clobbered_regs[RETURN_REGNUM] ? true : false); + df_set_regs_ever_live (STACK_POINTER_REGNUM, + clobbered_regs[STACK_POINTER_REGNUM] ? true : false); if (cfun->machine->base_reg) - regs_ever_live[REGNO (cfun->machine->base_reg)] = 1; + df_set_regs_ever_live (REGNO (cfun->machine->base_reg), true); } /* Return true if it is legal to put a value with MODE into REGNO. */ @@ -7169,7 +7173,10 @@ s390_emit_prologue (void) for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) if (INSN_P (insn)) - annotate_constant_pool_refs (&PATTERN (insn)); + { + annotate_constant_pool_refs (&PATTERN (insn)); + df_insn_rescan (insn); + } pop_topmost_sequence (); @@ -7407,17 +7414,12 @@ s390_emit_prologue (void) /* Set up got pointer, if needed. */ - if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) + if (flag_pic && df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM)) { rtx insns = s390_load_got (); for (insn = insns; insn; insn = NEXT_INSN (insn)) - { - annotate_constant_pool_refs (&PATTERN (insn)); - - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX, - REG_NOTES (insn)); - } + annotate_constant_pool_refs (&PATTERN (insn)); emit_insn (insns); } diff --git a/gcc/config/score/score-mdaux.c b/gcc/config/score/score-mdaux.c index e8d1478ed19..cb77082e0d3 100644 --- a/gcc/config/score/score-mdaux.c +++ b/gcc/config/score/score-mdaux.c @@ -1,5 +1,5 @@ /* score-mdaux.c for Sunplus S+CORE processor - Copyright (C) 2005 Free Software Foundation, Inc. + Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Sunnorth This file is part of GCC. @@ -126,7 +126,7 @@ static int score_save_reg_p (unsigned int regno) { /* Check call-saved registers. */ - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) return 1; /* We need to save the old frame pointer before setting up a new one. */ @@ -135,7 +135,7 @@ score_save_reg_p (unsigned int regno) /* We need to save the incoming return address if it is ever clobbered within the function. */ - if (regno == RA_REGNUM && regs_ever_live[regno]) + if (regno == RA_REGNUM && df_regs_ever_live_p (regno)) return 1; return 0; diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index d8825d05ce6..4ca2d5c1a81 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -1,6 +1,6 @@ /* Output routines for GCC for Renesas / SuperH SH. Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, - 2003, 2004, 2005, 2006 Free Software Foundation, Inc. + 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Steve Chamberlain (sac@cygnus.com). Improved by Jim Wilson (wilson@cygnus.com). @@ -47,6 +47,7 @@ Boston, MA 02110-1301, USA. */ #include "real.h" #include "langhooks.h" #include "basic-block.h" +#include "df.h" #include "cfglayout.h" #include "intl.h" #include "sched-int.h" @@ -88,6 +89,9 @@ static short *regmode_weight[2]; /* Total SFmode and SImode weights of scheduled insns. */ static int curr_regmode_pressure[2]; +/* Number of r0 life regions. */ +static int r0_life_regions; + /* If true, skip cycles for Q -> R movement. */ static int skip_cycles = 0; @@ -195,6 +199,7 @@ static int sh_dfa_new_cycle (FILE *, int, rtx, int, int, int *sort_p); static short find_set_regmode_weight (rtx, enum machine_mode); static short find_insn_regmode_weight (rtx, enum machine_mode); static void find_regmode_weight (basic_block, enum machine_mode); +static int find_r0_life_regions (basic_block); static void sh_md_init_global (FILE *, int, int); static void sh_md_finish_global (FILE *, int); static int rank_for_reorder (const void *, const void *); @@ -4757,51 +4762,25 @@ sh_reorg (void) if (GET_CODE (reg) != REG) continue; - /* This is a function call via REG. If the only uses of REG - between the time that it is set and the time that it dies - are in function calls, then we can associate all the - function calls with the setting of REG. */ - - for (link = LOG_LINKS (insn); link; link = XEXP (link, 1)) - { - rtx linked_insn; - - if (REG_NOTE_KIND (link) != 0) - continue; - linked_insn = XEXP (link, 0); - set = single_set (linked_insn); - if (set - && rtx_equal_p (reg, SET_DEST (set)) - && ! INSN_DELETED_P (linked_insn)) - { - link = linked_insn; - break; - } - } - - if (! link) + /* Try scanning backward to find where the register is set. */ + link = NULL; + for (scan = PREV_INSN (insn); + scan && GET_CODE (scan) != CODE_LABEL; + scan = PREV_INSN (scan)) { - /* ??? Sometimes global register allocation will have - deleted the insn pointed to by LOG_LINKS. Try - scanning backward to find where the register is set. */ - for (scan = PREV_INSN (insn); - scan && GET_CODE (scan) != CODE_LABEL; - scan = PREV_INSN (scan)) - { - if (! INSN_P (scan)) - continue; + if (! INSN_P (scan)) + continue; - if (! reg_mentioned_p (reg, scan)) - continue; + if (! reg_mentioned_p (reg, scan)) + continue; - if (noncall_uses_reg (reg, scan, &set)) - break; + if (noncall_uses_reg (reg, scan, &set)) + break; - if (set) - { - link = scan; - break; - } + if (set) + { + link = scan; + break; } } @@ -4833,7 +4812,7 @@ sh_reorg (void) /* Don't try to trace forward past a CODE_LABEL if we haven't seen INSN yet. Ordinarily, we will only find the setting insn - in LOG_LINKS if it is in the same basic block. However, + if it is in the same basic block. However, cross-jumping can insert code labels in between the load and the call, and can result in situations where a single call insn may have two targets depending on where we came from. */ @@ -4880,11 +4859,8 @@ sh_reorg (void) later insn. */ /* ??? We shouldn't have to use FOUNDINSN here. - However, the LOG_LINKS fields are apparently not - entirely reliable around libcalls; - newlib/libm/math/e_pow.c is a test case. Sometimes - an insn will appear in LOG_LINKS even though it is - not the most recent insn which sets the register. */ + This dates back to when we used LOG_LINKS to find + the most recent insn which sets the register. */ if (foundinsn && (scanset @@ -5849,12 +5825,12 @@ calc_live_regs (HARD_REG_SET *live_regs_mask) CLEAR_HARD_REG_SET (*live_regs_mask); if ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && TARGET_FMOVD && interrupt_handler - && regs_ever_live[FPSCR_REG]) + && df_regs_ever_live_p (FPSCR_REG)) target_flags &= ~MASK_FPU_SINGLE; /* If we can save a lot of saves by switching to double mode, do that. */ else if ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && TARGET_FMOVD && TARGET_FPU_SINGLE) for (count = 0, reg = FIRST_FP_REG; reg <= LAST_FP_REG; reg += 2) - if (regs_ever_live[reg] && regs_ever_live[reg+1] + if (df_regs_ever_live_p (reg) && df_regs_ever_live_p (reg+1) && (! call_really_used_regs[reg] || interrupt_handler) && ++count > 2) @@ -5876,11 +5852,11 @@ calc_live_regs (HARD_REG_SET *live_regs_mask) pr_live = (pr_initial ? (GET_CODE (pr_initial) != REG || REGNO (pr_initial) != (PR_REG)) - : regs_ever_live[PR_REG]); + : df_regs_ever_live_p (PR_REG)); /* For Shcompact, if not optimizing, we end up with a memory reference using the return address pointer for __builtin_return_address even though there is no actual need to put the PR register on the stack. */ - pr_live |= regs_ever_live[RETURN_ADDRESS_POINTER_REGNUM]; + pr_live |= df_regs_ever_live_p (RETURN_ADDRESS_POINTER_REGNUM); } /* Force PR to be live if the prologue has to call the SHmedia argument decoder or register saver. */ @@ -5896,7 +5872,7 @@ calc_live_regs (HARD_REG_SET *live_regs_mask) ? pr_live : interrupt_handler ? (/* Need to save all the regs ever live. */ - (regs_ever_live[reg] + (df_regs_ever_live_p (reg) || (call_really_used_regs[reg] && (! fixed_regs[reg] || reg == MACH_REG || reg == MACL_REG || reg == PIC_OFFSET_TABLE_REGNUM) @@ -5914,7 +5890,7 @@ calc_live_regs (HARD_REG_SET *live_regs_mask) && flag_pic && current_function_args_info.call_cookie && reg == PIC_OFFSET_TABLE_REGNUM) - || (regs_ever_live[reg] + || (df_regs_ever_live_p (reg) && (!call_really_used_regs[reg] || (trapa_handler && reg == FPSCR_REG && TARGET_FPU_ANY))) || (current_function_calls_eh_return @@ -5923,7 +5899,7 @@ calc_live_regs (HARD_REG_SET *live_regs_mask) || reg == EH_RETURN_DATA_REGNO (2) || reg == EH_RETURN_DATA_REGNO (3))) || ((reg == MACL_REG || reg == MACH_REG) - && regs_ever_live[reg] + && df_regs_ever_live_p (reg) && sh_cfun_attr_renesas_p ()) )) { @@ -5935,7 +5911,7 @@ calc_live_regs (HARD_REG_SET *live_regs_mask) { if (FP_REGISTER_P (reg)) { - if (! TARGET_FPU_SINGLE && ! regs_ever_live[reg ^ 1]) + if (! TARGET_FPU_SINGLE && ! df_regs_ever_live_p (reg ^ 1)) { SET_HARD_REG_BIT (*live_regs_mask, (reg ^ 1)); count += GET_MODE_SIZE (REGISTER_NATURAL_MODE (reg ^ 1)); @@ -6012,10 +5988,10 @@ sh_media_register_for_return (void) if (sh_cfun_interrupt_handler_p ()) return -1; - tr0_used = flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM]; + tr0_used = flag_pic && df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM); for (regno = FIRST_TARGET_REG + tr0_used; regno <= LAST_TARGET_REG; regno++) - if (call_really_used_regs[regno] && ! regs_ever_live[regno]) + if (call_really_used_regs[regno] && ! df_regs_ever_live_p (regno)) return regno; return -1; @@ -6174,7 +6150,7 @@ sh_expand_prologue (void) incoming-argument decoder and/or of the return trampoline from the GOT, so make sure the PIC register is preserved and initialized. */ - regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; + df_set_regs_ever_live (PIC_OFFSET_TABLE_REGNUM, true); if (TARGET_SHCOMPACT && (current_function_args_info.call_cookie & ~ CALL_COOKIE_RET_TRAMP(1))) @@ -6207,19 +6183,8 @@ sh_expand_prologue (void) int tr = sh_media_register_for_return (); if (tr >= 0) - { - rtx insn = emit_move_insn (gen_rtx_REG (DImode, tr), - gen_rtx_REG (DImode, PR_MEDIA_REG)); - - /* ??? We should suppress saving pr when we don't need it, but this - is tricky because of builtin_return_address. */ - - /* If this function only exits with sibcalls, this copy - will be flagged as dead. */ - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, - const0_rtx, - REG_NOTES (insn)); - } + emit_move_insn (gen_rtx_REG (DImode, tr), + gen_rtx_REG (DImode, PR_MEDIA_REG)); } /* Emit the code for SETUP_VARARGS. */ @@ -6467,24 +6432,8 @@ sh_expand_prologue (void) else push_regs (&live_regs_mask, current_function_interrupt); - if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) - { - rtx insn = get_last_insn (); - rtx last = emit_insn (gen_GOTaddr2picreg ()); - - /* Mark these insns as possibly dead. Sometimes, flow2 may - delete all uses of the PIC register. In this case, let it - delete the initialization too. */ - do - { - insn = NEXT_INSN (insn); - - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, - const0_rtx, - REG_NOTES (insn)); - } - while (insn != last); - } + if (flag_pic && df_regs_ever_live_p (PIC_OFFSET_TABLE_REGNUM)) + emit_insn (gen_GOTaddr2picreg ()); if (SHMEDIA_REGS_STACK_ADJUST ()) { @@ -6499,16 +6448,7 @@ sh_expand_prologue (void) } if (target_flags != save_flags && ! current_function_interrupt) - { - rtx insn = emit_insn (gen_toggle_sz ()); - - /* If we're lucky, a mode switch in the function body will - overwrite fpscr, turning this insn dead. Tell flow this - insn is ok to delete. */ - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, - const0_rtx, - REG_NOTES (insn)); - } + emit_insn (gen_toggle_sz ()); target_flags = save_flags; @@ -6729,11 +6669,6 @@ sh_expand_epilogue (bool sibcall_p) } insn = emit_move_insn (reg_rtx, mem_rtx); - if (reg == PR_MEDIA_REG && sh_media_register_for_return () >= 0) - /* This is dead, unless we return with a sibcall. */ - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, - const0_rtx, - REG_NOTES (insn)); } gcc_assert (entry->offset + offset_base == d + d_rounding); @@ -6742,7 +6677,11 @@ sh_expand_epilogue (bool sibcall_p) { save_size = 0; if (TEST_HARD_REG_BIT (live_regs_mask, PR_REG)) - pop (PR_REG); + { + if (!frame_pointer_needed) + emit_insn (gen_blockage ()); + pop (PR_REG); + } for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) { int j = (FIRST_PSEUDO_REGISTER - 1) - i; @@ -8799,7 +8738,7 @@ sh_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED, saved by the prologue, even if they would normally be call-clobbered. */ - if (sh_cfun_interrupt_handler_p () && !regs_ever_live[new_reg]) + if (sh_cfun_interrupt_handler_p () && !df_regs_ever_live_p (new_reg)) return 0; return 1; @@ -9039,7 +8978,7 @@ flow_dependent_p_1 (rtx x, rtx pat ATTRIBUTE_UNUSED, void *data) static int sh_pr_n_sets (void) { - return REG_N_SETS (TARGET_SHMEDIA ? PR_MEDIA_REG : PR_REG); + return DF_REG_DEF_COUNT (TARGET_SHMEDIA ? PR_MEDIA_REG : PR_REG); } /* Return where to allocate pseudo for a given hard register initial @@ -9206,6 +9145,56 @@ ready_reorder (rtx *ready, int nready) SCHED_REORDER (ready, nready); } +/* Count life regions of r0 for a block. */ +static int +find_r0_life_regions (basic_block b) +{ + rtx end, insn; + rtx pset; + rtx r0_reg; + int live; + int set; + int death = 0; + + if (REGNO_REG_SET_P (DF_LIVE_IN (b), R0_REG)) + { + set = 1; + live = 1; + } + else + { + set = 0; + live = 0; + } + + insn = BB_HEAD (b); + end = BB_END (b); + r0_reg = gen_rtx_REG (SImode, R0_REG); + while (1) + { + if (INSN_P (insn)) + { + if (find_regno_note (insn, REG_DEAD, R0_REG)) + { + death++; + live = 0; + } + if (!live + && (pset = single_set (insn)) + && reg_overlap_mentioned_p (r0_reg, SET_DEST (pset)) + && !find_regno_note (insn, REG_UNUSED, R0_REG)) + { + set++; + live = 1; + } + } + if (insn == end) + break; + insn = NEXT_INSN (insn); + } + return set - death; +} + /* Calculate regmode weights for all insns of all basic block. */ static void sh_md_init_global (FILE *dump ATTRIBUTE_UNUSED, @@ -9216,11 +9205,14 @@ sh_md_init_global (FILE *dump ATTRIBUTE_UNUSED, regmode_weight[0] = (short *) xcalloc (old_max_uid, sizeof (short)); regmode_weight[1] = (short *) xcalloc (old_max_uid, sizeof (short)); + r0_life_regions = 0; FOR_EACH_BB_REVERSE (b) { find_regmode_weight (b, SImode); find_regmode_weight (b, SFmode); + if (!reload_completed) + r0_life_regions += find_r0_life_regions (b); } CURR_REGMODE_PRESSURE (SImode) = 0; @@ -9281,7 +9273,6 @@ sh_md_init (FILE *dump ATTRIBUTE_UNUSED, /* Pressure on register r0 can lead to spill failures. so avoid sched1 for functions that already have high pressure on r0. */ #define R0_MAX_LIFE_REGIONS 2 -#define R0_MAX_LIVE_LENGTH 12 /* Register Pressure thresholds for SImode and SFmode registers. */ #define SIMODE_MAX_WEIGHT 5 #define SFMODE_MAX_WEIGHT 10 @@ -9292,9 +9283,8 @@ high_pressure (enum machine_mode mode) { /* Pressure on register r0 can lead to spill failures. so avoid sched1 for functions that already have high pressure on r0. */ - if ((REG_N_SETS (0) - REG_N_DEATHS (0)) >= R0_MAX_LIFE_REGIONS - && REG_LIVE_LENGTH (0) >= R0_MAX_LIVE_LENGTH) - return 1; + if (r0_life_regions >= R0_MAX_LIFE_REGIONS) + return 1; if (mode == SFmode) return (CURR_REGMODE_PRESSURE (SFmode) > SFMODE_MAX_WEIGHT); @@ -10275,6 +10265,7 @@ sh_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, insn_locators_alloc (); insns = get_insns (); +#if 0 if (optimize > 0) { /* Initialize the bitmap obstacks. */ @@ -10301,6 +10292,14 @@ sh_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, else if (flag_pic) split_all_insns_noflow (); } +#else + if (optimize > 0) + { + if (! cfun->cfg) + init_flow (); + split_all_insns_noflow (); + } +#endif sh_reorg (); @@ -10312,15 +10311,21 @@ sh_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, final (insns, file, 1); final_end_function (); +#if 0 if (optimize > 0) { - /* Release all memory allocated by flow. */ - free_basic_block_vars (); + /* Release all memory allocated by df. */ + if (rtl_df) + { + df_finish (rtl_df); + rtl_df = NULL; + } /* Release the bitmap obstacks. */ bitmap_obstack_release (®_obstack); bitmap_obstack_release (NULL); } +#endif reload_completed = 0; epilogue_completed = 0; diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 20653b13105..e85470eae74 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -1,6 +1,6 @@ ;;- Machine description for Renesas / SuperH SH. ;; Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, -;; 2003, 2004, 2005, 2006 Free Software Foundation, Inc. +;; 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. ;; Contributed by Steve Chamberlain (sac@cygnus.com). ;; Improved by Jim Wilson (wilson@cygnus.com). @@ -135,7 +135,6 @@ (UNSPEC_FSINA 16) (UNSPEC_NSB 17) (UNSPEC_ALLOCO 18) - (UNSPEC_EH_RETURN 19) (UNSPEC_TLSGD 20) (UNSPEC_TLSLDM 21) (UNSPEC_TLSIE 22) @@ -163,6 +162,7 @@ (UNSPECV_CONST8 6) (UNSPECV_WINDOW_END 10) (UNSPECV_CONST_END 11) + (UNSPECV_EH_RETURN 12) ]) ;; ------------------------------------------------------------------------- @@ -8110,15 +8110,197 @@ label: DONE; }") -(define_expand "sibcall_value" - [(set (match_operand 0 "" "") - (call (match_operand 1 "" "") +(define_insn "sibcall_valuei" + [(set (match_operand 0 "" "=rf") + (call (mem:SI (match_operand:SI 1 "register_operand" "k")) + (match_operand 2 "" ""))) + (use (reg:PSI FPSCR_REG)) + (return)] + "TARGET_SH1" + "jmp @%1%#" + [(set_attr "needs_delay_slot" "yes") + (set (attr "fp_mode") + (if_then_else (eq_attr "fpu_single" "yes") + (const_string "single") (const_string "double"))) + (set_attr "type" "jump_ind")]) + +(define_insn "sibcall_valuei_pcrel" + [(set (match_operand 0 "" "=rf") + (call (mem:SI (match_operand:SI 1 "arith_reg_operand" "k")) + (match_operand 2 "" ""))) + (use (match_operand 3 "" "")) + (use (reg:PSI FPSCR_REG)) + (return)] + "TARGET_SH2" + "braf %1\\n%O3:%#" + [(set_attr "needs_delay_slot" "yes") + (set (attr "fp_mode") + (if_then_else (eq_attr "fpu_single" "yes") + (const_string "single") (const_string "double"))) + (set_attr "type" "jump_ind")]) + +(define_insn_and_split "sibcall_value_pcrel" + [(set (match_operand 0 "" "=rf") + (call (mem:SI (match_operand:SI 1 "symbol_ref_operand" "")) (match_operand 2 "" ""))) - (match_operand 3 "" "")] + (use (reg:PSI FPSCR_REG)) + (clobber (match_scratch:SI 3 "=k")) + (return)] + "TARGET_SH2" + "#" + "reload_completed" + [(const_int 0)] + " +{ + rtx lab = PATTERN (gen_call_site ()); + rtx call_insn; + + emit_insn (gen_sym_label2reg (operands[3], operands[1], lab)); + call_insn = emit_call_insn (gen_sibcall_valuei_pcrel (operands[0], + operands[3], + operands[2], + copy_rtx (lab))); + SIBLING_CALL_P (call_insn) = 1; + DONE; +}" + [(set_attr "needs_delay_slot" "yes") + (set (attr "fp_mode") + (if_then_else (eq_attr "fpu_single" "yes") + (const_string "single") (const_string "double"))) + (set_attr "type" "jump_ind")]) + +(define_insn "sibcall_value_compact" + [(set (match_operand 0 "" "=rf,rf") + (call (mem:SI (match_operand:SI 1 "register_operand" "k,k")) + (match_operand 2 "" ""))) + (return) + (use (match_operand:SI 3 "register_operand" "z,x")) + (use (reg:SI R1_REG)) + (use (reg:PSI FPSCR_REG)) + ;; We want to make sure the `x' above will only match MACH_REG + ;; because sibcall_epilogue may clobber MACL_REG. + (clobber (reg:SI MACL_REG))] + "TARGET_SHCOMPACT" + "@ + jmp @%1%# + jmp @%1\\n sts %3, r0" + [(set_attr "needs_delay_slot" "yes,no") + (set_attr "length" "2,4") + (set (attr "fp_mode") (const_string "single")) + (set_attr "type" "jump_ind")]) + +(define_insn "sibcall_value_media" + [(set (match_operand 0 "" "=rf") + (call (mem:DI (match_operand 1 "target_reg_operand" "k")) + (match_operand 2 "" ""))) + (use (reg:SI PR_MEDIA_REG)) + (return)] + "TARGET_SHMEDIA" + "blink %1, r63" + [(set_attr "type" "jump_media")]) + +(define_expand "sibcall_value" + [(parallel + [(set (match_operand 0 "arith_reg_operand" "") + (call (mem:SI (match_operand 1 "arith_reg_operand" "")) + (match_operand 2 "" ""))) + (match_operand 3 "" "") + (use (reg:PSI FPSCR_REG)) + (return)])] "" " { - emit_call_insn (gen_sibcall (operands[1], operands[2], operands[3])); + if (TARGET_SHMEDIA) + { + operands[1] = shmedia_prepare_call_address (operands[1], 1); + emit_call_insn (gen_sibcall_value_media (operands[0], operands[1], + operands[2])); + DONE; + } + else if (TARGET_SHCOMPACT && operands[3] + && (INTVAL (operands[3]) & ~ CALL_COOKIE_RET_TRAMP (1))) + { + rtx cookie_rtx = operands[3]; + long cookie = INTVAL (cookie_rtx); + rtx func = XEXP (operands[1], 0); + rtx mach, r1; + + if (flag_pic) + { + if (GET_CODE (func) == SYMBOL_REF && ! SYMBOL_REF_LOCAL_P (func)) + { + rtx reg = gen_reg_rtx (Pmode); + + emit_insn (gen_symGOT2reg (reg, func)); + func = reg; + } + else + func = legitimize_pic_address (func, Pmode, 0); + } + + /* FIXME: if we could tell whether all argument registers are + already taken, we could decide whether to force the use of + MACH_REG or to stick to R0_REG. Unfortunately, there's no + simple way to tell. We could use the CALL_COOKIE, but we + can't currently tell a register used for regular argument + passing from one that is unused. If we leave it up to reload + to decide which register to use, it seems to always choose + R0_REG, which leaves no available registers in SIBCALL_REGS + to hold the address of the trampoline. */ + mach = gen_rtx_REG (SImode, MACH_REG); + r1 = gen_rtx_REG (SImode, R1_REG); + + /* Since such a call function may use all call-clobbered + registers, we force a mode switch earlier, so that we don't + run out of registers when adjusting fpscr for the call. */ + emit_insn (gen_force_mode_for_call ()); + + operands[1] + = function_symbol (NULL, \"__GCC_shcompact_call_trampoline\", + SFUNC_GOT); + operands[1] = force_reg (SImode, operands[1]); + + /* We don't need a return trampoline, since the callee will + return directly to the upper caller. */ + if (cookie & CALL_COOKIE_RET_TRAMP (1)) + { + cookie &= ~ CALL_COOKIE_RET_TRAMP (1); + cookie_rtx = GEN_INT (cookie); + } + + emit_move_insn (mach, func); + emit_move_insn (r1, cookie_rtx); + + emit_call_insn (gen_sibcall_value_compact (operands[0], operands[1], + operands[2], mach)); + DONE; + } + else if (TARGET_SHCOMPACT && flag_pic + && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF + && ! SYMBOL_REF_LOCAL_P (XEXP (operands[1], 0))) + { + rtx reg = gen_reg_rtx (Pmode); + + emit_insn (gen_symGOT2reg (reg, XEXP (operands[1], 0))); + XEXP (operands[1], 0) = reg; + } + if (flag_pic && TARGET_SH2 + && GET_CODE (operands[1]) == MEM + && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF + /* The PLT needs the PIC register, but the epilogue would have + to restore it, so we can only use PC-relative PIC calls for + static functions. */ + && SYMBOL_REF_LOCAL_P (XEXP (operands[1], 0))) + { + emit_call_insn (gen_sibcall_value_pcrel (operands[0], + XEXP (operands[1], 0), + operands[2])); + DONE; + } + else + operands[1] = force_reg (SImode, XEXP (operands[1], 0)); + + emit_call_insn (gen_sibcall_valuei (operands[0], operands[1], operands[2])); DONE; }") @@ -8239,19 +8421,14 @@ label: { rtx r0 = gen_rtx_REG (SImode, R0_REG); rtx tmp = gen_rtx_REG (SImode, MACL_REG); - rtx i; /* We can't tell at this point whether the sibcall is a sibcall_compact and, if it is, whether it uses r0 or mach as operand 2, so let the instructions that preserve r0 be optimized away if r0 turns out to be dead. */ - i = emit_insn_before (gen_rtx_SET (SImode, tmp, r0), insn); - REG_NOTES (i) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - REG_NOTES (i)); - i = emit_move_insn (r0, tmp); - REG_NOTES (i) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - REG_NOTES (i)); + emit_insn_before (gen_rtx_SET (SImode, tmp, r0), insn); + emit_move_insn (r0, tmp); break; } } @@ -9226,19 +9403,22 @@ mov.l\\t1f,r0\\n\\ ;; until we know where it will be put in the stack frame. (define_insn "eh_set_ra_si" - [(unspec [(match_operand:SI 0 "register_operand" "r")] UNSPEC_EH_RETURN) + [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] + UNSPECV_EH_RETURN) (clobber (match_scratch:SI 1 "=&r"))] "! TARGET_SHMEDIA64" "#") (define_insn "eh_set_ra_di" - [(unspec [(match_operand:DI 0 "register_operand" "r")] UNSPEC_EH_RETURN) + [(unspec_volatile [(match_operand:DI 0 "register_operand" "r")] + UNSPECV_EH_RETURN) (clobber (match_scratch:DI 1 "=&r"))] "TARGET_SHMEDIA64" "#") (define_split - [(unspec [(match_operand 0 "register_operand" "")] UNSPEC_EH_RETURN) + [(unspec_volatile [(match_operand 0 "register_operand" "")] + UNSPECV_EH_RETURN) (clobber (match_scratch 1 ""))] "reload_completed" [(const_int 0)] @@ -10167,7 +10347,7 @@ mov.l\\t1f,r0\\n\\ [(set (reg:PSI FPSCR_REG) (mem:PSI (match_operand:SI 0 "register_operand" "")))] "(TARGET_SH4 || TARGET_SH2A_DOUBLE) - && (flag_peephole2 ? flow2_completed : reload_completed)" + && (flag_peephole2 ? epilogue_completed : reload_completed)" [(const_int 0)] { rtx fpscr, mem, new_insn; diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index f94af2ac5d1..afe24246736 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for SPARC. Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 + 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@cygnus.com) 64-bit SPARC-V9 support by Michael Tiemann, Jim Wilson, and Doug Evans, @@ -52,6 +52,7 @@ Boston, MA 02110-1301, USA. */ #include "tree-gimple.h" #include "langhooks.h" #include "params.h" +#include "df.h" /* Processor costs */ static const @@ -3742,20 +3743,20 @@ sparc_compute_frame_size (HOST_WIDE_INT size, int leaf_function_p) if (TARGET_ARCH64) { for (i = 0; i < 8; i++) - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) n_regs += 2; } else { for (i = 0; i < 8; i += 2) - if ((regs_ever_live[i] && ! call_used_regs[i]) - || (regs_ever_live[i+1] && ! call_used_regs[i+1])) + if ((df_regs_ever_live_p (i) && ! call_used_regs[i]) + || (df_regs_ever_live_p (i+1) && ! call_used_regs[i+1])) n_regs += 2; } for (i = 32; i < (TARGET_V9 ? 96 : 64); i += 2) - if ((regs_ever_live[i] && ! call_used_regs[i]) - || (regs_ever_live[i+1] && ! call_used_regs[i+1])) + if ((df_regs_ever_live_p (i) && ! call_used_regs[i]) + || (df_regs_ever_live_p (i+1) && ! call_used_regs[i+1])) n_regs += 2; /* Set up values for use in prologue and epilogue. */ @@ -3798,7 +3799,7 @@ sparc_output_scratch_registers (FILE *file ATTRIBUTE_UNUSED) .register being printed for them already. */ for (i = 2; i < 8; i++) { - if (regs_ever_live [i] + if (df_regs_ever_live_p (i) && ! sparc_hard_reg_printed [i]) { sparc_hard_reg_printed [i] = 1; @@ -3829,7 +3830,7 @@ save_or_restore_regs (int low, int high, rtx base, int offset, int action) { for (i = low; i < high; i++) { - if (regs_ever_live[i] && ! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ! call_used_regs[i]) { mem = gen_rtx_MEM (DImode, plus_constant (base, offset)); set_mem_alias_set (mem, sparc_sr_alias_set); @@ -3848,8 +3849,8 @@ save_or_restore_regs (int low, int high, rtx base, int offset, int action) { for (i = low; i < high; i += 2) { - bool reg0 = regs_ever_live[i] && ! call_used_regs[i]; - bool reg1 = regs_ever_live[i+1] && ! call_used_regs[i+1]; + bool reg0 = df_regs_ever_live_p (i) && ! call_used_regs[i]; + bool reg1 = df_regs_ever_live_p (i+1) && ! call_used_regs[i+1]; enum machine_mode mode; int regno; @@ -6509,7 +6510,7 @@ order_regs_for_local_alloc (void) { static int last_order_nonleaf = 1; - if (regs_ever_live[15] != last_order_nonleaf) + if (df_regs_ever_live_p (15) != last_order_nonleaf) { last_order_nonleaf = !last_order_nonleaf; memcpy ((char *) reg_alloc_order, @@ -7673,7 +7674,7 @@ sparc_check_64 (rtx x, rtx insn) y = gen_rtx_REG (SImode, REGNO (x) + WORDS_BIG_ENDIAN); if (flag_expensive_optimizations - && REG_N_SETS (REGNO (y)) == 1) + && DF_REG_DEF_COUNT (REGNO (y)) == 1) set_once = 1; if (insn == 0) diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c index 5e1626f128e..fed243f67df 100644 --- a/gcc/config/spu/spu.c +++ b/gcc/config/spu/spu.c @@ -1387,7 +1387,6 @@ print_operand (FILE * file, rtx x, int code) } extern char call_used_regs[]; -extern char regs_ever_live[]; /* For PIC mode we've reserved PIC_OFFSET_TABLE_REGNUM, which is a caller saved register. For leaf functions it is more efficient to @@ -1517,13 +1516,13 @@ spu_split_immediate (rtx * ops) static int need_to_save_reg (int regno, int saving) { - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) return 1; if (flag_pic && regno == PIC_OFFSET_TABLE_REGNUM && (!saving || current_function_uses_pic_offset_table) && (!saving - || !current_function_is_leaf || regs_ever_live[LAST_ARG_REGNUM])) + || !current_function_is_leaf || df_regs_ever_live_p (LAST_ARG_REGNUM))) return 1; return 0; } @@ -1571,16 +1570,11 @@ frame_emit_add_imm (rtx dst, rtx src, HOST_WIDE_INT imm, rtx scratch) } else { - insn = emit_insn (gen_movsi (scratch, gen_int_mode (imm, SImode))); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - REG_NOTES (insn)); + emit_insn (gen_movsi (scratch, gen_int_mode (imm, SImode))); insn = emit_insn (gen_addsi3 (dst, src, scratch)); if (REGNO (src) == REGNO (scratch)) abort (); } - if (REGNO (dst) == REGNO (scratch)) - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - REG_NOTES (insn)); return insn; } @@ -1688,11 +1682,7 @@ spu_expand_prologue (void) { rtx pic_reg = get_pic_reg (); insn = emit_insn (gen_load_pic_offset (pic_reg, scratch_reg_0)); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - REG_NOTES (insn)); insn = emit_insn (gen_subsi3 (pic_reg, pic_reg, scratch_reg_0)); - REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, const0_rtx, - REG_NOTES (insn)); } if (total_size > 0) @@ -2424,7 +2414,7 @@ immediate_load_p (rtx op, enum machine_mode mode) { enum immediate_class c = classify_immediate (op, mode); return c == IC_IL1 || c == IC_IL1s - || (!flow2_completed && (c == IC_IL2 || c == IC_IL2s)); + || (!epilogue_completed && (c == IC_IL2 || c == IC_IL2s)); } return 0; } @@ -3833,7 +3823,7 @@ fsmbi_const_p (rtx x) /* We can always choose TImode for CONST_INT because the high bits of an SImode will always be all 1s, i.e., valid for fsmbi. */ enum immediate_class c = classify_immediate (x, TImode); - return c == IC_FSMBI || (!flow2_completed && c == IC_FSMBI2); + return c == IC_FSMBI || (!epilogue_completed && c == IC_FSMBI2); } return 0; } diff --git a/gcc/config/stormy16/stormy16.c b/gcc/config/stormy16/stormy16.c index 5f8be4302bf..8f2dc1e68c9 100644 --- a/gcc/config/stormy16/stormy16.c +++ b/gcc/config/stormy16/stormy16.c @@ -1,6 +1,6 @@ /* Xstormy16 target functions. - Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 - Free Software Foundation, Inc. + Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, + 2006, 2007 Free Software Foundation, Inc. Contributed by Red Hat, Inc. This file is part of GCC. @@ -1000,10 +1000,10 @@ struct xstormy16_stack_layout /* Does REGNO need to be saved? */ #define REG_NEEDS_SAVE(REGNUM, IFUN) \ - ((regs_ever_live[REGNUM] && ! call_used_regs[REGNUM]) \ + ((df_regs_ever_live_p (REGNUM) && ! call_used_regs[REGNUM]) \ || (IFUN && ! fixed_regs[REGNUM] && call_used_regs[REGNUM] \ && (REGNO_REG_CLASS (REGNUM) != CARRY_REGS) \ - && (regs_ever_live[REGNUM] || ! current_function_is_leaf))) + && (df_regs_ever_live_p (REGNUM) || ! current_function_is_leaf))) /* Compute the stack layout. */ struct xstormy16_stack_layout diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c index e741c730b92..fbb3ac9986c 100644 --- a/gcc/config/v850/v850.c +++ b/gcc/config/v850/v850.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for NEC V850 series - Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 - Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, + 2006, 2007 Free Software Foundation, Inc. Contributed by Jeff Law (law@cygnus.com). This file is part of GCC. @@ -1134,7 +1134,7 @@ substitute_ep_register (rtx first_insn, if (!*p_r1) { - regs_ever_live[1] = 1; + df_set_regs_ever_live_p (1, true); *p_r1 = gen_rtx_REG (Pmode, 1); *p_ep = gen_rtx_REG (Pmode, 30); } @@ -1460,12 +1460,15 @@ compute_register_save_size (long * p_reg_saved) int size = 0; int i; int interrupt_handler = v850_interrupt_function_p (current_function_decl); - int call_p = regs_ever_live [LINK_POINTER_REGNUM]; + int call_p = df_regs_ever_live_p (LINK_POINTER_REGNUM); long reg_saved = 0; /* Count the return pointer if we need to save it. */ if (current_function_profile && !call_p) - regs_ever_live [LINK_POINTER_REGNUM] = call_p = 1; + { + df_set_regs_ever_live (LINK_POINTER_REGNUM, true); + call_p = 1; + } /* Count space for the register saves. */ if (interrupt_handler) @@ -1474,7 +1477,7 @@ compute_register_save_size (long * p_reg_saved) switch (i) { default: - if (regs_ever_live[i] || call_p) + if (df_regs_ever_live_p (i) || call_p) { size += 4; reg_saved |= 1L << i; @@ -1502,7 +1505,7 @@ compute_register_save_size (long * p_reg_saved) { /* Find the first register that needs to be saved. */ for (i = 0; i <= 31; i++) - if (regs_ever_live[i] && ((! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ((! call_used_regs[i]) || i == LINK_POINTER_REGNUM)) break; @@ -1534,7 +1537,7 @@ compute_register_save_size (long * p_reg_saved) reg_saved |= 1L << i; } - if (regs_ever_live [LINK_POINTER_REGNUM]) + if (df_regs_ever_live_p (LINK_POINTER_REGNUM)) { size += 4; reg_saved |= 1L << LINK_POINTER_REGNUM; @@ -1543,7 +1546,7 @@ compute_register_save_size (long * p_reg_saved) else { for (; i <= 31; i++) - if (regs_ever_live[i] && ((! call_used_regs[i]) + if (df_regs_ever_live_p (i) && ((! call_used_regs[i]) || i == LINK_POINTER_REGNUM)) { size += 4; diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c index 5ce9ad370ab..dbc23902570 100644 --- a/gcc/config/vax/vax.c +++ b/gcc/config/vax/vax.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for VAX. Copyright (C) 1987, 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, - 2004, 2005 + 2004, 2005, 2006, 2007 Free Software Foundation, Inc. This file is part of GCC. @@ -116,7 +116,7 @@ vax_output_function_prologue (FILE * file, HOST_WIDE_INT size) int mask = 0; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) mask |= 1 << regno; fprintf (file, "\t.word 0x%x\n", mask); @@ -127,7 +127,7 @@ vax_output_function_prologue (FILE * file, HOST_WIDE_INT size) int offset = 0; for (regno = FIRST_PSEUDO_REGISTER-1; regno >= 0; --regno) - if (regs_ever_live[regno] && !call_used_regs[regno]) + if (df_regs_ever_live_p (regno) && !call_used_regs[regno]) dwarf2out_reg_save (label, regno, offset -= 4); dwarf2out_reg_save (label, PC_REGNUM, offset -= 4); |