diff options
Diffstat (limited to 'gcc/config')
118 files changed, 2362 insertions, 2513 deletions
diff --git a/gcc/config/1750a/1750a.c b/gcc/config/1750a/1750a.c index 789eedb6c58..631d8df8e1d 100644 --- a/gcc/config/1750a/1750a.c +++ b/gcc/config/1750a/1750a.c @@ -21,8 +21,7 @@ Boston, MA 02111-1307, USA. */ #define __datalbl #include "config.h" -#include <stdio.h> -#include <string.h> +#include "system.h" #include "rtl.h" #include "tree.h" #include "function.h" @@ -118,7 +117,7 @@ function_arg (cum, mode, type, named) else size = GET_MODE_SIZE (mode); if (cum + size < 12) - return gen_rtx (REG, mode, cum); + return gen_rtx_REG (mode, cum); else return (rtx) 0; } diff --git a/gcc/config/1750a/1750a.h b/gcc/config/1750a/1750a.h index 9ef50309356..1c61ab5d69d 100644 --- a/gcc/config/1750a/1750a.h +++ b/gcc/config/1750a/1750a.h @@ -474,14 +474,14 @@ enum reg_class { NO_REGS, R2, R0_1, INDEX_REGS, BASE_REGS, ALL_REGS, LIM_REG_CLA otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx(REG,TYPE_MODE(VALTYPE),0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ /* 1750 note: no libcalls yet */ #define LIBCALL_VALUE(MODE) printf("LIBCALL_VALUE called!\n"), \ - gen_rtx(REG,MODE,0) + gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value. */ @@ -696,8 +696,8 @@ enum reg_class { NO_REGS, R2, R0_1, INDEX_REGS, BASE_REGS, ALL_REGS, LIM_REG_CLA #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) printf("INITIALIZE_TRAMPO called\n") /* { \ - emit_move_insn (gen_rtx (MEM, QImode, plus_constant (TRAMP, 1)), CXT); \ - emit_move_insn (gen_rtx (MEM, QImode, plus_constant (TRAMP, 6)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (QImode, plus_constant (TRAMP, 1)), CXT); \ + emit_move_insn (gen_rtx_MEM (QImode, plus_constant (TRAMP, 6)), FNADDR); \ } */ diff --git a/gcc/config/1750a/1750a.md b/gcc/config/1750a/1750a.md index cff2d9291b8..3bea692edbd 100644 --- a/gcc/config/1750a/1750a.md +++ b/gcc/config/1750a/1750a.md @@ -1,6 +1,6 @@ ;;- Machine description for GNU compiler ;;- MIL-STD-1750A version. -;; Copyright (C) 1994, 1995, 1996, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1994, 95, 96, 97, 98, 1999 Free Software Foundation, Inc. ;; Contributed by O.M.Kellogg, DASA (oliver.kellogg@space.otn.dasa.de). ;; This file is part of GNU CC. @@ -767,9 +767,9 @@ (neg:TQF (match_operand:TQF 1 "register_operand" "r")))] "" " - emit_insn(gen_rtx(SET,VOIDmode,operands[0],CONST0_RTX(TQFmode))); - emit_insn(gen_rtx(SET,VOIDmode,operands[0], - gen_rtx(MINUS,TQFmode,operands[0],operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], CONST0_RTX (TQFmode))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_MINUS (TQFmode, operands[0], operands[1]))); DONE; ") @@ -954,7 +954,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -981,7 +981,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -1012,7 +1012,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -1038,7 +1038,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -1375,17 +1375,6 @@ "" "ANYCALL %0") - -; (define_insn "return" -; [(return)] -; "" -; "* -; { -; rtx oprnd = GEN_INT (get_frame_size()); -; output_asm_insn(\"ret.m %0\",&oprnd); -; return \"\;\"; -; } ") - (define_insn "indirect_jump" [(set (pc) (match_operand:QI 0 "address_operand" "p"))] "" diff --git a/gcc/config/a29k/a29k.c b/gcc/config/a29k/a29k.c index ce41b34d91e..d930363f12d 100644 --- a/gcc/config/a29k/a29k.c +++ b/gcc/config/a29k/a29k.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on AMD Am29000. - Copyright (C) 1987, 88, 90-94, 1995, 1997, 1999 Free Software + Copyright (C) 1987, 88, 90-95, 1997, 1998, 1999 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@nyu.edu) @@ -21,7 +21,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -854,9 +854,10 @@ a29k_clobbers_to (insn, op) for (i = R_LR (2); i < high_regno; i++) CALL_INSN_FUNCTION_USAGE (insn) - = gen_rtx (EXPR_LIST, VOIDmode, - gen_rtx (CLOBBER, VOIDmode, gen_rtx (REG, SImode, i)), - CALL_INSN_FUNCTION_USAGE (insn)); + = gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_CLOBBER (VOIDmode, + gen_rtx (REG, SImode, i)), + CALL_INSN_FUNCTION_USAGE (insn)); } /* These routines are used in finding insns to fill delay slots in the diff --git a/gcc/config/a29k/a29k.h b/gcc/config/a29k/a29k.h index a7f5d8d3ff7..4ea977c5fbe 100644 --- a/gcc/config/a29k/a29k.h +++ b/gcc/config/a29k/a29k.h @@ -746,12 +746,12 @@ extern struct rtx_def *a29k_get_reloaded_address (); On 29k the value is found in gr96. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), R_GR (96)) + gen_rtx_REG (TYPE_MODE (VALTYPE), R_GR (96)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, R_GR (96)) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, R_GR (96)) /* 1 if N is a possible register number for a function value as seen by the caller. @@ -846,7 +846,7 @@ extern struct rtx_def *a29k_get_reloaded_address (); #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ - ? gen_rtx(REG, (MODE), R_LR (2) + (CUM)) : 0) + ? gen_rtx_REG ((MODE), R_LR (2) + (CUM)) : 0) /* Define where a function finds its arguments. This is different from FUNCTION_ARG because of register windows. @@ -856,8 +856,8 @@ extern struct rtx_def *a29k_get_reloaded_address (); #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ ((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \ - ? gen_rtx (REG, MODE, \ - incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \ + ? gen_rtx_REG (MODE, \ + incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \ : 0) /* This indicates that an argument is to be passed with an invisible reference @@ -911,7 +911,7 @@ extern struct rtx_def *a29k_get_reloaded_address (); if (! (NO_RTL) && first_reg_offset != 16) \ move_block_from_reg \ (R_AR (0) + first_reg_offset, \ - gen_rtx (MEM, BLKmode, virtual_incoming_args_rtx), \ + gen_rtx_MEM (BLKmode, virtual_incoming_args_rtx), \ 16 - first_reg_offset, (16 - first_reg_offset) * UNITS_PER_WORD); \ PRETEND_SIZE = (16 - first_reg_offset) * UNITS_PER_WORD; \ } \ @@ -1043,25 +1043,25 @@ extern char *a29k_function_name; rtx _val = force_reg (SImode, VALUE); \ \ _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 3)); \ - emit_move_insn (gen_rtx (MEM, QImode, _addr), \ + emit_move_insn (gen_rtx_MEM (QImode, _addr), \ gen_lowpart (QImode, _val)); \ \ _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ build_int_2 (8, 0), 0, 1); \ _addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 1)); \ - emit_move_insn (gen_rtx (MEM, QImode, _addr), \ + emit_move_insn (gen_rtx_MEM (QImode, _addr), \ gen_lowpart (QImode, _temp)); \ \ _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ build_int_2 (8, 0), _temp, 1); \ _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 3)); \ - emit_move_insn (gen_rtx (MEM, QImode, _addr), \ + emit_move_insn (gen_rtx_MEM (QImode, _addr), \ gen_lowpart (QImode, _temp)); \ \ _temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \ build_int_2 (8, 0), _temp, 1); \ _addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 1)); \ - emit_move_insn (gen_rtx (MEM, QImode, _addr), \ + emit_move_insn (gen_rtx_MEM (QImode, _addr), \ gen_lowpart (QImode, _temp)); \ } diff --git a/gcc/config/a29k/a29k.md b/gcc/config/a29k/a29k.md index cc4f422b0f2..aa82c6c5ca7 100644 --- a/gcc/config/a29k/a29k.md +++ b/gcc/config/a29k/a29k.md @@ -1,5 +1,5 @@ ;;- Machine description for AMD Am29000 for GNU C compiler -;; Copyright (C) 1991, 1992, 1994 Free Software Foundation, Inc. +;; Copyright (C) 1991, 1992, 1994, 1998, 1999 Free Software Foundation, Inc. ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) ;; This file is part of GNU CC. @@ -145,8 +145,8 @@ later be inlined into another function. */ if (! TARGET_SMALL_MEMORY && GET_CODE (XEXP (operands[0], 0)) == SYMBOL_REF) - operands[0] = gen_rtx (MEM, SImode, - force_reg (Pmode, XEXP (operands[0], 0))); + operands[0] = gen_rtx_MEM (SImode, + force_reg (Pmode, XEXP (operands[0], 0))); }") (define_expand "call_value" @@ -178,9 +178,8 @@ later be inlined into another function. */ if (! TARGET_SMALL_MEMORY && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF) - operands[1] = gen_rtx (MEM, SImode, - force_reg (Pmode, XEXP (operands[1], 0))); - + operands[1] = gen_rtx_MEM (SImode, + force_reg (Pmode, XEXP (operands[1], 0))); }") (define_insn "" @@ -644,9 +643,9 @@ if (size != 8 || (pos != 8 && pos != 16)) FAIL; - operands[3] = gen_rtx (ASHIFT, PSImode, - force_reg (PSImode, GEN_INT (pos / 8)), - GEN_INT (3)); + operands[3] = gen_rtx_ASHIFT (PSImode, + force_reg (PSImode, GEN_INT (pos / 8)), + GEN_INT (3)); }") @@ -967,9 +966,9 @@ if ((size != 8 && size != 16) || pos % size != 0) FAIL; - operands[2] = gen_rtx (ASHIFT, PSImode, - force_reg (PSImode, GEN_INT (pos / 8)), - GEN_INT (3)); + operands[2] = gen_rtx_ASHIFT (PSImode, + force_reg (PSImode, GEN_INT (pos / 8)), + GEN_INT (3)); }") ;; LOAD (also used by move insn). @@ -1056,20 +1055,20 @@ /* CR gets set to the number of registers minus one. */ operands[2] = GEN_INT(count - 1); - operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count + 2)); + operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count + 2)); from = memory_address (SImode, XEXP (operands[1], 0)); - XVECEXP (operands[3], 0, 0) = gen_rtx (SET, VOIDmode, - gen_rtx (REG, SImode, regno), - gen_rtx (MEM, SImode, from)); + XVECEXP (operands[3], 0, 0) = gen_rtx_SET (VOIDmode, + gen_rtx_REG (SImode, regno), + gen_rtx_MEM (SImode, from)); operands[4] = gen_reg_rtx (PSImode); - XVECEXP (operands[3], 0, 1) = gen_rtx (USE, VOIDmode, operands[4]); - XVECEXP (operands[3], 0, 2) = gen_rtx (CLOBBER, VOIDmode, operands[4]); + XVECEXP (operands[3], 0, 1) = gen_rtx_USE (VOIDmode, operands[4]); + XVECEXP (operands[3], 0, 2) = gen_rtx_CLOBBER (VOIDmode, operands[4]); for (i = 1; i < count; i++) XVECEXP (operands[3], 0, i + 2) - = gen_rtx (SET, VOIDmode, gen_rtx (REG, SImode, regno + i), - gen_rtx (MEM, SImode, plus_constant (from, i * 4))); + = gen_rtx_SET (VOIDmode, gen_rtx (REG, SImode, regno + i), + gen_rtx_MEM (SImode, plus_constant (from, i * 4))); }") ;; Indicate that CR is used and is then clobbered. @@ -1378,20 +1377,20 @@ /* CR gets set to the number of registers minus one. */ operands[2] = GEN_INT(count - 1); - operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count + 2)); + operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count + 2)); from = memory_address (SImode, XEXP (operands[0], 0)); - XVECEXP (operands[3], 0, 0) = gen_rtx (SET, VOIDmode, - gen_rtx (MEM, SImode, from), - gen_rtx (REG, SImode, regno)); + XVECEXP (operands[3], 0, 0) = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (SImode, from), + gen_rtx_REG (SImode, regno)); operands[4] = gen_reg_rtx (PSImode); - XVECEXP (operands[3], 0, 1) = gen_rtx (USE, VOIDmode, operands[4]); - XVECEXP (operands[3], 0, 2) = gen_rtx (CLOBBER, VOIDmode, operands[4]); + XVECEXP (operands[3], 0, 1) = gen_rtx_USE (VOIDmode, operands[4]); + XVECEXP (operands[3], 0, 2) = gen_rtx_CLOBBER (VOIDmode, operands[4]); for (i = 1; i < count; i++) XVECEXP (operands[3], 0, i + 2) - = gen_rtx (SET, VOIDmode, - gen_rtx (MEM, SImode, plus_constant (from, i * 4)), - gen_rtx (REG, SImode, regno + i)); + = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (SImode, plus_constant (from, i * 4)), + gen_rtx_REG (SImode, regno + i)); }") (define_expand "store_multiple_bug" @@ -1417,19 +1416,19 @@ count = INTVAL (operands[2]); regno = REGNO (operands[1]); - operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count + 1)); + operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count + 1)); from = memory_address (SImode, XEXP (operands[0], 0)); - XVECEXP (operands[3], 0, 0) = gen_rtx (SET, VOIDmode, - gen_rtx (MEM, SImode, from), - gen_rtx (REG, SImode, regno)); + XVECEXP (operands[3], 0, 0) = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (SImode, from), + gen_rtx_REG (SImode, regno)); XVECEXP (operands[3], 0, 1) - = gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, PSImode)); + = gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (PSImode)); for (i = 1; i < count; i++) XVECEXP (operands[3], 0, i + 1) - = gen_rtx (SET, VOIDmode, - gen_rtx (MEM, SImode, plus_constant (from, i * 4)), - gen_rtx (REG, SImode, regno + i)); + = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (SImode, plus_constant (from, i * 4)), + gen_rtx_REG (SImode, regno + i)); }") (define_insn "" @@ -1811,7 +1810,7 @@ " { rtx seq = gen_loadhi (gen_lowpart (SImode, operands[0]), a29k_get_reloaded_address (operands[1]), - gen_rtx (REG, SImode, R_TAV), + gen_rtx_REG (SImode, R_TAV), operands[2]); a29k_set_memflags (seq, operands[1]); @@ -1828,7 +1827,7 @@ { rtx (*fcn) () = TARGET_BYTE_WRITES ? gen_storehihww : gen_storehinhww; rtx seq = (*fcn) (a29k_get_reloaded_address (operands[0]), gen_lowpart (SImode, operands[1]), - gen_rtx (REG, SImode, R_TAV), operands[2]); + gen_rtx_REG (SImode, R_TAV), operands[2]); a29k_set_memflags (seq, operands[0]); emit_insn (seq); @@ -1941,7 +1940,7 @@ " { rtx seq = gen_loadqi (gen_lowpart (SImode, operands[0]), a29k_get_reloaded_address (operands[1]), - gen_rtx (REG, SImode, R_TAV), + gen_rtx_REG (SImode, R_TAV), operands[2]); a29k_set_memflags (seq, operands[1]); @@ -1958,7 +1957,7 @@ { rtx (*fcn) () = TARGET_BYTE_WRITES ? gen_storeqihww : gen_storeqinhww; rtx seq = (*fcn) (a29k_get_reloaded_address (operands[0]), gen_lowpart (SImode, operands[1]), - gen_rtx (REG, SImode, R_TAV), operands[2]); + gen_rtx_REG (SImode, R_TAV), operands[2]); a29k_set_memflags (seq, operands[0]); emit_insn (seq); @@ -2173,25 +2172,25 @@ if (REGNO (operands[0]) >= REGNO (operands[1]) + 1 && REGNO (operands[0]) <= REGNO (operands[1]) + 3) { - operands[3] = gen_rtx (REG, SImode, REGNO (operands[0]) + 3); - operands[4] = gen_rtx (REG, SImode, REGNO (operands[1]) + 3); - operands[5] = gen_rtx (REG, SImode, REGNO (operands[0]) + 2); - operands[6] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2); - operands[7] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - operands[8] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); - operands[9] = gen_rtx (REG, SImode, REGNO (operands[0])); - operands[10] = gen_rtx (REG, SImode, REGNO (operands[1])); + operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]) + 3); + operands[4] = gen_rtx_REG (SImode, REGNO (operands[1]) + 3); + operands[5] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2); + operands[6] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2); + operands[7] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + operands[8] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); + operands[9] = gen_rtx_REG (SImode, REGNO (operands[0])); + operands[10] = gen_rtx_REG (SImode, REGNO (operands[1])); } else { - operands[3] = gen_rtx (REG, SImode, REGNO (operands[0])); - operands[4] = gen_rtx (REG, SImode, REGNO (operands[1])); - operands[5] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - operands[6] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); - operands[7] = gen_rtx (REG, SImode, REGNO (operands[0]) + 2); - operands[8] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2); - operands[9] = gen_rtx (REG, SImode, REGNO (operands[0]) + 3); - operands[10] = gen_rtx (REG, SImode, REGNO (operands[1]) + 3); + operands[3] = gen_rtx_REG (SImode, REGNO (operands[0])); + operands[4] = gen_rtx_REG (SImode, REGNO (operands[1])); + operands[5] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + operands[6] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); + operands[7] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2); + operands[8] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2); + operands[9] = gen_rtx_REG (SImode, REGNO (operands[0]) + 3); + operands[10] = gen_rtx_REG (SImode, REGNO (operands[1]) + 3); } }") @@ -2553,9 +2552,9 @@ { operands[1] = gen_reg_rtx (SImode); if (a29k_compare_fp_p) - operands[2] = gen_rtx (GT, SImode, a29k_compare_op1, a29k_compare_op0); + operands[2] = gen_rtx_GT (SImode, a29k_compare_op1, a29k_compare_op0); else - operands[2] = gen_rtx (LT, SImode, a29k_compare_op0, a29k_compare_op1); + operands[2] = gen_rtx_LT (SImode, a29k_compare_op0, a29k_compare_op1); }") ;; Similarly for "le". @@ -2570,9 +2569,9 @@ { operands[1] = gen_reg_rtx (SImode); if (a29k_compare_fp_p) - operands[2] = gen_rtx (GE, SImode, a29k_compare_op1, a29k_compare_op0); + operands[2] = gen_rtx_GE (SImode, a29k_compare_op1, a29k_compare_op0); else - operands[2] = gen_rtx (LE, SImode, a29k_compare_op0, a29k_compare_op1); + operands[2] = gen_rtx_LE (SImode, a29k_compare_op0, a29k_compare_op1); }") (define_expand "bltu" @@ -2708,9 +2707,9 @@ " { if (a29k_compare_fp_p) - operands[1] = gen_rtx (GT, SImode, a29k_compare_op1, a29k_compare_op0); + operands[1] = gen_rtx_GT (SImode, a29k_compare_op1, a29k_compare_op0); else - operands[1] = gen_rtx (LT, SImode, a29k_compare_op0, a29k_compare_op1); + operands[1] = gen_rtx_LT (SImode, a29k_compare_op0, a29k_compare_op1); }") ;; Similarly for "le" @@ -2721,9 +2720,9 @@ " { if (a29k_compare_fp_p) - operands[1] = gen_rtx (GE, SImode, a29k_compare_op1, a29k_compare_op0); + operands[1] = gen_rtx_GE (SImode, a29k_compare_op1, a29k_compare_op0); else - operands[1] = gen_rtx (LE, SImode, a29k_compare_op0, a29k_compare_op1); + operands[1] = gen_rtx_LE (SImode, a29k_compare_op0, a29k_compare_op1); }") (define_expand "sltu" diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index ca097f6121d..e9da5dbbe25 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -412,7 +412,7 @@ sext_add_operand (op, mode) return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'I') || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O')); - return register_operand (op, mode); + return reg_not_elim_operand (op, mode); } /* Return 1 if OP is the constant 4 or 8. */ @@ -3052,9 +3052,9 @@ alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs) /* Store function address and CXT. */ addr = memory_address (mode, plus_constant (tramp, fnofs)); - emit_move_insn (gen_rtx (MEM, mode, addr), fnaddr); + emit_move_insn (gen_rtx_MEM (mode, addr), fnaddr); addr = memory_address (mode, plus_constant (tramp, cxtofs)); - emit_move_insn (gen_rtx (MEM, mode, addr), cxt); + emit_move_insn (gen_rtx_MEM (mode, addr), cxt); /* This has been disabled since the hint only has a 32k range, and in no existing OS is the stack within 32k of the text segment. */ @@ -3070,15 +3070,15 @@ alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs) /* Merge in the hint. */ addr = memory_address (SImode, plus_constant (tramp, jmpofs)); - temp1 = force_reg (SImode, gen_rtx (MEM, SImode, addr)); + temp1 = force_reg (SImode, gen_rtx_MEM (SImode, addr)); temp1 = expand_and (temp1, GEN_INT (0xffffc000), NULL_RTX); temp1 = expand_binop (SImode, ior_optab, temp1, temp, temp1, 1, OPTAB_WIDEN); - emit_move_insn (gen_rtx (MEM, SImode, addr), temp1); + emit_move_insn (gen_rtx_MEM (SImode, addr), temp1); } #ifdef TRANSFER_FROM_TRAMPOLINE - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"), + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"), 0, VOIDmode, 1, addr, Pmode); #endif diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index 2c0e0a2d2cc..233dae9a3fd 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -1009,25 +1009,25 @@ extern int alpha_memory_latency; On Alpha the value is found in $0 for integer functions and $f0 for floating-point functions. */ -#define FUNCTION_VALUE(VALTYPE, FUNC) \ +#define FUNCTION_VALUE(VALTYPE, FUNC) \ gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \ - && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ - || POINTER_TYPE_P (VALTYPE)) \ + && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ + || POINTER_TYPE_P (VALTYPE)) \ ? word_mode : TYPE_MODE (VALTYPE), \ ((TARGET_FPREGS \ - && (TREE_CODE (VALTYPE) == REAL_TYPE \ + && (TREE_CODE (VALTYPE) == REAL_TYPE \ || TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \ - ? 32 : 0)) + ? 32 : 0)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) \ +#define LIBCALL_VALUE(MODE) \ gen_rtx_REG (MODE, \ - (TARGET_FPREGS \ - && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ + (TARGET_FPREGS \ + && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ - ? 32 : 0)) + ? 32 : 0)) /* The definition of this macro implies that there are cases where a scalar value cannot be returned in registers. @@ -1105,11 +1105,12 @@ extern int alpha_memory_latency; #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \ - ? gen_rtx(REG, (MODE), \ - (CUM) + 16 + ((TARGET_FPREGS \ - && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \ - || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ - * 32)) \ + ? gen_rtx_REG ((MODE), \ + (CUM) + 16 \ + + ((TARGET_FPREGS \ + && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \ + || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ + * 32)) \ : 0) /* Specify the padding direction of arguments. diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 9fb35d90a4e..6407b6c1d09 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -491,7 +491,7 @@ (define_split [(set (match_operand:DI 0 "register_operand" "") (sign_extend:DI - (plus:SI (match_operand:SI 1 "register_operand" "") + (plus:SI (match_operand:SI 1 "reg_not_elim_operand" "") (match_operand:SI 2 "const_int_operand" "")))) (clobber (match_operand:SI 3 "reg_not_elim_operand" ""))] "! sext_add_operand (operands[2], SImode) && INTVAL (operands[2]) > 0 @@ -626,7 +626,7 @@ [(match_operand 2 "" "") (match_operand 3 "" "")]) (match_operand:SI 4 "const48_operand" "")) - (match_operand:SI 5 "add_operand" "")))) + (match_operand:SI 5 "sext_add_operand" "")))) (clobber (match_operand:DI 6 "reg_not_elim_operand" ""))] "" [(set (match_dup 6) (match_dup 7)) @@ -650,95 +650,6 @@ s%2addq %1,%3,%0 s%2subq %1,%n3,%0") -;; These variants of the above insns can occur if the third operand -;; is the frame pointer. This is a kludge, but there doesn't -;; seem to be a way around it. Only recognize them while reloading. - -(define_insn "" - [(set (match_operand:DI 0 "some_operand" "=&r") - (plus:DI (plus:DI (match_operand:DI 1 "some_operand" "r") - (match_operand:DI 2 "some_operand" "r")) - (match_operand:DI 3 "some_operand" "rIOKL")))] - "reload_in_progress" - "#") - -(define_split - [(set (match_operand:DI 0 "register_operand" "") - (plus:DI (plus:DI (match_operand:DI 1 "register_operand" "") - (match_operand:DI 2 "register_operand" "")) - (match_operand:DI 3 "add_operand" "")))] - "reload_completed" - [(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 2))) - (set (match_dup 0) (plus:DI (match_dup 0) (match_dup 3)))] - "") - -(define_insn "" - [(set (match_operand:SI 0 "some_operand" "=&r") - (plus:SI (plus:SI (mult:SI (match_operand:SI 1 "some_operand" "rJ") - (match_operand:SI 2 "const48_operand" "I")) - (match_operand:SI 3 "some_operand" "r")) - (match_operand:SI 4 "some_operand" "rIOKL")))] - "reload_in_progress" - "#") - -(define_split - [(set (match_operand:SI 0 "register_operand" "r") - (plus:SI (plus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "") - (match_operand:SI 2 "const48_operand" "")) - (match_operand:SI 3 "register_operand" "")) - (match_operand:SI 4 "add_operand" "rIOKL")))] - "reload_completed" - [(set (match_dup 0) - (plus:SI (mult:SI (match_dup 1) (match_dup 2)) (match_dup 3))) - (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 4)))] - "") - -(define_insn "" - [(set (match_operand:DI 0 "some_operand" "=&r") - (sign_extend:DI - (plus:SI (plus:SI - (mult:SI (match_operand:SI 1 "some_operand" "rJ") - (match_operand:SI 2 "const48_operand" "I")) - (match_operand:SI 3 "some_operand" "r")) - (match_operand:SI 4 "some_operand" "rIOKL"))))] - "reload_in_progress" - "#") - -(define_split - [(set (match_operand:DI 0 "register_operand" "") - (sign_extend:DI - (plus:SI (plus:SI - (mult:SI (match_operand:SI 1 "reg_or_0_operand" "") - (match_operand:SI 2 "const48_operand" "")) - (match_operand:SI 3 "register_operand" "")) - (match_operand:SI 4 "add_operand" ""))))] - "reload_completed" - [(set (match_dup 5) - (plus:SI (mult:SI (match_dup 1) (match_dup 2)) (match_dup 3))) - (set (match_dup 0) (sign_extend:DI (plus:SI (match_dup 5) (match_dup 4))))] - "operands[5] = gen_lowpart (SImode, operands[0]);") - -(define_insn "" - [(set (match_operand:DI 0 "some_operand" "=&r") - (plus:DI (plus:DI (mult:DI (match_operand:DI 1 "some_operand" "rJ") - (match_operand:DI 2 "const48_operand" "I")) - (match_operand:DI 3 "some_operand" "r")) - (match_operand:DI 4 "some_operand" "rIOKL")))] - "reload_in_progress" - "#") - -(define_split - [(set (match_operand:DI 0 "register_operand" "=") - (plus:DI (plus:DI (mult:DI (match_operand:DI 1 "reg_or_0_operand" "") - (match_operand:DI 2 "const48_operand" "")) - (match_operand:DI 3 "register_operand" "")) - (match_operand:DI 4 "add_operand" "")))] - "reload_completed" - [(set (match_dup 0) - (plus:DI (mult:DI (match_dup 1) (match_dup 2)) (match_dup 3))) - (set (match_dup 0) (plus:DI (match_dup 0) (match_dup 4)))] - "") - (define_insn "negsi2" [(set (match_operand:SI 0 "register_operand" "=r") (neg:SI (match_operand:SI 1 "reg_or_8bit_operand" "rI")))] diff --git a/gcc/config/alpha/vms.h b/gcc/config/alpha/vms.h index 44388b2cf33..4d9bb1bd194 100644 --- a/gcc/config/alpha/vms.h +++ b/gcc/config/alpha/vms.h @@ -143,7 +143,7 @@ Boston, MA 02111-1307, USA. */ Thus 6 or more means all following args should go on the stack. */ enum avms_arg_type {I64, FF, FD, FG, FS, FT}; -typedef struct {char num_args; enum avms_arg_type atypes[6];} avms_arg_info; +typedef struct {int num_args; enum avms_arg_type atypes[6];} avms_arg_info; #undef CUMULATIVE_ARGS #define CUMULATIVE_ARGS avms_arg_info @@ -185,12 +185,12 @@ extern struct rtx_def *alpha_arg_info_reg_val (); #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ((MODE) == VOIDmode ? alpha_arg_info_reg_val (CUM) \ : ((CUM.num_args) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \ - ? gen_rtx(REG, (MODE), \ - ((CUM).num_args + 16 \ - + ((TARGET_FPREGS \ - && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \ - || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ - * 32))) \ + ? gen_rtx_REG ((MODE), \ + ((CUM).num_args + 16 \ + + ((TARGET_FPREGS \ + && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \ + || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ + * 32))) \ : 0)) #undef FUNCTION_ARG_ADVANCE @@ -242,7 +242,7 @@ extern struct rtx_def *alpha_arg_info_reg_val (); { \ if (! (NO_RTL)) \ { \ - emit_move_insn (gen_rtx (REG, DImode, 1), \ + emit_move_insn (gen_rtx_REG (DImode, 1), \ virtual_incoming_args_rtx); \ emit_insn (gen_arg_home ()); \ } \ diff --git a/gcc/config/alpha/x-alpha b/gcc/config/alpha/x-alpha index 9686ab96472..61ed8b0950d 100644 --- a/gcc/config/alpha/x-alpha +++ b/gcc/config/alpha/x-alpha @@ -1,2 +1,2 @@ -CLIB=-lmld +CLIB=-lmld -lexc EXTRA_HEADERS = $(srcdir)/config/alpha/va_list.h diff --git a/gcc/config/alpha/xm-alpha.h b/gcc/config/alpha/xm-alpha.h index c04844fdacd..91e2edee9ad 100644 --- a/gcc/config/alpha/xm-alpha.h +++ b/gcc/config/alpha/xm-alpha.h @@ -1,5 +1,5 @@ /* Configuration for GNU C-compiler for DEC Alpha. - Copyright (C) 1990, 1992, 1993, 1994, 1995 Free Software Foundation, Inc. + Copyright (C) 1990, 92, 93, 94, 95, 1998 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu). This file is part of GNU CC. @@ -61,16 +61,6 @@ extern void *alloca (); #define ONLY_INT_FIELDS #endif -/* Declare some functions needed for this machine. We don't want to - include these in the sources since other machines might define them - differently. */ - -extern void *malloc (), *realloc (), *calloc (); - -#ifndef inhibit_libc -#include "string.h" -#endif - /* OSF/1 is POSIX.1 compliant. */ #define POSIX diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 39b6cef2e0c..c5638f1f753 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on the Argonaut ARC cpu. - Copyright (C) 1994, 1995, 1997, 1999 Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1997, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -20,8 +20,8 @@ Boston, MA 02111-1307, USA. */ /* ??? This is an old port, and is undoubtedly suffering from bit rot. */ -#include <stdio.h> #include "config.h" +#include "system.h" #include "tree.h" #include "rtl.h" #include "regs.h" @@ -707,10 +707,10 @@ gen_compare_reg (code, x, y) enum machine_mode mode = SELECT_CC_MODE (code, x, y); rtx cc_reg; - cc_reg = gen_rtx (REG, mode, 61); + cc_reg = gen_rtx_REG (mode, 61); - emit_insn (gen_rtx (SET, VOIDmode, cc_reg, - gen_rtx (COMPARE, mode, x, y))); + emit_insn (gen_rtx_SET (VOIDmode, cc_reg, + gen_rtx_COMPARE (mode, x, y))); return cc_reg; } @@ -786,12 +786,11 @@ arc_setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) int align_slop = size & 1; rtx regblock; - regblock = gen_rtx (MEM, BLKmode, - plus_constant (arg_pointer_rtx, - FIRST_PARM_OFFSET (0) - + align_slop * UNITS_PER_WORD)); + regblock = gen_rtx_MEM (BLKmode, + plus_constant (arg_pointer_rtx, + FIRST_PARM_OFFSET (0) + + align_slop * UNITS_PER_WORD)); MEM_ALIAS_SET (regblock) = get_varargs_alias_set (); - move_block_from_reg (first_reg_offset, regblock, MAX_ARC_PARM_REGS - first_reg_offset, ((MAX_ARC_PARM_REGS - first_reg_offset) diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h index 10a163bad9a..8135198e312 100644 --- a/gcc/config/arc/arc.h +++ b/gcc/config/arc/arc.h @@ -601,10 +601,12 @@ extern enum reg_class arc_regno_reg_class[]; farther back is at [%fp,4]. */ #if 0 /* The default value should work. */ #define RETURN_ADDR_RTX(COUNT, FRAME) \ -(((COUNT) == -1) \ - ? gen_rtx (REG, Pmode, 31) \ - : copy_to_reg (gen_rtx (MEM, Pmode, \ - memory_address (Pmode, plus_constant ((FRAME), UNITS_PER_WORD))))) +(((COUNT) == -1) \ + ? gen_rtx_REG (Pmode, 31) \ + : copy_to_reg (gen_rtx_MEM (Pmode, \ + memory_address (Pmode, \ + plus_constant ((FRAME), \ + UNITS_PER_WORD))))) #endif /* Register to use for pushing function arguments. */ @@ -722,7 +724,7 @@ extern enum reg_class arc_regno_reg_class[]; and the rest are pushed. */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \ - ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ + ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ : 0) /* A C expression for the number of words, at the beginning of an @@ -812,11 +814,11 @@ arc_setup_incoming_varargs(&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL) VALTYPE is the data type of the value (as a tree). If the precise function being called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */ -#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), 0) +#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value as seen by the caller. */ @@ -909,9 +911,9 @@ do { \ CXT is an RTX for the static chain value for the function. */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ do { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), FNADDR); \ - emit_insn (gen_flush_icache (validize_mem (gen_rtx (MEM, SImode, TRAMP)))); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), FNADDR); \ + emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \ } while (0) /* Library calls. */ diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index b4c86ba8b62..89ebc8ed9be 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -1,5 +1,5 @@ ;; Machine description of the Argonaut ARC cpu for GNU C compiler -;; Copyright (C) 1994, 1997, 1999 Free Software Foundation, Inc. +;; Copyright (C) 1994, 1997, 1998, 1999 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -304,7 +304,7 @@ ;{ ; /* Flow doesn't understand that this is effectively a DFmode move. ; It doesn't know that all of `operands[0]' is set. */ -; emit_insn (gen_rtx (CLOBBER, VOIDmode, operands[0])); +; emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); ; ; /* Emit insns that movsi_insn can handle. */ ; emit_insn (gen_movsi (operand_subword (operands[0], 0, 0, DImode), @@ -407,7 +407,7 @@ ;{ ; /* Flow doesn't understand that this is effectively a DFmode move. ; It doesn't know that all of `operands[0]' is set. */ -; emit_insn (gen_rtx (CLOBBER, VOIDmode, operands[0])); +; emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); ; ; /* Emit insns that movsi_insn can handle. */ ; emit_insn (gen_movsi (operand_subword (operands[0], 0, 0, DFmode), @@ -586,9 +586,9 @@ " { enum rtx_code code = GET_CODE (operands[1]); - rtx ccreg = gen_rtx (REG, - SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), - 61); + rtx ccreg + = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), + 61); operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); }") @@ -602,14 +602,14 @@ ; " ;{ ; enum rtx_code code = GET_CODE (operands[1]); -; rtx ccreg = gen_rtx (REG, -; SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), -; 61); +; rtx ccreg +; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), +; 61); ; ; operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); -;}") - +}") (define_expand "movsfcc" + [(set (match_operand:SF 0 "register_operand" "") (if_then_else (match_operand 1 "comparison_operator" "") (match_operand:SF 2 "nonmemory_operand" "") @@ -618,9 +618,9 @@ " { enum rtx_code code = GET_CODE (operands[1]); - rtx ccreg = gen_rtx (REG, - SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), - 61); + rtx ccreg + = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), + 61); operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); }") @@ -633,13 +633,13 @@ ; "0 /* ??? can generate less efficient code if constants involved */" ; " ;{ -; enum rtx_code code = GET_CODE (operands[1]); -; rtx ccreg = gen_rtx (REG, -; SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), -; 61); +; enum rtx_code code = GET_CODE (operands[1]); +; rtx ccreg +; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1), +; 61); ; ; operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx); -;}") +}") (define_insn "*movsicc_insn" [(set (match_operand:SI 0 "register_operand" "=r") @@ -1060,12 +1060,14 @@ { if (! TARGET_SHIFTER) { - emit_insn (gen_rtx - (PARALLEL, VOIDmode, + emit_insn (gen_rtx_PARALLEL + (VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (ASHIFT, SImode, operands[1], operands[2])), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0))))); + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_ASHIFT (SImode, operands[1], + operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (SImode))))); DONE; } }") @@ -1079,12 +1081,15 @@ { if (! TARGET_SHIFTER) { - emit_insn (gen_rtx - (PARALLEL, VOIDmode, + emit_insn (gen_rtx_PARALLEL + (VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (ASHIFTRT, SImode, operands[1], operands[2])), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0))))); + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_ASHIFTRT (SImode, + operands[1], + operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (SImode))))); DONE; } }") @@ -1098,12 +1103,15 @@ { if (! TARGET_SHIFTER) { - emit_insn (gen_rtx - (PARALLEL, VOIDmode, + emit_insn (gen_rtx_PARALLEL + (VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (LSHIFTRT, SImode, operands[1], operands[2])), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0))))); + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_LSHIFTRT (SImode, + operands[1], + operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (SImode))))); DONE; } }") diff --git a/gcc/config/clipper/clipper.c b/gcc/config/clipper/clipper.c index d9f00c84ff1..c76570e2e13 100644 --- a/gcc/config/clipper/clipper.c +++ b/gcc/config/clipper/clipper.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Clipper - Copyright (C) 1987, 1988, 1991, 1997, 1999 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 91, 97, 98, 1999 Free Software Foundation, Inc. Contributed by Holger Teutsch (holger@hotbso.rhein-main.de) This file is part of GNU CC. @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -43,16 +43,14 @@ extern int frame_pointer_needed; static int frame_size; -/* - * compute size of a clipper stack frame where 'lsize' is the required - * space for local variables. - */ +/* Compute size of a clipper stack frame where 'lsize' is the required + space for local variables. */ int clipper_frame_size (lsize) int lsize; { - int i,size; /* total size of frame */ + int i, size; /* total size of frame */ int save_size; save_size = 0; /* compute size for reg saves */ @@ -70,17 +68,15 @@ clipper_frame_size (lsize) return size; } -/* - * prologue and epilogue output - * function is entered with pc pushed, i.e. stack is 32 bit aligned - * - * current_function_args_size == 0 means that the current function's args - * are passed totally in registers i.e fp is not used as ap. - * If frame_size is also 0 the current function does not push anything and - * can run with misaligned stack -> subq $4,sp / add $4,sp on entry and exit - * can be omitted. - * - */ +/* Prologue and epilogue output + Function is entered with pc pushed, i.e. stack is 32 bit aligned + + current_function_args_size == 0 means that the current function's args + are passed totally in registers i.e fp is not used as ap. + If frame_size is also 0 the current function does not push anything and + can run with misaligned stack -> subq $4,sp / add $4,sp on entry and exit + can be omitted. */ + void output_function_prologue (file, lsize) FILE *file; diff --git a/gcc/config/clipper/clipper.h b/gcc/config/clipper/clipper.h index ab76541408b..e73ebfcc586 100644 --- a/gcc/config/clipper/clipper.h +++ b/gcc/config/clipper/clipper.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Clipper version. - Copyright (C) 1987, 88, 91, 93-96, 1999 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 91, 93-96, 1998, 1999 Free Software Foundation, Inc. Contributed by Holger Teutsch (holger@hotbso.rhein-main.de) This file is part of GNU CC. @@ -393,15 +393,15 @@ enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES}; otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\ - TYPE_MODE (VALTYPE) == DFmode) ? \ - 16 : 0)) + gen_rtx_REG (TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\ + TYPE_MODE (VALTYPE) == DFmode) ? \ + 16 : 0)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), ((MODE) == SFmode || (MODE) == DFmode ? 16 : 0)) + gen_rtx_REG ((MODE), ((MODE) == SFmode || (MODE) == DFmode ? 16 : 0)) /* 1 if N is a possible register number for a function value @@ -527,8 +527,9 @@ do \ && (GET_MODE_SIZE (MODE) <= 8) \ && ((TYPE) == NULL || !AGGREGATE_TYPE_P(TYPE)) \ && ((MODE) != DImode || (CUM).num == 0)) \ - ? gen_rtx (REG, (MODE), \ - GET_MODE_CLASS(MODE) == MODE_FLOAT ? (CUM).num+16 : (CUM).num) \ + ? gen_rtx_REG ((MODE), \ + GET_MODE_CLASS(MODE) == MODE_FLOAT \ + ? (CUM).num+16 : (CUM).num) \ : 0) /* If defined, a C expression that gives the alignment boundary, in bits, @@ -633,8 +634,8 @@ do \ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 24)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 28)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 24)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 28)), FNADDR); \ } /* Addressing modes, and classification of registers for them. */ diff --git a/gcc/config/clipper/clipper.md b/gcc/config/clipper/clipper.md index 87f30fa5d0a..efe26a995f3 100644 --- a/gcc/config/clipper/clipper.md +++ b/gcc/config/clipper/clipper.md @@ -1,5 +1,6 @@ ;;- Machine description for GNU compiler, Clipper Version -;; Copyright (C) 1987, 88, 91, 93, 94, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1987, 88, 91, 93, 94, 97, 98, 1999 +;; Free Software Foundation, Inc. ;; Contributed by Holger Teutsch (holger@hotbso.rhein-main.de) ;; This file is part of GNU CC. @@ -178,7 +179,7 @@ { rtx xops[4]; xops[0] = operands[0]; - xops[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xops[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xops[2] = operands[1]; xops[3] = adj_offsettable_operand (operands[1], 4); output_asm_insn (\"loadw %2,%0\;loadw %3,%1\", xops); @@ -189,9 +190,9 @@ { rtx xops[4]; xops[0] = operands[0]; - xops[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xops[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xops[2] = operands[1]; - xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"movw %2,%0\;movw %3,%1\", xops); return \"\"; } @@ -215,7 +216,7 @@ xops[0] = operands[0]; /* r -> o */ xops[1] = adj_offsettable_operand (operands[0], 4); xops[2] = operands[1]; - xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"storw %2,%0\;storw %3,%1\", xops); return \"\"; }" @@ -317,12 +318,12 @@ { rtx xoperands[2],yoperands[2]; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (which_alternative == 0) /* r -> r */ { output_asm_insn (\"movw %1,%0\", operands); - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"movw %1,%0\", xoperands); return \"\"; } @@ -366,7 +367,7 @@ xops[0] = operands[0]; xops[1] = adj_offsettable_operand (operands[0], 4); xops[2] = operands[1]; - xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"storw %2,%0\;storw %3,%1\", xops); return \"\"; }" @@ -696,9 +697,9 @@ rtx xoperands[4]; xoperands[0] = operands[0]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xoperands[2] = operands[2]; - xoperands[3] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[3] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); output_asm_insn (\"addw %2,%0\;addwc %3,%1\", xoperands); return \"\"; }" @@ -767,9 +768,9 @@ rtx xoperands[4]; xoperands[0] = operands[0]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xoperands[2] = operands[2]; - xoperands[3] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[3] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); output_asm_insn (\"subw %2,%0\;subwc %3,%1\", xoperands); return \"\"; }" @@ -991,7 +992,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1018,7 +1019,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1088,7 +1089,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1115,7 +1116,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1146,7 +1147,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1173,7 +1174,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" diff --git a/gcc/config/convex/convex.c b/gcc/config/convex/convex.c index 1a588e034c5..63de08cc8ea 100644 --- a/gcc/config/convex/convex.c +++ b/gcc/config/convex/convex.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Convex. - Copyright (C) 1988, 1993, 1994, 1997 Free Software Foundation, Inc. + Copyright (C) 1988, 93, 94, 97, 98, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -19,7 +19,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "tree.h" #include "rtl.h" #include "regs.h" @@ -360,8 +360,8 @@ expand_movstr (operands) dest = change_address (dest, mode, 0); /* Make load and store patterns for this piece */ - load = gen_rtx (SET, VOIDmode, reg, src); - store = gen_rtx (SET, VOIDmode, dest, reg); + load = gen_rtx_SET (VOIDmode, reg, src); + store = gen_rtx_SET (VOIDmode, dest, reg); /* Emit the load and the store from last time. When we emit a store, we can reuse its temp reg. */ @@ -398,7 +398,7 @@ static void expand_movstr_call (operands) rtx *operands; { - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0, + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0, VOIDmode, 3, XEXP (operands[0], 0), Pmode, XEXP (operands[1], 0), Pmode, diff --git a/gcc/config/convex/convex.md b/gcc/config/convex/convex.md index cb6f64dc39b..fc6ce66be23 100644 --- a/gcc/config/convex/convex.md +++ b/gcc/config/convex/convex.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, Convex Version -;; Copyright (C) 1988, 1994, 1995 Free Software Foundation, Inc. +;; Copyright (C) 1988, 1994, 1995, 1998, 1999 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -1518,7 +1518,7 @@ } else { - output_cmp (gen_rtx (REG, SImode, 7), constm1_rtx, 'W'); + output_cmp (gen_rtx_REG (SImode, 7), constm1_rtx, 'W'); return \"psh.w s7\;ld.w %0,s7\;add.w #-1,s7\;st.w s7,%0\;pop.w s7\"; } }") @@ -1540,7 +1540,7 @@ } else { - output_cmp (gen_rtx (REG, SImode, 7), const0_rtx, 'W'); + output_cmp (gen_rtx_REG (SImode, 7), const0_rtx, 'W'); return \"psh.w s7\;ld.w %0,s7\;add.w #-1,s7\;st.w s7,%0\;pop.w s7\"; } }") @@ -1561,7 +1561,7 @@ } else { - output_cmp (gen_rtx (REG, HImode, 7), constm1_rtx, 'H'); + output_cmp (gen_rtx_REG (HImode, 7), constm1_rtx, 'H'); return \"psh.w s7\;ld.h %0,s7\;add.h #-1,s7\;st.h s7,%0\;pop.w s7\"; } }") @@ -1583,7 +1583,7 @@ } else { - output_cmp (gen_rtx (REG, HImode, 7), const0_rtx, 'H'); + output_cmp (gen_rtx_REG (HImode, 7), const0_rtx, 'H'); return \"psh.w s7\;ld.h %0,s7\;add.h #-1,s7\;st.h s7,%0\;pop.w s7\"; } }") diff --git a/gcc/config/dsp16xx/dsp16xx.c b/gcc/config/dsp16xx/dsp16xx.c index b1a1a1c7b29..cac77af4294 100644 --- a/gcc/config/dsp16xx/dsp16xx.c +++ b/gcc/config/dsp16xx/dsp16xx.c @@ -21,7 +21,7 @@ Boston, MA 02111-1307, USA. */ /* Some output-actions in dsp1600.md need these. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -1795,10 +1795,11 @@ enum machine_mode mode; quotient = shift_amount/16; shift_amount = shift_amount - (quotient * 16); for (i = 0; i < quotient; i++) - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (shift_op, mode, - first_shift_emitted ? operands[0] : operands[1], - GEN_INT (16)))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (shift_op, mode, + first_shift_emitted + ? operands[0] : operands[1], + GEN_INT (16)))); first_shift_emitted = 1; } else if (shift_amount/8) @@ -1806,10 +1807,11 @@ enum machine_mode mode; quotient = shift_amount/8; shift_amount = shift_amount - (quotient * 8); for (i = 0; i < quotient; i++) - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (shift_op, mode, - first_shift_emitted ? operands[0] : operands[1], - GEN_INT (8)))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (shift_op, mode, + first_shift_emitted + ? operands[0] : operands[1], + GEN_INT (8)))); first_shift_emitted = 1; } else if (shift_amount/4) @@ -1817,10 +1819,11 @@ enum machine_mode mode; quotient = shift_amount/4; shift_amount = shift_amount - (quotient * 4); for (i = 0; i < quotient; i++) - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (shift_op, mode, - first_shift_emitted ? operands[0] : operands[1], - GEN_INT (4)))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (shift_op, mode, + first_shift_emitted + ? operands[0] : operands[1], + GEN_INT (4)))); first_shift_emitted = 1; } else if (shift_amount/1) @@ -1828,10 +1831,11 @@ enum machine_mode mode; quotient = shift_amount/1; shift_amount = shift_amount - (quotient * 1); for (i = 0; i < quotient; i++) - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (shift_op, mode, - first_shift_emitted ? operands[0] : operands[1], - GEN_INT (1)))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (shift_op, mode, + first_shift_emitted + ? operands[0] : operands[1], + GEN_INT (1)))); first_shift_emitted = 1; } } @@ -2085,7 +2089,7 @@ dsp16xx_function_arg (args_so_far, mode, type, named) args_so_far++; if (named && args_so_far < 4 && !MUST_PASS_IN_STACK (mode,type)) - return gen_rtx (REG, mode, args_so_far + FIRST_REG_FOR_FUNCTION_ARG); + return gen_rtx_REG (mode, args_so_far + FIRST_REG_FOR_FUNCTION_ARG); else return (struct rtx_def *) 0; } @@ -2135,14 +2139,14 @@ gen_tst_reg (x) if (mode == QImode) { - emit_insn (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (2, - gen_rtx (SET, VOIDmode, cc0_rtx, x), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, QImode, 0))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, gen_rtx_SET (VOIDmode, cc0_rtx, x), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode))))); } else if (mode == HImode) - emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, x)); + emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, x)); else fatal ("Invalid mode for gen_tst_reg"); @@ -2165,54 +2169,64 @@ gen_compare_reg (code, x, y) if (mode == QImode) { - if (code == GTU || code == GEU || - code == LTU || code == LEU) + if (code == GTU || code == GEU + || code == LTU || code == LEU) { - emit_insn (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (3, - gen_rtx (SET, VOIDmode, cc0_rtx, - gen_rtx (COMPARE, mode, x, y)), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, QImode, 0)), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, QImode, 0))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (3, + gen_rtx_SET (VOIDmode, cc0_rtx, + gen_rtx_COMPARE (mode, x, y)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode))))); } else { - emit_insn (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (3, - gen_rtx (SET, VOIDmode, cc0_rtx, - gen_rtx (COMPARE, mode, x, y)), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, QImode, 0)), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, QImode, 0))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (3, gen_rtx_SET (VOIDmode, cc0_rtx, + gen_rtx_COMPARE (mode, x, y)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode))))); } } else if (mode == HImode) { - if (code == GTU || code == GEU || - code == LTU || code == LEU) + if (code == GTU || code == GEU + || code == LTU || code == LEU) { #if 1 - emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (5, - gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, x, y)), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (5, + gen_rtx_SET (VOIDmode, cc0_rtx, + gen_rtx_COMPARE (VOIDmode, + x, y)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode))))); #else if (!dsp16xx_ucmphi2_libcall) - dsp16xx_ucmphi2_libcall = gen_rtx (SYMBOL_REF, Pmode, UCMPHI2_LIBCALL); + dsp16xx_ucmphi2_libcall = gen_rtx_SYMBOL_REF (Pmode, UCMPHI2_LIBCALL); emit_library_call (dsp16xx_ucmphi2_libcall, 1, HImode, 2, x, HImode, y, HImode); emit_insn (gen_tsthi_1 (copy_to_reg(hard_libcall_value (HImode)))); #endif } else - emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, - gen_rtx (COMPARE, VOIDmode, force_reg(HImode, x), - force_reg(HImode,y)))); + emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, + gen_rtx_COMPARE (VOIDmode, + force_reg (HImode, x), + force_reg (HImode,y)))); } else fatal ("Invalid mode for integer comparison in gen_compare_reg"); diff --git a/gcc/config/dsp16xx/dsp16xx.md b/gcc/config/dsp16xx/dsp16xx.md index 6029489628b..5ded3bb956a 100644 --- a/gcc/config/dsp16xx/dsp16xx.md +++ b/gcc/config/dsp16xx/dsp16xx.md @@ -195,8 +195,8 @@ if (GET_CODE(operands[1]) == REG) { - if (REGNO (operands[1]) == REG_Y || - REGNO (operands[1]) == REG_PROD) + if (REGNO (operands[1]) == REG_Y + || REGNO (operands[1]) == REG_PROD) { output_asm_insn (\"a1=%1\", operands); } @@ -1049,11 +1049,13 @@ emit_move_insn (operands[0], addr_reg); /* Then generate the add insn */ - emit_insn (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (PLUS, QImode, operands[0], offset)), - gen_rtx (CLOBBER, VOIDmode, operands[2])))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_PLUS (QImode, operands[0], + offset)), + gen_rtx_CLOBBER (VOIDmode, operands[2])))); DONE; }") @@ -1251,7 +1253,7 @@ " { operands[2] = gen_reg_rtx (HImode); - operands[3] = gen_rtx (SUBREG, QImode, operands[2], 1); + operands[3] = gen_rtx_SUBREG (QImode, operands[2], 1); }") ;;(define_insn "extendqihi2" @@ -1301,7 +1303,7 @@ " { operands[2] = gen_reg_rtx (HImode); - operands[3] = gen_rtx (SUBREG, QImode, operands[2], 1); + operands[3] = gen_rtx_SUBREG (QImode, operands[2], 1); }") @@ -1357,8 +1359,8 @@ emit_jump_insn (gen_bge (label1)); emit_insn (gen_fix_trunchfhi2 (operands[0], operands[1])); - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (LABEL_REF, VOIDmode, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_LABEL_REF (VOIDmode, label2))); emit_barrier (); emit_label (label1); @@ -1372,7 +1374,7 @@ /* allow REG_NOTES to be set on last insn (labels don't have enough fields, and can't be used for REG_NOTES anyway). */ - emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); DONE; } }") @@ -1438,7 +1440,8 @@ #if 0 if (!dsp16xx_ashrhi3_libcall) - dsp16xx_ashrhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, ASHRHI3_LIBCALL); + dsp16xx_ashrhi3_libcall + = gen_rtx_SYMBOL_REF (Pmode, ASHRHI3_LIBCALL); emit_library_call (dsp16xx_ashrhi3_libcall, 1, HImode, 2, operands[1], HImode, @@ -1562,7 +1565,8 @@ rtx label2 = gen_label_rtx (); #if 0 if (!dsp16xx_lshrhi3_libcall) - dsp16xx_lshrhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, LSHRHI3_LIBCALL); + dsp16xx_lshrhi3_libcall + = gen_rtx_SYMBOL_REF (Pmode, LSHRHI3_LIBCALL); emit_library_call (dsp16xx_lshrhi3_libcall, 1, HImode, 2, operands[1], HImode, @@ -1704,11 +1708,11 @@ rtx label2 = gen_label_rtx (); #if 0 if (!dsp16xx_ashlhi3_libcall) - dsp16xx_ashlhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, ASHLHI3_LIBCALL); + dsp16xx_ashlhi3_libcall + = gen_rtx_SYMBOL_REF (Pmode, ASHLHI3_LIBCALL); emit_library_call (dsp16xx_ashlhi3_libcall, 1, HImode, 2, - operands[1], HImode, - operands[2], QImode); + operands[1], HImode, operands[2], QImode); emit_move_insn (operands[0], hard_libcall_value(HImode)); DONE; #else @@ -2028,8 +2032,8 @@ { if (GET_CODE (operands[0]) == MEM && ! call_address_operand (XEXP (operands[0], 0), QImode)) - operands[0] = gen_rtx (MEM, GET_MODE (operands[0]), - force_reg (Pmode, XEXP (operands[0], 0))); + operands[0] = gen_rtx_MEM (GET_MODE (operands[0]), + force_reg (Pmode, XEXP (operands[0], 0))); }") (define_insn "" @@ -2059,8 +2063,8 @@ { if (GET_CODE (operands[1]) == MEM && ! call_address_operand (XEXP (operands[1], 0), QImode)) - operands[1] = gen_rtx (MEM, GET_MODE (operands[1]), - force_reg (Pmode, XEXP (operands[1], 0))); + operands[1] = gen_rtx_MEM (GET_MODE (operands[1]), + force_reg (Pmode, XEXP (operands[1], 0))); }") (define_insn "" diff --git a/gcc/config/elxsi/elxsi.c b/gcc/config/elxsi/elxsi.c index 5526beb6b4f..8362e48b763 100644 --- a/gcc/config/elxsi/elxsi.c +++ b/gcc/config/elxsi/elxsi.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for GNU compiler. Elxsi version. - Copyright (C) 1987, 1992, 1997 Free Software Foundation, Inc - This port, done by Mike Stump <mrs@cygnus.com> in 1988, and is the first + Copyright (C) 1987, 1992, 1998, 1999 Free Software Foundation, Inc + Contributrd by Mike Stump <mrs@cygnus.com> in 1988 and is the first 64 bit port of GNU CC. Based upon the VAX port. @@ -22,7 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "function.h" diff --git a/gcc/config/elxsi/elxsi.h b/gcc/config/elxsi/elxsi.h index b38af880fd7..06e83f89f58 100644 --- a/gcc/config/elxsi/elxsi.h +++ b/gcc/config/elxsi/elxsi.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. Elxsi version. - Copyright (C) 1987, 1988, 1992, 1995, 1996 Free Software Foundation, Inc. - This port, contributed by Mike Stump <mrs@cygnus.com> in 1988, is the first + Copyright (C) 1987, 88, 92, 95, 96, 1998, 1999 Free Software Foundation, Inc. + Contributed by Mike Stump <mrs@cygnus.com> in 1988. This is the first 64 bit port of GNU CC. Based upon the VAX port. @@ -319,14 +319,14 @@ enum reg_class { NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES }; /* On the Vax the return value is in R0 regardless. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ /* On the Vax the return value is in R0 regardless. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* Define this if PCC uses the nonreentrant convention for returning structure and union values. */ @@ -481,11 +481,11 @@ enum reg_class { NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES }; else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \ { rtx other_reg = XEXP (ADDR, 1); \ offset = 0; \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \ { rtx other_reg = XEXP (ADDR, 0); \ offset = 0; \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ if (offset >= 0) \ { int regno; \ extern char call_used_regs[]; \ diff --git a/gcc/config/fx80/fx80.c b/gcc/config/fx80/fx80.c index 48658e24fec..81d637e18f6 100644 --- a/gcc/config/fx80/fx80.c +++ b/gcc/config/fx80/fx80.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Alliant FX computers. - Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 1991, 1997, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -21,7 +21,7 @@ Boston, MA 02111-1307, USA. */ /* Some output-actions in alliant.md need these. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -153,14 +153,14 @@ output_move_double (operands) { operands[0] = XEXP (XEXP (operands[0], 0), 0); output_asm_insn ("subq%.l %#8,%0", operands); - operands[0] = gen_rtx (MEM, DImode, operands[0]); + operands[0] = gen_rtx_MEM (DImode, operands[0]); optype0 = OFFSOP; } if (optype0 == POPOP && optype1 == PUSHOP) { operands[1] = XEXP (XEXP (operands[1], 0), 0); output_asm_insn ("subq%.l %#8,%1", operands); - operands[1] = gen_rtx (MEM, DImode, operands[1]); + operands[1] = gen_rtx_MEM (DImode, operands[1]); optype1 = OFFSOP; } @@ -183,14 +183,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) diff --git a/gcc/config/fx80/fx80.h b/gcc/config/fx80/fx80.h index b69f0b06fb4..c416d5c8765 100644 --- a/gcc/config/fx80/fx80.h +++ b/gcc/config/fx80/fx80.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Alliant FX version. - Copyright (C) 1989, 1993, 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1989, 93, 94, 95, 96, 1998, 1999 Free Software Foundation, Inc. Adapted from m68k.h by Paul Petersen (petersen@uicsrd.csrd.uiuc.edu) and Joe Weening (weening@gang-of-four.stanford.edu). @@ -453,8 +453,8 @@ extern enum reg_class regno_reg_class[]; #define FUNCTION_VALUE(VALTYPE, FUNC) \ (TREE_CODE (VALTYPE) == REAL_TYPE \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \ - : gen_rtx (REG, TYPE_MODE (VALTYPE), 0)) + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \ + : gen_rtx_REG (TYPE_MODE (VALTYPE), 0)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ @@ -467,8 +467,8 @@ extern enum reg_class regno_reg_class[]; #define LIBCALL_VALUE(MODE) \ (((MODE) == DFmode || (MODE) == SFmode) \ - ? gen_rtx (REG, MODE, 16) \ - : gen_rtx (REG, MODE, 0)) + ? gen_rtx_REG (MODE, 16) \ + : gen_rtx_REG (MODE, 0)) /* 1 if N is a possible register number for a function value. On the Alliant, D0 and FP0 are the only registers thus used. diff --git a/gcc/config/fx80/fx80.md b/gcc/config/fx80/fx80.md index cec863bfd6f..6fffb163c39 100644 --- a/gcc/config/fx80/fx80.md +++ b/gcc/config/fx80/fx80.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU C compiler for Alliant FX systems -;; Copyright (C) 1989, 1994, 1996 Free Software Foundation, Inc. +;; Copyright (C) 1989, 1994, 1996, 1998, 1999 Free Software Foundation, Inc. ;; Adapted from m68k.md by Paul Petersen (petersen@uicsrd.csrd.uiuc.edu) ;; and Joe Weening (weening@gang-of-four.stanford.edu). @@ -415,8 +415,7 @@ { xoperands[1] = operands[1]; xoperands[2] - = gen_rtx (MEM, QImode, - gen_rtx (PLUS, VOIDmode, stack_pointer_rtx, const1_rtx)); + = gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 1)); xoperands[3] = stack_pointer_rtx; /* Just pushing a byte puts it in the high byte of the halfword. */ /* We must put it in the low half, the second byte. */ @@ -428,8 +427,7 @@ xoperands[0] = operands[0]; xoperands[1] = operands[1]; xoperands[2] - = gen_rtx (MEM, QImode, - gen_rtx (PLUS, VOIDmode, stack_pointer_rtx, const1_rtx)); + = gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 1)); xoperands[3] = stack_pointer_rtx; output_asm_insn (\"mov%.w %1,%-\;mov%.b %2,%0\;addq%.w %#2,%3\", xoperands); return \"\"; @@ -537,7 +535,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"mov%.l %1,%-\", xoperands); output_asm_insn (\"mov%.l %1,%-\", operands); return \"fmove%.d %+,%0\"; @@ -549,7 +547,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"fmove%.d %1,%-\;mov%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"mov%.l %+,%0\"; } return \"fmove%.d %1,%0\"; @@ -570,7 +568,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"mov%.l %1,%-\", xoperands); output_asm_insn (\"mov%.l %1,%-\", operands); return \"fmove%.d %+,%0\"; @@ -582,7 +580,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"fmove%.d %1,%-\;mov%.l %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"mov%.l %+,%0\"; } return \"fmove%.d %1,%0\"; @@ -1395,7 +1393,8 @@ operands[1] = GEN_INT (logval); else { - operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8)); + operands[0] + = adj_offsettable_operand (operands[0], 3 - (logval / 8)); operands[1] = GEN_INT (logval % 8); } return \"bset %1,%0\"; @@ -1896,10 +1895,8 @@ && GET_CODE (operands[2]) == CONST_INT) { int width = GET_CODE (operands[0]) == REG ? 31 : 7; - return output_btst (operands, - GEN_INT (width - INTVAL (operands[2])), - operands[0], - insn, 1000); + return output_btst (operands, GEN_INT (width - INTVAL (operands[2])), + operands[0], insn, 1000); /* Pass 1000 as SIGNPOS argument so that btst will not think we are testing the sign bit for an `and' and assume that nonzero implies a negative result. */ @@ -1922,10 +1919,8 @@ && GET_CODE (operands[2]) == CONST_INT) { int width = GET_CODE (operands[0]) == REG ? 31 : 7; - return output_btst (operands, - GEN_INT (width - INTVAL (operands[2])), - operands[0], - insn, 1000); + return output_btst (operands, GEN_INT (width - INTVAL (operands[2])), + operands[0], insn, 1000); /* Pass 1000 as SIGNPOS argument so that btst will not think we are testing the sign bit for an `and' and assume that nonzero implies a negative result. */ @@ -2292,10 +2287,9 @@ table_elt_addr = memory_address_noforce (HImode, - gen_rtx (PLUS, Pmode, - gen_rtx (MULT, Pmode, index_diff, - GEN_INT (2)), - gen_rtx (LABEL_REF, VOIDmode, operands[3]))); + gen_rtx_PLUS (Pmode, + gen_rtx_MULT (Pmode, index_diff, GEN_INT (2)), + gen_rtx_LABEL_REF (Pmode, operands[3]))); /* Emit the last few insns. */ emit_insn (gen_casesi_2 (gen_reg_rtx (HImode), table_elt_addr, operands[3])); DONE; @@ -2508,7 +2502,7 @@ ; "* ;{ ; rtx xoperands[2]; -; xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); +; xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); ; output_asm_insn (\"mov%.l %1,%@\", xoperands); ; output_asm_insn (\"mov%.l %1,%-\", operands); ; return \"fmove%.d %+,%0\"; diff --git a/gcc/config/gmicro/gmicro.c b/gcc/config/gmicro/gmicro.c index ed60e494bf1..306431cd118 100644 --- a/gcc/config/gmicro/gmicro.c +++ b/gcc/config/gmicro/gmicro.c @@ -1,9 +1,8 @@ /* Subroutines for insn-output.c for the Gmicro. - Ported by Masanobu Yuhara, Fujitsu Laboratories LTD. + Copyright (C) 1990, 1991, 1997, 1998, 1999 Free Software Foundation, Inc. + Contributed by Masanobu Yuhara, Fujitsu Laboratories LTD. (yuhara@flab.fujitsu.co.jp) - Copyright (C) 1990, 1991, 1997 Free Software Foundation, Inc. - This file is part of GNU CC. GNU CC is free software; you can redistribute it and/or modify @@ -24,9 +23,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -498,14 +496,14 @@ output_move_double (operands) { operands[0] = XEXP (XEXP (operands[0], 0), 0); output_asm_insn ("sub.w %#8,%0", operands); - operands[0] = gen_rtx (MEM, DImode, operands[0]); + operands[0] = gen_rtx_MEM (DImode, operands[0]); optype0 = OFFSOP; } if (optype0 == POPOP && optype1 == PUSHOP) { operands[1] = XEXP (XEXP (operands[1], 0), 0); output_asm_insn ("sub.w %#8,%1", operands); - operands[1] = gen_rtx (MEM, DImode, operands[1]); + operands[1] = gen_rtx_MEM (DImode, operands[1]); optype1 = OFFSOP; } @@ -528,14 +526,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) @@ -633,16 +631,14 @@ output_move_const_double (operands) else if (GREG_P (operands[0])) { rtx xoperands[2]; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xoperands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); output_asm_insn ("mov.w %1,%0", xoperands); operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); return "mov.w %1,%0"; } else - { - return output_move_double (operands); /* ?????? */ - } + return output_move_double (operands); /* ?????? */ } char * diff --git a/gcc/config/gmicro/gmicro.h b/gcc/config/gmicro/gmicro.h index b12d6c0231f..529d3cc8fdf 100644 --- a/gcc/config/gmicro/gmicro.h +++ b/gcc/config/gmicro/gmicro.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Gmicro (TRON) version. - Copyright (C) 1987, 88, 89, 95, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 89, 95-98, 1999 Free Software Foundation, Inc. Contributed by Masanobu Yuhara, Fujitsu Laboratories LTD. (yuhara@flab.fujitsu.co.jp) @@ -477,9 +477,10 @@ extern enum reg_class regno_reg_class[]; /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) \ - (gen_rtx (REG, (MODE), \ - ((TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0))) +#define LIBCALL_VALUE(MODE) \ + (gen_rtx_REG ((MODE), \ + ((TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode)) \ + ? 16 : 0))) /* 1 if N is a possible register number for a function value. @@ -546,7 +547,7 @@ extern enum reg_class regno_reg_class[]; It exists only to test register calling conventions. */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ -((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) +((TARGET_REGPARM && (CUM) < 8) ? gen_rtx_REG ((MODE), (CUM) / 4) : 0) /* For an arg passed partly in registers and partly in memory, this is the number of registers used. @@ -830,25 +831,25 @@ extern enum reg_class regno_reg_class[]; else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \ { rtx other_reg = XEXP (ADDR, 1); \ offset = 0; \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \ { rtx other_reg = XEXP (ADDR, 0); \ offset = 0; \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ else if (GET_CODE (ADDR) == PLUS \ && GET_CODE (XEXP (ADDR, 0)) == PLUS \ && XEXP (XEXP (ADDR, 0), 0) == frame_pointer_rtx \ && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \ { rtx other_reg = XEXP (XEXP (ADDR, 0), 1); \ offset = INTVAL (XEXP (ADDR, 1)); \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ else if (GET_CODE (ADDR) == PLUS \ && GET_CODE (XEXP (ADDR, 0)) == PLUS \ && XEXP (XEXP (ADDR, 0), 1) == frame_pointer_rtx \ && GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \ { rtx other_reg = XEXP (XEXP (ADDR, 0), 0); \ offset = INTVAL (XEXP (ADDR, 1)); \ - regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \ + regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \ if (offset >= 0) \ { int regno; \ extern char call_used_regs[]; \ diff --git a/gcc/config/gmicro/gmicro.md b/gcc/config/gmicro/gmicro.md index 35384ce044d..631b4b52ebe 100644 --- a/gcc/config/gmicro/gmicro.md +++ b/gcc/config/gmicro/gmicro.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, Fujitsu Gmicro Version -;; Copyright (C) 1990, 1994, 1996 Free Software Foundation, Inc. +;; Copyright (C) 1990, 1994, 1996, 1998, 1999 Free Software Foundation, Inc. ;; Contributed by M.Yuhara, Fujitsu Laboratories LTD. ;; This file is part of GNU CC. @@ -581,7 +581,7 @@ if (FPU_REG_P (operands[0])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"mov.w %1,%-\", xoperands); output_asm_insn (\"mov.w %1,%-\", operands); return \"fmov.d %+,%0\"; @@ -590,7 +590,7 @@ { output_asm_insn (\"fmov.d %f1,%-\", operands); output_asm_insn (\"mov.w %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"mov.w %+,%0\"; } } @@ -616,7 +616,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"mov.w %1,%-\", xoperands); output_asm_insn (\"mov.w %1,%-\", operands); return \"fmov.d %+,%0\"; @@ -630,7 +630,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"fmov.d %f1,%-\;mov.w %+,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"mov.w %+,%0\"; } else @@ -1601,7 +1601,8 @@ } else { - operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8)); + operands[0] + = adj_offsettable_operand (operands[0], 3 - (logval / 8)); operands[1] = GEN_INT (7 - (logval % 8)); } return \"bset.b %1,%0\"; @@ -1864,7 +1865,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1889,7 +1890,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, HImode, negate_rtx (HImode, operands[2])); + operands[2] = gen_rtx_NEG (HImode, negate_rtx (HImode, operands[2])); }") (define_insn "" @@ -1914,7 +1915,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -2270,7 +2271,7 @@ output_asm_insn (\"mov.w %1,%0\", operands); if (INTVAL (operands[3]) != 0) output_asm_insn (\"shl.w %3,%0\", operands); - operands[2] = GEN_INT (-(32 - INTVAL (operands[2]))); + operands[2] = GEN_INT (- (32 - INTVAL (operands[2]))); return \"shl.w %3,%0\"; }") @@ -2730,7 +2731,7 @@ "* { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"mov.w %1,@sp\", xoperands); output_asm_insn (\"mov.w %1,%-\", operands); return \"fmov.d %+,%0\"; diff --git a/gcc/config/gofast.h b/gcc/config/gofast.h index 84bea516758..26d2327e356 100644 --- a/gcc/config/gofast.h +++ b/gcc/config/gofast.h @@ -1,5 +1,5 @@ /* US Software GOFAST floating point library support. - Copyright (C) 1994 Free Software Foundation, Inc. + Copyright (C) 1994, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -44,33 +44,33 @@ Boston, MA 02111-1307, USA. */ } while (0) #define GOFAST_RENAME_LIBCALLS \ - add_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpadd"); \ - add_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpadd"); \ - sub_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpsub"); \ - sub_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpsub"); \ - smul_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpmul"); \ - smul_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpmul"); \ - flodiv_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpdiv"); \ - flodiv_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpdiv"); \ - cmp_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - cmp_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ + add_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpadd"); \ + add_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpadd"); \ + sub_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpsub"); \ + sub_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpsub"); \ + smul_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpmul"); \ + smul_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpmul"); \ + flodiv_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpdiv"); \ + flodiv_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpdiv"); \ + cmp_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + cmp_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ \ - extendsfdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fptodp"); \ - truncdfsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dptofp"); \ + extendsfdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fptodp"); \ + truncdfsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dptofp"); \ \ - eqsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - nesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - gtsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - gesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - ltsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ - lesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \ + eqsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + nesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + gtsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + gesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + ltsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ + lesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \ \ - eqdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ - nedf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ - gtdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ - gedf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ - ltdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ - ledf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \ + eqdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ + nedf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ + gtdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ + gedf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ + ltdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ + ledf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \ \ eqxf2_libfunc = NULL_RTX; \ nexf2_libfunc = NULL_RTX; \ diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c index 4fac366f71d..aa58157284c 100644 --- a/gcc/config/h8300/h8300.c +++ b/gcc/config/h8300/h8300.c @@ -22,7 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "tree.h" #include "regs.h" @@ -41,7 +41,6 @@ Boston, MA 02111-1307, USA. */ /* Forward declarations. */ void print_operand_address (); -char *index (); static int h8300_interrupt_function_p PROTO ((tree)); static int h8300_monitor_function_p PROTO ((tree)); @@ -954,16 +953,16 @@ function_arg (cum, mode, type, named) switch (cum->nbytes / UNITS_PER_WORD) { case 0: - result = gen_rtx (REG, mode, 0); + result = gen_rtx_REG (mode, 0); break; case 1: - result = gen_rtx (REG, mode, 1); + result = gen_rtx_REG (mode, 1); break; case 2: - result = gen_rtx (REG, mode, 2); + result = gen_rtx_REG (mode, 2); break; case 3: - result = gen_rtx (REG, mode, 3); + result = gen_rtx_REG (mode, 3); break; default: result = 0; @@ -1858,12 +1857,14 @@ expand_a_shift (mode, code, operands) /* need a loop to get all the bits we want - we generate the code at emit time, but need to allocate a scratch reg now */ - emit_insn (gen_rtx - (PARALLEL, VOIDmode, + emit_insn (gen_rtx_PARALLEL + (VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (code, mode, operands[0], operands[2])), - gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0))))); + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (code, mode, operands[0], + operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (QImode))))); return 1; } @@ -2791,9 +2792,9 @@ fix_bit_operand (operands, what, type) /* Ok to have a memory dest. */ if (GET_CODE (operands[0]) == MEM && !EXTRA_CONSTRAINT (operands[0], 'U')) { - rtx mem; - mem = gen_rtx (MEM, GET_MODE (operands[0]), - copy_to_mode_reg (Pmode, XEXP (operands[0], 0))); + rtx mem = gen_rtx_MEM (GET_MODE (operands[0]), + copy_to_mode_reg (Pmode, + XEXP (operands[0], 0))); RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (operands[0]); MEM_COPY_ATTRIBUTES (mem, operands[0]); operands[0] = mem; @@ -2801,9 +2802,9 @@ fix_bit_operand (operands, what, type) if (GET_CODE (operands[1]) == MEM && !EXTRA_CONSTRAINT (operands[1], 'U')) { - rtx mem; - mem = gen_rtx (MEM, GET_MODE (operands[1]), - copy_to_mode_reg (Pmode, XEXP (operands[1], 0))); + rtx mem = gen_rtx_MEM (GET_MODE (operands[1]), + copy_to_mode_reg (Pmode, + XEXP (operands[1], 0))); RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (operands[1]); MEM_COPY_ATTRIBUTES (mem, operands[0]); operands[1] = mem; @@ -2817,8 +2818,9 @@ fix_bit_operand (operands, what, type) operands[1] = force_reg (QImode, operands[1]); { rtx res = gen_reg_rtx (QImode); - emit_insn (gen_rtx (SET, VOIDmode, res, gen_rtx (type, QImode, operands[1], operands[2]))); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], res)); + emit_insn (gen_rtx_SET (VOIDmode, res, + gen_rtx (type, QImode, operands[1], operands[2]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], res)); } return 1; } diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h index 4ee440ac58d..9e8b68232f2 100644 --- a/gcc/config/h8300/h8300.h +++ b/gcc/config/h8300/h8300.h @@ -526,7 +526,7 @@ enum reg_class { On the H8 the return value is in R0/R1. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ @@ -534,7 +534,7 @@ enum reg_class { /* On the h8 the return value is in R0/R1 */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, 0) + gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value. On the H8, R0 is the only register thus used. */ @@ -713,10 +713,11 @@ struct rtx_def *function_arg(); #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ enum machine_mode mode = TARGET_H8300H || TARGET_H8300S? SImode : HImode; \ - emit_move_insn (gen_rtx (MEM, mode, plus_constant ((TRAMP), 2)), CXT); \ - emit_move_insn (gen_rtx (MEM, mode, plus_constant ((TRAMP), 6)), FNADDR); \ - if (TARGET_H8300H || TARGET_H8300S) \ - emit_move_insn (gen_rtx (MEM, QImode, plus_constant ((TRAMP), 6)), GEN_INT (0x5A)); \ + emit_move_insn (gen_rtx_MEM (mode, plus_constant ((TRAMP), 2)), CXT); \ + emit_move_insn (gen_rtx_MEM (mode, plus_constant ((TRAMP), 6)), FNADDR); \ + if (TARGET_H8300H || TARGET_H8300S) \ + emit_move_insn (gen_rtx_MEM (QImode, plus_constant ((TRAMP), 6)), \ + GEN_INT (0x5A)); \ } /* Addressing modes, and classification of registers for them. */ @@ -1387,15 +1388,15 @@ extern int handle_pragma (); #define INIT_TARGET_OPTABS \ do { \ smul_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, MULHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, MULHI3_LIBCALL); \ sdiv_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, DIVHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, DIVHI3_LIBCALL); \ udiv_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, UDIVHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, UDIVHI3_LIBCALL); \ smod_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, MODHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, MODHI3_LIBCALL); \ umod_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, UMODHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, UMODHI3_LIBCALL); \ } while (0) #define MOVE_RATIO 3 diff --git a/gcc/config/i370/i370.c b/gcc/config/i370/i370.c index 5c0e5760f40..d9954e3137e 100644 --- a/gcc/config/i370/i370.c +++ b/gcc/config/i370/i370.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for System/370. - Copyright (C) 1989, 1993, 1995, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 93, 95, 97, 98, 1999 Free Software Foundation, Inc. Contributed by Jan Stein (jan@cd.chalmers.se). Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com) Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org) @@ -22,12 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> -#include <string.h> -#include <ctype.h> -#include <sys/types.h> -#include <sys/stat.h> -#include <fcntl.h> +#include "system.h" #include "rtl.h" #include "tree.h" #include "regs.h" @@ -41,7 +36,6 @@ Boston, MA 02111-1307, USA. */ #include "function.h" #include "flags.h" #include "recog.h" -#include <time.h> extern FILE *asm_out_file; diff --git a/gcc/config/i370/i370.h b/gcc/config/i370/i370.h index dcacc4202be..1e32e0102e4 100644 --- a/gcc/config/i370/i370.h +++ b/gcc/config/i370/i370.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. System/370 version. - Copyright (C) 1989, 1993, 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 93, 95, 96, 97, 1998, 1999 Free Software Foundation, Inc. Contributed by Jan Stein (jan@cd.chalmers.se). Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com) Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org) @@ -545,7 +545,7 @@ enum reg_class (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15) #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx(REG, TYPE_MODE (VALTYPE), RET_REG(TYPE_MODE(VALTYPE))) + gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE))) #define RETURN_IN_MEMORY(VALTYPE) \ ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE))) @@ -553,7 +553,7 @@ enum reg_class /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx(REG, MODE, RET_REG(MODE)) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE)) /* 1 if N is a possible register number for a function value. On the 370 under C/370, R15 and R16 are thus used. */ @@ -585,13 +585,12 @@ enum reg_class #define TRAMPOLINE_TEMPLATE(FILE) \ { \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x05E0)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x5800 | \ - STATIC_CHAIN_REGNUM << 4)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00A)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x58F0)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00E)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x07FF)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x05E0)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00A)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x58F0)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00E)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x07FF)); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ @@ -606,8 +605,8 @@ enum reg_class #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \ } /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack @@ -792,17 +791,17 @@ enum reg_class #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ { \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - copy_to_mode_reg (SImode, XEXP (X, 1))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + copy_to_mode_reg (SImode, XEXP (X, 1))); \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - copy_to_mode_reg (SImode, XEXP (X, 0))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + copy_to_mode_reg (SImode, XEXP (X, 0))); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + force_operand (XEXP (X, 0), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), 0)); \ if (memory_address_p (MODE, X)) \ goto WIN; \ } diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 4c1460cc9bf..f08812bbc3b 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -1441,11 +1441,11 @@ static rtx gen_push (arg) rtx arg; { - return gen_rtx (SET, VOIDmode, - gen_rtx_MEM (SImode, - gen_rtx (PRE_DEC, SImode, - stack_pointer_rtx)), - arg); + return gen_rtx_SET (VOIDmode, + gen_rtx_MEM (SImode, + gen_rtx_PRE_DEC (SImode, + stack_pointer_rtx)), + arg); } /* Compute the size of local storage taking into consideration the @@ -2239,9 +2239,9 @@ legitimize_address (x, oldx, mode) && (log = (unsigned)exact_log2 (INTVAL (XEXP (XEXP (x, 0), 1)))) < 4) { changed = 1; - XEXP (x, 0) = gen_rtx (MULT, Pmode, - force_reg (Pmode, XEXP (XEXP (x, 0), 0)), - GEN_INT (1 << log)); + XEXP (x, 0) = gen_rtx_MULT (Pmode, + force_reg (Pmode, XEXP (XEXP (x, 0), 0)), + GEN_INT (1 << log)); } if (GET_CODE (XEXP (x, 1)) == ASHIFT @@ -2249,9 +2249,9 @@ legitimize_address (x, oldx, mode) && (log = (unsigned)exact_log2 (INTVAL (XEXP (XEXP (x, 1), 1)))) < 4) { changed = 1; - XEXP (x, 1) = gen_rtx (MULT, Pmode, - force_reg (Pmode, XEXP (XEXP (x, 1), 0)), - GEN_INT (1 << log)); + XEXP (x, 1) = gen_rtx_MULT (Pmode, + force_reg (Pmode, XEXP (XEXP (x, 1), 0)), + GEN_INT (1 << log)); } /* Put multiply first if it isn't already. */ @@ -2270,10 +2270,10 @@ legitimize_address (x, oldx, mode) if (GET_CODE (XEXP (x, 0)) == MULT && GET_CODE (XEXP (x, 1)) == PLUS) { changed = 1; - x = gen_rtx (PLUS, Pmode, - gen_rtx (PLUS, Pmode, XEXP (x, 0), - XEXP (XEXP (x, 1), 0)), - XEXP (XEXP (x, 1), 1)); + x = gen_rtx_PLUS (Pmode, + gen_rtx_PLUS (Pmode, XEXP (x, 0), + XEXP (XEXP (x, 1), 0)), + XEXP (XEXP (x, 1), 1)); } /* Canonicalize @@ -2303,10 +2303,10 @@ legitimize_address (x, oldx, mode) if (constant) { changed = 1; - x = gen_rtx (PLUS, Pmode, - gen_rtx (PLUS, Pmode, XEXP (XEXP (x, 0), 0), - XEXP (XEXP (XEXP (x, 0), 1), 0)), - plus_constant (other, INTVAL (constant))); + x = gen_rtx_PLUS (Pmode, + gen_rtx_PLUS (Pmode, XEXP (XEXP (x, 0), 0), + XEXP (XEXP (XEXP (x, 0), 1), 0)), + plus_constant (other, INTVAL (constant))); } } diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 9411948c46e..eebd336d80b 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -1103,7 +1103,7 @@ enum reg_class otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ gen_rtx_REG (TYPE_MODE (VALTYPE), \ - VALUE_REGNO (TYPE_MODE (VALTYPE))) + VALUE_REGNO (TYPE_MODE (VALTYPE))) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ @@ -2168,12 +2168,12 @@ number as al, and ax. /* Before the prologue, RA is at 0(%esp). */ #define INCOMING_RETURN_ADDR_RTX \ gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM)) - + /* After the prologue, RA is at -4(AP) in the current frame. */ #define RETURN_ADDR_RTX(COUNT, FRAME) \ ((COUNT) == 0 \ - ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT(-4)))\ - : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4)))) + ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -4))\ + : gen_rtx_MEM (Pmode, plus_constant (FRAME, 4))) /* PC is dbx register 8; let's use that column for RA. */ #define DWARF_FRAME_RETURN_COLUMN 8 diff --git a/gcc/config/i386/mingw32.h b/gcc/config/i386/mingw32.h index 552cbcd1932..5ec2448593c 100644 --- a/gcc/config/i386/mingw32.h +++ b/gcc/config/i386/mingw32.h @@ -70,14 +70,6 @@ do { \ char c; \ \ putc ('\"', asm_file); \ - if (STRING[1] == ':' \ - && (STRING[2] == '/' || STRING[2] == '\\')) \ - { \ - putc ('/', asm_file); \ - putc ('/', asm_file); \ - putc (*string, asm_file); \ - string += 2; \ - } \ \ while ((c = *string++) != 0) \ { \ diff --git a/gcc/config/i386/osfrose.h b/gcc/config/i386/osfrose.h index 9ad9f952d57..f75fe1f46c0 100644 --- a/gcc/config/i386/osfrose.h +++ b/gcc/config/i386/osfrose.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. Intel 386 (OSF/1 with OSF/rose) version. - Copyright (C) 1991, 1992, 1993, 1996, 1999 Free Software Foundation, Inc. + Copyright (C) 1991, 92, 93, 96, 98, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -217,8 +217,8 @@ do \ rtx symref; \ \ HALF_PIC_EXTERNAL ("_mcount_ptr"); \ - symref = HALF_PIC_PTR (gen_rtx (SYMBOL_REF, Pmode, \ - "_mcount_ptr")); \ + symref = HALF_PIC_PTR (gen_rtx_SYMBOL_REF (Pmode, \ + "_mcount_ptr")); \ \ fprintf (FILE, "\tmovl $%sP%d,%%edx\n", lprefix, labelno); \ fprintf (FILE, "\tmovl %s%s,%%eax\n", prefix, \ @@ -290,7 +290,7 @@ do \ rtx symdef; \ \ HALF_PIC_EXTERNAL ("mcount"); \ - symdef = HALF_PIC_PTR (gen_rtx (SYMBOL_REF, Pmode, "mcount")); \ + symdef = HALF_PIC_PTR (gen_rtx_SYMBOL_REF (Pmode, "mcount")); \ fprintf (FILE, "\tmovl $%sP%d,%%edx\n", lprefix, labelno); \ fprintf (FILE, "\tcall *%s%s\n", prefix, XSTR (symdef, 0)); \ } \ diff --git a/gcc/config/i386/win-nt.h b/gcc/config/i386/win-nt.h index 97f10c39d00..262c3afee27 100644 --- a/gcc/config/i386/win-nt.h +++ b/gcc/config/i386/win-nt.h @@ -1,6 +1,6 @@ /* Operating system specific defines to be used when targeting GCC for Windows NT 3.x on an i386. - Copyright (C) 1994, 1995 Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1998, 1999 Free Software Foundation, Inc. Contributed by Douglas B. Rupp (drupp@cs.washington.edu). This file is part of GNU CC. @@ -118,7 +118,7 @@ do \ if (lookup_attribute ("stdcall", \ TYPE_ATTRIBUTES (TREE_TYPE (DECL)))) \ XEXP (DECL_RTL (DECL), 0) = \ - gen_rtx (SYMBOL_REF, Pmode, gen_stdcall_suffix (DECL)); \ + gen_rtx_SYMBOL_REF (Pmode, gen_stdcall_suffix (DECL)); \ } \ while (0) #endif diff --git a/gcc/config/i860/i860.c b/gcc/config/i860/i860.c index 966c5724b20..d55e912f2e0 100644 --- a/gcc/config/i860/i860.c +++ b/gcc/config/i860/i860.c @@ -26,7 +26,7 @@ Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "flags.h" #include "rtl.h" #include "tree.h" @@ -522,7 +522,7 @@ singlemove_string (operands) rtx xoperands[2]; cc_status.flags &= ~CC_F0_IS_0; - xoperands[0] = gen_rtx (REG, SFmode, 32); + xoperands[0] = gen_rtx_REG (SFmode, 32); xoperands[1] = operands[1]; output_asm_insn (singlemove_string (xoperands), xoperands); xoperands[1] = xoperands[0]; @@ -627,14 +627,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) @@ -693,7 +693,7 @@ output_move_double (operands) xops[0] = latehalf[0]; xops[1] = operands[0]; output_asm_insn ("adds %1,%0,%1", xops); - operands[1] = gen_rtx (MEM, DImode, operands[0]); + operands[1] = gen_rtx_MEM (DImode, operands[0]); latehalf[1] = adj_offsettable_operand (operands[1], 4); addreg1 = 0; highest_first = 1; @@ -747,7 +747,7 @@ output_fp_move_double (operands) /* If the source operand is any sort of zero, use f0 instead. */ if (operands[1] == CONST0_RTX (GET_MODE (operands[1]))) - operands[1] = gen_rtx (REG, DFmode, F0_REGNUM); + operands[1] = gen_rtx_REG (DFmode, F0_REGNUM); if (FP_REG_P (operands[0])) { @@ -756,8 +756,8 @@ output_fp_move_double (operands) if (GET_CODE (operands[1]) == REG) { output_asm_insn ("ixfr %1,%0", operands); - operands[0] = gen_rtx (REG, VOIDmode, REGNO (operands[0]) + 1); - operands[1] = gen_rtx (REG, VOIDmode, REGNO (operands[1]) + 1); + operands[0] = gen_rtx_REG (VOIDmode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (VOIDmode, REGNO (operands[1]) + 1); return "ixfr %1,%0"; } if (operands[1] == CONST0_RTX (DFmode)) @@ -782,8 +782,8 @@ output_fp_move_double (operands) if (GET_CODE (operands[0]) == REG) { output_asm_insn ("fxfr %1,%0", operands); - operands[0] = gen_rtx (REG, VOIDmode, REGNO (operands[0]) + 1); - operands[1] = gen_rtx (REG, VOIDmode, REGNO (operands[1]) + 1); + operands[0] = gen_rtx_REG (VOIDmode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (VOIDmode, REGNO (operands[1]) + 1); return "fxfr %1,%0"; } if (CONSTANT_ADDRESS_P (XEXP (operands[0], 0))) @@ -1116,8 +1116,7 @@ output_size_for_block_move (size, reg, align) output_asm_insn ("sub %2,%1,%0", xoperands); else { - xoperands[1] - = GEN_INT (INTVAL (size) - INTVAL (align)); + xoperands[1] = GEN_INT (INTVAL (size) - INTVAL (align)); cc_status.flags &= ~ CC_KNOW_HI_R31; output_asm_insn ("mov %1,%0", xoperands); } @@ -1432,8 +1431,8 @@ output_delayed_branch (template, operands, insn) else { int insn_code_number; - rtx pat = gen_rtx (SET, VOIDmode, dest, src); - rtx delay_insn = gen_rtx (INSN, VOIDmode, 0, 0, 0, pat, -1, 0, 0); + rtx pat = gen_rtx_SET (VOIDmode, dest, src); + rtx delay_insn = gen_rtx_INSN (VOIDmode, 0, 0, 0, pat, -1, 0, 0); int i; /* Output the branch instruction first. */ diff --git a/gcc/config/i860/i860.h b/gcc/config/i860/i860.h index a95eccfc842..107849d63cd 100644 --- a/gcc/config/i860/i860.h +++ b/gcc/config/i860/i860.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for Intel 860. - Copyright (C) 1989, 91, 93, 95, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 91, 93, 95-98, 1999 Free Software Foundation, Inc. Hacked substantially by Ron Guilmette (rfg@monkeys.com) to cater to the whims of the System V Release 4 assembler. @@ -428,17 +428,17 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES }; /* On the i860, the value register depends on the mode. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), \ - (GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT \ - ? 40 : 16)) + gen_rtx_REG (TYPE_MODE (VALTYPE), \ + (GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT \ + ? 40 : 16)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, \ - (GET_MODE_CLASS ((MODE)) == MODE_FLOAT \ - ? 40 : 16)) + gen_rtx_REG (MODE, \ + (GET_MODE_CLASS ((MODE)) == MODE_FLOAT \ + ? 40 : 16)) /* 1 if N is a possible register number for a function value as seen by the caller. */ @@ -523,17 +523,17 @@ struct cumulative_args { int ints, floats; }; ? 0 \ : GET_MODE_CLASS ((MODE)) == MODE_FLOAT || (MODE) == DImode \ ? (ROUNDUP ((CUM).floats, GET_MODE_SIZE ((MODE))) < 32 \ - ? gen_rtx (REG, (MODE), \ - 40+(ROUNDUP ((CUM).floats, \ - GET_MODE_SIZE ((MODE))) \ - / 4)) \ + ? gen_rtx_REG ((MODE), \ + 40 + (ROUNDUP ((CUM).floats, \ + GET_MODE_SIZE ((MODE))) \ + / 4)) \ : 0) \ : GET_MODE_CLASS ((MODE)) == MODE_INT \ ? (ROUNDUP ((CUM).ints, GET_MODE_SIZE ((MODE))) < 48 \ - ? gen_rtx (REG, (MODE), \ - 16+(ROUNDUP ((CUM).ints, \ - GET_MODE_SIZE ((MODE))) \ - / 4)) \ + ? gen_rtx_REG ((MODE), \ + 16 + (ROUNDUP ((CUM).ints, \ + GET_MODE_SIZE ((MODE))) \ + / 4)) \ : 0) \ : 0) @@ -660,13 +660,13 @@ struct cumulative_args { int ints, floats; }; size_int (16), 0, 0); \ rtx hi_fn = expand_shift (RSHIFT_EXPR, SImode, fn, \ size_int (16), 0, 0); \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 16)), \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 16)), \ gen_lowpart (HImode, cxt)); \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 4)), \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 4)), \ gen_lowpart (HImode, fn)); \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 8)), \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 8)), \ gen_lowpart (HImode, hi_cxt)); \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 0)), \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 0)), \ gen_lowpart (HImode, hi_fn)); \ } @@ -819,25 +819,25 @@ struct cumulative_args { int ints, floats; }; #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + force_operand (XEXP (X, 0), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + force_operand (XEXP (X, 0), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) != REG \ && GET_CODE (XEXP (X, 0)) != CONST_INT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - copy_to_mode_reg (SImode, XEXP (X, 0))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + copy_to_mode_reg (SImode, XEXP (X, 0))); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) != REG \ && GET_CODE (XEXP (X, 1)) != CONST_INT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - copy_to_mode_reg (SImode, XEXP (X, 1))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + copy_to_mode_reg (SImode, XEXP (X, 1))); \ if (GET_CODE (x) == SYMBOL_REF) \ (X) = copy_to_reg (X); \ if (GET_CODE (x) == CONST) \ diff --git a/gcc/config/i860/i860.md b/gcc/config/i860/i860.md index 3b1fc32822c..59b0b6d144e 100644 --- a/gcc/config/i860/i860.md +++ b/gcc/config/i860/i860.md @@ -1,5 +1,5 @@ ;;- Machine description for Intel 860 chip for GNU C compiler -;; Copyright (C) 1989, 1990, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1989, 1990, 1997, 1998, 1999 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -1527,7 +1527,7 @@ "* { CC_STATUS_PARTIAL_INIT; - operands[2] = GEN_INT ((INTVAL (operands[2]) << INTVAL (operands[1]))); + operands[2] = GEN_INT (INTVAL (operands[2]) << INTVAL (operands[1])); return \"and %2,%0,%?r0\"; }") @@ -1542,7 +1542,7 @@ "* { CC_STATUS_PARTIAL_INIT; - operands[2] = GEN_INT ((INTVAL (operands[2]) << INTVAL (operands[1]))); + operands[2] = GEN_INT (INTVAL (operands[2]) << INTVAL (operands[1])); return \"and %2,%0,%?r0\"; }") @@ -1766,14 +1766,15 @@ return \"and %2,%1,%0\"; if ((INTVAL (operands[2]) & 0xffff) == 0) { - operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16); + operands[2] + = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"andh %2,%1,%0\"; } xop[0] = operands[0]; xop[1] = operands[1]; xop[2] = GEN_INT (~INTVAL (operands[2]) & 0xffff); output_asm_insn (\"andnot %2,%1,%0\", xop); - operands[2] = GEN_INT (~(unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT (~(unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"andnoth %2,%0,%0\"; }") @@ -1791,14 +1792,15 @@ return \"andnot %1,%2,%0\"; if ((INTVAL (operands[1]) & 0xffff) == 0) { - operands[1] = GEN_INT ((unsigned) INTVAL (operands[1]) >> 16); + operands[1] + = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[1]) >> 16); return \"andnoth %1,%2,%0\"; } xop[0] = operands[0]; - xop[1] = GEN_INT ((INTVAL (operands[1]) & 0xffff)); + xop[1] = GEN_INT (INTVAL (operands[1]) & 0xffff); xop[2] = operands[2]; output_asm_insn (\"andnot %1,%2,%0\", xop); - operands[1] = GEN_INT ((unsigned) INTVAL (operands[1]) >> 16); + operands[1] = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[1]) >> 16); return \"andnoth %1,%0,%0\"; }") @@ -1816,14 +1818,15 @@ return \"or %2,%1,%0\"; if ((INTVAL (operands[2]) & 0xffff) == 0) { - operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16); + operands[2] + = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"orh %2,%1,%0\"; } xop[0] = operands[0]; xop[1] = operands[1]; - xop[2] = GEN_INT ((INTVAL (operands[2]) & 0xffff)); + xop[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); output_asm_insn (\"or %2,%1,%0\", xop); - operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"orh %2,%0,%0\"; }") @@ -1841,14 +1844,15 @@ return \"xor %2,%1,%0\"; if ((INTVAL (operands[2]) & 0xffff) == 0) { - operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16); + operands[2] + = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"xorh %2,%1,%0\"; } xop[0] = operands[0]; xop[1] = operands[1]; - xop[2] = GEN_INT ((INTVAL (operands[2]) & 0xffff)); + xop[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); output_asm_insn (\"xor %2,%1,%0\", xop); - operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16); return \"xorh %2,%0,%0\"; }") @@ -2121,7 +2125,7 @@ fmul.ss %1,%0,%4\;fmul.ss %3,%4,%0\"; if (INTVAL (operands[1]) > 0) { emit_move_insn (arg_pointer_rtx, stack_pointer_rtx); - emit_insn (gen_rtx (USE, VOIDmode, arg_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, arg_pointer_rtx)); } }") @@ -2189,7 +2193,7 @@ fmul.ss %1,%0,%4\;fmul.ss %3,%4,%0\"; if (INTVAL (operands[2]) > 0) { emit_move_insn (arg_pointer_rtx, stack_pointer_rtx); - emit_insn (gen_rtx (USE, VOIDmode, arg_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, arg_pointer_rtx)); } }") diff --git a/gcc/config/i960/i960.c b/gcc/config/i960/i960.c index 7a661e60e01..fa98ad4c4d0 100644 --- a/gcc/config/i960/i960.c +++ b/gcc/config/i960/i960.c @@ -23,7 +23,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -507,9 +507,9 @@ gen_compare_reg (code, x, y) y = force_reg (SImode, y); } - cc_reg = gen_rtx (REG, ccmode, 36); - emit_insn (gen_rtx (SET, VOIDmode, cc_reg, - gen_rtx (COMPARE, ccmode, x, y))); + cc_reg = gen_rtx_REG (ccmode, 36); + emit_insn (gen_rtx_SET (VOIDmode, cc_reg, + gen_rtx_COMPARE (ccmode, x, y))); return cc_reg; } @@ -608,12 +608,12 @@ emit_move_sequence (operands, mode) && REGNO (operands[1]) < FIRST_PSEUDO_REGISTER && ! HARD_REGNO_MODE_OK (REGNO (operands[1]), mode)) { - emit_insn (gen_rtx (PARALLEL, VOIDmode, - gen_rtvec (2, - gen_rtx (SET, VOIDmode, - operands[0], operands[1]), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, Pmode))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_SET (VOIDmode, operands[0], operands[1]), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (Pmode))))); return 1; } @@ -664,8 +664,8 @@ i960_output_move_double (dst, src) edge conditions. */ operands[0] = dst; operands[1] = src; - operands[2] = gen_rtx (REG, Pmode, REGNO (dst) + 1); - operands[3] = gen_rtx (MEM, word_mode, operands[2]); + operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 1); + operands[3] = gen_rtx_MEM (word_mode, operands[2]); operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD); output_asm_insn ("lda %1,%2\n\tld %3,%0\n\tld %4,%D0", operands); return ""; @@ -754,8 +754,8 @@ i960_output_move_quad (dst, src) edge conditions. */ operands[0] = dst; operands[1] = src; - operands[2] = gen_rtx (REG, Pmode, REGNO (dst) + 3); - operands[3] = gen_rtx (MEM, word_mode, operands[2]); + operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 3); + operands[3] = gen_rtx_MEM (word_mode, operands[2]); operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD); operands[5] = adj_offsettable_operand (operands[4], UNITS_PER_WORD); operands[6] = adj_offsettable_operand (operands[5], UNITS_PER_WORD); @@ -844,7 +844,7 @@ i960_output_ldconst (dst, src) for (i = 0; i < 3; i++) { - operands[0] = gen_rtx (REG, SImode, REGNO (dst) + i); + operands[0] = gen_rtx_REG (SImode, REGNO (dst) + i); operands[1] = GEN_INT (value_long[i]); output_asm_insn (i960_output_ldconst (operands[0], operands[1]), operands); @@ -863,11 +863,11 @@ i960_output_ldconst (dst, src) output_asm_insn ("# ldconst %1,%0",operands); - operands[0] = gen_rtx (REG, SImode, REGNO (dst)); + operands[0] = gen_rtx_REG (SImode, REGNO (dst)); operands[1] = first; output_asm_insn (i960_output_ldconst (operands[0], operands[1]), operands); - operands[0] = gen_rtx (REG, SImode, REGNO (dst) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (dst) + 1); operands[1] = second; output_asm_insn (i960_output_ldconst (operands[0], operands[1]), operands); @@ -882,7 +882,7 @@ i960_output_ldconst (dst, src) REAL_VALUE_TO_TARGET_SINGLE (d, value); output_asm_insn ("# ldconst %1,%0",operands); - operands[0] = gen_rtx (REG, SImode, REGNO (dst)); + operands[0] = gen_rtx_REG (SImode, REGNO (dst)); operands[1] = GEN_INT (value); output_asm_insn (i960_output_ldconst (operands[0], operands[1]), operands); @@ -918,7 +918,7 @@ i960_output_ldconst (dst, src) return "movl %1,%0"; /* Output the upper half with a recursive call. */ - xoperands[0] = gen_rtx (REG, SImode, REGNO (dst) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (dst) + 1); xoperands[1] = upperhalf; output_asm_insn (i960_output_ldconst (xoperands[0], xoperands[1]), xoperands); @@ -2144,9 +2144,9 @@ legitimize_address (x, oldx, mode) similar optimizations. */ if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == MULT && GET_CODE (XEXP (x, 1)) == PLUS) - x = gen_rtx (PLUS, Pmode, - gen_rtx (PLUS, Pmode, XEXP (x, 0), XEXP (XEXP (x, 1), 0)), - XEXP (XEXP (x, 1), 1)); + x = gen_rtx_PLUS (Pmode, + gen_rtx_PLUS (Pmode, XEXP (x, 0), XEXP (XEXP (x, 1), 0)), + XEXP (XEXP (x, 1), 1)); /* Canonicalize (plus (plus (mult (reg) (const)) (plus (reg) (const))) const) into (plus (plus (mult (reg) (const)) (reg)) (const)). */ @@ -2171,10 +2171,10 @@ legitimize_address (x, oldx, mode) constant = 0; if (constant) - x = gen_rtx (PLUS, Pmode, - gen_rtx (PLUS, Pmode, XEXP (XEXP (x, 0), 0), - XEXP (XEXP (XEXP (x, 0), 1), 0)), - plus_constant (other, INTVAL (constant))); + x = gen_rtx_PLUS (Pmode, + gen_rtx_PLUS (Pmode, XEXP (XEXP (x, 0), 0), + XEXP (XEXP (XEXP (x, 0), 1), 0)), + plus_constant (other, INTVAL (constant))); } return x; @@ -2483,7 +2483,7 @@ i960_function_arg (cum, mode, type, named) else { cum->ca_nregparms = ROUND_PARM (cum->ca_nregparms, align); - ret = gen_rtx (REG, mode, cum->ca_nregparms); + ret = gen_rtx_REG (mode, cum->ca_nregparms); } return ret; @@ -2615,17 +2615,17 @@ i960_setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) va_start assumes it. */ emit_insn (gen_cmpsi (arg_pointer_rtx, const0_rtx)); emit_jump_insn (gen_bne (label)); - emit_insn (gen_rtx (SET, VOIDmode, arg_pointer_rtx, - stack_pointer_rtx)); - emit_insn (gen_rtx (SET, VOIDmode, stack_pointer_rtx, - memory_address (SImode, - plus_constant (stack_pointer_rtx, - 48)))); + emit_insn (gen_rtx_SET (VOIDmode, arg_pointer_rtx, + stack_pointer_rtx)); + emit_insn (gen_rtx_SET (VOIDmode, stack_pointer_rtx, + memory_address (SImode, + plus_constant (stack_pointer_rtx, + 48)))); emit_label (label); /* ??? Note that we unnecessarily store one extra register for stdarg - fns. We could optimize this, but it's kept as-is for now. */ - regblock = gen_rtx (MEM, BLKmode, + fns. We could optimize this, but it's kept as for now. */ + regblock = gen_rtx_MEM (BLKmode, plus_constant (arg_pointer_rtx, first_reg * 4)); MEM_ALIAS_SET (regblock) = get_varargs_alias_set (); diff --git a/gcc/config/i960/i960.h b/gcc/config/i960/i960.h index e273438ca28..63be254fda6 100644 --- a/gcc/config/i960/i960.h +++ b/gcc/config/i960/i960.h @@ -831,7 +831,7 @@ enum reg_class { NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx ((REG), (MODE), 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG ((MODE), 0) /* 1 if N is a possible register number for a function value as seen by the caller. @@ -947,7 +947,7 @@ extern struct rtx_def *i960_function_arg (); otherwise, FUNC is 0. */ #define FUNCTION_VALUE(TYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (TYPE), 0) + gen_rtx_REG (TYPE_MODE (TYPE), 0) /* Force aggregates and objects larger than 16 bytes to be returned in memory, since we only have 4 registers available for return values. */ @@ -1583,10 +1583,8 @@ extern struct rtx_def *gen_compare_reg (); #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), \ - FNADDR); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), \ - CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \ } /* Generate RTL to flush the register windows so as to make arbitrary frames diff --git a/gcc/config/i960/i960.md b/gcc/config/i960/i960.md index 945b514c9de..616e97939bd 100644 --- a/gcc/config/i960/i960.md +++ b/gcc/config/i960/i960.md @@ -875,7 +875,7 @@ if (which_alternative == 0) return i960_output_move_double (operands[0], operands[1]); - operands[3] = gen_rtx (MEM, word_mode, operands[2]); + operands[3] = gen_rtx_MEM (word_mode, operands[2]); operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD); return \"lda %0,%2\;st %1,%3\;st %D1,%4\"; }" @@ -954,7 +954,7 @@ if (which_alternative == 0) return i960_output_move_quad (operands[0], operands[1]); - operands[3] = gen_rtx (MEM, word_mode, operands[2]); + operands[3] = gen_rtx_MEM (word_mode, operands[2]); operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD); operands[5] = adj_offsettable_operand (operands[4], UNITS_PER_WORD); operands[6] = adj_offsettable_operand (operands[5], UNITS_PER_WORD); @@ -1266,7 +1266,7 @@ operand0 = SUBREG_REG (operand0); } if (GET_MODE (operand0) != SImode) - operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subreg_word); + operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subreg_word); emit_insn (gen_ashlsi3 (temp, operand1, shift_24)); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); @@ -1387,7 +1387,7 @@ operand0 = SUBREG_REG (operand0); } if (GET_MODE (operand0) != SImode) - operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subreg_word); + operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subreg_word); emit_insn (gen_ashlsi3 (temp, operand1, shift_24)); emit_insn (gen_lshrsi3 (operand0, temp, shift_24)); @@ -1470,11 +1470,12 @@ " { rtx temp = gen_reg_rtx (DImode); - emit_insn (gen_rtx (SET, VOIDmode, temp, - gen_rtx (UNSIGNED_FIX, DImode, - gen_rtx (FIX, DFmode, operands[1])))); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (SUBREG, SImode, temp, 0))); + emit_insn (gen_rtx_SET (VOIDmode, temp, + gen_rtx_UNSIGNED_FIX (DImode, + gen_rtx_FIX (DFmode, + operands[1])))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_SUBREG (SImode, temp, 0))); DONE; }") @@ -1492,11 +1493,12 @@ " { rtx temp = gen_reg_rtx (DImode); - emit_insn (gen_rtx (SET, VOIDmode, temp, - gen_rtx (UNSIGNED_FIX, DImode, - gen_rtx (FIX, SFmode, operands[1])))); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (SUBREG, SImode, temp, 0))); + emit_insn (gen_rtx_SET (VOIDmode, temp, + gen_rtx_UNSIGNED_FIX (DImode, + gen_rtx_FIX (SFmode, + operands[1])))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_SUBREG (SImode, temp, 0))); DONE; }") diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index 685de334629..8bc569863ef 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on the Mitsubishi M32R cpu. - Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -938,18 +938,15 @@ m32r_select_cc_mode (op, x, y) than being susummed into the following branch instruction. */ rtx -gen_compare (int_code, x, y, need_compare) - int int_code; - rtx x; - rtx y; - int need_compare; +gen_compare (code, x, y, need_compare) + enum rtx_code code; + rtx x, y; + int need_compare; { - enum rtx_code code = (enum rtx_code)int_code; - enum rtx_code compare_code; - enum rtx_code branch_code; - enum machine_mode mode = SELECT_CC_MODE (code, x, y); - rtx cc_reg = gen_rtx (REG, mode, CARRY_REGNUM); - int must_swap = 0; + enum machine_mode mode = SELECT_CC_MODE (code, x, y); + enum rtx_code compare_code, branch_code; + rtx cc_reg = gen_rtx_REG (mode, CARRY_REGNUM); + int swap_p = 0; switch (code) { @@ -1336,9 +1333,9 @@ m32r_setup_incoming_varargs (cum, int_mode, type, pretend_size, no_rtl) int size = M32R_MAX_PARM_REGS - first_reg_offset; rtx regblock; - regblock = gen_rtx (MEM, BLKmode, - plus_constant (arg_pointer_rtx, - FIRST_PARM_OFFSET (0))); + regblock = gen_rtx_MEM (BLKmode, + plus_constant (arg_pointer_rtx, + FIRST_PARM_OFFSET (0))); MEM_ALIAS_SET (regblock) = get_varargs_alias_set (); move_block_from_reg (first_reg_offset, regblock, size, size * UNITS_PER_WORD); diff --git a/gcc/config/m32r/m32r.h b/gcc/config/m32r/m32r.h index 903745f328f..7cad6c0f71b 100644 --- a/gcc/config/m32r/m32r.h +++ b/gcc/config/m32r/m32r.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu. - Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -706,10 +706,12 @@ M32R_STACK_ALIGN (current_function_outgoing_args_size) /* The current return address is in r14. */ #if 0 /* The default value should work. */ #define RETURN_ADDR_RTX(COUNT, FRAME) \ -(((COUNT) == -1) \ - ? gen_rtx (REG, Pmode, 14) \ - : copy_to_reg (gen_rtx (MEM, Pmode, \ - memory_address (Pmode, plus_constant ((FRAME), UNITS_PER_WORD))))) +(((COUNT) == -1) \ + ? gen_rtx_REG (Pmode, 14) \ + : copy_to_reg (gen_rtx_MEM (Pmode, \ + memory_address (Pmode, \ + plus_constant ((FRAME), \ + UNITS_PER_WORD))))) #endif /* Register to use for pushing function arguments. */ @@ -918,14 +920,14 @@ M32R_STACK_ALIGN (current_function_outgoing_args_size) and the rest are pushed. */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \ - ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ + ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ : 0) /* ??? Quick hack to try to get varargs working the normal way. */ #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ (((! current_function_varargs || (NAMED)) \ && PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED))) \ - ? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ + ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \ : 0) /* A C expression for the number of words, at the beginning of an @@ -1011,11 +1013,11 @@ m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL) VALTYPE is the data type of the value (as a tree). If the precise function being called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */ -#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), 0) +#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value as seen by the caller. */ @@ -1095,13 +1097,13 @@ m32r_output_function_epilogue (FILE, SIZE) CXT is an RTX for the static chain value for the function. */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ do { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 0)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \ plus_constant ((CXT), 0xe7000000)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \ plus_constant ((FNADDR), 0xe6000000)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 8)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \ GEN_INT (0x1fc67000)); \ - emit_insn (gen_flush_icache (validize_mem (gen_rtx (MEM, SImode, TRAMP)))); \ + emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \ } while (0) /* Library calls. */ diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md index 3f1e6e51f71..85ab2530e1f 100644 --- a/gcc/config/m32r/m32r.md +++ b/gcc/config/m32r/m32r.md @@ -1,5 +1,5 @@ ;; Machine description of the Mitsubishi M32R cpu for GNU C compiler -;; Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. +;; Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -684,11 +684,11 @@ op0_subword = SUBREG_WORD (operand0); operand0 = XEXP (operand0, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, + op1_subword), shift_24)); if (GET_MODE (operand0) != SImode) - operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subword); + operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subword); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); DONE; }") @@ -717,8 +717,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_24)); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); DONE; @@ -748,8 +747,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_16)); emit_insn (gen_ashrsi3 (operand0, temp, shift_16)); DONE; diff --git a/gcc/config/m68k/a-ux.h b/gcc/config/m68k/a-ux.h index 229b6ab045b..1b85ce44046 100644 --- a/gcc/config/m68k/a-ux.h +++ b/gcc/config/m68k/a-ux.h @@ -1,5 +1,5 @@ /* Definitions for Motorola 680x0 running A/UX - Copyright (C) 1996, 1998 Free Software Foundation, Inc. + Copyright (C) 1996, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -116,14 +116,14 @@ crt2.o%s " #undef FUNCTION_VALUE #define FUNCTION_VALUE(VALTYPE, FUNC) \ (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \ + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \ : (POINTER_TYPE_P (VALTYPE) \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \ - : gen_rtx (REG, TYPE_MODE (VALTYPE), 0))) + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \ + : gen_rtx_REG (TYPE_MODE (VALTYPE), 0))) #undef LIBCALL_VALUE #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), ((TARGET_68881 && \ + gen_rtx_REG ((MODE), ((TARGET_68881 && \ ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0)) /* 1 if N is a possible register number for a function value. @@ -166,9 +166,9 @@ crt2.o%s " #undef FINALIZE_TRAMPOLINE #define FINALIZE_TRAMPOLINE(TRAMP) \ - emit_library_call(gen_rtx(SYMBOL_REF, Pmode, "__clear_cache"), \ - 0, VOIDmode, 2, TRAMP, Pmode, \ - plus_constant(TRAMP, TRAMPOLINE_SIZE), Pmode); + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \ + 0, VOIDmode, 2, TRAMP, Pmode, \ + plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode); /* Clear the instruction cache from `beg' to `end'. This makes an inline system call to SYS_sysm68k. The arguments are as follows: diff --git a/gcc/config/m68k/crds.h b/gcc/config/m68k/crds.h index 441b285b4ee..89bf07ac1d4 100644 --- a/gcc/config/m68k/crds.h +++ b/gcc/config/m68k/crds.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler; Charles River Data Systems UNiverse/32. - Copyright (C) 1987, 1993, 1994, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 93, 94, 96, 97, 1998, 1999 Free Software Foundation, Inc. Contributed by Gary E. Miller (Gary_Edmunds_Miller@cup.portal.com) This file is part of GNU CC. @@ -79,7 +79,7 @@ Boston, MA 02111-1307, USA. */ #if 0 #define HAVE_probe 1 -#define gen_probe() gen_rtx(ASM_INPUT, VOIDmode, "tstb -2048(sp)\t;probe\n") +#define gen_probe() gen_rtx_ASM_INPUT (VOIDmode, "tstb -2048(sp)\t;probe\n") #else #undef NEED_PROBE #define NEED_PROBE (-2048) @@ -109,7 +109,7 @@ Boston, MA 02111-1307, USA. */ /* unos uses ".comm c.sac" returns &c.sac in d0 */ /* make pointer to c.sac ? #undef STRUCT_VALUE_REGNUM -#define STRUCT_VALUE gen_rtx(MEM, Pmode, gen_rtx( , , ) ) +#define STRUCT_VALUE gen_rtx_MEM (Pmode, gen_rtx( , , ) ) */ #define BSS_SECTION_ASM_OP ".bss" diff --git a/gcc/config/m68k/isi.h b/gcc/config/m68k/isi.h index a458cf9e080..32d2706aab0 100644 --- a/gcc/config/m68k/isi.h +++ b/gcc/config/m68k/isi.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. ISI 68000/68020 version. Intended only for use with GAS, and not ISI's assembler, which is buggy - Copyright (C) 1988, 1996 Free Software Foundation, Inc. + Copyright (C) 1988, 1996, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -74,7 +74,7 @@ Boston, MA 02111-1307, USA. */ #define FUNCTION_VALUE(VALTYPE,FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE)) #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), ((TARGET_68881 && ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0)) + gen_rtx_REG ((MODE), ((TARGET_68881 && ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0)) /* 1 if N is a possible register number for a function value. D0 may be used, and F0 as well if -m68881 is specified. */ diff --git a/gcc/config/m68k/linux.h b/gcc/config/m68k/linux.h index d100f5c6fe5..a7707dd800f 100644 --- a/gcc/config/m68k/linux.h +++ b/gcc/config/m68k/linux.h @@ -1,6 +1,6 @@ /* Definitions for Motorola 68k running Linux-based GNU systems with ELF format. - Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1995, 1996, 1997, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -298,8 +298,8 @@ do { \ #define LIBCALL_VALUE(MODE) \ ((((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode) \ && TARGET_68881) \ - ? gen_rtx_REG (MODE, 16) \ - : gen_rtx_REG (MODE, 0)) + ? gen_rtx_REG ((MODE), 16) \ + : gen_rtx_REG ((MODE), 0)) /* In m68k svr4, a symbol_ref rtx can be a valid PIC operand if it is an operand of a function call. */ diff --git a/gcc/config/m68k/lynx.h b/gcc/config/m68k/lynx.h index 8c54b8bc13f..b0b7206634c 100644 --- a/gcc/config/m68k/lynx.h +++ b/gcc/config/m68k/lynx.h @@ -1,5 +1,5 @@ /* Definitions for Motorola 680x0 running LynxOS. - Copyright (C) 1993, 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1993, 94, 95, 96, 98, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -62,9 +62,10 @@ Boston, MA 02111-1307, USA. */ #undef LIBCALL_VALUE #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), \ - ((TARGET_68881 \ - && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \ + gen_rtx_REG ((MODE), \ + ((TARGET_68881 \ + && ((MODE) == SFmode || (MODE) == DFmode \ + || (MODE) == XFmode)) \ ? 16 : 0)) #undef FUNCTION_VALUE_REGNO_P diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c index 659c7057cb2..2db8626b01e 100644 --- a/gcc/config/m68k/m68k.c +++ b/gcc/config/m68k/m68k.c @@ -18,8 +18,6 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -/* Some output-actions in m68k.md need these. */ #include "config.h" #include "system.h" #include "tree.h" @@ -2147,7 +2145,7 @@ output_addsi3 (operands) if (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) >= -8) { - operands[2] = GEN_INT (-INTVAL (operands[2])); + operands[2] = GEN_INT (- INTVAL (operands[2])); return "subq%.l %2,%0"; } /* On the CPU32 it is faster to use two addql instructions to @@ -2164,7 +2162,7 @@ output_addsi3 (operands) if (INTVAL (operands[2]) < -8 && INTVAL (operands[2]) >= -16) { - operands[2] = GEN_INT (-INTVAL (operands[2]) - 8); + operands[2] = GEN_INT (- INTVAL (operands[2]) - 8); return "subq%.l %#8,%0\n\tsubq%.l %2,%0"; } } diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 33c9885c331..37e5ea32c17 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -1504,7 +1504,7 @@ "* { CC_STATUS_INIT; - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"moveq %#0,%0\;moveq %#0,%2\;move%.b %1,%2\"; }") @@ -1515,7 +1515,7 @@ "* { CC_STATUS_INIT; - operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"moveq %#0,%0\;moveq %#0,%2\;move%.w %1,%2\"; }") @@ -2197,32 +2197,33 @@ return \"add%.l %R2,%R0\;addx%.l %2,%0\"; else if (GET_CODE (operands[2]) == MEM && GET_CODE (XEXP (operands[2], 0)) == POST_INC) - { - return \"move%.l %2,%3\;add%.l %2,%R0\;addx%.l %3,%0\"; - } + return \"move%.l %2,%3\;add%.l %2,%R0\;addx%.l %3,%0\"; else { + rtx high, low; rtx xoperands[2]; + if (GET_CODE (operands[2]) == REG) - operands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); - else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); - operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); + low = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); + high = operands[2]; } - else if (GET_CODE (operands[2]) == CONST_INT) + else if (CONSTANT_P (operands[2])) + split_double (operands[2], &high, &low); + else { - operands[1] = operands[2]; - operands[2] = INTVAL (operands[2]) < 0 ? constm1_rtx : const0_rtx; + low = adj_offsettable_operand (operands[2], 4); + high = operands[2]; } - else - operands[1] = adj_offsettable_operand (operands[2], 4); + + operands[1] = low, operands[2] = high; xoperands[0] = operands[3]; if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) >= -8 && INTVAL (operands[1]) < 0) xoperands[1] = GEN_INT (-INTVAL (operands[2]) - 1); else xoperands[1] = operands[2]; + output_asm_insn (output_move_simode (xoperands), xoperands); if (GET_CODE (operands[1]) == CONST_INT) { @@ -2255,10 +2256,8 @@ CC_STATUS_INIT; if (GET_CODE (XEXP (operands[0], 0)) == POST_INC) { - operands[1] - = gen_rtx_MEM (SImode, - gen_rtx_PLUS (VOIDmode, XEXP(operands[0], 0), - GEN_INT (-8))); + operands[1] = gen_rtx_MEM (SImode, + plus_constant (XEXP(operands[0], 0), -8)); return \"move%.l %0,%3\;add%.l %R2,%0\;addx%.l %2,%3\;move%.l %3,%1\"; } else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) @@ -2368,7 +2367,7 @@ if (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) >= -8) { - operands[2] = GEN_INT (-INTVAL (operands[2])); + operands[2] = GEN_INT (- INTVAL (operands[2])); return \"subq%.w %2,%0\"; } /* On the CPU32 it is faster to use two addqw instructions to @@ -2385,7 +2384,7 @@ if (INTVAL (operands[2]) < -8 && INTVAL (operands[2]) >= -16) { - operands[2] = GEN_INT (-INTVAL (operands[2]) - 8); + operands[2] = GEN_INT (- INTVAL (operands[2]) - 8); return \"subq%.w %#8,%0\;subq%.w %2,%0\"; } } @@ -2430,7 +2429,7 @@ if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8) { - operands[1] = GEN_INT (-INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"subq%.w %1,%0\"; } /* On the CPU32 it is faster to use two addqw instructions to @@ -2447,7 +2446,7 @@ if (INTVAL (operands[1]) < -8 && INTVAL (operands[1]) >= -16) { - operands[1] = GEN_INT (-INTVAL (operands[1]) - 8); + operands[1] = GEN_INT (- INTVAL (operands[1]) - 8); return \"subq%.w %#8,%0\;subq%.w %1,%0\"; } } @@ -2486,7 +2485,7 @@ if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8) { - operands[1] = GEN_INT (-INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"subq%.w %1,%0\"; } /* On the CPU32 it is faster to use two addqw instructions to @@ -2503,7 +2502,7 @@ if (INTVAL (operands[1]) < -8 && INTVAL (operands[1]) >= -16) { - operands[1] = GEN_INT (-INTVAL (operands[1]) - 8); + operands[1] = GEN_INT (- INTVAL (operands[1]) - 8); return \"subq%.w %#8,%0\;subq%.w %1,%0\"; } } @@ -2536,7 +2535,7 @@ return \"addq%.b %2,%0\"; if (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) >= -8) { - operands[2] = GEN_INT (-INTVAL (operands[2])); + operands[2] = GEN_INT (- INTVAL (operands[2])); return \"subq%.b %2,%0\"; } } @@ -2562,7 +2561,7 @@ return \"addq%.b %1,%0\"; if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8) { - operands[1] = GEN_INT (-INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"subq%.b %1,%0\"; } } @@ -2588,7 +2587,7 @@ return \"addq%.b %1,%0\"; if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8) { - operands[1] = GEN_INT (-INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"subq%.b %1,%0\"; } } @@ -2763,27 +2762,30 @@ } else { + rtx high, low; rtx xoperands[2]; + if (GET_CODE (operands[2]) == REG) - operands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); - else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); - operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); + low = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); + high = operands[2]; } - else if (GET_CODE (operands[2]) == CONST_INT) + else if (CONSTANT_P (operands[2])) + split_double (operands[2], &high, &low); + else { - operands[1] = operands[2]; - operands[2] = INTVAL (operands[2]) < 0 ? constm1_rtx : const0_rtx; + low = adj_offsettable_operand (operands[2], 4); + high = operands[2]; } - else - operands[1] = adj_offsettable_operand (operands[2], 4); + + operands[1] = low, operands[2] = high; xoperands[0] = operands[3]; if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) >= -8 && INTVAL (operands[1]) < 0) xoperands[1] = GEN_INT (-INTVAL (operands[2]) - 1); else xoperands[1] = operands[2]; + output_asm_insn (output_move_simode (xoperands), xoperands); if (GET_CODE (operands[1]) == CONST_INT) { @@ -2817,9 +2819,7 @@ if (GET_CODE (XEXP (operands[0], 0)) == POST_INC) { operands[1] - = gen_rtx_MEM (SImode, - gen_rtx_PLUS (VOIDmode, XEXP(operands[0], 0), - GEN_INT (-8))); + = gen_rtx_MEM (SImode, plus_constant (XEXP (operands[0], 0), -8)); return \"move%.l %0,%3\;sub%.l %R2,%0\;subx%.l %2,%3\;move%.l %3,%1\"; } else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) @@ -3641,21 +3641,12 @@ { CC_STATUS_INIT; /* We can get CONST_DOUBLE, but also const1_rtx etc. */ - if (GET_CODE (operands[2]) == CONST_DOUBLE - || GET_CODE (operands[2]) == CONST_INT) + if (CONSTANT_P (operands[2])) { rtx hi, lo; - if (GET_CODE (operands[2]) == CONST_DOUBLE) - { - hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); - lo = GEN_INT (CONST_DOUBLE_LOW (operands[2])); - } - else - { - lo = operands[2]; - hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx; - } + split_double (operands[2], &hi, &lo); + switch (INTVAL (hi)) { case 0 : @@ -3790,7 +3781,7 @@ CC_STATUS_INIT; if (GET_CODE (operands[0]) == REG) - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 4); if (GET_MODE (operands[1]) == SImode) @@ -3814,21 +3805,12 @@ { CC_STATUS_INIT; /* We can get CONST_DOUBLE, but also const1_rtx etc. */ - if (GET_CODE (operands[2]) == CONST_DOUBLE - || GET_CODE (operands[2]) == CONST_INT) + if (CONSTANT_P (operands[2])) { rtx hi, lo; - if (GET_CODE (operands[2]) == CONST_DOUBLE) - { - hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); - lo = GEN_INT (CONST_DOUBLE_LOW (operands[2])); - } - else - { - lo = operands[2]; - hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx; - } + split_double (operands[2], &hi, &lo); + switch (INTVAL (hi)) { case 0 : @@ -4001,21 +3983,13 @@ { CC_STATUS_INIT; /* We can get CONST_DOUBLE, but also const1_rtx etc. */ - if (GET_CODE (operands[2]) == CONST_DOUBLE - || GET_CODE (operands[2]) == CONST_INT) + + if (CONSTANT_P (operands[2])) { rtx hi, lo; - if (GET_CODE (operands[2]) == CONST_DOUBLE) - { - hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); - lo = GEN_INT (CONST_DOUBLE_LOW (operands[2])); - } - else - { - lo = operands[2]; - hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx; - } + split_double (operands[2], &hi, &lo); + switch (INTVAL (hi)) { case 0 : @@ -4248,7 +4222,7 @@ target = operand_subword_force (operands[0], 0, SFmode); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, SFmode), - GEN_INT(0x80000000), target, 0, OPTAB_WIDEN); + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -4299,7 +4273,7 @@ target = operand_subword (operands[0], 0, 1, DFmode); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, DFmode), - GEN_INT(0x80000000), target, 0, OPTAB_WIDEN); + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -4382,7 +4356,7 @@ target = operand_subword_force (operands[0], 0, SFmode); result = expand_binop (SImode, and_optab, operand_subword_force (operands[1], 0, SFmode), - GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN); + GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -4428,7 +4402,7 @@ target = operand_subword (operands[0], 0, 1, DFmode); result = expand_binop (SImode, and_optab, operand_subword_force (operands[1], 0, DFmode), - GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN); + GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -5645,8 +5619,7 @@ int width = GET_CODE (operands[0]) == REG ? 31 : 7; return output_btst (operands, GEN_INT (width - INTVAL (operands[2])), - operands[0], - insn, 1000); + operands[0], insn, 1000); /* Pass 1000 as SIGNPOS argument so that btst will not think we are testing the sign bit for an `and' and assume that nonzero implies a negative result. */ @@ -5670,10 +5643,8 @@ && GET_CODE (operands[2]) == CONST_INT) { int width = GET_CODE (operands[0]) == REG ? 31 : 7; - return output_btst (operands, - GEN_INT (width - INTVAL (operands[2])), - operands[0], - insn, 1000); + return output_btst (operands, GEN_INT (width - INTVAL (operands[2])), + operands[0], insn, 1000); /* Pass 1000 as SIGNPOS argument so that btst will not think we are testing the sign bit for an `and' and assume that nonzero implies a negative result. */ @@ -7003,8 +6974,7 @@ "NEED_PROBE" "* { - operands[0] = gen_rtx_PLUS (SImode, stack_pointer_rtx, - GEN_INT (NEED_PROBE)); + operands[0] = plus_constant (stack_pointer_rtx, NEED_PROBE); return \"tstl %a0\"; }") @@ -7207,9 +7177,7 @@ xoperands[1] = operands[1]; xoperands[2] - = gen_rtx_MEM (QImode, - gen_rtx_PLUS (VOIDmode, stack_pointer_rtx, - GEN_INT (3))); + = gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 3)); xoperands[3] = stack_pointer_rtx; if (!TARGET_5200) output_asm_insn (\"subq%.w %#4,%3\;move%.b %1,%2\", xoperands); @@ -7552,7 +7520,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"move%.l %1,%-\", xoperands); output_asm_insn (\"move%.l %1,%-\", operands); return \"f%&move%.d %+,%0\"; @@ -7784,7 +7752,7 @@ target = operand_subword (operands[0], 0, 1, XFmode); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, XFmode), - GEN_INT(0x80000000), target, 0, OPTAB_WIDEN); + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -7833,7 +7801,7 @@ target = operand_subword (operands[0], 0, 1, XFmode); result = expand_binop (SImode, and_optab, operand_subword_force (operands[1], 0, XFmode), - GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN); + GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN); if (result == 0) abort (); diff --git a/gcc/config/m68k/m68kemb.h b/gcc/config/m68k/m68kemb.h index 9fa0c6923bc..379bf3afe0a 100644 --- a/gcc/config/m68k/m68kemb.h +++ b/gcc/config/m68k/m68kemb.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. "embedded" 68XXX. This is meant to be included after m68k.h. - Copyright (C) 1994, 1995 Free Software Foundation, Inc. */ + Copyright (C) 1994, 1995, 1998, 1999 Free Software Foundation, Inc. */ #define PTRDIFF_TYPE "long int" #define SIZE_TYPE "long unsigned int" @@ -26,10 +26,11 @@ #define FUNCTION_VALUE(VALTYPE,FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE)) #undef LIBCALL_VALUE -#define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), \ - ((TARGET_68881 \ - && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \ +#define LIBCALL_VALUE(MODE) \ + gen_rtx_REG ((MODE), \ + ((TARGET_68881 \ + && ((MODE) == SFmode || (MODE) == DFmode \ + || (MODE) == XFmode)) \ ? 16 : 0)) #undef FUNCTION_VALUE_REGNO_P diff --git a/gcc/config/m68k/m68kv4.h b/gcc/config/m68k/m68kv4.h index 6c229b6e558..dd2b3c1d6fd 100644 --- a/gcc/config/m68k/m68kv4.h +++ b/gcc/config/m68k/m68kv4.h @@ -1,5 +1,5 @@ /* Target definitions for GNU compiler for mc680x0 running System V.4 - Copyright (C) 1991, 1993, 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1991, 93, 94, 95, 96, 1998, 1999 Free Software Foundation, Inc. Contributed by Ron Guilmette (rfg@monkeys.com) and Fred Fish (fnf@cygnus.com). @@ -167,10 +167,10 @@ while (0) #undef FUNCTION_VALUE #define FUNCTION_VALUE(VALTYPE, FUNC) \ (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \ + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \ : (POINTER_TYPE_P (VALTYPE) \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \ - : gen_rtx (REG, TYPE_MODE (VALTYPE), 0))) + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \ + : gen_rtx_REG (TYPE_MODE (VALTYPE), 0))) /* For compatibility with the large body of existing code which does not always properly declare external functions returning pointer types, the @@ -195,8 +195,8 @@ do { \ #define LIBCALL_VALUE(MODE) \ ((((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode) \ && TARGET_68881) \ - ? gen_rtx (REG, (MODE), 16) \ - : gen_rtx (REG, (MODE), 0)) + ? gen_rtx_REG ((MODE), 16) \ + : gen_rtx_REG ((MODE), 0)) /* Boundary (in *bits*) on which stack pointer should be aligned. The m68k/SVR4 convention is to keep the stack pointer longword aligned. */ @@ -321,13 +321,13 @@ int switch_table_difference_label_flag; #undef TRAMPOLINE_TEMPLATE #define TRAMPOLINE_TEMPLATE(FILE) \ { \ - ASM_OUTPUT_SHORT (FILE, GEN_INT (0x227a)); \ - ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \ - ASM_OUTPUT_SHORT (FILE, GEN_INT (0x2f3a)); \ - ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \ - ASM_OUTPUT_SHORT (FILE, GEN_INT (0x4e75)); \ - ASM_OUTPUT_INT (FILE, const0_rtx); \ - ASM_OUTPUT_INT (FILE, const0_rtx); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x227a)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x2f3a)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x4e75)); \ + ASM_OUTPUT_INT (FILE, const0_rtx); \ + ASM_OUTPUT_INT (FILE, const0_rtx); \ } /* Redefine since we are using a different trampoline */ @@ -341,6 +341,6 @@ int switch_table_difference_label_flag; #undef INITIALIZE_TRAMPOLINE #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 10)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 14)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 10)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 14)), FNADDR); \ } diff --git a/gcc/config/m68k/mot3300.h b/gcc/config/m68k/mot3300.h index 1a4ca6dbf84..8074e5b4d2e 100644 --- a/gcc/config/m68k/mot3300.h +++ b/gcc/config/m68k/mot3300.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler, SysV68 Motorola 3300 Delta Series. - Copyright (C) 1987, 93, 94, 95, 96, 1997, 1998, 1999 Free Software Foundation, Inc. + Copyright (C) 1987, 93-98, 1999 Free Software Foundation, Inc. Contributed by Abramo and Roberto Bagnara (bagnara@dipisa.di.unipi.it) based on Alex Crain's 3B1 definitions. Maintained by Philippe De Muyter (phdm@info.ucl.ac.be). @@ -298,20 +298,21 @@ dtors_section () \ /* sysV68 (brain damaged) cc convention support. */ #define FUNCTION_VALUE(VALTYPE,FUNC) \ (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \ + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \ : (POINTER_TYPE_P (VALTYPE) \ - ? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \ - : gen_rtx (REG, TYPE_MODE (VALTYPE), 0))) + ? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \ + : gen_rtx_REG (TYPE_MODE (VALTYPE), 0))) /* If TARGET_68881, SF and DF values are returned in fp0 instead of d0. */ /* Is LIBCALL_VALUE never called with a pointer ? */ #undef LIBCALL_VALUE -#define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), \ - ((TARGET_68881 \ - && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \ - ? 16 : 0)) +#define LIBCALL_VALUE(MODE) \ + gen_rtx_REG ((MODE), \ + ((TARGET_68881 \ + && ((MODE) == SFmode || (MODE) == DFmode \ + || (MODE) == XFmode)) \ + ? 16 : 0)) /* 1 if N is a possible register number for a function value. d0 may be used, and fp0 as well if -msoft-float is not specified. */ @@ -772,8 +773,8 @@ do {(CUM).offset = 0;\ #undef FUNCTION_ARG #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ -(((CUM).libcall && (CUM).offset == 0) ? gen_rtx(REG, (MODE), 0)\ -: (TARGET_REGPARM && (CUM).offset < 8) ? gen_rtx (REG, (MODE), (CUM).offset / 4) : 0) +(((CUM).libcall && (CUM).offset == 0) ? gen_rtx_REG ((MODE), 0)\ +: (TARGET_REGPARM && (CUM).offset < 8) ? gen_rtx_REG ((MODE), (CUM).offset / 4) : 0) #undef FUNCTION_ARG_PARTIAL_NREGS #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ @@ -815,5 +816,5 @@ do {(CUM).offset = 0;\ if (!TARGET_68040) \ ; \ else \ - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__clear_insn_cache"), \ + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_insn_cache"), \ 0, VOIDmode, 0) diff --git a/gcc/config/m68k/news.h b/gcc/config/m68k/news.h index f83524cc0cf..246f5e77e85 100644 --- a/gcc/config/m68k/news.h +++ b/gcc/config/m68k/news.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. SONY NEWS-OS 4 version. - Copyright (C) 1987, 89, 93, 94, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 89, 93, 94, 96-98, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -126,11 +126,12 @@ Boston, MA 02111-1307, USA. */ #define FUNCTION_VALUE(VALTYPE,FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE)) -#define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), \ - ((TARGET_68881 \ - && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \ - ? 16 : 0)) +#define LIBCALL_VALUE(MODE) \ + gen_rtx_REG ((MODE), \ + ((TARGET_68881 \ + && ((MODE) == SFmode || (MODE) == DFmode \ + || (MODE) == XFmode)) \ + ? 16 : 0)) #define ASM_OUTPUT_ALIGN(FILE,LOG) \ fprintf (FILE, "\t.align %d\n", (LOG)) diff --git a/gcc/config/m68k/next.h b/gcc/config/m68k/next.h index 8391ab50cb1..9320a1fccac 100644 --- a/gcc/config/m68k/next.h +++ b/gcc/config/m68k/next.h @@ -1,5 +1,5 @@ /* Target definitions for GNU compiler for mc680x0 running NeXTSTEP - Copyright (C) 1989, 90-94, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 90-94, 96, 97, 98, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -186,8 +186,8 @@ Boston, MA 02111-1307, USA. */ #undef FINALIZE_TRAMPOLINE #define FINALIZE_TRAMPOLINE(TRAMP) \ - emit_library_call(gen_rtx(SYMBOL_REF, Pmode, "__enable_execute_stack"), \ - 0, VOIDmode, 1, memory_address(SImode, (TRAMP)), Pmode) + emit_library_call(gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"), \ + 0, VOIDmode, 1, memory_address (SImode, (TRAMP)), Pmode) /* A C expression used to clear the instruction cache from address BEG to address END. On NeXTSTEP this i a system trap. */ diff --git a/gcc/config/m68k/sun3.h b/gcc/config/m68k/sun3.h index 13e927ede4d..4e277636c3d 100644 --- a/gcc/config/m68k/sun3.h +++ b/gcc/config/m68k/sun3.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Sun 68000/68020 version. - Copyright (C) 1987, 1988, 1993, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 93, 95, 96, 98, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -171,11 +171,12 @@ Boston, MA 02111-1307, USA. */ /* This is not a good idea. It prevents interoperation between files compiled with -m68881 and those compiled with -msoft-float. */ #if 0 -#define FUNCTION_VALUEX(MODE) \ - gen_rtx (REG, (MODE), \ - ((TARGET_68881 \ - && ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \ - ? 16 : 0)) +#define FUNCTION_VALUEX(MODE) \ + gen_rtx_REG ((MODE), \ + ((TARGET_68881 \ + && ((MODE) == SFmode || (MODE) == DFmode \ + || (MODE) == XFmode)) \ + ? 16 : 0)) #undef FUNCTION_VALUE #define FUNCTION_VALUE(VALTYPE,FUNC) FUNCTION_VALUEX (TYPE_MODE (VALTYPE)) diff --git a/gcc/config/m88k/m88k.c b/gcc/config/m88k/m88k.c index df3010e1f1c..ddc80506b1b 100644 --- a/gcc/config/m88k/m88k.c +++ b/gcc/config/m88k/m88k.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Motorola 88000. - Copyright (C) 1988, 92, 93, 94, 95, 16, 1997, 1999 Free Software + Copyright (C) 1988, 92, 93, 94, 95, 96, 1997, 1998, 1999 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@mcc.com) Currently maintained by (gcc@dg-rtp.dg.com) @@ -22,12 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" - -#include <stdio.h> -#include <sys/types.h> -#include <time.h> -#include <ctype.h> - +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -44,8 +39,6 @@ Boston, MA 02111-1307, USA. */ #include "flags.h" extern char *version_string; -extern time_t time (); -extern char *ctime (); extern int flag_traditional; extern FILE *asm_out_file; @@ -237,7 +230,7 @@ emit_move_sequence (operands, mode, scratch) || GET_CODE (operand1) == MEM) { /* Run this case quickly. */ - emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1)); + emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); return 1; } } @@ -247,7 +240,7 @@ emit_move_sequence (operands, mode, scratch) || (operand1 == const0_rtx && GET_MODE_SIZE (mode) <= UNITS_PER_WORD)) { /* Run this case quickly. */ - emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1)); + emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); return 1; } if (! reload_in_progress && ! reload_completed) @@ -269,7 +262,7 @@ emit_move_sequence (operands, mode, scratch) && symbolic_address_p (operand1), operand1, temp, scratch); if (mode != SImode) - operands[1] = gen_rtx (SUBREG, mode, operands[1], 0); + operands[1] = gen_rtx_SUBREG (mode, operands[1], 0); } } @@ -316,28 +309,33 @@ legitimize_address (pic, orig, reg, scratch) temp = ((reload_in_progress || reload_completed) ? reg : gen_reg_rtx (Pmode)); - emit_insn (gen_rtx (SET, VOIDmode, temp, - gen_rtx (HIGH, SImode, - gen_rtx (UNSPEC, SImode, - gen_rtvec (1, addr), - 0)))); - emit_insn (gen_rtx (SET, VOIDmode, temp, - gen_rtx (LO_SUM, SImode, temp, - gen_rtx (UNSPEC, SImode, - gen_rtvec (1, addr), - 0)))); + emit_insn (gen_rtx_SET + (VOIDmode, temp, + gen_rtx_HIGH (SImode, + gen_rtx_UNSPEC (SImode, + gen_rtvec (1, addr), + 0)))); + + emit_insn (gen_rtx_SET + (VOIDmode, temp, + gen_rtx_LO_SUM (SImode, temp, + gen_rtx_UNSPEC (SImode, + gen_rtvec (1, addr), + 0)))); addr = temp; } - new = gen_rtx (MEM, Pmode, - gen_rtx (PLUS, SImode, - pic_offset_table_rtx, addr)); + + new = gen_rtx_MEM (Pmode, + gen_rtx_PLUS (SImode, + pic_offset_table_rtx, addr)); + current_function_uses_pic_offset_table = 1; RTX_UNCHANGING_P (new) = 1; insn = emit_move_insn (reg, new); /* Put a REG_EQUAL note on this insn, so that it can be optimized by loop. */ - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, orig, - REG_NOTES (insn)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig, + REG_NOTES (insn)); new = reg; } else if (GET_CODE (addr) == CONST) @@ -381,7 +379,7 @@ legitimize_address (pic, orig, reg, scratch) for this address. */ abort (); } - new = gen_rtx (PLUS, SImode, base, addr); + new = gen_rtx_PLUS (SImode, base, addr); /* Should we set special REG_NOTEs here? */ } } @@ -395,15 +393,15 @@ legitimize_address (pic, orig, reg, scratch) reg = gen_reg_rtx (Pmode); } - emit_insn (gen_rtx (SET, VOIDmode, - reg, gen_rtx (HIGH, SImode, addr))); - new = gen_rtx (LO_SUM, SImode, reg, addr); + emit_insn (gen_rtx_SET (VOIDmode, + reg, gen_rtx_HIGH (SImode, addr))); + new = gen_rtx_LO_SUM (SImode, reg, addr); } if (new != orig && GET_CODE (orig) == MEM) { - new = gen_rtx (MEM, GET_MODE (orig), new); + new = gen_rtx_MEM (GET_MODE (orig), new); RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (orig); MEM_COPY_ATTRIBUTES (new, orig); } @@ -527,7 +525,7 @@ expand_block_move (dest_mem, src_mem, operands) else { #ifdef TARGET_MEM_FUNCTIONS - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0, + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0, VOIDmode, 3, operands[0], Pmode, operands[1], Pmode, @@ -535,7 +533,7 @@ expand_block_move (dest_mem, src_mem, operands) TREE_UNSIGNED (sizetype)), TYPE_MODE (sizetype)); #else - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "bcopy"), 0, + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "bcopy"), 0, VOIDmode, 3, operands[1], Pmode, operands[0], Pmode, @@ -596,22 +594,22 @@ block_move_loop (dest, dest_mem, src, src_mem, size, align) offset_rtx = GEN_INT (MOVSTR_LOOP + (1 - units) * align); - value_rtx = gen_rtx (MEM, MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode, - gen_rtx (PLUS, Pmode, - gen_rtx (REG, Pmode, 3), - offset_rtx)); + value_rtx = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode, + gen_rtx_PLUS (Pmode, + gen_rtx_REG (Pmode, 3), + offset_rtx)); RTX_UNCHANGING_P (value_rtx) = RTX_UNCHANGING_P (src_mem); MEM_COPY_ATTRIBUTES (value_rtx, src_mem); emit_insn (gen_call_movstrsi_loop - (gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (entry_name)), + (gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name)), dest, src, offset_rtx, value_rtx, - gen_rtx (REG, mode, ((units & 1) ? 4 : 5)), + gen_rtx_REG (mode, ((units & 1) ? 4 : 5)), GEN_INT (count))); if (remainder) - block_move_sequence (gen_rtx (REG, Pmode, 2), dest_mem, - gen_rtx (REG, Pmode, 3), src_mem, + block_move_sequence (gen_rtx_REG (Pmode, 2), dest_mem, + gen_rtx_REG (Pmode, 3), src_mem, remainder, align, MOVSTR_LOOP + align); } @@ -652,10 +650,11 @@ block_move_no_loop (dest, dest_mem, src, src_mem, size, align) offset_rtx = GEN_INT (most - (size - remainder)); - value_rtx = gen_rtx (MEM, MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode, - gen_rtx (PLUS, Pmode, - gen_rtx (REG, Pmode, 3), - offset_rtx)); + value_rtx = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode, + gen_rtx_PLUS (Pmode, + gen_rtx_REG (Pmode, 3), + offset_rtx)); + RTX_UNCHANGING_P (value_rtx) = RTX_UNCHANGING_P (src_mem); MEM_COPY_ATTRIBUTES (value_rtx, src_mem); @@ -663,13 +662,13 @@ block_move_no_loop (dest, dest_mem, src, src_mem, size, align) ? (align == 8 ? 6 : 5) : 4); emit_insn (gen_call_block_move - (gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (entry_name)), + (gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name)), dest, src, offset_rtx, value_rtx, - gen_rtx (REG, mode, value_reg))); + gen_rtx_REG (mode, value_reg))); if (remainder) - block_move_sequence (gen_rtx (REG, Pmode, 2), dest_mem, - gen_rtx (REG, Pmode, 3), src_mem, + block_move_sequence (gen_rtx_REG (Pmode, 2), dest_mem, + gen_rtx_REG (Pmode, 3), src_mem, remainder, align, most); } @@ -724,13 +723,12 @@ block_move_sequence (dest, dest_mem, src, src_mem, size, align, offset) temp[next] = gen_reg_rtx (mode[next]); } size -= amount[next]; - srcp = gen_rtx (MEM, - MEM_IN_STRUCT_P (src_mem) ? mode[next] : BLKmode, - gen_rtx (PLUS, Pmode, src, - GEN_INT (offset_ld))); + srcp = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode[next] : BLKmode, + plus_constant (src, offset_ld)); + RTX_UNCHANGING_P (srcp) = RTX_UNCHANGING_P (src_mem); MEM_COPY_ATTRIBUTES (srcp, src_mem); - emit_insn (gen_rtx (SET, VOIDmode, temp[next], srcp)); + emit_insn (gen_rtx_SET (VOIDmode, temp[next], srcp)); offset_ld += amount[next]; active[next] = TRUE; } @@ -738,13 +736,13 @@ block_move_sequence (dest, dest_mem, src, src_mem, size, align, offset) if (active[phase]) { active[phase] = FALSE; - dstp = gen_rtx (MEM, - MEM_IN_STRUCT_P (dest_mem) ? mode[phase] : BLKmode, - gen_rtx (PLUS, Pmode, dest, - GEN_INT (offset_st))); + dstp + = gen_rtx_MEM (MEM_IN_STRUCT_P (dest_mem) ? mode[phase] : BLKmode, + plus_constant (dest, offset_st)); + RTX_UNCHANGING_P (dstp) = RTX_UNCHANGING_P (dest_mem); MEM_COPY_ATTRIBUTES (dstp, dest_mem); - emit_insn (gen_rtx (SET, VOIDmode, dstp, temp[phase])); + emit_insn (gen_rtx_SET (VOIDmode, dstp, temp[phase])); offset_st += amount[phase]; } } @@ -927,9 +925,9 @@ output_call (operands, addr) } /* Record the values to be computed later as "def name,high-low". */ - sb_name = gen_rtx (EXPR_LIST, VOIDmode, operands[0], sb_name); - sb_high = gen_rtx (EXPR_LIST, VOIDmode, high, sb_high); - sb_low = gen_rtx (EXPR_LIST, VOIDmode, low, sb_low); + sb_name = gen_rtx_EXPR_LIST (VOIDmode, operands[0], sb_name); + sb_high = gen_rtx_EXPR_LIST (VOIDmode, high, sb_high); + sb_low = gen_rtx_EXPR_LIST (VOIDmode, low, sb_low); #endif /* Don't USE_GAS */ return last; @@ -1160,7 +1158,7 @@ legitimize_operand (op, mode) && (u.s.exponent1 == 0x8 || u.s.exponent1 == 0x7) /* Exponent fits */ && (temp = simplify_unary_operation (FLOAT_TRUNCATE, SFmode, op, mode)) != 0) - return gen_rtx (FLOAT_EXTEND, mode, force_reg (SFmode, temp)); + return gen_rtx_FLOAT_EXTEND (mode, force_reg (SFmode, temp)); } else if (register_operand (op, mode)) return op; @@ -1982,13 +1980,13 @@ m88k_expand_prologue () if (flag_pic && save_regs[PIC_OFFSET_TABLE_REGNUM]) { - rtx return_reg = gen_rtx (REG, SImode, 1); + rtx return_reg = gen_rtx_REG (SImode, 1); rtx label = gen_label_rtx (); rtx temp_reg; if (! save_regs[1]) { - temp_reg = gen_rtx (REG, SImode, TEMP_REGNUM); + temp_reg = gen_rtx_REG (SImode, TEMP_REGNUM); emit_move_insn (temp_reg, return_reg); } emit_insn (gen_locate1 (pic_offset_table_rtx, label)); @@ -2092,9 +2090,10 @@ emit_add (dstreg, srcreg, amount) int amount; { rtx incr = GEN_INT (abs (amount)); + if (! ADD_INTVAL (amount)) { - rtx temp = gen_rtx (REG, SImode, TEMP_REGNUM); + rtx temp = gen_rtx_REG (SImode, TEMP_REGNUM); emit_move_insn (temp, incr); incr = temp; } @@ -2207,22 +2206,23 @@ emit_ldst (store_p, regno, mode, offset) enum machine_mode mode; int offset; { - rtx reg = gen_rtx (REG, mode, regno); + rtx reg = gen_rtx_REG (mode, regno); rtx mem; if (SMALL_INTVAL (offset)) { - mem = gen_rtx (MEM, mode, plus_constant (stack_pointer_rtx, offset)); + mem = gen_rtx_MEM (mode, plus_constant (stack_pointer_rtx, offset)); } else { /* offset is too large for immediate index must use register */ rtx disp = GEN_INT (offset); - rtx temp = gen_rtx (REG, SImode, TEMP_REGNUM); - rtx regi = gen_rtx (PLUS, SImode, stack_pointer_rtx, temp); + rtx temp = gen_rtx_REG (SImode, TEMP_REGNUM); + rtx regi = gen_rtx_PLUS (SImode, stack_pointer_rtx, temp); + emit_move_insn (temp, disp); - mem = gen_rtx (MEM, mode, regi); + mem = gen_rtx_MEM (mode, regi); } if (store_p) @@ -2561,9 +2561,8 @@ m88k_function_arg (args_so_far, mode, type, named) || bytes != UNITS_PER_WORD)) return (rtx) 0; - return gen_rtx (REG, - ((mode == BLKmode) ? TYPE_MODE (type) : mode), - 2 + args_so_far); + return gen_rtx_REG (((mode == BLKmode) ? TYPE_MODE (type) : mode), + 2 + args_so_far); } /* Do what is necessary for `va_start'. We look at the current function @@ -2788,15 +2787,14 @@ emit_bcnd (op, label) rtx label; { if (m88k_compare_op1 == const0_rtx) - emit_jump_insn( gen_bcnd ( - gen_rtx (op, VOIDmode,m88k_compare_op0, const0_rtx), - label)); + emit_jump_insn (gen_bcnd + (gen_rtx (op, VOIDmode,m88k_compare_op0, const0_rtx), + label)); else if (m88k_compare_op0 == const0_rtx) - emit_jump_insn( gen_bcnd( - gen_rtx( - swap_condition (op), - VOIDmode, m88k_compare_op1, const0_rtx), - label)); + emit_jump_insn (gen_bcnd + (gen_rtx (swap_condition (op), + VOIDmode, m88k_compare_op1, const0_rtx), + label)); else if (op != EQ && op != NE) emit_jump_insn (gen_bxx (emit_test (op, VOIDmode), label)); else diff --git a/gcc/config/m88k/m88k.h b/gcc/config/m88k/m88k.h index 5017d8d901b..707bd3cebdd 100644 --- a/gcc/config/m88k/m88k.h +++ b/gcc/config/m88k/m88k.h @@ -975,9 +975,8 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, If the precise function being called is known, FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, \ - TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \ - 2) + gen_rtx_REG (TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \ + 2) /* Define this if it differs from FUNCTION_VALUE. */ /* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */ @@ -997,7 +996,7 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2) /* True if N is a possible register number for a function value as seen by the caller. */ @@ -1239,8 +1238,8 @@ extern struct rtx_def *m88k_va_arg (); #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 40)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 36)), CXT); \ } /*** Library Subroutine Names ***/ @@ -1416,23 +1415,23 @@ extern struct rtx_def *m88k_va_arg (); #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ { \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - copy_to_mode_reg (SImode, XEXP (X, 1))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + copy_to_mode_reg (SImode, XEXP (X, 1))); \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - copy_to_mode_reg (SImode, XEXP (X, 0))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + copy_to_mode_reg (SImode, XEXP (X, 0))); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + force_operand (XEXP (X, 0), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \ - (X) = gen_rtx (PLUS, Pmode, force_operand (XEXP (X, 0), NULL_RTX),\ - XEXP (X, 1)); \ + (X) = gen_rtx_PLUS (Pmode, force_operand (XEXP (X, 0), NULL_RTX),\ + XEXP (X, 1)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \ - (X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), NULL_RTX)); \ + (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), NULL_RTX)); \ if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \ || GET_CODE (X) == LABEL_REF) \ (X) = legitimize_address (flag_pic, X, 0, 0); \ diff --git a/gcc/config/m88k/m88k.md b/gcc/config/m88k/m88k.md index edab3f706ae..a82a528c420 100644 --- a/gcc/config/m88k/m88k.md +++ b/gcc/config/m88k/m88k.md @@ -1,5 +1,5 @@ ;;- Machine description for the Motorola 88000 for GNU C compiler -;;; Copyright (C) 1988, 92-96, 1999 Free Software Foundation, Inc. +;;; Copyright (C) 1988, 92-96, 1998, 1999 Free Software Foundation, Inc. ;; Contributed by Michael Tiemann (tiemann@mcc.com) ;; Currently maintained by (gcc@dg-rtp.dg.com) @@ -432,24 +432,25 @@ (match_dup 2))) (set (match_dup 0) (neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == GET_CODE (operands[3])) ; /* The conditions match. */ else if (GET_CODE (operands[1]) == reverse_condition (GET_CODE (operands[3]))) /* Reverse the condition by complimenting the compare word. */ - operands[4] = gen_rtx (NOT, CCmode, operands[4]); + operands[4] = gen_rtx_NOT (CCmode, operands[4]); else { /* Make the condition pairs line up by rotating the compare word. */ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - GEN_INT (((cv2 & ~1) - (cv1 & ~1)) & 0x1f)); + operands[4] = gen_rtx_ROTATE (CCmode, operands[4], + GEN_INT (((cv2 & ~1) - (cv1 & ~1)) + & 0x1f)); /* Reverse the condition if needed. */ if ((cv1 & 1) != (cv2 & 1)) - operands[4] = gen_rtx (NOT, CCmode, operands[4]); + operands[4] = gen_rtx_NOT (CCmode, operands[4]); }") (define_split @@ -469,7 +470,7 @@ (match_dup 2))) (set (match_dup 0) (neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == GET_CODE (operands[3])) ; /* The conditions match. */ else @@ -478,8 +479,8 @@ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - GEN_INT ((cv2 - cv1) & 0x1f)); + operands[4] = gen_rtx_ROTATE (CCmode, operands[4], + GEN_INT ((cv2 - cv1) & 0x1f)); }") (define_split @@ -499,7 +500,7 @@ (match_dup 4))) (set (match_dup 0) (neg:SI (match_op_dup 3 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == reverse_condition (GET_CODE (operands[3]))) ; @@ -509,8 +510,9 @@ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[2] = gen_rtx (ROTATE, CCmode, operands[2], - GEN_INT (((cv1 & ~1) - (cv2 & ~1)) & 0x1f)); + operands[2] = gen_rtx_ROTATE (CCmode, operands[2], + GEN_INT (((cv1 & ~1) - (cv2 & ~1)) + & 0x1f)); }") (define_split @@ -529,10 +531,10 @@ (match_dup 2))) (set (match_dup 0) (match_op_dup 1 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); /* Reverse the condition by complimenting the compare word. */ if (GET_CODE (operands[1]) != GET_CODE (operands[3])) - operands[4] = gen_rtx (NOT, CCmode, operands[4]);") + operands[4] = gen_rtx_NOT (CCmode, operands[4]);") (define_split [(set (match_operand:SI 0 "register_operand" "=r") @@ -549,7 +551,7 @@ (match_dup 2))) (set (match_dup 0) (match_op_dup 1 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);") + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);") (define_split [(set (match_operand:SI 0 "register_operand" "=r") @@ -566,7 +568,7 @@ (match_dup 2))) (set (match_dup 0) (match_op_dup 1 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);") + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);") (define_split [(set (match_operand:SI 0 "register_operand" "=r") @@ -585,23 +587,24 @@ (match_dup 2))) (set (match_dup 0) (neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == GET_CODE (operands[3])) ; /* The conditions match. */ else if (GET_CODE (operands[1]) == reverse_condition (GET_CODE (operands[3]))) /* Reverse the condition by complimenting the compare word. */ - operands[4] = gen_rtx (NOT, CCmode, operands[4]); + operands[4] = gen_rtx_NOT (CCmode, operands[4]); else { /* Make the condition pairs line up by rotating the compare word. */ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - GEN_INT (((cv2 & ~1) - (cv1 & ~1)) & 0x1f)); + operands[4] = gen_rtx_ROTATE (CCmode, operands[4], + GEN_INT (((cv2 & ~1) - (cv1 & ~1)) + & 0x1f)); /* Reverse the condition if needed. */ if ((cv1 & 1) != (cv2 & 1)) - operands[4] = gen_rtx (NOT, CCmode, operands[4]); + operands[4] = gen_rtx_NOT (CCmode, operands[4]); }") (define_split @@ -621,7 +624,7 @@ (match_dup 2))) (set (match_dup 0) (neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == GET_CODE (operands[3])) ; /* The conditions match. */ else @@ -629,8 +632,8 @@ /* Make the condition pairs line up by rotating the compare word. */ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - GEN_INT ((cv2 - cv1) & 0x1f)); + operands[4] = gen_rtx_ROTATE (CCmode, operands[4], + GEN_INT ((cv2 - cv1) & 0x1f)); }") (define_split @@ -650,7 +653,7 @@ (match_dup 4))) (set (match_dup 0) (neg:SI (match_op_dup 3 [(match_dup 5) (const_int 0)])))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); if (GET_CODE (operands[1]) == reverse_condition (GET_CODE (operands[3]))) ; @@ -659,8 +662,9 @@ /* Make the condition pairs line up by rotating the compare word. */ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); - operands[2] = gen_rtx (ROTATE, CCmode, operands[2], - GEN_INT (((cv1 & ~1) - (cv2 & ~1)) & 0x1f)); + operands[2] = gen_rtx_ROTATE (CCmode, operands[2], + GEN_INT (((cv1 & ~1) - (cv2 & ~1)) + & 0x1f)); }") (define_split @@ -679,10 +683,10 @@ (match_dup 2))) (set (match_dup 0) (match_op_dup 1 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0); + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0); /* Reverse the condition by complimenting the compare word. */ if (GET_CODE (operands[1]) != GET_CODE (operands[3])) - operands[4] = gen_rtx (NOT, CCmode, operands[4]);") + operands[4] = gen_rtx_NOT (CCmode, operands[4]);") (define_split [(set (match_operand:SI 0 "register_operand" "=r") @@ -699,7 +703,7 @@ (match_dup 2))) (set (match_dup 0) (match_op_dup 1 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);") + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);") (define_split [(set (match_operand:SI 0 "register_operand" "=r") @@ -716,7 +720,7 @@ (match_dup 4))) (set (match_dup 0) (match_op_dup 3 [(match_dup 5) (const_int 0)]))] - "operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);") + "operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);") ;; Logical operations on compare words. @@ -1786,7 +1790,7 @@ DONE; /* We don't want the clobber emitted, so handle this ourselves. */ - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -2279,8 +2283,8 @@ { operands[1] = legitimize_address (flag_pic, operands[1], 0, 0); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (ZERO_EXTEND, SImode, operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_ZERO_EXTEND (SImode, operands[1]))); DONE; } }") @@ -2852,7 +2856,7 @@ if (TARGET_USE_DIV) { - emit_move_insn (op0, gen_rtx (DIV, SImode, op1, op2)); + emit_move_insn (op0, gen_rtx_DIV (SImode, op1, op2)); if (TARGET_CHECK_ZERO_DIV && GET_CODE (op2) != CONST_INT) { rtx label = gen_label_rtx (); @@ -2881,7 +2885,7 @@ emit_insn (gen_cmpsi (op2, const0_rtx)); emit_jump_insn (gen_bgt (label1)); /* constant / 0-or-negative */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, neg_op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, neg_op2)); if (!neg) emit_insn (gen_negsi2 (op0, op0)); @@ -2891,7 +2895,7 @@ emit_barrier (); emit_label (label1); /* constant / positive */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, op2)); if (neg) emit_insn (gen_negsi2 (op0, op0)); } @@ -2914,7 +2918,7 @@ emit_insn (gen_cmpsi (op1, const0_rtx)); emit_jump_insn (gen_bge (label1)); /* 0-or-negative / constant */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, neg_op1, op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, neg_op1, op2)); if (!neg) emit_insn (gen_negsi2 (op0, op0)); @@ -2922,7 +2926,7 @@ emit_barrier (); emit_label (label1); /* positive / constant */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, op2)); if (neg) emit_insn (gen_negsi2 (op0, op0)); } @@ -2944,7 +2948,7 @@ emit_insn (gen_cmpsi (op1, const0_rtx)); emit_jump_insn (gen_bge (label2)); /* negative / negative-or-0 */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, neg_op1, neg_op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, neg_op1, neg_op2)); if (TARGET_CHECK_ZERO_DIV) { @@ -2958,7 +2962,7 @@ emit_barrier (); emit_label (label2); /* pos.-or-0 / neg.-or-0 */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, neg_op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, neg_op2)); if (TARGET_CHECK_ZERO_DIV) { @@ -2975,13 +2979,13 @@ emit_insn (gen_cmpsi (op1, const0_rtx)); emit_jump_insn (gen_bge (label3)); /* negative / positive */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, neg_op1, op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, neg_op1, op2)); emit_insn (gen_negsi2 (op0, op0)); emit_jump_insn (gen_jump (join_label)); emit_barrier (); emit_label (label3); /* positive-or-0 / positive */ - emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, op2)); + emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, op2)); } emit_label (join_label); @@ -3016,8 +3020,8 @@ else if (GET_CODE (op2) != CONST_INT && TARGET_CHECK_ZERO_DIV) { rtx label = gen_label_rtx (); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (UDIV, SImode, operands[1], op2))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_UDIV (SImode, operands[1], op2))); emit_insn (gen_tcnd_divide_by_zero (op2, label)); emit_label (label); emit_insn (gen_dummy (operands[0])); @@ -3801,7 +3805,7 @@ { register rtx index_diff = gen_reg_rtx (SImode); register rtx low = GEN_INT (-INTVAL (operands[1])); - register rtx label = gen_rtx (LABEL_REF, VOIDmode, operands[3]); + register rtx label = gen_rtx_LABEL_REF (Pmode, operands[3]); register rtx base; if (! CASE_VECTOR_INSNS) @@ -3879,8 +3883,8 @@ { if (GET_CODE (operands[0]) == MEM && ! call_address_operand (XEXP (operands[0], 0), SImode)) - operands[0] = gen_rtx (MEM, GET_MODE (operands[0]), - force_reg (Pmode, XEXP (operands[0], 0))); + operands[0] = gen_rtx_MEM (GET_MODE (operands[0]), + force_reg (Pmode, XEXP (operands[0], 0))); }") (define_insn "" @@ -3901,8 +3905,8 @@ { if (GET_CODE (operands[1]) == MEM && ! call_address_operand (XEXP (operands[1], 0), SImode)) - operands[1] = gen_rtx (MEM, GET_MODE (operands[1]), - force_reg (Pmode, XEXP (operands[1], 0))); + operands[1] = gen_rtx_MEM (GET_MODE (operands[1]), + force_reg (Pmode, XEXP (operands[1], 0))); }") (define_insn "" diff --git a/gcc/config/m88k/sysv3.h b/gcc/config/m88k/sysv3.h index 546b6dfc1a6..11df8850ff0 100644 --- a/gcc/config/m88k/sysv3.h +++ b/gcc/config/m88k/sysv3.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. Motorola m88100 running the AT&T/Unisoft/Motorola V.3 reference port. - Copyright (C) 1990, 1991, 1997, 1999 Free Software Foundation, Inc. + Copyright (C) 1990, 1991, 1997, 1998, 1999 Free Software Foundation, Inc. Contributed by Ray Essick (ressick@mot.com) Enhanced by Tom Wood (Tom_Wood@NeXT.com) @@ -145,10 +145,11 @@ do { \ #undef INITIALIZE_TRAMPOLINE #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \ - emit_call_insn (gen_call (gen_rtx (MEM, SImode, \ - gen_rtx (SYMBOL_REF, Pmode, \ - "__enable_execute_stack")), \ - const0_rtx)); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 40)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 36)), CXT); \ + emit_call_insn (gen_call \ + (gen_rtx_MEM \ + (SImode, \ + gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack")), \ + const0_rtx)); \ } diff --git a/gcc/config/mips/abi64.h b/gcc/config/mips/abi64.h index ce1e5fe3831..3e4447e5bdd 100644 --- a/gcc/config/mips/abi64.h +++ b/gcc/config/mips/abi64.h @@ -134,7 +134,7 @@ extern struct rtx_def *mips_function_value (); ptr = plus_constant (virtual_incoming_args_rtx, \ - (mips_save_gp_regs \ * UNITS_PER_WORD)); \ - mem = gen_rtx (MEM, BLKmode, ptr); \ + mem = gen_rtx_MEM (BLKmode, ptr); \ /* va_arg is an array access in this case, which causes \ it to get MEM_IN_STRUCT_P set. We must set it here \ so that the insn scheduler won't assume that these \ @@ -167,15 +167,15 @@ extern struct rtx_def *mips_function_value (); for (i = 0; i < mips_save_fp_regs; i++) \ { \ rtx tem = \ - gen_rtx (MEM, mode, \ - plus_constant (virtual_incoming_args_rtx, \ - off)); \ + gen_rtx_MEM (mode, \ + plus_constant (virtual_incoming_args_rtx, \ + off)); \ emit_move_insn (tem, \ - gen_rtx (REG, mode, \ - ((CUM).fp_arg_words \ - + FP_ARG_FIRST \ - + i \ - + mips_fp_off))); \ + gen_rtx_REG (mode, \ + ((CUM).fp_arg_words \ + + FP_ARG_FIRST \ + + i \ + + mips_fp_off))); \ off += size; \ if (! TARGET_FLOAT64 || TARGET_SINGLE_FLOAT) \ ++i; \ @@ -193,8 +193,7 @@ extern struct rtx_def *mips_function_value (); argument itself. The pointer is passed in whatever way is appropriate for passing a pointer to that type. */ #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ - (mips_abi == ABI_EABI \ - && function_arg_pass_by_reference (&CUM, MODE, TYPE, NAMED)) + function_arg_pass_by_reference (&CUM, MODE, TYPE, NAMED) /* A C expression that indicates when it is the called function's responsibility to make a copy of arguments passed by invisible diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index a090a2e758e..e65e4be7a8d 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -29,7 +29,6 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" #include <signal.h> - #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -41,6 +40,8 @@ Boston, MA 02111-1307, USA. */ #include "insn-codes.h" #include "recog.h" #include "toplev.h" +#include "output.h" + #include "tree.h" #include "function.h" #include "expr.h" @@ -1478,14 +1479,14 @@ mips_fill_delay_slot (ret, type, operands, cur_insn) mips_load_reg = set_reg; if (GET_MODE_SIZE (mode) > (FP_REG_P (REGNO (set_reg)) ? UNITS_PER_FPREG : UNITS_PER_WORD)) - mips_load_reg2 = gen_rtx (REG, SImode, REGNO (set_reg) + 1); + mips_load_reg2 = gen_rtx_REG (SImode, REGNO (set_reg) + 1); else mips_load_reg2 = 0; if (type == DELAY_HILO) { - mips_load_reg3 = gen_rtx (REG, SImode, MD_REG_FIRST); - mips_load_reg4 = gen_rtx (REG, SImode, MD_REG_FIRST+1); + mips_load_reg3 = gen_rtx_REG (SImode, MD_REG_FIRST); + mips_load_reg4 = gen_rtx_REG (SImode, MD_REG_FIRST+1); } else { @@ -1646,9 +1647,10 @@ embedded_pic_offset (x) pop_topmost_sequence (); } - return gen_rtx (CONST, Pmode, - gen_rtx (MINUS, Pmode, x, - XEXP (DECL_RTL (current_function_decl), 0))); + return + gen_rtx_CONST (Pmode, + gen_rtx_MINUS (Pmode, x, + XEXP (DECL_RTL (current_function_decl), 0))); } /* Return the appropriate instructions to move one operand to another. */ @@ -2790,7 +2792,7 @@ gen_int_relational (test_code, result, cmp0, cmp1, p_invert) else if (test == ITEST_EQ) { reg2 = invert ? gen_reg_rtx (mode) : result; - convert_move (reg2, gen_rtx (LTU, mode, reg, const1_rtx), 0); + convert_move (reg2, gen_rtx_LTU (mode, reg, const1_rtx), 0); reg = reg2; } @@ -2857,7 +2859,7 @@ gen_conditional_branch (operands, test_code) case CMP_SF: case CMP_DF: if (mips_isa < 4) - reg = gen_rtx (REG, CCmode, FPSW_REGNUM); + reg = gen_rtx_REG (CCmode, FPSW_REGNUM); else reg = gen_reg_rtx (CCmode); @@ -2865,10 +2867,10 @@ gen_conditional_branch (operands, test_code) 0 in the instruction built below. The MIPS FPU handles inequality testing by testing for equality and looking for a false result. */ - emit_insn (gen_rtx (SET, VOIDmode, reg, - gen_rtx (test_code == NE ? EQ : test_code, - CCmode, cmp0, cmp1))); - + emit_insn (gen_rtx_SET (VOIDmode, reg, + gen_rtx (test_code == NE ? EQ : test_code, + CCmode, cmp0, cmp1))); + test_code = test_code == NE ? EQ : NE; mode = CCmode; cmp0 = reg; @@ -2882,7 +2884,7 @@ gen_conditional_branch (operands, test_code) /* Generate the branch. */ - label1 = gen_rtx (LABEL_REF, VOIDmode, operands[0]); + label1 = gen_rtx_LABEL_REF (VOIDmode, operands[0]); label2 = pc_rtx; if (invert) @@ -2891,10 +2893,11 @@ gen_conditional_branch (operands, test_code) label1 = pc_rtx; } - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (IF_THEN_ELSE, VOIDmode, - gen_rtx (test_code, mode, cmp0, cmp1), - label1, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_IF_THEN_ELSE (VOIDmode, + gen_rtx (test_code, mode, + cmp0, cmp1), + label1, label2))); } /* Emit the common code for conditional moves. OPERANDS is the array @@ -2973,14 +2976,15 @@ gen_conditional_move (operands) abort (); cmp_reg = gen_reg_rtx (cmp_mode); - emit_insn (gen_rtx (SET, cmp_mode, cmp_reg, - gen_rtx (cmp_code, cmp_mode, op0, op1))); - - emit_insn (gen_rtx (SET, op_mode, operands[0], - gen_rtx (IF_THEN_ELSE, op_mode, - gen_rtx (move_code, VOIDmode, - cmp_reg, CONST0_RTX (SImode)), - operands[2], operands[3]))); + emit_insn (gen_rtx_SET (cmp_mode, cmp_reg, + gen_rtx (cmp_code, cmp_mode, op0, op1))); + + emit_insn (gen_rtx_SET (op_mode, operands[0], + gen_rtx_IF_THEN_ELSE (op_mode, + gen_rtx (move_code, VOIDmode, + cmp_reg, + CONST0_RTX (SImode)), + operands[2], operands[3]))); } /* Write a loop to move a constant number of bytes. @@ -3097,13 +3101,13 @@ block_move_call (dest_reg, src_reg, bytes_rtx) bytes_rtx = convert_to_mode (Pmode, bytes_rtx, 1); #ifdef TARGET_MEM_FUNCTIONS - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0, + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0, VOIDmode, 3, dest_reg, Pmode, src_reg, Pmode, convert_to_mode (TYPE_MODE (sizetype), bytes_rtx, TREE_UNSIGNED (sizetype)), TYPE_MODE (sizetype)); #else - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "bcopy"), 0, + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "bcopy"), 0, VOIDmode, 3, src_reg, Pmode, dest_reg, Pmode, convert_to_mode (TYPE_MODE (integer_type_node), bytes_rtx, TREE_UNSIGNED (integer_type_node)), @@ -3502,23 +3506,23 @@ output_block_move (insn, operands, num_regs, move_type) abort (); if (GET_MODE (operands[i + 4]) != load_store[i].mode) - operands[i + 4] = gen_rtx (REG, load_store[i].mode, - REGNO (operands[i + 4])); + operands[i + 4] = gen_rtx_REG (load_store[i].mode, + REGNO (operands[i + 4])); offset = load_store[i].offset; xoperands[0] = operands[i + 4]; - xoperands[1] = gen_rtx (MEM, load_store[i].mode, - plus_constant (src_reg, offset)); + xoperands[1] = gen_rtx_MEM (load_store[i].mode, + plus_constant (src_reg, offset)); if (use_lwl_lwr) { int extra_offset = GET_MODE_SIZE (load_store[i].mode) - 1; - xoperands[2] = gen_rtx (MEM, load_store[i].mode, - plus_constant (src_reg, - extra_offset - + offset)); + xoperands[2] = gen_rtx_MEM (load_store[i].mode, + plus_constant (src_reg, + extra_offset + + offset)); } output_asm_insn (load_store[i].load, xoperands); @@ -3531,17 +3535,17 @@ output_block_move (insn, operands, num_regs, move_type) int offset = load_store[i].offset; xoperands[0] = operands[i + 4]; - xoperands[1] = gen_rtx (MEM, load_store[i].mode, - plus_constant (dest_reg, offset)); + xoperands[1] = gen_rtx_MEM (load_store[i].mode, + plus_constant (dest_reg, offset)); if (use_lwl_lwr) { int extra_offset = GET_MODE_SIZE (load_store[i].mode) - 1; - xoperands[2] = gen_rtx (MEM, load_store[i].mode, - plus_constant (dest_reg, - extra_offset - + offset)); + xoperands[2] = gen_rtx_MEM (load_store[i].mode, + plus_constant (dest_reg, + extra_offset + + offset)); } if (move_type == BLOCK_MOVE_NORMAL) @@ -3814,7 +3818,7 @@ function_arg (cum, mode, type, named) if (! type || TREE_CODE (type) != RECORD_TYPE || mips_abi == ABI_32 || mips_abi == ABI_EABI || mips_abi == ABI_O64 || ! named) - ret = gen_rtx (REG, mode, regbase + *arg_words + bias); + ret = gen_rtx_REG (mode, regbase + *arg_words + bias); else { /* The Irix 6 n32/n64 ABIs say that if any 64 bit chunk of the @@ -3834,7 +3838,7 @@ function_arg (cum, mode, type, named) /* If the whole struct fits a DFmode register, we don't need the PARALLEL. */ if (! field || mode == DFmode) - ret = gen_rtx (REG, mode, regbase + *arg_words + bias); + ret = gen_rtx_REG (mode, regbase + *arg_words + bias); else { /* Now handle the special case by returning a PARALLEL @@ -3853,7 +3857,7 @@ function_arg (cum, mode, type, named) /* assign_parms checks the mode of ENTRY_PARM, so we must use the actual mode here. */ - ret = gen_rtx (PARALLEL, mode, rtvec_alloc (chunks)); + ret = gen_rtx_PARALLEL (mode, rtvec_alloc (chunks)); bitpos = 0; regno = regbase + *arg_words + bias; @@ -3872,14 +3876,14 @@ function_arg (cum, mode, type, named) && TREE_INT_CST_LOW (DECL_FIELD_BITPOS (field)) == bitpos && TREE_CODE (TREE_TYPE (field)) == REAL_TYPE && TYPE_PRECISION (TREE_TYPE (field)) == BITS_PER_WORD) - reg = gen_rtx (REG, DFmode, - regno + FP_ARG_FIRST - GP_ARG_FIRST); + reg = gen_rtx_REG (DFmode, + regno + FP_ARG_FIRST - GP_ARG_FIRST); else - reg = gen_rtx (REG, word_mode, regno); - + reg = gen_rtx_REG (word_mode, regno); + XVECEXP (ret, 0, i) - = gen_rtx (EXPR_LIST, VOIDmode, reg, - GEN_INT (bitpos / BITS_PER_UNIT)); + = gen_rtx_EXPR_LIST (VOIDmode, reg, + GEN_INT (bitpos / BITS_PER_UNIT)); bitpos += 64; regno++; @@ -3915,7 +3919,7 @@ function_arg (cum, mode, type, named) { rtx amount = GEN_INT (BITS_PER_WORD - int_size_in_bytes (type) * BITS_PER_UNIT); - rtx reg = gen_rtx (REG, word_mode, regbase + *arg_words + bias); + rtx reg = gen_rtx_REG (word_mode, regbase + *arg_words + bias); if (TARGET_64BIT) cum->adjust[cum->num_adjusts++] = gen_ashldi3 (reg, reg, amount); @@ -5773,7 +5777,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) && (unsigned HOST_WIDE_INT) (large_offset - gp_offset) < 32768 && (unsigned HOST_WIDE_INT) (large_offset - end_offset) < 32768) { - base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM); + base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = large_offset; if (file == 0) { @@ -5796,7 +5800,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) else { - base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM); + base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = gp_offset; if (file == 0) { @@ -5990,7 +5994,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) && (unsigned HOST_WIDE_INT) (large_offset - fp_offset) < 32768 && (unsigned HOST_WIDE_INT) (large_offset - end_offset) < 32768) { - base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM); + base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = large_offset; if (file == 0) { @@ -6014,7 +6018,7 @@ save_restore_insns (store_p, large_reg, large_offset, file) else { - base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM); + base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = fp_offset; if (file == 0) { @@ -6665,7 +6669,7 @@ mips_expand_prologue () if (TARGET_ABICALLS && (mips_abi != ABI_32 && mips_abi != ABI_O64)) emit_insn (gen_loadgp (XEXP (DECL_RTL (current_function_decl), 0), - gen_rtx (REG, DImode, 25))); + gen_rtx_REG (DImode, 25))); } /* If we are profiling, make sure no instructions are scheduled before @@ -6794,7 +6798,7 @@ mips_expand_epilogue () if (tsize > 32767 && ! TARGET_MIPS16) { - tmp_rtx = gen_rtx (REG, Pmode, MIPS_TEMP1_REGNUM); + tmp_rtx = gen_rtx_REG (Pmode, MIPS_TEMP1_REGNUM); emit_move_insn (tmp_rtx, tsize_rtx); tsize_rtx = tmp_rtx; } @@ -7111,12 +7115,13 @@ mips_function_value (valtype, func) strictly necessary. */ enum machine_mode field_mode = TYPE_MODE (TREE_TYPE (fields[0])); - return gen_rtx (PARALLEL, mode, - gen_rtvec (1, - gen_rtx (EXPR_LIST, VOIDmode, - gen_rtx (REG, field_mode, - FP_RETURN), - const0_rtx))); + return gen_rtx_PARALLEL + (mode, + gen_rtvec (1, + gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_REG (field_mode, + FP_RETURN), + const0_rtx))); } else if (i == 2) @@ -7130,23 +7135,24 @@ mips_function_value (valtype, func) int second_offset = TREE_INT_CST_LOW (DECL_FIELD_BITPOS (fields[1])); - return gen_rtx (PARALLEL, mode, - gen_rtvec (2, - gen_rtx (EXPR_LIST, VOIDmode, - gen_rtx (REG, first_mode, - FP_RETURN), - GEN_INT (first_offset - / BITS_PER_UNIT)), - gen_rtx (EXPR_LIST, VOIDmode, - gen_rtx (REG, second_mode, - FP_RETURN + 2), - GEN_INT (second_offset - / BITS_PER_UNIT)))); + return gen_rtx_PARALLEL + (mode, + gen_rtvec (2, + gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_REG (first_mode, + FP_RETURN), + GEN_INT (first_offset + / BITS_PER_UNIT)), + gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_REG (second_mode, + FP_RETURN + 2), + GEN_INT (second_offset + / BITS_PER_UNIT)))); } } } - return gen_rtx (REG, mode, reg); + return gen_rtx_REG (mode, reg); } /* The implementation of FUNCTION_ARG_PASS_BY_REFERENCE. Return @@ -7161,6 +7167,18 @@ function_arg_pass_by_reference (cum, mode, type, named) { int size; + /* We must pass by reference if we would be both passing in registers + and the stack. This is because any subsequent partial arg would be + handled incorrectly in this case. + + ??? This is really a kludge. We should either fix GCC so that such + a situation causes an abort and then do something in the MIPS port + to prevent it, or add code to function.c to properly handle the case. */ + if (FUNCTION_ARG (*cum, mode, type, named) != 0 + && MUST_PASS_IN_STACK (mode, type)) + return 1; + + /* Otherwise, we only do this if EABI is selected. */ if (mips_abi != ABI_EABI) return 0; diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index e80eb6afeb9..084f5d2a925 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1131,7 +1131,7 @@ while (0) #define DWARF_FRAME_RETURN_COLUMN (FP_REG_LAST + 1) /* Before the prologue, RA lives in r31. */ -#define INCOMING_RETURN_ADDR_RTX gen_rtx (REG, VOIDmode, GP_REG_FIRST + 31) +#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31) /* Overrides for the COFF debug format. */ #define PUT_SDB_SCL(a) \ @@ -2164,7 +2164,7 @@ extern enum reg_class mips_secondary_reload_class (); #define RETURN_ADDR_RTX(count, frame) \ ((count == 0) \ - ? gen_rtx (MEM, Pmode, gen_rtx (REG, Pmode, RETURN_ADDRESS_POINTER_REGNUM))\ + ? gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM))\ : (rtx) 0) /* Structure to be filled in by compute_frame_size with register @@ -2706,19 +2706,19 @@ typedef struct mips_args { rtx addr = ADDR; \ if (Pmode == DImode) \ { \ - emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 32)), FUNC); \ - emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 40)), CHAIN);\ + emit_move_insn (gen_rtx_MEM (DImode, plus_constant (addr, 32)), FUNC); \ + emit_move_insn (gen_rtx_MEM (DImode, plus_constant (addr, 40)), CHAIN);\ } \ else \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), FUNC); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 36)), CHAIN);\ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 32)), FUNC); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 36)), CHAIN);\ } \ \ /* Flush both caches. We need to flush the data cache in case \ the system has a write-back cache. */ \ /* ??? Should check the return value for errors. */ \ - emit_library_call (gen_rtx (SYMBOL_REF, Pmode, CACHE_FLUSH_FUNC), \ + emit_library_call (gen_rtx_SYMBOL_REF (Pmode, CACHE_FLUSH_FUNC), \ 0, VOIDmode, 3, addr, Pmode, \ GEN_INT (TRAMPOLINE_SIZE), TYPE_MODE (integer_type_node),\ GEN_INT (3), TYPE_MODE (integer_type_node)); \ @@ -3050,8 +3050,10 @@ typedef struct mips_args { if (mips_split_addresses && mips_check_split (X, MODE)) \ { \ /* ??? Is this ever executed? */ \ - X = gen_rtx (LO_SUM, Pmode, \ - copy_to_mode_reg (Pmode, gen_rtx (HIGH, Pmode, X)), X); \ + X = gen_rtx_LO_SUM (Pmode, \ + copy_to_mode_reg (Pmode, \ + gen_rtx (HIGH, Pmode, X)), \ + X); \ goto WIN; \ } \ \ @@ -3067,7 +3069,7 @@ typedef struct mips_args { \ emit_move_insn (ptr_reg, XEXP (XEXP (xinsn, 0), 0)); \ \ - X = gen_rtx (PLUS, Pmode, ptr_reg, constant); \ + X = gen_rtx_PLUS (Pmode, ptr_reg, constant); \ if (SMALL_INT (constant)) \ goto WIN; \ /* Otherwise we fall through so the code below will fix the \ @@ -3099,12 +3101,12 @@ typedef struct mips_args { emit_move_insn (int_reg, \ GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \ \ - emit_insn (gen_rtx (SET, VOIDmode, \ - ptr_reg, \ - gen_rtx (PLUS, Pmode, xplus0, int_reg))); \ + emit_insn (gen_rtx_SET (VOIDmode, \ + ptr_reg, \ + gen_rtx_PLUS (Pmode, xplus0, int_reg))); \ \ - X = gen_rtx (PLUS, Pmode, ptr_reg, \ - GEN_INT (INTVAL (xplus1) & 0x7fff)); \ + X = gen_rtx_PLUS (Pmode, ptr_reg, \ + GEN_INT (INTVAL (xplus1) & 0x7fff)); \ goto WIN; \ } \ } \ diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 7b860edc652..ff03d01e1d5 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -1,9 +1,9 @@ ;; Mips.md Machine Description for MIPS based processors +;; Copyright (C) 1989, 90-98, 1999 Free Software Foundation, Inc. ;; Contributed by A. Lichnewsky, lich@inria.inria.fr ;; Changes by Michael Meissner, meissner@osf.org ;; 64 bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and ;; Brendan Eich, brendan@microunity.com. -;; Copyright (C) 1989, 90-98, 1999 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -1701,7 +1701,7 @@ rtx xoperands[10]; xoperands[0] = operands[0]; - xoperands[1] = gen_rtx (REG, SImode, LO_REGNUM); + xoperands[1] = gen_rtx_REG (SImode, LO_REGNUM); output_asm_insn (\"mult\\t%1,%2\", operands); output_asm_insn (mips_move_1word (xoperands, insn, FALSE), xoperands); @@ -1829,13 +1829,13 @@ output_asm_insn (\"dmult\\t%0,%1,%2\", operands); else { - rtx xoperands[10]; + rtx xoperands[10]; - xoperands[0] = operands[0]; - xoperands[1] = gen_rtx (REG, DImode, LO_REGNUM); + xoperands[0] = operands[0]; + xoperands[1] = gen_rtx_REG (DImode, LO_REGNUM); - output_asm_insn (\"dmult\\t%1,%2\", operands); - output_asm_insn (mips_move_1word (xoperands, insn, FALSE), xoperands); + output_asm_insn (\"dmult\\t%1,%2\", operands); + output_asm_insn (mips_move_1word (xoperands, insn, FALSE), xoperands); } return \"\"; }" @@ -4265,12 +4265,12 @@ move\\t%0,%z4\\n\\ emit_jump_insn (gen_bge (label1)); emit_insn (gen_fix_truncdfsi2 (operands[0], operands[1])); - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (LABEL_REF, VOIDmode, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_LABEL_REF (VOIDmode, label2))); emit_barrier (); emit_label (label1); - emit_move_insn (reg2, gen_rtx (MINUS, DFmode, operands[1], reg1)); + emit_move_insn (reg2, gen_rtx_MINUS (DFmode, operands[1], reg1)); emit_move_insn (reg3, GEN_INT (0x80000000)); emit_insn (gen_fix_truncdfsi2 (operands[0], reg2)); @@ -4280,7 +4280,7 @@ move\\t%0,%z4\\n\\ /* allow REG_NOTES to be set on last insn (labels don't have enough fields, and can't be used for REG_NOTES anyway). */ - emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); DONE; } }") @@ -4308,12 +4308,12 @@ move\\t%0,%z4\\n\\ emit_jump_insn (gen_bge (label1)); emit_insn (gen_fix_truncdfdi2 (operands[0], operands[1])); - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (LABEL_REF, VOIDmode, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_LABEL_REF (VOIDmode, label2))); emit_barrier (); emit_label (label1); - emit_move_insn (reg2, gen_rtx (MINUS, DFmode, operands[1], reg1)); + emit_move_insn (reg2, gen_rtx_MINUS (DFmode, operands[1], reg1)); emit_move_insn (reg3, GEN_INT (0x80000000)); emit_insn (gen_ashldi3 (reg3, reg3, GEN_INT (32))); @@ -4324,7 +4324,7 @@ move\\t%0,%z4\\n\\ /* allow REG_NOTES to be set on last insn (labels don't have enough fields, and can't be used for REG_NOTES anyway). */ - emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); DONE; } }") @@ -4352,12 +4352,12 @@ move\\t%0,%z4\\n\\ emit_jump_insn (gen_bge (label1)); emit_insn (gen_fix_truncsfsi2 (operands[0], operands[1])); - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (LABEL_REF, VOIDmode, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_LABEL_REF (VOIDmode, label2))); emit_barrier (); emit_label (label1); - emit_move_insn (reg2, gen_rtx (MINUS, SFmode, operands[1], reg1)); + emit_move_insn (reg2, gen_rtx_MINUS (SFmode, operands[1], reg1)); emit_move_insn (reg3, GEN_INT (0x80000000)); emit_insn (gen_fix_truncsfsi2 (operands[0], reg2)); @@ -4367,7 +4367,7 @@ move\\t%0,%z4\\n\\ /* allow REG_NOTES to be set on last insn (labels don't have enough fields, and can't be used for REG_NOTES anyway). */ - emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); DONE; } }") @@ -4395,12 +4395,12 @@ move\\t%0,%z4\\n\\ emit_jump_insn (gen_bge (label1)); emit_insn (gen_fix_truncsfdi2 (operands[0], operands[1])); - emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx, - gen_rtx (LABEL_REF, VOIDmode, label2))); + emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, + gen_rtx_LABEL_REF (VOIDmode, label2))); emit_barrier (); emit_label (label1); - emit_move_insn (reg2, gen_rtx (MINUS, SFmode, operands[1], reg1)); + emit_move_insn (reg2, gen_rtx_MINUS (SFmode, operands[1], reg1)); emit_move_insn (reg3, GEN_INT (0x80000000)); emit_insn (gen_ashldi3 (reg3, reg3, GEN_INT (32))); @@ -4411,7 +4411,7 @@ move\\t%0,%z4\\n\\ /* allow REG_NOTES to be set on last insn (labels don't have enough fields, and can't be used for REG_NOTES anyway). */ - emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); + emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); DONE; } }") @@ -4729,10 +4729,10 @@ move\\t%0,%z4\\n\\ rtx tem = ((reload_in_progress | reload_completed) ? operands[0] : gen_reg_rtx (mode)); - emit_insn (gen_rtx (SET, VOIDmode, tem, - gen_rtx (HIGH, mode, operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, tem, + gen_rtx_HIGH (mode, operands[1]))); - operands[1] = gen_rtx (LO_SUM, mode, tem, operands[1]); + operands[1] = gen_rtx_LO_SUM (mode, tem, operands[1]); } /* If we are generating embedded PIC code, and we are referring to a @@ -4746,8 +4746,8 @@ move\\t%0,%z4\\n\\ rtx temp; temp = embedded_pic_offset (operands[1]); - temp = gen_rtx (PLUS, Pmode, embedded_pic_fnaddr_rtx, - force_reg (DImode, temp)); + temp = gen_rtx_PLUS (Pmode, embedded_pic_fnaddr_rtx, + force_reg (DImode, temp)); emit_move_insn (operands[0], force_reg (DImode, temp)); DONE; } @@ -4762,7 +4762,7 @@ move\\t%0,%z4\\n\\ if (! SMALL_INT (temp2)) temp2 = force_reg (DImode, temp2); - emit_move_insn (operands[0], gen_rtx (PLUS, DImode, temp, temp2)); + emit_move_insn (operands[0], gen_rtx_PLUS (DImode, temp, temp2)); DONE; } @@ -4972,10 +4972,10 @@ move\\t%0,%z4\\n\\ "TARGET_64BIT" " { - rtx scratch = gen_rtx (REG, DImode, - (REGNO (operands[0]) == REGNO (operands[2]) - ? REGNO (operands[2]) + 1 - : REGNO (operands[2]))); + rtx scratch = gen_rtx_REG (DImode, + (REGNO (operands[0]) == REGNO (operands[2]) + ? REGNO (operands[2]) + 1 + : REGNO (operands[2]))); if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == HILO_REGNUM) { @@ -4985,7 +4985,7 @@ move\\t%0,%z4\\n\\ rtx addr = find_replacement (&XEXP (operands[1], 0)); rtx op1 = change_address (operands[1], VOIDmode, addr); - scratch = gen_rtx (REG, SImode, REGNO (scratch)); + scratch = gen_rtx_REG (SImode, REGNO (scratch)); memword = change_address (op1, SImode, NULL_RTX); offword = change_address (adj_offsettable_operand (op1, 4), SImode, NULL_RTX); @@ -5000,7 +5000,7 @@ move\\t%0,%z4\\n\\ loword = memword; } emit_move_insn (scratch, hiword); - emit_move_insn (gen_rtx (REG, SImode, 64), scratch); + emit_move_insn (gen_rtx_REG (SImode, 64), scratch); emit_move_insn (scratch, loword); emit_move_insn (gen_rtx (REG, SImode, 65), scratch); emit_insn (gen_rtx_USE (VOIDmode, operands[0])); @@ -5008,7 +5008,7 @@ move\\t%0,%z4\\n\\ else { emit_insn (gen_ashrdi3 (scratch, operands[1], GEN_INT (32))); - emit_insn (gen_movdi (gen_rtx (REG, DImode, 64), scratch)); + emit_insn (gen_movdi (gen_rtx_REG (DImode, 64), scratch)); emit_insn (gen_ashldi3 (scratch, operands[1], GEN_INT (32))); emit_insn (gen_ashrdi3 (scratch, scratch, GEN_INT (32))); emit_insn (gen_movdi (gen_rtx (REG, DImode, 65), scratch)); @@ -5018,10 +5018,10 @@ move\\t%0,%z4\\n\\ } if (GET_CODE (operands[1]) == REG && REGNO (operands[1]) == HILO_REGNUM) { - emit_insn (gen_movdi (scratch, gen_rtx (REG, DImode, 65))); + emit_insn (gen_movdi (scratch, gen_rtx_REG (DImode, 65))); emit_insn (gen_ashldi3 (scratch, scratch, GEN_INT (32))); emit_insn (gen_lshrdi3 (scratch, scratch, GEN_INT (32))); - emit_insn (gen_movdi (operands[0], gen_rtx (REG, DImode, 64))); + emit_insn (gen_movdi (operands[0], gen_rtx_REG (DImode, 64))); emit_insn (gen_ashldi3 (operands[0], operands[0], GEN_INT (32))); emit_insn (gen_iordi3 (operands[0], operands[0], scratch)); emit_insn (gen_rtx_USE (VOIDmode, operands[1])); @@ -5065,7 +5065,7 @@ move\\t%0,%z4\\n\\ rtx addr = find_replacement (&XEXP (operands[0], 0)); rtx op0 = change_address (operands[0], VOIDmode, addr); - scratch = gen_rtx (REG, SImode, REGNO (operands[2])); + scratch = gen_rtx_REG (SImode, REGNO (operands[2])); memword = change_address (op0, SImode, NULL_RTX); offword = change_address (adj_offsettable_operand (op0, 4), SImode, NULL_RTX); @@ -5079,9 +5079,9 @@ move\\t%0,%z4\\n\\ hiword = offword; loword = memword; } - emit_move_insn (scratch, gen_rtx (REG, SImode, 64)); + emit_move_insn (scratch, gen_rtx_REG (SImode, 64)); emit_move_insn (hiword, scratch); - emit_move_insn (scratch, gen_rtx (REG, SImode, 65)); + emit_move_insn (scratch, gen_rtx_REG (SImode, 65)); emit_move_insn (loword, scratch); emit_insn (gen_rtx_USE (VOIDmode, operands[1])); } @@ -5151,10 +5151,10 @@ move\\t%0,%z4\\n\\ rtx tem = ((reload_in_progress | reload_completed) ? operands[0] : gen_reg_rtx (mode)); - emit_insn (gen_rtx (SET, VOIDmode, tem, - gen_rtx (HIGH, mode, operands[1]))); + emit_insn (gen_rtx_SET (VOIDmode, tem, + gen_rtx_HIGH (mode, operands[1]))); - operands[1] = gen_rtx (LO_SUM, mode, tem, operands[1]); + operands[1] = gen_rtx_LO_SUM (mode, tem, operands[1]); } /* If we are generating embedded PIC code, and we are referring to a @@ -5168,8 +5168,8 @@ move\\t%0,%z4\\n\\ rtx temp; temp = embedded_pic_offset (operands[1]); - temp = gen_rtx (PLUS, Pmode, embedded_pic_fnaddr_rtx, - force_reg (SImode, temp)); + temp = gen_rtx_PLUS (Pmode, embedded_pic_fnaddr_rtx, + force_reg (SImode, temp)); emit_move_insn (operands[0], force_reg (SImode, temp)); DONE; } @@ -5184,7 +5184,7 @@ move\\t%0,%z4\\n\\ if (! SMALL_INT (temp2)) temp2 = force_reg (SImode, temp2); - emit_move_insn (operands[0], gen_rtx (PLUS, SImode, temp, temp2)); + emit_move_insn (operands[0], gen_rtx_PLUS (SImode, temp, temp2)); DONE; } @@ -5429,7 +5429,7 @@ move\\t%0,%z4\\n\\ if (TARGET_64BIT && GET_CODE (operands[0]) == REG && REGNO (operands[0]) == HILO_REGNUM) { - emit_insn (gen_movsi (gen_rtx (REG, SImode, 65), operands[1])); + emit_insn (gen_movsi (gen_rtx_REG (SImode, 65), operands[1])); emit_insn (gen_ashrsi3 (operands[2], operands[1], GEN_INT (31))); emit_insn (gen_movsi (gen_rtx (REG, SImode, 64), operands[2])); emit_insn (gen_rtx_USE (VOIDmode, operands[0])); @@ -5596,17 +5596,17 @@ move\\t%0,%z4\\n\\ if (GET_CODE (operands[1]) == MEM) source = change_address (operands[1], SFmode, NULL_RTX); else if (GET_CODE (operands[1]) == REG || GET_CODE (operands[1]) == SUBREG) - source = gen_rtx (REG, SFmode, true_regnum (operands[1])); + source = gen_rtx_REG (SFmode, true_regnum (operands[1])); else source = operands[1]; - fp1 = gen_rtx (REG, SFmode, REGNO (operands[2])); - fp2 = gen_rtx (REG, SFmode, REGNO (operands[2]) + 1); + fp1 = gen_rtx_REG (SFmode, REGNO (operands[2])); + fp2 = gen_rtx_REG (SFmode, REGNO (operands[2]) + 1); emit_insn (gen_move_insn (fp1, source)); - emit_insn (gen_move_insn (fp2, gen_rtx (REG, SFmode, 0))); - emit_insn (gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (LT, CCmode, fp2, fp1))); + emit_insn (gen_move_insn (fp2, gen_rtx_REG (SFmode, 0))); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], + gen_rtx_LT (CCmode, fp2, fp1))); DONE; }") @@ -5692,7 +5692,7 @@ move\\t%0,%z4\\n\\ (define_insn "" [(set (mem:SF (plus:SI (match_operand:SI 1 "register_operand" "d") (match_operand:SI 2 "register_operand" "d"))) - (match_operand:SF 0 "register_operand" "=f"))] + (match_operand:SF 0 "register_operand" "f"))] "mips_isa >= 4 && TARGET_HARD_FLOAT" "swxc1\\t%0,%1(%2)" [(set_attr "type" "store") @@ -5701,7 +5701,7 @@ move\\t%0,%z4\\n\\ (define_insn "" [(set (mem:SF (plus:DI (match_operand:DI 1 "se_register_operand" "d") (match_operand:DI 2 "se_register_operand" "d"))) - (match_operand:SF 0 "register_operand" "=f"))] + (match_operand:SF 0 "register_operand" "f"))] "mips_isa >= 4 && TARGET_HARD_FLOAT" "swxc1\\t%0,%1(%2)" [(set_attr "type" "store") @@ -5710,7 +5710,7 @@ move\\t%0,%z4\\n\\ (define_insn "" [(set (mem:DF (plus:SI (match_operand:SI 1 "register_operand" "d") (match_operand:SI 2 "register_operand" "d"))) - (match_operand:DF 0 "register_operand" "=f"))] + (match_operand:DF 0 "register_operand" "f"))] "mips_isa >= 4 && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" "sdxc1\\t%0,%1(%2)" [(set_attr "type" "store") @@ -5719,7 +5719,7 @@ move\\t%0,%z4\\n\\ (define_insn "" [(set (mem:DF (plus:DI (match_operand:DI 1 "se_register_operand" "d") (match_operand:DI 2 "se_register_operand" "d"))) - (match_operand:DF 0 "register_operand" "=f"))] + (match_operand:DF 0 "register_operand" "f"))] "mips_isa >= 4 && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT" "sdxc1\\t%0,%1(%2)" [(set_attr "type" "store") @@ -6551,9 +6551,9 @@ move\\t%0,%z4\\n\\ { int amount = INTVAL (operands[2]); - operands[2] = GEN_INT ((amount & 31)); + operands[2] = GEN_INT (amount & 31); operands[4] = const0_rtx; - operands[5] = GEN_INT (((-amount) & 31)); + operands[5] = GEN_INT ((-amount) & 31); return \"sll\\t%M0,%M1,%2\;srl\\t%3,%L1,%5\;or\\t%M0,%M0,%3\;sll\\t%L0,%L1,%2\"; }" @@ -6592,8 +6592,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = GEN_INT ((amount & 31)); - operands[4] = GEN_INT (((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -6627,8 +6627,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = GEN_INT ((amount & 31)); - operands[4] = GEN_INT (((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -6905,8 +6905,8 @@ move\\t%0,%z4\\n\\ { int amount = INTVAL (operands[2]); - operands[2] = GEN_INT ((amount & 31)); - operands[4] = GEN_INT (((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); return \"srl\\t%L0,%L1,%2\;sll\\t%3,%M1,%4\;or\\t%L0,%L0,%3\;sra\\t%M0,%M1,%2\"; }" @@ -6945,8 +6945,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = GEN_INT ((amount & 31)); - operands[4] = GEN_INT (((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -6980,8 +6980,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = GEN_INT ((amount & 31)); - operands[4] = GEN_INT (((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -7290,8 +7290,8 @@ move\\t%0,%z4\\n\\ { int amount = INTVAL (operands[2]); - operands[2] = GEN_INT ((amount & 31)); - operands[4] = GEN_INT (((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); return \"srl\\t%L0,%L1,%2\;sll\\t%3,%M1,%4\;or\\t%L0,%L0,%3\;srl\\t%M0,%M1,%2\"; }" @@ -7330,8 +7330,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = GEN_INT ((amount & 31)); - operands[4] = GEN_INT (((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -7365,8 +7365,8 @@ move\\t%0,%z4\\n\\ " { int amount = INTVAL (operands[2]); - operands[2] = GEN_INT ((amount & 31)); - operands[4] = GEN_INT (((-amount) & 31)); + operands[2] = GEN_INT (amount & 31); + operands[4] = GEN_INT ((-amount) & 31); }") @@ -8775,7 +8775,7 @@ move\\t%0,%z4\\n\\ "!TARGET_MIPS16 && INTVAL (operands[2]) < 32767" "* { - operands[2] = GEN_INT (INTVAL (operands[2])+1); + operands[2] = GEN_INT (INTVAL (operands[2]) + 1); return \"sltu\\t%0,%1,%2\"; }" [(set_attr "type" "arith") @@ -8804,7 +8804,7 @@ move\\t%0,%z4\\n\\ "TARGET_64BIT && !TARGET_MIPS16 && INTVAL (operands[2]) < 32767" "* { - operands[2] = GEN_INT (INTVAL (operands[2])+1); + operands[2] = GEN_INT (INTVAL (operands[2]) + 1); return \"sltu\\t%0,%1,%2\"; }" [(set_attr "type" "arith") @@ -9514,8 +9514,8 @@ move\\t%0,%z4\\n\\ } emit_call_insn (gen_call_internal0 (operands[0], operands[1], - gen_rtx (REG, SImode, GP_REG_FIRST + 31))); - + gen_rtx_REG (SImode, + GP_REG_FIRST + 31))); DONE; } }") @@ -9694,7 +9694,7 @@ move\\t%0,%z4\\n\\ (XEXP (XVECEXP (operands[0], 0, 0), 0), operands[1], operands[2], XEXP (XVECEXP (operands[0], 0, 1), 0), - gen_rtx (REG, SImode, GP_REG_FIRST + 31))); + gen_rtx_REG (SImode, GP_REG_FIRST + 31))); DONE; } @@ -9704,7 +9704,8 @@ move\\t%0,%z4\\n\\ operands[0] = XEXP (XVECEXP (operands[0], 0, 0), 0); emit_call_insn (gen_call_value_internal0 (operands[0], operands[1], operands[2], - gen_rtx (REG, SImode, GP_REG_FIRST + 31))); + gen_rtx_REG (SImode, + GP_REG_FIRST + 31))); DONE; } @@ -9945,7 +9946,7 @@ move\\t%0,%z4\\n\\ ;; " ;; { ;; operands[0] = gen_reg_rtx (SImode); -;; operands[1] = gen_rtx (MEM, SImode, stack_pointer_rtx); +;; operands[1] = gen_rtx_MEM (SImode, stack_pointer_rtx); ;; MEM_VOLATILE_P (operands[1]) = TRUE; ;; ;; /* fall through and generate default code */ diff --git a/gcc/config/mn10200/mn10200.c b/gcc/config/mn10200/mn10200.c index 26205afeedb..cda180a5675 100644 --- a/gcc/config/mn10200/mn10200.c +++ b/gcc/config/mn10200/mn10200.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Matsushita MN10200 series - Copyright (C) 1997 Free Software Foundation, Inc. + Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc. Contributed by Jeff Law (law@cygnus.com). This file is part of GNU CC. @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "tree.h" #include "regs.h" @@ -276,7 +276,7 @@ print_operand (file, x, code) if (GET_CODE (x) != MEM) abort (); if (GET_CODE (XEXP (x, 0)) == REG) - x = gen_rtx (PLUS, PSImode, XEXP (x, 0), GEN_INT (0)); + x = gen_rtx_PLUS (PSImode, XEXP (x, 0), GEN_INT (0)); else x = XEXP (x, 0); fputc ('(', file); @@ -595,12 +595,12 @@ expand_prologue () if (!regs_ever_live[2]) { regs_ever_live[2] = 1; - zero_dreg = gen_rtx (REG, HImode, 2); + zero_dreg = gen_rtx_REG (HImode, 2); } if (!regs_ever_live[3]) { regs_ever_live[3] = 1; - zero_dreg = gen_rtx (REG, HImode, 3); + zero_dreg = gen_rtx_REG (HImode, 3); } } @@ -612,12 +612,12 @@ expand_prologue () if (!regs_ever_live[5]) { regs_ever_live[5] = 1; - zero_areg = gen_rtx (REG, HImode, 5); + zero_areg = gen_rtx_REG (HImode, 5); } if (!regs_ever_live[6]) { regs_ever_live[6] = 1; - zero_areg = gen_rtx (REG, HImode, 6); + zero_areg = gen_rtx_REG (HImode, 6); } } @@ -639,14 +639,14 @@ expand_prologue () { emit_insn (gen_addpsi3 (stack_pointer_rtx, stack_pointer_rtx, GEN_INT (-4))); - emit_move_insn (gen_rtx (MEM, PSImode, stack_pointer_rtx), - gen_rtx (REG, PSImode, STATIC_CHAIN_REGNUM)); + emit_move_insn (gen_rtx_MEM (PSImode, stack_pointer_rtx), + gen_rtx_REG (PSImode, STATIC_CHAIN_REGNUM)); } if (frame_pointer_needed) { /* Store a2 into a0 temporarily. */ - emit_move_insn (gen_rtx (REG, PSImode, 4), frame_pointer_rtx); + emit_move_insn (gen_rtx_REG (PSImode, 4), frame_pointer_rtx); /* Set up the frame pointer. */ emit_move_insn (frame_pointer_rtx, stack_pointer_rtx); @@ -671,11 +671,10 @@ expand_prologue () register 4 (a0). */ regno = (i == FRAME_POINTER_REGNUM && frame_pointer_needed) ? 4 : i; - emit_move_insn (gen_rtx (MEM, PSImode, - gen_rtx (PLUS, Pmode, - stack_pointer_rtx, - GEN_INT (offset))), - gen_rtx (REG, PSImode, regno)); + emit_move_insn (gen_rtx_MEM (PSImode, + plus_constant (stack_pointer_rtx, + offset)), + gen_rtx_REG (PSImode, regno)); offset += 4; } } @@ -684,10 +683,10 @@ expand_prologue () expects to find it. */ if (current_function_needs_context) { - emit_move_insn (gen_rtx (REG, PSImode, STATIC_CHAIN_REGNUM), + emit_move_insn (gen_rtx_REG (PSImode, STATIC_CHAIN_REGNUM), gen_rtx (MEM, PSImode, - gen_rtx (PLUS, PSImode, stack_pointer_rtx, - GEN_INT (size)))); + gen_rtx_PLUS (PSImode, stack_pointer_rtx, + GEN_INT (size)))); } } @@ -765,11 +764,9 @@ expand_epilogue () regno = ((i == FRAME_POINTER_REGNUM && frame_pointer_needed) ? temp_regno : i); - emit_move_insn (gen_rtx (REG, PSImode, regno), - gen_rtx (MEM, PSImode, - gen_rtx (PLUS, Pmode, - basereg, - GEN_INT (offset)))); + emit_move_insn (gen_rtx_REG (PSImode, regno), + gen_rtx_MEM (PSImode, + plus_constant (basereg, offset))); offset += 4; } } @@ -779,7 +776,7 @@ expand_epilogue () /* Deallocate this frame's stack. */ emit_move_insn (stack_pointer_rtx, frame_pointer_rtx); /* Restore the old frame pointer. */ - emit_move_insn (frame_pointer_rtx, gen_rtx (REG, PSImode, temp_regno)); + emit_move_insn (frame_pointer_rtx, gen_rtx_REG (PSImode, temp_regno)); } else if (size) { @@ -973,14 +970,14 @@ expand_a_shift (mode, code, operands) /* need a loop to get all the bits we want - we generate the code at emit time, but need to allocate a scratch reg now */ - emit_insn (gen_rtx - (PARALLEL, VOIDmode, + emit_insn (gen_rtx_PARALLEL + (VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, operands[0], - gen_rtx (code, mode, - operands[0], operands[2])), - gen_rtx (CLOBBER, VOIDmode, - gen_rtx (SCRATCH, HImode, 0))))); + gen_rtx_SET (VOIDmode, operands[0], + gen_rtx (code, mode, + operands[0], operands[2])), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_SCRATCH (HImode))))); return 1; } @@ -1375,10 +1372,10 @@ function_arg (cum, mode, type, named) switch (cum->nbytes / UNITS_PER_WORD) { case 0: - result = gen_rtx (REG, mode, 0); + result = gen_rtx_REG (mode, 0); break; case 1: - result = gen_rtx (REG, mode, 1); + result = gen_rtx_REG (mode, 1); break; default: result = 0; diff --git a/gcc/config/mn10200/mn10200.h b/gcc/config/mn10200/mn10200.h index 34b43225182..ce44d826da7 100644 --- a/gcc/config/mn10200/mn10200.h +++ b/gcc/config/mn10200/mn10200.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Matsushita MN10200 series - Copyright (C) 1997 Free Software Foundation, Inc. + Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc. Contributed by Jeff Law (law@cygnus.com). This file is part of GNU CC. @@ -528,12 +528,12 @@ extern struct rtx_def *mn10200_va_arg(); otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), TYPE_MODE (VALTYPE) == PSImode ? 4 : 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), TYPE_MODE (VALTYPE) == PSImode ? 4 : 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, (MODE) == PSImode ? 4 : 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, (MODE) == PSImode ? 4 : 0) /* 1 if N is a possible register number for a function value. */ @@ -594,9 +594,9 @@ extern struct rtx_def *mn10200_va_arg(); #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, PSImode, plus_constant ((TRAMP), 20)), \ + emit_move_insn (gen_rtx_MEM (PSImode, plus_constant ((TRAMP), 20)), \ (CXT)); \ - emit_move_insn (gen_rtx (MEM, PSImode, plus_constant ((TRAMP), 24)), \ + emit_move_insn (gen_rtx_MEM (PSImode, plus_constant ((TRAMP), 24)), \ (FNADDR)); \ } @@ -605,7 +605,7 @@ extern struct rtx_def *mn10200_va_arg(); #define RETURN_ADDR_RTX(COUNT, FRAME) \ ((COUNT == 0) \ - ? gen_rtx (MEM, Pmode, frame_pointer_rtx) \ + ? gen_rtx_MEM (Pmode, frame_pointer_rtx) \ : (rtx) 0) @@ -1051,9 +1051,9 @@ do { char dstr[30]; \ #define INIT_TARGET_OPTABS \ do { \ sdiv_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, DIVHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, DIVHI3_LIBCALL); \ smod_optab->handlers[(int) HImode].libfunc \ - = gen_rtx (SYMBOL_REF, Pmode, MODHI3_LIBCALL); \ + = gen_rtx_SYMBOL_REF (Pmode, MODHI3_LIBCALL); \ } while (0) /* The assembler op to get a word. */ diff --git a/gcc/config/mn10200/mn10200.md b/gcc/config/mn10200/mn10200.md index 1fccbf4afe1..e9bbd02fdad 100644 --- a/gcc/config/mn10200/mn10200.md +++ b/gcc/config/mn10200/mn10200.md @@ -1,6 +1,5 @@ ;; GCC machine description for Matsushita MN10200 -;; Copyright (C) 1997, 1998 Free Software Foundation, Inc. - +;; Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc. ;; Contributed by Jeff Law (law@cygnus.com). ;; This file is part of GNU CC. @@ -401,13 +400,13 @@ rtx ret, insns; start_sequence (); - ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__addsi3\"), + ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__addsi3\"), NULL_RTX, 1, SImode, 2, operands[1], SImode, operands[2], SImode); insns = get_insns (); end_sequence (); emit_libcall_block (insns, operands[0], ret, - gen_rtx (PLUS, SImode, operands[1], operands[2])); + gen_rtx_PLUS (SImode, operands[1], operands[2])); DONE; } else @@ -478,13 +477,13 @@ rtx ret, insns; start_sequence (); - ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__subsi3\"), + ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__subsi3\"), NULL_RTX, 1, SImode, 2, operands[1], SImode, operands[2], SImode); insns = get_insns (); end_sequence (); emit_libcall_block (insns, operands[0], ret, - gen_rtx (MINUS, SImode, operands[1], operands[2])); + gen_rtx_MINUS (SImode, operands[1], operands[2])); DONE; } else @@ -1275,9 +1274,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, HImode, operands[0], - gen_rtx (ASHIFT, HImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (HImode, operands[0], + gen_rtx_ASHIFT (HImode, + operands[0], GEN_INT (1)))); count--; } DONE; @@ -1314,9 +1313,10 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, HImode, operands[0], - gen_rtx (LSHIFTRT, HImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (HImode, operands[0], + gen_rtx_LSHIFTRT (HImode, + operands[0], + GEN_INT (1)))); count--; } DONE; @@ -1353,9 +1353,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, HImode, operands[0], - gen_rtx (ASHIFTRT, HImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (HImode, operands[0], + gen_rtx_ASHIFTRT (HImode, operands[0], + GEN_INT (1)))); count--; } DONE; @@ -1407,9 +1407,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, PSImode, operands[0], - gen_rtx (ASHIFT, PSImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (PSImode, operands[0], + gen_rtx_ASHIFT (PSImode, + operands[0], GEN_INT (1)))); count--; } DONE; @@ -1484,9 +1484,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, SImode, operands[0], - gen_rtx (ASHIFT, SImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (SImode, operands[0], + gen_rtx_ASHIFT (SImode, + operands[0], GEN_INT (1)))); count--; } DONE; @@ -1498,13 +1498,13 @@ rtx ret, insns; start_sequence (); - ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__ashlsi3\"), + ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__ashlsi3\"), NULL_RTX, 1, SImode, 2, operands[1], SImode, operands[2], HImode); insns = get_insns (); end_sequence (); emit_libcall_block (insns, operands[0], ret, - gen_rtx (ASHIFT, SImode, operands[1], operands[2])); + gen_rtx_ASHIFT (SImode, operands[1], operands[2])); DONE; } else @@ -1542,9 +1542,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, SImode, operands[0], - gen_rtx (LSHIFTRT, SImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (SImode, operands[0], + gen_rtx_LSHIFTRT (SImode, operands[0], + GEN_INT (1)))); count--; } DONE; @@ -1556,13 +1556,13 @@ rtx ret, insns; start_sequence (); - ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__lshrsi3\"), + ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__lshrsi3\"), NULL_RTX, 1, SImode, 2, operands[1], SImode, operands[2], HImode); insns = get_insns (); end_sequence (); emit_libcall_block (insns, operands[0], ret, - gen_rtx (LSHIFTRT, SImode, operands[1], operands[2])); + gen_rtx_LSHIFTRT (SImode, operands[1], operands[2])); DONE; } else @@ -1600,9 +1600,9 @@ emit_move_insn (operands[0], operands[1]); while (count > 0) { - emit_insn (gen_rtx (SET, SImode, operands[0], - gen_rtx (ASHIFTRT, SImode, - operands[0], GEN_INT (1)))); + emit_insn (gen_rtx_SET (SImode, operands[0], + gen_rtx_ASHIFTRT (SImode, operands[0], + GEN_INT (1)))); count--; } DONE; @@ -1614,13 +1614,13 @@ rtx ret, insns; start_sequence (); - ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__ashrsi3\"), + ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__ashrsi3\"), NULL_RTX, 1, SImode, 2, operands[1], SImode, operands[2], HImode); insns = get_insns (); end_sequence (); emit_libcall_block (insns, operands[0], ret, - gen_rtx (ASHIFTRT, SImode, operands[1], operands[2])); + gen_rtx_ASHIFTRT (SImode, operands[1], operands[2])); DONE; } else diff --git a/gcc/config/mn10200/xm-mn10200.h b/gcc/config/mn10200/xm-mn10200.h index 7ebac70ed3f..5e291d0991a 100644 --- a/gcc/config/mn10200/xm-mn10200.h +++ b/gcc/config/mn10200/xm-mn10200.h @@ -1,5 +1,5 @@ /* Configuration for Matsushita MN10200. - Copyright (C) 1997 Free Software Foundation, Inc. + Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -38,10 +38,3 @@ Boston, MA 02111-1307, USA. */ tm.h is a symbolic link to the actual target specific file. */ #include "tm.h" - -#ifndef __STDC__ -extern char *malloc (), *realloc (), *calloc (); -#else -extern void *malloc (), *realloc (), *calloc (); -#endif -extern void free (); diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c index 8703bf03134..d85f9d2dc00 100644 --- a/gcc/config/mn10300/mn10300.c +++ b/gcc/config/mn10300/mn10300.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Matsushita MN10300 series - Copyright (C) 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. Contributed by Jeff Law (law@cygnus.com). This file is part of GNU CC. @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "tree.h" #include "regs.h" @@ -233,7 +233,7 @@ print_operand (file, x, code) case 'A': fputc ('(', file); if (GET_CODE (XEXP (x, 0)) == REG) - output_address (gen_rtx (PLUS, SImode, XEXP (x, 0), GEN_INT (0))); + output_address (gen_rtx_PLUS (SImode, XEXP (x, 0), GEN_INT (0))); else output_address (XEXP (x, 0)); fputc (')', file); @@ -314,9 +314,9 @@ print_operand_address (file, addr) { case REG: if (addr == stack_pointer_rtx) - print_operand_address (file, gen_rtx (PLUS, SImode, - stack_pointer_rtx, - GEN_INT (0))); + print_operand_address (file, gen_rtx_PLUS (SImode, + stack_pointer_rtx, + GEN_INT (0))); else print_operand (file, addr, 0); break; @@ -376,14 +376,12 @@ expand_prologue () need to be flushed back to the stack. */ if (current_function_varargs) { - emit_move_insn (gen_rtx (MEM, SImode, - gen_rtx (PLUS, Pmode, stack_pointer_rtx, - GEN_INT (4))), - gen_rtx (REG, SImode, 0)); - emit_move_insn (gen_rtx (MEM, SImode, - gen_rtx (PLUS, Pmode, stack_pointer_rtx, - GEN_INT (8))), - gen_rtx (REG, SImode, 1)); + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, 4)), + gen_rtx_REG (SImode, 0)); + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, 8)), + gen_rtx_REG (SImode, 1)); } /* And now store all the registers onto the stack with a @@ -747,10 +745,10 @@ function_arg (cum, mode, type, named) switch (cum->nbytes / UNITS_PER_WORD) { case 0: - result = gen_rtx (REG, mode, 0); + result = gen_rtx_REG (mode, 0); break; case 1: - result = gen_rtx (REG, mode, 1); + result = gen_rtx_REG (mode, 1); break; default: result = 0; @@ -995,7 +993,7 @@ legitimize_address (x, oldx, mode) regy2 = force_reg (Pmode, force_operand (XEXP (y, 1), 0)); regx1 = force_reg (Pmode, gen_rtx (GET_CODE (y), Pmode, regx1, regy2)); - return force_reg (Pmode, gen_rtx (PLUS, Pmode, regx1, regy1)); + return force_reg (Pmode, gen_rtx_PLUS (Pmode, regx1, regy1)); } } return x; diff --git a/gcc/config/mn10300/mn10300.h b/gcc/config/mn10300/mn10300.h index b426413c422..a7686ca81cb 100644 --- a/gcc/config/mn10300/mn10300.h +++ b/gcc/config/mn10300/mn10300.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Matsushita MN10300 series - Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. + Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. Contributed by Jeff Law (law@cygnus.com). This file is part of GNU CC. @@ -485,12 +485,12 @@ extern struct rtx_def *function_arg (); otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) ? 4 : 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) ? 4 : 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value. */ @@ -544,9 +544,9 @@ extern struct rtx_def *function_arg (); #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 0x14)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)), \ (CXT)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 0x18)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)), \ (FNADDR)); \ } /* A C expression whose value is RTL representing the value of the return @@ -560,7 +560,7 @@ extern struct rtx_def *function_arg (); #define RETURN_ADDR_RTX(COUNT, FRAME) \ ((COUNT == 0) \ - ? gen_rtx (MEM, Pmode, arg_pointer_rtx) \ + ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \ : (rtx) 0) /* Emit code for a call to builtin_saveregs. We must emit USE insns which diff --git a/gcc/config/mn10300/mn10300.md b/gcc/config/mn10300/mn10300.md index 8c3e2ac3cc0..59acf5ac397 100644 --- a/gcc/config/mn10300/mn10300.md +++ b/gcc/config/mn10300/mn10300.md @@ -1,7 +1,6 @@ ;; GCC machine description for Matsushita MN10300 -;; Copyright (C) 1996, 1997 Free Software Foundation, Inc. - -;; Contributed by Jeff Law (law@cygnus.com). +;; Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. +;; Contributed by Jeff Law (law@cygnus.com). ;; This file is part of GNU CC. @@ -159,8 +158,9 @@ && (GET_MODE_SIZE (GET_MODE (XEXP (operands[1], 1))) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (XEXP (operands[1], 1)))))) emit_move_insn (operands[2], - gen_rtx (ZERO_EXTEND, GET_MODE (XEXP (operands[1], 1)), - SUBREG_REG (XEXP (operands[1], 1)))); + gen_rtx_ZERO_EXTEND + (GET_MODE (XEXP (operands[1], 1)), + SUBREG_REG (XEXP (operands[1], 1)))); else emit_move_insn (operands[2], XEXP (operands[1], 1)); emit_move_insn (operands[0], XEXP (operands[1], 0)); @@ -171,8 +171,9 @@ && (GET_MODE_SIZE (GET_MODE (XEXP (operands[1], 0))) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (XEXP (operands[1], 0)))))) emit_move_insn (operands[2], - gen_rtx (ZERO_EXTEND, GET_MODE (XEXP (operands[1], 0)), - SUBREG_REG (XEXP (operands[1], 0)))); + gen_rtx_ZERO_EXTEND + (GET_MODE (XEXP (operands[1], 0)), + SUBREG_REG (XEXP (operands[1], 0)))); else emit_move_insn (operands[2], XEXP (operands[1], 0)); emit_move_insn (operands[0], XEXP (operands[1], 1)); @@ -344,7 +345,7 @@ if (GET_CODE (temp) != REG) abort (); - if (reg_overlap_mentioned_p (gen_rtx (REG, SImode, REGNO (temp)), + if (reg_overlap_mentioned_p (gen_rtx_REG (SImode, REGNO (temp)), XEXP (operands[1], 0))) return \"mov %H1,%H0\;mov %L1,%L0\"; else @@ -476,7 +477,7 @@ if (GET_CODE (temp) != REG) abort (); - if (reg_overlap_mentioned_p (gen_rtx (REG, SImode, REGNO (temp)), + if (reg_overlap_mentioned_p (gen_rtx_REG (SImode, REGNO (temp)), XEXP (operands[1], 0))) return \"mov %H1,%H0\;mov %L1,%L0\"; else @@ -586,7 +587,7 @@ && GET_CODE (operands[2]) != CONST_INT) { rtx temp = gen_reg_rtx (SImode); - emit_move_insn (temp, gen_rtx (PLUS, SImode, operands[1], operands[2])); + emit_move_insn (temp, gen_rtx_PLUS (SImode, operands[1], operands[2])); emit_move_insn (operands[0], temp); DONE; } diff --git a/gcc/config/mn10300/xm-mn10300.h b/gcc/config/mn10300/xm-mn10300.h index 63d61c276c2..84f888be488 100644 --- a/gcc/config/mn10300/xm-mn10300.h +++ b/gcc/config/mn10300/xm-mn10300.h @@ -1,5 +1,5 @@ /* Configuration for Matsushita MN10300. - Copyright (C) 1996 Free Software Foundation, Inc. + Copyright (C) 1996, 1998, 1999 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -38,10 +38,3 @@ Boston, MA 02111-1307, USA. */ tm.h is a symbolic link to the actual target specific file. */ #include "tm.h" - -#ifndef __STDC__ -extern char *malloc (), *realloc (), *calloc (); -#else -extern void *malloc (), *realloc (), *calloc (); -#endif -extern void free (); diff --git a/gcc/config/ns32k/ns32k.c b/gcc/config/ns32k/ns32k.c index cfc7cd2a12d..ab7535c1dec 100644 --- a/gcc/config/ns32k/ns32k.c +++ b/gcc/config/ns32k/ns32k.c @@ -1,5 +1,5 @@ /* Subroutines for assembler code output on the NS32000. - Copyright (C) 1988, 1994, 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1988, 94, 95, 96, 97, 98, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -18,7 +18,6 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* Some output-actions in ns32k.md need these. */ #include "config.h" #include "system.h" #include "rtl.h" @@ -208,10 +207,10 @@ gen_indexed_expr (base, index, scale) /* This generates an invalid addressing mode, if BASE is fp or sp. This is handled by PRINT_OPERAND_ADDRESS. */ if (GET_CODE (base) != REG && GET_CODE (base) != CONST_INT) - base = gen_rtx (MEM, SImode, base); - addr = gen_rtx (MULT, SImode, index, - GEN_INT (1 << INTVAL (scale))); - addr = gen_rtx (PLUS, SImode, base, addr); + base = gen_rtx_MEM (SImode, base); + addr = gen_rtx_MULT (SImode, index, + GEN_INT (1 << INTVAL (scale))); + addr = gen_rtx_PLUS (SImode, base, addr); return addr; } @@ -246,8 +245,8 @@ split_di (operands, num, lo_half, hi_half) { if (GET_CODE (operands[num]) == REG) { - lo_half[num] = gen_rtx (REG, SImode, REGNO (operands[num])); - hi_half[num] = gen_rtx (REG, SImode, REGNO (operands[num]) + 1); + lo_half[num] = gen_rtx_REG (SImode, REGNO (operands[num])); + hi_half[num] = gen_rtx_REG (SImode, REGNO (operands[num]) + 1); } else if (CONSTANT_P (operands[num])) { @@ -324,14 +323,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) @@ -382,7 +381,7 @@ output_move_double (operands) xops[0] = XEXP (operands[1], 0); xops[1] = operands[0]; output_asm_insn ("addr %a0,%1", xops); - operands[1] = gen_rtx (MEM, DImode, operands[0]); + operands[1] = gen_rtx_MEM (DImode, operands[0]); latehalf[1] = adj_offsettable_operand (operands[1], 4); /* The first half has the overlap, Do the late half first. */ output_asm_insn (singlemove_string (latehalf), latehalf); @@ -968,7 +967,7 @@ print_operand_address (file, addr) case CONST_INT: case LABEL_REF: if (offset) - offset = gen_rtx (PLUS, SImode, tmp, offset); + offset = gen_rtx_PLUS (SImode, tmp, offset); else offset = tmp; break; @@ -1063,7 +1062,7 @@ print_operand_address (file, addr) case SYMBOL_REF: case LABEL_REF: if (offset) - offset = gen_rtx (PLUS, SImode, tmp, offset); + offset = gen_rtx_PLUS (SImode, tmp, offset); else offset = tmp; break; diff --git a/gcc/config/ns32k/ns32k.h b/gcc/config/ns32k/ns32k.h index 5e0268c64c0..71df54afda4 100644 --- a/gcc/config/ns32k/ns32k.h +++ b/gcc/config/ns32k/ns32k.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. NS32000 version. - Copyright (C) 1988, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. + Copyright (C) 1988, 93, 94-98, 1999 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@cygnus.com) This file is part of GNU CC. @@ -587,8 +587,8 @@ enum reg_class or perhaps F0 is there is fp support. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, \ - FLOAT_MODE_P(MODE) && TARGET_32081 ? F0_REGNUM: R0_REGNUM) + gen_rtx_REG (MODE, \ + FLOAT_MODE_P(MODE) && TARGET_32081 ? F0_REGNUM: R0_REGNUM) /* Define this if PCC uses the nonreentrant convention for returning structure and union values. */ @@ -653,7 +653,7 @@ enum reg_class It exists only to test register calling conventions. */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ -((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0) +((TARGET_REGPARM && (CUM) < 8) ? gen_rtx_REG ((MODE), (CUM) / 4) : 0) /* For an arg passed partly in registers and partly in memory, this is the number of registers used. @@ -941,8 +941,8 @@ operands on the 32k are stored). */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \ } /* This is the library routine that is used diff --git a/gcc/config/ns32k/ns32k.md b/gcc/config/ns32k/ns32k.md index c5fe1602b43..dfe66290216 100644 --- a/gcc/config/ns32k/ns32k.md +++ b/gcc/config/ns32k/ns32k.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, ns32000 Version -;; Copyright (C) 1988, 1994, 1996, 1999 Free Software Foundation, Inc. +;; Copyright (C) 1988, 1994, 1996, 1998, 1999 Free Software Foundation, Inc. ;; Contributed by Michael Tiemann (tiemann@cygnus.com) ;; This file is part of GNU CC. @@ -221,7 +221,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"movd %1,tos\", xoperands); output_asm_insn (\"movd %1,tos\", operands); return \"movl tos,%0\"; @@ -233,7 +233,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"movl %1,tos\;movd tos,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"movd tos,%0\"; } else @@ -277,7 +277,7 @@ convrt.i[1] = CONST_DOUBLE_HIGH (operands[1]); convrt.f = convrt.d; - /* Is there a better machine-independent way to do this? */ + /* Is there a better machine-independent way to to this? */ operands[1] = GEN_INT (convrt.i[0]); return \"movd %1,%0\"; } @@ -304,7 +304,7 @@ if (REG_P (operands[1])) { rtx xoperands[2]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"movd %1,tos\", xoperands); output_asm_insn (\"movd %1,tos\", operands); return \"movl tos,%0\"; @@ -316,7 +316,7 @@ if (REG_P (operands[0])) { output_asm_insn (\"movl %1,tos\;movd tos,%0\", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"movd tos,%0\"; } else @@ -357,8 +357,7 @@ && REGNO (operands[0]) == FRAME_POINTER_REGNUM) return \"lprd fp,%1\"; if (GET_CODE (operands[1]) == CONST_DOUBLE) - operands[1] - = GEN_INT (CONST_DOUBLE_LOW (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); if (GET_CODE (operands[1]) == CONST_INT) { int i = INTVAL (operands[1]); @@ -437,8 +436,7 @@ if (i <= 7 && i >= -8) { if (INTVAL (operands[1]) > 7) - operands[1] = - GEN_INT (i); + operands[1] = GEN_INT (i); return \"movqw %1,%0\"; } return \"movw %1,%0\"; @@ -483,8 +481,7 @@ if (char_val <= 7 && char_val >= -8) { if (INTVAL (operands[1]) > 7) - operands[1] = - GEN_INT (char_val); + operands[1] = GEN_INT (char_val); return \"movqb %1,%0\"; } return \"movb %1,%0\"; @@ -1784,7 +1781,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1809,7 +1806,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1834,7 +1831,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1862,7 +1859,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1887,7 +1884,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1912,7 +1909,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1962,7 +1959,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1987,7 +1984,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -2012,7 +2009,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index 640b02b71a7..4bb427efe0a 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -21,7 +21,6 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" - #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -662,8 +661,9 @@ legitimize_pic_address (orig, mode, reg) } else pic_ref = gen_rtx_MEM (Pmode, - gen_rtx_PLUS (Pmode, - pic_offset_table_rtx, orig)); + gen_rtx_PLUS (Pmode, pic_offset_table_rtx, + orig)); + current_function_uses_pic_offset_table = 1; RTX_UNCHANGING_P (pic_ref) = 1; emit_move_insn (reg, pic_ref); @@ -803,16 +803,14 @@ hppa_legitimize_address (x, oldx, mode) if (! VAL_14_BITS_P (newoffset) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) { - rtx const_part - = gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (Pmode, - XEXP (x, 0), - GEN_INT (newoffset))); + rtx const_part = plus_constant (XEXP (x, 0), newoffset); rtx tmp_reg = force_reg (Pmode, gen_rtx_HIGH (Pmode, const_part)); ptr_reg = force_reg (Pmode, - gen_rtx_LO_SUM (Pmode, tmp_reg, const_part)); + gen_rtx_LO_SUM (Pmode, + tmp_reg, const_part)); } else { @@ -850,8 +848,9 @@ hppa_legitimize_address (x, oldx, mode) reg2 = force_reg (Pmode, force_operand (reg2, 0)); return force_reg (Pmode, gen_rtx_PLUS (Pmode, - gen_rtx_MULT (Pmode, reg2, - GEN_INT (val)), + gen_rtx_MULT (Pmode, + reg2, + GEN_INT (val)), reg1)); } @@ -926,11 +925,12 @@ hppa_legitimize_address (x, oldx, mode) reg1 = force_reg (Pmode, gen_rtx_PLUS (Pmode, reg1, GEN_INT (val))); /* We can now generate a simple scaled indexed address. */ - return force_reg (Pmode, - gen_rtx_PLUS (Pmode, - gen_rtx_MULT (Pmode, reg1, - XEXP (XEXP (idx, 0), 1)), - base)); + return + force_reg + (Pmode, gen_rtx_PLUS (Pmode, + gen_rtx_MULT (Pmode, reg1, + XEXP (XEXP (idx, 0), 1)), + base)); } /* If B + C is still a valid base register, then add them. */ @@ -948,7 +948,8 @@ hppa_legitimize_address (x, oldx, mode) reg2 = force_reg (Pmode, force_operand (reg2, 0)); return force_reg (Pmode, gen_rtx_PLUS (Pmode, - gen_rtx_MULT (Pmode, reg2, + gen_rtx_MULT (Pmode, + reg2, GEN_INT (val)), reg1)); } @@ -1034,9 +1035,10 @@ hppa_legitimize_address (x, oldx, mode) return force_reg (Pmode, gen_rtx_PLUS (Pmode, - gen_rtx_MULT (Pmode, reg2, + gen_rtx_MULT (Pmode, + reg2, GEN_INT (val)), - reg1)); + reg1)); } else if ((mode == DFmode || mode == SFmode) && GET_CODE (XEXP (y, 0)) == SYMBOL_REF @@ -1054,12 +1056,12 @@ hppa_legitimize_address (x, oldx, mode) regx2 = force_reg (Pmode, force_operand (regx2, 0)); regx2 = force_reg (Pmode, gen_rtx_fmt_ee (GET_CODE (y), Pmode, regx2, regx1)); - return force_reg (Pmode, - gen_rtx_PLUS (Pmode, - gen_rtx_MULT (Pmode, regx2, - XEXP (XEXP (x, 0), - 1)), - force_reg (Pmode, XEXP (y, 0)))); + return + force_reg (Pmode, + gen_rtx_PLUS (Pmode, + gen_rtx_MULT (Pmode, regx2, + XEXP (XEXP (x, 0), 1)), + force_reg (Pmode, XEXP (y, 0)))); } else if (GET_CODE (XEXP (y, 1)) == CONST_INT && INTVAL (XEXP (y, 1)) >= -4096 @@ -1201,8 +1203,8 @@ emit_move_sequence (operands, mode, scratch_reg) } else emit_move_insn (scratch_reg, XEXP (operand1, 0)); - emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_MEM (mode, - scratch_reg))); + emit_insn (gen_rtx_SET (VOIDmode, operand0, + gen_rtx_MEM (mode, scratch_reg))); return 1; } else if (fp_reg_operand (operand1, mode) @@ -1266,7 +1268,8 @@ emit_move_sequence (operands, mode, scratch_reg) emit_move_sequence (xoperands, Pmode, 0); /* Now load the destination register. */ - emit_insn (gen_rtx_SET (mode, operand0, gen_rtx_MEM (mode, scratch_reg))); + emit_insn (gen_rtx_SET (mode, operand0, + gen_rtx_MEM (mode, scratch_reg))); return 1; } /* Handle secondary reloads for SAR. These occur when trying to load @@ -1495,7 +1498,8 @@ emit_move_sequence (operands, mode, scratch_reg) if (ishighonly) set = gen_rtx_SET (mode, operand0, temp); else - set = gen_rtx_SET (VOIDmode, operand0, + set = gen_rtx_SET (VOIDmode, + operand0, gen_rtx_LO_SUM (mode, temp, operand1)); emit_insn (gen_rtx_SET (VOIDmode, @@ -2515,18 +2519,16 @@ remove_useless_addtr_insns (insns, check_notes) Note in DISP > 8k case, we will leave the high part of the address in %r1. There is code in expand_hppa_{prologue,epilogue} that knows this.*/ + static void store_reg (reg, disp, base) int reg, disp, base; { if (VAL_14_BITS_P (disp)) - { - emit_move_insn (gen_rtx_MEM (word_mode, - gen_rtx_PLUS (Pmode, - gen_rtx_REG (Pmode, base), - GEN_INT (disp))), - gen_rtx_REG (word_mode, reg)); - } + emit_move_insn (gen_rtx_MEM (word_mode, + plus_constant (gen_rtx_REG (Pmode, base), + disp)), + gen_rtx_REG (word_mode, reg)); else { emit_move_insn (gen_rtx_REG (Pmode, 1), @@ -2545,18 +2547,16 @@ store_reg (reg, disp, base) Note in DISP > 8k case, we will leave the high part of the address in %r1. There is code in expand_hppa_{prologue,epilogue} that knows this.*/ + static void load_reg (reg, disp, base) int reg, disp, base; { if (VAL_14_BITS_P (disp)) - { - emit_move_insn (gen_rtx_REG (word_mode, reg), - gen_rtx_MEM (word_mode, - gen_rtx_PLUS (Pmode, - gen_rtx_REG (Pmode, base), - GEN_INT (disp)))); - } + emit_move_insn (gen_rtx_REG (word_mode, reg), + gen_rtx_MEM (word_mode, + plus_constant (gen_rtx_REG (Pmode, base), + disp))); else { emit_move_insn (gen_rtx_REG (Pmode, 1), @@ -2575,17 +2575,14 @@ load_reg (reg, disp, base) Note in DISP > 8k case, we will leave the high part of the address in %r1. There is code in expand_hppa_{prologue,epilogue} that knows this.*/ + static void -set_reg_plus_d(reg, base, disp) +set_reg_plus_d (reg, base, disp) int reg, base, disp; { if (VAL_14_BITS_P (disp)) - { - emit_move_insn (gen_rtx_REG (Pmode, reg), - gen_rtx_PLUS (Pmode, - gen_rtx_REG (Pmode, base), - GEN_INT (disp))); - } + emit_move_insn (gen_rtx_REG (Pmode, reg), + plus_constant (gen_rtx_REG (Pmode, base), disp)); else { emit_move_insn (gen_rtx_REG (Pmode, 1), @@ -2839,7 +2836,8 @@ hppa_expand_prologue() place to get the expected results. sprintf here is just to put something in the name. */ sprintf(hp_profile_label_name, "LP$%04d", -1); - hp_profile_label_rtx = gen_rtx_SYMBOL_REF (Pmode, hp_profile_label_name); + hp_profile_label_rtx = gen_rtx_SYMBOL_REF (Pmode, + hp_profile_label_name); if (current_function_returns_struct) store_reg (STRUCT_VALUE_REGNUM, - 12 - offsetadj, basereg); if (current_function_needs_context) @@ -6392,11 +6390,12 @@ pa_combine_instructions (insns) || anchor_attr == PA_COMBINE_TYPE_FMPY)) { /* Emit the new instruction and delete the old anchor. */ - emit_insn_before (gen_rtx_PARALLEL (VOIDmode, - gen_rtvec (2, - PATTERN (anchor), - PATTERN (floater))), - anchor); + emit_insn_before (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, PATTERN (anchor), + PATTERN (floater))), + anchor); + PUT_CODE (anchor, NOTE); NOTE_LINE_NUMBER (anchor) = NOTE_INSN_DELETED; NOTE_SOURCE_FILE (anchor) = 0; @@ -6413,10 +6412,13 @@ pa_combine_instructions (insns) { rtx temp; /* Emit the new_jump instruction and delete the old anchor. */ - temp = emit_jump_insn_before (gen_rtx_PARALLEL (VOIDmode, - gen_rtvec (2, PATTERN (anchor), - PATTERN (floater))), - anchor); + temp + = emit_jump_insn_before (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, PATTERN (anchor), + PATTERN (floater))), + anchor); + JUMP_LABEL (temp) = JUMP_LABEL (anchor); PUT_CODE (anchor, NOTE); NOTE_LINE_NUMBER (anchor) = NOTE_INSN_DELETED; diff --git a/gcc/config/pa/pa.h b/gcc/config/pa/pa.h index 3f993e11971..5e60940c55a 100644 --- a/gcc/config/pa/pa.h +++ b/gcc/config/pa/pa.h @@ -880,7 +880,7 @@ int zdepi_cint_p (); #define LIBCALL_VALUE(MODE) \ gen_rtx_REG (MODE, \ (! TARGET_SOFT_FLOAT \ - && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28)) + && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28)) /* 1 if N is a possible register number for a function value as seen by the caller. */ @@ -1007,41 +1007,42 @@ struct hppa_args {int words, nargs_prototype, indirect; }; || !FLOAT_MODE_P (MODE) || TARGET_SOFT_FLOAT \ || (CUM).nargs_prototype > 0) \ ? gen_rtx_REG ((MODE), \ - (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ - ? (((!(CUM).indirect \ - || TARGET_PORTABLE_RUNTIME) \ - && (MODE) == DFmode \ - && ! TARGET_SOFT_FLOAT) \ - ? ((CUM).words ? 38 : 34) \ - : ((CUM).words ? 23 : 25)) \ - : (((!(CUM).indirect \ - || TARGET_PORTABLE_RUNTIME) \ - && (MODE) == SFmode \ - && ! TARGET_SOFT_FLOAT) \ - ? (32 + 2 * (CUM).words) \ - : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \ - (TYPE))))))\ + (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ + ? (((!(CUM).indirect \ + || TARGET_PORTABLE_RUNTIME) \ + && (MODE) == DFmode \ + && ! TARGET_SOFT_FLOAT) \ + ? ((CUM).words ? 38 : 34) \ + : ((CUM).words ? 23 : 25)) \ + : (((!(CUM).indirect \ + || TARGET_PORTABLE_RUNTIME) \ + && (MODE) == SFmode \ + && ! TARGET_SOFT_FLOAT) \ + ? (32 + 2 * (CUM).words) \ + : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\ + (TYPE))))))\ /* We are calling a non-prototyped function with floating point \ arguments using the portable conventions. */ \ - : gen_rtx_PARALLEL ((MODE), \ - gen_rtvec \ - (2, \ - gen_rtx_EXPR_LIST (VOIDmode, \ - gen_rtx_REG ((MODE), \ - (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ - ? ((CUM).words ? 38 : 34) \ - : (32 + 2 * (CUM).words))), \ - const0_rtx), \ - gen_rtx_EXPR_LIST (VOIDmode, \ - gen_rtx_REG ((MODE), \ - (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ - ? ((CUM).words ? 23 : 25) \ - : (27 - (CUM).words - \ - FUNCTION_ARG_SIZE ((MODE), \ - (TYPE))))), \ - const0_rtx))) \ - /* Pass this parameter in the stack. */ \ - : 0) + : (gen_rtx_PARALLEL \ + ((MODE), \ + gen_rtvec \ + (2, \ + gen_rtx_EXPR_LIST \ + (VOIDmode, \ + gen_rtx_REG ((MODE), \ + (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ + ? ((CUM).words ? 38 : 34) : (32 + 2 * (CUM).words))), \ + const0_rtx), \ + gen_rtx_EXPR_LIST \ + (VOIDmode, \ + gen_rtx_REG ((MODE), \ + (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \ + ? ((CUM).words ? 23 : 25) \ + : (27 - (CUM).words - \ + FUNCTION_ARG_SIZE ((MODE), (TYPE))))), \ + const0_rtx)))) \ + /* Pass this parameter in the stack. */ \ + : 0) /* For an arg passed partly in registers and partly in memory, this is the number of registers used. diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md index f28d1915643..eff818b37db 100644 --- a/gcc/config/pa/pa.md +++ b/gcc/config/pa/pa.md @@ -3107,8 +3107,7 @@ operands[1] = force_reg (SImode, operands[1]); operands[2] = force_reg (SImode, operands[2]); emit_insn (gen_umulsidi3 (scratch, operands[1], operands[2])); - emit_insn (gen_rtx_SET (VOIDmode, - operands[0], + emit_insn (gen_rtx_SET (VOIDmode, operands[0], gen_rtx_SUBREG (SImode, scratch, 1))); DONE; } @@ -5410,7 +5409,8 @@ /* Else call $$sh_func_adrs to extract the function's real add24. */ return output_millicode_call (insn, - gen_rtx_SYMBOL_REF (SImode, \"$$sh_func_adrs\")); + gen_rtx_SYMBOL_REF (SImode, + \"$$sh_func_adrs\")); }" [(set_attr "type" "multi") (set (attr "length") @@ -5456,8 +5456,9 @@ /* Load the PIC register from the stack slot (in our caller's frame). */ emit_move_insn (pic_offset_table_rtx, - gen_rtx_MEM (SImode, plus_constant (stack_pointer_rtx, -32))); - emit_insn (gen_rtx_USE (VOIDmode, pic_offset_table_rtx)); + gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, -32))); + emit_insn (gen_rtx (USE, VOIDmode, pic_offset_table_rtx)); emit_insn (gen_blockage ()); DONE; }") diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c index ebe76e3e1e5..f65e27f34fc 100644 --- a/gcc/config/pdp11/pdp11.c +++ b/gcc/config/pdp11/pdp11.c @@ -1,5 +1,5 @@ /* Subroutines for gcc2 for pdp11. - Copyright (C) 1994, 1995, 1996, 1997, 1999 Free Software Foundation, Inc. + Copyright (C) 1994, 95-98, 1999 Free Software Foundation, Inc. Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). This file is part of GNU CC. @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -364,14 +364,14 @@ output_move_double (operands) { operands[0] = XEXP (XEXP (operands[0], 0), 0); output_asm_insn ("sub $4,%0", operands); - operands[0] = gen_rtx (MEM, SImode, operands[0]); + operands[0] = gen_rtx_MEM (SImode, operands[0]); optype0 = OFFSOP; } if (optype0 == POPOP && optype1 == PUSHOP) { operands[1] = XEXP (XEXP (operands[1], 0), 0); output_asm_insn ("sub $4,%1", operands); - operands[1] = gen_rtx (MEM, SImode, operands[1]); + operands[1] = gen_rtx_MEM (SImode, operands[1]); optype1 = OFFSOP; } @@ -394,14 +394,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, HImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 2); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, HImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (HImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 2); else if (optype1 == CNSTOP) @@ -411,8 +411,8 @@ output_move_double (operands) /* now the mess begins, high word is in lower word??? that's what ashc makes me think, but I don't remember :-( */ - latehalf[1] = GEN_INT (INTVAL(operands[1])>>16); - operands[1] = GEN_INT (INTVAL(operands[1])&0xff); + latehalf[1] = GEN_INT (INTVAL(operands[1]) >> 16); + operands[1] = GEN_INT (INTVAL(operands[1]) & 0xff); } else if (GET_CODE (operands[1]) == CONST_DOUBLE) { @@ -576,14 +576,14 @@ output_move_quad (operands) { operands[0] = XEXP (XEXP (operands[0], 0), 0); output_asm_insn ("sub $8,%0", operands); - operands[0] = gen_rtx (MEM, DImode, operands[0]); + operands[0] = gen_rtx_MEM (DImode, operands[0]); optype0 = OFFSOP; } if (optype0 == POPOP && optype1 == PUSHOP) { operands[1] = XEXP (XEXP (operands[1], 0), 0); output_asm_insn ("sub $8,%1", operands); - operands[1] = gen_rtx (MEM, SImode, operands[1]); + operands[1] = gen_rtx_MEM (SImode, operands[1]); optype1 = OFFSOP; } @@ -606,14 +606,14 @@ output_move_quad (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 2); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) @@ -631,19 +631,18 @@ output_move_quad (operands) #ifndef HOST_WORDS_BIG_ENDIAN latehalf[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); - operands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); #else /* HOST_WORDS_BIG_ENDIAN */ latehalf[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); #endif /* HOST_WORDS_BIG_ENDIAN */ } else if (GET_CODE(operands[1]) == CONST_INT) - { + { latehalf[1] = GEN_INT (0); - } + } else - abort(); - + abort(); } else latehalf[1] = operands[1]; diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h index 2a1d936f6e4..804e0d27478 100644 --- a/gcc/config/pdp11/pdp11.h +++ b/gcc/config/pdp11/pdp11.h @@ -569,18 +569,18 @@ extern int current_first_parm_offset; not without FPU!!!! ) */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE))) + gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE))) /* and the called function leaves it in the first register. Difference only on machines with register windows. */ #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE))) + gen_rtx_REG (TYPE_MODE (VALTYPE), BASE_RETURN_VALUE_REG(TYPE_MODE(VALTYPE))) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, BASE_RETURN_VALUE_REG(MODE)) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, BASE_RETURN_VALUE_REG(MODE)) /* 1 if N is a possible register number for a function value as seen by the caller. @@ -1300,8 +1300,8 @@ JMP FUNCTION 0x0058 0x0000 <- FUNCTION if (TARGET_SPLIT) \ abort(); \ \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 2)), CXT); \ - emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 6)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 2)), CXT); \ + emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 6)), FNADDR); \ } diff --git a/gcc/config/pdp11/pdp11.md b/gcc/config/pdp11/pdp11.md index f07acefd3bd..217e314f1eb 100644 --- a/gcc/config/pdp11/pdp11.md +++ b/gcc/config/pdp11/pdp11.md @@ -1,5 +1,5 @@ ;;- Machine description for the pdp11 for GNU C compiler -;; Copyright (C) 1994, 1995, 1997, 1999 Free Software Foundation, Inc. +;; Copyright (C) 1994, 1995, 1997, 1998, 1999 Free Software Foundation, Inc. ;; Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). ;; This file is part of GNU CC. @@ -732,7 +732,7 @@ { output_asm_insn(\"{stcdf|movfo} %1, -(sp)\", operands); output_asm_insn(\"mov (sp)+, %0\", operands); - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0])+1); output_asm_insn(\"mov (sp)+, %0\", operands); return \"\"; } @@ -805,8 +805,8 @@ /* make register pair available */ latehalf[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); - + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0])+ 1); + output_asm_insn(\"movb %1, %0\", operands); output_asm_insn(\"sxt %0\", latehalf); @@ -857,7 +857,7 @@ /* make register pair available */ latehalf[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"mov %1, %0\", operands); output_asm_insn(\"sxt %0\", latehalf); @@ -883,7 +883,7 @@ rtx lateoperands[2]; lateoperands[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"tst %0\", operands); sprintf(buf, \"bge extendhisi%d\", count); @@ -918,7 +918,7 @@ rtx latehalf[2]; latehalf[0] = NULL; - latehalf[1] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + latehalf[1] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"mov %1, -(sp)\", latehalf); output_asm_insn(\"mov %1, -(sp)\", operands); @@ -952,7 +952,7 @@ output_asm_insn(\"{stcdl|movfi} %1, -(sp)\", operands); output_asm_insn(\"seti\", operands); output_asm_insn(\"mov (sp)+, %0\", operands); - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"mov (sp)+, %0\", operands); return \"\"; } @@ -998,7 +998,7 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); @@ -1007,7 +1007,7 @@ lateoperands[2] = operands[2]; if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); else operands[2] = adj_offsettable_operand(operands[2], 2); @@ -1017,8 +1017,8 @@ return \"\"; } - lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT (INTVAL (operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); if (INTVAL(operands[2])) { @@ -1101,14 +1101,14 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); lateoperands[2] = operands[2]; if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); else operands[2] = adj_offsettable_operand(operands[2], 2); @@ -1209,7 +1209,7 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); @@ -1218,7 +1218,7 @@ lateoperands[2] = operands[2]; if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); else operands[2] = adj_offsettable_operand(operands[2], 2); @@ -1227,8 +1227,8 @@ return \"\"; } - lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT ((INTVAL (operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); /* these have different lengths, so we should have different constraints! */ @@ -1275,26 +1275,26 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); if (! CONSTANT_P(operands[2])) - { - lateoperands[2] = operands[2]; + { + lateoperands[2] = operands[2]; - if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); - else - operands[2] = adj_offsettable_operand(operands[2], 2); + if (REG_P (operands[2])) + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); + else + operands[2] = adj_offsettable_operand (operands[2], 2); - output_asm_insn (\"bis %2, %0\", operands); - output_asm_insn (\"bis %2, %0\", lateoperands); - return \"\"; - } + output_asm_insn (\"bis %2, %0\", operands); + output_asm_insn (\"bis %2, %0\", lateoperands); + return \"\"; + } - lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT ((INTVAL (operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); /* these have different lengths, so we should have different constraints! */ @@ -1336,26 +1336,26 @@ rtx lateoperands[3]; lateoperands[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); if (REG_P(operands[2])) - { - lateoperands[2] = operands[2]; - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); - - output_asm_insn (\"xor %2, %0\", operands); - output_asm_insn (\"xor %2, %0\", lateoperands); + { + lateoperands[2] = operands[2]; + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); - return \"\"; - } + output_asm_insn (\"xor %2, %0\", operands); + output_asm_insn (\"xor %2, %0\", lateoperands); - lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); + return \"\"; + } + + lateoperands[2] = GEN_INT ((INTVAL (operands[2]) >> 16) & 0xffff); operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); - if (INTVAL(operands[2])) + if (INTVAL (operands[2])) output_asm_insn (\"xor %2, %0\", operands); - if (INTVAL(lateoperands[2])) + if (INTVAL (lateoperands[2])) output_asm_insn (\"xor %2, %0\", lateoperands); return \"\"; @@ -1614,7 +1614,7 @@ ; ; /* allow REG_NOTES to be set on last insn (labels don't have enough ; fields, and can't be used for REG_NOTES anyway). */ -; emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); +; emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); ; DONE; ;}") diff --git a/gcc/config/pyr/pyr.c b/gcc/config/pyr/pyr.c index c760c24ec4f..9c39e3f77e9 100644 --- a/gcc/config/pyr/pyr.c +++ b/gcc/config/pyr/pyr.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Pyramid 90x, 9000, and MIServer Series. - Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 1991, 1997, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -20,7 +20,7 @@ Boston, MA 02111-1307, USA. */ /* Some output-actions in pyr.md need these. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -258,6 +258,7 @@ extend_const (x, extop, from_mode, to_mode) val = val & ~((-1) << (GET_MODE_BITSIZE (from_mode))); if (GET_MODE_BITSIZE (to_mode) == HOST_BITS_PER_INT) return GEN_INT (val); + return GEN_INT (val & ~((-1) << (GET_MODE_BITSIZE (to_mode)))); } @@ -296,7 +297,7 @@ extend_and_branch (extop) if (op1 == 0) { op0 = ensure_extended (op0, extop, test_mode); - emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, op0)); + emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, op0)); } else { @@ -338,8 +339,8 @@ extend_and_branch (extop) op0 = force_reg (test_mode, op0); } - emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, - gen_rtx (COMPARE, VOIDmode, op0, op1))); + emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, + gen_rtx_COMPARE (VOIDmode, op0, op1))); } } @@ -630,7 +631,7 @@ output_move_double (operands) } operands[1] = GEN_INT (CONST_DOUBLE_HIGH (const_op)); output_asm_insn ("movw %1,%0", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); operands[1] = GEN_INT (CONST_DOUBLE_LOW (const_op)); return "movw %1,%0"; } @@ -648,7 +649,7 @@ output_move_double (operands) } operands[1] = GEN_INT (CONST_DOUBLE_LOW (const_op)); output_asm_insn ("movw %1,%0", operands); - operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); operands[1] = GEN_INT (CONST_DOUBLE_HIGH (const_op)); return "movw %1,%0"; } diff --git a/gcc/config/pyr/pyr.h b/gcc/config/pyr/pyr.h index e4395029189..e5167791665 100644 --- a/gcc/config/pyr/pyr.h +++ b/gcc/config/pyr/pyr.h @@ -1,6 +1,6 @@ /* Definitions of target machine parameters for GNU compiler, for Pyramid 90x, 9000, and MIServer Series. - Copyright (C) 1989, 1995, 1996, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 95-98, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -511,19 +511,19 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; --> its type. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), PYR_TREG(0)) + gen_rtx_REG (TYPE_MODE (VALTYPE), PYR_TREG(0)) /* --> but the callee has to leave it in PR0(/PR1) */ #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), PYR_PREG(0)) + gen_rtx_REG (TYPE_MODE (VALTYPE), PYR_PREG(0)) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ /* --> On Pyramid the return value is in TR0/TR1 regardless. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, PYR_TREG(0)) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, PYR_TREG(0)) /* Define this if PCC uses the nonreentrant convention for returning structure and union values. */ @@ -652,7 +652,7 @@ extern int inner_param_safe_helper(); + ((MODE) == BLKmode \ ? (int_size_in_bytes (TYPE) + 3) / 4 \ : (GET_MODE_SIZE (MODE) + 3) / 4)) \ - ? gen_rtx (REG, (MODE), PYR_TREG(CUM)) \ + ? gen_rtx_REG ((MODE), PYR_TREG(CUM)) \ : 0) \ : 0) #ifdef __GNUC__ @@ -673,7 +673,7 @@ extern void* pyr_function_arg (); + ((MODE) == BLKmode \ ? (int_size_in_bytes (TYPE) + 3) / 4 \ : (GET_MODE_SIZE (MODE) + 3) / 4)) \ - ? gen_rtx (REG, (MODE), PYR_PREG(CUM)) \ + ? gen_rtx_REG ((MODE), PYR_PREG(CUM)) \ : 0) \ : 0) @@ -749,12 +749,13 @@ extern void* pyr_function_arg (); CXT is an RTX for the static chain value for the function. */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ -{ emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 4)), CXT); \ +{ emit_move_insn (gen_rtx_MEM (Pmode, plus_constant (TRAMP, 4)), CXT); \ emit_move_insn (gen_rtx (MEM, Pmode, plus_constant (TRAMP, 12)), FNADDR); \ - emit_call_insn (gen_call (gen_rtx (MEM, QImode, \ - gen_rtx (SYMBOL_REF, Pmode, \ - "__enable_execute_stack")), \ - const0_rtx)); \ + emit_call_insn (gen_call \ + (gen_rtx_MEM \ + (QImode, \ + gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack")), \ + const0_rtx)); \ } /* Output assembler code to FILE to increment profiler label # LABELNO diff --git a/gcc/config/pyr/pyr.md b/gcc/config/pyr/pyr.md index c1d440a5ed4..efd7bce5a1a 100644 --- a/gcc/config/pyr/pyr.md +++ b/gcc/config/pyr/pyr.md @@ -1,5 +1,5 @@ ;; GNU C machine description for Pyramid 90x, 9000, MIServer Series -;; Copyright (C) 1989, 1990, 1995, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1989, 90, 95, 97, 98, 1999 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -1257,9 +1257,9 @@ { rtx xoperands[2]; CC_STATUS_INIT; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (REG_P (operands[2])) - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else { xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); @@ -1278,9 +1278,9 @@ { rtx xoperands[2]; CC_STATUS_INIT; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (REG_P (operands[2])) - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else { xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); @@ -1299,9 +1299,9 @@ { rtx xoperands[2]; CC_STATUS_INIT; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (REG_P (operands[2])) - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else { xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); @@ -1320,9 +1320,9 @@ { rtx xoperands[2]; CC_STATUS_INIT; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (REG_P (operands[2])) - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else { xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); @@ -1341,9 +1341,9 @@ { rtx xoperands[2]; CC_STATUS_INIT; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (REG_P (operands[2])) - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else { xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); diff --git a/gcc/config/romp/romp.c b/gcc/config/romp/romp.c index a29d95447b3..b5096c2f9c2 100644 --- a/gcc/config/romp/romp.c +++ b/gcc/config/romp/romp.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on ROMP. - Copyright (C) 1990, 1991, 1992, 1993, 1997 Free Software Foundation, Inc. + Copyright (C) 1990, 91, 92, 93, 97, 98, 1999 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@nyu.edu) This file is part of GNU CC. @@ -21,7 +21,7 @@ Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -825,8 +825,8 @@ print_operand (file, x, code) if (GET_CODE (x) == REG) fprintf (file, "%s", reg_names[REGNO (x) + 1]); else if (GET_CODE (x) == MEM) - print_operand (file, gen_rtx (MEM, GET_MODE (x), - plus_constant (XEXP (x, 0), 4)), 0); + print_operand (file, gen_rtx_MEM (GET_MODE (x), + plus_constant (XEXP (x, 0), 4)), 0); else abort (); break; @@ -1222,8 +1222,7 @@ output_epilog (file, size) /* Restore floating-point registers. */ if (write_code) output_loadsave_fpregs (file, CLOBBER, - gen_rtx (PLUS, Pmode, gen_rtx (REG, Pmode, 1), - GEN_INT (fp_save))); + plus_constant (gen_rtx_REG (Pmode, 1), fp_save)); /* If we push the stack and do not have size > 32K, adjust the register save location to the current position of sp. Otherwise, if long frame, @@ -1349,9 +1348,9 @@ get_symref (name) end_temporary_allocation (); p = *last_p = (struct symref_hashent *) permalloc (sizeof (struct symref_hashent)); - p->symref = gen_rtx (SYMBOL_REF, Pmode, - obstack_copy0 (&permanent_obstack, - name, strlen (name))); + p->symref = gen_rtx_SYMBOL_REF (Pmode, + obstack_copy0 (&permanent_obstack, + name, strlen (name))); p->next = 0; resume_temporary_allocation (); } @@ -1740,8 +1739,7 @@ output_loadsave_fpregs (file, code, addr) if (mask) fprintf (file, "\t%s\n", - output_fpop (code, GEN_INT (mask), - gen_rtx (MEM, Pmode, addr), + output_fpop (code, GEN_INT (mask), gen_rtx_MEM (Pmode, addr), 0, const0_rtx)); } diff --git a/gcc/config/romp/romp.h b/gcc/config/romp/romp.h index 82a0186a66c..521a78c2b13 100644 --- a/gcc/config/romp/romp.h +++ b/gcc/config/romp/romp.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for ROMP chip. - Copyright (C) 1989, 1991, 1993, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1989, 91, 93, 95, 96, 98, 1999 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@nyu.edu) This file is part of GNU CC. @@ -271,13 +271,11 @@ extern int target_flags; /* Place to put static chain when calling a function that requires it. */ #define STATIC_CHAIN \ - gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, stack_pointer_rtx, \ - GEN_INT (-36))) + gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, -36)) /* Place where static chain is found upon entry to routine. */ #define STATIC_CHAIN_INCOMING \ - gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, arg_pointer_rtx, \ - GEN_INT (-20))) + gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -20)) /* Place that structure value return address is placed. @@ -520,15 +518,16 @@ enum reg_class { NO_REGS, R0_REGS, R15_REGS, BASE_REGS, GENERAL_REGS, On ROMP the value is found in r2, unless the machine specific option fp-arg-in-fpregs is selected, in which case FP return values are in fr1 */ -#define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), \ - (TARGET_FP_REGS && \ - GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT) ? 18 : 2) +#define FUNCTION_VALUE(VALTYPE, FUNC) \ + gen_rtx_REG (TYPE_MODE (VALTYPE), \ + (TARGET_FP_REG \ + && GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT) \ + ? 18 : 2) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2) /* The definition of this macro implies that there are cases where a scalar value cannot be returned in registers. @@ -628,8 +627,8 @@ struct rt_cargs {int gregs, fregs; }; #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ (! (NAMED) ? 0 \ : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \ - : USE_FP_REG(MODE,CUM) ? gen_rtx(REG, (MODE),(CUM.fregs) + 17) \ - : (CUM).gregs < 4 ? gen_rtx(REG, (MODE), 2 + (CUM).gregs) : 0) + : USE_FP_REG(MODE,CUM) ? gen_rtx_REG ((MODE), (CUM.fregs) + 17) \ + : (CUM).gregs < 4 ? gen_rtx_REG ((MODE), 2 + (CUM).gregs) : 0) /* For an arg passed partly in registers and partly in memory, this is the number of registers used. @@ -672,9 +671,9 @@ struct rt_cargs {int gregs, fregs; }; if (! NO_RTL && first_reg_offset != 4) \ move_block_from_reg \ (2 + first_reg_offset, \ - gen_rtx (MEM, BLKmode, \ - plus_constant (virtual_incoming_args_rtx, \ - first_reg_offset * 4)), \ + gen_rtx_MEM (BLKmode, \ + plus_constant (virtual_incoming_args_rtx, \ + first_reg_offset * 4)), \ 4 - first_reg_offset, (4 - first_reg_offset) * UNITS_PER_WORD); \ PRETEND_SIZE = (4 - first_reg_offset) * UNITS_PER_WORD; \ } \ @@ -814,27 +813,27 @@ struct rt_cargs {int gregs, fregs; }; _temp = expand_binop (SImode, add_optab, ADDR, \ GEN_INT (4), \ 0, 1, OPTAB_LIB_WIDEN); \ - emit_move_insn (gen_rtx (MEM, SImode, \ - memory_address (SImode, ADDR)), _temp); \ + emit_move_insn (gen_rtx_MEM (SImode, \ + memory_address (SImode, ADDR)), _temp); \ \ _val = force_reg (SImode, CXT); \ _addr = memory_address (HImode, plus_constant (ADDR, 10)); \ - emit_move_insn (gen_rtx (MEM, HImode, _addr), \ + emit_move_insn (gen_rtx_MEM (HImode, _addr), \ gen_lowpart (HImode, _val)); \ _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ build_int_2 (16, 0), 0, 1); \ _addr = memory_address (HImode, plus_constant (ADDR, 6)); \ - emit_move_insn (gen_rtx (MEM, HImode, _addr), \ + emit_move_insn (gen_rtx_MEM (HImode, _addr), \ gen_lowpart (HImode, _temp)); \ \ _val = force_reg (SImode, FNADDR); \ _addr = memory_address (HImode, plus_constant (ADDR, 24)); \ - emit_move_insn (gen_rtx (MEM, HImode, _addr), \ + emit_move_insn (gen_rtx_MEM (HImode, _addr), \ gen_lowpart (HImode, _val)); \ _temp = expand_shift (RSHIFT_EXPR, SImode, _val, \ build_int_2 (16, 0), 0, 1); \ _addr = memory_address (HImode, plus_constant (ADDR, 20)); \ - emit_move_insn (gen_rtx (MEM, HImode, _addr), \ + emit_move_insn (gen_rtx_MEM (HImode, _addr), \ gen_lowpart (HImode, _temp)); \ \ } @@ -1074,11 +1073,10 @@ struct rt_cargs {int gregs, fregs; }; low_int = INTVAL (XEXP (X, 1)) & 0xffff; \ if (low_int & 0x8000) \ high_int += 1, low_int |= 0xffff0000; \ - (X) = gen_rtx (PLUS, SImode, \ - force_operand \ - (gen_rtx (PLUS, SImode, XEXP (X, 0), \ - GEN_INT (high_int << 16)), 0),\ - GEN_INT (low_int)); \ + (X) = gen_rtx_PLUS (SImode, \ + force_operand (plus_constant (XEXP (X, 0), \ + high_int << 16)), \ + GEN_INT (low_int)); \ } \ } @@ -1129,7 +1127,7 @@ struct rt_cargs {int gregs, fregs; }; && GET_CODE (op2) == REG && FP_REGNO_P (REGNO (op2)) \ && REGNO (op0) == REGNO (op2)) \ { \ - tem = gen_rtx (REG, GET_MODE (op0), 17); \ + tem = gen_rtx_REG (GET_MODE (op0), 17); \ emit_insn_after (gen_move_insn (op0, tem), INSN); \ SET_DEST (XVECEXP (PATTERN (INSN), 0, 0)) = tem; \ OPERANDS[0] = tem; \ @@ -1584,8 +1582,8 @@ extern int romp_debugger_arg_correction(); else if (GET_CODE (addr) == SYMBOL_REF \ && CONSTANT_POOL_ADDRESS_P (addr)) \ { \ - offset = GEN_INT (get_pool_offset (addr) + 12); \ - base = gen_rtx (REG, SImode, 14); \ + offset = GEN_INT (get_pool_offset (addr) + 12); \ + base = gen_rtx_REG (SImode, 14); \ } \ else if (GET_CODE (addr) == CONST \ && GET_CODE (XEXP (addr, 0)) == PLUS \ @@ -1596,7 +1594,7 @@ extern int romp_debugger_arg_correction(); offset = plus_constant (XEXP (XEXP (addr, 0), 1), \ (get_pool_offset (XEXP (XEXP (addr, 0), 0)) \ + 12)); \ - base = gen_rtx (REG, SImode, 14); \ + base = gen_rtx_REG (SImode, 14); \ } \ output_addr_const (FILE, offset); \ if (base) \ diff --git a/gcc/config/romp/romp.md b/gcc/config/romp/romp.md index 5f0631521e3..82290c49780 100644 --- a/gcc/config/romp/romp.md +++ b/gcc/config/romp/romp.md @@ -1,5 +1,5 @@ ;;- Machine description for ROMP chip for GNU C compiler -;; Copyright (C) 1988, 91, 93, 94, 95, 1999 Free Software Foundation, Inc. +;; Copyright (C) 1988, 91, 93, 94, 95, 98, 1999 Free Software Foundation, Inc. ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) ;; This file is part of GNU CC. @@ -180,8 +180,7 @@ || (unsigned) ((- const_val) + 0x8000) < 0x10000) { /* Can do this by loading the negative constant and then negating. */ - emit_move_insn (operands[0], - GEN_INT (- const_val)); + emit_move_insn (operands[0], GEN_INT (- const_val)); emit_insn (gen_negsi2 (operands[0], operands[0])); DONE; } @@ -195,8 +194,7 @@ if (low_part >= 0x10 && exact_log2 (low_part) >= 0) i = high_part, high_part = low_part, low_part = i; - emit_move_insn (operands[0], - GEN_INT (low_part)); + emit_move_insn (operands[0], GEN_INT (low_part)); emit_insn (gen_iorsi3 (operands[0], operands[0], GEN_INT (high_part))); DONE; @@ -482,11 +480,9 @@ { operands[2] = operand_subword (operands[0], 1, 0, DImode); operands[3] = XEXP (operands[1], 0); operands[4] = operand_subword (operands[0], 0, 0, DImode); - operands[5] = gen_rtx (MEM, SImode, operands[2]); + operands[5] = gen_rtx_MEM (SImode, operands[2]); operands[6] = operands[2]; - operands[7] = gen_rtx (MEM, SImode, - gen_rtx (PLUS, SImode, operands[2], - GEN_INT (4))); + operands[7] = gen_rtx_MEM (SImode, plus_constant (operands[2], 4)); if (operands[2] == 0 || operands[4] == 0) FAIL; @@ -503,11 +499,9 @@ (set (match_dup 6) (match_dup 7))] " { operands[3] = XEXP (operands[0], 0); - operands[4] = gen_rtx (MEM, SImode, operands[2]); + operands[4] = gen_rtx_MEM (SImode, operands[2]); operands[5] = operand_subword (operands[1], 0, 0, DImode); - operands[6] = gen_rtx (MEM, SImode, - gen_rtx (PLUS, SImode, operands[2], - GEN_INT (4))); + operands[6] = gen_rtx_MEM (SImode, plus_constant (operands[4], 4)); operands[7] = operand_subword (operands[1], 1, 0, DImode); if (operands[5] == 0 || operands[7] == 0) @@ -607,8 +601,8 @@ operands[7] = operands[8] = operands[6]; else { - operands[7] = gen_rtx (SCRATCH, SImode); - operands[8] = gen_rtx (SCRATCH, SImode); + operands[7] = gen_rtx_SCRATCH (SImode); + operands[8] = gen_rtx_SCRATCH (SImode); } }") @@ -631,7 +625,7 @@ if (op0 == op1) { - emit_insn (gen_rtx (SET, VOIDmode, op0, op1)); + emit_insn (gen_rtx_SET (VOIDmode, op0, op1)); DONE; } @@ -686,7 +680,7 @@ if (op0 == op1) { - emit_insn (gen_rtx (SET, VOIDmode, op0, op1)); + emit_insn (gen_rtx_SET (VOIDmode, op0, op1)); DONE; } @@ -706,7 +700,7 @@ last = emit_move_insn (operand_subword (op0, 0, 1, SFmode), operand_subword_force (op1, 0, SFmode)); - REG_NOTES (last) = gen_rtx (EXPR_LIST, REG_EQUAL, op1, REG_NOTES (last)); + REG_NOTES (last) = gen_rtx_EXPR_LIST (REG_EQUAL, op1, REG_NOTES (last)); DONE; } }") @@ -812,11 +806,10 @@ " { operands[2] = XEXP (operands[1], 0); operands[3] = operand_subword (operands[0], 0, 0, DFmode); - operands[4] = gen_rtx (MEM, SImode, gen_rtx (REG, SImode, 15)); + operands[4] = gen_rtx_MEM (SImode, gen_rtx (REG, SImode, 15)); operands[5] = operand_subword (operands[0], 1, 0, DFmode); - operands[6] = gen_rtx (MEM, SImode, - gen_rtx (PLUS, SImode, gen_rtx (REG, SImode, 15), - GEN_INT (4))); + operands[6] = gen_rtx_MEM (SImode, + plus_constant (gen_rtx (REG, SImode, 15), 4)); if (operands[3] == 0 || operands[5] == 0) FAIL; @@ -833,11 +826,10 @@ (set (match_dup 5) (match_dup 6))] " { operands[2] = XEXP (operands[0], 0); - operands[3] = gen_rtx (MEM, SImode, gen_rtx (REG, SImode, 15)); + operands[3] = gen_rtx_MEM (SImode, gen_rtx (REG, SImode, 15)); operands[4] = operand_subword (operands[1], 0, 0, DFmode); - operands[5] = gen_rtx (MEM, SImode, - gen_rtx (PLUS, SImode, gen_rtx (REG, SImode, 15), - GEN_INT (4))); + operands[5] = gen_rtx_MEM (SImode, + plus_constant (gen_rtx_REG (SImode, 15), 4)); operands[6] = operand_subword (operands[1], 1, 0, DFmode); if (operands[4] == 0 || operands[6] == 0) @@ -870,11 +862,11 @@ FAIL; if (reload_completed) - operands[6] = operands[7] = gen_rtx (REG, SImode, 15); + operands[6] = operands[7] = gen_rtx_REG (SImode, 15); else { - operands[6] = gen_rtx (SCRATCH, SImode); - operands[7] = gen_rtx (SCRATCH, SImode); + operands[6] = gen_rtx_SCRATCH (SImode); + operands[7] = gen_rtx_SCRATCH (SImode); } }") @@ -1208,8 +1200,7 @@ if (low & 0x8000) high++, low |= 0xffff0000; - emit_insn (gen_addsi3 (operands[0], operands[1], - GEN_INT (high << 16))); + emit_insn (gen_addsi3 (operands[0], operands[1], GEN_INT (high << 16))); operands[1] = operands[0]; operands[2] = GEN_INT (low); } @@ -1366,16 +1357,16 @@ rtx insn; emit_insn (gen_divmodsi4_doit (operands[1], operands[2])); - insn = emit_move_insn (operands[0], gen_rtx (REG, SImode, 2)); - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, - gen_rtx (DIV, SImode, operands[1], - operands[2]), - REG_NOTES (insn)); - insn = emit_move_insn (operands[3], gen_rtx (REG, SImode, 3)); - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, - gen_rtx (MOD, SImode, operands[1], - operands[2]), - REG_NOTES (insn)); + insn = emit_move_insn (operands[0], gen_rtx_REG (SImode, 2)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, + gen_rtx_DIV (SImode, operands[1], + operands[2]), + REG_NOTES (insn)); + insn = emit_move_insn (operands[3], gen_rtx_REG (SImode, 3)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, + gen_rtx_MOD (SImode, operands[1], + operands[2]), + REG_NOTES (insn)); DONE; }") @@ -1416,16 +1407,16 @@ rtx insn; emit_insn (gen_udivmodsi4_doit (operands[1], operands[2])); - insn = emit_move_insn (operands[0], gen_rtx (REG, SImode, 2)); - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, - gen_rtx (UDIV, SImode, operands[1], - operands[2]), - REG_NOTES (insn)); - insn = emit_move_insn (operands[3], gen_rtx (REG, SImode, 3)); - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, - gen_rtx (UMOD, SImode, operands[1], - operands[2]), - REG_NOTES (insn)); + insn = emit_move_insn (operands[0], gen_rtx_REG (SImode, 2)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, + gen_rtx_UDIV (SImode, operands[1], + operands[2]), + REG_NOTES (insn)); + insn = emit_move_insn (operands[3], gen_rtx_REG (SImode, 3)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, + gen_rtx_UMOD (SImode, operands[1], + operands[2]), + REG_NOTES (insn)); DONE; }") @@ -1550,7 +1541,7 @@ if (top != 0 && bottom != 0) { emit_insn (gen_iorsi3 (operands[0], operands[1], - GEN_INT ((top << 16)))); + GEN_INT (top << 16)))); operands[1] = operands[0]; operands[2] = GEN_INT (bottom); } @@ -1590,7 +1581,7 @@ else if (top != 0 && bottom != 0) { emit_insn (gen_xorsi3 (operands[0], operands[1], - GEN_INT ((top << 16)))); + GEN_INT (top << 16))); operands[1] = operands[0]; operands[2] = GEN_INT (bottom); } @@ -1664,7 +1655,7 @@ "" " { - rtx reg0 = gen_rtx (REG, SImode, 0); + rtx reg0 = gen_rtx_REG (SImode, 0); rtx call_insn; if (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != CONST_INT) @@ -1674,8 +1665,8 @@ if (GET_CODE (operands[0]) == SYMBOL_REF) { extern rtx get_symref (); - char *real_fcnname = - (char *) alloca (strlen (XSTR (operands[0], 0)) + 2); + char *real_fcnname + = (char *) alloca (strlen (XSTR (operands[0], 0)) + 2); /* Copy the data area address to r0. */ emit_move_insn (reg0, force_reg (SImode, operands[0])); @@ -1688,7 +1679,7 @@ rtx data_access; emit_move_insn (reg0, force_reg (SImode, operands[0])); - data_access = gen_rtx (MEM, SImode, operands[0]); + data_access = gen_rtx_MEM (SImode, operands[0]); RTX_UNCHANGING_P (data_access) = 1; operands[0] = copy_to_reg (data_access); } @@ -1723,7 +1714,7 @@ "" " { - rtx reg0 = gen_rtx (REG, SImode, 0); + rtx reg0 = gen_rtx_REG (SImode, 0); rtx call_insn; if (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != CONST_INT) @@ -1747,7 +1738,7 @@ rtx data_access; emit_move_insn (reg0,force_reg (SImode, operands[1])); - data_access = gen_rtx (MEM, SImode, operands[1]); + data_access = gen_rtx_MEM (SImode, operands[1]); RTX_UNCHANGING_P (data_access) = 1; operands[1] = copy_to_reg (data_access); } @@ -1977,8 +1968,7 @@ result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, SFmode), - GEN_INT (0x80000000), - target, 0, OPTAB_WIDEN); + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -2011,8 +2001,7 @@ start_sequence (); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, DFmode), - GEN_INT (0x80000000), - target, 0, OPTAB_WIDEN); + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 700fd3eaea0..2594863de85 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -2199,8 +2199,8 @@ expand_block_move (operands) } else { - src_addr = gen_rtx_PLUS (Pmode, src_reg, GEN_INT (offset)); - dest_addr = gen_rtx_PLUS (Pmode, dest_reg, GEN_INT (offset)); + src_addr = plus_constant (src_reg, offset); + dest_addr = plus_constant (dest_reg, offset); } /* Generate the appropriate load and store, saving the stores for later */ @@ -3675,7 +3675,8 @@ rs6000_stack_info () if (TARGET_EABI) #endif { - if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0 + if (0 == strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), + "main") && DECL_CONTEXT (current_function_decl) == NULL_TREE) { info_ptr->main_p = 1; @@ -5594,7 +5595,8 @@ rs6000_initialize_trampoline (addr, fnaddr, cxt) /* Macros to shorten the code expansions below. */ #define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr)) -#define MEM_PLUS(addr,offset) gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset))) +#define MEM_PLUS(addr,offset) \ + gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset))) /* Under AIX, just build the 3 word function descriptor */ case ABI_AIX: diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 643193e219c..db1108417f0 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -1368,8 +1368,8 @@ extern int rs6000_sysv_varargs_p; assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx_REG (MODE, \ - GET_MODE_CLASS (MODE) == MODE_FLOAT && TARGET_HARD_FLOAT ? 33 : 3) + gen_rtx_REG (MODE, (GET_MODE_CLASS (MODE) == MODE_FLOAT \ + && TARGET_HARD_FLOAT ? 33 : 3)) /* The definition of this macro implies that there are cases where a scalar value cannot be returned in registers. @@ -1718,10 +1718,13 @@ typedef struct rs6000_args ((count == -1) \ ? gen_rtx_REG (Pmode, 65) \ : gen_rtx_MEM (Pmode, \ - memory_address (Pmode, \ - plus_constant (copy_to_reg (gen_rtx_MEM (Pmode, \ - memory_address (Pmode, frame))), \ - RETURN_ADDRESS_OFFSET)))) + memory_address \ + (Pmode, \ + plus_constant (copy_to_reg \ + (gen_rtx_MEM (Pmode, \ + memory_address (Pmode, \ + frame))), \ + RETURN_ADDRESS_OFFSET)))) /* Definitions for register eliminations. @@ -1998,7 +2001,7 @@ typedef struct rs6000_args if (low_int & 0x8000) \ high_int += 0x10000, low_int |= ((HOST_WIDE_INT) -1) << 16; \ sum = force_operand (gen_rtx_PLUS (Pmode, XEXP (X, 0), \ - GEN_INT (high_int)), 0); \ + GEN_INT (high_int)), 0); \ (X) = gen_rtx_PLUS (Pmode, sum, GEN_INT (low_int)); \ goto WIN; \ } \ @@ -2009,7 +2012,7 @@ typedef struct rs6000_args && (MODE) != TImode) \ { \ (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ - force_reg (Pmode, force_operand (XEXP (X, 1), 0))); \ + force_reg (Pmode, force_operand (XEXP (X, 1), 0))); \ goto WIN; \ } \ else if (TARGET_ELF && TARGET_32BIT && TARGET_NO_TOC \ @@ -3107,7 +3110,7 @@ do { \ /* This is how to output an element of a case-vector that is relative. */ -#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)\ +#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ do { char buf[100]; \ fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", FILE); \ ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \ diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 5be4c710f42..54e62060d2b 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4318,11 +4318,12 @@ else indx = stack_pointer_rtx; - operands[2] = gen_rtx_MEM (SImode, - gen_rtx_PLUS (Pmode, - indx, - GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - 0x8000) - + ((WORDS_BIG_ENDIAN != 0) * 4)))); + operands[2] + = gen_rtx_MEM (SImode, + plus_constant (indx, + (((rs6000_fpmem_offset & 0xffff) ^ 0x8000) + - 0x8000) + + ((WORDS_BIG_ENDIAN != 0) * 4))); return \"{st|stw} %0,%2\"; }" @@ -4345,11 +4346,12 @@ else indx = stack_pointer_rtx; - operands[2] = gen_rtx_MEM (SImode, - gen_rtx_PLUS (Pmode, - indx, - GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - 0x8000) - + ((WORDS_BIG_ENDIAN == 0) * 4)))); + operands[2] + = gen_rtx_MEM (SImode, + plus_constant (indx, + (((rs6000_fpmem_offset & 0xffff) ^ 0x8000) + - 0x8000) + + ((WORDS_BIG_ENDIAN == 0) * 4))); return \"{st|stw} %0,%2\"; }" @@ -4375,8 +4377,7 @@ else indx = stack_pointer_rtx; - operands[2] = gen_rtx_MEM (SImode, - gen_rtx_PLUS (Pmode, indx, GEN_INT (offset))); + operands[2] = gen_rtx_MEM (SImode, plus_constant (indx, offset)); return \"lfd %0,%2\"; }" @@ -4449,10 +4450,9 @@ indx = stack_pointer_rtx; operands[2] = gen_rtx_MEM (DFmode, - gen_rtx_PLUS (Pmode, - indx, - GEN_INT ((((rs6000_fpmem_offset & 0xffff) - ^ 0x8000) - 0x8000)))); + plus_constant (indx, + (((rs6000_fpmem_offset & 0xffff) + ^ 0x8000) - 0x8000))); return \"stfd %0,%2\"; }" @@ -4474,11 +4474,12 @@ else indx = stack_pointer_rtx; - operands[2] = gen_rtx_MEM (DFmode, - gen_rtx_PLUS (Pmode, - indx, - GEN_INT ((((rs6000_fpmem_offset & 0xffff) ^ 0x8000) - 0x8000) - + ((WORDS_BIG_ENDIAN) ? 4 : 0)))); + operands[2] + = gen_rtx_MEM (DFmode, + plus_constant (indx, + (((rs6000_fpmem_offset & 0xffff) ^ 0x8000) + - 0x8000) + + ((WORDS_BIG_ENDIAN) ? 4 : 0))); return \"{l|lwz} %0,%2\"; }" @@ -4507,7 +4508,7 @@ rtx last = XVECEXP (insns, 0, XVECLEN (insns, 0) - 1); REG_NOTES (first) = gen_rtx_INSN_LIST (REG_LIBCALL, last, - REG_NOTES (first)); + REG_NOTES (first)); REG_NOTES (last) = gen_rtx_INSN_LIST (REG_RETVAL, first, REG_NOTES (last)); emit_insn (insns); @@ -6015,7 +6016,8 @@ while (*name == '.') name++; new_ref = gen_rtx_SYMBOL_REF (Pmode, name); - CONSTANT_POOL_ADDRESS_P (new_ref) = CONSTANT_POOL_ADDRESS_P (operands[1]); + CONSTANT_POOL_ADDRESS_P (new_ref) + = CONSTANT_POOL_ADDRESS_P (operands[1]); SYMBOL_REF_FLAG (new_ref) = SYMBOL_REF_FLAG (operands[1]); SYMBOL_REF_USED (new_ref) = SYMBOL_REF_USED (operands[1]); operands[1] = new_ref; @@ -7198,8 +7200,8 @@ for (i = 0; i < count; i++) XVECEXP (operands[3], 0, i) = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regno + i), - change_address (operands[1], SImode, - plus_constant (from, i * 4))); + change_address (operands[1], SImode, + plus_constant (from, i * 4))); }") (define_insn "" @@ -7293,16 +7295,16 @@ XVECEXP (operands[3], 0, 0) = gen_rtx_SET (VOIDmode, change_address (operands[0], SImode, to), - operands[1]); + operands[1]); XVECEXP (operands[3], 0, 1) = gen_rtx_CLOBBER (VOIDmode, - gen_rtx_SCRATCH (SImode)); + gen_rtx_SCRATCH (SImode)); for (i = 1; i < count; i++) XVECEXP (operands[3], 0, i + 1) = gen_rtx_SET (VOIDmode, - change_address (operands[0], SImode, - plus_constant (to, i * 4)), - gen_rtx_REG (SImode, regno + i)); + change_address (operands[0], SImode, + plus_constant (to, i * 4)), + gen_rtx_REG (SImode, regno + i)); }") (define_insn "" @@ -7874,7 +7876,8 @@ && (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) > 4096)) { rtx tmp = gen_reg_rtx (Pmode); - emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__allocate_stack\"), + emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, + \"__allocate_stack\"), tmp, 0, Pmode, 1, operands[1], Pmode); emit_insn (gen_set_sp (tmp)); emit_move_insn (operands[0], tmp); @@ -7962,7 +7965,8 @@ /* Copy the backchain to the first word, sp to the second. */ emit_move_insn (temp, gen_rtx_MEM (Pmode, operands[1])); - emit_move_insn (operand_subword (operands[0], 0, 0, (TARGET_32BIT ? DImode : TImode)), + emit_move_insn (operand_subword (operands[0], 0, 0, + (TARGET_32BIT ? DImode : TImode)), temp); emit_move_insn (operand_subword (operands[0], 1, 0, (TARGET_32BIT ? DImode : TImode)), operands[1]); @@ -7981,7 +7985,8 @@ emit_move_insn (temp, operand_subword (operands[1], 0, 0, (TARGET_32BIT ? DImode : TImode))); emit_move_insn (operands[0], - operand_subword (operands[1], 1, 0, (TARGET_32BIT ? DImode : TImode))); + operand_subword (operands[1], 1, 0, + (TARGET_32BIT ? DImode : TImode))); emit_move_insn (gen_rtx_MEM (Pmode, operands[0]), temp); DONE; }") @@ -8201,7 +8206,8 @@ if (DEFAULT_ABI == ABI_AIX) { - /* AIX function pointers are really pointers to a three word area */ + /* AIX function pointers are really pointers to a three word + area. */ rtx static_chain = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); emit_call_insn (TARGET_32BIT ? gen_call_indirect_aix32 (force_reg (Pmode, operands[0]), @@ -8263,7 +8269,8 @@ if (DEFAULT_ABI == ABI_AIX) { - /* AIX function pointers are really pointers to a three word area */ + /* AIX function pointers are really pointers to a three word + area. */ rtx static_chain = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM); emit_call_insn (TARGET_32BIT ? gen_call_value_indirect_aix32 (operands[0], @@ -8655,7 +8662,7 @@ " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; operands[1] = gen_rtx_COMPARE (mode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8670,7 +8677,7 @@ " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; operands[1] = gen_rtx_COMPARE (mode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8685,7 +8692,7 @@ " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; operands[1] = gen_rtx_COMPARE (mode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8700,7 +8707,7 @@ " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; operands[1] = gen_rtx_COMPARE (mode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8715,7 +8722,7 @@ " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; operands[1] = gen_rtx_COMPARE (mode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8730,7 +8737,7 @@ " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; operands[1] = gen_rtx_COMPARE (mode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8744,7 +8751,7 @@ "" " { operands[1] = gen_rtx_COMPARE (CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8758,7 +8765,7 @@ "" " { operands[1] = gen_rtx_COMPARE (CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8772,7 +8779,7 @@ "" " { operands[1] = gen_rtx_COMPARE (CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8786,7 +8793,7 @@ "" " { operands[1] = gen_rtx_COMPARE (CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8803,7 +8810,7 @@ " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; operands[1] = gen_rtx_COMPARE (mode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8817,7 +8824,7 @@ FAIL; operands[1] = gen_rtx_COMPARE (CCFPmode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCFPmode); }") @@ -8834,7 +8841,7 @@ FAIL; operands[1] = gen_rtx_COMPARE (mode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8851,7 +8858,7 @@ FAIL; operands[1] = gen_rtx_COMPARE (mode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8863,7 +8870,7 @@ " { enum machine_mode mode = rs6000_compare_fp_p ? CCFPmode : CCmode; operands[1] = gen_rtx_COMPARE (mode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8880,7 +8887,7 @@ FAIL; operands[1] = gen_rtx_COMPARE (mode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (mode); }") @@ -8891,7 +8898,7 @@ "" " { operands[1] = gen_rtx_COMPARE (CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8902,7 +8909,7 @@ "" " { operands[1] = gen_rtx_COMPARE (CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8913,7 +8920,7 @@ "" " { operands[1] = gen_rtx_COMPARE (CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -8924,7 +8931,7 @@ "" " { operands[1] = gen_rtx_COMPARE (CCUNSmode, - rs6000_compare_op0, rs6000_compare_op1); + rs6000_compare_op0, rs6000_compare_op1); operands[2] = gen_reg_rtx (CCUNSmode); }") @@ -10368,7 +10375,7 @@ "TARGET_32BIT" " { operands[0] = force_reg (SImode, operands[0]); - operands[2] = force_reg (SImode, gen_rtx_LABEL_REF (VOIDmode, operands[1])); + operands[2] = force_reg (SImode, gen_rtx_LABEL_REF (SImode, operands[1])); operands[3] = gen_reg_rtx (SImode); }") @@ -10381,7 +10388,7 @@ "TARGET_64BIT" " { operands[0] = force_reg (DImode, operands[0]); - operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (VOIDmode, operands[1])); + operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (SImode, operands[1])); operands[3] = gen_reg_rtx (DImode); }") diff --git a/gcc/config/rs6000/xm-sysv4.h b/gcc/config/rs6000/xm-sysv4.h index 181f8b7d818..46d1ddd8e54 100644 --- a/gcc/config/rs6000/xm-sysv4.h +++ b/gcc/config/rs6000/xm-sysv4.h @@ -1,6 +1,5 @@ /* Configuration for GNU C-compiler for PowerPC running System V.4. - Copyright (C) 1995, 1998 Free Software Foundation, Inc. - + Copyright (C) 1995, 1998, 1999 Free Software Foundation, Inc. Cloned from sparc/xm-sysv4.h by Michael Meissner (meissner@cygnus.com). This file is part of GNU CC. @@ -59,12 +58,3 @@ extern char *alloca (); #undef ONLY_INT_FIELDS #define ONLY_INT_FIELDS #endif - -#ifdef __PPC__ -#ifndef __STDC__ -extern char *malloc (), *realloc (), *calloc (); -#else -extern void *malloc (), *realloc (), *calloc (); -#endif -extern void free (); -#endif diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index d9d39c1a8cb..c6c28cdb687 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -1,5 +1,7 @@ /* Output routines for GCC for Hitachi Super-H. - Copyright (C) 1993-1998 Free Software Foundation, Inc. + Copyright (C) 1993-1998, 1999 Free Software Foundation, Inc. + Contributed by Steve Chamberlain (sac@cygnus.com). + Improved by Jim Wilson (wilson@cygnus.com). This file is part of GNU CC. @@ -18,13 +20,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -/* Contributed by Steve Chamberlain (sac@cygnus.com). - Improved by Jim Wilson (wilson@cygnus.com). */ - #include "config.h" - -#include <stdio.h> - +#include "system.h" #include "rtl.h" #include "tree.h" #include "flags.h" @@ -392,16 +389,16 @@ expand_block_move (operands) char entry[30]; tree entry_name; rtx func_addr_rtx; - rtx r4 = gen_rtx (REG, SImode, 4); - rtx r5 = gen_rtx (REG, SImode, 5); + rtx r4 = gen_rtx_REG (SImode, 4); + rtx r5 = gen_rtx_REG (SImode, 5); sprintf (entry, "__movstrSI%d", bytes); entry_name = get_identifier (entry); func_addr_rtx = copy_to_mode_reg (Pmode, - gen_rtx (SYMBOL_REF, Pmode, - IDENTIFIER_POINTER (entry_name))); + gen_rtx_SYMBOL_REF + (Pmode, IDENTIFIER_POINTER (entry_name))); force_into (XEXP (operands[0], 0), r4); force_into (XEXP (operands[1], 0), r5); emit_insn (gen_block_move_real (func_addr_rtx)); @@ -415,15 +412,15 @@ expand_block_move (operands) tree entry_name; rtx func_addr_rtx; int final_switch, while_loop; - rtx r4 = gen_rtx (REG, SImode, 4); - rtx r5 = gen_rtx (REG, SImode, 5); - rtx r6 = gen_rtx (REG, SImode, 6); + rtx r4 = gen_rtx_REG (SImode, 4); + rtx r5 = gen_rtx_REG (SImode, 5); + rtx r6 = gen_rtx_REG (SImode, 6); entry_name = get_identifier ("__movstr"); func_addr_rtx = copy_to_mode_reg (Pmode, - gen_rtx (SYMBOL_REF, Pmode, - IDENTIFIER_POINTER (entry_name))); + gen_rtx_SYMBOL_REF + (Pmode, IDENTIFIER_POINTER (entry_name))); force_into (XEXP (operands[0], 0), r4); force_into (XEXP (operands[1], 0), r5); @@ -478,7 +475,7 @@ rtx prepare_scc_operands (code) enum rtx_code code; { - rtx t_reg = gen_rtx (REG, SImode, T_REG); + rtx t_reg = gen_rtx_REG (SImode, T_REG); enum rtx_code oldcode = code; enum machine_mode mode; @@ -562,9 +559,10 @@ from_compare (operands, code) insn = gen_ieee_ccmpeqsf_t (sh_compare_op0, sh_compare_op1); } else - insn = gen_rtx (SET, VOIDmode, - gen_rtx (REG, SImode, 18), - gen_rtx (code, SImode, sh_compare_op0, sh_compare_op1)); + insn = gen_rtx_SET (VOIDmode, + gen_rtx_REG (SImode, 18), + gen_rtx (code, SImode, sh_compare_op0, + sh_compare_op1)); if (TARGET_SH4 && GET_MODE_CLASS (mode) == MODE_FLOAT) { insn = gen_rtx (PARALLEL, VOIDmode, @@ -711,7 +709,7 @@ output_far_jump (insn, op) if (dbr_sequence_length ()) print_slot (final_sequence); - this.reg = gen_rtx (REG, SImode, 13); + this.reg = gen_rtx_REG (SImode, 13); output_asm_insn ("mov.l r13,@-r15", 0); output_asm_insn (jump, &this.lab); output_asm_insn ("mov.l @r15+,r13", 0); @@ -1218,13 +1216,13 @@ expand_ashiftrt (operands) wrk = gen_reg_rtx (Pmode); /* Load the value into an arg reg and call a helper. */ - emit_move_insn (gen_rtx (REG, SImode, 4), operands[1]); + emit_move_insn (gen_rtx_REG (SImode, 4), operands[1]); sprintf (func, "__ashiftrt_r4_%d", value); func_name = get_identifier (func); - emit_move_insn (wrk, gen_rtx (SYMBOL_REF, Pmode, - IDENTIFIER_POINTER (func_name))); + emit_move_insn (wrk, gen_rtx_SYMBOL_REF (Pmode, + IDENTIFIER_POINTER (func_name))); emit_insn (gen_ashrsi3_n (GEN_INT (value), wrk)); - emit_move_insn (operands[0], gen_rtx (REG, SImode, 4)); + emit_move_insn (operands[0], gen_rtx_REG (SImode, 4)); return 1; } @@ -2559,7 +2557,7 @@ gen_block_redirect (jump, addr, need_block) if (dead) { - rtx reg = gen_rtx (REG, SImode, exact_log2 (dead & -dead)); + rtx reg = gen_rtx_REG (SImode, exact_log2 (dead & -dead)); /* It would be nice if we could convert the jump into an indirect jump / far branch right now, and thus exposing all constituent @@ -2767,8 +2765,8 @@ machine_dependent_reorg (first) { rtx insn, mova; int num_mova; - rtx r0_rtx = gen_rtx (REG, Pmode, 0); - rtx r0_inc_rtx = gen_rtx (POST_INC, Pmode, r0_rtx); + rtx r0_rtx = gen_rtx_REG (Pmode, 0); + rtx r0_inc_rtx = gen_rtx_POST_INC (Pmode, r0_rtx); /* If relaxing, generate pseudo-ops to associate function calls with the symbols they call. It does no harm to not generate these @@ -2973,10 +2971,10 @@ machine_dependent_reorg (first) or pseudo-op. */ label = gen_label_rtx (); - REG_NOTES (link) = gen_rtx (EXPR_LIST, REG_LABEL, label, - REG_NOTES (link)); - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_LABEL, label, - REG_NOTES (insn)); + REG_NOTES (link) = gen_rtx_EXPR_LIST (REG_LABEL, label, + REG_NOTES (link)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, label, + REG_NOTES (insn)); if (rescan) { scan = link; @@ -2990,8 +2988,8 @@ machine_dependent_reorg (first) && reg_mentioned_p (reg, scan)) || ((reg2 = sfunc_uses_reg (scan)) && REGNO (reg2) == REGNO (reg)))) - REG_NOTES (scan) = gen_rtx (EXPR_LIST, REG_LABEL, - label, REG_NOTES (scan)); + REG_NOTES (scan) + = gen_rtx_EXPR_LIST (REG_LABEL, label, REG_NOTES (scan)); } while (scan != dies); } @@ -3091,7 +3089,7 @@ machine_dependent_reorg (first) offset += SUBREG_WORD (dst); dst = SUBREG_REG (dst); } - dst = gen_rtx (REG, HImode, REGNO (dst) + offset); + dst = gen_rtx_REG (HImode, REGNO (dst) + offset); } if (GET_CODE (dst) == REG @@ -3145,11 +3143,11 @@ machine_dependent_reorg (first) else { lab = add_constant (src, mode, 0); - newsrc = gen_rtx (MEM, mode, - gen_rtx (LABEL_REF, VOIDmode, lab)); + newsrc = gen_rtx_MEM (mode, + gen_rtx_LABEL_REF (VOIDmode, lab)); } RTX_UNCHANGING_P (newsrc) = 1; - *patp = gen_rtx (SET, VOIDmode, dst, newsrc); + *patp = gen_rtx_SET (VOIDmode, dst, newsrc); INSN_CODE (scan) = -1; } } @@ -3564,7 +3562,7 @@ output_stack_adjust (size, reg, temp) to handle this case, so just abort when we see it. */ if (temp < 0) abort (); - const_reg = gen_rtx (REG, SImode, temp); + const_reg = gen_rtx_REG (SImode, temp); /* If SIZE is negative, subtract the positive value. This sometimes allows a constant pool entry to be shared @@ -3597,16 +3595,17 @@ push (rn) { if ((rn - FIRST_FP_REG) & 1 && rn <= LAST_FP_REG) return; - x = gen_push_4 (gen_rtx (REG, DFmode, rn)); + x = gen_push_4 (gen_rtx_REG (DFmode, rn)); } else if (TARGET_SH3E && rn >= FIRST_FP_REG && rn <= LAST_FP_REG) - x = gen_push_e (gen_rtx (REG, SFmode, rn)); + x = gen_push_e (gen_rtx_REG (SFmode, rn)); else - x = gen_push (gen_rtx (REG, SImode, rn)); + x = gen_push (gen_rtx_REG (SImode, rn)); x = emit_insn (x); - REG_NOTES (x) = gen_rtx (EXPR_LIST, REG_INC, - gen_rtx(REG, SImode, STACK_POINTER_REGNUM), 0); + REG_NOTES (x) + = gen_rtx_EXPR_LIST (REG_INC, + gen_rtx_REG (SImode, STACK_POINTER_REGNUM), 0); } /* Output RTL to pop register RN from the stack. */ @@ -3623,16 +3622,17 @@ pop (rn) { if ((rn - FIRST_FP_REG) & 1 && rn <= LAST_FP_REG) return; - x = gen_pop_4 (gen_rtx (REG, DFmode, rn)); + x = gen_pop_4 (gen_rtx_REG (DFmode, rn)); } else if (TARGET_SH3E && rn >= FIRST_FP_REG && rn <= LAST_FP_REG) - x = gen_pop_e (gen_rtx (REG, SFmode, rn)); + x = gen_pop_e (gen_rtx_REG (SFmode, rn)); else - x = gen_pop (gen_rtx (REG, SImode, rn)); + x = gen_pop (gen_rtx_REG (SImode, rn)); x = emit_insn (x); - REG_NOTES (x) = gen_rtx (EXPR_LIST, REG_INC, - gen_rtx(REG, SImode, STACK_POINTER_REGNUM), 0); + REG_NOTES (x) + = gen_rtx_EXPR_LIST (REG_INC, + gen_rtx_REG (SImode, STACK_POINTER_REGNUM), 0); } /* Generate code to push the regs specified in the mask. */ @@ -3904,9 +3904,10 @@ sh_builtin_saveregs () named args need not be saved. */ if (n_intregs > 0) move_block_from_reg (BASE_ARG_REG (SImode) + first_intreg, - gen_rtx (MEM, BLKmode, - plus_constant (XEXP (regbuf, 0), - n_floatregs * UNITS_PER_WORD)), + gen_rtx_MEM (BLKmode, + plus_constant (XEXP (regbuf, 0), + (n_floatregs + * UNITS_PER_WORD))), n_intregs, n_intregs * UNITS_PER_WORD); /* Save float args. @@ -3943,8 +3944,8 @@ sh_builtin_saveregs () for (regno = NPARM_REGS (SFmode) - 1; regno >= first_floatreg; regno--) { emit_insn (gen_addsi3 (fpregs, fpregs, GEN_INT (- UNITS_PER_WORD))); - emit_move_insn (gen_rtx (MEM, SFmode, fpregs), - gen_rtx (REG, SFmode, BASE_ARG_REG (SFmode) + regno)); + emit_move_insn (gen_rtx_MEM (SFmode, fpregs), + gen_rtx_REG (SFmode, BASE_ARG_REG (SFmode) + regno)); } /* Return the address of the regbuf. */ @@ -4085,8 +4086,8 @@ sh_valid_machine_decl_attribute (decl, attributes, attr, args) if (TREE_CODE (TREE_VALUE (args)) != STRING_CST) return 0; - sp_switch = gen_rtx (SYMBOL_REF, VOIDmode, - TREE_STRING_POINTER (TREE_VALUE (args))); + sp_switch = gen_rtx_SYMBOL_REF (VOIDmode, + TREE_STRING_POINTER (TREE_VALUE (args))); return 1; } diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index 949e2e714b6..dd802ab6f79 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler for Hitachi Super-H. - Copyright (C) 1993-1998 Free Software Foundation, Inc. + Copyright (C) 1993-1998, 1999 Free Software Foundation, Inc. Contributed by Steve Chamberlain (sac@cygnus.com). Improved by Jim Wilson (wilson@cygnus.com). @@ -923,7 +923,7 @@ extern enum reg_class reg_class_from_letter[]; /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, (MODE), BASE_RETURN_VALUE_REG (MODE)) + gen_rtx_REG ((MODE), BASE_RETURN_VALUE_REG (MODE)); /* 1 if N is a possible register number for a function value. */ #define FUNCTION_VALUE_REGNO_P(REGNO) \ @@ -1043,10 +1043,10 @@ struct sh_args { ((PASS_IN_REG_P ((CUM), (MODE), (TYPE)) \ && ((NAMED) \ || (! TARGET_HITACHI && (TARGET_SH3E || ! current_function_varargs)))) \ - ? gen_rtx (REG, (MODE), \ - ((BASE_ARG_REG (MODE) + ROUND_REG ((CUM), (MODE))) \ - ^ ((MODE) == SFmode && TARGET_SH4 \ - && TARGET_LITTLE_ENDIAN != 0))) \ + ? gen_rtx_REG ((MODE), \ + ((BASE_ARG_REG (MODE) + ROUND_REG ((CUM), (MODE))) \ + ^ ((MODE) == SFmode && TARGET_SH4 \ + && TARGET_LITTLE_ENDIAN != 0))) \ : 0) #define PRETEND_OUTGOING_VARARGS_NAMED (! TARGET_HITACHI) @@ -1129,13 +1129,13 @@ extern int current_function_anonymous_args; #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, (TRAMP)), \ + emit_move_insn (gen_rtx_MEM (SImode, (TRAMP)), \ GEN_INT (TARGET_LITTLE_ENDIAN ? 0xd301dd02 : 0xdd02d301));\ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 4)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 4)), \ GEN_INT (TARGET_LITTLE_ENDIAN ? 0x00094d2b : 0x4d2b0009));\ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 8)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \ (CXT)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 12)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \ (FNADDR)); \ if (TARGET_HARVARD) \ emit_insn (gen_ic_invalidate_line (TRAMP)); \ @@ -1148,7 +1148,7 @@ extern int current_function_anonymous_args; #define RETURN_ADDR_RTX(COUNT, FRAME) \ (((COUNT) == 0) \ - ? gen_rtx (MEM, Pmode, gen_rtx (REG, Pmode, RETURN_ADDRESS_POINTER_REGNUM)) \ + ? gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM)) \ : (rtx) 0) /* Generate necessary RTL for __builtin_saveregs(). */ @@ -1393,7 +1393,7 @@ extern struct rtx_def *sh_builtin_saveregs (); GEN_INT (offset_base), NULL_RTX, 0, \ OPTAB_LIB_WIDEN); \ \ - (X) = gen_rtx (PLUS, Pmode, sum, GEN_INT (offset - offset_base)); \ + (X) = gen_rtx_PLUS (Pmode, sum, GEN_INT (offset - offset_base)); \ goto WIN; \ } \ } \ diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 38732e65256..ac3d3b0a6f4 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -706,10 +706,12 @@ " { rtx high0, high2, low0 = gen_lowpart (SImode, operands[0]); - high0 = gen_rtx (REG, SImode, - true_regnum (operands[0]) + (TARGET_LITTLE_ENDIAN ? 1 : 0)); - high2 = gen_rtx (REG, SImode, - true_regnum (operands[2]) + (TARGET_LITTLE_ENDIAN ? 1 : 0)); + high0 = gen_rtx_REG (SImode, + true_regnum (operands[0]) + + (TARGET_LITTLE_ENDIAN ? 1 : 0)); + high2 = gen_rtx_REG (SImode, + true_regnum (operands[2]) + + (TARGET_LITTLE_ENDIAN ? 1 : 0)); emit_insn (gen_clrt ()); emit_insn (gen_addc (low0, low0, gen_lowpart (SImode, operands[2]))); emit_insn (gen_addc1 (high0, high0, high2)); @@ -770,10 +772,12 @@ " { rtx high0, high2, low0 = gen_lowpart (SImode, operands[0]); - high0 = gen_rtx (REG, SImode, - true_regnum (operands[0]) + (TARGET_LITTLE_ENDIAN ? 1 : 0)); - high2 = gen_rtx (REG, SImode, - true_regnum (operands[2]) + (TARGET_LITTLE_ENDIAN ? 1 : 0)); + high0 = gen_rtx_REG (SImode, + true_regnum (operands[0]) + + (TARGET_LITTLE_ENDIAN ? 1 : 0)); + high2 = gen_rtx_REG (SImode, + true_regnum (operands[2]) + + (TARGET_LITTLE_ENDIAN ? 1 : 0)); emit_insn (gen_clrt ()); emit_insn (gen_subc (low0, low0, gen_lowpart (SImode, operands[2]))); emit_insn (gen_subc1 (high0, high0, high2)); @@ -1152,9 +1156,9 @@ emit_insn (gen_mulsidi3_i (operands[1], operands[2])); - emit_insn (gen_rtx (CLOBBER, VOIDmode, operands[0])); - emit_move_insn (low_dst, gen_rtx (REG, SImode, 21)); - emit_move_insn (high_dst, gen_rtx (REG, SImode, 20)); + emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); + emit_move_insn (low_dst, gen_rtx_REG (SImode, 21)); + emit_move_insn (high_dst, gen_rtx_REG (SImode, 20)); DONE; } }") @@ -1185,9 +1189,9 @@ emit_insn (gen_umulsidi3_i (operands[1], operands[2])); - emit_insn (gen_rtx (CLOBBER, VOIDmode, operands[0])); - emit_move_insn (low_dst, gen_rtx (REG, SImode, 21)); - emit_move_insn (high_dst, gen_rtx (REG, SImode, 20)); + emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0])); + emit_move_insn (low_dst, gen_rtx_REG (SImode, 21)); + emit_move_insn (high_dst, gen_rtx_REG (SImode, 20)); DONE; } }") @@ -2755,7 +2759,7 @@ emit_move_insn (operands[2], const_int); emit_move_insn (operands[0], change_address (operands[1], VOIDmode, - gen_rtx (PLUS, SImode, reg, operands[2]))); + gen_rtx_PLUS (SImode, reg, operands[2]))); DONE; }") @@ -2780,7 +2784,7 @@ FAIL; emit_move_insn (operands[2], const_int); emit_move_insn (change_address (operands[1], VOIDmode, - gen_rtx (PLUS, SImode, reg, operands[2])), + gen_rtx_PLUS (SImode, reg, operands[2])), operands[0]); DONE; }") @@ -3463,7 +3467,7 @@ { if (TARGET_IEEE) { - rtx t_reg = gen_rtx (REG, SImode, T_REG); + rtx t_reg = gen_rtx_REG (SImode, T_REG); rtx lab = gen_label_rtx (); prepare_scc_operands (EQ); emit_jump_insn (gen_branch_true (lab)); @@ -4394,14 +4398,14 @@ addr_target = copy_addr_to_reg (plus_constant (orig_address, size - 1)); operands[0] = change_address (operands[0], QImode, addr_target); - emit_insn (gen_movqi (operands[0], gen_rtx (SUBREG, QImode, shift_reg, 0))); + emit_insn (gen_movqi (operands[0], gen_rtx_SUBREG (QImode, shift_reg, 0))); while (size -= 1) { emit_insn (gen_lshrsi3_k (shift_reg, shift_reg, GEN_INT (8))); emit_insn (gen_addsi3 (addr_target, addr_target, GEN_INT (-1))); emit_insn (gen_movqi (operands[0], - gen_rtx (SUBREG, QImode, shift_reg, 0))); + gen_rtx_SUBREG (QImode, shift_reg, 0))); } DONE; diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index d113248b808..43583b738e6 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -1195,15 +1195,14 @@ extern int sparc_mode_class[]; #define STRUCT_VALUE \ (TARGET_ARCH64 \ ? 0 \ - : gen_rtx_MEM (Pmode, \ - gen_rtx_PLUS (Pmode, stack_pointer_rtx, \ - GEN_INT (STRUCT_VALUE_OFFSET)))) + : gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \ + STRUCT_VALUE_OFFSET))) + #define STRUCT_VALUE_INCOMING \ - (TARGET_ARCH64 \ - ? 0 \ - : gen_rtx_MEM (Pmode, \ - gen_rtx_PLUS (Pmode, frame_pointer_rtx, \ - GEN_INT (STRUCT_VALUE_OFFSET)))) + (TARGET_ARCH64 \ + ? 0 \ + : gen_rtx_MEM (Pmode, plus_constant (frame_pointer_rtx, \ + STRUCT_VALUE_OFFSET))) /* Define the classes of registers for register constraints in the machine description. Also define ranges of constants. @@ -1497,8 +1496,8 @@ extern char leaf_reg_remap[]; #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \ (get_frame_size () == 0 \ ? assign_stack_local (MODE, GET_MODE_SIZE (MODE), 0) \ - : gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, frame_pointer_rtx, \ - GEN_INT (STARTING_FRAME_OFFSET)))) + : gen_rtx_MEM (MODE, plus_constant (frame_pointer_rtx, \ + STARTING_FRAME_OFFSET))) /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on v9 because the movsi and movsf patterns don't handle r/f moves. @@ -2076,8 +2075,7 @@ extern struct rtx_def *sparc_builtin_saveregs (); return an rtx for the address of the word in the frame that holds the dynamic chain--the previous frame's address. ??? -mflat support? */ -#define DYNAMIC_CHAIN_ADDRESS(frame) \ - gen_rtx_PLUS (Pmode, frame, GEN_INT (14 * UNITS_PER_WORD)) +#define DYNAMIC_CHAIN_ADDRESS(frame) plus_constant (frame, 14 * UNITS_PER_WORD) /* The return address isn't on the stack, it is in a register, so we can't access it from the current frame pointer. We can access it from the @@ -2098,14 +2096,15 @@ extern struct rtx_def *sparc_builtin_saveregs (); ((count == -1) \ ? gen_rtx_REG (Pmode, 31) \ : gen_rtx_MEM (Pmode, \ - memory_address (Pmode, plus_constant (frame, 15 * UNITS_PER_WORD)))) + memory_address (Pmode, plus_constant (frame, \ + 15 * UNITS_PER_WORD)))) /* Before the prologue, the return address is %o7 + 8. OK, sometimes it's +12, but always using +8 is close enough for frame unwind purposes. Actually, just using %o7 is close enough for unwinding, but %o7+8 is something you can return to. */ #define INCOMING_RETURN_ADDR_RTX \ - gen_rtx_PLUS (word_mode, gen_rtx_REG (word_mode, 15), GEN_INT (8)) + plus_constant (gen_rtx_REG (word_mode, 15), 8) /* The offset from the incoming value of %sp to the top of the stack frame for the current function. On sparc64, we have to account for the stack @@ -2389,25 +2388,25 @@ extern struct rtx_def *legitimize_pic_address (); { rtx sparc_x = (X); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ (X) = gen_rtx_PLUS (Pmode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), NULL_RTX)); \ + force_operand (XEXP (X, 0), NULL_RTX)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), NULL_RTX)); \ + force_operand (XEXP (X, 1), NULL_RTX)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \ (X) = gen_rtx_PLUS (Pmode, force_operand (XEXP (X, 0), NULL_RTX),\ - XEXP (X, 1)); \ + XEXP (X, 1)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \ (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), NULL_RTX)); \ + force_operand (XEXP (X, 1), NULL_RTX)); \ if (sparc_x != (X) && memory_address_p (MODE, X)) \ goto WIN; \ if (flag_pic) (X) = legitimize_pic_address (X, MODE, 0); \ else if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \ - copy_to_mode_reg (Pmode, XEXP (X, 1))); \ + copy_to_mode_reg (Pmode, XEXP (X, 1))); \ else if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \ (X) = gen_rtx_PLUS (Pmode, XEXP (X, 1), \ - copy_to_mode_reg (Pmode, XEXP (X, 0))); \ + copy_to_mode_reg (Pmode, XEXP (X, 0))); \ else if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \ || GET_CODE (X) == LABEL_REF) \ (X) = copy_to_suggested_reg (X, NULL_RTX, Pmode); \ diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index eff6b2939ad..c51e25cac2f 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -2421,7 +2421,9 @@ (define_insn "*sethi_di_medlow_embmedany_pic" [(set (match_operand:DI 0 "register_operand" "=r") - (high:DI (match_operand:DI 1 "sp64_medium_pic_operand" "")))] + (high:DI (match_operand:DI 1 "sp64_medium_pic_operand" ""))) + ;; The clobber is here because emit_move_sequence assumes the worst case. + (clobber (reg:DI 1))] "(TARGET_CM_MEDLOW || TARGET_CM_EMBMEDANY) && check_pic (1)" "sethi\\t%%hi(%a1), %0" [(set_attr "type" "move") @@ -2430,6 +2432,8 @@ (define_insn "*sethi_di_medlow" [(set (match_operand:DI 0 "register_operand" "=r") (high:DI (match_operand:DI 1 "symbolic_operand" "")))] + ;; The clobber is here because emit_move_sequence assumes the worst case. + (clobber (reg:DI 1))] "TARGET_CM_MEDLOW && check_pic (1)" "sethi\\t%%hi(%a1), %0" [(set_attr "type" "move") @@ -3954,8 +3958,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_16)); emit_insn (gen_lshrsi3 (operand0, temp, shift_16)); DONE; @@ -4033,8 +4036,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, - op1_subword), + emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, op1_subword), shift_48)); emit_insn (gen_lshrdi3 (operand0, temp, shift_48)); DONE; @@ -4214,8 +4216,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_16)); emit_insn (gen_ashrsi3 (operand0, temp, shift_16)); DONE; @@ -4250,8 +4251,7 @@ op0_subword = SUBREG_WORD (operand0); operand0 = XEXP (operand0, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_24)); if (GET_MODE (operand0) != SImode) operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subword); @@ -4283,8 +4283,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, - op1_subword), + emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword), shift_24)); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); DONE; @@ -4314,8 +4313,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, - op1_subword), + emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, op1_subword), shift_56)); emit_insn (gen_ashrdi3 (operand0, temp, shift_56)); DONE; @@ -4345,8 +4343,7 @@ operand1 = XEXP (operand1, 0); } - emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, - op1_subword), + emit_insn (gen_ashldi3 (temp, gen_rtx_SUBREG (DImode, operand1, op1_subword), shift_48)); emit_insn (gen_ashrdi3 (operand0, temp, shift_48)); DONE; @@ -6280,11 +6277,14 @@ { if (! TARGET_ARCH64) { - emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, - gen_rtx_SET (VOIDmode, operand0, - gen_rtx_NEG (DImode, operand1)), - gen_rtx_CLOBBER (VOIDmode, - gen_rtx_REG (CCmode, SPARC_ICC_REG))))); + emit_insn (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_SET (VOIDmode, operand0, + gen_rtx_NEG (DImode, operand1)), + gen_rtx_CLOBBER (VOIDmode, + gen_rtx_REG (CCmode, + SPARC_ICC_REG))))); DONE; } }") @@ -7407,21 +7407,19 @@ if (! TARGET_ARCH64 && INTVAL (operands[3]) != 0) emit_jump_insn - (gen_rtx_PARALLEL (VOIDmode, - gen_rtvec (3, - gen_rtx_SET (VOIDmode, pc_rtx, - XEXP (operands[0], 0)), - GEN_INT (INTVAL (operands[3]) & 0xfff), - gen_rtx_CLOBBER (VOIDmode, - gen_rtx_REG (Pmode, 15))))); + (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (3, + gen_rtx_SET (VOIDmode, pc_rtx, XEXP (operands[0], 0)), + GEN_INT (INTVAL (operands[3]) & 0xfff), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 15))))); else emit_jump_insn - (gen_rtx_PARALLEL (VOIDmode, - gen_rtvec (2, - gen_rtx_SET (VOIDmode, pc_rtx, - XEXP (operands[0], 0)), - gen_rtx_CLOBBER (VOIDmode, - gen_rtx_REG (Pmode, 15))))); + (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_SET (VOIDmode, pc_rtx, XEXP (operands[0], 0)), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 15))))); goto finish_call; } @@ -7441,17 +7439,17 @@ if (! TARGET_ARCH64 && INTVAL (operands[3]) != 0) emit_call_insn - (gen_rtx_PARALLEL (VOIDmode, - gen_rtvec (3, gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx), - GEN_INT (INTVAL (operands[3]) & 0xfff), - gen_rtx_CLOBBER (VOIDmode, - gen_rtx_REG (Pmode, 15))))); + (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (3, gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx), + GEN_INT (INTVAL (operands[3]) & 0xfff), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 15))))); else emit_call_insn - (gen_rtx_PARALLEL (VOIDmode, - gen_rtvec (2, gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx), - gen_rtx_CLOBBER (VOIDmode, - gen_rtx_REG (Pmode, 15))))); + (gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx), + gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 15))))); finish_call: #if 0 @@ -7583,7 +7581,7 @@ vec = gen_rtvec (2, gen_rtx_SET (VOIDmode, operands[0], - gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx)), + gen_rtx_CALL (VOIDmode, fn_rtx, nregs_rtx)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 15))); emit_call_insn (gen_rtx_PARALLEL (VOIDmode, vec)); @@ -7935,6 +7933,7 @@ ; [(set_attr "type" "multi") ; (set_attr "length" "4")]) + ;; Peepholes go at the end. diff --git a/gcc/config/spur/spur.c b/gcc/config/spur/spur.c index 62453f2af97..5c4024379e8 100644 --- a/gcc/config/spur/spur.c +++ b/gcc/config/spur/spur.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for SPUR. Adapted from routines for the Motorola 68000 family. - Copyright (C) 1988, 1991, 1997 Free Software Foundation, Inc. + Copyright (C) 1988, 1991, 1997, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -140,14 +140,14 @@ output_move_double (operands) operands in OPERANDS to be suitable for the low-numbered word. */ if (optype0 == REGOP) - latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (optype0 == OFFSOP) latehalf[0] = adj_offsettable_operand (operands[0], 4); else latehalf[0] = operands[0]; if (optype1 == REGOP) - latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (optype1 == OFFSOP) latehalf[1] = adj_offsettable_operand (operands[1], 4); else if (optype1 == CNSTOP) @@ -224,7 +224,7 @@ output_fp_move_double (operands) { rtx xoperands[2]; int offset = - get_frame_size () - 8; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); xoperands[0] = GEN_INT (offset + 4); output_asm_insn ("st_32 %1,r25,%0", xoperands); xoperands[1] = operands[1]; @@ -247,7 +247,7 @@ output_fp_move_double (operands) output_asm_insn ("st_dbl %1,r25,%0", xoperands); xoperands[1] = operands[0]; output_asm_insn ("ld_32 %1,r25,%0\n\tnop", xoperands); - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xoperands[0] = GEN_INT (offset + 4); output_asm_insn ("ld_32 %1,r25,%0\n\tnop", xoperands); return ""; diff --git a/gcc/config/spur/spur.h b/gcc/config/spur/spur.h index 3ce499ef9de..3c893d49466 100644 --- a/gcc/config/spur/spur.h +++ b/gcc/config/spur/spur.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for SPUR chip. - Copyright (C) 1988, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1988, 1995, 1996, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -355,17 +355,17 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES }; /* On SPUR the value is found in the second "output" register. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 27) + gen_rtx_REG (TYPE_MODE (VALTYPE), 27) /* But the called function leaves it in the second "input" register. */ #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 11) + gen_rtx_REG (TYPE_MODE (VALTYPE), 11) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 27) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 27) /* 1 if N is a possible register number for a function value as seen by the caller. @@ -449,7 +449,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES }; + ((MODE) == BLKmode \ ? (int_size_in_bytes (TYPE) + 3) / 4 \ : (GET_MODE_SIZE (MODE) + 3) / 4)) \ - ? gen_rtx (REG, (MODE), 27 + (CUM)) \ + ? gen_rtx_REG ((MODE), 27 + (CUM)) \ : 0) /* Define where a function finds its arguments. @@ -460,7 +460,7 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES }; + ((MODE) == BLKmode \ ? (int_size_in_bytes (TYPE) + 3) / 4 \ : (GET_MODE_SIZE (MODE) + 3) / 4)) \ - ? gen_rtx (REG, (MODE), 11 + (CUM)) \ + ? gen_rtx_REG ((MODE), 11 + (CUM)) \ : 0) /* For an arg passed partly in registers and partly in memory, @@ -708,17 +708,17 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES }; #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ { if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - copy_to_mode_reg (SImode, XEXP (X, 1))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + copy_to_mode_reg (SImode, XEXP (X, 1))); \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - copy_to_mode_reg (SImode, XEXP (X, 0))); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + copy_to_mode_reg (SImode, XEXP (X, 0))); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \ - force_operand (XEXP (X, 0), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \ + force_operand (XEXP (X, 0), 0)); \ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \ - (X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \ - force_operand (XEXP (X, 1), 0)); \ + (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \ + force_operand (XEXP (X, 1), 0)); \ if (memory_address_p (MODE, X)) \ goto WIN; } diff --git a/gcc/config/spur/spur.md b/gcc/config/spur/spur.md index 7ad4af5b342..100cc0b5a92 100644 --- a/gcc/config/spur/spur.md +++ b/gcc/config/spur/spur.md @@ -1,5 +1,5 @@ ;;- Machine description for SPUR chip for GNU C compiler -;; Copyright (C) 1988 Free Software Foundation, Inc. +;; Copyright (C) 1988, 1998, 1999 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -288,17 +288,17 @@ rtx addr = force_reg (SImode, XEXP (operands[1], 0)); rtx subreg; - emit_move_insn (tem, gen_rtx (MEM, SImode, addr)); + emit_move_insn (tem, gen_rtx_MEM (SImode, addr)); if (GET_CODE (operands[0]) == SUBREG) - subreg = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[0]), - SUBREG_WORD (operands[0])); + subreg = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[0]), + SUBREG_WORD (operands[0])); else - subreg = gen_rtx (SUBREG, SImode, operands[0], 0); + subreg = gen_rtx_SUBREG (SImode, operands[0], 0); - emit_insn (gen_rtx (SET, VOIDmode, subreg, - gen_rtx (ZERO_EXTRACT, SImode, tem, - GEN_INT (8), - addr))); + emit_insn (gen_rtx_SET (VOIDmode, subreg, + gen_rtx_ZERO_EXTRACT (SImode, tem, + GEN_INT (8), + addr))); } else if (GET_CODE (operands[0]) == MEM) { @@ -306,26 +306,26 @@ rtx addr = force_reg (SImode, XEXP (operands[0], 0)); rtx subreg; - emit_move_insn (tem, gen_rtx (MEM, SImode, addr)); + emit_move_insn (tem, gen_rtx_MEM (SImode, addr)); if (! CONSTANT_ADDRESS_P (operands[1])) { if (GET_CODE (operands[1]) == SUBREG) - subreg = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + subreg = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - subreg = gen_rtx (SUBREG, SImode, operands[1], 0); + subreg = gen_rtx_SUBREG (SImode, operands[1], 0); } - emit_insn (gen_rtx (SET, VOIDmode, - gen_rtx (ZERO_EXTRACT, SImode, tem, - GEN_INT (8), - addr), - subreg)); - emit_move_insn (gen_rtx (MEM, SImode, addr), tem); + emit_insn (gen_rtx_SET (VOIDmode, + gen_rtx_ZERO_EXTRACT (SImode, tem, + GEN_INT (8), + addr), + subreg)); + emit_move_insn (gen_rtx_MEM (SImode, addr), tem); } else { - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); } DONE; }") @@ -443,10 +443,10 @@ " { if (GET_CODE (operands[1]) == SUBREG) - operands[5] = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + operands[5] = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - operands[5] = gen_rtx (SUBREG, SImode, operands[1], 0); + operands[5] = gen_rtx_SUBREG (SImode, operands[1], 0); }") ;; Like storehi but operands[1] is a CONST_INT. @@ -468,7 +468,7 @@ (match_dup 2))] "" " operands[5] = GEN_INT (INTVAL (operands[1]) & 255); - operands[6] = GEN_INT ((INTVAL (operands[1]) >> 8) & 255); + operands[6] = GEN_INT (INTVAL (operands[1]) >> 8) & 255); ") ;; Main entry for generating insns to move halfwords. @@ -490,8 +490,8 @@ gen_reg_rtx (SImode), gen_reg_rtx (SImode), gen_reg_rtx (QImode))); /* Tell cse what value the loadhi produces, so it detect duplicates. */ - REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, operands[1], - REG_NOTES (insn)); + REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, operands[1], + REG_NOTES (insn)); } else if (GET_CODE (operands[0]) == MEM) { @@ -511,7 +511,7 @@ } } else - emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1])); + emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1])); DONE; }") @@ -579,7 +579,7 @@ return output_fp_move_double (operands); if (operands[1] == CONST0_RTX (DFmode) && GET_CODE (operands[0]) == REG) { - operands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); return \"add_nt %0,r0,$0\;add_nt %1,r0,$0\"; } if (operands[1] == CONST0_RTX (DFmode) && GET_CODE (operands[0]) == MEM) @@ -699,10 +699,10 @@ " { if (GET_CODE (operands[1]) == SUBREG) - operands[1] = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + operands[1] = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - operands[1] = gen_rtx (SUBREG, SImode, operands[1], 0); + operands[1] = gen_rtx_SUBREG (SImode, operands[1], 0); operands[2] = force_reg (SImode, GEN_INT (65535)); }") @@ -736,10 +736,10 @@ " { if (GET_CODE (operands[1]) == SUBREG) - operands[1] = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + operands[1] = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - operands[1] = gen_rtx (SUBREG, SImode, operands[1], 0); + operands[1] = gen_rtx_SUBREG (SImode, operands[1], 0); operands[2] = gen_reg_rtx (SImode); operands[3] = gen_reg_rtx (SImode); @@ -759,10 +759,10 @@ " { if (GET_CODE (operands[1]) == SUBREG) - operands[1] = gen_rtx (SUBREG, HImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + operands[1] = gen_rtx_SUBREG (HImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - operands[1] = gen_rtx (SUBREG, HImode, operands[1], 0); + operands[1] = gen_rtx_SUBREG (HImode, operands[1], 0); operands[2] = gen_reg_rtx (HImode); operands[3] = gen_reg_rtx (HImode); @@ -779,10 +779,10 @@ " { if (GET_CODE (operands[1]) == SUBREG) - operands[1] = gen_rtx (SUBREG, SImode, SUBREG_REG (operands[1]), - SUBREG_WORD (operands[1])); + operands[1] = gen_rtx_SUBREG (SImode, SUBREG_REG (operands[1]), + SUBREG_WORD (operands[1])); else - operands[1] = gen_rtx (SUBREG, SImode, operands[1], 0); + operands[1] = gen_rtx_SUBREG (SImode, operands[1], 0); operands[2] = gen_reg_rtx (SImode); operands[3] = gen_reg_rtx (SImode); diff --git a/gcc/config/tahoe/tahoe.c b/gcc/config/tahoe/tahoe.c index 53f77d64be2..89cdc3d8f84 100644 --- a/gcc/config/tahoe/tahoe.c +++ b/gcc/config/tahoe/tahoe.c @@ -1,5 +1,10 @@ /* Subroutines for insn-output.c for Tahoe. - Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc. + Copyright (C) 1989, 1991, 1997, 1998, 1999 Free Software Foundation, Inc. + Contributed by the University of Buffalo (Devon Bowen, Dale Wiles + and Kevin Zachmann. + Changes for HCX by Piet van Oostrum, University of Utrecht, + The Netherlands (piet@cs.ruu.nl) + Speed tweaks by Michael Tiemann (tiemann@lurch.stanford.edu). This file is part of GNU CC. @@ -18,9 +23,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -32,21 +36,6 @@ Boston, MA 02111-1307, USA. */ #include "output.h" #include "insn-attr.h" -/* - * File: output-tahoe.c - * - * Original port made at the University of Buffalo by Devon Bowen, - * Dale Wiles and Kevin Zachmann. - * - * Changes for HCX by Piet van Oostrum, - * University of Utrecht, The Netherlands (piet@cs.ruu.nl) - * - * Speed tweaks by Michael Tiemann (tiemann@lurch.stanford.edu). - * - * Mail bugs reports or fixes to: gcc@cs.buffalo.edu - */ - - /* On tahoe, you have to go to memory to convert a register from sub-word to word. */ @@ -61,13 +50,15 @@ extensible_operand (op, mode) || (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG)) && tahoe_reg_conversion_loc == 0) - tahoe_reg_conversion_loc = assign_stack_local (SImode, GET_MODE_SIZE (SImode)); + tahoe_reg_conversion_loc + = assign_stack_local (SImode, GET_MODE_SIZE (SImode)); + return general_operand (op, mode); } -/* most of the print_operand_address function was taken from the vax */ -/* since the modes are basically the same. I had to add a special case, */ -/* though, for symbol references with offsets. */ +/* Most of the print_operand_address function was taken from the VAX since + the modes are basically the same. I had to add a special case, though, for + symbol references with offsets. */ print_operand_address (file, addr) FILE *file; @@ -98,8 +89,8 @@ print_operand_address (file, addr) break; case PLUS: - reg1 = 0; reg2 = 0; - ireg = 0; breg = 0; + reg1 = 0, reg2 = 0; + ireg = 0, breg = 0; offset = 0; if (CONSTANT_ADDRESS_P (XEXP (addr, 0)) @@ -112,38 +103,22 @@ print_operand_address (file, addr) if (CONSTANT_ADDRESS_P (XEXP (addr, 0)) || GET_CODE (XEXP (addr, 0)) == MEM) - { - offset = XEXP (addr, 0); - addr = XEXP (addr, 1); - } + offset = XEXP (addr, 0), addr = XEXP (addr, 1); else if (CONSTANT_ADDRESS_P (XEXP (addr, 1)) || GET_CODE (XEXP (addr, 1)) == MEM) - { - offset = XEXP (addr, 1); - addr = XEXP (addr, 0); - } + offset = XEXP (addr, 1), addr = XEXP (addr, 0); + if (GET_CODE (addr) != PLUS) ; else if (GET_CODE (XEXP (addr, 0)) == MULT) - { - reg1 = XEXP (addr, 0); - addr = XEXP (addr, 1); - } + reg1 = XEXP (addr, 0), addr = XEXP (addr, 1); else if (GET_CODE (XEXP (addr, 1)) == MULT) - { - reg1 = XEXP (addr, 1); - addr = XEXP (addr, 0); - } + reg1 = XEXP (addr, 1), addr = XEXP (addr, 0); else if (GET_CODE (XEXP (addr, 0)) == REG) - { - reg1 = XEXP (addr, 0); - addr = XEXP (addr, 1); - } + reg1 = XEXP (addr, 0), addr = XEXP (addr, 1); else if (GET_CODE (XEXP (addr, 1)) == REG) - { - reg1 = XEXP (addr, 1); - addr = XEXP (addr, 0); - } + reg1 = XEXP (addr, 1), addr = XEXP (addr, 0); + if (GET_CODE (addr) == REG || GET_CODE (addr) == MULT) { if (reg1 == 0) @@ -152,39 +127,34 @@ print_operand_address (file, addr) reg2 = addr; addr = 0; } + if (offset != 0) { - if (addr != 0) abort (); + if (addr != 0) + abort (); + addr = offset; } + if (reg1 != 0 && GET_CODE (reg1) == MULT) - { - breg = reg2; - ireg = reg1; - } + breg = reg2, ireg = reg1; else if (reg2 != 0 && GET_CODE (reg2) == MULT) - { - breg = reg1; - ireg = reg2; - } + breg = reg1, ireg = reg2; else if (reg2 != 0 || GET_CODE (addr) == MEM) - { - breg = reg2; - ireg = reg1; - } + breg = reg2, ireg = reg1; else - { - breg = reg1; - ireg = reg2; - } + breg = reg1, ireg = reg2; + if (addr != 0) output_address (offset); + if (breg != 0) { if (GET_CODE (breg) != REG) abort (); fprintf (file, "(%s)", reg_name[REGNO (breg)]); } + if (ireg != 0) { if (GET_CODE (ireg) == MULT) @@ -200,8 +170,8 @@ print_operand_address (file, addr) } } -/* Do a quick check and find out what the best way to do the */ -/* mini-move is. Could be a push or a move..... */ +/* Do a quick check and find out what the best way to do the mini-move is. + Could be a push or a move..... */ static char * singlemove_string (operands) @@ -209,65 +179,69 @@ singlemove_string (operands) { if (operands[1] == const0_rtx) return "clrl %0"; + if (push_operand (operands[0], SImode)) return "pushl %1"; + return "movl %1,%0"; } -/* given the rtx for an address, return true if the given */ -/* register number is used in the address somewhere. */ +/* Given the rtx for an address, return true if the given register number is + used in the address somewhere. */ -regisused(addr,regnum) -rtx addr; -int regnum; +int +regisused (addr, regnum) + rtx addr; + int regnum; { - if (GET_CODE(addr) == REG) - if (REGNO(addr) == regnum) - return (1); - else - return (0); + if (GET_CODE (addr) == REG) + return REGNO (addr) == regnum; - if (GET_CODE(addr) == MEM) - return regisused(XEXP(addr,0),regnum); + else if (GET_CODE (addr) == MEM) + return regisused (XEXP (addr, 0), regnum); - if ((GET_CODE(addr) == MULT) || (GET_CODE(addr) == PLUS)) - return ((regisused(XEXP(addr,0),regnum)) || - (regisused(XEXP(addr,1),regnum))); + else if (GET_CODE (addr) == MULT || GET_CODE (addr) == PLUS) + return (regisused (XEXP (addr, 0), regnum) + || regisused (XEXP (addr, 1), regnum)); - return 0; + return 0; } -/* Given some rtx, traverse it and return the register used in a */ -/* index. If no index is found, return 0. */ +/* Given some rtx, traverse it and return the register used in a index. If no + index is found, return 0. */ rtx -index_reg(addr) -rtx addr; +index_reg (addr) + rtx addr; { - rtx temp; + rtx temp; - if (GET_CODE(addr) == MEM) - return index_reg(XEXP(addr,0)); + if (GET_CODE (addr) == MEM) + return index_reg (XEXP (addr, 0)); - if (GET_CODE(addr) == MULT) - if (GET_CODE(XEXP(addr,0)) == REG) - return XEXP(addr,0); - else - return XEXP(addr,1); + else if (GET_CODE (addr) == MULT) + { + if (GET_CODE (XEXP (addr, 0)) == REG) + return XEXP (addr, 0); + else + return XEXP (addr, 1); + } - if (GET_CODE(addr) == PLUS) - if (temp = index_reg(XEXP(addr,0))) - return temp; - else - return index_reg(XEXP(addr,1)); + else if (GET_CODE (addr) == PLUS) + { + if ((temp = index_reg (XEXP (addr, 0))) != 0) + return temp; + else + return index_reg (XEXP (addr, 1)); + } - return 0; + return 0; } -/* simulate the move double by generating two movl's. You have */ -/* to be careful about mixing modes here. */ +/* Simulate the move double by generating two movl's. We need to be careful + about mixing modes here. */ char * output_move_double (operands) @@ -285,21 +259,25 @@ output_move_double (operands) if (REG_P (operands[0])) optype0 = REGOP; - else if ((GET_CODE(operands[0])==MEM) && (shftreg0=index_reg(operands[0]))) + else if (GET_CODE (operands[0]) == MEM + && (shftreg0 = index_reg (operands[0])) != 0) optype0 = INDOP; else if (offsettable_memref_p (operands[0])) optype0 = OFFSOP; - else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) { - optype0 = PUSHOP; - dohighfirst++; - } else if (GET_CODE (operands[0]) == MEM) + else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC) + { + optype0 = PUSHOP; + dohighfirst++; + } + else if (GET_CODE (operands[0]) == MEM) optype0 = MEMOP; else optype0 = RNDOP; if (REG_P (operands[1])) optype1 = REGOP; - else if ((GET_CODE(operands[1])==MEM) && (shftreg1=index_reg(operands[1]))) + else if (GET_CODE (operands[1]) == MEM + && (shftreg1 = index_reg (operands[1])) !+ 0) optype1 = INDOP; else if (offsettable_memref_p (operands[1])) optype1 = OFFSOP; @@ -312,214 +290,233 @@ output_move_double (operands) else optype1 = RNDOP; - /* set up for the high byte move for operand zero */ + /* Set up for the high byte move for operand zero */ - switch (optype0) { - - /* if it's a register, just use the next highest in the */ - /* high address move. */ - - case REGOP : latehalf[0] = gen_rtx (REG,SImode,REGNO(operands[0])+1); - break; - - /* for an offsettable address, use the gcc function to */ - /* modify the operand to get an offset of 4 higher for */ - /* the second move. */ - - case OFFSOP : latehalf[0] = adj_offsettable_operand (operands[0], 4); - break; - - /* if the operand is MEMOP type, it must be a pointer */ - /* to a pointer. So just remember to increase the mem */ - /* location and use the same operand. */ - - case MEMOP : latehalf[0] = operands[0]; - addreg0 = XEXP(operands[0],0); - break; + switch (optype0) + { + /* If it's a register, just use the next highest in the high address + move. */ + case REGOP: + latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); + break; - /* if we're dealing with a push instruction, just leave */ - /* the operand alone since it auto-increments. */ + /* For an offsettable address, use the GCC function to modify the + operand to get an offset of 4 higher for the second move. */ + case OFFSOP: + latehalf[0] = adj_offsettable_operand (operands[0], 4); + break; - case PUSHOP : latehalf[0] = operands[0]; - break; + /* If the operand is MEMOP type, it must be a pointer to a pointer. + So just remember to increase the mem location and use the same + operand. */ + case MEMOP: + latehalf[0] = operands[0]; + addreg0 = XEXP(operands[0],0); + break; - /* YUCK! Indexed addressing!! If the address is considered */ - /* offsettable, go use the offset in the high part. Otherwise */ - /* find what exactly is being added to the multiplication. If */ - /* it's a mem reference, increment that with the high part */ - /* being unchanged to cause the shift. If it's a reg, do the */ - /* same. If you can't identify it, abort. Remember that the */ - /* shift register was already set during identification. */ + /* If we're dealing with a push instruction, just leave the operand + alone since it auto-increments. */ + case PUSHOP: + latehalf[0] = operands[0]; + break; - case INDOP : if (offsettable_memref_p(operands[0])) { - latehalf[0] = adj_offsettable_operand(operands[0],4); - break; - } + /* Indexed addressing. If the address is considered offsettable, use + the offset in the high part. Otherwise find what exactly is being + added to the multiplication. If it's a mem reference, increment that + with the high part being unchanged to cause the shift. If it's a + reg, do the same. If we can't identify it, abort. Remember that the + shift register was already set during identification. */ - latehalf[0] = operands[0]; + case INDOP: + if (offsettable_memref_p (operands[0])) + { + latehalf[0] = adj_offsettable_operand (operands[0], 4); + break; + } - temp0 = XEXP(XEXP(operands[0],0),0); - if (GET_CODE(temp0) == MULT) { - temp1 = temp0; - temp0 = XEXP(XEXP(operands[0],0),1); - } else { - temp1 = XEXP(XEXP(operands[0],0),1); - if (GET_CODE(temp1) != MULT) - abort(); - } + latehalf[0] = operands[0]; - if (GET_CODE(temp0) == MEM) - addreg0 = temp0; - else if (GET_CODE(temp0) == REG) - addreg0 = temp0; - else - abort(); + temp0 = XEXP (XEXP (operands[0], 0), 0); + if (GET_CODE(temp0) == MULT) + { + temp1 = temp0; + temp0 = XEXP (XEXP (operands[0], 0), 1); + } + else + { + temp1 = XEXP (XEXP (operands[0], 0), 1); + if (GET_CODE (temp1) != MULT) + abort(); + } - break; + if (GET_CODE (temp0) == MEM) + addreg0 = temp0; + else if (GET_CODE (temp0) == REG) + addreg0 = temp0; + else + abort(); - /* if we don't know the operand type, print a friendly */ - /* little error message... 8-) */ + break; - case RNDOP : - default : abort(); + case RNDOP: + default: + abort(); } - /* do the same setup for operand one */ + /* Do the same setup for operand one. */ - switch (optype1) { + switch (optype1) + { + case REGOP: + latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); + break; - case REGOP : latehalf[1] = gen_rtx(REG,SImode,REGNO(operands[1])+1); - break; + case OFFSOP: + latehalf[1] = adj_offsettable_operand (operands[1], 4); + break; - case OFFSOP : latehalf[1] = adj_offsettable_operand (operands[1], 4); - break; + case MEMOP: + latehalf[1] = operands[1]; + addreg1 = XEXP (operands[1], 0); + break; - case MEMOP : latehalf[1] = operands[1]; - addreg1 = XEXP(operands[1],0); - break; + case POPOP: + latehalf[1] = operands[1]; + break; - case POPOP : latehalf[1] = operands[1]; - break; + case INDOP: + if (offsettable_memref_p (operands[1])) + { + latehalf[1] = adj_offsettable_operand (operands[1], 4); + break; + } - case INDOP : if (offsettable_memref_p(operands[1])) { - latehalf[1] = adj_offsettable_operand(operands[1],4); - break; - } + latehalf[1] = operands[1]; - latehalf[1] = operands[1]; + temp0 = XEXP (XEXP (operands[1], 0), 0); + if (GET_CODE (temp0) == MULT) + { + temp1 = temp0; + temp0 = XEXP (XEXP (operands[1], 0), 1); + } + else + { + temp1 = XEXP (XEXP (operands[1], 0), 1); + if (GET_CODE (temp1) != MULT) + abort(); + } - temp0 = XEXP(XEXP(operands[1],0),0); - if (GET_CODE(temp0) == MULT) { - temp1 = temp0; - temp0 = XEXP(XEXP(operands[1],0),1); - } else { - temp1 = XEXP(XEXP(operands[1],0),1); - if (GET_CODE(temp1) != MULT) - abort(); - } + if (GET_CODE (temp0) == MEM) + addreg1 = temp0; + else if (GET_CODE (temp0) == REG) + addreg1 = temp0; + else + abort(); + break; - if (GET_CODE(temp0) == MEM) - addreg1 = temp0; - else if (GET_CODE(temp0) == REG) - addreg1 = temp0; - else - abort(); + case CNSTOP: + if (GET_CODE (operands[1]) == CONST_DOUBLE) + split_double (operands[1], &operands[1], &latehalf[1]); + else if (CONSTANT_P (operands[1])) + latehalf[1] = const0_rtx; + else + abort (); + break; - break; + case RNDOP: + default: + abort (); + } - case CNSTOP : - if (GET_CODE (operands[1]) == CONST_DOUBLE) - split_double (operands[1], &operands[1], &latehalf[1]); - else if (CONSTANT_P (operands[1])) - latehalf[1] = const0_rtx; - else abort (); - break; - case RNDOP : - default : abort(); - } + /* Double the register used for shifting in both of the operands but make + sure the same register isn't doubled twice! */ + if (shftreg0 != 0 && shftreg1 != 0 && rtx_equal_p (shftreg0, shftreg1)) + output_asm_insn ("addl2 %0,%0", &shftreg0); + else + { + if (shftreg0 != 0) + output_asm_insn ("addl2 %0,%0", &shftreg0); + if (shftreg1!= 0) + output_asm_insn ("addl2 %0,%0", &shftreg1); + } - /* double the register used for shifting in both of the operands */ - /* but make sure the same register isn't doubled twice! */ + /* If the destination is a register and that register is needed in the + source addressing mode, swap the order of the moves since we don't want + this destroyed til last. If both regs are used, not much we can do, so + abort. If these becomes a problem, maybe we can do it on the stack? */ - if (shftreg0 && shftreg1 && (rtx_equal_p(shftreg0,shftreg1))) - output_asm_insn("addl2 %0,%0", &shftreg0); - else { - if (shftreg0) - output_asm_insn("addl2 %0,%0", &shftreg0); - if (shftreg1) - output_asm_insn("addl2 %0,%0", &shftreg1); - } + if (GET_CODE (operands[0]) == REG + && regisused (operands[1], REGNO (operands[0]))) + { + if (regisused (latehalf[1], REGNO(latehalf[0]))) + ; + else + dohighfirst++; + } + + /* If we're pushing, do the high address part first. */ - /* if the destination is a register and that register is needed in */ - /* the source addressing mode, swap the order of the moves since we */ - /* don't want this destroyed til last. If both regs are used, not */ - /* much we can do, so abort. If these becomes a problem, maybe we */ - /* can do it on the stack? */ - - if (GET_CODE(operands[0])==REG && regisused(operands[1],REGNO(operands[0]))) - if (regisused(latehalf[1],REGNO(latehalf[0]))) - 8; - else - dohighfirst++; - - /* if we're pushing, do the high address part first. */ - - if (dohighfirst) { - - if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1))) - output_asm_insn("addl2 $4,%0", &addreg0); - else { - if (addreg0) - output_asm_insn("addl2 $4,%0", &addreg0); - if (addreg1) - output_asm_insn("addl2 $4,%0", &addreg1); + if (dohighfirst) + { + if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p (addreg0, addreg1)) + output_asm_insn ("addl2 $4,%0", &addreg0); + else + { + if (addreg0 != 0) + output_asm_insn ("addl2 $4,%0", &addreg0); + if (addreg1 != 0) + output_asm_insn ("addl2 $4,%0", &addreg1); } - output_asm_insn(singlemove_string(latehalf), latehalf); + output_asm_insn (singlemove_string (latehalf), latehalf); - if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1))) - output_asm_insn("subl2 $4,%0", &addreg0); - else { - if (addreg0) - output_asm_insn("subl2 $4,%0", &addreg0); - if (addreg1) - output_asm_insn("subl2 $4,%0", &addreg1); + if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p (addreg0, addreg1)) + output_asm_insn ("subl2 $4,%0", &addreg0); + else + { + if (addreg0 != 0) + output_asm_insn ("subl2 $4,%0", &addreg0); + if (addreg1 != 0) + output_asm_insn ("subl2 $4,%0", &addreg1); } - return singlemove_string(operands); - } + return singlemove_string (operands); + } - output_asm_insn(singlemove_string(operands), operands); + output_asm_insn (singlemove_string(operands), operands); - if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1))) - output_asm_insn("addl2 $4,%0", &addreg0); - else { - if (addreg0) - output_asm_insn("addl2 $4,%0", &addreg0); - if (addreg1) - output_asm_insn("addl2 $4,%0", &addreg1); - } + if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p (addreg0, addreg1)) + output_asm_insn ("addl2 $4,%0", &addreg0); + else + { + if (addreg0 != 0) + output_asm_insn ("addl2 $4,%0", &addreg0); + if (addreg1 != 0) + output_asm_insn ("addl2 $4,%0", &addreg1); + } - output_asm_insn(singlemove_string(latehalf), latehalf); + output_asm_insn (singlemove_string (latehalf), latehalf); - if (addreg0 && addreg1 && (rtx_equal_p(addreg0,addreg1))) - output_asm_insn("subl2 $4,%0", &addreg0); - else { - if (addreg0) - output_asm_insn("subl2 $4,%0", &addreg0); - if (addreg1) - output_asm_insn("subl2 $4,%0", &addreg1); - } + if (addreg0 != 0 && addreg1 != 0 && rtx_equal_p(addreg0, addreg1)) + output_asm_insn ("subl2 $4,%0", &addreg0); + else + { + if (addreg0 != 0) + output_asm_insn ("subl2 $4,%0", &addreg0); + if (addreg1 != 0) + output_asm_insn ("subl2 $4,%0", &addreg1); + } - if (shftreg0 && shftreg1 && (rtx_equal_p(shftreg0,shftreg1))) - output_asm_insn("shar $1,%0,%0", &shftreg0); - else { - if (shftreg0) - output_asm_insn("shar $1,%0,%0", &shftreg0); - if (shftreg1) - output_asm_insn("shar $1,%0,%0", &shftreg1); + if (shftreg0 != 0 && shftreg1 != 0 && rtx_equal_p (shftreg0, shftreg1)) + output_asm_insn ("shar $1,%0,%0", &shftreg0); + else + { + if (shftreg0 != 0) + output_asm_insn ("shar $1,%0,%0", &shftreg0); + if (shftreg1 != 0) + output_asm_insn ("shar $1,%0,%0", &shftreg1); } return ""; @@ -533,33 +530,32 @@ output_move_double (operands) int tahoe_cmp_check (insn, op, max) -rtx insn, op; int max; + rtx insn, op; + int max; { + register rtx next = NEXT_INSN (insn); + if (GET_CODE (op) == CONST_INT - && ( INTVAL (op) < 0 || INTVAL (op) > max )) - return 0; + && (INTVAL (op) < 0 || INTVAL (op) > max)) + return 0; + + if (GET_RTX_CLASS (GET_CODE (next)) == 'i') { - register rtx next = NEXT_INSN (insn); - - if ((GET_CODE (next) == JUMP_INSN - || GET_CODE (next) == INSN - || GET_CODE (next) == CALL_INSN)) - { - next = PATTERN (next); - if (GET_CODE (next) == SET - && SET_DEST (next) == pc_rtx - && GET_CODE (SET_SRC (next)) == IF_THEN_ELSE) - switch (GET_CODE (XEXP (SET_SRC (next), 0))) - { - case EQ: - case NE: - case LTU: - case GTU: - case LEU: - case GEU: - return 1; - } - } + next = PATTERN (next); + if (GET_CODE (next) == SET + && SET_DEST (next) == pc_rtx + && GET_CODE (SET_SRC (next)) == IF_THEN_ELSE) + switch (GET_CODE (XEXP (SET_SRC (next), 0))) + { + case EQ: + case NE: + case LTU: + case GTU: + case LEU: + case GEU: + return 1; + } } - return 0; + + return 0; } diff --git a/gcc/config/tahoe/tahoe.h b/gcc/config/tahoe/tahoe.h index 83063318959..b18e8ab59f0 100644 --- a/gcc/config/tahoe/tahoe.h +++ b/gcc/config/tahoe/tahoe.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Tahoe version. - Copyright (C) 1989, 1993, 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1989, 93, 94, 95, 96, 1998, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -331,11 +331,11 @@ enum reg_class {NO_REGS,GENERAL_REGS,FPP_REG,ALL_REGS,LIM_REG_CLASSES}; /* function values for all types are returned in register 0 */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* library routines also return things in reg 0 */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* Tahoe doesn't return structures in a reentrant way */ diff --git a/gcc/config/tahoe/tahoe.md b/gcc/config/tahoe/tahoe.md index 021c1b01032..8ed06497dea 100644 --- a/gcc/config/tahoe/tahoe.md +++ b/gcc/config/tahoe/tahoe.md @@ -1,5 +1,5 @@ ;; Machine description for GNU compiler, Tahoe version -;; Copyright (C) 1989, 1994, 1996, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1989, 1994, 96-98, 1999 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -1591,7 +1591,7 @@ "" "* { - operands[1] = GEN_INT ((INTVAL (operands[1]) + 4)); + operands[1] = GEN_INT (INTVAL (operands[1]) + 4); if (GET_CODE(operands[0]) == MEM && CONSTANT_ADDRESS_P (XEXP(operands[0], 0)) && INTVAL (operands[1]) < 64) @@ -1609,7 +1609,7 @@ "" "* { - operands[2] = GEN_INT ((INTVAL (operands[2]) + 4)); + operands[2] = GEN_INT (INTVAL (operands[2]) + 4)); if (GET_CODE(operands[1]) == MEM && CONSTANT_ADDRESS_P (XEXP(operands[1], 0)) && INTVAL (operands[2]) < 64) @@ -2056,8 +2056,7 @@ ; && exact_log2 (INTVAL (operands[1])) >= 0" ; "* ;{ -; operands[1] -; = GEN_INT (exact_log2 (INTVAL (operands[1]))); +; operands[1] = GEN_INT (exact_log2 (INTVAL (operands[1]))); ; return \"bbs %1,%0,%l2\"; ;}") ; @@ -2073,8 +2072,7 @@ ; && exact_log2 (INTVAL (operands[1])) >= 0" ; "* ;{ -; operands[1] -; = GEN_INT (exact_log2 (INTVAL (operands[1]))); +; operands[1] = GEN_INT (exact_log2 (INTVAL (operands[1]))); ; return \"bbc %1,%0,%l2\"; ;}") ; @@ -2090,8 +2088,7 @@ ; && exact_log2 (INTVAL (operands[1])) >= 0" ; "* ;{ -; operands[1] -; = GEN_INT (exact_log2 (INTVAL (operands[1]))); +; operands[1] = GEN_INT (exact_log2 (INTVAL (operands[1]))); ; return \"bbc %1,%0,%l2\"; ;}") ; diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c index 2b9b5981315..a085b518d63 100644 --- a/gcc/config/v850/v850.c +++ b/gcc/config/v850/v850.c @@ -20,8 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> -#include <ctype.h> +#include "system.h" #include "tree.h" #include "rtl.h" #include "regs.h" @@ -200,16 +199,16 @@ function_arg (cum, mode, type, named) switch (cum->nbytes / UNITS_PER_WORD) { case 0: - result = gen_rtx (REG, mode, 6); + result = gen_rtx_REG (mode, 6); break; case 1: - result = gen_rtx (REG, mode, 7); + result = gen_rtx_REG (mode, 7); break; case 2: - result = gen_rtx (REG, mode, 8); + result = gen_rtx_REG (mode, 8); break; case 3: - result = gen_rtx (REG, mode, 9); + result = gen_rtx_REG (mode, 9); break; default: result = 0; @@ -563,9 +562,8 @@ print_operand (file, x, code) { case MEM: if (GET_CODE (XEXP (x, 0)) == CONST_INT) - output_address (gen_rtx (PLUS, SImode, - gen_rtx (REG, SImode, 0), - XEXP (x, 0))); + output_address (gen_rtx_PLUS (SImode, gen_rtx (REG, SImode, 0), + XEXP (x, 0))); else output_address (XEXP (x, 0)); break; @@ -792,7 +790,7 @@ output_move_single (operands) return "%S0st%W0 %.,%0"; } - fatal_insn ("output_move_single:", gen_rtx (SET, VOIDmode, dst, src)); + fatal_insn ("output_move_single:", gen_rtx_SET (VOIDmode, dst, src)); return ""; } @@ -839,7 +837,7 @@ output_move_double (operands) for (i = 0; i < 2; i++) { - xop[0] = gen_rtx (REG, SImode, REGNO (dst)+i); + xop[0] = gen_rtx_REG (SImode, REGNO (dst)+i); xop[1] = GEN_INT (high_low[i]); output_asm_insn (output_move_single (xop), xop); } @@ -1093,14 +1091,14 @@ substitute_ep_register (first_insn, last_insn, uses, regno, p_r1, p_ep) rtx *p_r1; rtx *p_ep; { - rtx reg = gen_rtx (REG, Pmode, regno); + rtx reg = gen_rtx_REG (Pmode, regno); rtx insn; if (!*p_r1) { regs_ever_live[1] = 1; - *p_r1 = gen_rtx (REG, Pmode, 1); - *p_ep = gen_rtx (REG, Pmode, 30); + *p_r1 = gen_rtx_REG (Pmode, 1); + *p_ep = gen_rtx_REG (Pmode, 30); } if (TARGET_DEBUG) @@ -1156,8 +1154,9 @@ Saved %d bytes (%d uses of register %s) in function %s, starting as insn %d, end unsignedp)) && ((INTVAL (XEXP (addr, 1))) >= 0)) *p_mem = change_address (*p_mem, VOIDmode, - gen_rtx (PLUS, Pmode, - *p_ep, XEXP (addr, 1))); + gen_rtx_PLUS (Pmode, + *p_ep, + XEXP (addr, 1))); } } } @@ -1171,10 +1170,10 @@ Saved %d bytes (%d uses of register %s) in function %s, starting as insn %d, end && SET_SRC (PATTERN (insn)) == *p_r1) delete_insn (insn); else - emit_insn_before (gen_rtx (SET, Pmode, *p_r1, *p_ep), first_insn); + emit_insn_before (gen_rtx_SET (Pmode, *p_r1, *p_ep), first_insn); - emit_insn_before (gen_rtx (SET, Pmode, *p_ep, reg), first_insn); - emit_insn_before (gen_rtx (SET, Pmode, *p_ep, *p_r1), last_insn); + emit_insn_before (gen_rtx_SET (Pmode, *p_ep, reg), first_insn); + emit_insn_before (gen_rtx_SET (Pmode, *p_ep, *p_r1), last_insn); } @@ -1558,10 +1557,10 @@ expand_prologue () offset = 0; for (i = 6; i < 10; i++) { - emit_move_insn (gen_rtx (MEM, SImode, - plus_constant (stack_pointer_rtx, - offset)), - gen_rtx (REG, SImode, i)); + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, + offset)), + gen_rtx_REG (SImode, i)); offset += 4; } } @@ -1573,14 +1572,14 @@ expand_prologue () for (i = 1; i < 31; i++) { if (((1L << i) & reg_saved) != 0) - save_regs[num_save++] = gen_rtx (REG, Pmode, i); + save_regs[num_save++] = gen_rtx_REG (Pmode, i); } /* If the return pointer is saved, the helper functions also allocate 16 bytes of stack for arguments to be saved in. */ if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0) { - save_regs[num_save++] = gen_rtx (REG, Pmode, LINK_POINTER_REGNUM); + save_regs[num_save++] = gen_rtx_REG (Pmode, LINK_POINTER_REGNUM); default_stack = 16; } @@ -1610,28 +1609,30 @@ expand_prologue () stack space is allocated. */ if (save_func_len < save_normal_len) { - save_all = gen_rtx (PARALLEL, VOIDmode, - rtvec_alloc (num_save + (TARGET_V850 ? 2 : 1))); - XVECEXP (save_all, 0, 0) = gen_rtx (SET, VOIDmode, - stack_pointer_rtx, - gen_rtx (PLUS, Pmode, - stack_pointer_rtx, - GEN_INT (-alloc_stack))); + save_all = gen_rtx_PARALLEL + (VOIDmode, + rtvec_alloc (num_save + (TARGET_V850 ? 2 : 1))); + + XVECEXP (save_all, 0, 0) + = gen_rtx_SET (VOIDmode, + stack_pointer_rtx, + plus_constant (stack_pointer_rtx, -alloc_stack)); if (TARGET_V850) { - XVECEXP (save_all, 0, num_save + 1) - = gen_rtx (CLOBBER, VOIDmode, gen_rtx (REG, Pmode, 10)); + XVECEXP (save_all, 0, num_save+1) + = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 10)); } offset = - default_stack; for (i = 0; i < num_save; i++) { - XVECEXP (save_all, 0, i + 1) - = gen_rtx (SET, VOIDmode, - gen_rtx (MEM, Pmode, - plus_constant (stack_pointer_rtx, offset)), - save_regs[i]); + XVECEXP (save_all, 0, i+1) + = gen_rtx_SET (VOIDmode, + gen_rtx_MEM (Pmode, + plus_constant (stack_pointer_rtx, + offset)), + save_regs[i]); offset -= 4; } @@ -1684,18 +1685,18 @@ Saved %d bytes via prologue function (%d vs. %d) for function %s\n", /* Save the return pointer first. */ if (num_save > 0 && REGNO (save_regs[num_save-1]) == LINK_POINTER_REGNUM) { - emit_move_insn (gen_rtx (MEM, SImode, - plus_constant (stack_pointer_rtx, - offset)), + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, + offset)), save_regs[--num_save]); offset -= 4; } for (i = 0; i < num_save; i++) { - emit_move_insn (gen_rtx (MEM, SImode, - plus_constant (stack_pointer_rtx, - offset)), + emit_move_insn (gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, + offset)), save_regs[i]); offset -= 4; } @@ -1714,7 +1715,7 @@ Saved %d bytes via prologue function (%d vs. %d) for function %s\n", GEN_INT (-diff))); else { - rtx reg = gen_rtx (REG, Pmode, 12); + rtx reg = gen_rtx_REG (Pmode, 12); emit_move_insn (reg, GEN_INT (-diff)); emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, reg)); } @@ -1760,14 +1761,14 @@ expand_epilogue () for (i = 1; i < 31; i++) { if (((1L << i) & reg_saved) != 0) - restore_regs[num_restore++] = gen_rtx (REG, Pmode, i); + restore_regs[num_restore++] = gen_rtx_REG (Pmode, i); } /* If the return pointer is saved, the helper functions also allocate 16 bytes of stack for arguments to be saved in. */ if (((1L << LINK_POINTER_REGNUM) & reg_saved) != 0) { - restore_regs[num_restore++] = gen_rtx (REG, Pmode, LINK_POINTER_REGNUM); + restore_regs[num_restore++] = gen_rtx_REG (Pmode, LINK_POINTER_REGNUM); default_stack = 16; } @@ -1797,24 +1798,24 @@ expand_epilogue () /* Don't bother checking if we don't actually save any space. */ if (restore_func_len < restore_normal_len) { - restore_all = gen_rtx (PARALLEL, VOIDmode, - rtvec_alloc (num_restore + 2)); - XVECEXP (restore_all, 0, 0) = gen_rtx (RETURN, VOIDmode); + restore_all = gen_rtx_PARALLEL (VOIDmode, + rtvec_alloc (num_restore + 2)); + XVECEXP (restore_all, 0, 0) = gen_rtx_RETURN (VOIDmode); XVECEXP (restore_all, 0, 1) - = gen_rtx (SET, VOIDmode, stack_pointer_rtx, - gen_rtx (PLUS, Pmode, - stack_pointer_rtx, - GEN_INT (alloc_stack))); + = gen_rtx_SET (VOIDmode, stack_pointer_rtx, + gen_rtx_PLUS (Pmode, + stack_pointer_rtx, + GEN_INT (alloc_stack))); offset = alloc_stack - 4; for (i = 0; i < num_restore; i++) { XVECEXP (restore_all, 0, i+2) - = gen_rtx (SET, VOIDmode, - restore_regs[i], - gen_rtx (MEM, Pmode, - plus_constant - (stack_pointer_rtx, offset))); + = gen_rtx_SET (VOIDmode, + restore_regs[i], + gen_rtx_MEM (Pmode, + plus_constant (stack_pointer_rtx, + offset))); offset -= 4; } @@ -1832,7 +1833,7 @@ expand_epilogue () GEN_INT (actual_fsize))); else { - rtx reg = gen_rtx (REG, Pmode, 12); + rtx reg = gen_rtx_REG (Pmode, 12); emit_move_insn (reg, GEN_INT (actual_fsize)); emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, @@ -1880,7 +1881,7 @@ Saved %d bytes via epilogue function (%d vs. %d) in function %s\n", GEN_INT (diff))); else { - rtx reg = gen_rtx (REG, Pmode, 12); + rtx reg = gen_rtx_REG (Pmode, 12); emit_move_insn (reg, GEN_INT (diff)); emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, @@ -1904,18 +1905,18 @@ Saved %d bytes via epilogue function (%d vs. %d) in function %s\n", && REGNO (restore_regs [num_restore - 1]) == LINK_POINTER_REGNUM) { emit_move_insn (restore_regs[--num_restore], - gen_rtx (MEM, SImode, - plus_constant (stack_pointer_rtx, - offset))); + gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, + offset))); offset -= 4; } for (i = 0; i < num_restore; i++) { emit_move_insn (restore_regs[i], - gen_rtx (MEM, SImode, - plus_constant (stack_pointer_rtx, - offset))); + gen_rtx_MEM (SImode, + plus_constant (stack_pointer_rtx, + offset))); offset -= 4; } diff --git a/gcc/config/v850/v850.h b/gcc/config/v850/v850.h index b045f830d39..22289c39367 100644 --- a/gcc/config/v850/v850.h +++ b/gcc/config/v850/v850.h @@ -755,13 +755,13 @@ extern int current_function_anonymous_args; otherwise, FUNC is 0. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 10) + gen_rtx_REG (TYPE_MODE (VALTYPE), 10) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ #define LIBCALL_VALUE(MODE) \ - gen_rtx (REG, MODE, 10) + gen_rtx_REG (MODE, 10) /* 1 if N is a possible register number for a function value. */ @@ -811,9 +811,9 @@ extern int current_function_anonymous_args; #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 16)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 16)), \ (CXT)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 20)), \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 20)), \ (FNADDR)); \ } diff --git a/gcc/config/v850/v850.md b/gcc/config/v850/v850.md index 5f19c84ceaa..5214d1663c5 100644 --- a/gcc/config/v850/v850.md +++ b/gcc/config/v850/v850.md @@ -1,7 +1,6 @@ ;; GCC machine description for NEC V850 -;; Copyright (C) 1996, 1997, 1999 Free Software Foundation, Inc. - -;; Contributed by Jeff Law (law@cygnus.com). +;; Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. +;; Contributed by Jeff Law (law@cygnus.com). ;; This file is part of GNU CC. @@ -168,10 +167,10 @@ else temp = gen_reg_rtx (SImode); - emit_insn (gen_rtx (SET, SImode, temp, - gen_rtx (HIGH, SImode, operand1))); - emit_insn (gen_rtx (SET, SImode, operand0, - gen_rtx (LO_SUM, SImode, temp, operand1))); + emit_insn (gen_rtx_SET (SImode, temp, + gen_rtx_HIGH (SImode, operand1))); + emit_insn (gen_rtx_SET (SImode, operand0, + gen_rtx_LO_SUM (SImode, temp, operand1))); DONE; } }") @@ -412,8 +411,8 @@ int log2 = exact_log2 (~INTVAL (operands[1]) & 0xffff); rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"clr1 %1,%0\", xoperands); return \"\"; @@ -431,8 +430,8 @@ int log2 = exact_log2 (~INTVAL (operands[1]) & 0xffffffff); rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"clr1 %1,%0\", xoperands); return \"\"; @@ -479,8 +478,9 @@ else { rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), + log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"set1 %1,%0\", xoperands); } @@ -503,8 +503,9 @@ else { rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), + log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"set1 %1,%0\", xoperands); } @@ -552,8 +553,9 @@ else { rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), + log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"not1 %1,%0\", xoperands); } @@ -576,8 +578,9 @@ else { rtx xoperands[2]; - xoperands[0] = gen_rtx (MEM, QImode, - plus_constant (XEXP (operands[0], 0), log2 / 8)); + xoperands[0] = gen_rtx_MEM (QImode, + plus_constant (XEXP (operands[0], 0), + log2 / 8)); xoperands[1] = GEN_INT (log2 % 8); output_asm_insn (\"not1 %1,%0\", xoperands); } @@ -942,11 +945,11 @@ emit_insn (gen_ashlsi3 (reg, reg, GEN_INT (TARGET_BIG_SWITCH ? 2 : 1))); /* Load the table address into a pseudo. */ emit_insn (gen_movsi (tableaddress, - gen_rtx (LABEL_REF, VOIDmode, operands[3]))); + gen_rtx_LABEL_REF (VOIDmode, operands[3]))); /* Add the table address to the index. */ emit_insn (gen_addsi3 (reg, reg, tableaddress)); /* Load the table entry. */ - mem = gen_rtx (MEM, CASE_VECTOR_MODE, reg); + mem = gen_rtx_MEM (CASE_VECTOR_MODE, reg); RTX_UNCHANGING_P (mem); if (! TARGET_BIG_SWITCH) { diff --git a/gcc/config/v850/xm-v850.h b/gcc/config/v850/xm-v850.h index 1e43d033f6f..7e2da6749a3 100644 --- a/gcc/config/v850/xm-v850.h +++ b/gcc/config/v850/xm-v850.h @@ -1,5 +1,5 @@ /* Configuration for NEC V850. - Copyright (C) 1996 Free Software Foundation, Inc. + Copyright (C) 1996, 1998, 1999 Free Software Foundation, Inc. Contributed by Cygnus Support. This file is part of GNU CC. @@ -34,15 +34,6 @@ Boston, MA 02111-1307, USA. */ #define SUCCESS_EXIT_CODE 0 #define FATAL_EXIT_CODE 33 -#ifdef __v850 -#ifndef __STDC__ -extern char *malloc (), *realloc (), *calloc (); -#else -extern void *malloc (), *realloc (), *calloc (); -#endif -extern void free (); -#endif - /* target machine dependencies. tm.h is a symbolic link to the actual target specific file. */ diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c index 4a9f06d80e7..9eab182b80e 100644 --- a/gcc/config/vax/vax.c +++ b/gcc/config/vax/vax.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Vax. - Copyright (C) 1987, 1994, 1995, 1997, 1998 Free Software Foundation, Inc. + Copyright (C) 1987, 94, 95, 97, 98, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -19,7 +19,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -53,11 +53,11 @@ split_quadword_operands (operands, low, n) && (GET_CODE (XEXP (operands[i], 0)) == POST_INC)) { rtx addr = XEXP (operands[i], 0); - operands[i] = low[i] = gen_rtx (MEM, SImode, addr); + operands[i] = low[i] = gen_rtx_MEM (SImode, addr); if (which_alternative == 0 && i == 0) { addr = XEXP (operands[i], 0); - operands[i+1] = low[i+1] = gen_rtx (MEM, SImode, addr); + operands[i+1] = low[i+1] = gen_rtx_MEM (SImode, addr); } } else diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h index ad8fb7cc476..35f3fbdc0e7 100644 --- a/gcc/config/vax/vax.h +++ b/gcc/config/vax/vax.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler. Vax version. - Copyright (C) 1987, 88, 91, 93-96, 1997 Free Software Foundation, Inc. + Copyright (C) 1987, 88, 91, 93-98, 1999 Free Software Foundation, Inc. This file is part of GNU CC. @@ -347,8 +347,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; /* Given an rtx for the address of a frame, return an rtx for the address of the word in the frame that holds the dynamic chain--the previous frame's address. */ -#define DYNAMIC_CHAIN_ADDRESS(frame) \ -gen_rtx (PLUS, Pmode, frame, GEN_INT (12)) +#define DYNAMIC_CHAIN_ADDRESS(FRAME) plus_constant ((FRAME), 12) /* If we generate an insn to push BYTES bytes, this says how many the stack pointer really advances by. @@ -377,14 +376,14 @@ gen_rtx (PLUS, Pmode, frame, GEN_INT (12)) /* On the Vax the return value is in R0 regardless. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ /* On the Vax the return value is in R0 regardless. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* Define this if PCC uses the nonreentrant convention for returning structure and union values. */ @@ -530,14 +529,14 @@ gen_rtx (PLUS, Pmode, frame, GEN_INT (12)) movl $STATIC,r0 (store the functions static chain) jmp *$FUNCTION (jump to function code at address FUNCTION) */ -#define TRAMPOLINE_TEMPLATE(FILE) \ -{ \ - ASM_OUTPUT_SHORT (FILE, const0_rtx); \ - ASM_OUTPUT_SHORT (FILE, GEN_INT (0x8fd0)); \ - ASM_OUTPUT_INT (FILE, const0_rtx); \ - ASM_OUTPUT_BYTE (FILE, 0x50+STATIC_CHAIN_REGNUM); \ - ASM_OUTPUT_SHORT (FILE, GEN_INT (0x9f17)); \ - ASM_OUTPUT_INT (FILE, const0_rtx); \ +#define TRAMPOLINE_TEMPLATE(FILE) \ +{ \ + ASM_OUTPUT_SHORT (FILE, const0_rtx); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x8fd0)); \ + ASM_OUTPUT_INT (FILE, const0_rtx); \ + ASM_OUTPUT_BYTE (FILE, 0x50 + STATIC_CHAIN_REGNUM); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x9f17)); \ + ASM_OUTPUT_INT (FILE, const0_rtx); \ } /* Length in units of the trampoline for entering a nested function. */ @@ -552,12 +551,12 @@ gen_rtx (PLUS, Pmode, frame, GEN_INT (12)) to the start of the trampoline. */ #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_insn (gen_rtx (ASM_INPUT, VOIDmode, \ - "movpsl -(sp)\n\tpushal 1(pc)\n\trei")); \ - emit_move_insn (gen_rtx (MEM, HImode, TRAMP), \ - gen_rtx (MEM, HImode, FNADDR)); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), CXT);\ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 11)), \ + emit_insn (gen_rtx_ASM_INPUT (VOIDmode, \ + "movpsl -(sp)\n\tpushal 1(pc)\n\trei")); \ + emit_move_insn (gen_rtx_MEM (HImode, TRAMP), \ + gen_rtx_MEM (HImode, FNADDR)); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT);\ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 11)), \ plus_constant (FNADDR, 2)); \ } @@ -573,7 +572,7 @@ gen_rtx (PLUS, Pmode, frame, GEN_INT (12)) #define RETURN_ADDR_RTX(COUNT, FRAME) \ ((COUNT == 0) \ - ? gen_rtx (MEM, Pmode, plus_constant (FRAME, RETURN_ADDRESS_OFFSET)) \ + ? gen_rtx_MEM (Pmode, plus_constant (FRAME, RETURN_ADDRESS_OFFSET)) \ : (rtx) 0) diff --git a/gcc/config/vax/vax.md b/gcc/config/vax/vax.md index 4ca4668929d..ead66070ae5 100644 --- a/gcc/config/vax/vax.md +++ b/gcc/config/vax/vax.md @@ -1,5 +1,5 @@ -;;- Machine description for GNU compiler, Vax Version -;; Copyright (C) 1987, 88, 91, 94-96, 1998 Free Software Foundation, Inc. +;; Machine description for GNU compiler, Vax Version +;; Copyright (C) 1987, 88, 91, 94-96, 1998, 1999 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -1189,7 +1189,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "" @@ -1237,7 +1237,7 @@ "" " { - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "ashldi3" @@ -1283,7 +1283,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2])); + operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2])); }") (define_insn "rotlsi3" @@ -2131,6 +2131,7 @@ "" "* { - operands[3] = GEN_INT (INTVAL (operands[3]) & ~((1 << INTVAL (operands[2])) - 1)); + operands[3] + = GEN_INT (INTVAL (operands[3]) & ~((1 << INTVAL (operands[2])) - 1)); return \"rotl %2,%1,%0\;bicl2 %N3,%0\"; }") diff --git a/gcc/config/we32k/we32k.c b/gcc/config/we32k/we32k.c index e1b58f9f477..ef03232cb5d 100644 --- a/gcc/config/we32k/we32k.c +++ b/gcc/config/we32k/we32k.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for AT&T we32000 Family. + Copyright (C) 1991, 1992, 1997, 1998, 1999 Free Software Foundation, Inc. Contributed by John Wehle (john@feith1.uucp) - Copyright (C) 1991, 1992, 1997 Free Software Foundation, Inc. This file is part of GNU CC. @@ -21,12 +21,11 @@ Boston, MA 02111-1307, USA. */ #include "config.h" -#include <stdio.h> +#include "system.h" #include "rtl.h" #include "function.h" #include "real.h" - void output_move_double (operands) rtx *operands; @@ -37,7 +36,7 @@ output_move_double (operands) if (GET_CODE (operands[0]) == REG) { - lsw_operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); msw_dreg = operands[0]; } else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) @@ -47,7 +46,7 @@ output_move_double (operands) if (GET_CODE (operands[1]) == REG) { - lsw_operands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + lsw_operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); lsw_sreg = lsw_operands[1]; } else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1])) @@ -116,12 +115,12 @@ output_push_double (operands) rtx lsw_operands[1]; if (GET_CODE (operands[0]) == REG) - lsw_operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) lsw_operands[0] = adj_offsettable_operand (operands[0], 4); else if (GET_CODE (operands[0]) == CONST_DOUBLE) { - lsw_operands[0] = GEN_INT (CONST_DOUBLE_HIGH (operands[0])); + lsw_operands[0] = GEN_INT CONST_DOUBLE_HIGH (operands[0])); operands[0] = GEN_INT (CONST_DOUBLE_LOW (operands[0])); } else if (GET_CODE (operands[0]) == CONST_INT) diff --git a/gcc/config/we32k/we32k.h b/gcc/config/we32k/we32k.h index af7c7ff774d..7a66c734083 100644 --- a/gcc/config/we32k/we32k.h +++ b/gcc/config/we32k/we32k.h @@ -1,5 +1,6 @@ /* Definitions of target machine for GNU compiler. AT&T we32000 version. - Copyright (C) 1991, 92, 93, 94, 95, 1996 Free Software Foundation, Inc. + Copyright (C) 1991, 92, 93, 94, 95, 96, 98, 1999 + Free Software Foundation, Inc. Contributed by John Wehle (john@feith1.uucp) This file is part of GNU CC. @@ -319,14 +320,14 @@ enum reg_class { NO_REGS, GENERAL_REGS, /* On the we32000 the return value is in r0 regardless. */ #define FUNCTION_VALUE(VALTYPE, FUNC) \ - gen_rtx (REG, TYPE_MODE (VALTYPE), 0) + gen_rtx_REG (TYPE_MODE (VALTYPE), 0) /* Define how to find the value returned by a library function assuming the value has mode MODE. */ /* On the we32000 the return value is in r0 regardless. */ -#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0) +#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) /* 1 if N is a possible register number for a function value. On the we32000, r0 is the only register thus used. */ @@ -478,15 +479,15 @@ enum reg_class { NO_REGS, GENERAL_REGS, mov #STATIC,%r8 jmp #FUNCTION */ -#define TRAMPOLINE_TEMPLATE(FILE) \ -{ \ - ASM_OUTPUT_SHORT (FILE, GEN_INT (0x844f)); \ - ASM_OUTPUT_SHORT (FILE, const0_rtx); \ - ASM_OUTPUT_SHORT (FILE, const0_rtx); \ - ASM_OUTPUT_CHAR (FILE, GEN_INT (0x48)); \ - ASM_OUTPUT_SHORT (FILE, GEN_INT (0x247f)); \ - ASM_OUTPUT_SHORT (FILE, const0_rtx); \ - ASM_OUTPUT_SHORT (FILE, const0_rtx); \ +#define TRAMPOLINE_TEMPLATE(FILE) \ +{ \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x844f)); \ + ASM_OUTPUT_SHORT (FILE, const0_rtx); \ + ASM_OUTPUT_SHORT (FILE, const0_rtx); \ + ASM_OUTPUT_CHAR (FILE, GEN_INT (0x48)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x247f)); \ + ASM_OUTPUT_SHORT (FILE, const0_rtx); \ + ASM_OUTPUT_SHORT (FILE, const0_rtx); \ } /* Length in units of the trampoline for entering a nested function. */ @@ -499,8 +500,8 @@ enum reg_class { NO_REGS, GENERAL_REGS, #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ { \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 2)), CXT); \ - emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 9)), FNADDR); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 2)), CXT); \ + emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 9)), FNADDR); \ } /* Generate calls to memcpy() and memset() rather diff --git a/gcc/config/we32k/we32k.md b/gcc/config/we32k/we32k.md index 9d85a1026db..afabb9200cd 100644 --- a/gcc/config/we32k/we32k.md +++ b/gcc/config/we32k/we32k.md @@ -1,5 +1,5 @@ ;; Machine description for GNU compiler, AT&T we32000 Version -;; Copyright (C) 1991, 1992, 1994 Free Software Foundation, Inc. +;; Copyright (C) 1991, 1992, 1994, 1998, 1999 Free Software Foundation, Inc. ;; Contributed by John Wehle (john@feith1.uucp) ;; This file is part of GNU CC. @@ -125,7 +125,7 @@ rtx lsw_operands[3]; if (GET_CODE (operands[0]) == REG) - lsw_operands[0] = gen_rtx(REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) lsw_operands[0] = adj_offsettable_operand(operands[0], 4); @@ -133,7 +133,7 @@ abort(); if (GET_CODE (operands[2]) == REG) - lsw_operands[2] = gen_rtx(REG, SImode, REGNO (operands[2]) + 1); + lsw_operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2])) lsw_operands[2] = adj_offsettable_operand(operands[2], 4); @@ -175,7 +175,7 @@ rtx lsw_operands[3]; if (GET_CODE (operands[0]) == REG) - lsw_operands[0] = gen_rtx(REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) lsw_operands[0] = adj_offsettable_operand(operands[0], 4); @@ -183,7 +183,7 @@ abort(); if (GET_CODE (operands[1]) == REG) - lsw_operands[1] = gen_rtx(REG, SImode, REGNO (operands[1]) + 1); + lsw_operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1])) lsw_operands[1] = adj_offsettable_operand(operands[1], 4); @@ -203,7 +203,7 @@ abort(); if (GET_CODE (operands[2]) == REG) - lsw_operands[2] = gen_rtx(REG, SImode, REGNO (operands[2]) + 1); + lsw_operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2])) lsw_operands[2] = adj_offsettable_operand(operands[2], 4); @@ -289,7 +289,7 @@ rtx lsw_operands[3]; if (GET_CODE (operands[0]) == REG) - lsw_operands[0] = gen_rtx(REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) lsw_operands[0] = adj_offsettable_operand(operands[0], 4); @@ -297,7 +297,7 @@ abort(); if (GET_CODE (operands[2]) == REG) - lsw_operands[2] = gen_rtx(REG, SImode, REGNO (operands[2]) + 1); + lsw_operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2])) lsw_operands[2] = adj_offsettable_operand(operands[2], 4); @@ -339,7 +339,7 @@ rtx lsw_operands[3]; if (GET_CODE (operands[0]) == REG) - lsw_operands[0] = gen_rtx(REG, SImode, REGNO (operands[0]) + 1); + lsw_operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0])) lsw_operands[0] = adj_offsettable_operand(operands[0], 4); @@ -347,7 +347,7 @@ abort(); if (GET_CODE (operands[1]) == REG) - lsw_operands[1] = gen_rtx(REG, SImode, REGNO (operands[1]) + 1); + lsw_operands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1])) lsw_operands[1] = adj_offsettable_operand(operands[1], 4); @@ -367,7 +367,7 @@ abort(); if (GET_CODE (operands[2]) == REG) - lsw_operands[2] = gen_rtx(REG, SImode, REGNO (operands[2]) + 1); + lsw_operands[2] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); else if (GET_CODE (operands[2]) == MEM && offsettable_memref_p (operands[2])) lsw_operands[2] = adj_offsettable_operand(operands[2], 4); @@ -758,7 +758,7 @@ if (GET_CODE (operands[1]) == CONST_INT && ((unsigned long)INTVAL (operands[1]) & 0x8000L)) - operands[1] = GEN_INT (INTVAL(operands[1]) | 0xffff0000L); + operands[1] = GEN_INT (INTVAL (operands[1]) | 0xffff0000L); output_asm_insn(\"CMPH %1, %0\",operands); @@ -913,7 +913,7 @@ "* { - operands[2] = GEN_INT (INTVAL(operands[2]) - 1); + operands[2] = GEN_INT (INTVAL (operands[2]) - 1); output_asm_insn(\"EXTFH %2, %3, {uhalf}%1, {uword}%0\",operands); return \"\"; @@ -928,7 +928,7 @@ "* { - operands[2] = GEN_INT (INTVAL(operands[2]) - 1); + operands[2] = GEN_INT (INTVAL (operands[2]) - 1); output_asm_insn(\"EXTFB %2, %3, {ubyte}%1, {uword}%0\",operands); return \"\"; @@ -943,7 +943,7 @@ "* { - operands[1] = GEN_INT (INTVAL(operands[1]) - 1); + operands[1] = GEN_INT (INTVAL (operands[1]) - 1); output_asm_insn(\"INSFW %1, %2, %3, %0\",operands); return \"\"; |