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-rw-r--r--gcc/config/arm/arm.c4
-rw-r--r--gcc/config/bfin/bfin.c4
-rw-r--r--gcc/config/c6x/c6x.c6
-rw-r--r--gcc/config/epiphany/resolve-sw-modes.c2
-rw-r--r--gcc/config/frv/frv.c4
-rw-r--r--gcc/config/i386/i386.c2
-rw-r--r--gcc/config/ia64/ia64.c2
-rw-r--r--gcc/config/mips/mips.c2
-rw-r--r--gcc/config/picochip/picochip.c2
-rw-r--r--gcc/config/rs6000/rs6000.c2
-rw-r--r--gcc/config/s390/s390.c2
-rw-r--r--gcc/config/sh/sh_treg_combine.cc2
-rw-r--r--gcc/config/spu/spu.c2
-rw-r--r--gcc/config/tilegx/tilegx.c4
-rw-r--r--gcc/config/tilepro/tilepro.c4
15 files changed, 22 insertions, 22 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index bed24376d1b..7027a262bcf 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -16673,7 +16673,7 @@ thumb1_reorg (void)
{
basic_block bb;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx dest, src;
rtx pat, op0, set = NULL;
@@ -16751,7 +16751,7 @@ thumb2_reorg (void)
compute_bb_for_insn ();
df_analyze ();
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx insn;
diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index a1adf8010b6..c15451cd2ed 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -3957,7 +3957,7 @@ static void
bfin_gen_bundles (void)
{
basic_block bb;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx insn, next;
rtx slot[3];
@@ -4036,7 +4036,7 @@ static void
reorder_var_tracking_notes (void)
{
basic_block bb;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx insn, next;
rtx queue = NULL_RTX;
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index af310bac8dc..6f80bc8aa4b 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -4629,7 +4629,7 @@ c6x_gen_bundles (void)
basic_block bb;
rtx insn, next, last_call;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx insn, next;
/* The machine is eight insns wide. We can have up to six shadow
@@ -5383,7 +5383,7 @@ conditionalize_after_sched (void)
{
basic_block bb;
rtx insn;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
FOR_BB_INSNS (bb, insn)
{
unsigned uid = INSN_UID (insn);
@@ -5959,7 +5959,7 @@ c6x_reorg (void)
if (c6x_flag_schedule_insns2)
{
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
if ((bb->flags & BB_DISABLE_SCHEDULE) == 0)
assign_reservations (BB_HEAD (bb), BB_END (bb));
}
diff --git a/gcc/config/epiphany/resolve-sw-modes.c b/gcc/config/epiphany/resolve-sw-modes.c
index a780254410d..30f6920aba0 100644
--- a/gcc/config/epiphany/resolve-sw-modes.c
+++ b/gcc/config/epiphany/resolve-sw-modes.c
@@ -69,7 +69,7 @@ resolve_sw_modes (void)
df_note_add_problem ();
df_analyze ();
}
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
FOR_BB_INSNS (bb, insn)
{
enum attr_fp_mode selected_mode;
diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c
index a5aeb75b3d5..3755e62bf96 100644
--- a/gcc/config/frv/frv.c
+++ b/gcc/config/frv/frv.c
@@ -8070,11 +8070,11 @@ frv_optimize_membar (void)
first_io = XCNEWVEC (struct frv_io, last_basic_block_for_fn (cfun));
last_membar = XCNEWVEC (rtx, last_basic_block_for_fn (cfun));
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
frv_optimize_membar_local (bb, &first_io[bb->index],
&last_membar[bb->index]);
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
if (last_membar[bb->index] != 0)
frv_optimize_membar_global (bb, first_io, last_membar[bb->index]);
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 5dde632f7e5..5a75bf96ff6 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -10500,7 +10500,7 @@ ix86_finalize_stack_realign_flags (void)
add_to_hard_reg_set (&set_up_by_prologue, Pmode, ARG_POINTER_REGNUM);
add_to_hard_reg_set (&set_up_by_prologue, Pmode,
HARD_FRAME_POINTER_REGNUM);
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx insn;
FOR_BB_INSNS (bb, insn)
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 8f305c1153c..a8379745a14 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -9688,7 +9688,7 @@ ia64_reorg (void)
/* We can't let modulo-sched prevent us from scheduling any bbs,
since we need the final schedule to produce bundle information. */
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
bb->flags &= ~BB_DISABLE_SCHEDULE;
initiate_bundle_states ();
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index f19478c10c8..e65dc6bda6a 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -15332,7 +15332,7 @@ mips_annotate_pic_calls (void)
basic_block bb;
rtx insn;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
FOR_BB_INSNS (bb, insn)
{
rtx call, reg, symbol, second_call;
diff --git a/gcc/config/picochip/picochip.c b/gcc/config/picochip/picochip.c
index 4756cb78b72..8861ffc7706 100644
--- a/gcc/config/picochip/picochip.c
+++ b/gcc/config/picochip/picochip.c
@@ -3174,7 +3174,7 @@ reorder_var_tracking_notes (void)
{
basic_block bb;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx insn, next, last_insn = NULL_RTX;
rtx queue = NULL_RTX;
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 599cf49570f..1db97fa0323 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -16395,7 +16395,7 @@ rs6000_alloc_sdmode_stack_slot (void)
if (TARGET_NO_SDMODE_STACK)
return;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
for (gsi = gsi_start_bb (bb); !gsi_end_p (gsi); gsi_next (&gsi))
{
tree ret = walk_gimple_op (gsi_stmt (gsi), rs6000_check_sdmode, NULL);
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index fcd75327e0c..f9b7cd0f741 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -7458,7 +7458,7 @@ s390_regs_ever_clobbered (char regs_ever_clobbered[])
if (!call_really_used_regs[i])
regs_ever_clobbered[i] = 1;
- FOR_EACH_BB (cur_bb)
+ FOR_EACH_BB_FN (cur_bb, cfun)
{
FOR_BB_INSNS (cur_bb, cur_insn)
{
diff --git a/gcc/config/sh/sh_treg_combine.cc b/gcc/config/sh/sh_treg_combine.cc
index 0f9027ec763..fc4a1c03bce 100644
--- a/gcc/config/sh/sh_treg_combine.cc
+++ b/gcc/config/sh/sh_treg_combine.cc
@@ -1469,7 +1469,7 @@ sh_treg_combine::execute (void)
// Look for basic blocks that end with a conditional branch and try to
// optimize them.
basic_block bb;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx i = BB_END (bb);
if (any_condjump_p (i) && onlyjump_p (i))
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index 1a9895ea8e1..66209b675ad 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -2645,7 +2645,7 @@ spu_machine_dependent_reorg (void)
find_many_sub_basic_blocks (blocks);
/* We have to schedule to make sure alignment is ok. */
- FOR_EACH_BB (bb) bb->flags &= ~BB_DISABLE_SCHEDULE;
+ FOR_EACH_BB_FN (bb, cfun) bb->flags &= ~BB_DISABLE_SCHEDULE;
/* The hints need to be scheduled, so call it again. */
schedule_insns ();
diff --git a/gcc/config/tilegx/tilegx.c b/gcc/config/tilegx/tilegx.c
index c2f9e070a29..eecc9a926c3 100644
--- a/gcc/config/tilegx/tilegx.c
+++ b/gcc/config/tilegx/tilegx.c
@@ -4383,7 +4383,7 @@ static void
tilegx_gen_bundles (void)
{
basic_block bb;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx insn, next;
rtx end = NEXT_INSN (BB_END (bb));
@@ -4709,7 +4709,7 @@ static void
reorder_var_tracking_notes (void)
{
basic_block bb;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx insn, next;
rtx queue = NULL_RTX;
diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c
index 31bc4908965..b2bafb4f300 100644
--- a/gcc/config/tilepro/tilepro.c
+++ b/gcc/config/tilepro/tilepro.c
@@ -3988,7 +3988,7 @@ static void
tilepro_gen_bundles (void)
{
basic_block bb;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx insn, next;
rtx end = NEXT_INSN (BB_END (bb));
@@ -4259,7 +4259,7 @@ static void
reorder_var_tracking_notes (void)
{
basic_block bb;
- FOR_EACH_BB (bb)
+ FOR_EACH_BB_FN (bb, cfun)
{
rtx insn, next;
rtx queue = NULL_RTX;
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