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Diffstat (limited to 'gcc/config/s390/s390.md')
-rw-r--r--gcc/config/s390/s390.md67
1 files changed, 36 insertions, 31 deletions
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index ed08f6ee6a6..b6a54469498 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -1440,7 +1440,7 @@
(define_insn "*la_64"
[(set (match_operand:DI 0 "register_operand" "=d,d")
- (match_operand:QI 1 "address_operand" "U,W"))]
+ (match_operand:QI 1 "address_operand" "ZQZR,ZSZT"))]
"TARGET_64BIT"
"@
la\t%0,%a1
@@ -1623,7 +1623,7 @@
(define_insn "*la_31"
[(set (match_operand:SI 0 "register_operand" "=d,d")
- (match_operand:QI 1 "address_operand" "U,W"))]
+ (match_operand:QI 1 "address_operand" "ZQZR,ZSZT"))]
"!TARGET_64BIT && legitimate_la_operand_p (operands[1])"
"@
la\t%0,%a1
@@ -1658,7 +1658,7 @@
(define_insn "*la_31_and"
[(set (match_operand:SI 0 "register_operand" "=d,d")
- (and:SI (match_operand:QI 1 "address_operand" "U,W")
+ (and:SI (match_operand:QI 1 "address_operand" "ZQZR,ZSZT")
(const_int 2147483647)))]
"!TARGET_64BIT"
"@
@@ -1684,7 +1684,7 @@
(define_insn "force_la_31"
[(set (match_operand:SI 0 "register_operand" "=d,d")
- (match_operand:QI 1 "address_operand" "U,W"))
+ (match_operand:QI 1 "address_operand" "ZQZR,ZSZT"))
(use (const_int 0))]
"!TARGET_64BIT"
"@
@@ -7402,7 +7402,7 @@
[(set (pc)
(if_then_else
(match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)])
- (match_operand 0 "address_operand" "U")
+ (match_operand 0 "address_operand" "ZQZR")
(pc)))]
""
{
@@ -7466,7 +7466,7 @@
(if_then_else
(match_operator 1 "s390_comparison" [(reg CC_REGNUM) (const_int 0)])
(pc)
- (match_operand 0 "address_operand" "U")))]
+ (match_operand 0 "address_operand" "ZQZR")))]
""
{
if (get_attr_op_type (insn) == OP_TYPE_RR)
@@ -7673,7 +7673,7 @@
(if_then_else
(ne (match_operand:SI 1 "register_operand" "d")
(const_int 1))
- (match_operand 0 "address_operand" "U")
+ (match_operand 0 "address_operand" "ZQZR")
(pc)))
(set (match_operand:SI 2 "register_operand" "=1")
(plus:SI (match_dup 1) (const_int -1)))
@@ -7784,7 +7784,7 @@
;
(define_insn "indirect_jump"
- [(set (pc) (match_operand 0 "address_operand" "U"))]
+ [(set (pc) (match_operand 0 "address_operand" "ZQZR"))]
""
{
if (get_attr_op_type (insn) == OP_TYPE_RR)
@@ -7803,7 +7803,7 @@
;
(define_insn "casesi_jump"
- [(set (pc) (match_operand 0 "address_operand" "U"))
+ [(set (pc) (match_operand 0 "address_operand" "ZQZR"))
(use (label_ref (match_operand 1 "" "")))]
""
{
@@ -8025,7 +8025,7 @@
(set_attr "type" "jsr")])
(define_insn "*basr"
- [(call (mem:QI (match_operand 0 "address_operand" "U"))
+ [(call (mem:QI (match_operand 0 "address_operand" "ZQZR"))
(match_operand 1 "const_int_operand" "n"))
(clobber (match_operand 2 "register_operand" "=r"))]
"!SIBLING_CALL_P (insn) && GET_MODE (operands[2]) == Pmode"
@@ -8083,7 +8083,7 @@
(define_insn "*basr_r"
[(set (match_operand 0 "" "")
- (call (mem:QI (match_operand 1 "address_operand" "U"))
+ (call (mem:QI (match_operand 1 "address_operand" "ZQZR"))
(match_operand 2 "const_int_operand" "n")))
(clobber (match_operand 3 "register_operand" "=r"))]
"!SIBLING_CALL_P (insn) && GET_MODE (operands[3]) == Pmode"
@@ -8183,7 +8183,7 @@
(define_insn "*basr_tls"
[(set (match_operand 0 "" "")
- (call (mem:QI (match_operand 1 "address_operand" "U"))
+ (call (mem:QI (match_operand 1 "address_operand" "ZQZR"))
(match_operand 2 "const_int_operand" "n")))
(clobber (match_operand 3 "register_operand" "=r"))
(use (match_operand 4 "" ""))]
@@ -8709,27 +8709,32 @@
;
(define_insn "prefetch"
- [(prefetch (match_operand 0 "address_operand" "UW,X")
- (match_operand:SI 1 "const_int_operand" "n,n")
- (match_operand:SI 2 "const_int_operand" "n,n"))]
- "TARGET_Z10"
+ [(prefetch (match_operand 0 "address_operand" "ZQZS,ZRZT,X")
+ (match_operand:SI 1 "const_int_operand" " n, n,n")
+ (match_operand:SI 2 "const_int_operand" " n, n,n"))]
+ "TARGET_ZARCH && s390_tune == PROCESSOR_2097_Z10"
{
- if (larl_operand (operands[0], Pmode))
- return INTVAL (operands[1]) == 1 ? "pfdrl\t2,%a0" : "pfdrl\t1,%a0";
-
- if (s390_mem_constraint ("W", operands[0])
- || s390_mem_constraint ("U", operands[0]))
- return INTVAL (operands[1]) == 1 ? "pfd\t2,%a0" : "pfd\t1,%a0";
-
- /* This point might be reached if op0 is a larl operand with an
- uneven addend. In this case we simply omit issuing a prefetch
- instruction. */
-
- return "";
+ switch (which_alternative)
+ {
+ case 0:
+ return INTVAL (operands[1]) == 1 ? "stcmh\t2,0,%a0" : "stcmh\t1,0,%a0";
+ case 1:
+ return INTVAL (operands[1]) == 1 ? "pfd\t2,%a0" : "pfd\t1,%a0";
+ case 2:
+ if (larl_operand (operands[0], Pmode))
+ return INTVAL (operands[1]) == 1 ? "pfdrl\t2,%a0" : "pfdrl\t1,%a0";
+ default:
+
+ /* This might be reached for symbolic operands with an odd
+ addend. We simply omit the prefetch for such rare cases. */
+
+ return "";
+ }
}
- [(set_attr "type" "load,larl")
- (set_attr "op_type" "RXY,RIL")
- (set_attr "z10prop" "z10_super")])
+ [(set_attr "type" "store,load,larl")
+ (set_attr "op_type" "RSY,RXY,RIL")
+ (set_attr "z10prop" "z10_super")
+ (set_attr "cpu_facility" "*,z10,z10")])
;