diff options
Diffstat (limited to 'gcc/config/rs6000')
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 24 |
1 files changed, 19 insertions, 5 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 1e70996c888..9172e28de04 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -5047,8 +5047,9 @@ function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode, || mode == DDmode || mode == TDmode || (mode == TFmode && !TARGET_IEEEQUAD))) { - /* _Decimal128 must use an even/odd register pair. */ - if (mode == TDmode && cum->fregno % 2) + /* _Decimal128 must use an even/odd register pair. This assumes + that the register number is odd when fregno is odd. */ + if (mode == TDmode && (cum->fregno % 2) == 1) cum->fregno++; if (cum->fregno + (mode == TFmode || mode == TDmode ? 1 : 0) @@ -5111,7 +5112,14 @@ function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode, if (SCALAR_FLOAT_MODE_P (mode) && mode != SDmode && TARGET_HARD_FLOAT && TARGET_FPRS) - cum->fregno += (GET_MODE_SIZE (mode) + 7) >> 3; + { + /* _Decimal128 must be passed in an even/odd float register pair. + This assumes that the register number is odd when fregno is + odd. */ + if (mode == TDmode && (cum->fregno % 2) == 1) + cum->fregno++; + cum->fregno += (GET_MODE_SIZE (mode) + 7) >> 3; + } if (TARGET_DEBUG_ARG) { @@ -5603,8 +5611,9 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, || (mode == TFmode && !TARGET_IEEEQUAD) || mode == DDmode || mode == TDmode)) { - /* _Decimal128 must use an even/odd register pair. */ - if (mode == TDmode && cum->fregno % 2) + /* _Decimal128 must use an even/odd register pair. This assumes + that the register number is odd when fregno is odd. */ + if (mode == TDmode && (cum->fregno % 2) == 1) cum->fregno++; if (cum->fregno + (mode == TFmode || mode == TDmode ? 1 : 0) @@ -5638,6 +5647,11 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, { int align_words = rs6000_parm_start (mode, type, cum->words); + /* _Decimal128 must be passed in an even/odd float register pair. + This assumes that the register number is odd when fregno is odd. */ + if (mode == TDmode && (cum->fregno % 2) == 1) + cum->fregno++; + if (USE_FP_FOR_ARG_P (cum, mode, type)) { rtx rvec[GP_ARG_NUM_REG + 1]; |