diff options
Diffstat (limited to 'gcc/config/rs6000')
-rw-r--r-- | gcc/config/rs6000/altivec.md | 16 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 28 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.h | 9 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 52 |
4 files changed, 66 insertions, 39 deletions
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 80e82cc9c29..9fbced17365 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -2394,8 +2394,8 @@ (define_insn "altivec_stvlx" [(parallel - [(set (match_operand:V4SI 0 "memory_operand" "=Z") - (match_operand:V4SI 1 "register_operand" "v")) + [(set (match_operand:V16QI 0 "memory_operand" "=Z") + (match_operand:V16QI 1 "register_operand" "v")) (unspec [(const_int 0)] UNSPEC_STVLX)])] "TARGET_ALTIVEC && rs6000_cpu == PROCESSOR_CELL" "stvlx %1,%y0" @@ -2403,8 +2403,8 @@ (define_insn "altivec_stvlxl" [(parallel - [(set (match_operand:V4SI 0 "memory_operand" "=Z") - (match_operand:V4SI 1 "register_operand" "v")) + [(set (match_operand:V16QI 0 "memory_operand" "=Z") + (match_operand:V16QI 1 "register_operand" "v")) (unspec [(const_int 0)] UNSPEC_STVLXL)])] "TARGET_ALTIVEC && rs6000_cpu == PROCESSOR_CELL" "stvlxl %1,%y0" @@ -2412,8 +2412,8 @@ (define_insn "altivec_stvrx" [(parallel - [(set (match_operand:V4SI 0 "memory_operand" "=Z") - (match_operand:V4SI 1 "register_operand" "v")) + [(set (match_operand:V16QI 0 "memory_operand" "=Z") + (match_operand:V16QI 1 "register_operand" "v")) (unspec [(const_int 0)] UNSPEC_STVRX)])] "TARGET_ALTIVEC && rs6000_cpu == PROCESSOR_CELL" "stvrx %1,%y0" @@ -2421,8 +2421,8 @@ (define_insn "altivec_stvrxl" [(parallel - [(set (match_operand:V4SI 0 "memory_operand" "=Z") - (match_operand:V4SI 1 "register_operand" "v")) + [(set (match_operand:V16QI 0 "memory_operand" "=Z") + (match_operand:V16QI 1 "register_operand" "v")) (unspec [(const_int 0)] UNSPEC_STVRXL)])] "TARGET_ALTIVEC && rs6000_cpu == PROCESSOR_CELL" "stvrxl %1,%y0" diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 5c101a51aff..36aba430eb9 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -15822,7 +15822,6 @@ void print_operand (FILE *file, rtx x, int code) { int i; - HOST_WIDE_INT val; unsigned HOST_WIDE_INT uval; switch (code) @@ -16263,34 +16262,17 @@ print_operand (FILE *file, rtx x, int code) case 'W': /* MB value for a PowerPC64 rldic operand. */ - val = (GET_CODE (x) == CONST_INT - ? INTVAL (x) : CONST_DOUBLE_HIGH (x)); - - if (val < 0) - i = -1; - else - for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) - if ((val <<= 1) < 0) - break; + i = clz_hwi (GET_CODE (x) == CONST_INT + ? INTVAL (x) : CONST_DOUBLE_HIGH (x)); #if HOST_BITS_PER_WIDE_INT == 32 - if (GET_CODE (x) == CONST_INT && i >= 0) + if (GET_CODE (x) == CONST_INT && i > 0) i += 32; /* zero-extend high-part was all 0's */ else if (GET_CODE (x) == CONST_DOUBLE && i == 32) - { - val = CONST_DOUBLE_LOW (x); - - gcc_assert (val); - if (val < 0) - --i; - else - for ( ; i < 64; i++) - if ((val <<= 1) < 0) - break; - } + i = clz_hwi (CONST_DOUBLE_LOW (x)) + 32; #endif - fprintf (file, "%d", i + 1); + fprintf (file, "%d", i); return; case 'x': diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index a8d42398ec5..0eae3265a0f 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -469,10 +469,11 @@ extern int rs6000_vector_align[]; /* ISA 2.01 allowed FCFID to be done in 32-bit, previously it was 64-bit only. Enable 32-bit fcfid's on any of the switches for newer ISA machines or XILINX. */ -#define TARGET_FCFID (TARGET_POWERPC64 \ - || TARGET_POPCNTB /* ISA 2.02 */ \ - || TARGET_CMPB /* ISA 2.05 */ \ - || TARGET_POPCNTD /* ISA 2.06 */ \ +#define TARGET_FCFID (TARGET_POWERPC64 \ + || TARGET_PPC_GPOPT /* 970/power4 */ \ + || TARGET_POPCNTB /* ISA 2.02 */ \ + || TARGET_CMPB /* ISA 2.05 */ \ + || TARGET_POPCNTD /* ISA 2.06 */ \ || TARGET_XILINX_FPU) #define TARGET_FCTIDZ TARGET_FCFID diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 16be86c27a4..7befb56a378 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -2524,7 +2524,18 @@ if (GET_CODE (addr1) == PLUS) { emit_insn (gen_add3_insn (op2, XEXP (addr1, 0), GEN_INT (4))); - addr2 = gen_rtx_PLUS (Pmode, op2, XEXP (addr1, 1)); + if (TARGET_AVOID_XFORM) + { + emit_insn (gen_add3_insn (op2, XEXP (addr1, 1), op2)); + addr2 = op2; + } + else + addr2 = gen_rtx_PLUS (Pmode, op2, XEXP (addr1, 1)); + } + else if (TARGET_AVOID_XFORM) + { + emit_insn (gen_add3_insn (op2, addr1, GEN_INT (4))); + addr2 = op2; } else { @@ -2574,7 +2585,18 @@ if (GET_CODE (addr1) == PLUS) { emit_insn (gen_add3_insn (op2, XEXP (addr1, 0), GEN_INT (4))); - addr2 = gen_rtx_PLUS (Pmode, op2, XEXP (addr1, 1)); + if (TARGET_AVOID_XFORM) + { + emit_insn (gen_add3_insn (op2, XEXP (addr1, 1), op2)); + addr2 = op2; + } + else + addr2 = gen_rtx_PLUS (Pmode, op2, XEXP (addr1, 1)); + } + else if (TARGET_AVOID_XFORM) + { + emit_insn (gen_add3_insn (op2, addr1, GEN_INT (4))); + addr2 = op2; } else { @@ -2655,7 +2677,18 @@ if (GET_CODE (addr1) == PLUS) { emit_insn (gen_add3_insn (op2, XEXP (addr1, 0), GEN_INT (4))); - addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1)); + if (TARGET_AVOID_XFORM) + { + emit_insn (gen_add3_insn (op2, XEXP (addr1, 1), op2)); + addr2 = op2; + } + else + addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1)); + } + else if (TARGET_AVOID_XFORM) + { + emit_insn (gen_add3_insn (op2, addr1, GEN_INT (4))); + addr2 = op2; } else { @@ -2700,7 +2733,18 @@ if (GET_CODE (addr1) == PLUS) { emit_insn (gen_add3_insn (op2, XEXP (addr1, 0), GEN_INT (4))); - addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1)); + if (TARGET_AVOID_XFORM) + { + emit_insn (gen_add3_insn (op2, XEXP (addr1, 1), op2)); + addr2 = op2; + } + else + addr2 = gen_rtx_PLUS (SImode, op2, XEXP (addr1, 1)); + } + else if (TARGET_AVOID_XFORM) + { + emit_insn (gen_add3_insn (op2, addr1, GEN_INT (4))); + addr2 = op2; } else { |