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-rw-r--r--gcc/config/rs6000/aix.h4
-rw-r--r--gcc/config/rs6000/aix41.h2
-rw-r--r--gcc/config/rs6000/aix43.h6
-rw-r--r--gcc/config/rs6000/beos.h8
-rw-r--r--gcc/config/rs6000/rs6000.h76
-rw-r--r--gcc/config/rs6000/sysv4.h91
6 files changed, 105 insertions, 82 deletions
diff --git a/gcc/config/rs6000/aix.h b/gcc/config/rs6000/aix.h
index fdd74d979ce..0487863212a 100644
--- a/gcc/config/rs6000/aix.h
+++ b/gcc/config/rs6000/aix.h
@@ -251,9 +251,9 @@ toc_section () \
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
{"xl-call", MASK_XL_CALL, \
- "Always pass floating-point arguments in memory" }, \
+ N_("Always pass floating-point arguments in memory") }, \
{"no-xl-call", - MASK_XL_CALL, \
- "Don't always pass floating-point arguments in memory" }, \
+ N_("Don't always pass floating-point arguments in memory") }, \
SUBSUBTARGET_SWITCHES
#define SUBSUBTARGET_SWITCHES
diff --git a/gcc/config/rs6000/aix41.h b/gcc/config/rs6000/aix41.h
index a884c7e0b6c..eb2c3fd3fd2 100644
--- a/gcc/config/rs6000/aix41.h
+++ b/gcc/config/rs6000/aix41.h
@@ -28,7 +28,7 @@ Boston, MA 02111-1307, USA. */
#undef SUBSUBTARGET_SWITCHES
#define SUBSUBTARGET_SWITCHES \
{"pe", 0, \
- "Support message passing with the Parallel Environment" },
+ N_("Support message passing with the Parallel Environment") },
#undef ASM_SPEC
#define ASM_SPEC "-u %(asm_cpu)"
diff --git a/gcc/config/rs6000/aix43.h b/gcc/config/rs6000/aix43.h
index b939bed0a6d..a9114b5acd0 100644
--- a/gcc/config/rs6000/aix43.h
+++ b/gcc/config/rs6000/aix43.h
@@ -28,11 +28,11 @@ Boston, MA 02111-1307, USA. */
#undef SUBSUBTARGET_SWITCHES
#define SUBSUBTARGET_SWITCHES \
{"aix64", MASK_64BIT | MASK_POWERPC64 | MASK_POWERPC, \
- "Compile for 64-bit pointers" }, \
+ N_("Compile for 64-bit pointers") }, \
{"aix32", - (MASK_64BIT | MASK_POWERPC64), \
- "Compile for 32-bit pointers" }, \
+ N_("Compile for 32-bit pointers") }, \
{"pe", 0, \
- "Support message passing with the Parallel Environment" },
+ N_("Support message passing with the Parallel Environment") },
/* Sometimes certain combinations of command options do not make sense
on a particular target machine. You can define a macro
diff --git a/gcc/config/rs6000/beos.h b/gcc/config/rs6000/beos.h
index 6643691af76..8d850e25257 100644
--- a/gcc/config/rs6000/beos.h
+++ b/gcc/config/rs6000/beos.h
@@ -29,9 +29,11 @@ Boston, MA 02111-1307, USA. */
#define TARGET_XL_CALL (target_flags & MASK_XL_CALL)
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
- {"xl-call", MASK_XL_CALL}, \
- {"no-xl-call", - MASK_XL_CALL}, \
- {"threads", 0}, \
+ {"xl-call", MASK_XL_CALL, \
+ N_("Always pass floating-point arguments in memory") }, \
+ {"no-xl-call", - MASK_XL_CALL, \
+ N_("Don't always pass floating-point arguments in memory") }, \
+ {"threads", 0}, \
{"pe", 0},
#undef ASM_SPEC
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index fdbcb977dc9..375d379f5cd 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -253,81 +253,81 @@ extern int target_flags;
#define TARGET_SWITCHES \
{{"power", MASK_POWER | MASK_MULTIPLE | MASK_STRING, \
- "Use POWER instruction set"}, \
+ N_("Use POWER instruction set")}, \
{"power2", (MASK_POWER | MASK_MULTIPLE | MASK_STRING \
| MASK_POWER2), \
- "Use POWER2 instruction set"}, \
+ N_("Use POWER2 instruction set")}, \
{"no-power2", - MASK_POWER2, \
- "Do not use POWER2 instruction set"}, \
+ N_("Do not use POWER2 instruction set")}, \
{"no-power", - (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE \
| MASK_STRING), \
- "Do not use POWER instruction set"}, \
+ N_("Do not use POWER instruction set")}, \
{"powerpc", MASK_POWERPC, \
- "Use PowerPC instruction set"}, \
+ N_("Use PowerPC instruction set")}, \
{"no-powerpc", - (MASK_POWERPC | MASK_PPC_GPOPT \
| MASK_PPC_GFXOPT | MASK_POWERPC64), \
- "Do not use PowerPC instruction set"}, \
+ N_("Do not use PowerPC instruction set")}, \
{"powerpc-gpopt", MASK_POWERPC | MASK_PPC_GPOPT, \
- "Use PowerPC General Purpose group optional instructions"},\
+ N_("Use PowerPC General Purpose group optional instructions")},\
{"no-powerpc-gpopt", - MASK_PPC_GPOPT, \
- "Don't use PowerPC General Purpose group optional instructions"},\
+ N_("Don't use PowerPC General Purpose group optional instructions")},\
{"powerpc-gfxopt", MASK_POWERPC | MASK_PPC_GFXOPT, \
- "Use PowerPC Graphics group optional instructions"},\
+ N_("Use PowerPC Graphics group optional instructions")},\
{"no-powerpc-gfxopt", - MASK_PPC_GFXOPT, \
- "Don't use PowerPC Graphics group optional instructions"},\
+ N_("Don't use PowerPC Graphics group optional instructions")},\
{"powerpc64", MASK_POWERPC64, \
- "Use PowerPC-64 instruction set"}, \
+ N_("Use PowerPC-64 instruction set")}, \
{"no-powerpc64", - MASK_POWERPC64, \
- "Don't use PowerPC-64 instruction set"}, \
+ N_("Don't use PowerPC-64 instruction set")}, \
{"new-mnemonics", MASK_NEW_MNEMONICS, \
- "Use new mnemonics for PowerPC architecture"}, \
+ N_("Use new mnemonics for PowerPC architecture")},\
{"old-mnemonics", -MASK_NEW_MNEMONICS, \
- "Use old mnemonics for PowerPC architecture"}, \
+ N_("Use old mnemonics for PowerPC architecture")},\
{"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \
| MASK_MINIMAL_TOC), \
- "Put everything in the regular TOC"}, \
+ N_("Put everything in the regular TOC")}, \
{"fp-in-toc", - MASK_NO_FP_IN_TOC, \
- "Place floating point constants in TOC"}, \
+ N_("Place floating point constants in TOC")}, \
{"no-fp-in-toc", MASK_NO_FP_IN_TOC, \
- "Don't place floating point constants in TOC"}, \
+ N_("Don't place floating point constants in TOC")},\
{"sum-in-toc", - MASK_NO_SUM_IN_TOC, \
- "Place symbol+offset constants in TOC"}, \
+ N_("Place symbol+offset constants in TOC")}, \
{"no-sum-in-toc", MASK_NO_SUM_IN_TOC, \
- "Don't place symbol+offset constants in TOC"}, \
+ N_("Don't place symbol+offset constants in TOC")},\
{"minimal-toc", MASK_MINIMAL_TOC, \
"Use only one TOC entry per procedure"}, \
{"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC), \
- ""}, \
+ ""}, \
{"no-minimal-toc", - MASK_MINIMAL_TOC, \
- "Place variable addresses in the regular TOC"}, \
+ N_("Place variable addresses in the regular TOC")},\
{"hard-float", - MASK_SOFT_FLOAT, \
- "Use hardware fp"}, \
+ N_("Use hardware fp")}, \
{"soft-float", MASK_SOFT_FLOAT, \
- "Do not use hardware fp"}, \
+ N_("Do not use hardware fp")}, \
{"multiple", MASK_MULTIPLE | MASK_MULTIPLE_SET, \
- "Generate load/store multiple instructions"}, \
+ N_("Generate load/store multiple instructions")}, \
{"no-multiple", - MASK_MULTIPLE, \
- "Do not generate load/store multiple instructions"},\
+ N_("Do not generate load/store multiple instructions")},\
{"no-multiple", MASK_MULTIPLE_SET, \
- ""},\
+ ""}, \
{"string", MASK_STRING | MASK_STRING_SET, \
- "Generate string instructions for block moves"},\
+ N_("Generate string instructions for block moves")},\
{"no-string", - MASK_STRING, \
- "Do not generate string instructions for block moves"},\
+ N_("Do not generate string instructions for block moves")},\
{"no-string", MASK_STRING_SET, \
- ""},\
+ ""}, \
{"update", - MASK_NO_UPDATE, \
- "Generate load/store with update instructions"},\
+ N_("Generate load/store with update instructions")},\
{"no-update", MASK_NO_UPDATE, \
- "Do not generate load/store with update instructions"},\
+ N_("Do not generate load/store with update instructions")},\
{"fused-madd", - MASK_NO_FUSED_MADD, \
- "Generate fused multiply/add instructions"}, \
+ N_("Generate fused multiply/add instructions")},\
{"no-fused-madd", MASK_NO_FUSED_MADD, \
- "Don't generate fused multiply/add instructions"},\
+ N_("Don't generate fused multiply/add instructions")},\
{"sched-prolog", MASK_SCHED_PROLOG, \
""}, \
{"no-sched-prolog", -MASK_SCHED_PROLOG, \
- "Don't schedule the start and end of the procedure"},\
+ N_("Don't schedule the start and end of the procedure")},\
{"sched-epilog", MASK_SCHED_PROLOG, \
""}, \
{"no-sched-epilog", -MASK_SCHED_PROLOG, \
@@ -399,9 +399,11 @@ extern enum processor_type rs6000_cpu;
#define TARGET_OPTIONS \
{ \
- {"cpu=", &rs6000_select[1].string, "Use features of and schedule code for given CPU" },\
- {"tune=", &rs6000_select[2].string, "Schedule code for given CPU" }, \
- {"debug=", &rs6000_debug_name, "Enable debug output" }, \
+ {"cpu=", &rs6000_select[1].string, \
+ N_("Use features of and schedule code for given CPU") }, \
+ {"tune=", &rs6000_select[2].string, \
+ N_("Schedule code for given CPU") }, \
+ {"debug=", &rs6000_debug_name, N_("Enable debug output") }, \
SUBTARGET_OPTIONS \
}
diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h
index c9d9ba89eda..85ce2612a81 100644
--- a/gcc/config/rs6000/sysv4.h
+++ b/gcc/config/rs6000/sysv4.h
@@ -87,8 +87,8 @@ extern const char *rs6000_sdata_name;
/* Override rs6000.h definition. */
#undef SUBTARGET_OPTIONS
#define SUBTARGET_OPTIONS \
- { "call-", &rs6000_abi_name, "Select ABI calling convention." }, \
- { "sdata=", &rs6000_sdata_name, "Select method for sdata handling." }
+ { "call-", &rs6000_abi_name, N_("Select ABI calling convention.") }, \
+ { "sdata=", &rs6000_sdata_name, N_("Select method for sdata handling.") }
/* Max # of bytes for variables to automatically be put into the .sdata
or .sdata2 sections. */
@@ -102,40 +102,59 @@ extern int g_switch_set; /* Whether -G xx was passed. */
/* Override rs6000.h definition. */
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
- { "bit-align", -MASK_NO_BITFIELD_TYPE, "Align to the base type of the bitfield." },\
- { "no-bit-align", MASK_NO_BITFIELD_TYPE, "Don't align to the base type of the bitfield." },\
- { "strict-align", MASK_STRICT_ALIGN, "Don't assume that unaligned accesses are handled by the system" },\
- { "no-strict-align", -MASK_STRICT_ALIGN, "Assume that unaligned accesses are handled by the system" },\
- { "relocatable", MASK_RELOCATABLE | MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC, "Produce code relocatable at runtime." },\
- { "no-relocatable", -MASK_RELOCATABLE, "Don't produce code relocatable at runtime." },\
- { "relocatable-lib", MASK_RELOCATABLE | MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC, "Produce code relocatable at runtime." },\
- { "no-relocatable-lib", -MASK_RELOCATABLE, "Don't produce code relocatable at runtime." },\
- { "little-endian", MASK_LITTLE_ENDIAN, "Produce little endian code." }, \
- { "little", MASK_LITTLE_ENDIAN, "Produce little endian code." }, \
- { "big-endian", -MASK_LITTLE_ENDIAN, "Produce big endian code." }, \
- { "big", -MASK_LITTLE_ENDIAN, "Produce big endian code." }, \
- { "no-toc", 0, "no description yet" }, \
- { "toc", MASK_MINIMAL_TOC, "no description yet" }, \
- { "full-toc", MASK_MINIMAL_TOC, "no description yet" }, \
- { "prototype", MASK_PROTOTYPE, "no description yet" }, \
- { "no-prototype", -MASK_PROTOTYPE, "no description yet" }, \
- { "no-traceback", 0, "no description yet" }, \
- { "eabi", MASK_EABI, "Use EABI." }, \
- { "no-eabi", -MASK_EABI, "Don't use EABI." }, \
- { "regnames", MASK_REGNAMES, "Use alternate register names." }, \
- { "no-regnames", -MASK_REGNAMES, "Don't use alternate register names." },\
- { "sdata", 0, "no description yet" }, \
- { "no-sdata", 0, "no description yet" }, \
- { "sim", 0, "Link with libsim.a, libc.a and sim-crt0.o." }, \
- { "ads", 0, "Link with libads.a, libc.a and crt0.o." }, \
- { "yellowknife", 0, "Link with libyk.a, libc.a and crt0.o." }, \
- { "mvme", 0, "Link with libmvme.a, libc.a and crt0.o." }, \
- { "emb", 0, "Set the PPC_EMB bit in the ELF flags header" }, \
- { "vxworks", 0, "no description yet" }, \
- { "solaris-cclib", 0, "no description yet" }, \
- { "shlib", 0, "no description yet" }, \
- EXTRA_SUBTARGET_SWITCHES \
- { "newlib", 0, "no description yet" },
+ { "bit-align", -MASK_NO_BITFIELD_TYPE, \
+ N_("Align to the base type of the bitfield.") }, \
+ { "no-bit-align", MASK_NO_BITFIELD_TYPE, \
+ N_("Don't align to the base type of the bitfield.") }, \
+ { "strict-align", MASK_STRICT_ALIGN, \
+ N_("Don't assume that unaligned accesses are handled by the system") }, \
+ { "no-strict-align", -MASK_STRICT_ALIGN, \
+ N_("Assume that unaligned accesses are handled by the system") }, \
+ { "relocatable", MASK_RELOCATABLE | MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC, \
+ N_("Produce code relocatable at runtime.") }, \
+ { "no-relocatable", -MASK_RELOCATABLE, \
+ N_("Don't produce code relocatable at runtime.") }, \
+ { "relocatable-lib", MASK_RELOCATABLE | MASK_MINIMAL_TOC | MASK_NO_FP_IN_TOC, \
+ N_("Produce code relocatable at runtime.") }, \
+ { "no-relocatable-lib", -MASK_RELOCATABLE, \
+ N_("Don't produce code relocatable at runtime.") }, \
+ { "little-endian", MASK_LITTLE_ENDIAN, \
+ N_("Produce little endian code.") }, \
+ { "little", MASK_LITTLE_ENDIAN, \
+ N_("Produce little endian code.") }, \
+ { "big-endian", -MASK_LITTLE_ENDIAN, \
+ N_("Produce big endian code.") }, \
+ { "big", -MASK_LITTLE_ENDIAN, \
+ N_("Produce big endian code.") }, \
+ { "no-toc", 0, N_("no description yet") }, \
+ { "toc", MASK_MINIMAL_TOC, N_("no description yet") }, \
+ { "full-toc", MASK_MINIMAL_TOC, N_("no description yet") }, \
+ { "prototype", MASK_PROTOTYPE, N_("no description yet") }, \
+ { "no-prototype", -MASK_PROTOTYPE, N_("no description yet") }, \
+ { "no-traceback", 0, N_("no description yet") }, \
+ { "eabi", MASK_EABI, N_("Use EABI.") }, \
+ { "no-eabi", -MASK_EABI, N_("Don't use EABI.") }, \
+ { "regnames", MASK_REGNAMES, \
+ N_("Use alternate register names.") }, \
+ { "no-regnames", -MASK_REGNAMES, \
+ N_("Don't use alternate register names.") }, \
+ { "sdata", 0, N_("no description yet") }, \
+ { "no-sdata", 0, N_("no description yet") }, \
+ { "sim", 0, \
+ N_("Link with libsim.a, libc.a and sim-crt0.o.") }, \
+ { "ads", 0, \
+ N_("Link with libads.a, libc.a and crt0.o.") }, \
+ { "yellowknife", 0, \
+ N_("Link with libyk.a, libc.a and crt0.o.") }, \
+ { "mvme", 0, \
+ N_("Link with libmvme.a, libc.a and crt0.o.") }, \
+ { "emb", 0, \
+ N_("Set the PPC_EMB bit in the ELF flags header") }, \
+ { "vxworks", 0, N_("no description yet") }, \
+ { "solaris-cclib", 0, N_("no description yet") }, \
+ { "shlib", 0, N_("no description yet") }, \
+ EXTRA_SUBTARGET_SWITCHES \
+ { "newlib", 0, N_("no description yet") },
/* This is meant to be redefined in the host dependent files. */
#define EXTRA_SUBTARGET_SWITCHES