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-rw-r--r--gcc/config/riscv/constraints.md2
-rw-r--r--gcc/config/riscv/elf.h2
-rw-r--r--gcc/config/riscv/generic.md2
-rw-r--r--gcc/config/riscv/linux.h2
-rwxr-xr-xgcc/config/riscv/multilib-generator2
-rw-r--r--gcc/config/riscv/peephole.md2
-rw-r--r--gcc/config/riscv/pic.md2
-rw-r--r--gcc/config/riscv/predicates.md2
-rw-r--r--gcc/config/riscv/riscv-builtins.c2
-rw-r--r--gcc/config/riscv/riscv-c.c2
-rw-r--r--gcc/config/riscv/riscv-ftypes.def2
-rw-r--r--gcc/config/riscv/riscv-modes.def2
-rw-r--r--gcc/config/riscv/riscv-opts.h2
-rw-r--r--gcc/config/riscv/riscv-protos.h2
-rw-r--r--gcc/config/riscv/riscv.c2
-rw-r--r--gcc/config/riscv/riscv.h2
-rw-r--r--gcc/config/riscv/riscv.md2
-rw-r--r--gcc/config/riscv/riscv.opt2
-rw-r--r--gcc/config/riscv/rtems.h2
-rw-r--r--gcc/config/riscv/sync.md2
20 files changed, 20 insertions, 20 deletions
diff --git a/gcc/config/riscv/constraints.md b/gcc/config/riscv/constraints.md
index ae93788e44a..aa6e962ace5 100644
--- a/gcc/config/riscv/constraints.md
+++ b/gcc/config/riscv/constraints.md
@@ -1,5 +1,5 @@
;; Constraint definitions for RISC-V target.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; Based on MIPS target for GNU compiler.
;;
diff --git a/gcc/config/riscv/elf.h b/gcc/config/riscv/elf.h
index 391e59f49b9..43ad68bbdf2 100644
--- a/gcc/config/riscv/elf.h
+++ b/gcc/config/riscv/elf.h
@@ -1,5 +1,5 @@
/* Target macros for riscv*-elf targets.
- Copyright (C) 1994-2017 Free Software Foundation, Inc.
+ Copyright (C) 1994-2018 Free Software Foundation, Inc.
This file is part of GCC.
diff --git a/gcc/config/riscv/generic.md b/gcc/config/riscv/generic.md
index 294c7ef729d..ba05b6ac859 100644
--- a/gcc/config/riscv/generic.md
+++ b/gcc/config/riscv/generic.md
@@ -1,5 +1,5 @@
;; Generic DFA-based pipeline description for RISC-V targets.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h
index 4b2f7b6e1fd..1da1b0a74ea 100644
--- a/gcc/config/riscv/linux.h
+++ b/gcc/config/riscv/linux.h
@@ -1,5 +1,5 @@
/* Definitions for RISC-V GNU/Linux systems with ELF format.
- Copyright (C) 1998-2017 Free Software Foundation, Inc.
+ Copyright (C) 1998-2018 Free Software Foundation, Inc.
This file is part of GCC.
diff --git a/gcc/config/riscv/multilib-generator b/gcc/config/riscv/multilib-generator
index 50687b41894..ff4c0d72b51 100755
--- a/gcc/config/riscv/multilib-generator
+++ b/gcc/config/riscv/multilib-generator
@@ -1,7 +1,7 @@
#!/usr/bin/env python
# RISC-V multilib list generator.
-# Copyright (C) 2011-2017 Free Software Foundation, Inc.
+# Copyright (C) 2011-2018 Free Software Foundation, Inc.
# Contributed by Andrew Waterman (andrew@sifive.com).
#
# This file is part of GCC.
diff --git a/gcc/config/riscv/peephole.md b/gcc/config/riscv/peephole.md
index 7e644e01759..55331efe756 100644
--- a/gcc/config/riscv/peephole.md
+++ b/gcc/config/riscv/peephole.md
@@ -1,5 +1,5 @@
;; Peephole optimizations for RISC-V for GNU compiler.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; This file is part of GCC.
diff --git a/gcc/config/riscv/pic.md b/gcc/config/riscv/pic.md
index 03b8f9bc669..a4a9732656c 100644
--- a/gcc/config/riscv/pic.md
+++ b/gcc/config/riscv/pic.md
@@ -1,5 +1,5 @@
;; PIC codegen for RISC-V for GNU compiler.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; This file is part of GCC.
diff --git a/gcc/config/riscv/predicates.md b/gcc/config/riscv/predicates.md
index 854af1481f7..a2799d4cb98 100644
--- a/gcc/config/riscv/predicates.md
+++ b/gcc/config/riscv/predicates.md
@@ -1,5 +1,5 @@
;; Predicate description for RISC-V target.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; Based on MIPS target for GNU compiler.
;;
diff --git a/gcc/config/riscv/riscv-builtins.c b/gcc/config/riscv/riscv-builtins.c
index 39d2316e9ef..b1d89fc8719 100644
--- a/gcc/config/riscv/riscv-builtins.c
+++ b/gcc/config/riscv/riscv-builtins.c
@@ -1,5 +1,5 @@
/* Subroutines used for expanding RISC-V builtins.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
This file is part of GCC.
diff --git a/gcc/config/riscv/riscv-c.c b/gcc/config/riscv/riscv-c.c
index 2a045ec026b..391b5eefc5c 100644
--- a/gcc/config/riscv/riscv-c.c
+++ b/gcc/config/riscv/riscv-c.c
@@ -1,5 +1,5 @@
/* RISC-V-specific code for C family languages.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
This file is part of GCC.
diff --git a/gcc/config/riscv/riscv-ftypes.def b/gcc/config/riscv/riscv-ftypes.def
index eb69148368f..2cf6488fd28 100644
--- a/gcc/config/riscv/riscv-ftypes.def
+++ b/gcc/config/riscv/riscv-ftypes.def
@@ -1,5 +1,5 @@
/* Definitions of prototypes for RISC-V built-in functions. -*- C -*-
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv-modes.def b/gcc/config/riscv/riscv-modes.def
index 5c65667da68..6ad7de2cf9c 100644
--- a/gcc/config/riscv/riscv-modes.def
+++ b/gcc/config/riscv/riscv-modes.def
@@ -1,5 +1,5 @@
/* Extra machine modes for RISC-V target.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 2b19233379c..3e10ab339a5 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -1,5 +1,5 @@
/* Definition of RISC-V target for GNU compiler.
- Copyright (C) 2016-2017 Free Software Foundation, Inc.
+ Copyright (C) 2016-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
This file is part of GCC.
diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index 5f65b20e792..1cf016d850b 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -1,5 +1,5 @@
/* Definition of RISC-V target for GNU compiler.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index 0147c314b7a..39e12507e68 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -1,5 +1,5 @@
/* Subroutines used for code generation for RISC-V.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index feada728f9a..cd37761b629 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -1,5 +1,5 @@
/* Definition of RISC-V target for GNU compiler.
- Copyright (C) 2011-2017 Free Software Foundation, Inc.
+ Copyright (C) 2011-2018 Free Software Foundation, Inc.
Contributed by Andrew Waterman (andrew@sifive.com).
Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index dab54ad2738..99341fa00b4 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -1,5 +1,5 @@
;; Machine description for RISC-V for GNU compiler.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; Based on MIPS target for GNU compiler.
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index cfd0335d082..50df851afdf 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -1,6 +1,6 @@
; Options for the RISC-V port of the compiler
;
-; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
diff --git a/gcc/config/riscv/rtems.h b/gcc/config/riscv/rtems.h
index 221e2f69815..231b6a082ed 100644
--- a/gcc/config/riscv/rtems.h
+++ b/gcc/config/riscv/rtems.h
@@ -1,5 +1,5 @@
/* Definitions for RISC-V RTEMS systems with ELF format.
- Copyright (C) 2017 Free Software Foundation, Inc.
+ Copyright (C) 2017-2018 Free Software Foundation, Inc.
This file is part of GCC.
diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md
index cde19e3bed8..b6916bde65b 100644
--- a/gcc/config/riscv/sync.md
+++ b/gcc/config/riscv/sync.md
@@ -1,5 +1,5 @@
;; Machine description for RISC-V atomic operations.
-;; Copyright (C) 2011-2017 Free Software Foundation, Inc.
+;; Copyright (C) 2011-2018 Free Software Foundation, Inc.
;; Contributed by Andrew Waterman (andrew@sifive.com).
;; Based on MIPS target for GNU compiler.
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