diff options
Diffstat (limited to 'gcc/config/pdp11/pdp11.md')
| -rw-r--r-- | gcc/config/pdp11/pdp11.md | 88 |
1 files changed, 44 insertions, 44 deletions
diff --git a/gcc/config/pdp11/pdp11.md b/gcc/config/pdp11/pdp11.md index f07acefd3bd..217e314f1eb 100644 --- a/gcc/config/pdp11/pdp11.md +++ b/gcc/config/pdp11/pdp11.md @@ -1,5 +1,5 @@ ;;- Machine description for the pdp11 for GNU C compiler -;; Copyright (C) 1994, 1995, 1997, 1999 Free Software Foundation, Inc. +;; Copyright (C) 1994, 1995, 1997, 1998, 1999 Free Software Foundation, Inc. ;; Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). ;; This file is part of GNU CC. @@ -732,7 +732,7 @@ { output_asm_insn(\"{stcdf|movfo} %1, -(sp)\", operands); output_asm_insn(\"mov (sp)+, %0\", operands); - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0])+1); output_asm_insn(\"mov (sp)+, %0\", operands); return \"\"; } @@ -805,8 +805,8 @@ /* make register pair available */ latehalf[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); - + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0])+ 1); + output_asm_insn(\"movb %1, %0\", operands); output_asm_insn(\"sxt %0\", latehalf); @@ -857,7 +857,7 @@ /* make register pair available */ latehalf[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"mov %1, %0\", operands); output_asm_insn(\"sxt %0\", latehalf); @@ -883,7 +883,7 @@ rtx lateoperands[2]; lateoperands[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"tst %0\", operands); sprintf(buf, \"bge extendhisi%d\", count); @@ -918,7 +918,7 @@ rtx latehalf[2]; latehalf[0] = NULL; - latehalf[1] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + latehalf[1] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"mov %1, -(sp)\", latehalf); output_asm_insn(\"mov %1, -(sp)\", operands); @@ -952,7 +952,7 @@ output_asm_insn(\"{stcdl|movfi} %1, -(sp)\", operands); output_asm_insn(\"seti\", operands); output_asm_insn(\"mov (sp)+, %0\", operands); - operands[0] = gen_rtx(REG, HImode, REGNO (operands[0])+1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); output_asm_insn(\"mov (sp)+, %0\", operands); return \"\"; } @@ -998,7 +998,7 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); @@ -1007,7 +1007,7 @@ lateoperands[2] = operands[2]; if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); else operands[2] = adj_offsettable_operand(operands[2], 2); @@ -1017,8 +1017,8 @@ return \"\"; } - lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT (INTVAL (operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); if (INTVAL(operands[2])) { @@ -1101,14 +1101,14 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); lateoperands[2] = operands[2]; if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); else operands[2] = adj_offsettable_operand(operands[2], 2); @@ -1209,7 +1209,7 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); @@ -1218,7 +1218,7 @@ lateoperands[2] = operands[2]; if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); else operands[2] = adj_offsettable_operand(operands[2], 2); @@ -1227,8 +1227,8 @@ return \"\"; } - lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT ((INTVAL (operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); /* these have different lengths, so we should have different constraints! */ @@ -1275,26 +1275,26 @@ lateoperands[0] = operands[0]; if (REG_P (operands[0])) - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); else operands[0] = adj_offsettable_operand (operands[0], 2); if (! CONSTANT_P(operands[2])) - { - lateoperands[2] = operands[2]; + { + lateoperands[2] = operands[2]; - if (REG_P (operands[2])) - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); - else - operands[2] = adj_offsettable_operand(operands[2], 2); + if (REG_P (operands[2])) + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); + else + operands[2] = adj_offsettable_operand (operands[2], 2); - output_asm_insn (\"bis %2, %0\", operands); - output_asm_insn (\"bis %2, %0\", lateoperands); - return \"\"; - } + output_asm_insn (\"bis %2, %0\", operands); + output_asm_insn (\"bis %2, %0\", lateoperands); + return \"\"; + } - lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT ((INTVAL (operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); /* these have different lengths, so we should have different constraints! */ @@ -1336,26 +1336,26 @@ rtx lateoperands[3]; lateoperands[0] = operands[0]; - operands[0] = gen_rtx(REG, HImode, REGNO(operands[0]) + 1); + operands[0] = gen_rtx_REG (HImode, REGNO (operands[0]) + 1); if (REG_P(operands[2])) - { - lateoperands[2] = operands[2]; - operands[2] = gen_rtx(REG, HImode, REGNO(operands[2]) + 1); - - output_asm_insn (\"xor %2, %0\", operands); - output_asm_insn (\"xor %2, %0\", lateoperands); + { + lateoperands[2] = operands[2]; + operands[2] = gen_rtx_REG (HImode, REGNO (operands[2]) + 1); - return \"\"; - } + output_asm_insn (\"xor %2, %0\", operands); + output_asm_insn (\"xor %2, %0\", lateoperands); - lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); + return \"\"; + } + + lateoperands[2] = GEN_INT ((INTVAL (operands[2]) >> 16) & 0xffff); operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); - if (INTVAL(operands[2])) + if (INTVAL (operands[2])) output_asm_insn (\"xor %2, %0\", operands); - if (INTVAL(lateoperands[2])) + if (INTVAL (lateoperands[2])) output_asm_insn (\"xor %2, %0\", lateoperands); return \"\"; @@ -1614,7 +1614,7 @@ ; ; /* allow REG_NOTES to be set on last insn (labels don't have enough ; fields, and can't be used for REG_NOTES anyway). */ -; emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx)); +; emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx)); ; DONE; ;}") |