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-rw-r--r--gcc/config/mips/7000.md2
-rw-r--r--gcc/config/mips/mips.c6
-rw-r--r--gcc/config/mips/r3900.h2
-rw-r--r--gcc/config/mips/sb1.md2
4 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/mips/7000.md b/gcc/config/mips/7000.md
index 8917a6fa102..f0003ba2d6b 100644
--- a/gcc/config/mips/7000.md
+++ b/gcc/config/mips/7000.md
@@ -60,7 +60,7 @@
(exclusion_set "fxuf_add" "fxuf_mpy,fxuf_divsqrt")
(exclusion_set "fxuf_mpy" "fxuf_divsqrt")
-;; After branch any insn can not be issued.
+;; After branch any insn cannot be issued.
(absence_set "rm7_iss0,rm7_iss1" "ixuf_branch")
;;
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index b77fcbd88e2..3fe9d4d24d7 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -4482,7 +4482,7 @@ override_options (void)
if (optimize > 2 && (target_flags_explicit & MASK_VR4130_ALIGN) == 0)
target_flags |= MASK_VR4130_ALIGN;
- /* When compiling for the mips16, we can not use floating point. We
+ /* When compiling for the mips16, we cannot use floating point. We
record the original hard float value in mips16_hard_float. */
if (TARGET_MIPS16)
{
@@ -7470,7 +7470,7 @@ build_mips16_function_stub (FILE *file)
ASM_OUTPUT_ALIGN (file, floor_log2 (FUNCTION_BOUNDARY / BITS_PER_UNIT));
/* ??? If FUNCTION_NAME_ALREADY_DECLARED is defined, then we are
- within a .ent, and we can not emit another .ent. */
+ within a .ent, and we cannot emit another .ent. */
if (!FUNCTION_NAME_ALREADY_DECLARED)
{
fputs ("\t.ent\t", file);
@@ -7803,7 +7803,7 @@ build_mips16_call_stub (rtx retval, rtx fn, rtx arg_size, int fp_code)
Fortunately, this case is illegal, since it means that a function
was declared in two different ways in a single compilation. */
if (fpret && ! l->fpret)
- error ("can not handle inconsistent calls to `%s'", fnname);
+ error ("cannot handle inconsistent calls to `%s'", fnname);
/* If we are calling a stub which handles a floating point return
value, we need to arrange to save $18 in the prologue. We do
diff --git a/gcc/config/mips/r3900.h b/gcc/config/mips/r3900.h
index c91354334f3..840e0729af7 100644
--- a/gcc/config/mips/r3900.h
+++ b/gcc/config/mips/r3900.h
@@ -34,4 +34,4 @@ Boston, MA 02111-1307, USA. */
#define SUBTARGET_CC1_SPEC "\
%{mhard-float:%e-mhard-float not supported} \
%{msingle-float:%{msoft-float: \
- %e-msingle-float and -msoft-float can not both be specified}}"
+ %e-msingle-float and -msoft-float cannot both be specified}}"
diff --git a/gcc/config/mips/sb1.md b/gcc/config/mips/sb1.md
index 41cebedce4f..aff645baffa 100644
--- a/gcc/config/mips/sb1.md
+++ b/gcc/config/mips/sb1.md
@@ -207,7 +207,7 @@
;; unit has a latency of 5 cycles when the results goes to a LS unit (excluding
;; store data), otherwise a latency of 1 cycle.
-;; ??? We can not handle latencies properly for simple alu instructions
+;; ??? We cannot handle latencies properly for simple alu instructions
;; within the DFA pipeline model. Latencies can be defined only from one
;; insn reservation to another. We can't make them depend on which function
;; unit was used. This isn't a DFA flaw. There is a conflict here, as we