diff options
Diffstat (limited to 'gcc/config/mips/mips.c')
| -rw-r--r-- | gcc/config/mips/mips.c | 28 |
1 files changed, 18 insertions, 10 deletions
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 2dcf69d3f43..f8f3cb6eb7c 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -29,6 +29,8 @@ Boston, MA 02111-1307, USA. */ #include "config.h" #include "system.h" +#include "coretypes.h" +#include "tm.h" #include <signal.h> #include "rtl.h" #include "regs.h" @@ -665,6 +667,9 @@ const struct mips_cpu_info mips_cpu_info_table[] = { #undef TARGET_ENCODE_SECTION_INFO #define TARGET_ENCODE_SECTION_INFO mips_encode_section_info +#undef TARGET_VALID_POINTER_MODE +#define TARGET_VALID_POINTER_MODE mips_valid_pointer_mode + struct gcc_target targetm = TARGET_INITIALIZER; /* Return truth value of whether OP can be used as an operands @@ -6944,7 +6949,6 @@ save_restore_insns (store_p, large_reg, large_offset) HOST_WIDE_INT gp_offset; HOST_WIDE_INT fp_offset; HOST_WIDE_INT end_offset; - rtx insn; if (frame_pointer_needed && ! BITSET_P (mask, HARD_FRAME_POINTER_REGNUM - GP_REG_FIRST)) @@ -6998,11 +7002,9 @@ save_restore_insns (store_p, large_reg, large_offset) base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = large_offset; if (Pmode == DImode) - insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg, - stack_pointer_rtx)); + emit_insn (gen_adddi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); else - insn = emit_insn (gen_addsi3 (base_reg_rtx, large_reg, - stack_pointer_rtx)); + emit_insn (gen_addsi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); } else { @@ -7107,11 +7109,9 @@ save_restore_insns (store_p, large_reg, large_offset) base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM); base_offset = large_offset; if (Pmode == DImode) - insn = emit_insn (gen_adddi3 (base_reg_rtx, large_reg, - stack_pointer_rtx)); + emit_insn (gen_adddi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); else - insn = emit_insn (gen_addsi3 (base_reg_rtx, large_reg, - stack_pointer_rtx)); + emit_insn (gen_addsi3 (base_reg_rtx, large_reg, stack_pointer_rtx)); } else { @@ -8621,6 +8621,14 @@ mips_class_max_nregs (class, mode) else return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD; } + +bool +mips_valid_pointer_mode (mode) + enum machine_mode mode; +{ + return (mode == SImode || (TARGET_64BIT && mode == DImode)); +} + /* For each mips16 function which refers to GP relative symbols, we use a pseudo register, initialized at the start of the function, to @@ -10268,7 +10276,7 @@ mips_output_conditional_branch (insn, else output_asm_insn ("%#", 0); - ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "L", + (*targetm.asm_out.internal_label) (asm_out_file, "L", CODE_LABEL_NUMBER (target)); return ""; |