diff options
Diffstat (limited to 'gcc/config/i386/i386.md')
| -rw-r--r-- | gcc/config/i386/i386.md | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index e4615122a14..3aac3ed8335 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -114,6 +114,7 @@ UNSPEC_CALL_NEEDS_VZEROUPPER UNSPEC_PAUSE UNSPEC_LEA_ADDR + UNSPEC_XBEGIN_ABORT ;; For SSE/MMX support: UNSPEC_FIX_NOTRUNC @@ -206,6 +207,12 @@ UNSPECV_RDGSBASE UNSPECV_WRFSBASE UNSPECV_WRGSBASE + + ;; For RTM support + UNSPECV_XBEGIN + UNSPECV_XEND + UNSPECV_XABORT + UNSPECV_XTEST ]) ;; Constants to represent rounding modes in the ROUND instruction @@ -18196,6 +18203,72 @@ [(set_attr "length" "2") (set_attr "memory" "unknown")]) +(define_expand "xbegin" + [(set (match_operand:SI 0 "register_operand" "=a") + (unspec_volatile:SI [(match_dup 1)] UNSPECV_XBEGIN))] + "TARGET_RTM" +{ + rtx label = gen_label_rtx (); + + operands[1] = force_reg (SImode, constm1_rtx); + + emit_jump_insn (gen_xbegin_1 (operands[0], operands[1], label)); + + emit_label (label); + LABEL_NUSES (label) = 1; + + DONE; +}) + +(define_insn "xbegin_1" + [(set (pc) + (if_then_else (ne (unspec [(const_int 0)] UNSPEC_XBEGIN_ABORT) + (const_int 0)) + (label_ref (match_operand 2 "" "")) + (pc))) + (set (match_operand:SI 0 "register_operand" "=a") + (unspec_volatile:SI [(match_operand:SI 1 "register_operand" "0")] + UNSPECV_XBEGIN))] + "TARGET_RTM" + "xbegin\t%l2" + [(set_attr "type" "other") + (set_attr "length" "6")]) + +(define_insn "xend" + [(unspec_volatile [(const_int 0)] UNSPECV_XEND)] + "TARGET_RTM" + "xend" + [(set_attr "type" "other") + (set_attr "length" "3")]) + +(define_insn "xabort" + [(unspec_volatile [(match_operand:SI 0 "const_0_to_255_operand" "n")] + UNSPECV_XABORT)] + "TARGET_RTM" + "xabort\t%0" + [(set_attr "type" "other") + (set_attr "length" "3")]) + +(define_expand "xtest" + [(set (match_operand:QI 0 "register_operand" "") + (unspec_volatile:QI [(const_int 0)] UNSPECV_XTEST))] + "TARGET_RTM" +{ + emit_insn (gen_xtest_1 ()); + + ix86_expand_setcc (operands[0], EQ, gen_rtx_REG (CCZmode, FLAGS_REG), const0_rtx); + + DONE; +}) + +(define_insn "xtest_1" + [(set (reg:CCZ FLAGS_REG) + (unspec_volatile:CCZ [(const_int 0)] UNSPECV_XTEST))] + "TARGET_RTM" + "xtest" + [(set_attr "type" "other") + (set_attr "length" "3")]) + (include "mmx.md") (include "sse.md") (include "sync.md") |