diff options
Diffstat (limited to 'gcc/config/clipper/clipper.md')
| -rw-r--r-- | gcc/config/clipper/clipper.md | 37 |
1 files changed, 19 insertions, 18 deletions
diff --git a/gcc/config/clipper/clipper.md b/gcc/config/clipper/clipper.md index 87f30fa5d0a..efe26a995f3 100644 --- a/gcc/config/clipper/clipper.md +++ b/gcc/config/clipper/clipper.md @@ -1,5 +1,6 @@ ;;- Machine description for GNU compiler, Clipper Version -;; Copyright (C) 1987, 88, 91, 93, 94, 1997 Free Software Foundation, Inc. +;; Copyright (C) 1987, 88, 91, 93, 94, 97, 98, 1999 +;; Free Software Foundation, Inc. ;; Contributed by Holger Teutsch (holger@hotbso.rhein-main.de) ;; This file is part of GNU CC. @@ -178,7 +179,7 @@ { rtx xops[4]; xops[0] = operands[0]; - xops[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xops[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xops[2] = operands[1]; xops[3] = adj_offsettable_operand (operands[1], 4); output_asm_insn (\"loadw %2,%0\;loadw %3,%1\", xops); @@ -189,9 +190,9 @@ { rtx xops[4]; xops[0] = operands[0]; - xops[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xops[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xops[2] = operands[1]; - xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"movw %2,%0\;movw %3,%1\", xops); return \"\"; } @@ -215,7 +216,7 @@ xops[0] = operands[0]; /* r -> o */ xops[1] = adj_offsettable_operand (operands[0], 4); xops[2] = operands[1]; - xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"storw %2,%0\;storw %3,%1\", xops); return \"\"; }" @@ -317,12 +318,12 @@ { rtx xoperands[2],yoperands[2]; - xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); if (which_alternative == 0) /* r -> r */ { output_asm_insn (\"movw %1,%0\", operands); - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"movw %1,%0\", xoperands); return \"\"; } @@ -366,7 +367,7 @@ xops[0] = operands[0]; xops[1] = adj_offsettable_operand (operands[0], 4); xops[2] = operands[1]; - xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); + xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1); output_asm_insn (\"storw %2,%0\;storw %3,%1\", xops); return \"\"; }" @@ -696,9 +697,9 @@ rtx xoperands[4]; xoperands[0] = operands[0]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xoperands[2] = operands[2]; - xoperands[3] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[3] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); output_asm_insn (\"addw %2,%0\;addwc %3,%1\", xoperands); return \"\"; }" @@ -767,9 +768,9 @@ rtx xoperands[4]; xoperands[0] = operands[0]; - xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); + xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); xoperands[2] = operands[2]; - xoperands[3] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); + xoperands[3] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1); output_asm_insn (\"subw %2,%0\;subwc %3,%1\", xoperands); return \"\"; }" @@ -991,7 +992,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1018,7 +1019,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1088,7 +1089,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1115,7 +1116,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1146,7 +1147,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" @@ -1173,7 +1174,7 @@ " { if (GET_CODE (operands[2]) != CONST_INT) - operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2])); + operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2])); }") (define_insn "" |