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-rw-r--r--gcc/config/arm/arm-cores.def1
-rw-r--r--gcc/config/arm/arm-fpus.def2
-rw-r--r--gcc/config/arm/arm-tables.opt19
-rw-r--r--gcc/config/arm/arm-tune.md7
-rw-r--r--gcc/config/arm/arm.h3
-rw-r--r--gcc/config/arm/bpabi.h4
-rw-r--r--gcc/config/arm/vfp.md6
7 files changed, 29 insertions, 13 deletions
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index a830a83baeb..56ec7fd8fe7 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -149,6 +149,7 @@ ARM_CORE("cortex-r4", cortexr4, cortexr4, 7R, FL_LDSCHED, cortex)
ARM_CORE("cortex-r4f", cortexr4f, cortexr4f, 7R, FL_LDSCHED, cortex)
ARM_CORE("cortex-r5", cortexr5, cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
ARM_CORE("cortex-r7", cortexr7, cortexr7, 7R, FL_LDSCHED | FL_ARM_DIV, cortex)
+ARM_CORE("cortex-m7", cortexm7, cortexm7, 7EM, FL_LDSCHED, v7m)
ARM_CORE("cortex-m4", cortexm4, cortexm4, 7EM, FL_LDSCHED, v7m)
ARM_CORE("cortex-m3", cortexm3, cortexm3, 7M, FL_LDSCHED, v7m)
ARM_CORE("marvell-pj4", marvell_pj4, marvell_pj4, 7A, FL_LDSCHED, 9e)
diff --git a/gcc/config/arm/arm-fpus.def b/gcc/config/arm/arm-fpus.def
index 85d9693c1fe..edd0c352474 100644
--- a/gcc/config/arm/arm-fpus.def
+++ b/gcc/config/arm/arm-fpus.def
@@ -37,6 +37,8 @@ ARM_FPU("neon-fp16", ARM_FP_MODEL_VFP, 3, VFP_REG_D32, true, true, false)
ARM_FPU("vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, false, true, false)
ARM_FPU("vfpv4-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_D16, false, true, false)
ARM_FPU("fpv4-sp-d16", ARM_FP_MODEL_VFP, 4, VFP_REG_SINGLE, false, true, false)
+ARM_FPU("fpv5-sp-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_SINGLE, false, true, false)
+ARM_FPU("fpv5-d16", ARM_FP_MODEL_VFP, 5, VFP_REG_D16, false, true, false)
ARM_FPU("neon-vfpv4", ARM_FP_MODEL_VFP, 4, VFP_REG_D32, true, true, false)
ARM_FPU("fp-armv8", ARM_FP_MODEL_VFP, 8, VFP_REG_D32, false, true, false)
ARM_FPU("neon-fp-armv8",ARM_FP_MODEL_VFP, 8, VFP_REG_D32, true, true, false)
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index bc046a0de8e..04191bceefb 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -274,6 +274,9 @@ EnumValue
Enum(processor_type) String(cortex-r7) Value(cortexr7)
EnumValue
+Enum(processor_type) String(cortex-m7) Value(cortexm7)
+
+EnumValue
Enum(processor_type) String(cortex-m4) Value(cortexm4)
EnumValue
@@ -423,17 +426,23 @@ EnumValue
Enum(arm_fpu) String(fpv4-sp-d16) Value(11)
EnumValue
-Enum(arm_fpu) String(neon-vfpv4) Value(12)
+Enum(arm_fpu) String(fpv5-sp-d16) Value(12)
+
+EnumValue
+Enum(arm_fpu) String(fpv5-d16) Value(13)
+
+EnumValue
+Enum(arm_fpu) String(neon-vfpv4) Value(14)
EnumValue
-Enum(arm_fpu) String(fp-armv8) Value(13)
+Enum(arm_fpu) String(fp-armv8) Value(15)
EnumValue
-Enum(arm_fpu) String(neon-fp-armv8) Value(14)
+Enum(arm_fpu) String(neon-fp-armv8) Value(16)
EnumValue
-Enum(arm_fpu) String(crypto-neon-fp-armv8) Value(15)
+Enum(arm_fpu) String(crypto-neon-fp-armv8) Value(17)
EnumValue
-Enum(arm_fpu) String(vfp3) Value(16)
+Enum(arm_fpu) String(vfp3) Value(18)
diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md
index 954cab8efb1..4217fbe8b2c 100644
--- a/gcc/config/arm/arm-tune.md
+++ b/gcc/config/arm/arm-tune.md
@@ -28,7 +28,8 @@
genericv7a,cortexa5,cortexa7,
cortexa8,cortexa9,cortexa12,
cortexa15,cortexr4,cortexr4f,
- cortexr5,cortexr7,cortexm4,
- cortexm3,marvell_pj4,cortexa15cortexa7,
- cortexa53,cortexa57,cortexa57cortexa53"
+ cortexr5,cortexr7,cortexm7,
+ cortexm4,cortexm3,marvell_pj4,
+ cortexa15cortexa7,cortexa53,cortexa57,
+ cortexa57cortexa53"
(const (symbol_ref "((enum attr_tune) arm_tune)")))
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index ff4ddace2b5..3623c70441e 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -296,6 +296,9 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
/* FPU supports VFPv3 instructions. */
#define TARGET_VFP3 (TARGET_VFP && arm_fpu_desc->rev >= 3)
+/* FPU supports FPv5 instructions. */
+#define TARGET_VFP5 (TARGET_VFP && arm_fpu_desc->rev >= 5)
+
/* FPU only supports VFP single-precision instructions. */
#define TARGET_VFP_SINGLE (TARGET_VFP && arm_fpu_desc->regs == VFP_REG_SINGLE)
diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h
index 7a576ac466c..9a471c251a8 100644
--- a/gcc/config/arm/bpabi.h
+++ b/gcc/config/arm/bpabi.h
@@ -73,7 +73,7 @@
|mcpu=generic-armv7-a \
|march=armv7ve \
|march=armv7-m|mcpu=cortex-m3 \
- |march=armv7e-m|mcpu=cortex-m4 \
+ |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7 \
|march=armv6-m|mcpu=cortex-m0 \
|march=armv8-a \
:%{!r:--be8}}}"
@@ -91,7 +91,7 @@
|mcpu=generic-armv7-a \
|march=armv7ve \
|march=armv7-m|mcpu=cortex-m3 \
- |march=armv7e-m|mcpu=cortex-m4 \
+ |march=armv7e-m|mcpu=cortex-m4|mcpu=cortex-m7 \
|march=armv6-m|mcpu=cortex-m0 \
|march=armv8-a \
:%{!r:--be8}}}"
diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index a2034498518..6522c9082fa 100644
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -1298,7 +1298,7 @@
(unspec:SDF [(match_operand:SDF 1
"register_operand" "<F_constraint>")]
VRINT))]
- "TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"
+ "TARGET_HARD_FLOAT && TARGET_VFP5 <vfp_double_cond>"
"vrint<vrint_variant>%?.<V_if_elem>\\t%<V_reg>0, %<V_reg>1"
[(set_attr "predicable" "<vrint_predicable>")
(set_attr "predicable_short_it" "no")
@@ -1329,7 +1329,7 @@
[(set (match_operand:SDF 0 "register_operand" "=<F_constraint>")
(smax:SDF (match_operand:SDF 1 "register_operand" "<F_constraint>")
(match_operand:SDF 2 "register_operand" "<F_constraint>")))]
- "TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"
+ "TARGET_HARD_FLOAT && TARGET_VFP5 <vfp_double_cond>"
"vmaxnm.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
[(set_attr "type" "f_minmax<vfp_type>")
(set_attr "conds" "unconditional")]
@@ -1339,7 +1339,7 @@
[(set (match_operand:SDF 0 "register_operand" "=<F_constraint>")
(smin:SDF (match_operand:SDF 1 "register_operand" "<F_constraint>")
(match_operand:SDF 2 "register_operand" "<F_constraint>")))]
- "TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"
+ "TARGET_HARD_FLOAT && TARGET_VFP5 <vfp_double_cond>"
"vminnm.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
[(set_attr "type" "f_minmax<vfp_type>")
(set_attr "conds" "unconditional")]
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