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-rw-r--r--gcc/config/arm/arm-c.c4
-rw-r--r--gcc/config/arm/arm.c46
-rw-r--r--gcc/config/arm/arm.h1
-rw-r--r--gcc/config/arm/arm.opt2
4 files changed, 26 insertions, 27 deletions
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index c336a167086..7dee28ec52d 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -66,8 +66,8 @@ arm_cpu_builtins (struct cpp_reader* pfile)
def_or_undef_macro (pfile, "__ARM_FEATURE_SAT", TARGET_ARM_SAT);
def_or_undef_macro (pfile, "__ARM_FEATURE_CRYPTO", TARGET_CRYPTO);
- if (unaligned_access)
- builtin_define ("__ARM_FEATURE_UNALIGNED");
+ def_or_undef_macro (pfile, "__ARM_FEATURE_UNALIGNED", unaligned_access);
+
if (TARGET_CRC32)
builtin_define ("__ARM_FEATURE_CRC32");
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index e0cdc209734..362329d5f37 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2876,6 +2876,28 @@ arm_option_override_internal (struct gcc_options *opts,
if (!TARGET_THUMB2_P (opts->x_target_flags))
opts->x_arm_restrict_it = 0;
+ /* Enable -munaligned-access by default for
+ - all ARMv6 architecture-based processors when compiling for a 32-bit ISA
+ i.e. Thumb2 and ARM state only.
+ - ARMv7-A, ARMv7-R, and ARMv7-M architecture-based processors.
+ - ARMv8 architecture-base processors.
+
+ Disable -munaligned-access by default for
+ - all pre-ARMv6 architecture-based processors
+ - ARMv6-M architecture-based processors. */
+
+ if (! opts_set->x_unaligned_access)
+ {
+ opts->x_unaligned_access = (TARGET_32BIT_P (opts->x_target_flags)
+ && arm_arch6 && (arm_arch_notm || arm_arch7));
+ }
+ else if (opts->x_unaligned_access == 1
+ && !(arm_arch6 && (arm_arch_notm || arm_arch7)))
+ {
+ warning (0, "target CPU does not support unaligned accesses");
+ opts->x_unaligned_access = 0;
+ }
+
/* Don't warn since it's on by default in -O2. */
if (TARGET_THUMB1_P (opts->x_target_flags))
opts->x_flag_schedule_insns = 0;
@@ -3281,30 +3303,6 @@ arm_option_override (void)
fix_cm3_ldrd = 0;
}
- /* Enable -munaligned-access by default for
- - all ARMv6 architecture-based processors when compiling for a 32-bit ISA
- i.e. Thumb2 and ARM state only.
- - ARMv7-A, ARMv7-R, and ARMv7-M architecture-based processors.
- - ARMv8 architecture-base processors.
-
- Disable -munaligned-access by default for
- - all pre-ARMv6 architecture-based processors
- - ARMv6-M architecture-based processors. */
-
- if (unaligned_access == 2)
- {
- if (TARGET_32BIT && arm_arch6 && (arm_arch_notm || arm_arch7))
- unaligned_access = 1;
- else
- unaligned_access = 0;
- }
- else if (unaligned_access == 1
- && !(arm_arch6 && (arm_arch_notm || arm_arch7)))
- {
- warning (0, "target CPU does not support unaligned accesses");
- unaligned_access = 0;
- }
-
/* Hot/Cold partitioning is not currently supported, since we can't
handle literal pool placement in that case. */
if (flag_reorder_blocks_and_partition)
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 6ed8ad3823e..fd999dd0941 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -131,6 +131,7 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
#define TARGET_ARM_P(flags) (!TARGET_THUMB_P (flags))
#define TARGET_THUMB1_P(flags) (TARGET_THUMB_P (flags) && !arm_arch_thumb2)
#define TARGET_THUMB2_P(flags) (TARGET_THUMB_P (flags) && arm_arch_thumb2)
+#define TARGET_32BIT_P(flags) (TARGET_ARM_P (flags) || TARGET_THUMB2_P (flags))
/* Run-time Target Specification. */
#define TARGET_SOFT_FLOAT (arm_float_abi == ARM_FLOAT_ABI_SOFT)
diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
index 6f2db8f3a0d..1e438a9c092 100644
--- a/gcc/config/arm/arm.opt
+++ b/gcc/config/arm/arm.opt
@@ -267,7 +267,7 @@ Avoid overlapping destination and address registers on LDRD instructions
that may trigger Cortex-M3 errata.
munaligned-access
-Target Report Var(unaligned_access) Init(2)
+Target Report Var(unaligned_access) Init(2) Save
Enable unaligned word and halfword accesses to packed data.
mneon-for-64bits