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-rw-r--r--gcc/config/arm/constraints.md11
1 files changed, 10 insertions, 1 deletions
diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md
index 775f8afd7f3..767ebfb6080 100644
--- a/gcc/config/arm/constraints.md
+++ b/gcc/config/arm/constraints.md
@@ -21,7 +21,7 @@
;; The following register constraints have been used:
;; - in ARM/Thumb-2 state: t, w, x, y, z
;; - in Thumb state: h, b
-;; - in both states: l, c, k
+;; - in both states: l, c, k, q
;; In ARM state, 'l' is an alias for 'r'
;; 'f' and 'v' were previously used for FPA and MAVERICK registers.
@@ -86,6 +86,9 @@
(define_register_constraint "k" "STACK_REG"
"@internal The stack register.")
+(define_register_constraint "q" "(TARGET_ARM && TARGET_LDRD) ? CORE_REGS : GENERAL_REGS"
+ "@internal In ARM state with LDRD support, core registers, otherwise general registers.")
+
(define_register_constraint "b" "TARGET_THUMB ? BASE_REGS : NO_REGS"
"@internal
Thumb only. The union of the low registers and the stack register.")
@@ -248,6 +251,12 @@
(and (match_code "const_int")
(match_test "TARGET_32BIT && const_ok_for_dimode_op (ival, PLUS)")))
+(define_constraint "De"
+ "@internal
+ In ARM/Thumb-2 state a const_int that can be used by insn anddi."
+ (and (match_code "const_int")
+ (match_test "TARGET_32BIT && const_ok_for_dimode_op (ival, AND)")))
+
(define_constraint "Di"
"@internal
In ARM/Thumb-2 state a const_int or const_double where both the high