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-rw-r--r--gcc/config/arm/arm.c208
1 files changed, 135 insertions, 73 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 68350b158da..2c62c518e67 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2226,7 +2226,7 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
a_tramp = XEXP (m_tramp, 0);
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
LCT_NORMAL, VOIDmode, 2, a_tramp, Pmode,
- plus_constant (a_tramp, TRAMPOLINE_SIZE), Pmode);
+ plus_constant (Pmode, a_tramp, TRAMPOLINE_SIZE), Pmode);
}
/* Thumb trampolines should be entered in thumb mode, so set
@@ -5458,7 +5458,7 @@ legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg)
}
if (GET_CODE (offset) == CONST_INT)
- return plus_constant (base, INTVAL (offset));
+ return plus_constant (Pmode, base, INTVAL (offset));
}
if (GET_MODE_SIZE (mode) > 4
@@ -5575,7 +5575,7 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED)
/* On the ARM the PC register contains 'dot + 8' at the time of the
addition, on the Thumb it is 'dot + 4'. */
- pic_rtx = plus_constant (l1, TARGET_ARM ? 8 : 4);
+ pic_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
pic_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, pic_rtx),
UNSPEC_GOTSYM_OFF);
pic_rtx = gen_rtx_CONST (Pmode, pic_rtx);
@@ -5623,7 +5623,7 @@ arm_pic_static_addr (rtx orig, rtx reg)
/* On the ARM the PC register contains 'dot + 8' at the time of the
addition, on the Thumb it is 'dot + 4'. */
- offset_rtx = plus_constant (l1, TARGET_ARM ? 8 : 4);
+ offset_rtx = plus_constant (Pmode, l1, TARGET_ARM ? 8 : 4);
offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
UNSPEC_SYMBOL_OFFSET);
offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
@@ -6513,9 +6513,9 @@ arm_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode)
}
base_reg = gen_reg_rtx (SImode);
- val = force_operand (plus_constant (xop0, n), NULL_RTX);
+ val = force_operand (plus_constant (Pmode, xop0, n), NULL_RTX);
emit_move_insn (base_reg, val);
- x = plus_constant (base_reg, low_n);
+ x = plus_constant (Pmode, base_reg, low_n);
}
else if (xop0 != XEXP (x, 0) || xop1 != XEXP (x, 1))
x = gen_rtx_PLUS (SImode, xop0, xop1);
@@ -6563,7 +6563,7 @@ arm_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode)
index -= mask;
}
base_reg = force_reg (SImode, GEN_INT (base));
- x = plus_constant (base_reg, index);
+ x = plus_constant (Pmode, base_reg, index);
}
if (flag_pic)
@@ -6612,9 +6612,9 @@ thumb_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode)
else
delta = offset & (~31 * GET_MODE_SIZE (mode));
- xop0 = force_operand (plus_constant (xop0, offset - delta),
+ xop0 = force_operand (plus_constant (Pmode, xop0, offset - delta),
NULL_RTX);
- x = plus_constant (xop0, delta);
+ x = plus_constant (Pmode, xop0, delta);
}
else if (offset < 0 && offset > -256)
/* Small negative offsets are best done with a subtract before the
@@ -10781,7 +10781,7 @@ arm_gen_load_multiple_1 (int count, int *regs, rtx *mems, rtx basereg,
emit_move_insn (gen_rtx_REG (SImode, regs[i]), mems[i]);
if (wback_offset != 0)
- emit_move_insn (basereg, plus_constant (basereg, wback_offset));
+ emit_move_insn (basereg, plus_constant (Pmode, basereg, wback_offset));
seq = get_insns ();
end_sequence ();
@@ -10795,7 +10795,7 @@ arm_gen_load_multiple_1 (int count, int *regs, rtx *mems, rtx basereg,
{
XVECEXP (result, 0, 0)
= gen_rtx_SET (VOIDmode, basereg,
- plus_constant (basereg, wback_offset));
+ plus_constant (Pmode, basereg, wback_offset));
i = 1;
count++;
}
@@ -10833,7 +10833,7 @@ arm_gen_store_multiple_1 (int count, int *regs, rtx *mems, rtx basereg,
emit_move_insn (mems[i], gen_rtx_REG (SImode, regs[i]));
if (wback_offset != 0)
- emit_move_insn (basereg, plus_constant (basereg, wback_offset));
+ emit_move_insn (basereg, plus_constant (Pmode, basereg, wback_offset));
seq = get_insns ();
end_sequence ();
@@ -10847,7 +10847,7 @@ arm_gen_store_multiple_1 (int count, int *regs, rtx *mems, rtx basereg,
{
XVECEXP (result, 0, 0)
= gen_rtx_SET (VOIDmode, basereg,
- plus_constant (basereg, wback_offset));
+ plus_constant (Pmode, basereg, wback_offset));
i = 1;
count++;
}
@@ -10889,7 +10889,7 @@ arm_gen_multiple_op (bool is_load, int *regs, int count, rtx basereg,
for (i = 0; i < count; i++)
{
- rtx addr = plus_constant (basereg, i * 4);
+ rtx addr = plus_constant (Pmode, basereg, i * 4);
mems[i] = adjust_automodify_address_nv (basemem, SImode, addr, offset);
offset += 4;
}
@@ -10978,7 +10978,7 @@ gen_ldm_seq (rtx *operands, int nops, bool sort_regs)
for (i = 0; i < nops; i++)
{
- addr = plus_constant (base_reg_rtx, offset + i * 4);
+ addr = plus_constant (Pmode, base_reg_rtx, offset + i * 4);
mems[i] = adjust_automodify_address_nv (operands[nops + mem_order[i]],
SImode, addr, 0);
}
@@ -11028,11 +11028,11 @@ gen_stm_seq (rtx *operands, int nops)
offset = 0;
}
- addr = plus_constant (base_reg_rtx, offset);
+ addr = plus_constant (Pmode, base_reg_rtx, offset);
for (i = 0; i < nops; i++)
{
- addr = plus_constant (base_reg_rtx, offset + i * 4);
+ addr = plus_constant (Pmode, base_reg_rtx, offset + i * 4);
mems[i] = adjust_automodify_address_nv (operands[nops + mem_order[i]],
SImode, addr, 0);
}
@@ -11144,11 +11144,11 @@ gen_const_stm_seq (rtx *operands, int nops)
offset = 0;
}
- addr = plus_constant (base_reg_rtx, offset);
+ addr = plus_constant (Pmode, base_reg_rtx, offset);
for (i = 0; i < nops; i++)
{
- addr = plus_constant (base_reg_rtx, offset + i * 4);
+ addr = plus_constant (Pmode, base_reg_rtx, offset + i * 4);
mems[i] = adjust_automodify_address_nv (operands[nops + mem_order[i]],
SImode, addr, 0);
}
@@ -11220,8 +11220,8 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
{
for (j = 0; j < interleave_factor; j++)
{
- addr = plus_constant (src, srcoffset + j * UNITS_PER_WORD
- - src_autoinc);
+ addr = plus_constant (Pmode, src, (srcoffset + j * UNITS_PER_WORD
+ - src_autoinc));
mem = adjust_automodify_address (srcbase, SImode, addr,
srcoffset + j * UNITS_PER_WORD);
emit_insn (gen_unaligned_loadsi (regs[j], mem));
@@ -11240,8 +11240,8 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
{
for (j = 0; j < interleave_factor; j++)
{
- addr = plus_constant (dst, dstoffset + j * UNITS_PER_WORD
- - dst_autoinc);
+ addr = plus_constant (Pmode, dst, (dstoffset + j * UNITS_PER_WORD
+ - dst_autoinc));
mem = adjust_automodify_address (dstbase, SImode, addr,
dstoffset + j * UNITS_PER_WORD);
emit_insn (gen_unaligned_storesi (mem, regs[j]));
@@ -11269,7 +11269,7 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
{
for (j = 0; j < words; j++)
{
- addr = plus_constant (src,
+ addr = plus_constant (Pmode, src,
srcoffset + j * UNITS_PER_WORD - src_autoinc);
mem = adjust_automodify_address (srcbase, SImode, addr,
srcoffset + j * UNITS_PER_WORD);
@@ -11288,7 +11288,7 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
{
for (j = 0; j < words; j++)
{
- addr = plus_constant (dst,
+ addr = plus_constant (Pmode, dst,
dstoffset + j * UNITS_PER_WORD - dst_autoinc);
mem = adjust_automodify_address (dstbase, SImode, addr,
dstoffset + j * UNITS_PER_WORD);
@@ -11307,7 +11307,7 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
{
halfword_tmp = gen_reg_rtx (SImode);
- addr = plus_constant (src, srcoffset - src_autoinc);
+ addr = plus_constant (Pmode, src, srcoffset - src_autoinc);
mem = adjust_automodify_address (srcbase, HImode, addr, srcoffset);
emit_insn (gen_unaligned_loadhiu (halfword_tmp, mem));
@@ -11315,7 +11315,7 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
byte, depending on interleave factor. */
if (interleave_factor == 1)
{
- addr = plus_constant (dst, dstoffset - dst_autoinc);
+ addr = plus_constant (Pmode, dst, dstoffset - dst_autoinc);
mem = adjust_automodify_address (dstbase, HImode, addr, dstoffset);
emit_insn (gen_unaligned_storehi (mem,
gen_lowpart (HImode, halfword_tmp)));
@@ -11335,13 +11335,13 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
{
byte_tmp = gen_reg_rtx (SImode);
- addr = plus_constant (src, srcoffset - src_autoinc);
+ addr = plus_constant (Pmode, src, srcoffset - src_autoinc);
mem = adjust_automodify_address (srcbase, QImode, addr, srcoffset);
emit_move_insn (gen_lowpart (QImode, byte_tmp), mem);
if (interleave_factor == 1)
{
- addr = plus_constant (dst, dstoffset - dst_autoinc);
+ addr = plus_constant (Pmode, dst, dstoffset - dst_autoinc);
mem = adjust_automodify_address (dstbase, QImode, addr, dstoffset);
emit_move_insn (mem, gen_lowpart (QImode, byte_tmp));
byte_tmp = NULL;
@@ -11356,7 +11356,7 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
if (halfword_tmp)
{
- addr = plus_constant (dst, dstoffset - dst_autoinc);
+ addr = plus_constant (Pmode, dst, dstoffset - dst_autoinc);
mem = adjust_automodify_address (dstbase, HImode, addr, dstoffset);
emit_insn (gen_unaligned_storehi (mem,
gen_lowpart (HImode, halfword_tmp)));
@@ -11367,7 +11367,7 @@ arm_block_move_unaligned_straight (rtx dstbase, rtx srcbase,
if (byte_tmp)
{
- addr = plus_constant (dst, dstoffset - dst_autoinc);
+ addr = plus_constant (Pmode, dst, dstoffset - dst_autoinc);
mem = adjust_automodify_address (dstbase, QImode, addr, dstoffset);
emit_move_insn (mem, gen_lowpart (QImode, byte_tmp));
dstoffset++;
@@ -11433,8 +11433,8 @@ arm_block_move_unaligned_loop (rtx dest, rtx src, HOST_WIDE_INT length,
interleave_factor);
/* Move on to the next block. */
- emit_move_insn (src_reg, plus_constant (src_reg, bytes_per_iter));
- emit_move_insn (dest_reg, plus_constant (dest_reg, bytes_per_iter));
+ emit_move_insn (src_reg, plus_constant (Pmode, src_reg, bytes_per_iter));
+ emit_move_insn (dest_reg, plus_constant (Pmode, dest_reg, bytes_per_iter));
/* Emit the loop condition. */
test = gen_rtx_NE (VOIDmode, src_reg, final_src);
@@ -11595,7 +11595,8 @@ arm_gen_movmemqi (rtx *operands)
while (last_bytes)
{
mem = adjust_automodify_address (dstbase, QImode,
- plus_constant (dst, last_bytes - 1),
+ plus_constant (Pmode, dst,
+ last_bytes - 1),
dstoffset + last_bytes - 1);
emit_move_insn (mem, gen_lowpart (QImode, part_bytes_reg));
@@ -11964,6 +11965,9 @@ arm_select_cc_mode (enum rtx_code op, rtx x, rtx y)
}
}
+ if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
+ return GET_MODE (x);
+
return CCmode;
}
@@ -12117,11 +12121,11 @@ arm_reload_in_hi (rtx *operands)
emit_insn (gen_zero_extendqisi2 (scratch,
gen_rtx_MEM (QImode,
- plus_constant (base,
+ plus_constant (Pmode, base,
offset))));
emit_insn (gen_zero_extendqisi2 (gen_rtx_SUBREG (SImode, operands[0], 0),
gen_rtx_MEM (QImode,
- plus_constant (base,
+ plus_constant (Pmode, base,
offset + 1))));
if (!BYTES_BIG_ENDIAN)
emit_set_insn (gen_rtx_SUBREG (SImode, operands[0], 0),
@@ -12281,23 +12285,27 @@ arm_reload_out_hi (rtx *operands)
if (BYTES_BIG_ENDIAN)
{
emit_insn (gen_movqi (gen_rtx_MEM (QImode,
- plus_constant (base, offset + 1)),
+ plus_constant (Pmode, base,
+ offset + 1)),
gen_lowpart (QImode, outval)));
emit_insn (gen_lshrsi3 (scratch,
gen_rtx_SUBREG (SImode, outval, 0),
GEN_INT (8)));
- emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (base, offset)),
+ emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (Pmode, base,
+ offset)),
gen_lowpart (QImode, scratch)));
}
else
{
- emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (base, offset)),
+ emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (Pmode, base,
+ offset)),
gen_lowpart (QImode, outval)));
emit_insn (gen_lshrsi3 (scratch,
gen_rtx_SUBREG (SImode, outval, 0),
GEN_INT (8)));
emit_insn (gen_movqi (gen_rtx_MEM (QImode,
- plus_constant (base, offset + 1)),
+ plus_constant (Pmode, base,
+ offset + 1)),
gen_lowpart (QImode, scratch)));
}
}
@@ -13811,7 +13819,8 @@ arm_reorg (void)
if (GET_CODE (this_fix->insn) != BARRIER)
{
rtx addr
- = plus_constant (gen_rtx_LABEL_REF (VOIDmode,
+ = plus_constant (Pmode,
+ gen_rtx_LABEL_REF (VOIDmode,
minipool_vector_label),
this_fix->minipool->offset);
*this_fix->loc = gen_rtx_MEM (this_fix->mode, addr);
@@ -14022,7 +14031,7 @@ vfp_emit_fstmd (int base_reg, int count)
gen_rtx_PRE_MODIFY (Pmode,
stack_pointer_rtx,
plus_constant
- (stack_pointer_rtx,
+ (Pmode, stack_pointer_rtx,
- (count * 8)))
),
gen_rtx_UNSPEC (BLKmode,
@@ -14030,7 +14039,7 @@ vfp_emit_fstmd (int base_reg, int count)
UNSPEC_PUSH_MULT));
tmp = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
- plus_constant (stack_pointer_rtx, -(count * 8)));
+ plus_constant (Pmode, stack_pointer_rtx, -(count * 8)));
RTX_FRAME_RELATED_P (tmp) = 1;
XVECEXP (dwarf, 0, 0) = tmp;
@@ -14048,7 +14057,8 @@ vfp_emit_fstmd (int base_reg, int count)
tmp = gen_rtx_SET (VOIDmode,
gen_frame_mem (DFmode,
- plus_constant (stack_pointer_rtx,
+ plus_constant (Pmode,
+ stack_pointer_rtx,
i * 8)),
reg);
RTX_FRAME_RELATED_P (tmp) = 1;
@@ -16535,7 +16545,7 @@ emit_multi_reg_push (unsigned long mask)
gen_rtx_PRE_MODIFY (Pmode,
stack_pointer_rtx,
plus_constant
- (stack_pointer_rtx,
+ (Pmode, stack_pointer_rtx,
-4 * num_regs))
),
gen_rtx_UNSPEC (BLKmode,
@@ -16570,7 +16580,7 @@ emit_multi_reg_push (unsigned long mask)
= gen_rtx_SET (VOIDmode,
gen_frame_mem
(SImode,
- plus_constant (stack_pointer_rtx,
+ plus_constant (Pmode, stack_pointer_rtx,
4 * j)),
reg);
RTX_FRAME_RELATED_P (tmp) = 1;
@@ -16585,7 +16595,7 @@ emit_multi_reg_push (unsigned long mask)
tmp = gen_rtx_SET (VOIDmode,
stack_pointer_rtx,
- plus_constant (stack_pointer_rtx, -4 * num_regs));
+ plus_constant (Pmode, stack_pointer_rtx, -4 * num_regs));
RTX_FRAME_RELATED_P (tmp) = 1;
XVECEXP (dwarf, 0, 0) = tmp;
@@ -16628,7 +16638,7 @@ emit_sfm (int base_reg, int count)
gen_rtx_PRE_MODIFY (Pmode,
stack_pointer_rtx,
plus_constant
- (stack_pointer_rtx,
+ (Pmode, stack_pointer_rtx,
-12 * count))
),
gen_rtx_UNSPEC (BLKmode,
@@ -16646,7 +16656,8 @@ emit_sfm (int base_reg, int count)
tmp = gen_rtx_SET (VOIDmode,
gen_frame_mem (XFmode,
- plus_constant (stack_pointer_rtx,
+ plus_constant (Pmode,
+ stack_pointer_rtx,
i * 12)),
reg);
RTX_FRAME_RELATED_P (tmp) = 1;
@@ -16655,7 +16666,7 @@ emit_sfm (int base_reg, int count)
tmp = gen_rtx_SET (VOIDmode,
stack_pointer_rtx,
- plus_constant (stack_pointer_rtx, -12 * count));
+ plus_constant (Pmode, stack_pointer_rtx, -12 * count));
RTX_FRAME_RELATED_P (tmp) = 1;
XVECEXP (dwarf, 0, 0) = tmp;
@@ -17127,7 +17138,7 @@ thumb_set_frame_pointer (arm_stack_offsets *offsets)
stack_pointer_rtx));
}
dwarf = gen_rtx_SET (VOIDmode, hard_frame_pointer_rtx,
- plus_constant (stack_pointer_rtx, amount));
+ plus_constant (Pmode, stack_pointer_rtx, amount));
RTX_FRAME_RELATED_P (dwarf) = 1;
add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf);
}
@@ -17258,7 +17269,7 @@ arm_expand_prologue (void)
/* Just tell the dwarf backend that we adjusted SP. */
dwarf = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
- plus_constant (stack_pointer_rtx,
+ plus_constant (Pmode, stack_pointer_rtx,
-fp_offset));
RTX_FRAME_RELATED_P (insn) = 1;
add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf);
@@ -17286,7 +17297,8 @@ arm_expand_prologue (void)
}
insn = emit_set_insn (ip_rtx,
- plus_constant (stack_pointer_rtx, fp_offset));
+ plus_constant (Pmode, stack_pointer_rtx,
+ fp_offset));
RTX_FRAME_RELATED_P (insn) = 1;
}
@@ -17315,7 +17327,7 @@ arm_expand_prologue (void)
{
rtx lr = gen_rtx_REG (SImode, LR_REGNUM);
- emit_set_insn (lr, plus_constant (lr, -4));
+ emit_set_insn (lr, plus_constant (SImode, lr, -4));
}
if (live_regs_mask)
@@ -17365,7 +17377,7 @@ arm_expand_prologue (void)
insn = gen_rtx_REG (SImode, 3);
else /* if (crtl->args.pretend_args_size == 0) */
{
- insn = plus_constant (hard_frame_pointer_rtx, 4);
+ insn = plus_constant (Pmode, hard_frame_pointer_rtx, 4);
insn = gen_frame_mem (SImode, insn);
}
emit_set_insn (ip_rtx, insn);
@@ -21592,7 +21604,7 @@ thumb1_emit_multi_reg_push (unsigned long mask, unsigned long real_regs)
par[i] = tmp;
}
- tmp = plus_constant (stack_pointer_rtx, -4 * i);
+ tmp = plus_constant (Pmode, stack_pointer_rtx, -4 * i);
tmp = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, tmp);
tmp = gen_frame_mem (BLKmode, tmp);
tmp = gen_rtx_SET (VOIDmode, tmp, par[0]);
@@ -21602,7 +21614,7 @@ thumb1_emit_multi_reg_push (unsigned long mask, unsigned long real_regs)
insn = emit_insn (tmp);
/* Always build the stack adjustment note for unwind info. */
- tmp = plus_constant (stack_pointer_rtx, -4 * i);
+ tmp = plus_constant (Pmode, stack_pointer_rtx, -4 * i);
tmp = gen_rtx_SET (VOIDmode, stack_pointer_rtx, tmp);
par[0] = tmp;
@@ -21612,7 +21624,7 @@ thumb1_emit_multi_reg_push (unsigned long mask, unsigned long real_regs)
regno = ctz_hwi (real_regs);
reg = gen_rtx_REG (SImode, regno);
- tmp = plus_constant (stack_pointer_rtx, j * 4);
+ tmp = plus_constant (Pmode, stack_pointer_rtx, j * 4);
tmp = gen_frame_mem (SImode, tmp);
tmp = gen_rtx_SET (VOIDmode, tmp, reg);
RTX_FRAME_RELATED_P (tmp) = 1;
@@ -22556,7 +22568,7 @@ thumb1_expand_prologue (void)
x = GEN_INT (offset + 16 + crtl->args.pretend_args_size);
emit_insn (gen_addsi3 (work_reg, stack_pointer_rtx, x));
- x = plus_constant (stack_pointer_rtx, offset + 4);
+ x = plus_constant (Pmode, stack_pointer_rtx, offset + 4);
x = gen_frame_mem (SImode, x);
emit_move_insn (x, work_reg);
@@ -22570,13 +22582,13 @@ thumb1_expand_prologue (void)
x = gen_rtx_REG (SImode, PC_REGNUM);
emit_move_insn (work_reg, x);
- x = plus_constant (stack_pointer_rtx, offset + 12);
+ x = plus_constant (Pmode, stack_pointer_rtx, offset + 12);
x = gen_frame_mem (SImode, x);
emit_move_insn (x, work_reg);
emit_move_insn (work_reg, arm_hfp_rtx);
- x = plus_constant (stack_pointer_rtx, offset);
+ x = plus_constant (Pmode, stack_pointer_rtx, offset);
x = gen_frame_mem (SImode, x);
emit_move_insn (x, work_reg);
}
@@ -22584,14 +22596,14 @@ thumb1_expand_prologue (void)
{
emit_move_insn (work_reg, arm_hfp_rtx);
- x = plus_constant (stack_pointer_rtx, offset);
+ x = plus_constant (Pmode, stack_pointer_rtx, offset);
x = gen_frame_mem (SImode, x);
emit_move_insn (x, work_reg);
x = gen_rtx_REG (SImode, PC_REGNUM);
emit_move_insn (work_reg, x);
- x = plus_constant (stack_pointer_rtx, offset + 12);
+ x = plus_constant (Pmode, stack_pointer_rtx, offset + 12);
x = gen_frame_mem (SImode, x);
emit_move_insn (x, work_reg);
}
@@ -22599,7 +22611,7 @@ thumb1_expand_prologue (void)
x = gen_rtx_REG (SImode, LR_REGNUM);
emit_move_insn (work_reg, x);
- x = plus_constant (stack_pointer_rtx, offset + 8);
+ x = plus_constant (Pmode, stack_pointer_rtx, offset + 8);
x = gen_frame_mem (SImode, x);
emit_move_insn (x, work_reg);
@@ -22733,7 +22745,7 @@ thumb1_expand_prologue (void)
stack_pointer_rtx, reg));
dwarf = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
- plus_constant (stack_pointer_rtx,
+ plus_constant (Pmode, stack_pointer_rtx,
-amount));
add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf);
RTX_FRAME_RELATED_P (insn) = 1;
@@ -23084,8 +23096,10 @@ thumb_expand_movmemqi (rtx *operands)
{
rtx reg = gen_reg_rtx (HImode);
emit_insn (gen_movhi (reg, gen_rtx_MEM (HImode,
- plus_constant (in, offset))));
- emit_insn (gen_movhi (gen_rtx_MEM (HImode, plus_constant (out, offset)),
+ plus_constant (Pmode, in,
+ offset))));
+ emit_insn (gen_movhi (gen_rtx_MEM (HImode, plus_constant (Pmode, out,
+ offset)),
reg));
len -= 2;
offset += 2;
@@ -23095,8 +23109,10 @@ thumb_expand_movmemqi (rtx *operands)
{
rtx reg = gen_reg_rtx (QImode);
emit_insn (gen_movqi (reg, gen_rtx_MEM (QImode,
- plus_constant (in, offset))));
- emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (out, offset)),
+ plus_constant (Pmode, in,
+ offset))));
+ emit_insn (gen_movqi (gen_rtx_MEM (QImode, plus_constant (Pmode, out,
+ offset)),
reg));
}
}
@@ -23881,7 +23897,7 @@ arm_set_return_address (rtx source, rtx scratch)
else
{
if (frame_pointer_needed)
- addr = plus_constant(hard_frame_pointer_rtx, -4);
+ addr = plus_constant (Pmode, hard_frame_pointer_rtx, -4);
else
{
/* LR will be the first saved register. */
@@ -23898,7 +23914,7 @@ arm_set_return_address (rtx source, rtx scratch)
else
addr = stack_pointer_rtx;
- addr = plus_constant (addr, delta);
+ addr = plus_constant (Pmode, addr, delta);
}
emit_move_insn (gen_frame_mem (Pmode, addr), source);
}
@@ -23950,7 +23966,7 @@ thumb_set_return_address (rtx source, rtx scratch)
addr = scratch;
}
else
- addr = plus_constant (addr, delta);
+ addr = plus_constant (Pmode, addr, delta);
emit_move_insn (gen_frame_mem (Pmode, addr), source);
}
@@ -25870,5 +25886,51 @@ arm_vectorize_vec_perm_const_ok (enum machine_mode vmode,
return ret;
}
-
+bool
+arm_autoinc_modes_ok_p (enum machine_mode mode, enum arm_auto_incmodes code)
+{
+ /* If we are soft float and we do not have ldrd
+ then all auto increment forms are ok. */
+ if (TARGET_SOFT_FLOAT && (TARGET_LDRD || GET_MODE_SIZE (mode) <= 4))
+ return true;
+
+ switch (code)
+ {
+ /* Post increment and Pre Decrement are supported for all
+ instruction forms except for vector forms. */
+ case ARM_POST_INC:
+ case ARM_PRE_DEC:
+ if (VECTOR_MODE_P (mode))
+ {
+ if (code != ARM_PRE_DEC)
+ return true;
+ else
+ return false;
+ }
+
+ return true;
+
+ case ARM_POST_DEC:
+ case ARM_PRE_INC:
+ /* Without LDRD and mode size greater than
+ word size, there is no point in auto-incrementing
+ because ldm and stm will not have these forms. */
+ if (!TARGET_LDRD && GET_MODE_SIZE (mode) > 4)
+ return false;
+
+ /* Vector and floating point modes do not support
+ these auto increment forms. */
+ if (FLOAT_MODE_P (mode) || VECTOR_MODE_P (mode))
+ return false;
+
+ return true;
+
+ default:
+ return false;
+
+ }
+
+ return false;
+}
+
#include "gt-arm.h"
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