diff options
Diffstat (limited to 'gcc/config/arm/arm.c')
| -rw-r--r-- | gcc/config/arm/arm.c | 220 |
1 files changed, 92 insertions, 128 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 9f808be41af..1b3a6fc5006 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2234,7 +2234,7 @@ arm_constant_limit (bool size_p) inline static rtx_insn * emit_set_insn (rtx x, rtx y) { - return emit_insn (gen_rtx_SET (VOIDmode, x, y)); + return emit_insn (gen_rtx_SET (x, y)); } /* Return the number of bits set in VALUE. */ @@ -4136,7 +4136,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, { if (generate) emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, + gen_rtx_SET (target, GEN_INT (ARM_SIGN_EXTEND (val)))); return 1; } @@ -4147,8 +4147,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, return 0; if (generate) - emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, source)); + emit_constant_insn (cond, gen_rtx_SET (target, source)); return 1; } break; @@ -4157,8 +4156,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, if (remainder == 0) { if (generate) - emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, const0_rtx)); + emit_constant_insn (cond, gen_rtx_SET (target, const0_rtx)); return 1; } if (remainder == 0xffffffff) @@ -4166,8 +4164,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, if (reload_completed && rtx_equal_p (target, source)) return 0; if (generate) - emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, source)); + emit_constant_insn (cond, gen_rtx_SET (target, source)); return 1; } can_invert = 1; @@ -4179,8 +4176,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, if (reload_completed && rtx_equal_p (target, source)) return 0; if (generate) - emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, source)); + emit_constant_insn (cond, gen_rtx_SET (target, source)); return 1; } @@ -4188,7 +4184,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, { if (generate) emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, + gen_rtx_SET (target, gen_rtx_NOT (mode, source))); return 1; } @@ -4202,7 +4198,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, { if (generate) emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, + gen_rtx_SET (target, gen_rtx_NEG (mode, source))); return 1; } @@ -4210,7 +4206,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, { if (generate) emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, + gen_rtx_SET (target, gen_rtx_MINUS (mode, GEN_INT (val), source))); return 1; @@ -4227,7 +4223,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, { if (generate) emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, + gen_rtx_SET (target, (source ? gen_rtx_fmt_ee (code, mode, source, GEN_INT (val)) @@ -4314,8 +4310,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, { rtx new_src = subtargets ? gen_reg_rtx (mode) : target; emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, new_src, - GEN_INT (temp1))); + gen_rtx_SET (new_src, GEN_INT (temp1))); emit_constant_insn (cond, gen_ashrsi3 (target, new_src, GEN_INT (set_sign_bit_copies - 1))); @@ -4331,8 +4326,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, { rtx new_src = subtargets ? gen_reg_rtx (mode) : target; emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, new_src, - GEN_INT (temp1))); + gen_rtx_SET (new_src, GEN_INT (temp1))); emit_constant_insn (cond, gen_ashrsi3 (target, new_src, GEN_INT (set_sign_bit_copies - 1))); @@ -4365,8 +4359,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, { rtx new_src = subtargets ? gen_reg_rtx (mode) : target; emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, new_src, - GEN_INT (temp1))); + gen_rtx_SET (new_src, GEN_INT (temp1))); emit_constant_insn (cond, gen_addsi3 (target, new_src, GEN_INT (-temp2))); @@ -4402,7 +4395,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, emit_constant_insn (cond, gen_rtx_SET - (VOIDmode, target, + (target, gen_rtx_IOR (mode, gen_rtx_ASHIFT (mode, source, GEN_INT (i)), @@ -4426,7 +4419,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, if (generate) emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, + gen_rtx_SET (target, gen_rtx_IOR (mode, gen_rtx_LSHIFTRT (mode, source, @@ -4454,10 +4447,9 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, rtx sub = subtargets ? gen_reg_rtx (mode) : target; emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, sub, - GEN_INT (val))); + gen_rtx_SET (sub, GEN_INT (val))); emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, + gen_rtx_SET (target, gen_rtx_fmt_ee (code, mode, source, sub))); } @@ -4489,14 +4481,14 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, sub, + gen_rtx_SET (sub, gen_rtx_NOT (mode, gen_rtx_ASHIFT (mode, source, shift)))); emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, + gen_rtx_SET (target, gen_rtx_NOT (mode, gen_rtx_LSHIFTRT (mode, sub, shift)))); @@ -4524,14 +4516,14 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, sub, + gen_rtx_SET (sub, gen_rtx_NOT (mode, gen_rtx_LSHIFTRT (mode, source, shift)))); emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, + gen_rtx_SET (target, gen_rtx_NOT (mode, gen_rtx_ASHIFT (mode, sub, shift)))); @@ -4552,17 +4544,17 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, { rtx sub = subtargets ? gen_reg_rtx (mode) : target; emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, sub, + gen_rtx_SET (sub, gen_rtx_NOT (mode, source))); source = sub; if (subtargets) sub = gen_reg_rtx (mode); emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, sub, + gen_rtx_SET (sub, gen_rtx_AND (mode, source, GEN_INT (temp1)))); emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, target, + gen_rtx_SET (target, gen_rtx_NOT (mode, sub))); } return 3; @@ -4728,9 +4720,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, else temp1_rtx = gen_rtx_fmt_ee (code, mode, source, temp1_rtx); - emit_constant_insn (cond, - gen_rtx_SET (VOIDmode, new_src, - temp1_rtx)); + emit_constant_insn (cond, gen_rtx_SET (new_src, temp1_rtx)); source = new_src; if (code == SET) @@ -4747,7 +4737,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, if (final_invert) { if (generate) - emit_constant_insn (cond, gen_rtx_SET (VOIDmode, target, + emit_constant_insn (cond, gen_rtx_SET (target, gen_rtx_NOT (mode, source))); insns++; } @@ -6840,7 +6830,7 @@ arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED) pic_rtx = gen_rtx_CONST (Pmode, pic_rtx); emit_insn (gen_pic_load_addr_32bit (pic_reg, pic_rtx)); - emit_insn (gen_rtx_SET (Pmode, pic_reg, gen_rtx_MEM (Pmode, pic_reg))); + emit_insn (gen_rtx_SET (pic_reg, gen_rtx_MEM (Pmode, pic_reg))); pic_tmp = gen_rtx_SYMBOL_REF (Pmode, VXWORKS_GOTT_INDEX); emit_insn (gen_pic_offset_arm (pic_reg, pic_reg, pic_tmp)); @@ -12634,8 +12624,7 @@ neon_expand_vector_init (rtx target, rtx vals) if (all_same && GET_MODE_SIZE (inner_mode) <= 4) { x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, 0)); - emit_insn (gen_rtx_SET (VOIDmode, target, - gen_rtx_VEC_DUPLICATE (mode, x))); + emit_insn (gen_rtx_SET (target, gen_rtx_VEC_DUPLICATE (mode, x))); return; } @@ -13837,15 +13826,14 @@ arm_gen_load_multiple_1 (int count, int *regs, rtx *mems, rtx basereg, if (wback_offset != 0) { XVECEXP (result, 0, 0) - = gen_rtx_SET (VOIDmode, basereg, - plus_constant (Pmode, basereg, wback_offset)); + = gen_rtx_SET (basereg, plus_constant (Pmode, basereg, wback_offset)); i = 1; count++; } for (j = 0; i < count; i++, j++) XVECEXP (result, 0, i) - = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regs[j]), mems[j]); + = gen_rtx_SET (gen_rtx_REG (SImode, regs[j]), mems[j]); return result; } @@ -13889,15 +13877,14 @@ arm_gen_store_multiple_1 (int count, int *regs, rtx *mems, rtx basereg, if (wback_offset != 0) { XVECEXP (result, 0, 0) - = gen_rtx_SET (VOIDmode, basereg, - plus_constant (Pmode, basereg, wback_offset)); + = gen_rtx_SET (basereg, plus_constant (Pmode, basereg, wback_offset)); i = 1; count++; } for (j = 0; i < count; i++, j++) XVECEXP (result, 0, i) - = gen_rtx_SET (VOIDmode, mems[j], gen_rtx_REG (SImode, regs[j])); + = gen_rtx_SET (mems[j], gen_rtx_REG (SImode, regs[j])); return result; } @@ -15179,7 +15166,7 @@ arm_gen_compare_reg (enum rtx_code code, rtx x, rtx y, rtx scratch) scratch = gen_rtx_SCRATCH (SImode); clobber = gen_rtx_CLOBBER (VOIDmode, scratch); - set = gen_rtx_SET (VOIDmode, cc_reg, gen_rtx_COMPARE (mode, x, y)); + set = gen_rtx_SET (cc_reg, gen_rtx_COMPARE (mode, x, y)); emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, clobber))); } else @@ -17049,7 +17036,7 @@ thumb1_reorg (void) dest = copy_rtx (dest); src = copy_rtx (src); src = gen_rtx_MINUS (SImode, src, const0_rtx); - PATTERN (prev) = gen_rtx_SET (VOIDmode, dest, src); + PATTERN (prev) = gen_rtx_SET (dest, src); INSN_CODE (prev) = -1; /* Set test register in INSN to dest. */ XEXP (XEXP (SET_SRC (pat), 0), 0) = copy_rtx (dest); @@ -17250,7 +17237,7 @@ thumb2_reorg (void) src = copy_rtx (src); XEXP (src, 0) = op1; XEXP (src, 1) = op0; - pat = gen_rtx_SET (VOIDmode, dst, src); + pat = gen_rtx_SET (dst, src); vec = gen_rtvec (2, pat, clobber); } else /* action == CONV */ @@ -17611,8 +17598,7 @@ vfp_emit_fstmd (int base_reg, int count) base_reg += 2; XVECEXP (par, 0, 0) - = gen_rtx_SET (VOIDmode, - gen_frame_mem + = gen_rtx_SET (gen_frame_mem (BLKmode, gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, @@ -17624,14 +17610,12 @@ vfp_emit_fstmd (int base_reg, int count) gen_rtvec (1, reg), UNSPEC_PUSH_MULT)); - tmp = gen_rtx_SET (VOIDmode, stack_pointer_rtx, + tmp = gen_rtx_SET (stack_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, -(count * 8))); RTX_FRAME_RELATED_P (tmp) = 1; XVECEXP (dwarf, 0, 0) = tmp; - tmp = gen_rtx_SET (VOIDmode, - gen_frame_mem (DFmode, stack_pointer_rtx), - reg); + tmp = gen_rtx_SET (gen_frame_mem (DFmode, stack_pointer_rtx), reg); RTX_FRAME_RELATED_P (tmp) = 1; XVECEXP (dwarf, 0, 1) = tmp; @@ -17641,8 +17625,7 @@ vfp_emit_fstmd (int base_reg, int count) base_reg += 2; XVECEXP (par, 0, i) = gen_rtx_USE (VOIDmode, reg); - tmp = gen_rtx_SET (VOIDmode, - gen_frame_mem (DFmode, + tmp = gen_rtx_SET (gen_frame_mem (DFmode, plus_constant (Pmode, stack_pointer_rtx, i * 8)), @@ -19636,9 +19619,8 @@ thumb2_emit_strd_push (unsigned long saved_regs_mask) dwarf = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (num_regs + 1)); /* Describe the stack adjustment. */ - tmp = gen_rtx_SET (VOIDmode, - stack_pointer_rtx, - plus_constant (Pmode, stack_pointer_rtx, -4 * num_regs)); + tmp = gen_rtx_SET (stack_pointer_rtx, + plus_constant (Pmode, stack_pointer_rtx, -4 * num_regs)); RTX_FRAME_RELATED_P (tmp) = 1; XVECEXP (dwarf, 0, 0) = tmp; @@ -19667,13 +19649,12 @@ thumb2_emit_strd_push (unsigned long saved_regs_mask) plus_constant (Pmode, stack_pointer_rtx, -4 * num_regs))); - tmp = gen_rtx_SET (VOIDmode, mem, reg); + tmp = gen_rtx_SET (mem, reg); RTX_FRAME_RELATED_P (tmp) = 1; insn = emit_insn (tmp); RTX_FRAME_RELATED_P (insn) = 1; add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf); - tmp = gen_rtx_SET (VOIDmode, gen_frame_mem (Pmode, stack_pointer_rtx), - reg); + tmp = gen_rtx_SET (gen_frame_mem (Pmode, stack_pointer_rtx), reg); RTX_FRAME_RELATED_P (tmp) = 1; i++; regno++; @@ -19707,11 +19688,11 @@ thumb2_emit_strd_push (unsigned long saved_regs_mask) mem2 = gen_frame_mem (Pmode, plus_constant (Pmode, stack_pointer_rtx, -4 * (num_regs - 1))); - tmp0 = gen_rtx_SET (VOIDmode, stack_pointer_rtx, + tmp0 = gen_rtx_SET (stack_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, -4 * (num_regs))); - tmp1 = gen_rtx_SET (VOIDmode, mem1, reg1); - tmp2 = gen_rtx_SET (VOIDmode, mem2, reg2); + tmp1 = gen_rtx_SET (mem1, reg1); + tmp2 = gen_rtx_SET (mem2, reg2); RTX_FRAME_RELATED_P (tmp0) = 1; RTX_FRAME_RELATED_P (tmp1) = 1; RTX_FRAME_RELATED_P (tmp2) = 1; @@ -19731,8 +19712,8 @@ thumb2_emit_strd_push (unsigned long saved_regs_mask) mem2 = gen_frame_mem (Pmode, plus_constant (Pmode, stack_pointer_rtx, 4 * (i + 1))); - tmp1 = gen_rtx_SET (VOIDmode, mem1, reg1); - tmp2 = gen_rtx_SET (VOIDmode, mem2, reg2); + tmp1 = gen_rtx_SET (mem1, reg1); + tmp2 = gen_rtx_SET (mem2, reg2); RTX_FRAME_RELATED_P (tmp1) = 1; RTX_FRAME_RELATED_P (tmp2) = 1; par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2)); @@ -19742,14 +19723,12 @@ thumb2_emit_strd_push (unsigned long saved_regs_mask) } /* Create unwind information. This is an approximation. */ - tmp1 = gen_rtx_SET (VOIDmode, - gen_frame_mem (Pmode, + tmp1 = gen_rtx_SET (gen_frame_mem (Pmode, plus_constant (Pmode, stack_pointer_rtx, 4 * i)), reg1); - tmp2 = gen_rtx_SET (VOIDmode, - gen_frame_mem (Pmode, + tmp2 = gen_rtx_SET (gen_frame_mem (Pmode, plus_constant (Pmode, stack_pointer_rtx, 4 * (i + 1))), @@ -19800,8 +19779,7 @@ arm_emit_strd_push (unsigned long saved_regs_mask) dwarf = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (num_regs + 1)); /* For dwarf info, we generate explicit stack update. */ - tmp = gen_rtx_SET (VOIDmode, - stack_pointer_rtx, + tmp = gen_rtx_SET (stack_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, -4 * num_regs)); RTX_FRAME_RELATED_P (tmp) = 1; XVECEXP (dwarf, 0, dwarf_index++) = tmp; @@ -19833,7 +19811,7 @@ arm_emit_strd_push (unsigned long saved_regs_mask) else mem = gen_frame_mem (DImode, stack_pointer_rtx); - tmp = gen_rtx_SET (DImode, mem, gen_rtx_REG (DImode, j)); + tmp = gen_rtx_SET (mem, gen_rtx_REG (DImode, j)); RTX_FRAME_RELATED_P (tmp) = 1; tmp = emit_insn (tmp); @@ -19846,7 +19824,7 @@ arm_emit_strd_push (unsigned long saved_regs_mask) plus_constant (Pmode, stack_pointer_rtx, offset)); - tmp = gen_rtx_SET (SImode, mem, gen_rtx_REG (SImode, j)); + tmp = gen_rtx_SET (mem, gen_rtx_REG (SImode, j)); RTX_FRAME_RELATED_P (tmp) = 1; XVECEXP (dwarf, 0, dwarf_index++) = tmp; @@ -19854,7 +19832,7 @@ arm_emit_strd_push (unsigned long saved_regs_mask) plus_constant (Pmode, stack_pointer_rtx, offset + 4)); - tmp = gen_rtx_SET (SImode, mem, gen_rtx_REG (SImode, j + 1)); + tmp = gen_rtx_SET (mem, gen_rtx_REG (SImode, j + 1)); RTX_FRAME_RELATED_P (tmp) = 1; XVECEXP (dwarf, 0, dwarf_index++) = tmp; @@ -19880,7 +19858,7 @@ arm_emit_strd_push (unsigned long saved_regs_mask) else mem = gen_frame_mem (SImode, stack_pointer_rtx); - tmp = gen_rtx_SET (SImode, mem, gen_rtx_REG (SImode, j)); + tmp = gen_rtx_SET (mem, gen_rtx_REG (SImode, j)); RTX_FRAME_RELATED_P (tmp) = 1; tmp = emit_insn (tmp); @@ -19893,7 +19871,7 @@ arm_emit_strd_push (unsigned long saved_regs_mask) plus_constant(Pmode, stack_pointer_rtx, offset)); - tmp = gen_rtx_SET (SImode, mem, gen_rtx_REG (SImode, j)); + tmp = gen_rtx_SET (mem, gen_rtx_REG (SImode, j)); RTX_FRAME_RELATED_P (tmp) = 1; XVECEXP (dwarf, 0, dwarf_index++) = tmp; @@ -19992,8 +19970,7 @@ emit_multi_reg_push (unsigned long mask, unsigned long dwarf_regs_mask) reg = gen_rtx_REG (SImode, i); XVECEXP (par, 0, 0) - = gen_rtx_SET (VOIDmode, - gen_frame_mem + = gen_rtx_SET (gen_frame_mem (BLKmode, gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, @@ -20007,8 +19984,7 @@ emit_multi_reg_push (unsigned long mask, unsigned long dwarf_regs_mask) if (dwarf_regs_mask & (1 << i)) { - tmp = gen_rtx_SET (VOIDmode, - gen_frame_mem (SImode, stack_pointer_rtx), + tmp = gen_rtx_SET (gen_frame_mem (SImode, stack_pointer_rtx), reg); RTX_FRAME_RELATED_P (tmp) = 1; XVECEXP (dwarf, 0, dwarf_par_index++) = tmp; @@ -20029,8 +20005,7 @@ emit_multi_reg_push (unsigned long mask, unsigned long dwarf_regs_mask) if (dwarf_regs_mask & (1 << i)) { tmp - = gen_rtx_SET (VOIDmode, - gen_frame_mem + = gen_rtx_SET (gen_frame_mem (SImode, plus_constant (Pmode, stack_pointer_rtx, 4 * j)), @@ -20045,8 +20020,7 @@ emit_multi_reg_push (unsigned long mask, unsigned long dwarf_regs_mask) par = emit_insn (par); - tmp = gen_rtx_SET (VOIDmode, - stack_pointer_rtx, + tmp = gen_rtx_SET (stack_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, -4 * num_regs)); RTX_FRAME_RELATED_P (tmp) = 1; XVECEXP (dwarf, 0, 0) = tmp; @@ -20065,7 +20039,7 @@ arm_add_cfa_adjust_cfa_note (rtx insn, int size, rtx dest, rtx src) rtx dwarf; RTX_FRAME_RELATED_P (insn) = 1; - dwarf = gen_rtx_SET (VOIDmode, dest, plus_constant (Pmode, src, size)); + dwarf = gen_rtx_SET (dest, plus_constant (Pmode, src, size)); add_reg_note (insn, REG_CFA_ADJUST_CFA, dwarf); } @@ -20108,8 +20082,7 @@ arm_emit_multi_reg_pop (unsigned long saved_regs_mask) { /* Increment the stack pointer, based on there being num_regs 4-byte registers to restore. */ - tmp = gen_rtx_SET (VOIDmode, - stack_pointer_rtx, + tmp = gen_rtx_SET (stack_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, 4 * num_regs)); @@ -20128,13 +20101,12 @@ arm_emit_multi_reg_pop (unsigned long saved_regs_mask) tmp = gen_frame_mem (SImode, gen_rtx_POST_INC (Pmode, stack_pointer_rtx)); - tmp = emit_insn (gen_rtx_SET (VOIDmode, reg, tmp)); + tmp = emit_insn (gen_rtx_SET (reg, tmp)); REG_NOTES (tmp) = alloc_reg_note (REG_CFA_RESTORE, reg, dwarf); return; } - tmp = gen_rtx_SET (VOIDmode, - reg, + tmp = gen_rtx_SET (reg, gen_frame_mem (SImode, plus_constant (Pmode, stack_pointer_rtx, 4 * j))); @@ -20202,9 +20174,7 @@ arm_emit_vfp_multi_reg_pop (int first_reg, int num_regs, rtx base_reg) /* Increment the stack pointer, based on there being num_regs 8-byte registers to restore. */ - tmp = gen_rtx_SET (VOIDmode, - base_reg, - plus_constant (Pmode, base_reg, 8 * num_regs)); + tmp = gen_rtx_SET (base_reg, plus_constant (Pmode, base_reg, 8 * num_regs)); RTX_FRAME_RELATED_P (tmp) = 1; XVECEXP (par, 0, 0) = tmp; @@ -20213,8 +20183,7 @@ arm_emit_vfp_multi_reg_pop (int first_reg, int num_regs, rtx base_reg) { reg = gen_rtx_REG (DFmode, i); - tmp = gen_rtx_SET (VOIDmode, - reg, + tmp = gen_rtx_SET (reg, gen_frame_mem (DFmode, plus_constant (Pmode, base_reg, 8 * j))); @@ -20280,8 +20249,7 @@ thumb2_emit_ldrd_pop (unsigned long saved_regs_mask) { /* Create RTX for memory load. */ reg = gen_rtx_REG (SImode, j); - tmp = gen_rtx_SET (SImode, - reg, + tmp = gen_rtx_SET (reg, gen_frame_mem (SImode, plus_constant (Pmode, stack_pointer_rtx, 4 * i))); @@ -20325,8 +20293,7 @@ thumb2_emit_ldrd_pop (unsigned long saved_regs_mask) /* Increment the stack pointer, based on there being num_regs 4-byte registers to restore. */ - tmp = gen_rtx_SET (VOIDmode, - stack_pointer_rtx, + tmp = gen_rtx_SET (stack_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, 4 * i)); RTX_FRAME_RELATED_P (tmp) = 1; tmp = emit_insn (tmp); @@ -20352,7 +20319,7 @@ thumb2_emit_ldrd_pop (unsigned long saved_regs_mask) set_mem_alias_set (tmp1, get_frame_alias_set ()); reg = gen_rtx_REG (SImode, j); - tmp = gen_rtx_SET (SImode, reg, tmp1); + tmp = gen_rtx_SET (reg, tmp1); RTX_FRAME_RELATED_P (tmp) = 1; dwarf = alloc_reg_note (REG_CFA_RESTORE, reg, dwarf); @@ -20425,7 +20392,7 @@ arm_emit_ldrd_pop (unsigned long saved_regs_mask) else mem = gen_frame_mem (DImode, stack_pointer_rtx); - tmp = gen_rtx_SET (DImode, gen_rtx_REG (DImode, j), mem); + tmp = gen_rtx_SET (gen_rtx_REG (DImode, j), mem); tmp = emit_insn (tmp); RTX_FRAME_RELATED_P (tmp) = 1; @@ -20454,7 +20421,7 @@ arm_emit_ldrd_pop (unsigned long saved_regs_mask) else mem = gen_frame_mem (SImode, stack_pointer_rtx); - tmp = gen_rtx_SET (SImode, gen_rtx_REG (SImode, j), mem); + tmp = gen_rtx_SET (gen_rtx_REG (SImode, j), mem); tmp = emit_insn (tmp); RTX_FRAME_RELATED_P (tmp) = 1; @@ -20475,8 +20442,7 @@ arm_emit_ldrd_pop (unsigned long saved_regs_mask) /* Update the stack. */ if (offset > 0) { - tmp = gen_rtx_SET (Pmode, - stack_pointer_rtx, + tmp = gen_rtx_SET (stack_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, offset)); @@ -20491,8 +20457,7 @@ arm_emit_ldrd_pop (unsigned long saved_regs_mask) /* Only PC is to be popped. */ par = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2)); XVECEXP (par, 0, 0) = ret_rtx; - tmp = gen_rtx_SET (SImode, - gen_rtx_REG (SImode, PC_REGNUM), + tmp = gen_rtx_SET (gen_rtx_REG (SImode, PC_REGNUM), gen_frame_mem (SImode, gen_rtx_POST_INC (SImode, stack_pointer_rtx))); @@ -20968,7 +20933,7 @@ thumb_set_frame_pointer (arm_stack_offsets *offsets) hard_frame_pointer_rtx, stack_pointer_rtx)); } - dwarf = gen_rtx_SET (VOIDmode, hard_frame_pointer_rtx, + dwarf = gen_rtx_SET (hard_frame_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, amount)); RTX_FRAME_RELATED_P (dwarf) = 1; add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf); @@ -21101,7 +21066,7 @@ arm_expand_prologue (void) fp_offset = 4; /* Just tell the dwarf backend that we adjusted SP. */ - dwarf = gen_rtx_SET (VOIDmode, stack_pointer_rtx, + dwarf = gen_rtx_SET (stack_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, -fp_offset)); RTX_FRAME_RELATED_P (insn) = 1; @@ -21135,7 +21100,7 @@ arm_expand_prologue (void) /* Just tell the dwarf backend that we adjusted SP. */ dwarf - = gen_rtx_SET (VOIDmode, stack_pointer_rtx, + = gen_rtx_SET (stack_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, -args_to_push)); add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf); @@ -23271,8 +23236,8 @@ neon_split_vcombine (rtx operands[3]) /* Special case of reversed high/low parts. Use VSWP. */ if (src2 == dest && src1 == dest + halfregs) { - rtx x = gen_rtx_SET (VOIDmode, destlo, operands[1]); - rtx y = gen_rtx_SET (VOIDmode, desthi, operands[2]); + rtx x = gen_rtx_SET (destlo, operands[1]); + rtx y = gen_rtx_SET (desthi, operands[2]); emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, x, y))); return; } @@ -23334,7 +23299,7 @@ thumb1_emit_multi_reg_push (unsigned long mask, unsigned long real_regs) tmp = plus_constant (Pmode, stack_pointer_rtx, -4 * i); tmp = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, tmp); tmp = gen_frame_mem (BLKmode, tmp); - tmp = gen_rtx_SET (VOIDmode, tmp, par[0]); + tmp = gen_rtx_SET (tmp, par[0]); par[0] = tmp; tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec_v (i, par)); @@ -23342,7 +23307,7 @@ thumb1_emit_multi_reg_push (unsigned long mask, unsigned long real_regs) /* Always build the stack adjustment note for unwind info. */ tmp = plus_constant (Pmode, stack_pointer_rtx, -4 * i); - tmp = gen_rtx_SET (VOIDmode, stack_pointer_rtx, tmp); + tmp = gen_rtx_SET (stack_pointer_rtx, tmp); par[0] = tmp; /* Build the parallel of the registers recorded as saved for unwind. */ @@ -23353,7 +23318,7 @@ thumb1_emit_multi_reg_push (unsigned long mask, unsigned long real_regs) tmp = plus_constant (Pmode, stack_pointer_rtx, j * 4); tmp = gen_frame_mem (SImode, tmp); - tmp = gen_rtx_SET (VOIDmode, tmp, reg); + tmp = gen_rtx_SET (tmp, reg); RTX_FRAME_RELATED_P (tmp) = 1; par[j + 1] = tmp; } @@ -24510,7 +24475,7 @@ thumb1_expand_prologue (void) insn = emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, reg)); - dwarf = gen_rtx_SET (VOIDmode, stack_pointer_rtx, + dwarf = gen_rtx_SET (stack_pointer_rtx, plus_constant (Pmode, stack_pointer_rtx, -amount)); add_reg_note (insn, REG_FRAME_RELATED_EXPR, dwarf); @@ -24566,7 +24531,7 @@ thumb2_expand_return (bool simple_return) stack_pointer_rtx)); set_mem_alias_set (addr, get_frame_alias_set ()); XVECEXP (par, 0, 0) = ret_rtx; - XVECEXP (par, 0, 1) = gen_rtx_SET (SImode, reg, addr); + XVECEXP (par, 0, 1) = gen_rtx_SET (reg, addr); RTX_FRAME_RELATED_P (XVECEXP (par, 0, 1)) = 1; emit_jump_insn (par); } @@ -24999,8 +24964,7 @@ arm_expand_epilogue (bool really_return) { insn = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (2)); XVECEXP (insn, 0, 0) = ret_rtx; - XVECEXP (insn, 0, 1) = gen_rtx_SET (SImode, - gen_rtx_REG (SImode, i), + XVECEXP (insn, 0, 1) = gen_rtx_SET (gen_rtx_REG (SImode, i), addr); RTX_FRAME_RELATED_P (XVECEXP (insn, 0, 1)) = 1; insn = emit_jump_insn (insn); @@ -27497,7 +27461,7 @@ arm_expand_compare_and_swap (rtx operands[]) in a subsequent branch, post optimization. */ x = gen_rtx_REG (CCmode, CC_REGNUM); x = gen_rtx_EQ (SImode, x, const0_rtx); - emit_insn (gen_rtx_SET (VOIDmode, bval, x)); + emit_insn (gen_rtx_SET (bval, x)); } /* Split a compare and swap pattern. It is IMPLEMENTATION DEFINED whether @@ -27554,7 +27518,7 @@ arm_split_compare_and_swap (rtx operands[]) x = gen_rtx_NE (VOIDmode, cond, const0_rtx); x = gen_rtx_IF_THEN_ELSE (VOIDmode, x, gen_rtx_LABEL_REF (Pmode, label2), pc_rtx); - emit_unlikely_jump (gen_rtx_SET (VOIDmode, pc_rtx, x)); + emit_unlikely_jump (gen_rtx_SET (pc_rtx, x)); arm_emit_store_exclusive (mode, scratch, mem, newval, use_release); @@ -27562,14 +27526,14 @@ arm_split_compare_and_swap (rtx operands[]) match the flags that we got from the compare above. */ cond = gen_rtx_REG (CCmode, CC_REGNUM); x = gen_rtx_COMPARE (CCmode, scratch, const0_rtx); - emit_insn (gen_rtx_SET (VOIDmode, cond, x)); + emit_insn (gen_rtx_SET (cond, x)); if (!is_weak) { x = gen_rtx_NE (VOIDmode, cond, const0_rtx); x = gen_rtx_IF_THEN_ELSE (VOIDmode, x, gen_rtx_LABEL_REF (Pmode, label1), pc_rtx); - emit_unlikely_jump (gen_rtx_SET (VOIDmode, pc_rtx, x)); + emit_unlikely_jump (gen_rtx_SET (pc_rtx, x)); } if (mod_f != MEMMODEL_RELAXED) @@ -27628,9 +27592,9 @@ arm_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem, case NOT: x = gen_rtx_AND (wmode, old_out, value); - emit_insn (gen_rtx_SET (VOIDmode, new_out, x)); + emit_insn (gen_rtx_SET (new_out, x)); x = gen_rtx_NOT (wmode, new_out); - emit_insn (gen_rtx_SET (VOIDmode, new_out, x)); + emit_insn (gen_rtx_SET (new_out, x)); break; case MINUS: @@ -27662,7 +27626,7 @@ arm_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem, default: x = gen_rtx_fmt_ee (code, wmode, old_out, value); - emit_insn (gen_rtx_SET (VOIDmode, new_out, x)); + emit_insn (gen_rtx_SET (new_out, x)); break; } @@ -28382,7 +28346,7 @@ arm_emit_coreregs_64bit_shift (enum rtx_code code, rtx out, rtx in, gen_addsi3_compare0 ((DEST), (SRC), \ GEN_INT (-32)) #define SET(DEST,SRC) \ - gen_rtx_SET (SImode, (DEST), (SRC)) + gen_rtx_SET ((DEST), (SRC)) #define SHIFT(CODE,SRC,AMOUNT) \ gen_rtx_fmt_ee ((CODE), SImode, (SRC), (AMOUNT)) #define LSHIFT(CODE,SRC,AMOUNT) \ |