diff options
Diffstat (limited to 'gcc/config/arc/arc.md')
| -rw-r--r-- | gcc/config/arc/arc.md | 35 |
1 files changed, 19 insertions, 16 deletions
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index e127d5b0352..7147fbdb244 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -704,9 +704,9 @@ ; the iscompact attribute allows the epilogue expander to know for which ; insns it should lengthen the return insn. ; N.B. operand 1 of alternative 7 expands into pcl,symbol@gotpc . -(define_insn "*movsi_insn" ; 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 - [(set (match_operand:SI 0 "move_dest_operand" "=Rcq,Rcq#q, w, h, w,w, w, w, w, w,???w, ?w, w,Rcq#q, w,Rcq, S, Us<,RcqRck,!*x, r,!*Rsd,!*Rcd,r,Ucm, Usd,m,???m,VUsc,VUsc") - (match_operand:SI 1 "move_src_operand" " cL, cP,Rcq#q,hCm1,cL,I,Crr,Clo,Chi,Cbi,?Rac,Cpc,Clb, ?Cal,?Cal, T,Rcq,RcqRck, Us>,Usd,Ucm, Usd, Ucd,m, w,!*Rzd,c,?Rac, Cm3, C32"))] +(define_insn "*movsi_insn" ; 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 + [(set (match_operand:SI 0 "move_dest_operand" "=Rcq,Rcq#q, w, h, w,w, w, w, w, w,???w, ?w, w,Rcq#q, w,Rcq, S, Us<,RcqRck,!*x, r,!*Rsd,!*Rcd,r,Ucm, Usd,m,???m,VUsc,VUsc") + (match_operand:SI 1 "move_src_operand" " cL, cP,Rcq#q,hPCm1,cL,I,Crr,Clo,Chi,Cbi,?Rac,Cpc,Clb, ?Cal,?Cal, T,Rcq,RcqRck, Us>,Usd,Ucm, Usd, Ucd,m, w,!*Rzd,c,?Rac, Cm3, C32"))] "register_operand (operands[0], SImode) || register_operand (operands[1], SImode) || (CONSTANT_P (operands[1]) @@ -751,7 +751,7 @@ ; of Crr to 4. (set_attr "length" "*,*,*,*,4,4,4,4,4,4,4,8,8,*,8,*,*,*,*,*,4,*,4,*,*,*,*,*,4,8") (set_attr "predicable" "yes,no,yes,no,yes,no,no,no,no,no,yes,no,no,yes,yes,no,no,no,no,no,no,no,no,no,no,no,no,no,no,no") - (set_attr "cpu_facility" "*,*,av1,av2,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,av2,av2,*,*,av2,*,*,av2,*")]) + (set_attr "cpu_facility" "av1,av1,av1,av2,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,av2,av2,*,*,av2,*,*,av2,*")]) ;; Sometimes generated by the epilogue code. We don't want to ;; recognize these addresses in general, because the limm is costly, @@ -1088,12 +1088,9 @@ (match_operand:DI 1 "general_operand" ""))] "" " -{ - /* Everything except mem = const or mem = mem can be done easily. */ - - if (GET_CODE (operands[0]) == MEM) - operands[1] = force_reg (DImode, operands[1]); -}") + if (prepare_move_operands (operands, DImode)) + DONE; + ") (define_insn_and_split "*movdi_insn" [(set (match_operand:DI 0 "move_dest_operand" "=w, w,r,m") @@ -1140,7 +1137,7 @@ ;; Floating point move insns. (define_expand "movsf" - [(set (match_operand:SF 0 "general_operand" "") + [(set (match_operand:SF 0 "move_dest_operand" "") (match_operand:SF 1 "general_operand" ""))] "" "if (prepare_move_operands (operands, SFmode)) DONE;") @@ -1161,7 +1158,7 @@ (set_attr "iscompact" "true,false,false,false,false")]) (define_expand "movdf" - [(set (match_operand:DF 0 "nonimmediate_operand" "") + [(set (match_operand:DF 0 "move_dest_operand" "") (match_operand:DF 1 "general_operand" ""))] "" "if (prepare_move_operands (operands, DFmode)) DONE;") @@ -1231,12 +1228,18 @@ ; second time to put back the contents which the first DEXCLx ; will have overwritten ; dexcl2 r0, r1, r0 - (set (match_dup 4) ; aka r0result - ; aka DF, r1, r0 - (unspec_volatile:SI [(match_dup 1) (match_dup 5) (match_dup 4)] VUNSPEC_ARC_DEXCL )) + (parallel [ + (set (match_dup 4) ; aka r0result + ; aka DF, r1, r0 + (unspec_volatile:SI [(match_dup 5) (match_dup 4)] + VUNSPEC_ARC_DEXCL)) + (clobber (match_dup 1)) + ]) ; Generate the second, which makes sure operand5 and operand4 values ; are put back in the Dx register properly. - (unspec_volatile:SI [(match_dup 1) (match_dup 5) (match_dup 4)] VUNSPEC_ARC_DEXCL_NORES ) + (set (match_dup 1) (unspec_volatile:DF + [(match_dup 5) (match_dup 4)] + VUNSPEC_ARC_DEXCL_NORES)) ; Note: we cannot use a (clobber (match_scratch)) here because ; the combine pass will end up replacing uses of it with 0 |