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Diffstat (limited to 'gcc/ChangeLog')
| -rw-r--r-- | gcc/ChangeLog | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 32a3dff0974..af0abc86e14 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,21 @@ +2015-08-24 Michael Meissner <meissner@linux.vnet.ibm.com> + + Back port from mainline: + 2015-08-24 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/67211 + * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Set + -mefficient-unaligned-vsx on ISA 2.7. + + * config/rs6000/rs6000.opt (-mefficient-unaligned-vsx): Convert + option to a masked option. + + * config/rs6000/rs6000.c (rs6000_option_override_internal): Rework + logic for -mefficient-unaligned-vsx so that it is set via an arch + ISA option, instead of being set if -mtune=power8 is set. Move + -mefficient-unaligned-vsx and -mallow-movmisalign handling to be + near other default option handling. + 2015-08-20 Georg-Johann Lay <avr@gjlay.de> * config/avr/avr.c (avr_insert_attributes): In diagnostic essage: |