diff options
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 20 | ||||
| -rw-r--r-- | gcc/mode-switching.c | 5 |
3 files changed, 23 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 785b0907e3f..a2fe4ec6acc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2013-05-13 Jan Hubicka <jh@suse.cz> + + * mode-switching.c (optimize_mode_switching): Set correct RTL profile. + * config/i386/i386.c (ix86_compute_frame_layout, + ix86_expand_epilogue, emit_i387_cw_initialization, ix86_expand_vector_move_misalign, + ix86_fp_comparison_strategy, ix86_local_alignment): Fix use of size/speed predicates. + 2013-05-13 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/45216 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index c28a8578c58..0999b6e608b 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -9003,7 +9003,7 @@ ix86_compute_frame_layout (struct ix86_frame *frame) Recompute the value as needed. Do not recompute when amount of registers didn't change as reload does multiple calls to the function and does not expect the decision to change within single iteration. */ - else if (!optimize_function_for_size_p (cfun) + else if (!optimize_bb_for_size_p (ENTRY_BLOCK_PTR) && cfun->machine->use_fast_prologue_epilogue_nregs != frame->nregs) { int count = frame->nregs; @@ -11071,7 +11071,7 @@ ix86_expand_epilogue (int style) /* Leave results in shorter dependency chains on CPUs that are able to grok it fast. */ else if (TARGET_USE_LEAVE - || optimize_function_for_size_p (cfun) + || optimize_bb_for_size_p (EXIT_BLOCK_PTR) || !cfun->machine->use_fast_prologue_epilogue) ix86_emit_leave (); else @@ -15668,7 +15668,7 @@ emit_i387_cw_initialization (int mode) emit_move_insn (reg, copy_rtx (stored_mode)); if (TARGET_64BIT || TARGET_PARTIAL_REG_STALL - || optimize_function_for_size_p (cfun)) + || optimize_insn_for_size_p ()) { switch (mode) { @@ -16426,7 +16426,7 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[]) if (TARGET_AVX || TARGET_SSE_UNALIGNED_LOAD_OPTIMAL || TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL - || optimize_function_for_size_p (cfun)) + || optimize_insn_for_size_p ()) { /* We will eventually emit movups based on insn attributes. */ emit_insn (gen_sse2_loadupd (op0, op1)); @@ -16463,7 +16463,7 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[]) if (TARGET_AVX || TARGET_SSE_UNALIGNED_LOAD_OPTIMAL || TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL - || optimize_function_for_size_p (cfun)) + || optimize_insn_for_size_p ()) { op0 = gen_lowpart (V4SFmode, op0); op1 = gen_lowpart (V4SFmode, op1); @@ -16499,7 +16499,7 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[]) if (TARGET_AVX || TARGET_SSE_UNALIGNED_STORE_OPTIMAL || TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL - || optimize_function_for_size_p (cfun)) + || optimize_insn_for_size_p ()) /* We will eventually emit movups based on insn attributes. */ emit_insn (gen_sse2_storeupd (op0, op1)); else @@ -16518,7 +16518,7 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[]) if (TARGET_AVX || TARGET_SSE_UNALIGNED_STORE_OPTIMAL || TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL - || optimize_function_for_size_p (cfun)) + || optimize_insn_for_size_p ()) { op0 = gen_lowpart (V4SFmode, op0); emit_insn (gen_sse_storeups (op0, op1)); @@ -18764,7 +18764,7 @@ ix86_fp_comparison_strategy (enum rtx_code code ATTRIBUTE_UNUSED) if (TARGET_CMOVE) return IX86_FPCMP_COMI; - if (TARGET_SAHF && (TARGET_USE_SAHF || optimize_function_for_size_p (cfun))) + if (TARGET_SAHF && (TARGET_USE_SAHF || optimize_insn_for_size_p ())) return IX86_FPCMP_SAHF; return IX86_FPCMP_ARITH; @@ -25193,7 +25193,9 @@ ix86_local_alignment (tree exp, enum machine_mode mode, other unit can not rely on the alignment. Exclude va_list type. It is the common case of local array where - we can not benefit from the alignment. */ + we can not benefit from the alignment. + + TODO: Probably one should optimize for size only when var is not escaping. */ if (TARGET_64BIT && optimize_function_for_speed_p (cfun) && TARGET_SSE) { diff --git a/gcc/mode-switching.c b/gcc/mode-switching.c index 2bcb154d22b..70a77d081a4 100644 --- a/gcc/mode-switching.c +++ b/gcc/mode-switching.c @@ -667,10 +667,12 @@ optimize_mode_switching (void) REG_SET_TO_HARD_REG_SET (live_at_edge, df_get_live_out (src_bb)); + rtl_profile_for_edge (eg); start_sequence (); EMIT_MODE_SET (entity_map[j], mode, live_at_edge); mode_set = get_insns (); end_sequence (); + default_rtl_profile (); /* Do not bother to insert empty sequence. */ if (mode_set == NULL_RTX) @@ -713,6 +715,7 @@ optimize_mode_switching (void) { rtx mode_set; + rtl_profile_for_bb (bb); start_sequence (); EMIT_MODE_SET (entity_map[j], ptr->mode, ptr->regs_live); mode_set = get_insns (); @@ -727,6 +730,8 @@ optimize_mode_switching (void) else emit_insn_before (mode_set, ptr->insn_ptr); } + + default_rtl_profile (); } free (ptr); |