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-rw-r--r--gcc/config/aarch64/aarch64-simd.md2
-rw-r--r--gcc/config/aarch64/aarch64.c2
-rw-r--r--gcc/config/arm/arm.c20
-rw-r--r--gcc/config/arm/neon.md12
-rw-r--r--gcc/config/i386/i386.c151
-rw-r--r--gcc/config/i386/i386.h2
-rw-r--r--gcc/config/i386/i386.md35
-rw-r--r--gcc/config/i386/predicates.md35
-rw-r--r--gcc/config/i386/sse.md6
-rw-r--r--gcc/config/rs6000/rs6000.c5
-rw-r--r--gcc/config/spu/spu.c10
-rw-r--r--gcc/expmed.c12
-rw-r--r--gcc/expr.c2
-rw-r--r--gcc/fold-const.c2
-rw-r--r--gcc/genmodes.c126
-rw-r--r--gcc/lto-streamer-out.c4
-rw-r--r--gcc/machmode.h36
-rw-r--r--gcc/optabs.c2
-rw-r--r--gcc/rtlanal.c5
-rw-r--r--gcc/simplify-rtx.c34
-rw-r--r--gcc/stor-layout.c14
-rw-r--r--gcc/tree-cfg.c6
-rw-r--r--gcc/tree-vect-patterns.c13
23 files changed, 272 insertions, 264 deletions
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 6f8b7038739..555f5afb469 100644
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -4814,7 +4814,7 @@
"TARGET_SIMD"
{
operands[3] = GEN_INT (INTVAL (operands[3])
- * GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)));
+ * GET_MODE_UNIT_SIZE (<MODE>mode));
return "ext\\t%0.<Vbtype>, %1.<Vbtype>, %2.<Vbtype>, #%3";
}
[(set_attr "type" "neon_ext<q>")]
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 5d134799d20..4c53f2a3bb4 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -9645,7 +9645,7 @@ aarch64_simd_valid_immediate (rtx op, machine_mode mode, bool inverse,
}
unsigned int i, elsize = 0, idx = 0, n_elts = CONST_VECTOR_NUNITS (op);
- unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ unsigned int innersize = GET_MODE_UNIT_SIZE (mode);
unsigned char bytes[16];
int immtype = -1, matches;
unsigned int invmask = inverse ? 0xff : 0;
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index f4d09f5624b..6ed68ba6705 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -12323,18 +12323,16 @@ neon_valid_immediate (rtx op, machine_mode mode, int inverse,
bool vector = GET_CODE (op) == CONST_VECTOR;
if (vector)
- {
- n_elts = CONST_VECTOR_NUNITS (op);
- innersize = GET_MODE_SIZE (GET_MODE_INNER (mode));
- }
+ n_elts = CONST_VECTOR_NUNITS (op);
else
{
n_elts = 1;
if (mode == VOIDmode)
mode = DImode;
- innersize = GET_MODE_SIZE (mode);
}
+ innersize = GET_MODE_UNIT_SIZE (mode);
+
/* Vectors of float constants. */
if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
{
@@ -12560,7 +12558,7 @@ neon_immediate_valid_for_shift (rtx op, machine_mode mode,
rtx *modconst, int *elementwidth,
bool isleftshift)
{
- unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ unsigned int innersize = GET_MODE_UNIT_SIZE (mode);
unsigned int n_elts = CONST_VECTOR_NUNITS (op), i;
unsigned HOST_WIDE_INT last_elt = 0;
unsigned HOST_WIDE_INT maxshift;
@@ -12667,8 +12665,7 @@ void
neon_pairwise_reduce (rtx op0, rtx op1, machine_mode mode,
rtx (*reduc) (rtx, rtx, rtx))
{
- machine_mode inner = GET_MODE_INNER (mode);
- unsigned int i, parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (inner);
+ unsigned int i, parts = GET_MODE_SIZE (mode) / GET_MODE_UNIT_SIZE (mode);
rtx tmpsum = op1;
for (i = parts / 2; i >= 1; i /= 2)
@@ -12918,10 +12915,7 @@ neon_const_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high)
HOST_WIDE_INT
neon_element_bits (machine_mode mode)
{
- if (mode == DImode)
- return GET_MODE_BITSIZE (mode);
- else
- return GET_MODE_BITSIZE (GET_MODE_INNER (mode));
+ return GET_MODE_UNIT_BITSIZE (mode);
}
@@ -22436,7 +22430,7 @@ arm_assemble_integer (rtx x, unsigned int size, int aligned_p)
gcc_assert (GET_CODE (x) == CONST_VECTOR);
units = CONST_VECTOR_NUNITS (x);
- size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ size = GET_MODE_UNIT_SIZE (mode);
if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
for (i = 0; i < units; i++)
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index c1ccad17bf0..e5a2b0f1c9a 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -2672,12 +2672,12 @@
to this model. */
unsigned int elt = INTVAL (operands[2]);
unsigned int reg_nelts
- = 64 / GET_MODE_BITSIZE (GET_MODE_INNER (<MODE>mode));
+ = 64 / GET_MODE_UNIT_BITSIZE (<MODE>mode);
elt ^= reg_nelts - 1;
operands[2] = GEN_INT (elt);
}
- if (GET_MODE_BITSIZE (GET_MODE_INNER (<MODE>mode)) == 32)
+ if (GET_MODE_UNIT_BITSIZE (<MODE>mode) == 32)
emit_insn (gen_vec_extract<mode> (operands[0], operands[1], operands[2]));
else
emit_insn (gen_neon_vget_lane<mode>_sext_internal (operands[0],
@@ -2701,12 +2701,12 @@
to this model. */
unsigned int elt = INTVAL (operands[2]);
unsigned int reg_nelts
- = 64 / GET_MODE_BITSIZE (GET_MODE_INNER (<MODE>mode));
+ = 64 / GET_MODE_UNIT_BITSIZE (<MODE>mode);
elt ^= reg_nelts - 1;
operands[2] = GEN_INT (elt);
}
- if (GET_MODE_BITSIZE (GET_MODE_INNER (<MODE>mode)) == 32)
+ if (GET_MODE_UNIT_BITSIZE (<MODE>mode) == 32)
emit_insn (gen_vec_extract<mode> (operands[0], operands[1], operands[2]));
else
emit_insn (gen_neon_vget_lane<mode>_zext_internal (operands[0],
@@ -2766,7 +2766,7 @@ if (BYTES_BIG_ENDIAN)
if (BYTES_BIG_ENDIAN)
{
unsigned int reg_nelts
- = 64 / GET_MODE_BITSIZE (GET_MODE_INNER (<MODE>mode));
+ = 64 / GET_MODE_UNIT_BITSIZE (<MODE>mode);
elt ^= reg_nelts - 1;
}
@@ -2869,7 +2869,7 @@ if (BYTES_BIG_ENDIAN)
{
unsigned int elt = INTVAL (operands[2]);
unsigned int reg_nelts
- = 64 / GET_MODE_BITSIZE (GET_MODE_INNER (<V_double_vector_mode>mode));
+ = 64 / GET_MODE_UNIT_BITSIZE (<V_double_vector_mode>mode);
elt ^= reg_nelts - 1;
operands[2] = GEN_INT (elt);
}
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 682c5073857..a48e8c5331d 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -6986,7 +6986,7 @@ classify_argument (machine_mode mode, const_tree type,
/* for V1xx modes, just use the base mode */
if (VECTOR_MODE_P (mode) && mode != V1DImode && mode != V1TImode
- && GET_MODE_SIZE (GET_MODE_INNER (mode)) == bytes)
+ && GET_MODE_UNIT_SIZE (mode) == bytes)
mode = GET_MODE_INNER (mode);
/* Classification of atomic types. */
@@ -13167,7 +13167,7 @@ ix86_legitimate_constant_p (machine_mode, rtx x)
#endif
break;
- case CONST_DOUBLE:
+ case CONST_WIDE_INT:
if (GET_MODE (x) == TImode
&& x != CONST0_RTX (TImode)
&& !TARGET_64BIT)
@@ -13197,6 +13197,7 @@ ix86_cannot_force_const_mem (machine_mode mode, rtx x)
switch (GET_CODE (x))
{
case CONST_INT:
+ case CONST_WIDE_INT:
case CONST_DOUBLE:
case CONST_VECTOR:
return false;
@@ -13223,7 +13224,7 @@ is_imported_p (rtx x)
/* Nonzero if the constant value X is a legitimate general operand
when generating PIC code. It is given that flag_pic is on and
- that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
+ that X satisfies CONSTANT_P. */
bool
legitimate_pic_operand_p (rtx x)
@@ -14749,20 +14750,9 @@ output_pic_addr_const (FILE *file, rtx x, int code)
break;
case CONST_DOUBLE:
- if (GET_MODE (x) == VOIDmode)
- {
- /* We can use %d if the number is <32 bits and positive. */
- if (CONST_DOUBLE_HIGH (x) || CONST_DOUBLE_LOW (x) < 0)
- fprintf (file, "0x%lx%08lx",
- (unsigned long) CONST_DOUBLE_HIGH (x),
- (unsigned long) CONST_DOUBLE_LOW (x));
- else
- fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
- }
- else
- /* We can't handle floating point constants;
- TARGET_PRINT_OPERAND must handle them. */
- output_operand_lossage ("floating constant misused");
+ /* We can't handle floating point constants;
+ TARGET_PRINT_OPERAND must handle them. */
+ output_operand_lossage ("floating constant misused");
break;
case PLUS:
@@ -15122,8 +15112,7 @@ ix86_find_base_term (rtx x)
return x;
term = XEXP (x, 0);
if (GET_CODE (term) == PLUS
- && (CONST_INT_P (XEXP (term, 1))
- || GET_CODE (XEXP (term, 1)) == CONST_DOUBLE))
+ && CONST_INT_P (XEXP (term, 1)))
term = XEXP (term, 0);
if (GET_CODE (term) != UNSPEC
|| (XINT (term, 1) != UNSPEC_GOTPCREL
@@ -16136,7 +16125,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
if (code != 'P' && code != 'p')
{
- if (CONST_INT_P (x) || GET_CODE (x) == CONST_DOUBLE)
+ if (CONST_INT_P (x))
{
if (ASSEMBLER_DIALECT == ASM_ATT)
putc ('$', file);
@@ -19625,12 +19614,9 @@ rtx
ix86_build_signbit_mask (machine_mode mode, bool vect, bool invert)
{
machine_mode vec_mode, imode;
- HOST_WIDE_INT hi, lo;
- int shift = 63;
- rtx v;
- rtx mask;
+ wide_int w;
+ rtx mask, v;
- /* Find the sign bit, sign extended to 2*HWI. */
switch (mode)
{
case V16SImode:
@@ -19640,9 +19626,7 @@ ix86_build_signbit_mask (machine_mode mode, bool vect, bool invert)
case V8SFmode:
case V4SFmode:
vec_mode = mode;
- mode = GET_MODE_INNER (mode);
imode = SImode;
- lo = 0x80000000, hi = lo < 0;
break;
case V8DImode:
@@ -19652,60 +19636,31 @@ ix86_build_signbit_mask (machine_mode mode, bool vect, bool invert)
case V4DFmode:
case V2DFmode:
vec_mode = mode;
- mode = GET_MODE_INNER (mode);
imode = DImode;
- if (HOST_BITS_PER_WIDE_INT >= 64)
- lo = (HOST_WIDE_INT)1 << shift, hi = -1;
- else
- lo = 0, hi = (HOST_WIDE_INT)1 << (shift - HOST_BITS_PER_WIDE_INT);
break;
case TImode:
case TFmode:
vec_mode = VOIDmode;
- if (HOST_BITS_PER_WIDE_INT >= 64)
- {
- imode = TImode;
- lo = 0, hi = (HOST_WIDE_INT)1 << shift;
- }
- else
- {
- rtvec vec;
-
- imode = DImode;
- lo = 0, hi = (HOST_WIDE_INT)1 << (shift - HOST_BITS_PER_WIDE_INT);
-
- if (invert)
- {
- lo = ~lo, hi = ~hi;
- v = constm1_rtx;
- }
- else
- v = const0_rtx;
-
- mask = immed_double_const (lo, hi, imode);
-
- vec = gen_rtvec (2, v, mask);
- v = gen_rtx_CONST_VECTOR (V2DImode, vec);
- v = copy_to_mode_reg (mode, gen_lowpart (mode, v));
-
- return v;
- }
- break;
+ imode = TImode;
+ break;
default:
gcc_unreachable ();
}
+ machine_mode inner_mode = GET_MODE_INNER (mode);
+ w = wi::set_bit_in_zero (GET_MODE_BITSIZE (inner_mode) - 1,
+ GET_MODE_BITSIZE (inner_mode));
if (invert)
- lo = ~lo, hi = ~hi;
+ w = wi::bit_not (w);
/* Force this value into the low part of a fp vector constant. */
- mask = immed_double_const (lo, hi, imode);
- mask = gen_lowpart (mode, mask);
+ mask = immed_wide_int_const (w, imode);
+ mask = gen_lowpart (inner_mode, mask);
if (vec_mode == VOIDmode)
- return force_reg (mode, mask);
+ return force_reg (inner_mode, mask);
v = ix86_build_const_vector (vec_mode, vect, mask);
return force_reg (vec_mode, v);
@@ -21852,13 +21807,13 @@ ix86_expand_int_vcond (rtx operands[])
&& data_mode == mode
&& cop1 == CONST0_RTX (mode)
&& operands[1 + (code == LT)] == CONST0_RTX (data_mode)
- && GET_MODE_SIZE (GET_MODE_INNER (data_mode)) > 1
- && GET_MODE_SIZE (GET_MODE_INNER (data_mode)) <= 8
+ && GET_MODE_UNIT_SIZE (data_mode) > 1
+ && GET_MODE_UNIT_SIZE (data_mode) <= 8
&& (GET_MODE_SIZE (data_mode) == 16
|| (TARGET_AVX2 && GET_MODE_SIZE (data_mode) == 32)))
{
rtx negop = operands[2 - (code == LT)];
- int shift = GET_MODE_BITSIZE (GET_MODE_INNER (data_mode)) - 1;
+ int shift = GET_MODE_UNIT_BITSIZE (data_mode) - 1;
if (negop == CONST1_RTX (data_mode))
{
rtx res = expand_simple_binop (mode, LSHIFTRT, cop0, GEN_INT (shift),
@@ -22916,26 +22871,21 @@ ix86_split_to_parts (rtx operand, rtx *parts, machine_mode mode)
REAL_VALUE_FROM_CONST_DOUBLE (r, operand);
real_to_target (l, &r, mode);
- /* Do not use shift by 32 to avoid warning on 32bit systems. */
- if (HOST_BITS_PER_WIDE_INT >= 64)
- parts[0]
- = gen_int_mode
- ((l[0] & (((HOST_WIDE_INT) 2 << 31) - 1))
- + ((((HOST_WIDE_INT) l[1]) << 31) << 1),
- DImode);
- else
- parts[0] = immed_double_const (l[0], l[1], DImode);
+ /* real_to_target puts 32-bit pieces in each long. */
+ parts[0] =
+ gen_int_mode
+ ((l[0] & (HOST_WIDE_INT) 0xffffffff)
+ | ((l[1] & (HOST_WIDE_INT) 0xffffffff) << 32),
+ DImode);
if (upper_mode == SImode)
parts[1] = gen_int_mode (l[2], SImode);
- else if (HOST_BITS_PER_WIDE_INT >= 64)
- parts[1]
- = gen_int_mode
- ((l[2] & (((HOST_WIDE_INT) 2 << 31) - 1))
- + ((((HOST_WIDE_INT) l[3]) << 31) << 1),
- DImode);
else
- parts[1] = immed_double_const (l[2], l[3], DImode);
+ parts[1] =
+ gen_int_mode
+ ((l[2] & (HOST_WIDE_INT) 0xffffffff)
+ | ((l[3] & (HOST_WIDE_INT) 0xffffffff) << 32),
+ DImode);
}
else
gcc_unreachable ();
@@ -36222,7 +36172,7 @@ ix86_expand_multi_arg_builtin (enum insn_code icode, tree exp, rtx target,
xop_rotl:
if (CONST_INT_P (op))
{
- int mask = GET_MODE_BITSIZE (GET_MODE_INNER (tmode)) - 1;
+ int mask = GET_MODE_UNIT_BITSIZE (tmode) - 1;
op = GEN_INT (INTVAL (op) & mask);
gcc_checking_assert
(insn_data[icode].operand[i + 1].predicate (op, mode));
@@ -42274,12 +42224,11 @@ ix86_rtx_costs (rtx x, int code_i, int outer_code_i, int opno, int *total,
*total = 0;
return true;
+ case CONST_WIDE_INT:
+ *total = 0;
+ return true;
+
case CONST_DOUBLE:
- if (mode == VOIDmode)
- {
- *total = 0;
- return true;
- }
switch (standard_80387_constant_p (x))
{
case 1: /* 0.0 */
@@ -45622,12 +45571,12 @@ ix86_expand_reduc (rtx (*fn) (rtx, rtx, rtx), rtx dest, rtx in)
}
for (i = GET_MODE_BITSIZE (mode);
- i > GET_MODE_BITSIZE (GET_MODE_INNER (mode));
+ i > GET_MODE_UNIT_BITSIZE (mode);
i >>= 1)
{
half = gen_reg_rtx (mode);
emit_reduc_half (half, vec, i);
- if (i == GET_MODE_BITSIZE (GET_MODE_INNER (mode)) * 2)
+ if (i == GET_MODE_UNIT_BITSIZE (mode) * 2)
dst = dest;
else
dst = gen_reg_rtx (mode);
@@ -47068,7 +47017,7 @@ expand_vec_perm_blend (struct expand_vec_perm_d *d)
return false;
if (TARGET_AVX512F && GET_MODE_SIZE (vmode) == 64
&& (TARGET_AVX512BW
- || GET_MODE_SIZE (GET_MODE_INNER (vmode)) >= 4))
+ || GET_MODE_UNIT_SIZE (vmode) >= 4))
;
else if (TARGET_AVX2 && GET_MODE_SIZE (vmode) == 32)
;
@@ -47515,7 +47464,7 @@ expand_vec_perm_pshufb (struct expand_vec_perm_d *d)
rperm[i] = GEN_INT ((d->perm[i * nelt / 16] * 16 / nelt) & 15);
else
{
- eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
+ eltsz = GET_MODE_UNIT_SIZE (d->vmode);
if (!d->one_operand_p)
mask = 2 * nelt - 1;
else if (vmode == V16QImode)
@@ -47887,7 +47836,7 @@ expand_vec_perm_palignr (struct expand_vec_perm_d *d, bool single_insn_only_p)
return expand_vec_perm_1 (&dcopy);
}
- shift = GEN_INT (min * GET_MODE_BITSIZE (GET_MODE_INNER (d->vmode)));
+ shift = GEN_INT (min * GET_MODE_UNIT_BITSIZE (d->vmode));
if (GET_MODE_SIZE (d->vmode) == 16)
{
target = gen_reg_rtx (TImode);
@@ -48692,7 +48641,7 @@ expand_vec_perm_pshufb2 (struct expand_vec_perm_d *d)
return true;
nelt = d->nelt;
- eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
+ eltsz = GET_MODE_UNIT_SIZE (d->vmode);
/* Generate two permutation masks. If the required element is within
the given vector it is shuffled into the proper lane. If the required
@@ -48756,7 +48705,7 @@ expand_vec_perm_vpshufb2_vpermq (struct expand_vec_perm_d *d)
return true;
nelt = d->nelt;
- eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
+ eltsz = GET_MODE_UNIT_SIZE (d->vmode);
/* Generate two permutation masks. If the required element is within
the same lane, it is shuffled in. If the required element from the
@@ -48832,7 +48781,7 @@ expand_vec_perm_vpshufb2_vpermq_even_odd (struct expand_vec_perm_d *d)
return true;
nelt = d->nelt;
- eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
+ eltsz = GET_MODE_UNIT_SIZE (d->vmode);
/* Generate two permutation masks. In the first permutation mask
the first quarter will contain indexes for the first half
@@ -49483,7 +49432,7 @@ expand_vec_perm_vpshufb4_vpermq2 (struct expand_vec_perm_d *d)
return true;
nelt = d->nelt;
- eltsz = GET_MODE_SIZE (GET_MODE_INNER (d->vmode));
+ eltsz = GET_MODE_UNIT_SIZE (d->vmode);
/* Generate 4 permutation masks. If the required element is within
the same lane, it is shuffled in. If the required element from the
@@ -50400,8 +50349,7 @@ ix86_expand_sse2_abs (rtx target, rtx input)
value of X is (((signed) X >> (W-1)) ^ X) - ((signed) X >> (W-1)). */
case V4SImode:
tmp0 = expand_simple_binop (mode, ASHIFTRT, input,
- GEN_INT (GET_MODE_BITSIZE
- (GET_MODE_INNER (mode)) - 1),
+ GEN_INT (GET_MODE_UNIT_BITSIZE (mode) - 1),
NULL, 0, OPTAB_DIRECT);
tmp1 = expand_simple_binop (mode, XOR, tmp0, input,
NULL, 0, OPTAB_DIRECT);
@@ -50989,6 +50937,7 @@ find_constant (rtx in_rtx, imm_info *imm_values)
break;
case CONST_DOUBLE:
+ case CONST_WIDE_INT:
(imm_values->imm)++;
(imm_values->imm64)++;
break;
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 9637ce3e9ae..9f48b187143 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -2571,6 +2571,8 @@ extern void debug_dispatch_window (int);
/* For switching between functions with different target attributes. */
#define SWITCHABLE_TARGET 1
+#define TARGET_SUPPORTS_WIDE_INT 1
+
/*
Local variables:
version-control: t
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index e0ab116af74..345333b72a1 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -10748,17 +10748,10 @@
"TARGET_64BIT && !TARGET_USE_BT"
[(const_int 0)]
{
- HOST_WIDE_INT i = INTVAL (operands[1]), hi, lo;
- rtx op1;
+ int i = INTVAL (operands[1]);
- if (HOST_BITS_PER_WIDE_INT >= 64)
- lo = (HOST_WIDE_INT)1 << i, hi = 0;
- else if (i < HOST_BITS_PER_WIDE_INT)
- lo = (HOST_WIDE_INT)1 << i, hi = 0;
- else
- lo = 0, hi = (HOST_WIDE_INT)1 << (i - HOST_BITS_PER_WIDE_INT);
+ rtx op1 = gen_int_mode (HOST_WIDE_INT_1U << i, DImode);
- op1 = immed_double_const (lo, hi, DImode);
if (i >= 31)
{
emit_move_insn (operands[2], op1);
@@ -10780,17 +10773,10 @@
"TARGET_64BIT && !TARGET_USE_BT"
[(const_int 0)]
{
- HOST_WIDE_INT i = INTVAL (operands[1]), hi, lo;
- rtx op1;
-
- if (HOST_BITS_PER_WIDE_INT >= 64)
- lo = (HOST_WIDE_INT)1 << i, hi = 0;
- else if (i < HOST_BITS_PER_WIDE_INT)
- lo = (HOST_WIDE_INT)1 << i, hi = 0;
- else
- lo = 0, hi = (HOST_WIDE_INT)1 << (i - HOST_BITS_PER_WIDE_INT);
+ int i = INTVAL (operands[1]);
- op1 = immed_double_const (~lo, ~hi, DImode);
+ rtx op1 = gen_int_mode (HOST_WIDE_INT_1U << i, DImode);
+
if (i >= 32)
{
emit_move_insn (operands[2], op1);
@@ -10813,17 +10799,10 @@
"TARGET_64BIT && !TARGET_USE_BT"
[(const_int 0)]
{
- HOST_WIDE_INT i = INTVAL (operands[1]), hi, lo;
- rtx op1;
+ int i = INTVAL (operands[1]);
- if (HOST_BITS_PER_WIDE_INT >= 64)
- lo = (HOST_WIDE_INT)1 << i, hi = 0;
- else if (i < HOST_BITS_PER_WIDE_INT)
- lo = (HOST_WIDE_INT)1 << i, hi = 0;
- else
- lo = 0, hi = (HOST_WIDE_INT)1 << (i - HOST_BITS_PER_WIDE_INT);
+ rtx op1 = gen_int_mode (HOST_WIDE_INT_1U << i, DImode);
- op1 = immed_double_const (lo, hi, DImode);
if (i >= 31)
{
emit_move_insn (operands[2], op1);
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index f0c999cb182..478b8f0a83a 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -144,18 +144,10 @@
switch (GET_CODE (op))
{
case CONST_INT:
- /* CONST_DOUBLES never match, since HOST_BITS_PER_WIDE_INT is known
- to be at least 32 and this all acceptable constants are
- represented as CONST_INT. */
- if (HOST_BITS_PER_WIDE_INT == 32)
- return true;
- else
- {
- HOST_WIDE_INT val = trunc_int_for_mode (INTVAL (op), DImode);
- return trunc_int_for_mode (val, SImode) == val;
- }
- break;
-
+ {
+ HOST_WIDE_INT val = trunc_int_for_mode (INTVAL (op), DImode);
+ return trunc_int_for_mode (val, SImode) == val;
+ }
case SYMBOL_REF:
/* For certain code models, the symbolic references are known to fit.
in CM_SMALL_PIC model we know it fits if it is local to the shared
@@ -262,21 +254,12 @@
;; Return true if VALUE can be stored in the zero extended immediate field.
(define_predicate "x86_64_zext_immediate_operand"
- (match_code "const_double,const_int,symbol_ref,label_ref,const")
+ (match_code "const_int,symbol_ref,label_ref,const")
{
switch (GET_CODE (op))
{
- case CONST_DOUBLE:
- if (HOST_BITS_PER_WIDE_INT == 32)
- return (GET_MODE (op) == VOIDmode && !CONST_DOUBLE_HIGH (op));
- else
- return false;
-
case CONST_INT:
- if (HOST_BITS_PER_WIDE_INT == 32)
- return INTVAL (op) >= 0;
- else
- return !(INTVAL (op) & ~(HOST_WIDE_INT) 0xffffffff);
+ return !(INTVAL (op) & ~(HOST_WIDE_INT) 0xffffffff);
case SYMBOL_REF:
/* For certain code models, the symbolic references are known to fit. */
@@ -629,7 +612,7 @@
;; Match exactly zero.
(define_predicate "const0_operand"
- (match_code "const_int,const_double,const_vector")
+ (match_code "const_int,const_wide_int,const_double,const_vector")
{
if (mode == VOIDmode)
mode = GET_MODE (op);
@@ -638,7 +621,7 @@
;; Match -1.
(define_predicate "constm1_operand"
- (match_code "const_int,const_double,const_vector")
+ (match_code "const_int,const_wide_int,const_double,const_vector")
{
if (mode == VOIDmode)
mode = GET_MODE (op);
@@ -647,7 +630,7 @@
;; Match one or vector filled with ones.
(define_predicate "const1_operand"
- (match_code "const_int,const_double,const_vector")
+ (match_code "const_int,const_wide_int,const_double,const_vector")
{
if (mode == VOIDmode)
mode = GET_MODE (op);
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index dc7f6a7bab0..8bd3352a553 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -11782,7 +11782,7 @@
{
int mask,selector;
mask = INTVAL (operands[3]);
- selector = GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 4 ?
+ selector = GET_MODE_UNIT_SIZE (<MODE>mode) == 4 ?
0xFFFF ^ (0xF000 >> mask * 4)
: 0xFF ^ (0xC0 >> mask * 2);
emit_insn (gen_<extract_type>_vinsert<shuffletype><extract_suf>_1_mask
@@ -17556,8 +17556,8 @@
[(match_operand 3 "const_int_operand" "n, n")])))]
"TARGET_SSSE3"
{
- machine_mode imode = GET_MODE_INNER (GET_MODE (operands[0]));
- operands[2] = GEN_INT (INTVAL (operands[3]) * GET_MODE_SIZE (imode));
+ operands[2] =
+ GEN_INT (INTVAL (operands[3]) * GET_MODE_UNIT_SIZE (GET_MODE (operands[0])));
switch (which_alternative)
{
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index bb7f45d25e7..d06e9a8d48e 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -31740,8 +31740,7 @@ rs6000_do_expand_vec_perm (rtx target, rtx op0, rtx op1,
imode = vmode;
if (GET_MODE_CLASS (vmode) != MODE_VECTOR_INT)
{
- imode = GET_MODE_INNER (vmode);
- imode = mode_for_size (GET_MODE_BITSIZE (imode), MODE_INT, 0);
+ imode = mode_for_size (GET_MODE_UNIT_BITSIZE (vmode), MODE_INT, 0);
imode = mode_for_vector (imode, nelt);
}
@@ -31810,7 +31809,7 @@ rs6000_complex_function_value (machine_mode mode)
unsigned int regno;
rtx r1, r2;
machine_mode inner = GET_MODE_INNER (mode);
- unsigned int inner_bytes = GET_MODE_SIZE (inner);
+ unsigned int inner_bytes = GET_MODE_UNIT_SIZE (mode);
if (FLOAT_MODE_P (mode) && TARGET_HARD_FLOAT && TARGET_FPRS)
regno = FP_ARG_RETURN;
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index e99cea37d05..3ad9035a884 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -3415,11 +3415,8 @@ arith_immediate_p (rtx op, machine_mode mode,
constant_to_array (mode, op, arr);
- if (VECTOR_MODE_P (mode))
- mode = GET_MODE_INNER (mode);
-
- bytes = GET_MODE_SIZE (mode);
- mode = mode_for_size (GET_MODE_BITSIZE (mode), MODE_INT, 0);
+ bytes = GET_MODE_UNIT_SIZE (mode);
+ mode = mode_for_size (GET_MODE_UNIT_BITSIZE (mode), MODE_INT, 0);
/* Check that bytes are repeated. */
for (i = bytes; i < 16; i += bytes)
@@ -3459,8 +3456,7 @@ exp2_immediate_p (rtx op, machine_mode mode, int low, int high)
constant_to_array (mode, op, arr);
- if (VECTOR_MODE_P (mode))
- mode = GET_MODE_INNER (mode);
+ mode = GET_MODE_INNER (mode);
bytes = GET_MODE_SIZE (mode);
int_mode = mode_for_size (GET_MODE_BITSIZE (mode), MODE_INT, 0);
diff --git a/gcc/expmed.c b/gcc/expmed.c
index 6679f501c2c..eda2cd3b366 100644
--- a/gcc/expmed.c
+++ b/gcc/expmed.c
@@ -691,8 +691,8 @@ store_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
&& !MEM_P (op0)
&& optab_handler (vec_set_optab, GET_MODE (op0)) != CODE_FOR_nothing
&& fieldmode == GET_MODE_INNER (GET_MODE (op0))
- && bitsize == GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))
- && !(bitnum % GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))))
+ && bitsize == GET_MODE_UNIT_BITSIZE (GET_MODE (op0))
+ && !(bitnum % GET_MODE_UNIT_BITSIZE (GET_MODE (op0))))
{
struct expand_operand ops[3];
machine_mode outermode = GET_MODE (op0);
@@ -1502,8 +1502,8 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
if (VECTOR_MODE_P (GET_MODE (op0))
&& !MEM_P (op0)
&& optab_handler (vec_extract_optab, GET_MODE (op0)) != CODE_FOR_nothing
- && ((bitnum + bitsize - 1) / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))
- == bitnum / GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (op0)))))
+ && ((bitnum + bitsize - 1) / GET_MODE_UNIT_BITSIZE (GET_MODE (op0))
+ == bitnum / GET_MODE_UNIT_BITSIZE (GET_MODE (op0))))
{
struct expand_operand ops[3];
machine_mode outermode = GET_MODE (op0);
@@ -2433,8 +2433,6 @@ synth_mult (struct algorithm *alg_out, unsigned HOST_WIDE_INT t,
/* Be prepared for vector modes. */
imode = GET_MODE_INNER (mode);
- if (imode == VOIDmode)
- imode = mode;
maxm = MIN (BITS_PER_WORD, GET_MODE_BITSIZE (imode));
@@ -3094,8 +3092,6 @@ expand_mult_const (machine_mode mode, rtx op0, HOST_WIDE_INT val,
/* Compare only the bits of val and val_so_far that are significant
in the result mode, to avoid sign-/zero-extension confusion. */
nmode = GET_MODE_INNER (mode);
- if (nmode == VOIDmode)
- nmode = mode;
val &= GET_MODE_MASK (nmode);
val_so_far &= GET_MODE_MASK (nmode);
gcc_assert (val == val_so_far);
diff --git a/gcc/expr.c b/gcc/expr.c
index c5f8629a07b..b8a889ce26f 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -9259,7 +9259,7 @@ expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
little-endian, or element N-1 if big-endian. So pull the scalar
result out of that element. */
int index = BYTES_BIG_ENDIAN ? GET_MODE_NUNITS (vec_mode) - 1 : 0;
- int bitsize = GET_MODE_BITSIZE (GET_MODE_INNER (vec_mode));
+ int bitsize = GET_MODE_UNIT_BITSIZE (vec_mode);
temp = extract_bit_field (temp, bitsize, bitsize * index, unsignedp,
target, mode, mode);
gcc_assert (temp);
diff --git a/gcc/fold-const.c b/gcc/fold-const.c
index 7d5b1ab70a8..7955a4263ef 100644
--- a/gcc/fold-const.c
+++ b/gcc/fold-const.c
@@ -10273,7 +10273,7 @@ fold_binary_loc (location_t loc,
/* Only create rotates in complete modes. Other cases are not
expanded properly. */
&& (element_precision (rtype)
- == element_precision (TYPE_MODE (rtype))))
+ == GET_MODE_UNIT_PRECISION (TYPE_MODE (rtype))))
{
tree tree01, tree11;
enum tree_code code01, code11;
diff --git a/gcc/genmodes.c b/gcc/genmodes.c
index 45681f5db3f..ddd75bfae4d 100644
--- a/gcc/genmodes.c
+++ b/gcc/genmodes.c
@@ -1040,7 +1040,7 @@ mode_inner_inline (machine_mode mode)\n\
for_all_modes (c, m)
printf (" case %smode: return %smode;\n", m->name,
c != MODE_PARTIAL_INT && m->component
- ? m->component->name : void_mode->name);
+ ? m->component->name : m->name);
puts ("\
default: return mode_inner[mode];\n\
@@ -1048,6 +1048,79 @@ mode_inner_inline (machine_mode mode)\n\
}\n");
}
+/* Emit mode_unit_size_inline routine into insn-modes.h header. */
+static void
+emit_mode_unit_size_inline (void)
+{
+ int c;
+ struct mode_data *m;
+
+ puts ("\
+#ifdef __cplusplus\n\
+inline __attribute__((__always_inline__))\n\
+#else\n\
+extern __inline__ __attribute__((__always_inline__, __gnu_inline__))\n\
+#endif\n\
+unsigned char\n\
+mode_unit_size_inline (machine_mode mode)\n\
+{\n\
+ extern unsigned char mode_unit_size[NUM_MACHINE_MODES];\n\
+ switch (mode)\n\
+ {");
+
+ for_all_modes (c, m)
+ {
+ const char *name = m->name;
+ struct mode_data *m2 = m;
+ if (c != MODE_PARTIAL_INT && m2->component)
+ m2 = m2->component;
+ if (!m2->need_bytesize_adj)
+ printf (" case %smode: return %u;\n", name, m2->bytesize);
+ }
+
+ puts ("\
+ default: return mode_unit_size[mode];\n\
+ }\n\
+}\n");
+}
+
+/* Emit mode_unit_precision_inline routine into insn-modes.h header. */
+static void
+emit_mode_unit_precision_inline (void)
+{
+ int c;
+ struct mode_data *m;
+
+ puts ("\
+#ifdef __cplusplus\n\
+inline __attribute__((__always_inline__))\n\
+#else\n\
+extern __inline__ __attribute__((__always_inline__, __gnu_inline__))\n\
+#endif\n\
+unsigned short\n\
+mode_unit_precision_inline (machine_mode mode)\n\
+{\n\
+ extern const unsigned short mode_unit_precision[NUM_MACHINE_MODES];\n\
+ switch (mode)\n\
+ {");
+
+ for_all_modes (c, m)
+ {
+ struct mode_data *m2
+ = (c != MODE_PARTIAL_INT && m->component) ? m->component : m;
+ if (m2->precision != (unsigned int)-1)
+ printf (" case %smode: return %u;\n", m->name, m2->precision);
+ else
+ printf (" case %smode: return %u*BITS_PER_UNIT;\n",
+ m->name, m2->bytesize);
+ }
+
+ puts ("\
+ default: return mode_unit_precision[mode];\n\
+ }\n\
+}\n");
+}
+
static void
emit_insn_modes_h (void)
{
@@ -1108,6 +1181,7 @@ enum machine_mode\n{");
/* I can't think of a better idea, can you? */
printf ("#define CONST_MODE_SIZE%s\n", adj_bytesize ? "" : " const");
+ printf ("#define CONST_MODE_UNIT_SIZE%s\n", adj_bytesize ? "" : " const");
printf ("#define CONST_MODE_BASE_ALIGN%s\n", adj_alignment ? "" : " const");
#if 0 /* disabled for backward compatibility, temporary */
printf ("#define CONST_REAL_FORMAT_FOR_MODE%s\n", adj_format ? "" :" const");
@@ -1126,6 +1200,8 @@ enum machine_mode\n{");
emit_mode_size_inline ();
emit_mode_nunits_inline ();
emit_mode_inner_inline ();
+ emit_mode_unit_size_inline ();
+ emit_mode_unit_precision_inline ();
puts ("#endif /* GCC_VERSION >= 4001 */");
puts ("\
@@ -1339,12 +1415,53 @@ emit_mode_inner (void)
for_all_modes (c, m)
tagged_printf ("%smode",
c != MODE_PARTIAL_INT && m->component
- ? m->component->name : void_mode->name,
+ ? m->component->name : m->name,
m->name);
print_closer ();
}
+/* Emit mode_unit_size array into insn-modes.c file. */
+static void
+emit_mode_unit_size (void)
+{
+ int c;
+ struct mode_data *m;
+
+ print_maybe_const_decl ("%sunsigned char", "mode_unit_size",
+ "NUM_MACHINE_MODES", bytesize);
+
+ for_all_modes (c, m)
+ tagged_printf ("%u",
+ c != MODE_PARTIAL_INT && m->component
+ ? m->component->bytesize : m->bytesize, m->name);
+
+ print_closer ();
+}
+
+/* Emit mode_unit_precision array into insn-modes.c file. */
+static void
+emit_mode_unit_precision (void)
+{
+ int c;
+ struct mode_data *m;
+
+ print_decl ("unsigned short", "mode_unit_precision", "NUM_MACHINE_MODES");
+
+ for_all_modes (c, m)
+ {
+ struct mode_data *m2 = (c != MODE_PARTIAL_INT && m->component) ?
+ m->component : m;
+ if (m2->precision != (unsigned int)-1)
+ tagged_printf ("%u", m2->precision, m->name);
+ else
+ tagged_printf ("%u*BITS_PER_UNIT", m2->bytesize, m->name);
+ }
+
+ print_closer ();
+}
+
+
static void
emit_mode_base_align (void)
{
@@ -1440,6 +1557,7 @@ emit_mode_adjustments (void)
printf ("\n /* %s:%d */\n s = %s;\n",
a->file, a->line, a->adjustment);
printf (" mode_size[%smode] = s;\n", a->mode->name);
+ printf (" mode_unit_size[%smode] = s;\n", a->mode->name);
printf (" mode_base_align[%smode] = s & (~s + 1);\n",
a->mode->name);
@@ -1450,6 +1568,7 @@ emit_mode_adjustments (void)
case MODE_COMPLEX_INT:
case MODE_COMPLEX_FLOAT:
printf (" mode_size[%smode] = 2*s;\n", m->name);
+ printf (" mode_unit_size[%smode] = s;\n", m->name);
printf (" mode_base_align[%smode] = s & (~s + 1);\n",
m->name);
break;
@@ -1462,6 +1581,7 @@ emit_mode_adjustments (void)
case MODE_VECTOR_UACCUM:
printf (" mode_size[%smode] = %d*s;\n",
m->name, m->ncomponents);
+ printf (" mode_unit_size[%smode] = s;\n", m->name);
printf (" mode_base_align[%smode] = (%d*s) & (~(%d*s)+1);\n",
m->name, m->ncomponents, m->ncomponents);
break;
@@ -1631,6 +1751,8 @@ emit_insn_modes_c (void)
emit_mode_wider ();
emit_mode_mask ();
emit_mode_inner ();
+ emit_mode_unit_size ();
+ emit_mode_unit_precision ();
emit_mode_base_align ();
emit_class_narrowest_mode ();
emit_real_format_for_mode ();
diff --git a/gcc/lto-streamer-out.c b/gcc/lto-streamer-out.c
index d36cfbcc3e5..472024ab755 100644
--- a/gcc/lto-streamer-out.c
+++ b/gcc/lto-streamer-out.c
@@ -2703,7 +2703,7 @@ lto_write_mode_table (void)
if (streamer_mode_table[i])
{
machine_mode m = (machine_mode) i;
- if (GET_MODE_INNER (m) != VOIDmode)
+ if (GET_MODE_INNER (m) != m)
streamer_mode_table[(int) GET_MODE_INNER (m)] = 1;
}
/* First stream modes that have GET_MODE_INNER (m) == VOIDmode,
@@ -2713,7 +2713,7 @@ lto_write_mode_table (void)
if (streamer_mode_table[i] && i != (int) VOIDmode && i != (int) BLKmode)
{
machine_mode m = (machine_mode) i;
- if ((GET_MODE_INNER (m) == VOIDmode) ^ (pass == 0))
+ if ((GET_MODE_INNER (m) == m) ^ (pass == 0))
continue;
bp_pack_value (&bp, m, 8);
bp_pack_enum (&bp, mode_class, MAX_MODE_CLASS, GET_MODE_CLASS (m));
diff --git a/gcc/machmode.h b/gcc/machmode.h
index 5ab7eeb2ca3..d51f115c3d5 100644
--- a/gcc/machmode.h
+++ b/gcc/machmode.h
@@ -209,7 +209,9 @@ extern const unsigned HOST_WIDE_INT mode_mask_array[NUM_MACHINE_MODES];
#define GET_MODE_MASK(MODE) mode_mask_array[MODE]
-/* Return the mode of the inner elements in a vector. */
+/* Return the mode of the basic parts of MODE. For vector modes this is the
+ mode of the vector elements. For complex modes it is the mode of the real
+ and imaginary parts. For other modes it is MODE itself. */
extern const unsigned char mode_inner[NUM_MACHINE_MODES];
#if GCC_VERSION >= 4001
@@ -220,21 +222,31 @@ extern const unsigned char mode_inner[NUM_MACHINE_MODES];
#define GET_MODE_INNER(MODE) ((machine_mode) mode_inner[MODE])
#endif
-/* Get the size in bytes or bites of the basic parts of an
+/* Get the size in bytes or bits of the basic parts of an
object of mode MODE. */
-#define GET_MODE_UNIT_SIZE(MODE) \
- (GET_MODE_INNER (MODE) == VOIDmode \
- ? GET_MODE_SIZE (MODE) \
- : GET_MODE_SIZE (GET_MODE_INNER (MODE)))
+extern CONST_MODE_UNIT_SIZE unsigned char mode_unit_size[NUM_MACHINE_MODES];
+#if GCC_VERSION >= 4001
+#define GET_MODE_UNIT_SIZE(MODE) \
+ ((unsigned char) (__builtin_constant_p (MODE) \
+ ? mode_unit_size_inline (MODE) : mode_unit_size[MODE]))
+#else
+#define GET_MODE_UNIT_SIZE(MODE) mode_unit_size[MODE]
+#endif
#define GET_MODE_UNIT_BITSIZE(MODE) \
((unsigned short) (GET_MODE_UNIT_SIZE (MODE) * BITS_PER_UNIT))
-#define GET_MODE_UNIT_PRECISION(MODE) \
- (GET_MODE_INNER (MODE) == VOIDmode \
- ? GET_MODE_PRECISION (MODE) \
- : GET_MODE_PRECISION (GET_MODE_INNER (MODE)))
+extern const unsigned short mode_unit_precision[NUM_MACHINE_MODES];
+#if GCC_VERSION >= 4001
+#define GET_MODE_UNIT_PRECISION(MODE) \
+ ((unsigned short) (__builtin_constant_p (MODE) \
+ ? mode_unit_precision_inline (MODE)\
+ : mode_unit_precision[MODE]))
+#else
+#define GET_MODE_UNIT_PRECISION(MODE) mode_unit_precision[MODE]
+#endif
+
/* Get the number of units in the object. */
@@ -320,10 +332,6 @@ extern unsigned get_mode_alignment (machine_mode);
#define GET_MODE_ALIGNMENT(MODE) get_mode_alignment (MODE)
-/* Get the precision of the mode or its inner mode if it has one. */
-
-extern unsigned int element_precision (machine_mode);
-
/* For each class, get the narrowest mode in that class. */
extern const unsigned char class_narrowest_mode[MAX_MODE_CLASS];
diff --git a/gcc/optabs.c b/gcc/optabs.c
index b81859b778d..7769ba22f08 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -6636,7 +6636,7 @@ static rtx
shift_amt_for_vec_perm_mask (rtx sel)
{
unsigned int i, first, nelt = GET_MODE_NUNITS (GET_MODE (sel));
- unsigned int bitsize = GET_MODE_BITSIZE (GET_MODE_INNER (GET_MODE (sel)));
+ unsigned int bitsize = GET_MODE_UNIT_BITSIZE (GET_MODE (sel));
if (GET_CODE (sel) != CONST_VECTOR)
return NULL_RTX;
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index c1f7cdc78af..01e4d42799b 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -3364,10 +3364,7 @@ subreg_get_info (unsigned int xregno, machine_mode xmode,
machine_mode xmode_unit;
nregs_xmode = HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode);
- if (GET_MODE_INNER (xmode) == VOIDmode)
- xmode_unit = xmode;
- else
- xmode_unit = GET_MODE_INNER (xmode);
+ xmode_unit = GET_MODE_INNER (xmode);
gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode_unit));
gcc_assert (nregs_xmode
== (GET_MODE_NUNITS (xmode)
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index f29cc1b1de2..a8e4b48aa25 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -1619,7 +1619,7 @@ simplify_const_unary_operation (enum rtx_code code, machine_mode mode,
if (CONST_SCALAR_INT_P (op) || CONST_DOUBLE_AS_FLOAT_P (op)
|| GET_CODE (op) == CONST_VECTOR)
{
- int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ int elt_size = GET_MODE_UNIT_SIZE (mode);
unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
rtvec v = rtvec_alloc (n_elts);
unsigned int i;
@@ -1630,7 +1630,7 @@ simplify_const_unary_operation (enum rtx_code code, machine_mode mode,
else
{
machine_mode inmode = GET_MODE (op);
- int in_elt_size = GET_MODE_SIZE (GET_MODE_INNER (inmode));
+ int in_elt_size = GET_MODE_UNIT_SIZE (inmode);
unsigned in_n_elts = (GET_MODE_SIZE (inmode) / in_elt_size);
gcc_assert (in_n_elts < n_elts);
@@ -1644,10 +1644,10 @@ simplify_const_unary_operation (enum rtx_code code, machine_mode mode,
if (VECTOR_MODE_P (mode) && GET_CODE (op) == CONST_VECTOR)
{
- int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ int elt_size = GET_MODE_UNIT_SIZE (mode);
unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
machine_mode opmode = GET_MODE (op);
- int op_elt_size = GET_MODE_SIZE (GET_MODE_INNER (opmode));
+ int op_elt_size = GET_MODE_UNIT_SIZE (opmode);
unsigned op_n_elts = (GET_MODE_SIZE (opmode) / op_elt_size);
rtvec v = rtvec_alloc (n_elts);
unsigned int i;
@@ -3373,7 +3373,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
rtx op1 = XEXP (trueop0, 1);
machine_mode opmode = GET_MODE (op0);
- int elt_size = GET_MODE_SIZE (GET_MODE_INNER (opmode));
+ int elt_size = GET_MODE_UNIT_SIZE (opmode);
int n_elts = GET_MODE_SIZE (opmode) / elt_size;
int i = INTVAL (XVECEXP (trueop1, 0, 0));
@@ -3403,7 +3403,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
/* Find out number of elements of each operand. */
if (VECTOR_MODE_P (mode00))
{
- elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode00));
+ elt_size = GET_MODE_UNIT_SIZE (mode00);
n_elts00 = GET_MODE_SIZE (mode00) / elt_size;
}
else
@@ -3411,7 +3411,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
if (VECTOR_MODE_P (mode01))
{
- elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode01));
+ elt_size = GET_MODE_UNIT_SIZE (mode01);
n_elts01 = GET_MODE_SIZE (mode01) / elt_size;
}
else
@@ -3452,7 +3452,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
if (GET_CODE (trueop0) == CONST_VECTOR)
{
- int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ int elt_size = GET_MODE_UNIT_SIZE (mode);
unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
rtvec v = rtvec_alloc (n_elts);
unsigned int i;
@@ -3533,7 +3533,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
rtx subop1 = XEXP (trueop0, 1);
machine_mode mode0 = GET_MODE (subop0);
machine_mode mode1 = GET_MODE (subop1);
- int li = GET_MODE_SIZE (GET_MODE_INNER (mode0));
+ int li = GET_MODE_UNIT_SIZE (mode0);
int l0 = GET_MODE_SIZE (mode0) / li;
int l1 = GET_MODE_SIZE (mode1) / li;
int i0 = INTVAL (XVECEXP (trueop1, 0, 0));
@@ -3693,7 +3693,7 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode,
|| CONST_SCALAR_INT_P (trueop1)
|| CONST_DOUBLE_AS_FLOAT_P (trueop1)))
{
- int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ int elt_size = GET_MODE_UNIT_SIZE (mode);
unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
rtvec v = rtvec_alloc (n_elts);
unsigned int i;
@@ -5330,7 +5330,7 @@ simplify_ternary_operation (enum rtx_code code, machine_mode mode,
trueop2 = avoid_constant_pool_reference (op2);
if (CONST_INT_P (trueop2))
{
- int elt_size = GET_MODE_SIZE (GET_MODE_INNER (mode));
+ int elt_size = GET_MODE_UNIT_SIZE (mode);
unsigned n_elts = (GET_MODE_SIZE (mode) / elt_size);
unsigned HOST_WIDE_INT sel = UINTVAL (trueop2);
unsigned HOST_WIDE_INT mask;
@@ -5468,7 +5468,7 @@ simplify_immed_subreg (machine_mode outermode, rtx op,
{
num_elem = CONST_VECTOR_NUNITS (op);
elems = &CONST_VECTOR_ELT (op, 0);
- elem_bitsize = GET_MODE_BITSIZE (GET_MODE_INNER (innermode));
+ elem_bitsize = GET_MODE_UNIT_BITSIZE (innermode);
}
else
{
@@ -5625,21 +5625,17 @@ simplify_immed_subreg (machine_mode outermode, rtx op,
value_start = byte * (BITS_PER_UNIT / value_bit);
/* Re-pack the value. */
+ num_elem = GET_MODE_NUNITS (outermode);
if (VECTOR_MODE_P (outermode))
{
- num_elem = GET_MODE_NUNITS (outermode);
result_v = rtvec_alloc (num_elem);
elems = &RTVEC_ELT (result_v, 0);
- outer_submode = GET_MODE_INNER (outermode);
}
else
- {
- num_elem = 1;
- elems = &result_s;
- outer_submode = outermode;
- }
+ elems = &result_s;
+ outer_submode = GET_MODE_INNER (outermode);
outer_class = GET_MODE_CLASS (outer_submode);
elem_bitsize = GET_MODE_BITSIZE (outer_submode);
diff --git a/gcc/stor-layout.c b/gcc/stor-layout.c
index 5bc8a291787..2b8025e6d72 100644
--- a/gcc/stor-layout.c
+++ b/gcc/stor-layout.c
@@ -506,7 +506,7 @@ bitwise_type_for_mode (machine_mode mode)
if (COMPLEX_MODE_P (mode))
return build_complex_type (inner_type);
- gcc_checking_assert (GET_MODE_INNER (mode) == VOIDmode);
+ gcc_checking_assert (GET_MODE_INNER (mode) == mode);
return inner_type;
}
@@ -563,18 +563,6 @@ get_mode_alignment (machine_mode mode)
return MIN (BIGGEST_ALIGNMENT, MAX (1, mode_base_align[mode]*BITS_PER_UNIT));
}
-/* Return the precision of the mode, or for a complex or vector mode the
- precision of the mode of its elements. */
-
-unsigned int
-element_precision (machine_mode mode)
-{
- if (COMPLEX_MODE_P (mode) || VECTOR_MODE_P (mode))
- mode = GET_MODE_INNER (mode);
-
- return GET_MODE_PRECISION (mode);
-}
-
/* Return the natural mode of an array, given that it is SIZE bytes in
total and has elements of type ELEM_TYPE. */
diff --git a/gcc/tree-cfg.c b/gcc/tree-cfg.c
index 64bdc92e681..a6ed03bf200 100644
--- a/gcc/tree-cfg.c
+++ b/gcc/tree-cfg.c
@@ -4023,10 +4023,8 @@ verify_gimple_assign_ternary (gassign *stmt)
case SAD_EXPR:
if (!useless_type_conversion_p (rhs1_type, rhs2_type)
|| !useless_type_conversion_p (lhs_type, rhs3_type)
- || 2 * GET_MODE_BITSIZE (GET_MODE_INNER
- (TYPE_MODE (TREE_TYPE (rhs1_type))))
- > GET_MODE_BITSIZE (GET_MODE_INNER
- (TYPE_MODE (TREE_TYPE (lhs_type)))))
+ || 2 * GET_MODE_UNIT_BITSIZE (TYPE_MODE (TREE_TYPE (rhs1_type)))
+ > GET_MODE_UNIT_BITSIZE (TYPE_MODE (TREE_TYPE (lhs_type))))
{
error ("type mismatch in sad expression");
debug_generic_expr (lhs_type);
diff --git a/gcc/tree-vect-patterns.c b/gcc/tree-vect-patterns.c
index 86d2447361b..69dd0f48aec 100644
--- a/gcc/tree-vect-patterns.c
+++ b/gcc/tree-vect-patterns.c
@@ -2672,7 +2672,6 @@ vect_recog_mixed_size_cond_pattern (vec<gimple> *stmts, tree *type_in,
tree cond_expr, then_clause, else_clause;
stmt_vec_info stmt_vinfo = vinfo_for_stmt (last_stmt), def_stmt_info;
tree type, vectype, comp_vectype, itype = NULL_TREE, vecitype;
- machine_mode cmpmode;
gimple pattern_stmt, def_stmt;
loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo);
bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo);
@@ -2734,9 +2733,11 @@ vect_recog_mixed_size_cond_pattern (vec<gimple> *stmts, tree *type_in,
itype = orig_type1;
}
- cmpmode = GET_MODE_INNER (TYPE_MODE (comp_vectype));
- if (GET_MODE_BITSIZE (TYPE_MODE (type)) == GET_MODE_BITSIZE (cmpmode))
+ HOST_WIDE_INT cmp_mode_size
+ = GET_MODE_UNIT_BITSIZE (TYPE_MODE (comp_vectype));
+
+ if (GET_MODE_BITSIZE (TYPE_MODE (type)) == cmp_mode_size)
return NULL;
vectype = get_vectype_for_scalar_type (type);
@@ -2747,11 +2748,11 @@ vect_recog_mixed_size_cond_pattern (vec<gimple> *stmts, tree *type_in,
return NULL;
if (itype == NULL_TREE)
- itype = build_nonstandard_integer_type (GET_MODE_BITSIZE (cmpmode),
+ itype = build_nonstandard_integer_type (cmp_mode_size,
TYPE_UNSIGNED (type));
if (itype == NULL_TREE
- || GET_MODE_BITSIZE (TYPE_MODE (itype)) != GET_MODE_BITSIZE (cmpmode))
+ || GET_MODE_BITSIZE (TYPE_MODE (itype)) != cmp_mode_size)
return NULL;
vecitype = get_vectype_for_scalar_type (itype);
@@ -2761,7 +2762,7 @@ vect_recog_mixed_size_cond_pattern (vec<gimple> *stmts, tree *type_in,
if (!expand_vec_cond_expr_p (vecitype, comp_vectype))
return NULL;
- if (GET_MODE_BITSIZE (TYPE_MODE (type)) > GET_MODE_BITSIZE (cmpmode))
+ if (GET_MODE_BITSIZE (TYPE_MODE (type)) > cmp_mode_size)
{
if ((TREE_CODE (then_clause) == INTEGER_CST
&& !int_fits_type_p (then_clause, itype))
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