diff options
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/expmed.c | 10 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/pr27861-1.c | 67 |
4 files changed, 87 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index be202bf61d0..11091f0ff1a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2006-06-19 Roger Sayle <roger@eyesopen.com> + + PR target/27861 + * expmed.c (expand_shift): On SHIFT_COUNT_TRUNCATED targets, we may + have stripped a SUBREG from the shift count, so we may need to + convert_to_mode back to the type's mode before calling make_tree. + Use new_amount instead of amount to avoid expanding a tree twice. + 2006-06-19 Richard Guenther <rguenther@suse.de> PR middle-end/28045 diff --git a/gcc/expmed.c b/gcc/expmed.c index 2e8906eb7a9..6f4e3311546 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -2260,13 +2260,17 @@ expand_shift (enum tree_code code, enum machine_mode mode, rtx shifted, code below. */ rtx subtarget = target == shifted ? 0 : target; + tree new_amount, other_amount; rtx temp1; tree type = TREE_TYPE (amount); - tree new_amount = make_tree (type, op1); - tree other_amount + if (GET_MODE (op1) != TYPE_MODE (type) + && GET_MODE (op1) != VOIDmode) + op1 = convert_to_mode (TYPE_MODE (type), op1, 1); + new_amount = make_tree (type, op1); + other_amount = fold_build2 (MINUS_EXPR, type, build_int_cst (type, GET_MODE_BITSIZE (mode)), - amount); + new_amount); shifted = force_reg (mode, shifted); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ba44e8fb2ac..888e45a572a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2006-06-19 Roger Sayle <roger@eyesopen.com> + + PR target/27861 + * gcc.dg/pr27861-1.c: New test case. + 2006-06-19 Richard Guenther <rguenther@suse.de> PR middle-end/28045 diff --git a/gcc/testsuite/gcc.dg/pr27861-1.c b/gcc/testsuite/gcc.dg/pr27861-1.c new file mode 100644 index 00000000000..cf269dc0ae5 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr27861-1.c @@ -0,0 +1,67 @@ +/* PR target/27861 */ +/* The following code used to cause an ICE during RTL expansion, as + expand shift was stripping the SUBREG of a rotate shift count, and + later producing a VAR_DECL tree whose DECL_RTL's mode didn't match + the VAR_DECL's type's mode. */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +typedef struct sim_state *SIM_DESC; +typedef enum +{ + SIM_OPEN_STANDALONE, SIM_OPEN_DEBUG +} +SIM_RC; +typedef unsigned int unsigned32 __attribute__ ((__mode__ (__SI__))); +typedef unsigned int unsigned64 __attribute__ ((__mode__ (__DI__))); +typedef unsigned32 unsigned_address; +typedef unsigned_address address_word; +static __inline__ unsigned64 + __attribute__ ((__unused__)) ROTR64 (unsigned64 val, int shift) +{ + unsigned64 result; + result = (((val) >> (shift)) | ((val) << ((64) - (shift)))); + return result; +} +typedef struct _sim_cpu sim_cpu; +enum +{ + TRACE_MEMORY_IDX, TRACE_MODEL_IDX, TRACE_ALU_IDX, TRACE_CORE_IDX, +}; +typedef struct _trace_data +{ + char trace_flags[32]; +} +TRACE_DATA; +typedef enum +{ + nr_watchpoint_types, +} +watchpoint_type; +typedef struct _sim_watchpoints +{ + TRACE_DATA trace_data; +} +sim_cpu_base; +struct _sim_cpu +{ + sim_cpu_base base; +}; +struct sim_state +{ + sim_cpu cpu[1]; +}; +typedef address_word instruction_address; +do_dror (SIM_DESC sd, instruction_address cia, int MY_INDEX, unsigned64 x, + unsigned64 y) +{ + unsigned64 result; + result = ROTR64 (x, y); + { + if ((((-1) & (1 << (TRACE_ALU_IDX))) != 0 + && (((&(((&(sd)->cpu[0])))->base.trace_data))-> + trace_flags)[TRACE_ALU_IDX] != 0)) + trace_result_word1 (sd, ((&(sd)->cpu[0])), TRACE_ALU_IDX, (result)); + } +} + |