diff options
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/rs6000/eabispe.h | 3 | ||||
| -rw-r--r-- | gcc/config/rs6000/linuxspe.h | 2 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 8 |
4 files changed, 17 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a79d14b7c5d..85c0349be3d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2006-11-24 Joseph Myers <joseph@codesourcery.com> + + * config/rs6000/eabispe.h (TARGET_DEFAULT): Include + MASK_STRICT_ALIGN. + * config/rs6000/linuxspe.h (TARGET_DEFAULT): Likewise. + * config/rs6000/rs6000.c (rs6000_override_options): Use + MASK_STRICT_ALIGN for 8540 and 8548. Add MASK_STRICT_ALIGN to + POWERPC_MASKS. + 2006-11-24 Andreas Krebbel <krebbel1@de.ibm.com> * config/s390.c (s390_emit_compare_and_swap): New function. diff --git a/gcc/config/rs6000/eabispe.h b/gcc/config/rs6000/eabispe.h index 5d94028ffc1..2a0b92368c0 100644 --- a/gcc/config/rs6000/eabispe.h +++ b/gcc/config/rs6000/eabispe.h @@ -21,7 +21,8 @@ MA 02110-1301, USA. */ #undef TARGET_DEFAULT -#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_EABI) +#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_EABI \ + | MASK_STRICT_ALIGN) #undef TARGET_VERSION #define TARGET_VERSION fprintf (stderr, " (PowerPC Embedded SPE)"); diff --git a/gcc/config/rs6000/linuxspe.h b/gcc/config/rs6000/linuxspe.h index ca6bb2bf8ad..fd7d20ebd68 100644 --- a/gcc/config/rs6000/linuxspe.h +++ b/gcc/config/rs6000/linuxspe.h @@ -25,7 +25,7 @@ /* Override rs6000.h and sysv4.h definition. */ #undef TARGET_DEFAULT -#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS) +#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN) #undef TARGET_SPE_ABI #undef TARGET_SPE diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 51e51178a40..d52a75951c3 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1235,9 +1235,11 @@ rs6000_override_options (const char *default_cpu) {"801", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT}, {"821", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT}, {"823", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT}, - {"8540", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, + {"8540", PROCESSOR_PPC8540, + POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_STRICT_ALIGN}, /* 8548 has a dummy entry for now. */ - {"8548", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_PPC_GFXOPT}, + {"8548", PROCESSOR_PPC8540, + POWERPC_BASE_MASK | MASK_PPC_GFXOPT | MASK_STRICT_ALIGN}, {"860", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT}, {"970", PROCESSOR_POWER4, POWERPC_7400_MASK | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64}, @@ -1291,7 +1293,7 @@ rs6000_override_options (const char *default_cpu) enum { POWER_MASKS = MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, - POWERPC_MASKS = (POWERPC_BASE_MASK | MASK_PPC_GPOPT + POWERPC_MASKS = (POWERPC_BASE_MASK | MASK_PPC_GPOPT | MASK_STRICT_ALIGN | MASK_PPC_GFXOPT | MASK_POWERPC64 | MASK_ALTIVEC | MASK_MFCRF | MASK_POPCNTB | MASK_FPRND | MASK_MULHW | MASK_DLMZB | MASK_MFPGPR) |