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-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/aarch64/aarch64-cores.def2
-rw-r--r--gcc/config/aarch64/aarch64-tune.md2
3 files changed, 9 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 10592b89885..e8b7a349353 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
+
+ * config/aarch64/aarch64-cores.def: Add entries for "cortex-a53" and
+ "cortex-a57".
+ * config/aarch64/aarch64-tune.md: Re-generate.
+
2013-01-02 Richard Biener <rguenther@suse.de>
* tree-vect-stmts.c (vectorizable_load): When vectorizing an
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index 06cc9825d39..4b77009ab7d 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -34,5 +34,7 @@
This list currently contains example CPUs that implement AArch64, and
therefore serves as a template for adding more CPUs in the future. */
+AARCH64_CORE("cortex-a53", cortexa53, 8, AARCH64_FL_FPSIMD, generic)
+AARCH64_CORE("cortex-a57", cortexa57, 8, AARCH64_FL_FPSIMD, generic)
AARCH64_CORE("example-1", large, 8, AARCH64_FL_FPSIMD, generic)
AARCH64_CORE("example-2", small, 8, AARCH64_FL_FPSIMD, generic)
diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md
index a654a91b43b..02699e35c3f 100644
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@
;; -*- buffer-read-only: t -*-
;; Generated automatically by gentune.sh from aarch64-cores.def
(define_attr "tune"
- "large,small"
+ "cortexa53,cortexa57,large,small"
(const (symbol_ref "((enum attr_tune) aarch64_tune)")))