diff options
-rw-r--r-- | gcc/ChangeLog | 10 | ||||
-rw-r--r-- | gcc/config/i386/cpuid.h | 54 | ||||
-rw-r--r-- | gcc/config/i386/driver-i386.c | 23 | ||||
-rw-r--r-- | libstdc++-v3/ChangeLog | 5 | ||||
-rw-r--r-- | libstdc++-v3/src/c++11/random.cc | 2 |
5 files changed, 76 insertions, 18 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8f763ab3c66..c8065d91cfa 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2012-09-09 Ulrich Drepper <drepper@gmail.com> + + * config/i386/cpuid.h: Define signature_*_e[bcd]x macros for + matching results of level 0 calls to __cpuid to processor + manufacturers. + * config/i386/driver-i386.c (vendor_signatures): Removed. + (processor_signatures): Removed. + (host_detect_local_cpu): Replace uses of now-removed SIG_* + constants with the new signature_*_ebx constants. + 2012-09-08 Jan Hubicka <jh@suse.cz> Replace cgraph_node_set and varpool_node_set by symtab_node_encoder diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index a26dc9b4156..5cd1eb1c736 100644 --- a/gcc/config/i386/cpuid.h +++ b/gcc/config/i386/cpuid.h @@ -75,6 +75,60 @@ #define bit_RDSEED (1 << 18) #define bit_ADX (1 << 19) +/* Signatures for different CPU implementations as returned in uses + of cpuid with level 0. */ +#define signature_AMD_ebx 0x68747541 +#define signature_AMD_ecx 0x444d4163 +#define signature_AMD_edx 0x69746e65 + +#define signature_CENTAUR_ebx 0x746e6543 +#define signature_CENTAUR_ecx 0x736c7561 +#define signature_CENTAUR_edx 0x48727561 + +#define signature_CYRIX_ebx 0x69727943 +#define signature_CYRIX_ecx 0x64616574 +#define signature_CYRIX_edx 0x736e4978 + +#define signature_INTEL_ebx 0x756e6547 +#define signature_INTEL_ecx 0x6c65746e +#define signature_INTEL_edx 0x49656e69 + +#define signature_TM1_ebx 0x6e617254 +#define signature_TM1_ecx 0x55504361 +#define signature_TM1_edx 0x74656d73 + +#define signature_TM2_ebx 0x756e6547 +#define signature_TM2_ecx 0x3638784d +#define signature_TM2_edx 0x54656e69 + +#define signature_NSC_ebx 0x646f6547 +#define signature_NSC_ecx 0x43534e20 +#define signature_NSC_edx 0x79622065 + +#define signature_NEXGEN_ebx 0x4778654e +#define signature_NEXGEN_ecx 0x6e657669 +#define signature_NEXGEN_edx 0x72446e65 + +#define signature_RISE_ebx 0x65736952 +#define signature_RISE_ecx 0x65736952 +#define signature_RISE_edx 0x65736952 + +#define signature_SIS_ebx 0x20536953 +#define signature_SIS_ecx 0x20536953 +#define signature_SIS_edx 0x20536953 + +#define signature_UMC_ebx 0x20434d55 +#define signature_UMC_ecx 0x20434d55 +#define signature_UMC_edx 0x20434d55 + +#define signature_VIA_ebx 0x20414956 +#define signature_VIA_ecx 0x20414956 +#define signature_VIA_edx 0x20414956 + +#define signature_VORTEX_ebx 0x74726f56 +#define signature_VORTEX_ecx 0x436f5320 +#define signature_VORTEX_edx 0x36387865 + #if defined(__i386__) && defined(__PIC__) /* %ebx may be the PIC register. */ #if __GNUC__ >= 3 diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index b5ae18f18b3..79bf75ffaeb 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -348,17 +348,6 @@ detect_caches_intel (bool xeon_mp, unsigned max_level, return describe_cache (level1, level2); } -enum vendor_signatures -{ - SIG_INTEL = 0x756e6547 /* Genu */, - SIG_AMD = 0x68747541 /* Auth */ -}; - -enum processor_signatures -{ - SIG_GEODE = 0x646f6547 /* Geod */ -}; - /* This will be called by the spec parser in gcc.c when it sees a %:local_cpu_detect(args) construct. Currently it will be called with either "arch" or "tune" as argument depending on if -march=native @@ -422,7 +411,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) model = (eax >> 4) & 0x0f; family = (eax >> 8) & 0x0f; - if (vendor == SIG_INTEL) + if (vendor == signature_INTEL_ebx) { unsigned int extended_model, extended_family; @@ -483,7 +472,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) has_abm = ecx & bit_ABM; has_lwp = ecx & bit_LWP; has_fma4 = ecx & bit_FMA4; - if (vendor == SIG_AMD && has_fma4 && has_fma) + if (vendor == signature_AMD_ebx && has_fma4 && has_fma) has_fma4 = 0; has_xop = ecx & bit_XOP; has_tbm = ecx & bit_TBM; @@ -497,9 +486,9 @@ const char *host_detect_local_cpu (int argc, const char **argv) if (!arch) { - if (vendor == SIG_AMD) + if (vendor == signature_AMD_ebx) cache = detect_caches_amd (ext_level); - else if (vendor == SIG_INTEL) + else if (vendor == signature_INTEL_ebx) { bool xeon_mp = (family == 15 && model == 6); cache = detect_caches_intel (xeon_mp, max_level, @@ -507,7 +496,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) } } - if (vendor == SIG_AMD) + if (vendor == signature_AMD_ebx) { unsigned int name; @@ -517,7 +506,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) else name = 0; - if (name == SIG_GEODE) + if (name == signature_NSC_ebx) processor = PROCESSOR_GEODE; else if (has_movbe) processor = PROCESSOR_BTVER2; diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index f3a5852dd21..bd87deca5b3 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,8 @@ +2012-09-09 Ulrich Drepper <drepper@gmail.com> + + * src/c++11/random.cc (random_device::_M_init): Use new macro + signature_INTEL_ebx to check for Intel processors. + 2012-09-06 Thiago Macieira <thiago.macieira@intel.com> PR libstdc++/54172 diff --git a/libstdc++-v3/src/c++11/random.cc b/libstdc++-v3/src/c++11/random.cc index f5ee9f4fa61..3b05318ea4c 100644 --- a/libstdc++-v3/src/c++11/random.cc +++ b/libstdc++-v3/src/c++11/random.cc @@ -79,7 +79,7 @@ namespace std _GLIBCXX_VISIBILITY(default) unsigned int eax, ebx, ecx, edx; // Check availability of cpuid and, for now at least, also the // CPU signature for Intel's - if (__get_cpuid_max(0, &ebx) > 0 && ebx == 0x756e6547) + if (__get_cpuid_max(0, &ebx) > 0 && ebx == signature_INTEL_ebx) { __cpuid(1, eax, ebx, ecx, edx); if (ecx & bit_RDRND) |