diff options
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/aarch64/arm_neon.h | 6 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/simd/vsqrt_f64_1.c | 25 |
4 files changed, 39 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 97510ec465f..c3ef16bce9c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2014-11-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/arm_neon.h (vsqrt_f64): New intrinsic. + 2014-11-21 Ilya Tocar <ilya.tocar@intel.com> * common/config/i386/i386-common.c (OPTION_MASK_ISA_PCOMMIT_UNSET, diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 921a5db1c14..8cff7195a10 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -22512,6 +22512,12 @@ vsqrtq_f32 (float32x4_t a) return __builtin_aarch64_sqrtv4sf (a); } +__extension__ static __inline float64x1_t __attribute__ ((__always_inline__)) +vsqrt_f64 (float64x1_t a) +{ + return (float64x1_t) { __builtin_sqrt (a[0]) }; +} + __extension__ static __inline float64x2_t __attribute__ ((__always_inline__)) vsqrtq_f64 (float64x2_t a) { diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0ab7fa03c32..17f71107608 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2014-11-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * gcc.target/aarch64/simd/vsqrt_f64_1.c + 2014-11-21 Ilya Tocar <ilya.tocar@intel.com> * g++.dg/other/i386-2.C: Add -mpcommit. diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vsqrt_f64_1.c b/gcc/testsuite/gcc.target/aarch64/simd/vsqrt_f64_1.c new file mode 100644 index 00000000000..57fb6bb48eb --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/simd/vsqrt_f64_1.c @@ -0,0 +1,25 @@ +/* Test the vsqrt_f64 AArch64 SIMD intrinsic. */ + +/* { dg-do run } */ +/* { dg-options "-save-temps -O3" } */ + +#include "arm_neon.h" + +extern void abort (void); + + +int +main (void) +{ + float64x1_t in = vcreate_f64(0x3febd3e560634d7bULL); + float64x1_t result = vsqrt_f64 (in); + float64_t expected = 0.9325321502142351; + + if (result[0] != expected) + abort (); + + return 0; +} + +/* { dg-final { scan-assembler "fsqrt\[ \t\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\n" } } */ +/* { dg-final { cleanup-saved-temps } } */ |