diff options
-rw-r--r-- | gcc/ChangeLog | 11 | ||||
-rw-r--r-- | gcc/config/arm/arm-protos.h | 5 | ||||
-rw-r--r-- | gcc/config/arm/arm.c | 19 | ||||
-rw-r--r-- | gcc/config/arm/arm.h | 5 |
4 files changed, 35 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 33715dc8db9..88e09bf2e59 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2013-06-26 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.h (MAX_CONDITIONAL_EXECUTE): Define macro. + * config/arm/arm-protos.h (arm_max_conditional_execute): New + declaration. + (tune_params): Update comment. + * config/arm/arm.c (arm_cortex_a15_tune): Set max_cond_insns to 2. + (arm_max_conditional_execute): New function. + (thumb2_final_prescan_insn): Use max_insn_skipped and + MAX_INSN_PER_IT_BLOCK to compute maximum instructions in a block. + 2013-06-25 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/57705 diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index a426432061d..ef94bbcea25 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -228,6 +228,8 @@ extern const char *arm_mangle_type (const_tree); extern void arm_order_regs_for_local_alloc (void); +extern int arm_max_conditional_execute (); + /* Vectorizer cost model implementation. */ struct cpu_vec_costs { const int scalar_stmt_cost; /* Cost of any scalar operation, excluding @@ -257,8 +259,7 @@ struct tune_params bool (*rtx_costs) (rtx, RTX_CODE, RTX_CODE, int *, bool); bool (*sched_adjust_cost) (rtx, rtx, rtx, int *); int constant_limit; - /* Maximum number of instructions to conditionalise in - arm_final_prescan_insn. */ + /* Maximum number of instructions to conditionalise. */ int max_insns_skipped; int num_prefetch_slots; int l1_cache_size; diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 88187ab69a7..e6fd42079cb 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -1059,7 +1059,7 @@ const struct tune_params arm_cortex_a15_tune = arm_9e_rtx_costs, NULL, 1, /* Constant limit. */ - 5, /* Max cond insns. */ + 2, /* Max cond insns. */ ARM_PREFETCH_NOT_BENEFICIAL, false, /* Prefer constant pool. */ arm_default_branch_cost, @@ -9145,6 +9145,12 @@ arm_adjust_cost (rtx insn, rtx link, rtx dep, int cost) return cost; } +int +arm_max_conditional_execute (void) +{ + return max_insns_skipped; +} + static int arm_default_branch_cost (bool speed_p, bool predictable_p ATTRIBUTE_UNUSED) { @@ -19567,6 +19573,13 @@ thumb2_final_prescan_insn (rtx insn) enum arm_cond_code code; int n; int mask; + int max; + + /* Maximum number of conditionally executed instructions in a block + is minimum of the two max values: maximum allowed in an IT block + and maximum that is beneficial according to the cost model and tune. */ + max = (max_insns_skipped < MAX_INSN_PER_IT_BLOCK) ? + max_insns_skipped : MAX_INSN_PER_IT_BLOCK; /* Remove the previous insn from the count of insns to be output. */ if (arm_condexec_count) @@ -19609,9 +19622,9 @@ thumb2_final_prescan_insn (rtx insn) /* ??? Recognize conditional jumps, and combine them with IT blocks. */ if (GET_CODE (body) != COND_EXEC) break; - /* Allow up to 4 conditionally executed instructions in a block. */ + /* Maximum number of conditionally executed instructions in a block. */ n = get_attr_ce_count (insn); - if (arm_condexec_masklen + n > MAX_INSN_PER_IT_BLOCK) + if (arm_condexec_masklen + n > max) break; predicate = COND_EXEC_TEST (body); diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 3a49a90c184..387d2717431 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -183,6 +183,11 @@ extern arm_cc arm_current_cc; #define ARM_INVERSE_CONDITION_CODE(X) ((arm_cc) (((int)X) ^ 1)) +/* The maximaum number of instructions that is beneficial to + conditionally execute. */ +#undef MAX_CONDITIONAL_EXECUTE +#define MAX_CONDITIONAL_EXECUTE arm_max_conditional_execute () + extern int arm_target_label; extern int arm_ccfsm_state; extern GTY(()) rtx arm_target_insn; |