diff options
| author | ramana <ramana@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-06-12 09:49:41 +0000 |
|---|---|---|
| committer | ramana <ramana@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-06-12 09:49:41 +0000 |
| commit | 60be399920473086ac2a92ebd41950addd3031a6 (patch) | |
| tree | d887583d8ab96846a95ce8ef8d868305bb6c9962 /libstdc++-v3/libsupc++ | |
| parent | e205c62d0c60cb0de714d98b958bbd4f650865d6 (diff) | |
| download | gcc-60be399920473086ac2a92ebd41950addd3031a6.tar.gz | |
Use atomics in guard.cc.
This provides proper definitions for _GLIBCXX_READ_MEM_BARRIER and
_GLIBCXX_WRITE_MEM_BARRIER, rewrites the guards in terms of proper
atomic extensions and removes internal uses of
_GLIBCXX_READ_MEM_BARRIER and _GLIBCXX_WRITE_MEM_BARRIER and replaces
them with equivalent atomics.
2015-06-12 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/66200
PR c++/66192
* * config/cpu/generic/atomic_word.h (_GLIBCXX_READ_MEM_BARRIER): Define
(_GLIBCXX_WRITE_MEM_BARRIER): Likewise
* include/bits/shared_ptr_base.h: Use ACQ_REL barrier.
* include/ext/atomicity.h: Likewise.
* include/tr1/shared_ptr.h: Likewise.
* libsupc++/guard.cc (__test_and_acquire): Rewrite with atomics.
Update comment.
(__set_and_release): Likewise.
* testsuite/20_util/shared_ptr/cons/43820_neg.cc (test01): Adjust for
line numbers.
* testsuite/20_util/shared_ptr/cons/void_neg.cc: Likewise.
* testsuite/tr1/2_general_utilities/shared_ptr/cons/43820_neg.cc:
Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@224411 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libstdc++-v3/libsupc++')
| -rw-r--r-- | libstdc++-v3/libsupc++/guard.cc | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/libstdc++-v3/libsupc++/guard.cc b/libstdc++-v3/libsupc++/guard.cc index 9f19fd462ef..4a2cfe938a9 100644 --- a/libstdc++-v3/libsupc++/guard.cc +++ b/libstdc++-v3/libsupc++/guard.cc @@ -107,22 +107,31 @@ namespace # endif # ifndef _GLIBCXX_GUARD_TEST_AND_ACQUIRE + +// Test the guard variable with a memory load with +// acquire semantics. + inline bool __test_and_acquire (__cxxabiv1::__guard *g) { - bool b = _GLIBCXX_GUARD_TEST (g); - _GLIBCXX_READ_MEM_BARRIER; - return b; + unsigned char __c; + unsigned char *__p = reinterpret_cast<unsigned char *>(g); + __atomic_load (__p, &__c, __ATOMIC_ACQUIRE); + return _GLIBCXX_GUARD_TEST(&__c); } # define _GLIBCXX_GUARD_TEST_AND_ACQUIRE(G) __test_and_acquire (G) # endif # ifndef _GLIBCXX_GUARD_SET_AND_RELEASE + +// Set the guard variable to 1 with memory order release semantics. + inline void __set_and_release (__cxxabiv1::__guard *g) { - _GLIBCXX_WRITE_MEM_BARRIER; - _GLIBCXX_GUARD_SET (g); + unsigned char *__p = reinterpret_cast<unsigned char *>(g); + unsigned char val = 1; + __atomic_store (__p, &val, __ATOMIC_RELEASE); } # define _GLIBCXX_GUARD_SET_AND_RELEASE(G) __set_and_release (G) # endif |