diff options
author | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-05-19 14:41:18 +0000 |
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committer | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-05-19 14:41:18 +0000 |
commit | 9faa46a925af2122d625270e4c97adee0e9821ec (patch) | |
tree | eede6322fcbfbaaac7b3d6e11a2b43d7460770bd /libitm | |
parent | 22499a394f2e3f244a0a32fbe40e10ad5dc984d8 (diff) | |
download | gcc-9faa46a925af2122d625270e4c97adee0e9821ec.tar.gz |
libitm: Enable aarch64
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210615 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libitm')
-rw-r--r-- | libitm/ChangeLog | 6 | ||||
-rw-r--r-- | libitm/config/aarch64/sjlj.S | 93 | ||||
-rw-r--r-- | libitm/config/aarch64/target.h | 45 | ||||
-rw-r--r-- | libitm/configure.tgt | 1 |
4 files changed, 145 insertions, 0 deletions
diff --git a/libitm/ChangeLog b/libitm/ChangeLog index 62005789c57..61ef7f15452 100644 --- a/libitm/ChangeLog +++ b/libitm/ChangeLog @@ -1,3 +1,9 @@ +2014-05-19 Richard Henderson <rth@redhat.com> + + * config/aarch64/sjlj.S: New file. + * config/aarch64/target.h: New file. + * configure.tgt: Enable aarch64. + 2014-04-09 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE> * config/generic/asmcfi.h: Also check for diff --git a/libitm/config/aarch64/sjlj.S b/libitm/config/aarch64/sjlj.S new file mode 100644 index 00000000000..4207da96638 --- /dev/null +++ b/libitm/config/aarch64/sjlj.S @@ -0,0 +1,93 @@ +/* Copyright (C) 2014 Free Software Foundation, Inc. + Contributed by Richard Henderson <rth@redhat.com>. + + This file is part of the GNU Transactional Memory Library (libitm). + + Libitm is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + Libitm is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +#include "asmcfi.h" + + .text + .align 2 + .global _ITM_beginTransaction + .type _ITM_beginTransaction, %function + +_ITM_beginTransaction: + cfi_startproc + mov x1, sp + stp x29, x30, [sp, -11*16]! + cfi_adjust_cfa_offset(11*16) + cfi_rel_offset(x29, 0) + cfi_rel_offset(x30, 8) + mov x29, sp + stp x19, x20, [sp, 1*16] + stp x21, x22, [sp, 2*16] + stp x23, x24, [sp, 3*16] + stp x25, x26, [sp, 4*16] + stp x27, x28, [sp, 5*16] + stp d8, d9, [sp, 6*16] + stp d10, d11, [sp, 7*16] + stp d12, d13, [sp, 8*16] + stp d14, d15, [sp, 9*16] + str x1, [sp, 10*16] + + /* Invoke GTM_begin_transaction with the struct we just built. */ + mov x1, sp + bl GTM_begin_transaction + + /* Return; we don't need to restore any of the call-saved regs. */ + ldp x29, x30, [sp] + add sp, sp, #11*16 + cfi_adjust_cfa_offset(-11*16) + cfi_restore(x29) + cfi_restore(x30) + ret + cfi_endproc + .size _ITM_beginTransaction, . - _ITM_beginTransaction + + .align 2 + .global GTM_longjmp + .hidden GTM_longjmp + .type GTM_longjmp, %function + +GTM_longjmp: + /* The first parameter becomes the return value (x0). + The third parameter is ignored for now. */ + cfi_startproc + ldp x19, x20, [x1, 1*16] + ldp x21, x22, [x1, 2*16] + ldp x23, x24, [x1, 3*16] + ldp x25, x26, [x1, 4*16] + ldp x27, x28, [x1, 5*16] + ldp d8, d9, [x1, 6*16] + ldp d10, d11, [x1, 7*16] + ldp d12, d13, [x1, 8*16] + ldp d14, d15, [x1, 9*16] + ldr x3, [x1, 10*16] + ldp x29, x30, [x1] + cfi_def_cfa(x1, 0) + mov sp, x3 + br x30 + cfi_endproc + .size GTM_longjmp, . - GTM_longjmp + +#ifdef __linux__ +.section .note.GNU-stack, "", %progbits +#endif diff --git a/libitm/config/aarch64/target.h b/libitm/config/aarch64/target.h new file mode 100644 index 00000000000..cb0f33621e8 --- /dev/null +++ b/libitm/config/aarch64/target.h @@ -0,0 +1,45 @@ +/* Copyright (C) 2014 Free Software Foundation, Inc. + Contributed by Richard Henderson <rth@redhat.com>. + + This file is part of the GNU Transactional Memory Library (libitm). + + Libitm is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + Libitm is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +namespace GTM HIDDEN { + +typedef struct gtm_jmpbuf +{ + unsigned long long fp; /* x29 */ + unsigned long long pc; /* x30 */ + unsigned long long gr[10]; /* x19-x28 */ + unsigned long long vr[8]; /* d8-d15 */ + void *cfa; +} gtm_jmpbuf; + +/* ??? The size of one line in hardware caches (in bytes). */ +#define HW_CACHELINE_SIZE 128 + +static inline void +cpu_relax (void) +{ + __asm volatile ("" : : : "memory"); +} + +} // namespace GTM diff --git a/libitm/configure.tgt b/libitm/configure.tgt index 4694a9b8aa0..44c1a144a23 100644 --- a/libitm/configure.tgt +++ b/libitm/configure.tgt @@ -46,6 +46,7 @@ fi # Map the target cpu to an ARCH sub-directory. At the same time, # work out any special compilation flags as necessary. case "${target_cpu}" in + aarch64*) ARCH=aarch64 ;; alpha*) ARCH=alpha ;; rs6000 | powerpc*) XCFLAGS="${XCFLAGS} -mhtm" |