summaryrefslogtreecommitdiff
path: root/libgfortran
diff options
context:
space:
mode:
authorfxcoudert <fxcoudert@138bc75d-0d04-0410-961f-82ee72b054a4>2006-03-30 22:00:21 +0000
committerfxcoudert <fxcoudert@138bc75d-0d04-0410-961f-82ee72b054a4>2006-03-30 22:00:21 +0000
commit639701f65ab89dc0fd4bee29db3925ade3ee3de7 (patch)
tree545dba484857e28e58bdd870e9cbb05f2c5ab48f /libgfortran
parent77a85ce73b00569bd886f2590a447721f1f38b5e (diff)
downloadgcc-639701f65ab89dc0fd4bee29db3925ade3ee3de7.tar.gz
PR libfortran/26712
* config/fpu-387.h: Add special case for handling of SSE control bit on i386-darwin. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@112546 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'libgfortran')
-rw-r--r--libgfortran/ChangeLog6
-rw-r--r--libgfortran/config/fpu-387.h12
2 files changed, 18 insertions, 0 deletions
diff --git a/libgfortran/ChangeLog b/libgfortran/ChangeLog
index d082c073e64..4074c8c47bd 100644
--- a/libgfortran/ChangeLog
+++ b/libgfortran/ChangeLog
@@ -1,3 +1,9 @@
+2006-03-30 Francois-Xavier Coudert <coudert@clipper.ens.fr>
+
+ PR libfortran/26712
+ * config/fpu-387.h: Add special case for handling of SSE
+ control bit on i386-darwin.
+
2006-03-30 Thomas Koenig <Thomas.Koenig@online.de>
PR fortran/25031
diff --git a/libgfortran/config/fpu-387.h b/libgfortran/config/fpu-387.h
index bf9fbc8efce..5e3dec2d4df 100644
--- a/libgfortran/config/fpu-387.h
+++ b/libgfortran/config/fpu-387.h
@@ -93,6 +93,17 @@ void set_fpu (void)
/* SSE */
asm volatile ("stmxcsr %0" : "=m" (cw_sse));
cw_sse &= 0xFFFF0000;
+#ifdef __APPLE__
+ cw_sse |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM
+ | _FPU_MASK_UM | _FPU_MASK_PM ) << 7;
+ if (options.fpe & GFC_FPE_INVALID) cw_sse &= ~(_FPU_MASK_IM << 7);
+ if (options.fpe & GFC_FPE_DENORMAL) cw_sse &= ~(_FPU_MASK_DM << 7);
+ if (options.fpe & GFC_FPE_ZERO) cw_sse &= ~(_FPU_MASK_ZM << 7);
+ if (options.fpe & GFC_FPE_OVERFLOW) cw_sse &= ~(_FPU_MASK_OM << 7);
+ if (options.fpe & GFC_FPE_UNDERFLOW) cw_sse &= ~(_FPU_MASK_UM << 7);
+ if (options.fpe & GFC_FPE_PRECISION) cw_sse &= ~(_FPU_MASK_PM << 7);
+ asm volatile ("ldmxcsr %0" : : "m" (cw_sse));
+#else
if (options.fpe & GFC_FPE_INVALID) cw_sse |= 1 << 7;
if (options.fpe & GFC_FPE_DENORMAL) cw_sse |= 1 << 8;
if (options.fpe & GFC_FPE_ZERO) cw_sse |= 1 << 9;
@@ -100,5 +111,6 @@ void set_fpu (void)
if (options.fpe & GFC_FPE_UNDERFLOW) cw_sse |= 1 << 11;
if (options.fpe & GFC_FPE_PRECISION) cw_sse |= 1 << 12;
asm volatile ("ldmxcsr %0" : : "m" (cw_sse));
+#endif
}
}