diff options
| author | hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-03-28 02:49:34 +0000 |
|---|---|---|
| committer | hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-03-28 02:49:34 +0000 |
| commit | 30d07ab33d8126c2ff061bbb7e4b221672721a62 (patch) | |
| tree | 3b3e0518b335094afcbe8f8d0a6160f6385d49ba /gcc | |
| parent | a5af08d26ce1678e462f91bb3fb9336e30d02ca8 (diff) | |
| download | gcc-30d07ab33d8126c2ff061bbb7e4b221672721a62.tar.gz | |
Don't assert unaligned 256bit load/store.
2011-03-27 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/sse.md (*avx_mov<mode>_internal): Don't assert
unaligned 256bit load/store.
(*avx_movu<ssemodesuffix><avxmodesuffix>): Likewise.
(*avx_movdqu<avxmodesuffix>): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@171590 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 26 |
2 files changed, 9 insertions, 24 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d8bf12e4d34..e9166cf4e93 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2011-03-27 H.J. Lu <hongjiu.lu@intel.com> + + * config/i386/sse.md (*avx_mov<mode>_internal): Don't assert + unaligned 256bit load/store. + (*avx_movu<ssemodesuffix><avxmodesuffix>): Likewise. + (*avx_movdqu<avxmodesuffix>): Likewise. + 2011-03-27 Vladimir Makarov <vmakarov@redhat.com> PR bootstrap/48307 diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index de11f7362ec..4c22bc5df68 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -203,12 +203,6 @@ return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: - if (GET_MODE_ALIGNMENT (<MODE>mode) == 256 - && ((TARGET_AVX256_SPLIT_UNALIGNED_STORE - && misaligned_operand (operands[0], <MODE>mode)) - || (TARGET_AVX256_SPLIT_UNALIGNED_LOAD - && misaligned_operand (operands[1], <MODE>mode)))) - gcc_unreachable (); switch (get_attr_mode (insn)) { case MODE_V8SF: @@ -416,15 +410,7 @@ UNSPEC_MOVU))] "AVX_VEC_FLOAT_MODE_P (<MODE>mode) && !(MEM_P (operands[0]) && MEM_P (operands[1]))" -{ - if (GET_MODE_ALIGNMENT (<MODE>mode) == 256 - && ((TARGET_AVX256_SPLIT_UNALIGNED_STORE - && misaligned_operand (operands[0], <MODE>mode)) - || (TARGET_AVX256_SPLIT_UNALIGNED_LOAD - && misaligned_operand (operands[1], <MODE>mode)))) - gcc_unreachable (); - return "vmovu<ssemodesuffix>\t{%1, %0|%0, %1}"; -} + "vmovu<ssemodesuffix>\t{%1, %0|%0, %1}" [(set_attr "type" "ssemov") (set_attr "movu" "1") (set_attr "prefix" "vex") @@ -483,15 +469,7 @@ [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "xm,x")] UNSPEC_MOVU))] "TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" -{ - if (GET_MODE_ALIGNMENT (<MODE>mode) == 256 - && ((TARGET_AVX256_SPLIT_UNALIGNED_STORE - && misaligned_operand (operands[0], <MODE>mode)) - || (TARGET_AVX256_SPLIT_UNALIGNED_LOAD - && misaligned_operand (operands[1], <MODE>mode)))) - gcc_unreachable (); - return "vmovdqu\t{%1, %0|%0, %1}"; -} + "vmovdqu\t{%1, %0|%0, %1}" [(set_attr "type" "ssemov") (set_attr "movu" "1") (set_attr "prefix" "vex") |